1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
6 ******************************************************************************/
10 #include "odm_precomp.h"
11 #include <hal_btcoex.h>
16 /* <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. */
19 RT_MULTI_FUNC_NONE = 0x00,
20 RT_MULTI_FUNC_WIFI = 0x01,
21 RT_MULTI_FUNC_BT = 0x02,
22 RT_MULTI_FUNC_GPS = 0x04,
25 /* <Roger_Notes> For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08. */
27 enum rt_polarity_ctl {
28 RT_POLARITY_LOW_ACT = 0,
29 RT_POLARITY_HIGH_ACT = 1,
32 /* For RTL8723 regulator mode. by tynli. 2011.01.14. */
33 enum rt_regulator_mode {
34 RT_SWITCHING_REGULATOR = 0,
39 RT_AMPDU_BURST_NONE = 0,
40 RT_AMPDU_BURST_92D = 1,
41 RT_AMPDU_BURST_88E = 2,
42 RT_AMPDU_BURST_8812_4 = 3,
43 RT_AMPDU_BURST_8812_8 = 4,
44 RT_AMPDU_BURST_8812_12 = 5,
45 RT_AMPDU_BURST_8812_15 = 6,
46 RT_AMPDU_BURST_8723B = 7,
49 #define CHANNEL_MAX_NUMBER (14) /* 14 is the max channel number */
50 #define CHANNEL_MAX_NUMBER_2G 14
51 #define MAX_PG_GROUP 13
53 /* Tx Power Limit Table Size */
54 #define MAX_REGULATION_NUM 4
55 #define MAX_2_4G_BANDWIDTH_NUM 4
56 #define MAX_RATE_SECTION_NUM 10
58 #define MAX_BASE_NUM_IN_PHY_REG_PG_2_4G 10 /* CCK:1, OFDM:1, HT:4, VHT:4 */
60 /* duplicate code, will move to ODM ######### */
61 /* define IQK_MAC_REG_NUM 4 */
62 /* define IQK_ADDA_REG_NUM 16 */
64 /* define IQK_BB_REG_NUM 10 */
66 /* define HP_THERMAL_NUM 8 */
67 /* duplicate code, will move to ODM ######### */
70 SINGLEMAC_SINGLEPHY, /* SMSP */
71 DUALMAC_DUALPHY, /* DMDP */
72 DUALMAC_SINGLEPHY, /* DMSP */
75 #define PAGE_SIZE_128 128
76 #define PAGE_SIZE_256 256
77 #define PAGE_SIZE_512 512
82 #define DYNAMIC_FUNC_BT BIT0
89 /* Upper and Lower Signal threshold for Rate Adaptive */
90 int UndecoratedSmoothedPWDB;
91 int UndecoratedSmoothedCCK;
92 int EntryMinUndecoratedSmoothedPWDB;
93 int EntryMaxUndecoratedSmoothedPWDB;
94 int MinUndecoratedPWDBForDM;
95 int LastMinUndecoratedPWDBForDM;
97 s32 UndecoratedSmoothedBeacon;
99 /* duplicate code, will move to ODM ######### */
101 u8 bDynamicTxPowerEnable;
103 u8 DynamicTxHighPowerLvl;/* Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 */
105 /* for tx power tracking */
108 u8 bTXPowerTrackingInit;
109 u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */
112 u8 ThermalMeter[2]; /* ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */
121 u32 APKoutput[2][2]; /* path A/B; output1_1a/output1_2a */
123 u8 bAPKThermalMeterIgnore;
132 u32 ADDA_backup[IQK_ADDA_REG_NUM];
133 u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
134 u32 IQK_BB_backup_recover[9];
135 u32 IQK_BB_backup[IQK_BB_REG_NUM];
137 u8 PowerIndex_backup[6];
146 u8 ThermalValue_HP[HP_THERMAL_NUM];
147 u8 ThermalValue_HP_index;
150 /* for TxPwrTracking2 */
156 u32 TXPowerTrackingCallbackCnt; /* cosa add for debug */
158 u32 prv_traffic_idx; /* edca turbo */
159 /* duplicate code, will move to ODM ######### */
161 /* Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas */
166 struct hal_com_data {
167 struct hal_version VersionID;
168 enum rt_multi_func MultiFunc; /* For multi-function consideration. */
169 enum rt_polarity_ctl PolarityCtl; /* For Wifi PDn Polarity control. */
170 enum rt_regulator_mode RegulatorMode; /* switching regulator or LDO */
173 u16 FirmwareVersionRev;
174 u16 FirmwareSubVersion;
175 u16 FirmwareSignature;
177 /* current WIFI_PHY values */
178 enum wireless_mode CurrentWirelessMode;
179 enum channel_width CurrentChannelBW;
181 u8 CurrentCenterFrequencyIndex1;
182 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
183 u8 nCur80MhzPrimeSC; /* used for primary 40MHz of 80MHz mode */
187 u16 ForcedDataRate;/* Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M. */
199 u8 DefaultInitialGain[4];
200 /* EEPROM setting. */
205 u8 EEPROMSubCustomerID;
208 u8 EEPROMThermalMeter;
209 u8 EEPROMBluetoothCoexist;
210 u8 EEPROMBluetoothType;
211 u8 EEPROMBluetoothAntNum;
212 u8 EEPROMBluetoothAntIsolation;
213 u8 EEPROMBluetoothRadioShared;
214 u8 bTXPowerDataReadFromEEPORM;
215 u8 bAPKThermalMeterIgnore;
216 u8 bDisableSWChannelPlan; /* flag of disable software change channel plan */
219 u8 EfuseUsedPercentage;
221 struct efuse_hal EfuseHal;
224 u8 Index24G_CCK_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
225 u8 Index24G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
226 /* If only one tx, only BW20 and OFDM are used. */
227 s8 CCK_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
228 s8 OFDM_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
229 s8 BW20_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
230 s8 BW40_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
234 u8 TxPwrInPercentage;
236 u8 TxPwrCalibrateRate;
237 /* TX power by rate table at most 4RF path. */
238 /* The register is */
239 /* VHT TX power by rate off setArray = */
240 /* RF: at most 4*4 = ABCD = 0/1/2/3 */
241 /* CCK = 0 OFDM = 1/2 HT-MCS 0-15 =3/4/56 VHT =7/8/9/10/11 */
244 s8 TxPwrByRateOffset[TX_PWR_BY_RATE_NUM_RF]
245 [TX_PWR_BY_RATE_NUM_RF]
246 [TX_PWR_BY_RATE_NUM_RATE];
249 /* 2 Power Limit Table */
250 u8 TxPwrLevelCck[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];
251 u8 TxPwrLevelHT40_1S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; /* For HT 40MHZ pwr */
252 u8 TxPwrLevelHT40_2S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; /* For HT 40MHZ pwr */
253 s8 TxPwrHt20Diff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];/* HT 20<->40 Pwr diff */
254 u8 TxPwrLegacyHtDiff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];/* For HT<->legacy pwr diff */
256 /* Power Limit Table for 2.4G */
257 s8 TxPwrLimit_2_4G[MAX_REGULATION_NUM]
258 [MAX_2_4G_BANDWIDTH_NUM]
259 [MAX_RATE_SECTION_NUM]
260 [CHANNEL_MAX_NUMBER_2G]
263 /* Store the original power by rate value of the base of each rate section of rf path A & B */
264 u8 TxPwrByRateBase2_4G[TX_PWR_BY_RATE_NUM_RF]
265 [TX_PWR_BY_RATE_NUM_RF]
266 [MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
268 /* For power group */
269 u8 PwrGroupHT20[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];
270 u8 PwrGroupHT40[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];
276 u8 LegacyHTTxPowerDiff;/* Legacy to HT rate power diff */
277 /* The current Tx Power Level */
278 u8 CurrentCckTxPwrIdx;
279 u8 CurrentOfdm24GTxPwrIdx;
280 u8 CurrentBW2024GTxPwrIdx;
281 u8 CurrentBW4024GTxPwrIdx;
283 /* Read/write are allow for following hardware information variables */
285 u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
286 u32 CCKTxPowerLevelOriginalOffset;
289 u32 AntennaTxPath; /* Antenna path Tx */
290 u32 AntennaRxPath; /* Antenna path Rx */
308 bool bChnlBWInitialized;
311 u8 bLedOpenDrain; /* Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. */
312 u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */
313 u8 b1x1RecvCombine; /* for 1T1R receive combining */
315 u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */
317 struct bb_register_def PHYRegDef[4]; /* Radio A/B/C/D */
324 /* for host message to fw */
329 /* Beacon function related global variable. */
342 u8 ant_path; /* for 8723B s0/s1 selection */
344 u8 u1ForcedIgiLb; /* forced IGI lower bound */
346 u8 bDumpRxPkt;/* for debug */
347 u8 bDumpTxPkt;/* for debug */
348 u8 FwRsvdPageStartOffset; /* 2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. */
350 /* 2010/08/09 MH Add CU power down mode. */
353 /* Add for dual MAC 0--Mac0 1--Mac1 */
359 /* 2010/12/10 MH Add for USB aggregation mode dynamic scheme. */
360 bool UsbRxHighSpeedMode;
362 /* 2010/11/22 MH Add for slim combo debug mode selective. */
363 /* This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock. */
366 /* u8 AMPDUDensity; */
368 /* Auto FSM to Turn On, include clock, isolation, power control for MAC only */
372 struct submit_ctx iqk_sctx;
374 enum rt_ampdu_burst AMPDUBurstMode; /* 92C maybe not use, but for compile successfully */
379 /* SDIO Tx FIFO related. */
380 /* HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg */
381 u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
382 spinlock_t SdioTxFIFOFreePageLock;
383 u8 SdioTxOQTMaxFreeSpace;
384 u8 SdioTxOQTFreeSpace;
387 /* SDIO Rx FIFO related. */
391 u32 sdio_tx_max_len[SDIO_MAX_TX_QUEUE];/* H, N, L, used for sdio tx aggregation max length per queue */
393 struct dm_priv dmpriv;
394 struct dm_odm_t odmpriv;
396 /* For bluetooth co-existance */
397 struct bt_coexist bt_coexist;
399 /* Interrupt related register information. */
404 #define GET_HAL_DATA(__padapter) ((struct hal_com_data *)((__padapter)->HalData))
405 #define GET_HAL_RFPATH_NUM(__padapter) (((struct hal_com_data *)((__padapter)->HalData))->NumTotalRFPath)
406 #define RT_GetInterfaceSelection(_Adapter) (GET_HAL_DATA(_Adapter)->InterfaceSel)
408 #endif /* __HAL_DATA_H__ */