drivers/staging/rtl8723bs/hal/hal_com.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5  *
   6  ******************************************************************************/
   7
   8 #include <linux/kernel.h>
   9 #include <drv_types.h>
  10 #include <rtw_debug.h>
  11 #include "hal_com_h2c.h"
  12
  13 #include "odm_precomp.h"
  14
  15 u8 rtw_hal_data_init(struct adapter *padapter)
  16 {
  17         if (is_primary_adapter(padapter)) {     /* if (padapter->isprimary) */
  18                 padapter->hal_data_sz = sizeof(struct hal_com_data);
  19                 padapter->HalData = vzalloc(padapter->hal_data_sz);
  20                 if (!padapter->HalData)
  21                         return _FAIL;
  22         }
  23         return _SUCCESS;
  24 }
  25
  26 void rtw_hal_data_deinit(struct adapter *padapter)
  27 {
  28         if (is_primary_adapter(padapter)) {     /* if (padapter->isprimary) */
  29                 if (padapter->HalData) {
  30                         vfree(padapter->HalData);
  31                         padapter->HalData = NULL;
  32                         padapter->hal_data_sz = 0;
  33                 }
  34         }
  35 }
  36
  37
  38 void dump_chip_info(struct hal_version  ChipVersion)
  39 {
  40         char buf[128];
  41         size_t cnt = 0;
  42
  43         cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "Chip Version Info: CHIP_8723B_%s_",
  44                         IS_NORMAL_CHIP(ChipVersion) ? "Normal_Chip" : "Test_Chip");
  45
  46         if (IS_CHIP_VENDOR_TSMC(ChipVersion))
  47                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "TSMC_");
  48         else if (IS_CHIP_VENDOR_UMC(ChipVersion))
  49                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "UMC_");
  50         else if (IS_CHIP_VENDOR_SMIC(ChipVersion))
  51                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "SMIC_");
  52
  53         if (IS_A_CUT(ChipVersion))
  54                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "A_CUT_");
  55         else if (IS_B_CUT(ChipVersion))
  56                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "B_CUT_");
  57         else if (IS_C_CUT(ChipVersion))
  58                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "C_CUT_");
  59         else if (IS_D_CUT(ChipVersion))
  60                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "D_CUT_");
  61         else if (IS_E_CUT(ChipVersion))
  62                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "E_CUT_");
  63         else if (IS_I_CUT(ChipVersion))
  64                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "I_CUT_");
  65         else if (IS_J_CUT(ChipVersion))
  66                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "J_CUT_");
  67         else if (IS_K_CUT(ChipVersion))
  68                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "K_CUT_");
  69         else
  70                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
  71                                 "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
  72
  73         if (IS_1T1R(ChipVersion))
  74                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T1R_");
  75         else if (IS_1T2R(ChipVersion))
  76                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T2R_");
  77         else if (IS_2T2R(ChipVersion))
  78                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "2T2R_");
  79         else
  80                 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
  81                                 "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType);
  82
  83         cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "RomVer(%d)\n", ChipVersion.ROMVer);
  84 }
  85
  86
  87 #define EEPROM_CHANNEL_PLAN_BY_HW_MASK  0x80
  88
  89 /*
  90  * Description:
  91  *Use hardware(efuse), driver parameter(registry) and default channel plan
  92  *to decide which one should be used.
  93  *
  94  * Parameters:
  95  *padapter                      pointer of adapter
  96  *hw_channel_plan               channel plan from HW (efuse/eeprom)
  97  *                                      BIT[7] software configure mode; 0:Enable, 1:disable
  98  *                                      BIT[6:0] Channel Plan
  99  *sw_channel_plan               channel plan from SW (registry/module param)
 100  *def_channel_plan      channel plan used when HW/SW both invalid
 101  *AutoLoadFail          efuse autoload fail or not
 102  *
 103  * Return:
 104  *Final channel plan decision
 105  *
 106  */
 107 u8 hal_com_config_channel_plan(
 108         struct adapter *padapter,
 109         u8 hw_channel_plan,
 110         u8 sw_channel_plan,
 111         u8 def_channel_plan,
 112         bool AutoLoadFail
 113 )
 114 {
 115         struct hal_com_data *pHalData;
 116         u8 chnlPlan;
 117
 118         pHalData = GET_HAL_DATA(padapter);
 119         pHalData->bDisableSWChannelPlan = false;
 120         chnlPlan = def_channel_plan;
 121
 122         if (0xFF == hw_channel_plan)
 123                 AutoLoadFail = true;
 124
 125         if (!AutoLoadFail) {
 126                 u8 hw_chnlPlan;
 127
 128                 hw_chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
 129                 if (rtw_is_channel_plan_valid(hw_chnlPlan)) {
 130                         if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
 131                                 pHalData->bDisableSWChannelPlan = true;
 132
 133                         chnlPlan = hw_chnlPlan;
 134                 }
 135         }
 136
 137         if (
 138                 (false == pHalData->bDisableSWChannelPlan) &&
 139                 rtw_is_channel_plan_valid(sw_channel_plan)
 140         )
 141                 chnlPlan = sw_channel_plan;
 142
 143         return chnlPlan;
 144 }
 145
 146 bool HAL_IsLegalChannel(struct adapter *adapter, u32 Channel)
 147 {
 148         bool bLegalChannel = true;
 149
 150         if ((Channel <= 14) && (Channel >= 1)) {
 151                 if (is_supported_24g(adapter->registrypriv.wireless_mode) == false)
 152                         bLegalChannel = false;
 153         } else {
 154                 bLegalChannel = false;
 155         }
 156
 157         return bLegalChannel;
 158 }
 159
 160 u8 MRateToHwRate(u8 rate)
 161 {
 162         u8 ret = DESC_RATE1M;
 163
 164         switch (rate) {
 165         case MGN_1M:
 166                 ret = DESC_RATE1M;
 167                 break;
 168         case MGN_2M:
 169                 ret = DESC_RATE2M;
 170                 break;
 171         case MGN_5_5M:
 172                 ret = DESC_RATE5_5M;
 173                 break;
 174         case MGN_11M:
 175                 ret = DESC_RATE11M;
 176                 break;
 177         case MGN_6M:
 178                 ret = DESC_RATE6M;
 179                 break;
 180         case MGN_9M:
 181                 ret = DESC_RATE9M;
 182                 break;
 183         case MGN_12M:
 184                 ret = DESC_RATE12M;
 185                 break;
 186         case MGN_18M:
 187                 ret = DESC_RATE18M;
 188                 break;
 189         case MGN_24M:
 190                 ret = DESC_RATE24M;
 191                 break;
 192         case MGN_36M:
 193                 ret = DESC_RATE36M;
 194                 break;
 195         case MGN_48M:
 196                 ret = DESC_RATE48M;
 197                 break;
 198         case MGN_54M:
 199                 ret = DESC_RATE54M;
 200                 break;
 201         case MGN_MCS0:
 202                 ret = DESC_RATEMCS0;
 203                 break;
 204         case MGN_MCS1:
 205                 ret = DESC_RATEMCS1;
 206                 break;
 207         case MGN_MCS2:
 208                 ret = DESC_RATEMCS2;
 209                 break;
 210         case MGN_MCS3:
 211                 ret = DESC_RATEMCS3;
 212                 break;
 213         case MGN_MCS4:
 214                 ret = DESC_RATEMCS4;
 215                 break;
 216         case MGN_MCS5:
 217                 ret = DESC_RATEMCS5;
 218                 break;
 219         case MGN_MCS6:
 220                 ret = DESC_RATEMCS6;
 221                 break;
 222         case MGN_MCS7:
 223                 ret = DESC_RATEMCS7;
 224                 break;
 225         case MGN_MCS8:
 226                 ret = DESC_RATEMCS8;
 227                 break;
 228         case MGN_MCS9:
 229                 ret = DESC_RATEMCS9;
 230                 break;
 231         case MGN_MCS10:
 232                 ret = DESC_RATEMCS10;
 233                 break;
 234         case MGN_MCS11:
 235                 ret = DESC_RATEMCS11;
 236                 break;
 237         case MGN_MCS12:
 238                 ret = DESC_RATEMCS12;
 239                 break;
 240         case MGN_MCS13:
 241                 ret = DESC_RATEMCS13;
 242                 break;
 243         case MGN_MCS14:
 244                 ret = DESC_RATEMCS14;
 245                 break;
 246         case MGN_MCS15:
 247                 ret = DESC_RATEMCS15;
 248                 break;
 249         case MGN_MCS16:
 250                 ret = DESC_RATEMCS16;
 251                 break;
 252         case MGN_MCS17:
 253                 ret = DESC_RATEMCS17;
 254                 break;
 255         case MGN_MCS18:
 256                 ret = DESC_RATEMCS18;
 257                 break;
 258         case MGN_MCS19:
 259                 ret = DESC_RATEMCS19;
 260                 break;
 261         case MGN_MCS20:
 262                 ret = DESC_RATEMCS20;
 263                 break;
 264         case MGN_MCS21:
 265                 ret = DESC_RATEMCS21;
 266                 break;
 267         case MGN_MCS22:
 268                 ret = DESC_RATEMCS22;
 269                 break;
 270         case MGN_MCS23:
 271                 ret = DESC_RATEMCS23;
 272                 break;
 273         case MGN_MCS24:
 274                 ret = DESC_RATEMCS24;
 275                 break;
 276         case MGN_MCS25:
 277                 ret = DESC_RATEMCS25;
 278                 break;
 279         case MGN_MCS26:
 280                 ret = DESC_RATEMCS26;
 281                 break;
 282         case MGN_MCS27:
 283                 ret = DESC_RATEMCS27;
 284                 break;
 285         case MGN_MCS28:
 286                 ret = DESC_RATEMCS28;
 287                 break;
 288         case MGN_MCS29:
 289                 ret = DESC_RATEMCS29;
 290                 break;
 291         case MGN_MCS30:
 292                 ret = DESC_RATEMCS30;
 293                 break;
 294         case MGN_MCS31:
 295                 ret = DESC_RATEMCS31;
 296                 break;
 297         default:
 298                 break;
 299         }
 300
 301         return ret;
 302 }
 303
 304 u8 HwRateToMRate(u8 rate)
 305 {
 306         u8 ret_rate = MGN_1M;
 307
 308         switch (rate) {
 309         case DESC_RATE1M:
 310                 ret_rate = MGN_1M;
 311                 break;
 312         case DESC_RATE2M:
 313                 ret_rate = MGN_2M;
 314                 break;
 315         case DESC_RATE5_5M:
 316                 ret_rate = MGN_5_5M;
 317                 break;
 318         case DESC_RATE11M:
 319                 ret_rate = MGN_11M;
 320                 break;
 321         case DESC_RATE6M:
 322                 ret_rate = MGN_6M;
 323                 break;
 324         case DESC_RATE9M:
 325                 ret_rate = MGN_9M;
 326                 break;
 327         case DESC_RATE12M:
 328                 ret_rate = MGN_12M;
 329                 break;
 330         case DESC_RATE18M:
 331                 ret_rate = MGN_18M;
 332                 break;
 333         case DESC_RATE24M:
 334                 ret_rate = MGN_24M;
 335                 break;
 336         case DESC_RATE36M:
 337                 ret_rate = MGN_36M;
 338                 break;
 339         case DESC_RATE48M:
 340                 ret_rate = MGN_48M;
 341                 break;
 342         case DESC_RATE54M:
 343                 ret_rate = MGN_54M;
 344                 break;
 345         case DESC_RATEMCS0:
 346                 ret_rate = MGN_MCS0;
 347                 break;
 348         case DESC_RATEMCS1:
 349                 ret_rate = MGN_MCS1;
 350                 break;
 351         case DESC_RATEMCS2:
 352                 ret_rate = MGN_MCS2;
 353                 break;
 354         case DESC_RATEMCS3:
 355                 ret_rate = MGN_MCS3;
 356                 break;
 357         case DESC_RATEMCS4:
 358                 ret_rate = MGN_MCS4;
 359                 break;
 360         case DESC_RATEMCS5:
 361                 ret_rate = MGN_MCS5;
 362                 break;
 363         case DESC_RATEMCS6:
 364                 ret_rate = MGN_MCS6;
 365                 break;
 366         case DESC_RATEMCS7:
 367                 ret_rate = MGN_MCS7;
 368                 break;
 369         case DESC_RATEMCS8:
 370                 ret_rate = MGN_MCS8;
 371                 break;
 372         case DESC_RATEMCS9:
 373                 ret_rate = MGN_MCS9;
 374                 break;
 375         case DESC_RATEMCS10:
 376                 ret_rate = MGN_MCS10;
 377                 break;
 378         case DESC_RATEMCS11:
 379                 ret_rate = MGN_MCS11;
 380                 break;
 381         case DESC_RATEMCS12:
 382                 ret_rate = MGN_MCS12;
 383                 break;
 384         case DESC_RATEMCS13:
 385                 ret_rate = MGN_MCS13;
 386                 break;
 387         case DESC_RATEMCS14:
 388                 ret_rate = MGN_MCS14;
 389                 break;
 390         case DESC_RATEMCS15:
 391                 ret_rate = MGN_MCS15;
 392                 break;
 393         case DESC_RATEMCS16:
 394                 ret_rate = MGN_MCS16;
 395                 break;
 396         case DESC_RATEMCS17:
 397                 ret_rate = MGN_MCS17;
 398                 break;
 399         case DESC_RATEMCS18:
 400                 ret_rate = MGN_MCS18;
 401                 break;
 402         case DESC_RATEMCS19:
 403                 ret_rate = MGN_MCS19;
 404                 break;
 405         case DESC_RATEMCS20:
 406                 ret_rate = MGN_MCS20;
 407                 break;
 408         case DESC_RATEMCS21:
 409                 ret_rate = MGN_MCS21;
 410                 break;
 411         case DESC_RATEMCS22:
 412                 ret_rate = MGN_MCS22;
 413                 break;
 414         case DESC_RATEMCS23:
 415                 ret_rate = MGN_MCS23;
 416                 break;
 417         case DESC_RATEMCS24:
 418                 ret_rate = MGN_MCS24;
 419                 break;
 420         case DESC_RATEMCS25:
 421                 ret_rate = MGN_MCS25;
 422                 break;
 423         case DESC_RATEMCS26:
 424                 ret_rate = MGN_MCS26;
 425                 break;
 426         case DESC_RATEMCS27:
 427                 ret_rate = MGN_MCS27;
 428                 break;
 429         case DESC_RATEMCS28:
 430                 ret_rate = MGN_MCS28;
 431                 break;
 432         case DESC_RATEMCS29:
 433                 ret_rate = MGN_MCS29;
 434                 break;
 435         case DESC_RATEMCS30:
 436                 ret_rate = MGN_MCS30;
 437                 break;
 438         case DESC_RATEMCS31:
 439                 ret_rate = MGN_MCS31;
 440                 break;
 441         default:
 442                 break;
 443         }
 444
 445         return ret_rate;
 446 }
 447
 448 void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg)
 449 {
 450         u8 i, is_brate, brate;
 451
 452         for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
 453
 454                 is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
 455                 brate = mBratesOS[i] & 0x7f;
 456
 457                 if (is_brate) {
 458                         switch (brate) {
 459                         case IEEE80211_CCK_RATE_1MB:
 460                                 *pBrateCfg |= RATE_1M;
 461                                 break;
 462                         case IEEE80211_CCK_RATE_2MB:
 463                                 *pBrateCfg |= RATE_2M;
 464                                 break;
 465                         case IEEE80211_CCK_RATE_5MB:
 466                                 *pBrateCfg |= RATE_5_5M;
 467                                 break;
 468                         case IEEE80211_CCK_RATE_11MB:
 469                                 *pBrateCfg |= RATE_11M;
 470                                 break;
 471                         case IEEE80211_OFDM_RATE_6MB:
 472                                 *pBrateCfg |= RATE_6M;
 473                                 break;
 474                         case IEEE80211_OFDM_RATE_9MB:
 475                                 *pBrateCfg |= RATE_9M;
 476                                 break;
 477                         case IEEE80211_OFDM_RATE_12MB:
 478                                 *pBrateCfg |= RATE_12M;
 479                                 break;
 480                         case IEEE80211_OFDM_RATE_18MB:
 481                                 *pBrateCfg |= RATE_18M;
 482                                 break;
 483                         case IEEE80211_OFDM_RATE_24MB:
 484                                 *pBrateCfg |= RATE_24M;
 485                                 break;
 486                         case IEEE80211_OFDM_RATE_36MB:
 487                                 *pBrateCfg |= RATE_36M;
 488                                 break;
 489                         case IEEE80211_OFDM_RATE_48MB:
 490                                 *pBrateCfg |= RATE_48M;
 491                                 break;
 492                         case IEEE80211_OFDM_RATE_54MB:
 493                                 *pBrateCfg |= RATE_54M;
 494                                 break;
 495                         }
 496                 }
 497         }
 498 }
 499
 500 static void _OneOutPipeMapping(struct adapter *padapter)
 501 {
 502         struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
 503
 504         pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
 505         pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
 506         pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];/* BE */
 507         pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
 508
 509         pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
 510         pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
 511         pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
 512         pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
 513 }
 514
 515 static void _TwoOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
 516 {
 517         struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
 518
 519         if (bWIFICfg) { /* WMM */
 520
 521                 /*      BK,     BE,     VI,     VO,     BCN,    CMD, MGT, HIGH, HCCA */
 522                 /*   0,         1,      0,      1,      0,      0,      0,      0,              0       }; */
 523                 /* 0:ep_0 num, 1:ep_1 num */
 524
 525                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];/* VO */
 526                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
 527                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
 528                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
 529
 530                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
 531                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
 532                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
 533                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
 534
 535         } else { /* typical setting */
 536
 537
 538                 /* BK,  BE,     VI,     VO,     BCN,    CMD, MGT, HIGH, HCCA */
 539                 /*   1,         1,      0,      0,      0,      0,      0,      0,              0       }; */
 540                 /* 0:ep_0 num, 1:ep_1 num */
 541
 542                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
 543                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
 544                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
 545                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
 546
 547                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
 548                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
 549                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
 550                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
 551
 552         }
 553
 554 }
 555
 556 static void _ThreeOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
 557 {
 558         struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
 559
 560         if (bWIFICfg) { /* for WMM */
 561
 562                 /*      BK,     BE,     VI,     VO,     BCN,    CMD, MGT, HIGH, HCCA */
 563                 /*   1,         2,      1,      0,      0,      0,      0,      0,              0       }; */
 564                 /* 0:H, 1:N, 2:L */
 565
 566                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
 567                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
 568                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
 569                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
 570
 571                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
 572                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
 573                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
 574                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
 575
 576         } else { /* typical setting */
 577
 578
 579                 /*      BK,     BE,     VI,     VO,     BCN,    CMD, MGT, HIGH, HCCA */
 580                 /*   2,         2,      1,      0,      0,      0,      0,      0,              0       }; */
 581                 /* 0:H, 1:N, 2:L */
 582
 583                 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
 584                 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
 585                 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
 586                 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];/* BK */
 587
 588                 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
 589                 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
 590                 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
 591                 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
 592         }
 593
 594 }
 595
 596 bool Hal_MappingOutPipe(struct adapter *padapter, u8 NumOutPipe)
 597 {
 598         struct registry_priv *pregistrypriv = &padapter->registrypriv;
 599
 600         bool bWIFICfg = (pregistrypriv->wifi_spec) ? true : false;
 601
 602         bool result = true;
 603
 604         switch (NumOutPipe) {
 605         case 2:
 606                 _TwoOutPipeMapping(padapter, bWIFICfg);
 607                 break;
 608         case 3:
 609         case 4:
 610                 _ThreeOutPipeMapping(padapter, bWIFICfg);
 611                 break;
 612         case 1:
 613                 _OneOutPipeMapping(padapter);
 614                 break;
 615         default:
 616                 result = false;
 617                 break;
 618         }
 619
 620         return result;
 621
 622 }
 623
 624 void hal_init_macaddr(struct adapter *adapter)
 625 {
 626         rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
 627 }
 628
 629 void rtw_init_hal_com_default_value(struct adapter *Adapter)
 630 {
 631         struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
 632
 633         pHalData->AntDetection = 1;
 634 }
 635
 636 /*
 637 * C2H event format:
 638 * Field  TRIGGER                CONTENT    CMD_SEQ      CMD_LEN          CMD_ID
 639 * BITS   [127:120]      [119:16]      [15:8]              [7:4]            [3:0]
 640 */
 641
 642 void c2h_evt_clear(struct adapter *adapter)
 643 {
 644         rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
 645 }
 646
 647 /*
 648 * C2H event format:
 649 * Field    TRIGGER    CMD_LEN    CONTENT    CMD_SEQ    CMD_ID
 650 * BITS    [127:120]   [119:112]    [111:16]          [15:8]         [7:0]
 651 */
 652 s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf)
 653 {
 654         s32 ret = _FAIL;
 655         struct c2h_evt_hdr_88xx *c2h_evt;
 656         int i;
 657         u8 trigger;
 658
 659         if (!buf)
 660                 goto exit;
 661
 662         trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
 663
 664         if (trigger == C2H_EVT_HOST_CLOSE)
 665                 goto exit; /* Not ready */
 666         else if (trigger != C2H_EVT_FW_CLOSE)
 667                 goto clear_evt; /* Not a valid value */
 668
 669         c2h_evt = (struct c2h_evt_hdr_88xx *)buf;
 670
 671         memset(c2h_evt, 0, 16);
 672
 673         c2h_evt->id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
 674         c2h_evt->seq = rtw_read8(adapter, REG_C2HEVT_CMD_SEQ_88XX);
 675         c2h_evt->plen = rtw_read8(adapter, REG_C2HEVT_CMD_LEN_88XX);
 676
 677         /* Read the content */
 678         for (i = 0; i < c2h_evt->plen; i++)
 679                 c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i);
 680
 681         ret = _SUCCESS;
 682
 683 clear_evt:
 684         /*
 685         * Clear event to notify FW we have read the command.
 686         * If this field isn't clear, the FW won't update the next command message.
 687         */
 688         c2h_evt_clear(adapter);
 689 exit:
 690         return ret;
 691 }
 692
 693 u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type)
 694 {
 695         return (network_type & WIRELESS_11B) ? RATEID_IDX_B : RATEID_IDX_G;
 696 }
 697
 698 void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta)
 699 {
 700         u8 i, rf_type, limit;
 701         u32 tx_ra_bitmap;
 702
 703         if (!psta)
 704                 return;
 705
 706         tx_ra_bitmap = 0;
 707
 708         /* b/g mode ra_bitmap */
 709         for (i = 0; i < sizeof(psta->bssrateset); i++) {
 710                 if (psta->bssrateset[i])
 711                         tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f);
 712         }
 713
 714         /* n mode ra_bitmap */
 715         if (psta->htpriv.ht_option) {
 716                 rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
 717                 if (rf_type == RF_2T2R)
 718                         limit = 16; /*  2R */
 719                 else
 720                         limit = 8; /*   1R */
 721
 722                 for (i = 0; i < limit; i++) {
 723                         if (psta->htpriv.ht_cap.mcs.rx_mask[i/8] & BIT(i%8))
 724                                 tx_ra_bitmap |= BIT(i+12);
 725                 }
 726         }
 727
 728         psta->ra_mask = tx_ra_bitmap;
 729         psta->init_rate = get_highest_rate_idx(tx_ra_bitmap)&0x3f;
 730 }
 731
 732 void hw_var_port_switch(struct adapter *adapter)
 733 {
 734 }
 735
 736 void SetHwReg(struct adapter *adapter, u8 variable, u8 *val)
 737 {
 738         struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
 739         struct dm_odm_t *odm = &(hal_data->odmpriv);
 740
 741         switch (variable) {
 742         case HW_VAR_PORT_SWITCH:
 743                 hw_var_port_switch(adapter);
 744                 break;
 745         case HW_VAR_INIT_RTS_RATE:
 746                 rtw_warn_on(1);
 747                 break;
 748         case HW_VAR_SEC_CFG:
 749         {
 750                 u16 reg_scr;
 751
 752                 reg_scr = rtw_read16(adapter, REG_SECCFG);
 753                 rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable);
 754         }
 755                 break;
 756         case HW_VAR_SEC_DK_CFG:
 757         {
 758                 struct security_priv *sec = &adapter->securitypriv;
 759                 u8 reg_scr = rtw_read8(adapter, REG_SECCFG);
 760
 761                 if (val) { /* Enable default key related setting */
 762                         reg_scr |= SCR_TXBCUSEDK;
 763                         if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
 764                                 reg_scr |= (SCR_RxUseDK|SCR_TxUseDK);
 765                 } else /* Disable default key related setting */
 766                         reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK);
 767
 768                 rtw_write8(adapter, REG_SECCFG, reg_scr);
 769         }
 770                 break;
 771         case HW_VAR_DM_FLAG:
 772                 odm->SupportAbility = *((u32 *)val);
 773                 break;
 774         case HW_VAR_DM_FUNC_OP:
 775                 if (*((u8 *)val) == true) {
 776                         /* save dm flag */
 777                         odm->BK_SupportAbility = odm->SupportAbility;
 778                 } else {
 779                         /* restore dm flag */
 780                         odm->SupportAbility = odm->BK_SupportAbility;
 781                 }
 782                 break;
 783         case HW_VAR_DM_FUNC_SET:
 784                 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
 785                         struct dm_priv *dm = &hal_data->dmpriv;
 786                         dm->DMFlag = dm->InitDMFlag;
 787                         odm->SupportAbility = dm->InitODMFlag;
 788                 } else {
 789                         odm->SupportAbility |= *((u32 *)val);
 790                 }
 791                 break;
 792         case HW_VAR_DM_FUNC_CLR:
 793                 /*
 794                 * input is already a mask to clear function
 795                 * don't invert it again! George, Lucas@20130513
 796                 */
 797                 odm->SupportAbility &= *((u32 *)val);
 798                 break;
 799         case HW_VAR_AMPDU_MIN_SPACE:
 800                 /* TODO - Is something needed here? */
 801                 break;
 802         case HW_VAR_WIRELESS_MODE:
 803                 /* TODO - Is something needed here? */
 804                 break;
 805         default:
 806                 netdev_dbg(adapter->pnetdev,
 807                            FUNC_ADPT_FMT " variable(%d) not defined!\n",
 808                            FUNC_ADPT_ARG(adapter), variable);
 809                 break;
 810         }
 811 }
 812
 813 void GetHwReg(struct adapter *adapter, u8 variable, u8 *val)
 814 {
 815         struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
 816         struct dm_odm_t *odm = &(hal_data->odmpriv);
 817
 818         switch (variable) {
 819         case HW_VAR_BASIC_RATE:
 820                 *((u16 *)val) = hal_data->BasicRateSet;
 821                 break;
 822         case HW_VAR_DM_FLAG:
 823                 *((u32 *)val) = odm->SupportAbility;
 824                 break;
 825         case HW_VAR_RF_TYPE:
 826                 *((u8 *)val) = hal_data->rf_type;
 827                 break;
 828         default:
 829                 netdev_dbg(adapter->pnetdev,
 830                            FUNC_ADPT_FMT " variable(%d) not defined!\n",
 831                            FUNC_ADPT_ARG(adapter), variable);
 832                 break;
 833         }
 834 }
 835
 836
 837
 838
 839 u8 SetHalDefVar(
 840         struct adapter *adapter, enum hal_def_variable variable, void *value
 841 )
 842 {
 843         struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
 844         struct dm_odm_t *odm = &(hal_data->odmpriv);
 845         u8 bResult = _SUCCESS;
 846
 847         switch (variable) {
 848         case HAL_DEF_DBG_RX_INFO_DUMP:
 849
 850                 if (odm->bLinked) {
 851                         #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
 852                         rtw_dump_raw_rssi_info(adapter);
 853                         #endif
 854                 }
 855                 break;
 856         case HW_DEF_ODM_DBG_FLAG:
 857                 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_COMP, *((u64 *)value));
 858                 break;
 859         case HW_DEF_ODM_DBG_LEVEL:
 860                 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_LEVEL, *((u32 *)value));
 861                 break;
 862         case HAL_DEF_DBG_DM_FUNC:
 863         {
 864                 u8 dm_func = *((u8 *)value);
 865                 struct dm_priv *dm = &hal_data->dmpriv;
 866
 867                 if (dm_func == 0) { /* disable all dynamic func */
 868                         odm->SupportAbility = DYNAMIC_FUNC_DISABLE;
 869                 } else if (dm_func == 1) {/* disable DIG */
 870                         odm->SupportAbility  &= (~DYNAMIC_BB_DIG);
 871                 } else if (dm_func == 2) {/* disable High power */
 872                         odm->SupportAbility  &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
 873                 } else if (dm_func == 3) {/* disable tx power tracking */
 874                         odm->SupportAbility  &= (~DYNAMIC_RF_CALIBRATION);
 875                 } else if (dm_func == 4) {/* disable BT coexistence */
 876                         dm->DMFlag &= (~DYNAMIC_FUNC_BT);
 877                 } else if (dm_func == 5) {/* disable antenna diversity */
 878                         odm->SupportAbility  &= (~DYNAMIC_BB_ANT_DIV);
 879                 } else if (dm_func == 6) {/* turn on all dynamic func */
 880                         if (!(odm->SupportAbility  & DYNAMIC_BB_DIG)) {
 881                                 struct dig_t    *pDigTable = &odm->DM_DigTable;
 882                                 pDigTable->CurIGValue = rtw_read8(adapter, 0xc50);
 883                         }
 884                         dm->DMFlag |= DYNAMIC_FUNC_BT;
 885                         odm->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
 886                 }
 887         }
 888                 break;
 889         case HAL_DEF_DBG_DUMP_RXPKT:
 890                 hal_data->bDumpRxPkt = *((u8 *)value);
 891                 break;
 892         case HAL_DEF_DBG_DUMP_TXPKT:
 893                 hal_data->bDumpTxPkt = *((u8 *)value);
 894                 break;
 895         case HAL_DEF_ANT_DETECT:
 896                 hal_data->AntDetection = *((u8 *)value);
 897                 break;
 898         default:
 899                 netdev_dbg(adapter->pnetdev,
 900                            "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n",
 901                            __func__, variable);
 902                 bResult = _FAIL;
 903                 break;
 904         }
 905
 906         return bResult;
 907 }
 908
 909 u8 GetHalDefVar(
 910         struct adapter *adapter, enum hal_def_variable variable, void *value
 911 )
 912 {
 913         struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
 914         u8 bResult = _SUCCESS;
 915
 916         switch (variable) {
 917         case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
 918                 {
 919                         struct mlme_priv *pmlmepriv;
 920                         struct sta_priv *pstapriv;
 921                         struct sta_info *psta;
 922
 923                         pmlmepriv = &adapter->mlmepriv;
 924                         pstapriv = &adapter->stapriv;
 925                         psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.mac_address);
 926                         if (psta)
 927                                 *((int *)value) = psta->rssi_stat.UndecoratedSmoothedPWDB;
 928                 }
 929                 break;
 930         case HAL_DEF_DBG_DM_FUNC:
 931                 *((u32 *)value) = hal_data->odmpriv.SupportAbility;
 932                 break;
 933         case HAL_DEF_DBG_DUMP_RXPKT:
 934                 *((u8 *)value) = hal_data->bDumpRxPkt;
 935                 break;
 936         case HAL_DEF_DBG_DUMP_TXPKT:
 937                 *((u8 *)value) = hal_data->bDumpTxPkt;
 938                 break;
 939         case HAL_DEF_ANT_DETECT:
 940                 *((u8 *)value) = hal_data->AntDetection;
 941                 break;
 942         case HAL_DEF_MACID_SLEEP:
 943                 *(u8 *)value = false;
 944                 break;
 945         case HAL_DEF_TX_PAGE_SIZE:
 946                 *((u32 *)value) = PAGE_SIZE_128;
 947                 break;
 948         default:
 949                 netdev_dbg(adapter->pnetdev,
 950                            "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n",
 951                            __func__, variable);
 952                 bResult = _FAIL;
 953                 break;
 954         }
 955
 956         return bResult;
 957 }
 958
 959 void GetHalODMVar(
 960         struct adapter *Adapter,
 961         enum hal_odm_variable eVariable,
 962         void *pValue1,
 963         void *pValue2
 964 )
 965 {
 966         switch (eVariable) {
 967         default:
 968                 break;
 969         }
 970 }
 971
 972 void SetHalODMVar(
 973         struct adapter *Adapter,
 974         enum hal_odm_variable eVariable,
 975         void *pValue1,
 976         bool bSet
 977 )
 978 {
 979         struct hal_com_data     *pHalData = GET_HAL_DATA(Adapter);
 980         struct dm_odm_t *podmpriv = &pHalData->odmpriv;
 981         /* _irqL irqL; */
 982         switch (eVariable) {
 983         case HAL_ODM_STA_INFO:
 984                 {
 985                         struct sta_info *psta = pValue1;
 986                         if (bSet) {
 987                                 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
 988                         } else {
 989                                 /* spin_lock_bh(&pHalData->odm_stainfo_lock); */
 990                                 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
 991
 992                                 /* spin_unlock_bh(&pHalData->odm_stainfo_lock); */
 993                     }
 994                 }
 995                 break;
 996         case HAL_ODM_P2P_STATE:
 997                         ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
 998                 break;
 999         case HAL_ODM_WIFI_DISPLAY_STATE:
1000                         ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
1001                 break;
1002
1003         default:
1004                 break;
1005         }
1006 }
1007
1008
1009 bool eqNByte(u8 *str1, u8 *str2, u32 num)
1010 {
1011         if (num == 0)
1012                 return false;
1013         while (num > 0) {
1014                 num--;
1015                 if (str1[num] != str2[num])
1016                         return false;
1017         }
1018         return true;
1019 }
1020
1021 /*  */
1022 /*      Description: */
1023 /*              Return true if chTmp is represent for hex digit and */
1024 /*              false otherwise. */
1025 /*  */
1026 /*  */
1027 bool IsHexDigit(char chTmp)
1028 {
1029         if (
1030                 (chTmp >= '0' && chTmp <= '9') ||
1031                 (chTmp >= 'a' && chTmp <= 'f') ||
1032                 (chTmp >= 'A' && chTmp <= 'F')
1033         )
1034                 return true;
1035         else
1036                 return false;
1037 }
1038
1039
1040 /*  */
1041 /*      Description: */
1042 /*              Translate a character to hex digit. */
1043 /*  */
1044 u32 MapCharToHexDigit(char chTmp)
1045 {
1046         if (chTmp >= '0' && chTmp <= '9')
1047                 return chTmp - '0';
1048         else if (chTmp >= 'a' && chTmp <= 'f')
1049                 return 10 + (chTmp - 'a');
1050         else if (chTmp >= 'A' && chTmp <= 'F')
1051                 return 10 + (chTmp - 'A');
1052         else
1053                 return 0;
1054 }
1055
1056
1057
1058 /*      Description: */
1059 /*              Parse hex number from the string pucStr. */
1060 bool GetHexValueFromString(char *szStr, u32 *pu4bVal, u32 *pu4bMove)
1061 {
1062         char *szScan = szStr;
1063
1064         /*  Check input parameter. */
1065         if (!szStr || !pu4bVal || !pu4bMove)
1066                 return false;
1067
1068         /*  Initialize output. */
1069         *pu4bMove = 0;
1070         *pu4bVal = 0;
1071
1072         /*  Skip leading space. */
1073         while (*szScan != '\0' && (*szScan == ' ' || *szScan == '\t')) {
1074                 szScan++;
1075                 (*pu4bMove)++;
1076         }
1077
1078         /*  Skip leading '0x' or '0X'. */
1079         if (*szScan == '0' && (*(szScan+1) == 'x' || *(szScan+1) == 'X')) {
1080                 szScan += 2;
1081                 (*pu4bMove) += 2;
1082         }
1083
1084         /*  Check if szScan is now pointer to a character for hex digit, */
1085         /*  if not, it means this is not a valid hex number. */
1086         if (!IsHexDigit(*szScan))
1087                 return false;
1088
1089         /*  Parse each digit. */
1090         do {
1091                 (*pu4bVal) <<= 4;
1092                 *pu4bVal += MapCharToHexDigit(*szScan);
1093
1094                 szScan++;
1095                 (*pu4bMove)++;
1096         } while (IsHexDigit(*szScan));
1097
1098         return true;
1099 }
1100
1101 bool GetFractionValueFromString(
1102         char *szStr, u8 *pInteger, u8 *pFraction, u32 *pu4bMove
1103 )
1104 {
1105         char *szScan = szStr;
1106
1107         /*  Initialize output. */
1108         *pu4bMove = 0;
1109         *pInteger = 0;
1110         *pFraction = 0;
1111
1112         /*  Skip leading space. */
1113         while (*szScan != '\0' &&       (*szScan == ' ' || *szScan == '\t')) {
1114                 ++szScan;
1115                 ++(*pu4bMove);
1116         }
1117
1118         /*  Parse each digit. */
1119         do {
1120                 (*pInteger) *= 10;
1121                 *pInteger += (*szScan - '0');
1122
1123                 ++szScan;
1124                 ++(*pu4bMove);
1125
1126                 if (*szScan == '.') {
1127                         ++szScan;
1128                         ++(*pu4bMove);
1129
1130                         if (*szScan < '0' || *szScan > '9')
1131                                 return false;
1132                         else {
1133                                 *pFraction = *szScan - '0';
1134                                 ++szScan;
1135                                 ++(*pu4bMove);
1136                                 return true;
1137                         }
1138                 }
1139         } while (*szScan >= '0' && *szScan <= '9');
1140
1141         return true;
1142 }
1143
1144 /*  */
1145 /*      Description: */
1146 /*              Return true if szStr is comment out with leading "//". */
1147 /*  */
1148 bool IsCommentString(char *szStr)
1149 {
1150         if (*szStr == '/' && *(szStr+1) == '/')
1151                 return true;
1152         else
1153                 return false;
1154 }
1155
1156 bool GetU1ByteIntegerFromStringInDecimal(char *Str, u8 *pInt)
1157 {
1158         u16 i = 0;
1159         *pInt = 0;
1160
1161         while (Str[i] != '\0') {
1162                 if (Str[i] >= '0' && Str[i] <= '9') {
1163                         *pInt *= 10;
1164                         *pInt += (Str[i] - '0');
1165                 } else
1166                         return false;
1167
1168                 ++i;
1169         }
1170
1171         return true;
1172 }
1173
1174 /*  <20121004, Kordan> For example,
1175  *  ParseQualifiedString(inString, 0, outString, '[', ']') gets "Kordan" from
1176  *  a string "Hello [Kordan]".
1177  *  If RightQualifier does not exist, it will hang in the while loop
1178  */
1179 bool ParseQualifiedString(
1180         char *In, u32 *Start, char *Out, char LeftQualifier, char RightQualifier
1181 )
1182 {
1183         u32 i = 0, j = 0;
1184         char c = In[(*Start)++];
1185
1186         if (c != LeftQualifier)
1187                 return false;
1188
1189         i = (*Start);
1190         while ((c = In[(*Start)++]) != RightQualifier)
1191                 ; /*  find ']' */
1192         j = (*Start) - 2;
1193         strncpy((char *)Out, (const char *)(In+i), j-i+1);
1194
1195         return true;
1196 }
1197
1198 bool isAllSpaceOrTab(u8 *data, u8 size)
1199 {
1200         u8 cnt = 0, NumOfSpaceAndTab = 0;
1201
1202         while (size > cnt) {
1203                 if (data[cnt] == ' ' || data[cnt] == '\t' || data[cnt] == '\0')
1204                         ++NumOfSpaceAndTab;
1205
1206                 ++cnt;
1207         }
1208
1209         return size == NumOfSpaceAndTab;
1210 }
1211
1212
1213 void rtw_hal_check_rxfifo_full(struct adapter *adapter)
1214 {
1215         struct dvobj_priv *psdpriv = adapter->dvobj;
1216         struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
1217         int save_cnt = false;
1218
1219         /* switch counter to RX fifo */
1220         /* printk("8723b or 8192e , MAC_667 set 0xf0\n"); */
1221         rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xf0);
1222         save_cnt = true;
1223         /* todo: other chips */
1224
1225         if (save_cnt) {
1226                 /* rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); */
1227                 pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow;
1228                 pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT);
1229                 pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow;
1230         }
1231 }
1232
1233 void linked_info_dump(struct adapter *padapter, u8 benable)
1234 {
1235         struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
1236
1237         if (padapter->bLinkInfoDump == benable)
1238                 return;
1239
1240         if (benable) {
1241                 pwrctrlpriv->org_power_mgnt = pwrctrlpriv->power_mgnt;/* keep org value */
1242                 rtw_pm_set_lps(padapter, PS_MODE_ACTIVE);
1243
1244                 pwrctrlpriv->ips_org_mode = pwrctrlpriv->ips_mode;/* keep org value */
1245                 rtw_pm_set_ips(padapter, IPS_NONE);
1246         } else {
1247                 rtw_pm_set_ips(padapter, pwrctrlpriv->ips_org_mode);
1248
1249                 rtw_pm_set_lps(padapter, pwrctrlpriv->ips_org_mode);
1250         }
1251         padapter->bLinkInfoDump = benable;
1252 }
1253
1254 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
1255 void rtw_get_raw_rssi_info(void *sel, struct adapter *padapter)
1256 {
1257         u8 isCCKrate, rf_path;
1258         struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
1259         struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
1260
1261         netdev_dbg(padapter->pnetdev,
1262                    "RxRate = %s, PWDBALL = %d(%%), rx_pwr_all = %d(dBm)\n",
1263                    HDATA_RATE(psample_pkt_rssi->data_rate),
1264                    psample_pkt_rssi->pwdball, psample_pkt_rssi->pwr_all);
1265
1266         isCCKrate = psample_pkt_rssi->data_rate <= DESC_RATE11M;
1267
1268         if (isCCKrate)
1269                 psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball;
1270
1271         for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) {
1272                 netdev_dbg(padapter->pnetdev,
1273                            "RF_PATH_%d =>signal_strength:%d(%%), signal_quality:%d(%%)\n",
1274                            rf_path,
1275                            psample_pkt_rssi->mimo_signal_strength[rf_path],
1276                            psample_pkt_rssi->mimo_signal_quality[rf_path]);
1277
1278                 if (!isCCKrate) {
1279                         netdev_dbg(padapter->pnetdev,
1280                                    "\trx_ofdm_pwr:%d(dBm), rx_ofdm_snr:%d(dB)\n",
1281                                    psample_pkt_rssi->ofdm_pwr[rf_path],
1282                                    psample_pkt_rssi->ofdm_snr[rf_path]);
1283                 }
1284         }
1285 }
1286
1287 void rtw_dump_raw_rssi_info(struct adapter *padapter)
1288 {
1289         u8 isCCKrate, rf_path;
1290         struct hal_com_data *pHalData =  GET_HAL_DATA(padapter);
1291         struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
1292
1293         isCCKrate = psample_pkt_rssi->data_rate <= DESC_RATE11M;
1294
1295         if (isCCKrate)
1296                 psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball;
1297
1298         for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) {
1299                 if (!isCCKrate) {
1300                         printk(", rx_ofdm_pwr:%d(dBm), rx_ofdm_snr:%d(dB)\n",
1301                         psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]);
1302                 } else {
1303                         printk("\n");
1304                 }
1305         }
1306 }
1307
1308 void rtw_store_phy_info(struct adapter *padapter, union recv_frame *prframe)
1309 {
1310         u8 isCCKrate, rf_path;
1311         struct hal_com_data *pHalData =  GET_HAL_DATA(padapter);
1312         struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
1313
1314         struct odm_phy_info *pPhyInfo  = (PODM_PHY_INFO_T)(&pattrib->phy_info);
1315         struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
1316
1317         psample_pkt_rssi->data_rate = pattrib->data_rate;
1318         isCCKrate = pattrib->data_rate <= DESC_RATE11M;
1319
1320         psample_pkt_rssi->pwdball = pPhyInfo->rx_pwd_ba11;
1321         psample_pkt_rssi->pwr_all = pPhyInfo->recv_signal_power;
1322
1323         for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) {
1324                 psample_pkt_rssi->mimo_signal_strength[rf_path] = pPhyInfo->rx_mimo_signal_strength[rf_path];
1325                 psample_pkt_rssi->mimo_signal_quality[rf_path] = pPhyInfo->rx_mimo_signal_quality[rf_path];
1326                 if (!isCCKrate) {
1327                         psample_pkt_rssi->ofdm_pwr[rf_path] = pPhyInfo->RxPwr[rf_path];
1328                         psample_pkt_rssi->ofdm_snr[rf_path] = pPhyInfo->RxSNR[rf_path];
1329                 }
1330         }
1331 }
1332 #endif
1333
1334 static u32 Array_kfreemap[] = {
1335         0xf8, 0xe,
1336         0xf6, 0xc,
1337         0xf4, 0xa,
1338         0xf2, 0x8,
1339         0xf0, 0x6,
1340         0xf3, 0x4,
1341         0xf5, 0x2,
1342         0xf7, 0x0,
1343         0xf9, 0x0,
1344         0xfc, 0x0,
1345 };
1346
1347 void rtw_bb_rf_gain_offset(struct adapter *padapter)
1348 {
1349         u8 value = padapter->eeprompriv.EEPROMRFGainOffset;
1350         u32 res, i = 0;
1351         u32 *Array = Array_kfreemap;
1352         u32 v1 = 0, v2 = 0, target = 0;
1353
1354         if (value & BIT4) {
1355                 if (padapter->eeprompriv.EEPROMRFGainVal != 0xff) {
1356                         res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
1357                         res &= 0xfff87fff;
1358                         /* res &= 0xfff87fff; */
1359                         for (i = 0; i < ARRAY_SIZE(Array_kfreemap); i += 2) {
1360                                 v1 = Array[i];
1361                                 v2 = Array[i+1];
1362                                 if (v1 == padapter->eeprompriv.EEPROMRFGainVal) {
1363                                         target = v2;
1364                                         break;
1365                                 }
1366                         }
1367                         PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target);
1368
1369                         /* res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f)<< 15; */
1370                         /* rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, RF_GAIN_OFFSET_MASK, res); */
1371                         res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
1372                 }
1373         }
1374 }