drivers/staging/rtl8712/rtl8712_ratectrl_regdef.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
   5  *
   6  * Modifications for inclusion into the Linux staging tree are
   7  * Copyright(c) 2010 Larry Finger. All rights reserved.
   8  *
   9  * Contact information:
  10  * WLAN FAE <wlanfae@realtek.com>
  11  * Larry Finger <Larry.Finger@lwfinger.net>
  12  *
  13  ******************************************************************************/
  14 #ifndef __RTL8712_RATECTRL_REGDEF_H__
  15 #define __RTL8712_RATECTRL_REGDEF_H__
  16
  17 #define INIMCS_SEL                      (RTL8712_RATECTRL_ + 0x00)
  18 #define INIRTSMCS_SEL           (RTL8712_RATECTRL_ + 0x20)
  19 #define RRSR                            (RTL8712_RATECTRL_ + 0x21)
  20 #define ARFR0                           (RTL8712_RATECTRL_ + 0x24)
  21 #define ARFR1                           (RTL8712_RATECTRL_ + 0x28)
  22 #define ARFR2                           (RTL8712_RATECTRL_ + 0x2C)
  23 #define ARFR3                           (RTL8712_RATECTRL_ + 0x30)
  24 #define ARFR4                           (RTL8712_RATECTRL_ + 0x34)
  25 #define ARFR5                           (RTL8712_RATECTRL_ + 0x38)
  26 #define ARFR6                           (RTL8712_RATECTRL_ + 0x3C)
  27 #define ARFR7                           (RTL8712_RATECTRL_ + 0x40)
  28 #define AGGLEN_LMT_H            (RTL8712_RATECTRL_ + 0x47)
  29 #define AGGLEN_LMT_L            (RTL8712_RATECTRL_ + 0x48)
  30 #define DARFRC                          (RTL8712_RATECTRL_ + 0x50)
  31 #define RARFRC                          (RTL8712_RATECTRL_ + 0x58)
  32 #define MCS_TXAGC0                      (RTL8712_RATECTRL_ + 0x60)
  33 #define MCS_TXAGC1                      (RTL8712_RATECTRL_ + 0x61)
  34 #define MCS_TXAGC2                      (RTL8712_RATECTRL_ + 0x62)
  35 #define MCS_TXAGC3                      (RTL8712_RATECTRL_ + 0x63)
  36 #define MCS_TXAGC4                      (RTL8712_RATECTRL_ + 0x64)
  37 #define MCS_TXAGC5                      (RTL8712_RATECTRL_ + 0x65)
  38 #define MCS_TXAGC6                      (RTL8712_RATECTRL_ + 0x66)
  39 #define MCS_TXAGC7                      (RTL8712_RATECTRL_ + 0x67)
  40 #define CCK_TXAGC                       (RTL8712_RATECTRL_ + 0x68)
  41
  42
  43 #endif  /*__RTL8712_RATECTRL_REGDEF_H__*/
  44