drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c

   1 /******************************************************************************
   2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   3  *
   4  * Based on the r8180 driver, which is:
   5  * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of version 2 of the GNU General Public License as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along with
  16  * this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  18  *
  19  * The full GNU General Public License is included in this distribution in the
  20  * file called LICENSE.
  21  *
  22  * Contact Information:
  23  * wlanfae <wlanfae@realtek.com>
  24 ******************************************************************************/
  25 #include "rtl_core.h"
  26 #include "r8192E_phy.h"
  27 #include "r8192E_phyreg.h"
  28 #include "r8190P_rtl8256.h"
  29 #include "r8192E_cmdpkt.h"
  30 #include "rtl_dm.h"
  31 #include "rtl_wx.h"
  32
  33 static int WDCAPARA_ADD[] = {EDCAPARA_BE, EDCAPARA_BK, EDCAPARA_VI, EDCAPARA_VO};
  34
  35 void rtl8192e_start_beacon(struct net_device *dev)
  36 {
  37         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
  38         struct rtllib_network *net = &priv->rtllib->current_network;
  39         u16 BcnTimeCfg = 0;
  40         u16 BcnCW = 6;
  41         u16 BcnIFS = 0xf;
  42
  43         DMESG("Enabling beacon TX");
  44         rtl8192_irq_disable(dev);
  45
  46         write_nic_word(dev, ATIMWND, 2);
  47
  48         write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
  49         write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
  50         write_nic_word(dev, BCN_DMATIME, 256);
  51
  52         write_nic_byte(dev, BCN_ERR_THRESH, 100);
  53
  54         BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
  55         BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
  56         write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
  57         rtl8192_irq_enable(dev);
  58 }
  59
  60 static void rtl8192e_update_msr(struct net_device *dev)
  61 {
  62         struct r8192_priv *priv = rtllib_priv(dev);
  63         u8 msr;
  64         enum led_ctl_mode LedAction = LED_CTL_NO_LINK;
  65         msr  = read_nic_byte(dev, MSR);
  66         msr &= ~MSR_LINK_MASK;
  67
  68         switch (priv->rtllib->iw_mode) {
  69         case IW_MODE_INFRA:
  70                 if (priv->rtllib->state == RTLLIB_LINKED)
  71                         msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT);
  72                 else
  73                         msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
  74                 LedAction = LED_CTL_LINK;
  75                 break;
  76         case IW_MODE_ADHOC:
  77                 if (priv->rtllib->state == RTLLIB_LINKED)
  78                         msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT);
  79                 else
  80                         msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
  81                 break;
  82         case IW_MODE_MASTER:
  83                 if (priv->rtllib->state == RTLLIB_LINKED)
  84                         msr |= (MSR_LINK_MASTER << MSR_LINK_SHIFT);
  85                 else
  86                         msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
  87                 break;
  88         default:
  89                 break;
  90         }
  91
  92         write_nic_byte(dev, MSR, msr);
  93         if (priv->rtllib->LedControlHandler)
  94                 priv->rtllib->LedControlHandler(dev, LedAction);
  95 }
  96
  97 void rtl8192e_SetHwReg(struct net_device *dev, u8 variable, u8 *val)
  98 {
  99         struct r8192_priv *priv = rtllib_priv(dev);
 100
 101         switch (variable) {
 102         case HW_VAR_BSSID:
 103                 write_nic_dword(dev, BSSIDR, ((u32 *)(val))[0]);
 104                 write_nic_word(dev, BSSIDR+2, ((u16 *)(val+2))[0]);
 105                 break;
 106
 107         case HW_VAR_MEDIA_STATUS:
 108         {
 109                 enum rt_op_mode OpMode = *((enum rt_op_mode *)(val));
 110                 enum led_ctl_mode LedAction = LED_CTL_NO_LINK;
 111                 u8              btMsr = read_nic_byte(dev, MSR);
 112
 113                 btMsr &= 0xfc;
 114
 115                 switch (OpMode) {
 116                 case RT_OP_MODE_INFRASTRUCTURE:
 117                         btMsr |= MSR_INFRA;
 118                         LedAction = LED_CTL_LINK;
 119                         break;
 120
 121                 case RT_OP_MODE_IBSS:
 122                         btMsr |= MSR_ADHOC;
 123                         break;
 124
 125                 case RT_OP_MODE_AP:
 126                         btMsr |= MSR_AP;
 127                         LedAction = LED_CTL_LINK;
 128                         break;
 129
 130                 default:
 131                         btMsr |= MSR_NOLINK;
 132                         break;
 133                 }
 134
 135                 write_nic_byte(dev, MSR, btMsr);
 136
 137         }
 138         break;
 139
 140         case HW_VAR_CECHK_BSSID:
 141         {
 142                 u32     RegRCR, Type;
 143
 144                 Type = ((u8 *)(val))[0];
 145                 RegRCR = read_nic_dword(dev, RCR);
 146                 priv->ReceiveConfig = RegRCR;
 147
 148                 if (Type == true)
 149                         RegRCR |= (RCR_CBSSID);
 150                 else if (Type == false)
 151                         RegRCR &= (~RCR_CBSSID);
 152
 153                 write_nic_dword(dev, RCR, RegRCR);
 154                 priv->ReceiveConfig = RegRCR;
 155
 156         }
 157         break;
 158
 159         case HW_VAR_SLOT_TIME:
 160
 161                 priv->slot_time = val[0];
 162                 write_nic_byte(dev, SLOT_TIME, val[0]);
 163
 164                 break;
 165
 166         case HW_VAR_ACK_PREAMBLE:
 167         {
 168                 u32 regTmp;
 169                 priv->short_preamble = (bool)(*(u8 *)val);
 170                 regTmp = priv->basic_rate;
 171                 if (priv->short_preamble)
 172                         regTmp |= BRSR_AckShortPmb;
 173                 write_nic_dword(dev, RRSR, regTmp);
 174                 break;
 175         }
 176
 177         case HW_VAR_CPU_RST:
 178                 write_nic_dword(dev, CPU_GEN, ((u32 *)(val))[0]);
 179                 break;
 180
 181         case HW_VAR_AC_PARAM:
 182         {
 183                 u8      pAcParam = *((u8 *)val);
 184                 u32     eACI = pAcParam;
 185                 u8              u1bAIFS;
 186                 u32             u4bAcParam;
 187                 u8 mode = priv->rtllib->mode;
 188                 struct rtllib_qos_parameters *qos_parameters =
 189                          &priv->rtllib->current_network.qos_data.parameters;
 190
 191                 u1bAIFS = qos_parameters->aifs[pAcParam] *
 192                           ((mode&(IEEE_G|IEEE_N_24G)) ? 9 : 20) + aSifsTime;
 193
 194                 dm_init_edca_turbo(dev);
 195
 196                 u4bAcParam = (((le16_to_cpu(
 197                                         qos_parameters->tx_op_limit[pAcParam])) <<
 198                              AC_PARAM_TXOP_LIMIT_OFFSET) |
 199                              ((le16_to_cpu(qos_parameters->cw_max[pAcParam])) <<
 200                              AC_PARAM_ECW_MAX_OFFSET) |
 201                              ((le16_to_cpu(qos_parameters->cw_min[pAcParam])) <<
 202                              AC_PARAM_ECW_MIN_OFFSET) |
 203                              (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
 204
 205                 RT_TRACE(COMP_DBG, "%s():HW_VAR_AC_PARAM eACI:%x:%x\n",
 206                          __func__, eACI, u4bAcParam);
 207                 switch (eACI) {
 208                 case AC1_BK:
 209                         write_nic_dword(dev, EDCAPARA_BK, u4bAcParam);
 210                         break;
 211
 212                 case AC0_BE:
 213                         write_nic_dword(dev, EDCAPARA_BE, u4bAcParam);
 214                         break;
 215
 216                 case AC2_VI:
 217                         write_nic_dword(dev, EDCAPARA_VI, u4bAcParam);
 218                         break;
 219
 220                 case AC3_VO:
 221                         write_nic_dword(dev, EDCAPARA_VO, u4bAcParam);
 222                         break;
 223
 224                 default:
 225                         printk(KERN_INFO "SetHwReg8185(): invalid ACI: %d !\n",
 226                                eACI);
 227                         break;
 228                 }
 229                 priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACM_CTRL,
 230                                               (u8 *)(&pAcParam));
 231                 break;
 232         }
 233
 234         case HW_VAR_ACM_CTRL:
 235         {
 236                 struct rtllib_qos_parameters *qos_parameters =
 237                          &priv->rtllib->current_network.qos_data.parameters;
 238                 u8 pAcParam = *((u8 *)val);
 239                 u32 eACI = pAcParam;
 240                 union aci_aifsn *pAciAifsn = (union aci_aifsn *) &
 241                                               (qos_parameters->aifs[0]);
 242                 u8 acm = pAciAifsn->f.acm;
 243                 u8 AcmCtrl = read_nic_byte(dev, AcmHwCtrl);
 244
 245                 RT_TRACE(COMP_DBG, "===========>%s():HW_VAR_ACM_CTRL:%x\n",
 246                          __func__, eACI);
 247                 AcmCtrl = AcmCtrl | ((priv->AcmMethod == 2) ? 0x0 : 0x1);
 248
 249                 if (acm) {
 250                         switch (eACI) {
 251                         case AC0_BE:
 252                                 AcmCtrl |= AcmHw_BeqEn;
 253                                 break;
 254
 255                         case AC2_VI:
 256                                 AcmCtrl |= AcmHw_ViqEn;
 257                                 break;
 258
 259                         case AC3_VO:
 260                                 AcmCtrl |= AcmHw_VoqEn;
 261                                 break;
 262
 263                         default:
 264                                 RT_TRACE(COMP_QOS, "SetHwReg8185(): [HW_VAR_"
 265                                          "ACM_CTRL] acm set failed: eACI is "
 266                                          "%d\n", eACI);
 267                                 break;
 268                         }
 269                 } else {
 270                         switch (eACI) {
 271                         case AC0_BE:
 272                                 AcmCtrl &= (~AcmHw_BeqEn);
 273                                 break;
 274
 275                         case AC2_VI:
 276                                 AcmCtrl &= (~AcmHw_ViqEn);
 277                                 break;
 278
 279                         case AC3_VO:
 280                                 AcmCtrl &= (~AcmHw_BeqEn);
 281                                 break;
 282
 283                         default:
 284                                 break;
 285                         }
 286                 }
 287
 288                 RT_TRACE(COMP_QOS, "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write"
 289                          " 0x%X\n", AcmCtrl);
 290                 write_nic_byte(dev, AcmHwCtrl, AcmCtrl);
 291                 break;
 292         }
 293
 294         case HW_VAR_SIFS:
 295                 write_nic_byte(dev, SIFS, val[0]);
 296                 write_nic_byte(dev, SIFS+1, val[0]);
 297                 break;
 298
 299         case HW_VAR_RF_TIMING:
 300         {
 301                 u8 Rf_Timing = *((u8 *)val);
 302                 write_nic_byte(dev, rFPGA0_RFTiming1, Rf_Timing);
 303                 break;
 304         }
 305
 306         default:
 307                 break;
 308         }
 309
 310 }
 311
 312 static void rtl8192_read_eeprom_info(struct net_device *dev)
 313 {
 314         struct r8192_priv *priv = rtllib_priv(dev);
 315
 316         u8 tempval;
 317         u8 ICVer8192, ICVer8256;
 318         u16 i, usValue, IC_Version;
 319         u16 EEPROMId;
 320         u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
 321         RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
 322
 323         EEPROMId = eprom_read(dev, 0);
 324         if (EEPROMId != RTL8190_EEPROM_ID) {
 325                 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n",
 326                          EEPROMId, RTL8190_EEPROM_ID);
 327                 priv->AutoloadFailFlag = true;
 328         } else {
 329                 priv->AutoloadFailFlag = false;
 330         }
 331
 332         if (!priv->AutoloadFailFlag) {
 333                 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
 334                 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
 335
 336                 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8;
 337                 priv->eeprom_CustomerID = (u8)(usValue & 0xff);
 338                 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
 339                 priv->eeprom_ChannelPlan = usValue&0xff;
 340                 IC_Version = ((usValue&0xff00)>>8);
 341
 342                 ICVer8192 = (IC_Version&0xf);
 343                 ICVer8256 = ((IC_Version&0xf0)>>4);
 344                 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
 345                 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
 346                 if (ICVer8192 == 0x2) {
 347                         if (ICVer8256 == 0x5)
 348                                 priv->card_8192_version = VERSION_8190_BE;
 349                 }
 350                 switch (priv->card_8192_version) {
 351                 case VERSION_8190_BD:
 352                 case VERSION_8190_BE:
 353                         break;
 354                 default:
 355                         priv->card_8192_version = VERSION_8190_BD;
 356                         break;
 357                 }
 358                 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n",
 359                           priv->card_8192_version);
 360         } else {
 361                 priv->card_8192_version = VERSION_8190_BD;
 362                 priv->eeprom_vid = 0;
 363                 priv->eeprom_did = 0;
 364                 priv->eeprom_CustomerID = 0;
 365                 priv->eeprom_ChannelPlan = 0;
 366                 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
 367         }
 368
 369         RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
 370         RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
 371         RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n",
 372                  priv->eeprom_CustomerID);
 373
 374         if (!priv->AutoloadFailFlag) {
 375                 for (i = 0; i < 6; i += 2) {
 376                         usValue = eprom_read(dev,
 377                                  (u16)((EEPROM_NODE_ADDRESS_BYTE_0 + i) >> 1));
 378                         *(u16 *)(&dev->dev_addr[i]) = usValue;
 379                 }
 380         } else {
 381                 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
 382         }
 383
 384         RT_TRACE(COMP_INIT, "Permanent Address = %pM\n",
 385                  dev->dev_addr);
 386
 387         if (priv->card_8192_version > VERSION_8190_BD)
 388                 priv->bTXPowerDataReadFromEEPORM = true;
 389         else
 390                 priv->bTXPowerDataReadFromEEPORM = false;
 391
 392         priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
 393
 394         if (priv->card_8192_version > VERSION_8190_BD) {
 395                 if (!priv->AutoloadFailFlag) {
 396                         tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff >>
 397                                               1))) & 0xff;
 398                         priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf;
 399
 400                         if (tempval&0x80)
 401                                 priv->rf_type = RF_1T2R;
 402                         else
 403                                 priv->rf_type = RF_2T4R;
 404                 } else {
 405                         priv->EEPROMLegacyHTTxPowerDiff = 0x04;
 406                 }
 407                 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
 408                         priv->EEPROMLegacyHTTxPowerDiff);
 409
 410                 if (!priv->AutoloadFailFlag)
 411                         priv->EEPROMThermalMeter = (u8)(((eprom_read(dev,
 412                                                    (EEPROM_ThermalMeter>>1))) &
 413                                                    0xff00)>>8);
 414                 else
 415                         priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
 416                 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n",
 417                          priv->EEPROMThermalMeter);
 418                 priv->TSSI_13dBm = priv->EEPROMThermalMeter * 100;
 419
 420                 if (priv->epromtype == EEPROM_93C46) {
 421                         if (!priv->AutoloadFailFlag) {
 422                                 usValue = eprom_read(dev,
 423                                           (EEPROM_TxPwDiff_CrystalCap >> 1));
 424                                 priv->EEPROMAntPwDiff = (usValue&0x0fff);
 425                                 priv->EEPROMCrystalCap = (u8)((usValue & 0xf000)
 426                                                          >> 12);
 427                         } else {
 428                                 priv->EEPROMAntPwDiff =
 429                                          EEPROM_Default_AntTxPowerDiff;
 430                                 priv->EEPROMCrystalCap =
 431                                          EEPROM_Default_TxPwDiff_CrystalCap;
 432                         }
 433                         RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n",
 434                                  priv->EEPROMAntPwDiff);
 435                         RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n",
 436                                  priv->EEPROMCrystalCap);
 437
 438                         for (i = 0; i < 14; i += 2) {
 439                                 if (!priv->AutoloadFailFlag)
 440                                         usValue = eprom_read(dev,
 441                                                   (u16)((EEPROM_TxPwIndex_CCK +
 442                                                   i) >> 1));
 443                                 else
 444                                         usValue = EEPROM_Default_TxPower;
 445                                 *((u16 *)(&priv->EEPROMTxPowerLevelCCK[i])) =
 446                                                                  usValue;
 447                                 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index"
 448                                          " %d = 0x%02x\n", i,
 449                                          priv->EEPROMTxPowerLevelCCK[i]);
 450                                 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index"
 451                                          " %d = 0x%02x\n", i+1,
 452                                          priv->EEPROMTxPowerLevelCCK[i+1]);
 453                         }
 454                         for (i = 0; i < 14; i += 2) {
 455                                 if (!priv->AutoloadFailFlag)
 456                                         usValue = eprom_read(dev,
 457                                                 (u16)((EEPROM_TxPwIndex_OFDM_24G
 458                                                 + i) >> 1));
 459                                 else
 460                                         usValue = EEPROM_Default_TxPower;
 461                                 *((u16 *)(&priv->EEPROMTxPowerLevelOFDM24G[i]))
 462                                                          = usValue;
 463                                 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level,"
 464                                          " Index %d = 0x%02x\n", i,
 465                                          priv->EEPROMTxPowerLevelOFDM24G[i]);
 466                                 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level,"
 467                                          " Index %d = 0x%02x\n", i + 1,
 468                                          priv->EEPROMTxPowerLevelOFDM24G[i+1]);
 469                         }
 470                 }
 471                 if (priv->epromtype == EEPROM_93C46) {
 472                         for (i = 0; i < 14; i++) {
 473                                 priv->TxPowerLevelCCK[i] =
 474                                          priv->EEPROMTxPowerLevelCCK[i];
 475                                 priv->TxPowerLevelOFDM24G[i] =
 476                                          priv->EEPROMTxPowerLevelOFDM24G[i];
 477                         }
 478                         priv->LegacyHTTxPowerDiff =
 479                                          priv->EEPROMLegacyHTTxPowerDiff;
 480                         priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff &
 481                                                     0xf);
 482                         priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff &
 483                                                     0xf0)>>4);
 484                         priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff &
 485                                                     0xf00)>>8);
 486                         priv->CrystalCap = priv->EEPROMCrystalCap;
 487                         priv->ThermalMeter[0] = (priv->EEPROMThermalMeter &
 488                                                  0xf);
 489                         priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter &
 490                                                  0xf0)>>4);
 491                 } else if (priv->epromtype == EEPROM_93C56) {
 492
 493                         for (i = 0; i < 3; i++) {
 494                                 priv->TxPowerLevelCCK_A[i] =
 495                                          priv->EEPROMRfACCKChnl1TxPwLevel[0];
 496                                 priv->TxPowerLevelOFDM24G_A[i] =
 497                                          priv->EEPROMRfAOfdmChnlTxPwLevel[0];
 498                                 priv->TxPowerLevelCCK_C[i] =
 499                                          priv->EEPROMRfCCCKChnl1TxPwLevel[0];
 500                                 priv->TxPowerLevelOFDM24G_C[i] =
 501                                          priv->EEPROMRfCOfdmChnlTxPwLevel[0];
 502                         }
 503                         for (i = 3; i < 9; i++) {
 504                                 priv->TxPowerLevelCCK_A[i]  =
 505                                          priv->EEPROMRfACCKChnl1TxPwLevel[1];
 506                                 priv->TxPowerLevelOFDM24G_A[i] =
 507                                          priv->EEPROMRfAOfdmChnlTxPwLevel[1];
 508                                 priv->TxPowerLevelCCK_C[i] =
 509                                          priv->EEPROMRfCCCKChnl1TxPwLevel[1];
 510                                 priv->TxPowerLevelOFDM24G_C[i] =
 511                                          priv->EEPROMRfCOfdmChnlTxPwLevel[1];
 512                         }
 513                         for (i = 9; i < 14; i++) {
 514                                 priv->TxPowerLevelCCK_A[i]  =
 515                                          priv->EEPROMRfACCKChnl1TxPwLevel[2];
 516                                 priv->TxPowerLevelOFDM24G_A[i] =
 517                                          priv->EEPROMRfAOfdmChnlTxPwLevel[2];
 518                                 priv->TxPowerLevelCCK_C[i] =
 519                                          priv->EEPROMRfCCCKChnl1TxPwLevel[2];
 520                                 priv->TxPowerLevelOFDM24G_C[i] =
 521                                          priv->EEPROMRfCOfdmChnlTxPwLevel[2];
 522                         }
 523                         for (i = 0; i < 14; i++)
 524                                 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A"
 525                                          "[%d] = 0x%x\n", i,
 526                                          priv->TxPowerLevelCCK_A[i]);
 527                         for (i = 0; i < 14; i++)
 528                                 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM"
 529                                          "24G_A[%d] = 0x%x\n", i,
 530                                          priv->TxPowerLevelOFDM24G_A[i]);
 531                         for (i = 0; i < 14; i++)
 532                                 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C"
 533                                          "[%d] = 0x%x\n", i,
 534                                          priv->TxPowerLevelCCK_C[i]);
 535                         for (i = 0; i < 14; i++)
 536                                 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM"
 537                                          "24G_C[%d] = 0x%x\n", i,
 538                                          priv->TxPowerLevelOFDM24G_C[i]);
 539                         priv->LegacyHTTxPowerDiff =
 540                                  priv->EEPROMLegacyHTTxPowerDiff;
 541                         priv->AntennaTxPwDiff[0] = 0;
 542                         priv->AntennaTxPwDiff[1] = 0;
 543                         priv->AntennaTxPwDiff[2] = 0;
 544                         priv->CrystalCap = priv->EEPROMCrystalCap;
 545                         priv->ThermalMeter[0] = (priv->EEPROMThermalMeter &
 546                                                  0xf);
 547                         priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter &
 548                                                  0xf0)>>4);
 549                 }
 550         }
 551
 552         if (priv->rf_type == RF_1T2R) {
 553                 /* no matter what checkpatch says, the braces are needed */
 554                 RT_TRACE(COMP_INIT, "\n1T2R config\n");
 555         } else if (priv->rf_type == RF_2T4R) {
 556                 RT_TRACE(COMP_INIT, "\n2T4R config\n");
 557         }
 558
 559         init_rate_adaptive(dev);
 560
 561         priv->rf_chip = RF_8256;
 562
 563         if (priv->RegChannelPlan == 0xf)
 564                 priv->ChannelPlan = priv->eeprom_ChannelPlan;
 565         else
 566                 priv->ChannelPlan = priv->RegChannelPlan;
 567
 568         if (priv->eeprom_vid == 0x1186 &&  priv->eeprom_did == 0x3304)
 569                 priv->CustomerID =  RT_CID_DLINK;
 570
 571         switch (priv->eeprom_CustomerID) {
 572         case EEPROM_CID_DEFAULT:
 573                 priv->CustomerID = RT_CID_DEFAULT;
 574                 break;
 575         case EEPROM_CID_CAMEO:
 576                 priv->CustomerID = RT_CID_819x_CAMEO;
 577                 break;
 578         case  EEPROM_CID_RUNTOP:
 579                 priv->CustomerID = RT_CID_819x_RUNTOP;
 580                 break;
 581         case EEPROM_CID_NetCore:
 582                 priv->CustomerID = RT_CID_819x_Netcore;
 583                 break;
 584         case EEPROM_CID_TOSHIBA:
 585                 priv->CustomerID = RT_CID_TOSHIBA;
 586                 if (priv->eeprom_ChannelPlan&0x80)
 587                         priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
 588                 else
 589                         priv->ChannelPlan = 0x0;
 590                 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
 591                         priv->ChannelPlan);
 592                 break;
 593         case EEPROM_CID_Nettronix:
 594                 priv->ScanDelay = 100;
 595                 priv->CustomerID = RT_CID_Nettronix;
 596                 break;
 597         case EEPROM_CID_Pronet:
 598                 priv->CustomerID = RT_CID_PRONET;
 599                 break;
 600         case EEPROM_CID_DLINK:
 601                 priv->CustomerID = RT_CID_DLINK;
 602                 break;
 603
 604         case EEPROM_CID_WHQL:
 605                 break;
 606         default:
 607                 break;
 608         }
 609
 610         if (priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
 611                 priv->ChannelPlan = 0;
 612         priv->ChannelPlan = COUNTRY_CODE_WORLD_WIDE_13;
 613
 614         if (priv->eeprom_vid == 0x1186 &&  priv->eeprom_did == 0x3304)
 615                 priv->rtllib->bSupportRemoteWakeUp = true;
 616         else
 617                 priv->rtllib->bSupportRemoteWakeUp = false;
 618
 619         RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
 620         RT_TRACE(COMP_INIT, "ChannelPlan = %d\n", priv->ChannelPlan);
 621         RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
 622 }
 623
 624 void rtl8192_get_eeprom_size(struct net_device *dev)
 625 {
 626         u16 curCR;
 627         struct r8192_priv *priv = rtllib_priv(dev);
 628
 629         RT_TRACE(COMP_INIT, "===========>%s()\n", __func__);
 630         curCR = read_nic_dword(dev, EPROM_CMD);
 631         RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD,
 632                  curCR);
 633         priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EEPROM_93C56 :
 634                           EEPROM_93C46;
 635         RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __func__,
 636                  priv->epromtype);
 637         rtl8192_read_eeprom_info(dev);
 638 }
 639
 640 static void rtl8192_hwconfig(struct net_device *dev)
 641 {
 642         u32 regRATR = 0, regRRSR = 0;
 643         u8 regBwOpMode = 0, regTmp = 0;
 644         struct r8192_priv *priv = rtllib_priv(dev);
 645
 646         switch (priv->rtllib->mode) {
 647         case WIRELESS_MODE_B:
 648                 regBwOpMode = BW_OPMODE_20MHZ;
 649                 regRATR = RATE_ALL_CCK;
 650                 regRRSR = RATE_ALL_CCK;
 651                 break;
 652         case WIRELESS_MODE_A:
 653                 regBwOpMode = BW_OPMODE_5G | BW_OPMODE_20MHZ;
 654                 regRATR = RATE_ALL_OFDM_AG;
 655                 regRRSR = RATE_ALL_OFDM_AG;
 656                 break;
 657         case WIRELESS_MODE_G:
 658                 regBwOpMode = BW_OPMODE_20MHZ;
 659                 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 660                 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 661                 break;
 662         case WIRELESS_MODE_AUTO:
 663         case WIRELESS_MODE_N_24G:
 664                 regBwOpMode = BW_OPMODE_20MHZ;
 665                         regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG |
 666                                   RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
 667                         regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 668                 break;
 669         case WIRELESS_MODE_N_5G:
 670                 regBwOpMode = BW_OPMODE_5G;
 671                 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS |
 672                           RATE_ALL_OFDM_2SS;
 673                 regRRSR = RATE_ALL_OFDM_AG;
 674                 break;
 675         default:
 676                 regBwOpMode = BW_OPMODE_20MHZ;
 677                 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 678                 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 679                 break;
 680         }
 681
 682         write_nic_byte(dev, BW_OPMODE, regBwOpMode);
 683         {
 684                 u32 ratr_value = 0;
 685                 ratr_value = regRATR;
 686                 if (priv->rf_type == RF_1T2R)
 687                         ratr_value &= ~(RATE_ALL_OFDM_2SS);
 688                 write_nic_dword(dev, RATR0, ratr_value);
 689                 write_nic_byte(dev, UFWP, 1);
 690         }
 691         regTmp = read_nic_byte(dev, 0x313);
 692         regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
 693         write_nic_dword(dev, RRSR, regRRSR);
 694
 695         write_nic_word(dev, RETRY_LIMIT,
 696                         priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
 697                         priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
 698 }
 699
 700 bool rtl8192_adapter_start(struct net_device *dev)
 701 {
 702         struct r8192_priv *priv = rtllib_priv(dev);
 703         u32 ulRegRead;
 704         bool rtStatus = true;
 705         u8 tmpvalue;
 706         u8 ICVersion, SwitchingRegulatorOutput;
 707         bool bfirmwareok = true;
 708         u32 tmpRegA, tmpRegC, TempCCk;
 709         int i = 0;
 710         u32 retry_times = 0;
 711
 712         RT_TRACE(COMP_INIT, "====>%s()\n", __func__);
 713         priv->being_init_adapter = true;
 714
 715 start:
 716         rtl8192_pci_resetdescring(dev);
 717         priv->Rf_Mode = RF_OP_By_SW_3wire;
 718         if (priv->ResetProgress == RESET_TYPE_NORESET) {
 719                 write_nic_byte(dev, ANAPAR, 0x37);
 720                 mdelay(500);
 721         }
 722         priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
 723
 724         if (priv->RegRfOff)
 725                 priv->rtllib->eRFPowerState = eRfOff;
 726
 727         ulRegRead = read_nic_dword(dev, CPU_GEN);
 728         if (priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
 729                 ulRegRead |= CPU_GEN_SYSTEM_RESET;
 730         else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
 731                 ulRegRead |= CPU_GEN_FIRMWARE_RESET;
 732         else
 733                 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)"
 734                          "\n", __func__,   priv->pFirmware->firmware_status);
 735
 736         write_nic_dword(dev, CPU_GEN, ulRegRead);
 737
 738         ICVersion = read_nic_byte(dev, IC_VERRSION);
 739         if (ICVersion >= 0x4) {
 740                 SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR);
 741                 if (SwitchingRegulatorOutput  != 0xb8) {
 742                         write_nic_byte(dev, SWREGULATOR, 0xa8);
 743                         mdelay(1);
 744                         write_nic_byte(dev, SWREGULATOR, 0xb8);
 745                 }
 746         }
 747         RT_TRACE(COMP_INIT, "BB Config Start!\n");
 748         rtStatus = rtl8192_BBConfig(dev);
 749         if (!rtStatus) {
 750                 RT_TRACE(COMP_ERR, "BB Config failed\n");
 751                 return rtStatus;
 752         }
 753         RT_TRACE(COMP_INIT, "BB Config Finished!\n");
 754
 755         priv->LoopbackMode = RTL819X_NO_LOOPBACK;
 756         if (priv->ResetProgress == RESET_TYPE_NORESET) {
 757                 ulRegRead = read_nic_dword(dev, CPU_GEN);
 758                 if (priv->LoopbackMode == RTL819X_NO_LOOPBACK)
 759                         ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) |
 760                                      CPU_GEN_NO_LOOPBACK_SET);
 761                 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK)
 762                         ulRegRead |= CPU_CCK_LOOPBACK;
 763                 else
 764                         RT_TRACE(COMP_ERR, "Serious error: wrong loopback"
 765                                  " mode setting\n");
 766
 767                 write_nic_dword(dev, CPU_GEN, ulRegRead);
 768
 769                 udelay(500);
 770         }
 771         rtl8192_hwconfig(dev);
 772         write_nic_byte(dev, CMDR, CR_RE | CR_TE);
 773
 774         write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
 775                        (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT)));
 776         write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
 777         write_nic_word(dev, MAC4, ((u16 *)(dev->dev_addr + 4))[0]);
 778         write_nic_dword(dev, RCR, priv->ReceiveConfig);
 779
 780         write_nic_dword(dev, RQPN1,  NUM_OF_PAGE_IN_FW_QUEUE_BK <<
 781                         RSVD_FW_QUEUE_PAGE_BK_SHIFT |
 782                         NUM_OF_PAGE_IN_FW_QUEUE_BE <<
 783                         RSVD_FW_QUEUE_PAGE_BE_SHIFT |
 784                         NUM_OF_PAGE_IN_FW_QUEUE_VI <<
 785                         RSVD_FW_QUEUE_PAGE_VI_SHIFT |
 786                         NUM_OF_PAGE_IN_FW_QUEUE_VO <<
 787                         RSVD_FW_QUEUE_PAGE_VO_SHIFT);
 788         write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT <<
 789                         RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
 790         write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW |
 791                         NUM_OF_PAGE_IN_FW_QUEUE_BCN <<
 792                         RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
 793                         NUM_OF_PAGE_IN_FW_QUEUE_PUB <<
 794                         RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
 795
 796         rtl8192_tx_enable(dev);
 797         rtl8192_rx_enable(dev);
 798         ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR))  |
 799                      RATE_ALL_OFDM_AG | RATE_ALL_CCK;
 800         write_nic_dword(dev, RRSR, ulRegRead);
 801         write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
 802
 803         write_nic_byte(dev, ACK_TIMEOUT, 0x30);
 804
 805         if (priv->ResetProgress == RESET_TYPE_NORESET)
 806                 rtl8192_SetWirelessMode(dev, priv->rtllib->mode);
 807         CamResetAllEntry(dev);
 808         {
 809                 u8 SECR_value = 0x0;
 810                 SECR_value |= SCR_TxEncEnable;
 811                 SECR_value |= SCR_RxDecEnable;
 812                 SECR_value |= SCR_NoSKMC;
 813                 write_nic_byte(dev, SECR, SECR_value);
 814         }
 815         write_nic_word(dev, ATIMWND, 2);
 816         write_nic_word(dev, BCN_INTERVAL, 100);
 817         {
 818                 int i;
 819                 for (i = 0; i < QOS_QUEUE_NUM; i++)
 820                         write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332);
 821         }
 822         write_nic_byte(dev, 0xbe, 0xc0);
 823
 824         rtl8192_phy_configmac(dev);
 825
 826         if (priv->card_8192_version > (u8) VERSION_8190_BD) {
 827                 rtl8192_phy_getTxPower(dev);
 828                 rtl8192_phy_setTxPower(dev, priv->chan);
 829         }
 830
 831         tmpvalue = read_nic_byte(dev, IC_VERRSION);
 832         priv->IC_Cut = tmpvalue;
 833         RT_TRACE(COMP_INIT, "priv->IC_Cut= 0x%x\n", priv->IC_Cut);
 834         if (priv->IC_Cut >= IC_VersionCut_D) {
 835                 if (priv->IC_Cut == IC_VersionCut_D) {
 836                         /* no matter what checkpatch says, braces are needed */
 837                         RT_TRACE(COMP_INIT, "D-cut\n");
 838                 } else if (priv->IC_Cut == IC_VersionCut_E) {
 839                         RT_TRACE(COMP_INIT, "E-cut\n");
 840                 }
 841         } else {
 842                 RT_TRACE(COMP_INIT, "Before C-cut\n");
 843         }
 844
 845         RT_TRACE(COMP_INIT, "Load Firmware!\n");
 846         bfirmwareok = init_firmware(dev);
 847         if (!bfirmwareok) {
 848                 if (retry_times < 10) {
 849                         retry_times++;
 850                         goto start;
 851                 } else {
 852                         rtStatus = false;
 853                         goto end;
 854                 }
 855         }
 856         RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
 857         if (priv->ResetProgress == RESET_TYPE_NORESET) {
 858                 RT_TRACE(COMP_INIT, "RF Config Started!\n");
 859                 rtStatus = rtl8192_phy_RFConfig(dev);
 860                 if (!rtStatus) {
 861                         RT_TRACE(COMP_ERR, "RF Config failed\n");
 862                         return rtStatus;
 863                 }
 864                 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
 865         }
 866         rtl8192_phy_updateInitGain(dev);
 867
 868         rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
 869         rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
 870
 871         write_nic_byte(dev, 0x87, 0x0);
 872
 873         if (priv->RegRfOff) {
 874                 RT_TRACE((COMP_INIT | COMP_RF | COMP_POWER),
 875                           "%s(): Turn off RF for RegRfOff ----------\n",
 876                           __func__);
 877                 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW, true);
 878         } else if (priv->rtllib->RfOffReason > RF_CHANGE_BY_PS) {
 879                 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for"
 880                          " RfOffReason(%d) ----------\n", __func__,
 881                          priv->rtllib->RfOffReason);
 882                 MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,
 883                                     true);
 884         } else if (priv->rtllib->RfOffReason >= RF_CHANGE_BY_IPS) {
 885                 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for"
 886                          " RfOffReason(%d) ----------\n", __func__,
 887                          priv->rtllib->RfOffReason);
 888                 MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,
 889                                     true);
 890         } else {
 891                 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON\n",
 892                           __func__);
 893                 priv->rtllib->eRFPowerState = eRfOn;
 894                 priv->rtllib->RfOffReason = 0;
 895         }
 896
 897         if (priv->rtllib->FwRWRF)
 898                 priv->Rf_Mode = RF_OP_By_FW;
 899         else
 900                 priv->Rf_Mode = RF_OP_By_SW_3wire;
 901
 902         if (priv->ResetProgress == RESET_TYPE_NORESET) {
 903                 dm_initialize_txpower_tracking(dev);
 904
 905                 if (priv->IC_Cut >= IC_VersionCut_D) {
 906                         tmpRegA = rtl8192_QueryBBReg(dev,
 907                                   rOFDM0_XATxIQImbalance, bMaskDWord);
 908                         tmpRegC = rtl8192_QueryBBReg(dev,
 909                                   rOFDM0_XCTxIQImbalance, bMaskDWord);
 910                         for (i = 0; i < TxBBGainTableLength; i++) {
 911                                 if (tmpRegA ==
 912                                     priv->txbbgain_table[i].txbbgain_value) {
 913                                         priv->rfa_txpowertrackingindex = (u8)i;
 914                                         priv->rfa_txpowertrackingindex_real =
 915                                                  (u8)i;
 916                                         priv->rfa_txpowertracking_default =
 917                                                  priv->rfa_txpowertrackingindex;
 918                                         break;
 919                                 }
 920                         }
 921
 922                         TempCCk = rtl8192_QueryBBReg(dev,
 923                                   rCCK0_TxFilter1, bMaskByte2);
 924
 925                         for (i = 0; i < CCKTxBBGainTableLength; i++) {
 926                                 if (TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0]) {
 927                                         priv->CCKPresentAttentuation_20Mdefault = (u8)i;
 928                                         break;
 929                                 }
 930                         }
 931                         priv->CCKPresentAttentuation_40Mdefault = 0;
 932                         priv->CCKPresentAttentuation_difference = 0;
 933                         priv->CCKPresentAttentuation =
 934                                   priv->CCKPresentAttentuation_20Mdefault;
 935                         RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpower"
 936                                  "trackingindex_initial = %d\n",
 937                                  priv->rfa_txpowertrackingindex);
 938                         RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpower"
 939                                  "trackingindex_real__initial = %d\n",
 940                                  priv->rfa_txpowertrackingindex_real);
 941                         RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresent"
 942                                  "Attentuation_difference_initial = %d\n",
 943                                   priv->CCKPresentAttentuation_difference);
 944                         RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresent"
 945                                  "Attentuation_initial = %d\n",
 946                                  priv->CCKPresentAttentuation);
 947                         priv->btxpower_tracking = false;
 948                 }
 949         }
 950         rtl8192_irq_enable(dev);
 951 end:
 952         priv->being_init_adapter = false;
 953         return rtStatus;
 954 }
 955
 956 static void rtl8192_net_update(struct net_device *dev)
 957 {
 958
 959         struct r8192_priv *priv = rtllib_priv(dev);
 960         struct rtllib_network *net;
 961         u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
 962         u16 rate_config = 0;
 963
 964         net = &priv->rtllib->current_network;
 965         rtl8192_config_rate(dev, &rate_config);
 966         priv->dot11CurrentPreambleMode = PREAMBLE_AUTO;
 967          priv->basic_rate = rate_config &= 0x15f;
 968         write_nic_dword(dev, BSSIDR, ((u32 *)net->bssid)[0]);
 969         write_nic_word(dev, BSSIDR+4, ((u16 *)net->bssid)[2]);
 970
 971         if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
 972                 write_nic_word(dev, ATIMWND, 2);
 973                 write_nic_word(dev, BCN_DMATIME, 256);
 974                 write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
 975                 write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
 976                 write_nic_byte(dev, BCN_ERR_THRESH, 100);
 977
 978                 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
 979                 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
 980
 981                 write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
 982         }
 983 }
 984
 985 void rtl8192_link_change(struct net_device *dev)
 986 {
 987         struct r8192_priv *priv = rtllib_priv(dev);
 988         struct rtllib_device *ieee = priv->rtllib;
 989
 990         if (!priv->up)
 991                 return;
 992
 993         if (ieee->state == RTLLIB_LINKED) {
 994                 rtl8192_net_update(dev);
 995                 priv->ops->update_ratr_table(dev);
 996                 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
 997                     (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
 998                         EnableHWSecurityConfig8192(dev);
 999         } else {
1000                 write_nic_byte(dev, 0x173, 0);
1001         }
1002         rtl8192e_update_msr(dev);
1003
1004         if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
1005                 u32 reg = 0;
1006                 reg = read_nic_dword(dev, RCR);
1007                 if (priv->rtllib->state == RTLLIB_LINKED) {
1008                         if (ieee->IntelPromiscuousModeInfo.bPromiscuousOn)
1009                                 ;
1010                         else
1011                                 priv->ReceiveConfig = reg |= RCR_CBSSID;
1012                 } else
1013                         priv->ReceiveConfig = reg &= ~RCR_CBSSID;
1014
1015                 write_nic_dword(dev, RCR, reg);
1016         }
1017 }
1018
1019 void rtl8192_AllowAllDestAddr(struct net_device *dev,
1020                               bool bAllowAllDA, bool WriteIntoReg)
1021 {
1022         struct r8192_priv *priv = rtllib_priv(dev);
1023
1024         if (bAllowAllDA)
1025                 priv->ReceiveConfig |= RCR_AAP;
1026         else
1027                 priv->ReceiveConfig &= ~RCR_AAP;
1028
1029         if (WriteIntoReg)
1030                 write_nic_dword(dev, RCR, priv->ReceiveConfig);
1031 }
1032
1033 static u8 MRateToHwRate8190Pci(u8 rate)
1034 {
1035         u8  ret = DESC90_RATE1M;
1036
1037         switch (rate) {
1038         case MGN_1M:
1039                 ret = DESC90_RATE1M;
1040                 break;
1041         case MGN_2M:
1042                 ret = DESC90_RATE2M;
1043                 break;
1044         case MGN_5_5M:
1045                 ret = DESC90_RATE5_5M;
1046                 break;
1047         case MGN_11M:
1048                 ret = DESC90_RATE11M;
1049                 break;
1050         case MGN_6M:
1051                 ret = DESC90_RATE6M;
1052                 break;
1053         case MGN_9M:
1054                 ret = DESC90_RATE9M;
1055                 break;
1056         case MGN_12M:
1057                 ret = DESC90_RATE12M;
1058                 break;
1059         case MGN_18M:
1060                 ret = DESC90_RATE18M;
1061                 break;
1062         case MGN_24M:
1063                 ret = DESC90_RATE24M;
1064                 break;
1065         case MGN_36M:
1066                 ret = DESC90_RATE36M;
1067                 break;
1068         case MGN_48M:
1069                 ret = DESC90_RATE48M;
1070                 break;
1071         case MGN_54M:
1072                 ret = DESC90_RATE54M;
1073                 break;
1074         case MGN_MCS0:
1075                 ret = DESC90_RATEMCS0;
1076                 break;
1077         case MGN_MCS1:
1078                 ret = DESC90_RATEMCS1;
1079                 break;
1080         case MGN_MCS2:
1081                 ret = DESC90_RATEMCS2;
1082                 break;
1083         case MGN_MCS3:
1084                 ret = DESC90_RATEMCS3;
1085                 break;
1086         case MGN_MCS4:
1087                 ret = DESC90_RATEMCS4;
1088                 break;
1089         case MGN_MCS5:
1090                 ret = DESC90_RATEMCS5;
1091                 break;
1092         case MGN_MCS6:
1093                 ret = DESC90_RATEMCS6;
1094                 break;
1095         case MGN_MCS7:
1096                 ret = DESC90_RATEMCS7;
1097                 break;
1098         case MGN_MCS8:
1099                 ret = DESC90_RATEMCS8;
1100                 break;
1101         case MGN_MCS9:
1102                 ret = DESC90_RATEMCS9;
1103                 break;
1104         case MGN_MCS10:
1105                 ret = DESC90_RATEMCS10;
1106                 break;
1107         case MGN_MCS11:
1108                 ret = DESC90_RATEMCS11;
1109                 break;
1110         case MGN_MCS12:
1111                 ret = DESC90_RATEMCS12;
1112                 break;
1113         case MGN_MCS13:
1114                 ret = DESC90_RATEMCS13;
1115                 break;
1116         case MGN_MCS14:
1117                 ret = DESC90_RATEMCS14;
1118                 break;
1119         case MGN_MCS15:
1120                 ret = DESC90_RATEMCS15;
1121                 break;
1122         case (0x80|0x20):
1123                 ret = DESC90_RATEMCS32;
1124                 break;
1125         default:
1126                 break;
1127         }
1128         return ret;
1129 }
1130
1131 static u8 rtl8192_MapHwQueueToFirmwareQueue(u8 QueueID, u8 priority)
1132 {
1133         u8 QueueSelect = 0x0;
1134
1135         switch (QueueID) {
1136         case BE_QUEUE:
1137                 QueueSelect = QSLT_BE;
1138                 break;
1139
1140         case BK_QUEUE:
1141                 QueueSelect = QSLT_BK;
1142                 break;
1143
1144         case VO_QUEUE:
1145                 QueueSelect = QSLT_VO;
1146                 break;
1147
1148         case VI_QUEUE:
1149                 QueueSelect = QSLT_VI;
1150                 break;
1151         case MGNT_QUEUE:
1152                 QueueSelect = QSLT_MGNT;
1153                 break;
1154         case BEACON_QUEUE:
1155                 QueueSelect = QSLT_BEACON;
1156                 break;
1157         case TXCMD_QUEUE:
1158                 QueueSelect = QSLT_CMD;
1159                 break;
1160         case HIGH_QUEUE:
1161                 QueueSelect = QSLT_HIGH;
1162                 break;
1163         default:
1164                 RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection:"
1165                          " %d\n", QueueID);
1166                 break;
1167         }
1168         return QueueSelect;
1169 }
1170
1171 void  rtl8192_tx_fill_desc(struct net_device *dev, struct tx_desc *pdesc,
1172                            struct cb_desc *cb_desc, struct sk_buff *skb)
1173 {
1174         struct r8192_priv *priv = rtllib_priv(dev);
1175         dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len,
1176                          PCI_DMA_TODEVICE);
1177         struct tx_fwinfo_8190pci *pTxFwInfo = NULL;
1178         pTxFwInfo = (struct tx_fwinfo_8190pci *)skb->data;
1179         memset(pTxFwInfo, 0, sizeof(struct tx_fwinfo_8190pci));
1180         pTxFwInfo->TxHT = (cb_desc->data_rate & 0x80) ? 1 : 0;
1181         pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)cb_desc->data_rate);
1182         pTxFwInfo->EnableCPUDur = cb_desc->bTxEnableFwCalcDur;
1183         pTxFwInfo->Short = rtl8192_QueryIsShort(pTxFwInfo->TxHT,
1184                                                 pTxFwInfo->TxRate,
1185                                                 cb_desc);
1186
1187         if (pci_dma_mapping_error(priv->pdev, mapping))
1188                 RT_TRACE(COMP_ERR, "DMA Mapping error\n");
1189         if (cb_desc->bAMPDUEnable) {
1190                 pTxFwInfo->AllowAggregation = 1;
1191                 pTxFwInfo->RxMF = cb_desc->ampdu_factor;
1192                 pTxFwInfo->RxAMD = cb_desc->ampdu_density;
1193         } else {
1194                 pTxFwInfo->AllowAggregation = 0;
1195                 pTxFwInfo->RxMF = 0;
1196                 pTxFwInfo->RxAMD = 0;
1197         }
1198
1199         pTxFwInfo->RtsEnable =  (cb_desc->bRTSEnable) ? 1 : 0;
1200         pTxFwInfo->CtsEnable = (cb_desc->bCTSEnable) ? 1 : 0;
1201         pTxFwInfo->RtsSTBC = (cb_desc->bRTSSTBC) ? 1 : 0;
1202         pTxFwInfo->RtsHT = (cb_desc->rts_rate&0x80) ? 1 : 0;
1203         pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)cb_desc->rts_rate);
1204         pTxFwInfo->RtsBandwidth = 0;
1205         pTxFwInfo->RtsSubcarrier = cb_desc->RTSSC;
1206         pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ?
1207                           (cb_desc->bRTSUseShortPreamble ? 1 : 0) :
1208                           (cb_desc->bRTSUseShortGI ? 1 : 0);
1209         if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) {
1210                 if (cb_desc->bPacketBW) {
1211                         pTxFwInfo->TxBandwidth = 1;
1212                         pTxFwInfo->TxSubCarrier = 0;
1213                 } else {
1214                         pTxFwInfo->TxBandwidth = 0;
1215                         pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1216                 }
1217         } else {
1218                 pTxFwInfo->TxBandwidth = 0;
1219                 pTxFwInfo->TxSubCarrier = 0;
1220         }
1221
1222         memset((u8 *)pdesc, 0, 12);
1223         pdesc->LINIP = 0;
1224         pdesc->CmdInit = 1;
1225         pdesc->Offset = sizeof(struct tx_fwinfo_8190pci) + 8;
1226         pdesc->PktSize = (u16)skb->len-sizeof(struct tx_fwinfo_8190pci);
1227
1228         pdesc->SecCAMID = 0;
1229         pdesc->RATid = cb_desc->RATRIndex;
1230
1231
1232         pdesc->NoEnc = 1;
1233         pdesc->SecType = 0x0;
1234         if (cb_desc->bHwSec) {
1235                 static u8 tmp;
1236                 if (!tmp) {
1237                         RT_TRACE(COMP_DBG, "==>================hw sec\n");
1238                         tmp = 1;
1239                 }
1240                 switch (priv->rtllib->pairwise_key_type) {
1241                 case KEY_TYPE_WEP40:
1242                 case KEY_TYPE_WEP104:
1243                         pdesc->SecType = 0x1;
1244                         pdesc->NoEnc = 0;
1245                         break;
1246                 case KEY_TYPE_TKIP:
1247                         pdesc->SecType = 0x2;
1248                         pdesc->NoEnc = 0;
1249                         break;
1250                 case KEY_TYPE_CCMP:
1251                         pdesc->SecType = 0x3;
1252                         pdesc->NoEnc = 0;
1253                         break;
1254                 case KEY_TYPE_NA:
1255                         pdesc->SecType = 0x0;
1256                         pdesc->NoEnc = 1;
1257                         break;
1258                 }
1259         }
1260
1261         pdesc->PktId = 0x0;
1262
1263         pdesc->QueueSelect = rtl8192_MapHwQueueToFirmwareQueue(
1264                                                 cb_desc->queue_index,
1265                                                 cb_desc->priority);
1266         pdesc->TxFWInfoSize = sizeof(struct tx_fwinfo_8190pci);
1267
1268         pdesc->DISFB = cb_desc->bTxDisableRateFallBack;
1269         pdesc->USERATE = cb_desc->bTxUseDriverAssingedRate;
1270
1271         pdesc->FirstSeg = 1;
1272         pdesc->LastSeg = 1;
1273         pdesc->TxBufferSize = skb->len;
1274
1275         pdesc->TxBuffAddr = mapping;
1276 }
1277
1278 void  rtl8192_tx_fill_cmd_desc(struct net_device *dev,
1279                                struct tx_desc_cmd *entry,
1280                                struct cb_desc *cb_desc, struct sk_buff* skb)
1281 {
1282         struct r8192_priv *priv = rtllib_priv(dev);
1283         dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len,
1284                          PCI_DMA_TODEVICE);
1285
1286         if (pci_dma_mapping_error(priv->pdev, mapping))
1287                 RT_TRACE(COMP_ERR, "DMA Mapping error\n");
1288         memset(entry, 0, 12);
1289         entry->LINIP = cb_desc->bLastIniPkt;
1290         entry->FirstSeg = 1;
1291         entry->LastSeg = 1;
1292         if (cb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1293                 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1294         } else {
1295                 struct tx_desc * entry_tmp = (struct tx_desc *)entry;
1296                 entry_tmp->CmdInit = DESC_PACKET_TYPE_NORMAL;
1297                 entry_tmp->Offset = sizeof(struct tx_fwinfo_8190pci) + 8;
1298                 entry_tmp->PktSize = (u16)(cb_desc->pkt_size +
1299                                       entry_tmp->Offset);
1300                 entry_tmp->QueueSelect = QSLT_CMD;
1301                 entry_tmp->TxFWInfoSize = 0x08;
1302                 entry_tmp->RATid = (u8)DESC_PACKET_TYPE_INIT;
1303         }
1304         entry->TxBufferSize = skb->len;
1305         entry->TxBuffAddr = mapping;
1306         entry->OWN = 1;
1307 }
1308
1309 static u8 HwRateToMRate90(bool bIsHT, u8 rate)
1310 {
1311         u8  ret_rate = 0x02;
1312
1313         if (!bIsHT) {
1314                 switch (rate) {
1315                 case DESC90_RATE1M:
1316                         ret_rate = MGN_1M;
1317                         break;
1318                 case DESC90_RATE2M:
1319                         ret_rate = MGN_2M;
1320                         break;
1321                 case DESC90_RATE5_5M:
1322                         ret_rate = MGN_5_5M;
1323                         break;
1324                 case DESC90_RATE11M:
1325                         ret_rate = MGN_11M;
1326                         break;
1327                 case DESC90_RATE6M:
1328                         ret_rate = MGN_6M;
1329                         break;
1330                 case DESC90_RATE9M:
1331                         ret_rate = MGN_9M;
1332                         break;
1333                 case DESC90_RATE12M:
1334                         ret_rate = MGN_12M;
1335                         break;
1336                 case DESC90_RATE18M:
1337                         ret_rate = MGN_18M;
1338                         break;
1339                 case DESC90_RATE24M:
1340                         ret_rate = MGN_24M;
1341                         break;
1342                 case DESC90_RATE36M:
1343                         ret_rate = MGN_36M;
1344                         break;
1345                 case DESC90_RATE48M:
1346                         ret_rate = MGN_48M;
1347                         break;
1348                 case DESC90_RATE54M:
1349                         ret_rate = MGN_54M;
1350                         break;
1351
1352                 default:
1353                         RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported"
1354                                  "Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
1355                                                   break;
1356                 }
1357
1358         } else {
1359                 switch (rate) {
1360                 case DESC90_RATEMCS0:
1361                         ret_rate = MGN_MCS0;
1362                         break;
1363                 case DESC90_RATEMCS1:
1364                         ret_rate = MGN_MCS1;
1365                         break;
1366                 case DESC90_RATEMCS2:
1367                         ret_rate = MGN_MCS2;
1368                         break;
1369                 case DESC90_RATEMCS3:
1370                         ret_rate = MGN_MCS3;
1371                         break;
1372                 case DESC90_RATEMCS4:
1373                         ret_rate = MGN_MCS4;
1374                         break;
1375                 case DESC90_RATEMCS5:
1376                         ret_rate = MGN_MCS5;
1377                         break;
1378                 case DESC90_RATEMCS6:
1379                         ret_rate = MGN_MCS6;
1380                         break;
1381                 case DESC90_RATEMCS7:
1382                         ret_rate = MGN_MCS7;
1383                         break;
1384                 case DESC90_RATEMCS8:
1385                         ret_rate = MGN_MCS8;
1386                         break;
1387                 case DESC90_RATEMCS9:
1388                         ret_rate = MGN_MCS9;
1389                         break;
1390                 case DESC90_RATEMCS10:
1391                         ret_rate = MGN_MCS10;
1392                         break;
1393                 case DESC90_RATEMCS11:
1394                         ret_rate = MGN_MCS11;
1395                         break;
1396                 case DESC90_RATEMCS12:
1397                         ret_rate = MGN_MCS12;
1398                         break;
1399                 case DESC90_RATEMCS13:
1400                         ret_rate = MGN_MCS13;
1401                         break;
1402                 case DESC90_RATEMCS14:
1403                         ret_rate = MGN_MCS14;
1404                         break;
1405                 case DESC90_RATEMCS15:
1406                         ret_rate = MGN_MCS15;
1407                         break;
1408                 case DESC90_RATEMCS32:
1409                         ret_rate = (0x80|0x20);
1410                         break;
1411
1412                 default:
1413                         RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported "
1414                                  "Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
1415                         break;
1416                 }
1417         }
1418
1419         return ret_rate;
1420 }
1421
1422 static long rtl8192_signal_scale_mapping(struct r8192_priv *priv, long currsig)
1423 {
1424         long retsig;
1425
1426         if (currsig >= 61 && currsig <= 100)
1427                 retsig = 90 + ((currsig - 60) / 4);
1428         else if (currsig >= 41 && currsig <= 60)
1429                 retsig = 78 + ((currsig - 40) / 2);
1430         else if (currsig >= 31 && currsig <= 40)
1431                 retsig = 66 + (currsig - 30);
1432         else if (currsig >= 21 && currsig <= 30)
1433                 retsig = 54 + (currsig - 20);
1434         else if (currsig >= 5 && currsig <= 20)
1435                 retsig = 42 + (((currsig - 5) * 2) / 3);
1436         else if (currsig == 4)
1437                 retsig = 36;
1438         else if (currsig == 3)
1439                 retsig = 27;
1440         else if (currsig == 2)
1441                 retsig = 18;
1442         else if (currsig == 1)
1443                 retsig = 9;
1444         else
1445                 retsig = currsig;
1446
1447         return retsig;
1448 }
1449
1450
1451 #define  rx_hal_is_cck_rate(_pdrvinfo)\
1452                         ((_pdrvinfo->RxRate == DESC90_RATE1M ||\
1453                         _pdrvinfo->RxRate == DESC90_RATE2M ||\
1454                         _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
1455                         _pdrvinfo->RxRate == DESC90_RATE11M) &&\
1456                         !_pdrvinfo->RxHT)
1457
1458 static void rtl8192_query_rxphystatus(
1459         struct r8192_priv *priv,
1460         struct rtllib_rx_stats *pstats,
1461         struct rx_desc  *pdesc,
1462         struct rx_fwinfo   *pdrvinfo,
1463         struct rtllib_rx_stats *precord_stats,
1464         bool bpacket_match_bssid,
1465         bool bpacket_toself,
1466         bool bPacketBeacon,
1467         bool bToSelfBA
1468         )
1469 {
1470         struct phy_sts_ofdm_819xpci *pofdm_buf;
1471         struct phy_sts_cck_819xpci *pcck_buf;
1472         struct phy_ofdm_rx_status_rxsc_sgien_exintfflag *prxsc;
1473         u8 *prxpkt;
1474         u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
1475         char rx_pwr[4], rx_pwr_all = 0;
1476         char rx_snrX, rx_evmX;
1477         u8 evm, pwdb_all;
1478         u32 RSSI, total_rssi = 0;
1479         u8 is_cck_rate = 0;
1480         u8 rf_rx_num = 0;
1481         static  u8 check_reg824;
1482         static  u32 reg824_bit9;
1483
1484         priv->stats.numqry_phystatus++;
1485
1486         is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
1487         memset(precord_stats, 0, sizeof(struct rtllib_rx_stats));
1488         pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID =
1489                                     bpacket_match_bssid;
1490         pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
1491         pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;
1492         pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
1493         pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
1494         if (check_reg824 == 0) {
1495                 reg824_bit9 = rtl8192_QueryBBReg(priv->rtllib->dev,
1496                               rFPGA0_XA_HSSIParameter2, 0x200);
1497                 check_reg824 = 1;
1498         }
1499
1500
1501         prxpkt = (u8 *)pdrvinfo;
1502
1503         prxpkt += sizeof(struct rx_fwinfo);
1504
1505         pcck_buf = (struct phy_sts_cck_819xpci *)prxpkt;
1506         pofdm_buf = (struct phy_sts_ofdm_819xpci *)prxpkt;
1507
1508         pstats->RxMIMOSignalQuality[0] = -1;
1509         pstats->RxMIMOSignalQuality[1] = -1;
1510         precord_stats->RxMIMOSignalQuality[0] = -1;
1511         precord_stats->RxMIMOSignalQuality[1] = -1;
1512
1513         if (is_cck_rate) {
1514                 u8 report;
1515
1516                 priv->stats.numqry_phystatusCCK++;
1517                 if (!reg824_bit9) {
1518                         report = pcck_buf->cck_agc_rpt & 0xc0;
1519                         report = report>>6;
1520                         switch (report) {
1521                         case 0x3:
1522                                 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt &
1523                                              0x3e);
1524                                 break;
1525                         case 0x2:
1526                                 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt &
1527                                              0x3e);
1528                                 break;
1529                         case 0x1:
1530                                 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt &
1531                                              0x3e);
1532                                 break;
1533                         case 0x0:
1534                                 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
1535                                 break;
1536                         }
1537                 } else {
1538                         report = pcck_buf->cck_agc_rpt & 0x60;
1539                         report = report>>5;
1540                         switch (report) {
1541                         case 0x3:
1542                                 rx_pwr_all = -35 -
1543                                         ((pcck_buf->cck_agc_rpt &
1544                                         0x1f) << 1);
1545                                 break;
1546                         case 0x2:
1547                                 rx_pwr_all = -23 -
1548                                         ((pcck_buf->cck_agc_rpt &
1549                                          0x1f) << 1);
1550                                 break;
1551                         case 0x1:
1552                                 rx_pwr_all = -11 -
1553                                          ((pcck_buf->cck_agc_rpt &
1554                                          0x1f) << 1);
1555                                 break;
1556                         case 0x0:
1557                                 rx_pwr_all = -8 -
1558                                          ((pcck_buf->cck_agc_rpt &
1559                                          0x1f) << 1);
1560                                 break;
1561                         }
1562                 }
1563
1564                 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
1565                 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
1566                 pstats->RecvSignalPower = rx_pwr_all;
1567
1568                 if (bpacket_match_bssid) {
1569                         u8      sq;
1570
1571                         if (pstats->RxPWDBAll > 40) {
1572                                 sq = 100;
1573                         } else {
1574                                 sq = pcck_buf->sq_rpt;
1575
1576                                 if (pcck_buf->sq_rpt > 64)
1577                                         sq = 0;
1578                                 else if (pcck_buf->sq_rpt < 20)
1579                                         sq = 100;
1580                                 else
1581                                         sq = ((64-sq) * 100) / 44;
1582                         }
1583                         pstats->SignalQuality = sq;
1584                         precord_stats->SignalQuality = sq;
1585                         pstats->RxMIMOSignalQuality[0] = sq;
1586                         precord_stats->RxMIMOSignalQuality[0] = sq;
1587                         pstats->RxMIMOSignalQuality[1] = -1;
1588                         precord_stats->RxMIMOSignalQuality[1] = -1;
1589                 }
1590         } else {
1591                 priv->stats.numqry_phystatusHT++;
1592                 for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
1593                         if (priv->brfpath_rxenable[i])
1594                                 rf_rx_num++;
1595
1596                         rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i] & 0x3F) *
1597                                      2) - 110;
1598
1599                         tmp_rxsnr = pofdm_buf->rxsnr_X[i];
1600                         rx_snrX = (char)(tmp_rxsnr);
1601                         rx_snrX /= 2;
1602                         priv->stats.rxSNRdB[i] = (long)rx_snrX;
1603
1604                         RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
1605                         if (priv->brfpath_rxenable[i])
1606                                 total_rssi += RSSI;
1607
1608                         if (bpacket_match_bssid) {
1609                                 pstats->RxMIMOSignalStrength[i] = (u8) RSSI;
1610                                 precord_stats->RxMIMOSignalStrength[i] =
1611                                                                 (u8) RSSI;
1612                         }
1613                 }
1614
1615
1616                 rx_pwr_all = (((pofdm_buf->pwdb_all) >> 1) & 0x7f) - 106;
1617                 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
1618
1619                 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
1620                 pstats->RxPower = precord_stats->RxPower =      rx_pwr_all;
1621                 pstats->RecvSignalPower = rx_pwr_all;
1622                 if (pdrvinfo->RxHT && pdrvinfo->RxRate >= DESC90_RATEMCS8 &&
1623                     pdrvinfo->RxRate <= DESC90_RATEMCS15)
1624                         max_spatial_stream = 2;
1625                 else
1626                         max_spatial_stream = 1;
1627
1628                 for (i = 0; i < max_spatial_stream; i++) {
1629                         tmp_rxevm = pofdm_buf->rxevm_X[i];
1630                         rx_evmX = (char)(tmp_rxevm);
1631
1632                         rx_evmX /= 2;
1633
1634                         evm = rtl819x_evm_dbtopercentage(rx_evmX);
1635                         if (bpacket_match_bssid) {
1636                                 if (i == 0) {
1637                                         pstats->SignalQuality = (u8)(evm &
1638                                                                  0xff);
1639                                         precord_stats->SignalQuality = (u8)(evm
1640                                                                         & 0xff);
1641                                 }
1642                                 pstats->RxMIMOSignalQuality[i] = (u8)(evm &
1643                                                                  0xff);
1644                                 precord_stats->RxMIMOSignalQuality[i] = (u8)(evm
1645                                                                         & 0xff);
1646                         }
1647                 }
1648
1649
1650                 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
1651                 prxsc = (struct phy_ofdm_rx_status_rxsc_sgien_exintfflag *)
1652                         &rxsc_sgien_exflg;
1653                 if (pdrvinfo->BW)
1654                         priv->stats.received_bwtype[1+prxsc->rxsc]++;
1655                 else
1656                         priv->stats.received_bwtype[0]++;
1657         }
1658
1659         if (is_cck_rate) {
1660                 pstats->SignalStrength = precord_stats->SignalStrength =
1661                                          (u8)(rtl8192_signal_scale_mapping(priv,
1662                                          (long)pwdb_all));
1663
1664         } else {
1665                 if (rf_rx_num != 0)
1666                         pstats->SignalStrength = precord_stats->SignalStrength =
1667                                          (u8)(rtl8192_signal_scale_mapping(priv,
1668                                          (long)(total_rssi /= rf_rx_num)));
1669         }
1670 }
1671
1672 static void rtl8192_process_phyinfo(struct r8192_priv *priv, u8 *buffer,
1673                                     struct rtllib_rx_stats *prev_st,
1674                                     struct rtllib_rx_stats *curr_st)
1675 {
1676         bool bcheck = false;
1677         u8      rfpath;
1678         u32 ij, tmp_val;
1679         static u32 slide_rssi_index, slide_rssi_statistics;
1680         static u32 slide_evm_index, slide_evm_statistics;
1681         static u32 last_rssi, last_evm;
1682         static u32 slide_beacon_adc_pwdb_index;
1683         static u32 slide_beacon_adc_pwdb_statistics;
1684         static u32 last_beacon_adc_pwdb;
1685         struct rtllib_hdr_3addr *hdr;
1686         u16 sc;
1687         unsigned int frag, seq;
1688
1689         hdr = (struct rtllib_hdr_3addr *)buffer;
1690         sc = le16_to_cpu(hdr->seq_ctl);
1691         frag = WLAN_GET_SEQ_FRAG(sc);
1692         seq = WLAN_GET_SEQ_SEQ(sc);
1693         curr_st->Seq_Num = seq;
1694         if (!prev_st->bIsAMPDU)
1695                 bcheck = true;
1696
1697         if (slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX) {
1698                 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
1699                 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
1700                 priv->stats.slide_rssi_total -= last_rssi;
1701         }
1702         priv->stats.slide_rssi_total += prev_st->SignalStrength;
1703
1704         priv->stats.slide_signal_strength[slide_rssi_index++] =
1705                                          prev_st->SignalStrength;
1706         if (slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
1707                 slide_rssi_index = 0;
1708
1709         tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
1710         priv->stats.signal_strength = rtl819x_translate_todbm(priv,
1711                                       (u8)tmp_val);
1712         curr_st->rssi = priv->stats.signal_strength;
1713         if (!prev_st->bPacketMatchBSSID) {
1714                 if (!prev_st->bToSelfBA)
1715                         return;
1716         }
1717
1718         if (!bcheck)
1719                 return;
1720
1721         rtl819x_process_cck_rxpathsel(priv, prev_st);
1722
1723         priv->stats.num_process_phyinfo++;
1724         if (!prev_st->bIsCCK && prev_st->bPacketToSelf) {
1725                 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++) {
1726                         if (!rtl8192_phy_CheckIsLegalRFPath(priv->rtllib->dev,
1727                             rfpath))
1728                                 continue;
1729                         RT_TRACE(COMP_DBG, "Jacken -> pPreviousstats->RxMIMO"
1730                                  "SignalStrength[rfpath]  = %d\n",
1731                                  prev_st->RxMIMOSignalStrength[rfpath]);
1732                         if (priv->stats.rx_rssi_percentage[rfpath] == 0) {
1733                                 priv->stats.rx_rssi_percentage[rfpath] =
1734                                          prev_st->RxMIMOSignalStrength[rfpath];
1735                         }
1736                         if (prev_st->RxMIMOSignalStrength[rfpath]  >
1737                             priv->stats.rx_rssi_percentage[rfpath]) {
1738                                 priv->stats.rx_rssi_percentage[rfpath] =
1739                                         ((priv->stats.rx_rssi_percentage[rfpath]
1740                                         * (RX_SMOOTH - 1)) +
1741                                         (prev_st->RxMIMOSignalStrength
1742                                         [rfpath])) / (RX_SMOOTH);
1743                                 priv->stats.rx_rssi_percentage[rfpath] =
1744                                          priv->stats.rx_rssi_percentage[rfpath]
1745                                          + 1;
1746                         } else {
1747                                 priv->stats.rx_rssi_percentage[rfpath] =
1748                                    ((priv->stats.rx_rssi_percentage[rfpath] *
1749                                    (RX_SMOOTH-1)) +
1750                                    (prev_st->RxMIMOSignalStrength[rfpath])) /
1751                                    (RX_SMOOTH);
1752                         }
1753                         RT_TRACE(COMP_DBG, "Jacken -> priv->RxStats.RxRSSI"
1754                                  "Percentage[rfPath]  = %d\n",
1755                                  priv->stats.rx_rssi_percentage[rfpath]);
1756                 }
1757         }
1758
1759
1760         if (prev_st->bPacketBeacon) {
1761                 if (slide_beacon_adc_pwdb_statistics++ >=
1762                     PHY_Beacon_RSSI_SLID_WIN_MAX) {
1763                         slide_beacon_adc_pwdb_statistics =
1764                                          PHY_Beacon_RSSI_SLID_WIN_MAX;
1765                         last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb
1766                                                [slide_beacon_adc_pwdb_index];
1767                         priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
1768                 }
1769                 priv->stats.Slide_Beacon_Total += prev_st->RxPWDBAll;
1770                 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] =
1771                                                          prev_st->RxPWDBAll;
1772                 slide_beacon_adc_pwdb_index++;
1773                 if (slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
1774                         slide_beacon_adc_pwdb_index = 0;
1775                 prev_st->RxPWDBAll = priv->stats.Slide_Beacon_Total /
1776                                      slide_beacon_adc_pwdb_statistics;
1777                 if (prev_st->RxPWDBAll >= 3)
1778                         prev_st->RxPWDBAll -= 3;
1779         }
1780
1781         RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
1782                                 prev_st->bIsCCK ? "CCK" : "OFDM",
1783                                 prev_st->RxPWDBAll);
1784
1785         if (prev_st->bPacketToSelf || prev_st->bPacketBeacon ||
1786             prev_st->bToSelfBA) {
1787                 if (priv->undecorated_smoothed_pwdb < 0)
1788                         priv->undecorated_smoothed_pwdb = prev_st->RxPWDBAll;
1789                 if (prev_st->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb) {
1790                         priv->undecorated_smoothed_pwdb =
1791                                         (((priv->undecorated_smoothed_pwdb) *
1792                                         (RX_SMOOTH-1)) +
1793                                         (prev_st->RxPWDBAll)) / (RX_SMOOTH);
1794                         priv->undecorated_smoothed_pwdb =
1795                                          priv->undecorated_smoothed_pwdb + 1;
1796                 } else {
1797                         priv->undecorated_smoothed_pwdb =
1798                                         (((priv->undecorated_smoothed_pwdb) *
1799                                         (RX_SMOOTH-1)) +
1800                                         (prev_st->RxPWDBAll)) / (RX_SMOOTH);
1801                 }
1802                 rtl819x_update_rxsignalstatistics8190pci(priv, prev_st);
1803         }
1804
1805         if (prev_st->SignalQuality != 0) {
1806                 if (prev_st->bPacketToSelf || prev_st->bPacketBeacon ||
1807                     prev_st->bToSelfBA) {
1808                         if (slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX) {
1809                                 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
1810                                 last_evm =
1811                                          priv->stats.slide_evm[slide_evm_index];
1812                                 priv->stats.slide_evm_total -= last_evm;
1813                         }
1814
1815                         priv->stats.slide_evm_total += prev_st->SignalQuality;
1816
1817                         priv->stats.slide_evm[slide_evm_index++] =
1818                                                  prev_st->SignalQuality;
1819                         if (slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
1820                                 slide_evm_index = 0;
1821
1822                         tmp_val = priv->stats.slide_evm_total /
1823                                   slide_evm_statistics;
1824                         priv->stats.signal_quality = tmp_val;
1825                         priv->stats.last_signal_strength_inpercent = tmp_val;
1826                 }
1827
1828                 if (prev_st->bPacketToSelf ||
1829                     prev_st->bPacketBeacon ||
1830                     prev_st->bToSelfBA) {
1831                         for (ij = 0; ij < 2; ij++) {
1832                                 if (prev_st->RxMIMOSignalQuality[ij] != -1) {
1833                                         if (priv->stats.rx_evm_percentage[ij] == 0)
1834                                                 priv->stats.rx_evm_percentage[ij] =
1835                                                    prev_st->RxMIMOSignalQuality[ij];
1836                                         priv->stats.rx_evm_percentage[ij] =
1837                                           ((priv->stats.rx_evm_percentage[ij] *
1838                                           (RX_SMOOTH - 1)) +
1839                                           (prev_st->RxMIMOSignalQuality[ij])) /
1840                                           (RX_SMOOTH);
1841                                 }
1842                         }
1843                 }
1844         }
1845 }
1846
1847 static void rtl8192_TranslateRxSignalStuff(struct net_device *dev,
1848                                            struct sk_buff *skb,
1849                                            struct rtllib_rx_stats *pstats,
1850                                            struct rx_desc *pdesc,
1851                                            struct rx_fwinfo *pdrvinfo)
1852 {
1853         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1854         bool bpacket_match_bssid, bpacket_toself;
1855         bool bPacketBeacon = false;
1856         struct rtllib_hdr_3addr *hdr;
1857         bool bToSelfBA = false;
1858         static struct rtllib_rx_stats  previous_stats;
1859         u16 fc, type;
1860         u8 *tmp_buf;
1861         u8 *praddr;
1862
1863         tmp_buf = skb->data + pstats->RxDrvInfoSize + pstats->RxBufShift;
1864
1865         hdr = (struct rtllib_hdr_3addr *)tmp_buf;
1866         fc = le16_to_cpu(hdr->frame_ctl);
1867         type = WLAN_FC_GET_TYPE(fc);
1868         praddr = hdr->addr1;
1869
1870         bpacket_match_bssid =
1871                 ((RTLLIB_FTYPE_CTL != type) &&
1872                  ether_addr_equal(priv->rtllib->current_network.bssid,
1873                                   (fc & RTLLIB_FCTL_TODS) ? hdr->addr1 :
1874                                   (fc & RTLLIB_FCTL_FROMDS) ? hdr->addr2 :
1875                                   hdr->addr3) &&
1876                  (!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV));
1877         bpacket_toself = bpacket_match_bssid &&         /* check this */
1878                          ether_addr_equal(praddr, priv->rtllib->dev->dev_addr);
1879         if (WLAN_FC_GET_FRAMETYPE(fc) == RTLLIB_STYPE_BEACON)
1880                 bPacketBeacon = true;
1881         if (bpacket_match_bssid)
1882                 priv->stats.numpacket_matchbssid++;
1883         if (bpacket_toself)
1884                 priv->stats.numpacket_toself++;
1885         rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
1886         rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo,
1887                                   &previous_stats, bpacket_match_bssid,
1888                                   bpacket_toself, bPacketBeacon, bToSelfBA);
1889         rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
1890 }
1891
1892 static void rtl8192_UpdateReceivedRateHistogramStatistics(
1893                                            struct net_device *dev,
1894                                            struct rtllib_rx_stats *pstats)
1895 {
1896         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
1897         u32 rcvType = 1;
1898         u32 rateIndex;
1899         u32 preamble_guardinterval;
1900
1901         if (pstats->bCRC)
1902                 rcvType = 2;
1903         else if (pstats->bICV)
1904                 rcvType = 3;
1905
1906         if (pstats->bShortPreamble)
1907                 preamble_guardinterval = 1;
1908         else
1909                 preamble_guardinterval = 0;
1910
1911         switch (pstats->rate) {
1912         case MGN_1M:
1913                 rateIndex = 0;
1914                 break;
1915         case MGN_2M:
1916                 rateIndex = 1;
1917                  break;
1918         case MGN_5_5M:
1919                 rateIndex = 2;
1920                 break;
1921         case MGN_11M:
1922                 rateIndex = 3;
1923                 break;
1924         case MGN_6M:
1925                 rateIndex = 4;
1926                 break;
1927         case MGN_9M:
1928                 rateIndex = 5;
1929                 break;
1930         case MGN_12M:
1931                 rateIndex = 6;
1932                 break;
1933         case MGN_18M:
1934                 rateIndex = 7;
1935                  break;
1936         case MGN_24M:
1937                 rateIndex = 8;
1938                 break;
1939         case MGN_36M:
1940                 rateIndex = 9;
1941                 break;
1942         case MGN_48M:
1943                 rateIndex = 10;
1944                 break;
1945         case MGN_54M:
1946                 rateIndex = 11;
1947                 break;
1948         case MGN_MCS0:
1949                 rateIndex = 12;
1950                 break;
1951         case MGN_MCS1:
1952                 rateIndex = 13;
1953                 break;
1954         case MGN_MCS2:
1955                 rateIndex = 14;
1956                 break;
1957         case MGN_MCS3:
1958                 rateIndex = 15;
1959                 break;
1960         case MGN_MCS4:
1961                 rateIndex = 16;
1962                 break;
1963         case MGN_MCS5:
1964                 rateIndex = 17;
1965                 break;
1966         case MGN_MCS6:
1967                 rateIndex = 18;
1968                 break;
1969         case MGN_MCS7:
1970                 rateIndex = 19;
1971                 break;
1972         case MGN_MCS8:
1973                 rateIndex = 20;
1974                 break;
1975         case MGN_MCS9:
1976                 rateIndex = 21;
1977                 break;
1978         case MGN_MCS10:
1979                 rateIndex = 22;
1980                 break;
1981         case MGN_MCS11:
1982                 rateIndex = 23;
1983                 break;
1984         case MGN_MCS12:
1985                 rateIndex = 24;
1986                 break;
1987         case MGN_MCS13:
1988                 rateIndex = 25;
1989                 break;
1990         case MGN_MCS14:
1991                 rateIndex = 26;
1992                 break;
1993         case MGN_MCS15:
1994                 rateIndex = 27;
1995                 break;
1996         default:
1997                 rateIndex = 28;
1998                 break;
1999         }
2000         priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
2001         priv->stats.received_rate_histogram[0][rateIndex]++;
2002         priv->stats.received_rate_histogram[rcvType][rateIndex]++;
2003 }
2004
2005 bool rtl8192_rx_query_status_desc(struct net_device *dev,
2006                                   struct rtllib_rx_stats *stats,
2007                                   struct rx_desc *pdesc,
2008                                   struct sk_buff *skb)
2009 {
2010         struct r8192_priv *priv = rtllib_priv(dev);
2011
2012         stats->bICV = pdesc->ICV;
2013         stats->bCRC = pdesc->CRC32;
2014         stats->bHwError = pdesc->CRC32 | pdesc->ICV;
2015
2016         stats->Length = pdesc->Length;
2017         if (stats->Length < 24)
2018                 stats->bHwError |= 1;
2019
2020         if (stats->bHwError) {
2021                 stats->bShift = false;
2022
2023                 if (pdesc->CRC32) {
2024                         if (pdesc->Length < 500)
2025                                 priv->stats.rxcrcerrmin++;
2026                         else if (pdesc->Length > 1000)
2027                                 priv->stats.rxcrcerrmax++;
2028                         else
2029                                 priv->stats.rxcrcerrmid++;
2030                 }
2031                 return false;
2032         } else {
2033                 struct rx_fwinfo *pDrvInfo = NULL;
2034                 stats->RxDrvInfoSize = pdesc->RxDrvInfoSize;
2035                 stats->RxBufShift = ((pdesc->Shift)&0x03);
2036                 stats->Decrypted = !pdesc->SWDec;
2037
2038                 pDrvInfo = (struct rx_fwinfo *)(skb->data + stats->RxBufShift);
2039
2040                 stats->rate = HwRateToMRate90((bool)pDrvInfo->RxHT,
2041                                              (u8)pDrvInfo->RxRate);
2042                 stats->bShortPreamble = pDrvInfo->SPLCP;
2043
2044                 rtl8192_UpdateReceivedRateHistogramStatistics(dev, stats);
2045
2046                 stats->bIsAMPDU = (pDrvInfo->PartAggr == 1);
2047                 stats->bFirstMPDU = (pDrvInfo->PartAggr == 1) &&
2048                                     (pDrvInfo->FirstAGGR == 1);
2049
2050                 stats->TimeStampLow = pDrvInfo->TSFL;
2051                 stats->TimeStampHigh = read_nic_dword(dev, TSFR+4);
2052
2053                 rtl819x_UpdateRxPktTimeStamp(dev, stats);
2054
2055                 if ((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
2056                         stats->bShift = 1;
2057
2058                 stats->RxIs40MHzPacket = pDrvInfo->BW;
2059
2060                 rtl8192_TranslateRxSignalStuff(dev, skb, stats, pdesc,
2061                                                pDrvInfo);
2062
2063                 if (pDrvInfo->FirstAGGR == 1 || pDrvInfo->PartAggr == 1)
2064                         RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d,"
2065                                  " pDrvInfo->PartAggr = %d\n",
2066                                  pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
2067                 skb_trim(skb, skb->len - 4/*sCrcLng*/);
2068
2069
2070                 stats->packetlength = stats->Length-4;
2071                 stats->fraglength = stats->packetlength;
2072                 stats->fragoffset = 0;
2073                 stats->ntotalfrag = 1;
2074                 return true;
2075         }
2076 }
2077
2078 void rtl8192_halt_adapter(struct net_device *dev, bool reset)
2079 {
2080         struct r8192_priv *priv = rtllib_priv(dev);
2081         int i;
2082         u8      OpMode;
2083         u8      u1bTmp;
2084         u32     ulRegRead;
2085
2086         OpMode = RT_OP_MODE_NO_LINK;
2087         priv->rtllib->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
2088
2089         if (!priv->rtllib->bSupportRemoteWakeUp) {
2090                 u1bTmp = 0x0;
2091                 write_nic_byte(dev, CMDR, u1bTmp);
2092         }
2093
2094         mdelay(20);
2095
2096         if (!reset) {
2097                 mdelay(150);
2098
2099                 priv->bHwRfOffAction = 2;
2100
2101                 if (!priv->rtllib->bSupportRemoteWakeUp) {
2102                         PHY_SetRtl8192eRfOff(dev);
2103                         ulRegRead = read_nic_dword(dev, CPU_GEN);
2104                         ulRegRead |= CPU_GEN_SYSTEM_RESET;
2105                         write_nic_dword(dev, CPU_GEN, ulRegRead);
2106                 } else {
2107                         write_nic_dword(dev, WFCRC0, 0xffffffff);
2108                         write_nic_dword(dev, WFCRC1, 0xffffffff);
2109                         write_nic_dword(dev, WFCRC2, 0xffffffff);
2110
2111
2112                         write_nic_byte(dev, PMR, 0x5);
2113                         write_nic_byte(dev, MacBlkCtrl, 0xa);
2114                 }
2115         }
2116
2117         for (i = 0; i < MAX_QUEUE_SIZE; i++)
2118                 skb_queue_purge(&priv->rtllib->skb_waitQ[i]);
2119         for (i = 0; i < MAX_QUEUE_SIZE; i++)
2120                 skb_queue_purge(&priv->rtllib->skb_aggQ[i]);
2121
2122         skb_queue_purge(&priv->skb_queue);
2123         return;
2124 }
2125
2126 void rtl8192_update_ratr_table(struct net_device *dev)
2127 {
2128         struct r8192_priv *priv = rtllib_priv(dev);
2129         struct rtllib_device *ieee = priv->rtllib;
2130         u8 *pMcsRate = ieee->dot11HTOperationalRateSet;
2131         u32 ratr_value = 0;
2132         u16 rate_config = 0;
2133         u8 rate_index = 0;
2134
2135         rtl8192_config_rate(dev, &rate_config);
2136         ratr_value = rate_config | *pMcsRate << 12;
2137         switch (ieee->mode) {
2138         case IEEE_A:
2139                 ratr_value &= 0x00000FF0;
2140                 break;
2141         case IEEE_B:
2142                 ratr_value &= 0x0000000F;
2143                 break;
2144         case IEEE_G:
2145         case IEEE_G|IEEE_B:
2146                 ratr_value &= 0x00000FF7;
2147                 break;
2148         case IEEE_N_24G:
2149         case IEEE_N_5G:
2150                 if (ieee->pHTInfo->PeerMimoPs == 0) {
2151                         ratr_value &= 0x0007F007;
2152                 } else {
2153                         if (priv->rf_type == RF_1T2R)
2154                                 ratr_value &= 0x000FF007;
2155                         else
2156                                 ratr_value &= 0x0F81F007;
2157                 }
2158                 break;
2159         default:
2160                 break;
2161         }
2162         ratr_value &= 0x0FFFFFFF;
2163         if (ieee->pHTInfo->bCurTxBW40MHz &&
2164             ieee->pHTInfo->bCurShortGI40MHz)
2165                 ratr_value |= 0x80000000;
2166         else if (!ieee->pHTInfo->bCurTxBW40MHz &&
2167                   ieee->pHTInfo->bCurShortGI20MHz)
2168                 ratr_value |= 0x80000000;
2169         write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
2170         write_nic_byte(dev, UFWP, 1);
2171 }
2172
2173 void
2174 rtl8192_InitializeVariables(struct net_device  *dev)
2175 {
2176         struct r8192_priv *priv = rtllib_priv(dev);
2177
2178         strcpy(priv->nick, "rtl8192E");
2179
2180         priv->rtllib->softmac_features  = IEEE_SOFTMAC_SCAN |
2181                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2182                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE /* |
2183                 IEEE_SOFTMAC_BEACONS*/;
2184
2185         priv->rtllib->tx_headroom = sizeof(struct tx_fwinfo_8190pci);
2186
2187         priv->ShortRetryLimit = 0x30;
2188         priv->LongRetryLimit = 0x30;
2189
2190         priv->EarlyRxThreshold = 7;
2191         priv->pwrGroupCnt = 0;
2192
2193         priv->bIgnoreSilentReset = false;
2194         priv->enable_gpio0 = 0;
2195
2196         priv->TransmitConfig = 0;
2197
2198         priv->ReceiveConfig = RCR_ADD3  |
2199                 RCR_AMF | RCR_ADF |
2200                 RCR_AICV |
2201                 RCR_AB | RCR_AM | RCR_APM |
2202                 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2203                 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2204
2205         priv->irq_mask[0] = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK |
2206                             IMR_BEDOK | IMR_BKDOK | IMR_HCCADOK |
2207                             IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
2208                             IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 |
2209                             IMR_RDU | IMR_RXFOVW | IMR_TXFOVW |
2210                             IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2211
2212
2213         priv->MidHighPwrTHR_L1 = 0x3B;
2214         priv->MidHighPwrTHR_L2 = 0x40;
2215         priv->PwrDomainProtect = false;
2216
2217         priv->bfirst_after_down = false;
2218 }
2219
2220 void rtl8192_EnableInterrupt(struct net_device *dev)
2221 {
2222         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2223         priv->irq_enabled = 1;
2224
2225         write_nic_dword(dev, INTA_MASK, priv->irq_mask[0]);
2226
2227 }
2228
2229 void rtl8192_DisableInterrupt(struct net_device *dev)
2230 {
2231         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2232
2233         write_nic_dword(dev, INTA_MASK, 0);
2234
2235         priv->irq_enabled = 0;
2236 }
2237
2238 void rtl8192_ClearInterrupt(struct net_device *dev)
2239 {
2240         u32 tmp = 0;
2241         tmp = read_nic_dword(dev, ISR);
2242         write_nic_dword(dev, ISR, tmp);
2243 }
2244
2245
2246 void rtl8192_enable_rx(struct net_device *dev)
2247 {
2248         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2249         write_nic_dword(dev, RDQDA, priv->rx_ring_dma[RX_MPDU_QUEUE]);
2250 }
2251
2252 static const u32 TX_DESC_BASE[] = {
2253         BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA
2254 };
2255
2256 void rtl8192_enable_tx(struct net_device *dev)
2257 {
2258         struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
2259         u32 i;
2260
2261         for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
2262                 write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
2263 }
2264
2265
2266 void rtl8192_interrupt_recognized(struct net_device *dev, u32 *p_inta,
2267                                   u32 *p_intb)
2268 {
2269         *p_inta = read_nic_dword(dev, ISR);
2270         write_nic_dword(dev, ISR, *p_inta);
2271 }
2272
2273 bool rtl8192_HalRxCheckStuck(struct net_device *dev)
2274 {
2275         struct r8192_priv *priv = rtllib_priv(dev);
2276         u16               RegRxCounter = read_nic_word(dev, 0x130);
2277         bool              bStuck = false;
2278         static u8         rx_chk_cnt;
2279         u32             SlotIndex = 0, TotalRxStuckCount = 0;
2280         u8              i;
2281         u8              SilentResetRxSoltNum = 4;
2282
2283         RT_TRACE(COMP_RESET, "%s(): RegRxCounter is %d, RxCounter is %d\n",
2284                  __func__, RegRxCounter, priv->RxCounter);
2285
2286         rx_chk_cnt++;
2287         if (priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5)) {
2288                 rx_chk_cnt = 0;
2289         } else if ((priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High + 5))
2290           && (((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
2291           (priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_40M))
2292           || ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
2293           (priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_20M)))) {
2294                 if (rx_chk_cnt < 2)
2295                         return bStuck;
2296                 else
2297                         rx_chk_cnt = 0;
2298         } else if ((((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) &&
2299                   (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_40M)) ||
2300                 ((priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20) &&
2301                  (priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_20M))) &&
2302                 priv->undecorated_smoothed_pwdb >= VeryLowRSSI) {
2303                 if (rx_chk_cnt < 4)
2304                         return bStuck;
2305                 else
2306                         rx_chk_cnt = 0;
2307         } else {
2308                 if (rx_chk_cnt < 8)
2309                         return bStuck;
2310                 else
2311                         rx_chk_cnt = 0;
2312         }
2313
2314
2315         SlotIndex = (priv->SilentResetRxSlotIndex++)%SilentResetRxSoltNum;
2316
2317         if (priv->RxCounter == RegRxCounter) {
2318                 priv->SilentResetRxStuckEvent[SlotIndex] = 1;
2319
2320                 for (i = 0; i < SilentResetRxSoltNum; i++)
2321                         TotalRxStuckCount += priv->SilentResetRxStuckEvent[i];
2322
2323                 if (TotalRxStuckCount == SilentResetRxSoltNum) {
2324                         bStuck = true;
2325                         for (i = 0; i < SilentResetRxSoltNum; i++)
2326                                 TotalRxStuckCount +=
2327                                          priv->SilentResetRxStuckEvent[i];
2328                 }
2329
2330
2331         } else {
2332                 priv->SilentResetRxStuckEvent[SlotIndex] = 0;
2333         }
2334
2335         priv->RxCounter = RegRxCounter;
2336
2337         return bStuck;
2338 }
2339
2340 bool rtl8192_HalTxCheckStuck(struct net_device *dev)
2341 {
2342         struct r8192_priv *priv = rtllib_priv(dev);
2343         bool    bStuck = false;
2344         u16     RegTxCounter = read_nic_word(dev, 0x128);
2345
2346         RT_TRACE(COMP_RESET, "%s():RegTxCounter is %d,TxCounter is %d\n",
2347                  __func__, RegTxCounter, priv->TxCounter);
2348
2349         if (priv->TxCounter == RegTxCounter)
2350                 bStuck = true;
2351
2352         priv->TxCounter = RegTxCounter;
2353
2354         return bStuck;
2355 }
2356
2357 bool rtl8192_GetNmodeSupportBySecCfg(struct net_device *dev)
2358 {
2359         struct r8192_priv *priv = rtllib_priv(dev);
2360         struct rtllib_device *ieee = priv->rtllib;
2361         if (ieee->rtllib_ap_sec_type &&
2362            (ieee->rtllib_ap_sec_type(priv->rtllib)&(SEC_ALG_WEP |
2363                                      SEC_ALG_TKIP))) {
2364                 return false;
2365         } else {
2366                 return true;
2367         }
2368 }
2369
2370 bool rtl8192_GetHalfNmodeSupportByAPs(struct net_device *dev)
2371 {
2372         bool Reval;
2373         struct r8192_priv *priv = rtllib_priv(dev);
2374         struct rtllib_device *ieee = priv->rtllib;
2375
2376         if (ieee->bHalfWirelessN24GMode == true)
2377                 Reval = true;
2378         else
2379                 Reval =  false;
2380
2381         return Reval;
2382 }
2383
2384 u8 rtl8192_QueryIsShort(u8 TxHT, u8 TxRate, struct cb_desc *tcb_desc)
2385 {
2386         u8   tmp_Short;
2387
2388         tmp_Short = (TxHT == 1) ? ((tcb_desc->bUseShortGI) ? 1 : 0) :
2389                         ((tcb_desc->bUseShortPreamble) ? 1 : 0);
2390         if (TxHT == 1 && TxRate != DESC90_RATEMCS15)
2391                 tmp_Short = 0;
2392
2393         return tmp_Short;
2394 }
2395
2396 void ActUpdateChannelAccessSetting(struct net_device *dev,
2397         enum wireless_mode WirelessMode,
2398         struct channel_access_setting *ChnlAccessSetting)
2399 {
2400         return;
2401 }