drivers/staging/r8188eu/hal/rtl8188e_hal_init.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
   3
   4 #define _HAL_INIT_C_
   5
   6 #include "../include/linux/firmware.h"
   7 #include "../include/drv_types.h"
   8 #include "../include/rtw_efuse.h"
   9 #include "../include/rtl8188e_hal.h"
  10 #include "../include/rtw_iol.h"
  11 #include "../include/usb_ops.h"
  12
  13 static void iol_mode_enable(struct adapter *padapter, u8 enable)
  14 {
  15         u8 reg_0xf0 = 0;
  16
  17         if (enable) {
  18                 /* Enable initial offload */
  19                 reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
  20                 rtw_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
  21
  22                 if (!padapter->bFWReady) {
  23                         DBG_88E("bFWReady == false call reset 8051...\n");
  24                         _8051Reset88E(padapter);
  25                 }
  26
  27         } else {
  28                 /* disable initial offload */
  29                 reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
  30                 rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
  31         }
  32 }
  33
  34 static s32 iol_execute(struct adapter *padapter, u8 control)
  35 {
  36         s32 status = _FAIL;
  37         u8 reg_0x88 = 0;
  38         u32 start = 0, passing_time = 0;
  39
  40         control = control&0x0f;
  41         reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
  42         rtw_write8(padapter, REG_HMEBOX_E0,  reg_0x88|control);
  43
  44         start = jiffies;
  45         while ((reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0)) & control &&
  46                (passing_time = rtw_get_passing_time_ms(start)) < 1000) {
  47                 ;
  48         }
  49
  50         reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
  51         status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
  52         if (reg_0x88 & control<<4)
  53                 status = _FAIL;
  54         return status;
  55 }
  56
  57 static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
  58 {
  59         s32 rst = _SUCCESS;
  60         iol_mode_enable(padapter, 1);
  61         rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
  62         rst = iol_execute(padapter, CMD_INIT_LLT);
  63         iol_mode_enable(padapter, 0);
  64         return rst;
  65 }
  66
  67 static void
  68 efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8  *pbuf)
  69 {
  70         u8 *efuseTbl = NULL;
  71         u8 rtemp8;
  72         u16     eFuse_Addr = 0;
  73         u8 offset, wren;
  74         u16     i, j;
  75         u16     **eFuseWord = NULL;
  76         u16     efuse_utilized = 0;
  77         u8 u1temp = 0;
  78
  79         efuseTbl = (u8 *)rtw_zmalloc(EFUSE_MAP_LEN_88E);
  80         if (efuseTbl == NULL) {
  81                 DBG_88E("%s: alloc efuseTbl fail!\n", __func__);
  82                 goto exit;
  83         }
  84
  85         eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
  86         if (eFuseWord == NULL) {
  87                 DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
  88                 goto exit;
  89         }
  90
  91         /*  0. Refresh efuse init map as all oxFF. */
  92         for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
  93                 for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
  94                         eFuseWord[i][j] = 0xFFFF;
  95
  96         /*  */
  97         /*  1. Read the first byte to check if efuse is empty!!! */
  98         /*  */
  99         /*  */
 100         rtemp8 = *(phymap+eFuse_Addr);
 101         if (rtemp8 != 0xFF) {
 102                 efuse_utilized++;
 103                 eFuse_Addr++;
 104         } else {
 105                 DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, rtemp8);
 106                 goto exit;
 107         }
 108
 109         /*  */
 110         /*  2. Read real efuse content. Filter PG header and every section data. */
 111         /*  */
 112         while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
 113                 /*  Check PG header for section num. */
 114                 if ((rtemp8 & 0x1F) == 0x0F) {          /* extended header */
 115                         u1temp = ((rtemp8 & 0xE0) >> 5);
 116                         rtemp8 = *(phymap+eFuse_Addr);
 117                         if ((rtemp8 & 0x0F) == 0x0F) {
 118                                 eFuse_Addr++;
 119                                 rtemp8 = *(phymap+eFuse_Addr);
 120
 121                                 if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
 122                                         eFuse_Addr++;
 123                                 continue;
 124                         } else {
 125                                 offset = ((rtemp8 & 0xF0) >> 1) | u1temp;
 126                                 wren = (rtemp8 & 0x0F);
 127                                 eFuse_Addr++;
 128                         }
 129                 } else {
 130                         offset = ((rtemp8 >> 4) & 0x0f);
 131                         wren = (rtemp8 & 0x0f);
 132                 }
 133
 134                 if (offset < EFUSE_MAX_SECTION_88E) {
 135                         /*  Get word enable value from PG header */
 136                         for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
 137                                 /*  Check word enable condition in the section */
 138                                 if (!(wren & 0x01)) {
 139                                         rtemp8 = *(phymap+eFuse_Addr);
 140                                         eFuse_Addr++;
 141                                         efuse_utilized++;
 142                                         eFuseWord[offset][i] = (rtemp8 & 0xff);
 143                                         if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
 144                                                 break;
 145                                         rtemp8 = *(phymap+eFuse_Addr);
 146                                         eFuse_Addr++;
 147                                         efuse_utilized++;
 148                                         eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00);
 149
 150                                         if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
 151                                                 break;
 152                                 }
 153                                 wren >>= 1;
 154                         }
 155                 }
 156                 /*  Read next PG header */
 157                 rtemp8 = *(phymap+eFuse_Addr);
 158
 159                 if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
 160                         efuse_utilized++;
 161                         eFuse_Addr++;
 162                 }
 163         }
 164
 165         /*  */
 166         /*  3. Collect 16 sections and 4 word unit into Efuse map. */
 167         /*  */
 168         for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) {
 169                 for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
 170                         efuseTbl[(i*8)+(j*2)] = (eFuseWord[i][j] & 0xff);
 171                         efuseTbl[(i*8)+((j*2)+1)] = ((eFuseWord[i][j] >> 8) & 0xff);
 172                 }
 173         }
 174
 175         /*  */
 176         /*  4. Copy from Efuse map to output pointer memory!!! */
 177         /*  */
 178         for (i = 0; i < _size_byte; i++)
 179                 pbuf[i] = efuseTbl[_offset+i];
 180
 181         /*  */
 182         /*  5. Calculate Efuse utilization. */
 183         /*  */
 184
 185 exit:
 186         kfree(efuseTbl);
 187         kfree(eFuseWord);
 188 }
 189
 190 static void efuse_read_phymap_from_txpktbuf(
 191         struct adapter  *adapter,
 192         int bcnhead,    /* beacon head, where FW store len(2-byte) and efuse physical map. */
 193         u8 *content,    /* buffer to store efuse physical map */
 194         u16 *size       /* for efuse content: the max byte to read. will update to byte read */
 195         )
 196 {
 197         u16 dbg_addr = 0;
 198         u32 start  = 0, passing_time = 0;
 199         u8 reg_0x143 = 0;
 200         __le32 lo32 = 0, hi32 = 0;
 201         u16 len = 0, count = 0;
 202         int i = 0;
 203         u16 limit = *size;
 204
 205         u8 *pos = content;
 206
 207         if (bcnhead < 0) /* if not valid */
 208                 bcnhead = rtw_read8(adapter, REG_TDECTRL+1);
 209
 210         DBG_88E("%s bcnhead:%d\n", __func__, bcnhead);
 211
 212         rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
 213
 214         dbg_addr = bcnhead*128/8; /* 8-bytes addressing */
 215
 216         while (1) {
 217                 rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr+i);
 218
 219                 rtw_write8(adapter, REG_TXPKTBUF_DBG, 0);
 220                 start = jiffies;
 221                 while (!(reg_0x143 = rtw_read8(adapter, REG_TXPKTBUF_DBG)) &&
 222                        (passing_time = rtw_get_passing_time_ms(start)) < 1000) {
 223                         DBG_88E("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __func__, reg_0x143, rtw_read8(adapter, 0x106));
 224                         rtw_usleep_os(100);
 225                 }
 226
 227                 /* data from EEPROM needs to be in LE */
 228                 lo32 = cpu_to_le32(rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L));
 229                 hi32 = cpu_to_le32(rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H));
 230
 231                 if (i == 0) {
 232                         /* Although lenc is only used in a debug statement,
 233                          * do not remove it as the rtw_read16() call consumes
 234                          * 2 bytes from the EEPROM source.
 235                          */
 236                         u16 lenc = rtw_read16(adapter, REG_PKTBUF_DBG_DATA_L);
 237
 238                         len = le32_to_cpu(lo32) & 0x0000ffff;
 239
 240                         limit = (len-2 < limit) ? len-2 : limit;
 241
 242                         DBG_88E("%s len:%u, lenc:%u\n", __func__, len, lenc);
 243
 244                         memcpy(pos, ((u8 *)&lo32)+2, (limit >= count+2) ? 2 : limit-count);
 245                         count += (limit >= count+2) ? 2 : limit-count;
 246                         pos = content+count;
 247                 } else {
 248                         memcpy(pos, ((u8 *)&lo32), (limit >= count+4) ? 4 : limit-count);
 249                         count += (limit >= count+4) ? 4 : limit-count;
 250                         pos = content+count;
 251                 }
 252
 253                 if (limit > count && len-2 > count) {
 254                         memcpy(pos, (u8 *)&hi32, (limit >= count+4) ? 4 : limit-count);
 255                         count += (limit >= count+4) ? 4 : limit-count;
 256                         pos = content+count;
 257                 }
 258
 259                 if (limit <= count || len-2 <= count)
 260                         break;
 261                 i++;
 262         }
 263         rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS);
 264         DBG_88E("%s read count:%u\n", __func__, count);
 265         *size = count;
 266 }
 267
 268 static s32 iol_read_efuse(struct adapter *padapter, u8 txpktbuf_bndy, u16 offset, u16 size_byte, u8 *logical_map)
 269 {
 270         s32 status = _FAIL;
 271         u8 physical_map[512];
 272         u16 size = 512;
 273
 274         rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
 275         memset(physical_map, 0xFF, 512);
 276         rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
 277         status = iol_execute(padapter, CMD_READ_EFUSE_MAP);
 278         if (status == _SUCCESS)
 279                 efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size);
 280         efuse_phymap_to_logical(physical_map, offset, size_byte, logical_map);
 281         return status;
 282 }
 283
 284 s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
 285 {
 286         s32     result = _SUCCESS;
 287
 288         DBG_88E("==> %s\n", __func__);
 289         if (rtw_IOL_applied(padapter)) {
 290                 iol_mode_enable(padapter, 1);
 291                 result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
 292                 if (result == _SUCCESS)
 293                         result = iol_execute(padapter, CMD_EFUSE_PATCH);
 294
 295                 iol_mode_enable(padapter, 0);
 296         }
 297         return result;
 298 }
 299
 300 static s32 iol_ioconfig(struct adapter *padapter, u8 iocfg_bndy)
 301 {
 302         s32 rst = _SUCCESS;
 303
 304         rtw_write8(padapter, REG_TDECTRL+1, iocfg_bndy);
 305         rst = iol_execute(padapter, CMD_IOCONFIG);
 306         return rst;
 307 }
 308
 309 static int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
 310 {
 311         struct pkt_attrib *pattrib = &xmit_frame->attrib;
 312         u8 i;
 313         int ret = _FAIL;
 314
 315         if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
 316                 goto exit;
 317         if (rtw_usb_bulk_size_boundary(adapter, TXDESC_SIZE+pattrib->last_txcmdsz)) {
 318                 if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
 319                         goto exit;
 320         }
 321
 322         dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms);
 323
 324         iol_mode_enable(adapter, 1);
 325         for (i = 0; i < bndy_cnt; i++) {
 326                 u8 page_no = 0;
 327                 page_no = i*2;
 328                 ret = iol_ioconfig(adapter, page_no);
 329                 if (ret != _SUCCESS)
 330                         break;
 331         }
 332         iol_mode_enable(adapter, 0);
 333 exit:
 334         /* restore BCN_HEAD */
 335         rtw_write8(adapter, REG_TDECTRL+1, 0);
 336         return ret;
 337 }
 338
 339 void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter, int data_len)
 340 {
 341         u32 fifo_data, reg_140;
 342         u32 addr, rstatus, loop = 0;
 343         u16 data_cnts = (data_len/8)+1;
 344         u8 *pbuf = rtw_zvmalloc(data_len+10);
 345         DBG_88E("###### %s ######\n", __func__);
 346
 347         rtw_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
 348         if (pbuf) {
 349                 for (addr = 0; addr < data_cnts; addr++) {
 350                         rtw_write32(Adapter, 0x140, addr);
 351                         rtw_usleep_os(2);
 352                         loop = 0;
 353                         do {
 354                                 rstatus = (reg_140 = rtw_read32(Adapter, REG_PKTBUF_DBG_CTRL)&BIT24);
 355                                 if (rstatus) {
 356                                         fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_L);
 357                                         memcpy(pbuf+(addr*8), &fifo_data, 4);
 358
 359                                         fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_H);
 360                                         memcpy(pbuf+(addr*8+4), &fifo_data, 4);
 361                                 }
 362                                 rtw_usleep_os(2);
 363                         } while (!rstatus && (loop++ < 10));
 364                 }
 365                 rtw_IOL_cmd_buf_dump(Adapter, data_len, pbuf);
 366                 rtw_vmfree(pbuf, data_len+10);
 367         }
 368         DBG_88E("###### %s ######\n", __func__);
 369 }
 370
 371 static void _FWDownloadEnable(struct adapter *padapter, bool enable)
 372 {
 373         u8 tmp;
 374
 375         if (enable) {
 376                 /*  MCU firmware download enable. */
 377                 tmp = rtw_read8(padapter, REG_MCUFWDL);
 378                 rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01);
 379
 380                 /*  8051 reset */
 381                 tmp = rtw_read8(padapter, REG_MCUFWDL+2);
 382                 rtw_write8(padapter, REG_MCUFWDL+2, tmp&0xf7);
 383         } else {
 384                 /*  MCU firmware download disable. */
 385                 tmp = rtw_read8(padapter, REG_MCUFWDL);
 386                 rtw_write8(padapter, REG_MCUFWDL, tmp&0xfe);
 387
 388                 /*  Reserved for fw extension. */
 389                 rtw_write8(padapter, REG_MCUFWDL+1, 0x00);
 390         }
 391 }
 392
 393 #define MAX_REG_BOLCK_SIZE      196
 394
 395 static int _BlockWrite(struct adapter *padapter, void *buffer, u32 buffSize)
 396 {
 397         int ret = _SUCCESS;
 398         u32     blockSize_p1 = 4;       /*  (Default) Phase #1 : PCI muse use 4-byte write to download FW */
 399         u32     blockSize_p2 = 8;       /*  Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. */
 400         u32     blockSize_p3 = 1;       /*  Phase #3 : Use 1-byte, the remnant of FW image. */
 401         u32     blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0;
 402         u32     remainSize_p1 = 0, remainSize_p2 = 0;
 403         u8 *bufferPtr   = (u8 *)buffer;
 404         u32     i = 0, offset = 0;
 405
 406         blockSize_p1 = MAX_REG_BOLCK_SIZE;
 407
 408         /* 3 Phase #1 */
 409         blockCount_p1 = buffSize / blockSize_p1;
 410         remainSize_p1 = buffSize % blockSize_p1;
 411
 412         if (blockCount_p1) {
 413                 RT_TRACE(_module_hal_init_c_, _drv_notice_,
 414                          ("_BlockWrite: [P1] buffSize(%d) blockSize_p1(%d) blockCount_p1(%d) remainSize_p1(%d)\n",
 415                          buffSize, blockSize_p1, blockCount_p1, remainSize_p1));
 416         }
 417
 418         for (i = 0; i < blockCount_p1; i++) {
 419                 ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1));
 420                 if (ret == _FAIL)
 421                         goto exit;
 422         }
 423
 424         /* 3 Phase #2 */
 425         if (remainSize_p1) {
 426                 offset = blockCount_p1 * blockSize_p1;
 427
 428                 blockCount_p2 = remainSize_p1/blockSize_p2;
 429                 remainSize_p2 = remainSize_p1%blockSize_p2;
 430
 431                 if (blockCount_p2) {
 432                                 RT_TRACE(_module_hal_init_c_, _drv_notice_,
 433                                          ("_BlockWrite: [P2] buffSize_p2(%d) blockSize_p2(%d) blockCount_p2(%d) remainSize_p2(%d)\n",
 434                                          (buffSize-offset), blockSize_p2, blockCount_p2, remainSize_p2));
 435                 }
 436
 437                 for (i = 0; i < blockCount_p2; i++) {
 438                         ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2));
 439
 440                         if (ret == _FAIL)
 441                                 goto exit;
 442                 }
 443         }
 444
 445         /* 3 Phase #3 */
 446         if (remainSize_p2) {
 447                 offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2);
 448
 449                 blockCount_p3 = remainSize_p2 / blockSize_p3;
 450
 451                 RT_TRACE(_module_hal_init_c_, _drv_notice_,
 452                          ("_BlockWrite: [P3] buffSize_p3(%d) blockSize_p3(%d) blockCount_p3(%d)\n",
 453                          (buffSize-offset), blockSize_p3, blockCount_p3));
 454
 455                 for (i = 0; i < blockCount_p3; i++) {
 456                         ret = rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i));
 457
 458                         if (ret == _FAIL)
 459                                 goto exit;
 460                 }
 461         }
 462
 463 exit:
 464         return ret;
 465 }
 466
 467 static int _PageWrite(struct adapter *padapter, u32 page, void *buffer, u32 size)
 468 {
 469         u8 value8;
 470         u8 u8Page = (u8)(page & 0x07);
 471
 472         value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page;
 473         rtw_write8(padapter, REG_MCUFWDL+2, value8);
 474
 475         return _BlockWrite(padapter, buffer, size);
 476 }
 477
 478 static int _WriteFW(struct adapter *padapter, void *buffer, u32 size)
 479 {
 480         /*  Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */
 481         /*  We can remove _ReadChipVersion from ReadpadapterInfo8192C later. */
 482         int ret = _SUCCESS;
 483         u32     pageNums, remainSize;
 484         u32     page, offset;
 485         u8 *bufferPtr = (u8 *)buffer;
 486
 487         pageNums = size / MAX_PAGE_SIZE;
 488         remainSize = size % MAX_PAGE_SIZE;
 489
 490         for (page = 0; page < pageNums; page++) {
 491                 offset = page * MAX_PAGE_SIZE;
 492                 ret = _PageWrite(padapter, page, bufferPtr+offset, MAX_PAGE_SIZE);
 493
 494                 if (ret == _FAIL)
 495                         goto exit;
 496         }
 497         if (remainSize) {
 498                 offset = pageNums * MAX_PAGE_SIZE;
 499                 page = pageNums;
 500                 ret = _PageWrite(padapter, page, bufferPtr+offset, remainSize);
 501
 502                 if (ret == _FAIL)
 503                         goto exit;
 504         }
 505         RT_TRACE(_module_hal_init_c_, _drv_info_, ("_WriteFW Done- for Normal chip.\n"));
 506 exit:
 507         return ret;
 508 }
 509
 510 void _8051Reset88E(struct adapter *padapter)
 511 {
 512         u8 u1bTmp;
 513
 514         u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
 515         rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2));
 516         rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2));
 517         DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
 518 }
 519
 520 static s32 _FWFreeToGo(struct adapter *padapter)
 521 {
 522         u32     counter = 0;
 523         u32     value32;
 524
 525         /*  polling CheckSum report */
 526         do {
 527                 value32 = rtw_read32(padapter, REG_MCUFWDL);
 528                 if (value32 & FWDL_ChkSum_rpt)
 529                         break;
 530         } while (counter++ < POLLING_READY_TIMEOUT_COUNT);
 531
 532         if (counter >= POLLING_READY_TIMEOUT_COUNT) {
 533                 DBG_88E("%s: chksum report fail! REG_MCUFWDL:0x%08x\n", __func__, value32);
 534                 return _FAIL;
 535         }
 536         DBG_88E("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__, value32);
 537
 538         value32 = rtw_read32(padapter, REG_MCUFWDL);
 539         value32 |= MCUFWDL_RDY;
 540         value32 &= ~WINTINI_RDY;
 541         rtw_write32(padapter, REG_MCUFWDL, value32);
 542
 543         _8051Reset88E(padapter);
 544
 545         /*  polling for FW ready */
 546         counter = 0;
 547         do {
 548                 value32 = rtw_read32(padapter, REG_MCUFWDL);
 549                 if (value32 & WINTINI_RDY) {
 550                         DBG_88E("%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n", __func__, value32);
 551                         return _SUCCESS;
 552                 }
 553                 rtw_udelay_os(5);
 554         } while (counter++ < POLLING_READY_TIMEOUT_COUNT);
 555
 556         DBG_88E("%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n", __func__, value32);
 557         return _FAIL;
 558 }
 559
 560 #define IS_FW_81xxC(padapter)   (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0)
 561
 562 static int load_firmware(struct rt_firmware *pFirmware, struct device *device)
 563 {
 564         s32     rtStatus = _SUCCESS;
 565         const struct firmware *fw;
 566         const char *fw_name = "rtlwifi/rtl8188eufw.bin";
 567         int err = request_firmware(&fw, fw_name, device);
 568
 569         if (err) {
 570                 pr_err("Request firmware failed with error 0x%x\n", err);
 571                 rtStatus = _FAIL;
 572                 goto Exit;
 573         }
 574         if (!fw) {
 575                 pr_err("Firmware %s not available\n", fw_name);
 576                 rtStatus = _FAIL;
 577                 goto Exit;
 578         }
 579         if (fw->size > FW_8188E_SIZE) {
 580                 rtStatus = _FAIL;
 581                 RT_TRACE(_module_hal_init_c_, _drv_err_, ("Firmware size exceed 0x%X. Check it.\n", FW_8188E_SIZE));
 582                 goto Exit;
 583         }
 584
 585         pFirmware->szFwBuffer = kzalloc(FW_8188E_SIZE, GFP_KERNEL);
 586         if (!pFirmware->szFwBuffer) {
 587                 pr_err("Failed to allocate pFirmware->szFwBuffer\n");
 588                 rtStatus = _FAIL;
 589                 goto Exit;
 590         }
 591         memcpy(pFirmware->szFwBuffer, fw->data, fw->size);
 592         pFirmware->ulFwLength = fw->size;
 593         release_firmware(fw);
 594         DBG_88E_LEVEL(_drv_info_, "+%s: !bUsedWoWLANFw, FmrmwareLen:%d+\n", __func__, pFirmware->ulFwLength);
 595
 596 Exit:
 597         return rtStatus;
 598 }
 599
 600 s32 rtl8188e_FirmwareDownload(struct adapter *padapter)
 601 {
 602         s32     rtStatus = _SUCCESS;
 603         u8 writeFW_retry = 0;
 604         u32 fwdl_start_time;
 605         struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
 606         struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 607         struct device *device = dvobj_to_dev(dvobj);
 608         struct rt_firmware_hdr *pFwHdr = NULL;
 609         u8 *pFirmwareBuf;
 610         u32 FirmwareLen;
 611         static int log_version;
 612
 613         RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __func__));
 614         if (!dvobj->firmware.szFwBuffer)
 615                 rtStatus = load_firmware(&dvobj->firmware, device);
 616         if (rtStatus == _FAIL) {
 617                 dvobj->firmware.szFwBuffer = NULL;
 618                 goto Exit;
 619         }
 620         pFirmwareBuf = dvobj->firmware.szFwBuffer;
 621         FirmwareLen = dvobj->firmware.ulFwLength;
 622
 623         /*  To Check Fw header. Added by tynli. 2009.12.04. */
 624         pFwHdr = (struct rt_firmware_hdr *)dvobj->firmware.szFwBuffer;
 625
 626         pHalData->FirmwareVersion =  le16_to_cpu(pFwHdr->Version);
 627         pHalData->FirmwareSubVersion = pFwHdr->Subversion;
 628         pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature);
 629
 630         if (!log_version++)
 631                 pr_info("%sFirmware Version %d, SubVersion %d, Signature 0x%x\n",
 632                         DRIVER_PREFIX, pHalData->FirmwareVersion,
 633                         pHalData->FirmwareSubVersion, pHalData->FirmwareSignature);
 634
 635         if (IS_FW_HEADER_EXIST(pFwHdr)) {
 636                 /*  Shift 32 bytes for FW header */
 637                 pFirmwareBuf = pFirmwareBuf + 32;
 638                 FirmwareLen = FirmwareLen - 32;
 639         }
 640
 641         /*  Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */
 642         /*  or it will cause download Fw fail. 2010.02.01. by tynli. */
 643         if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */
 644                 rtw_write8(padapter, REG_MCUFWDL, 0x00);
 645                 _8051Reset88E(padapter);
 646         }
 647
 648         _FWDownloadEnable(padapter, true);
 649         fwdl_start_time = jiffies;
 650         while (1) {
 651                 /* reset the FWDL chksum */
 652                 rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt);
 653
 654                 rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen);
 655
 656                 if (rtStatus == _SUCCESS ||
 657                     (rtw_get_passing_time_ms(fwdl_start_time) > 500 && writeFW_retry++ >= 3))
 658                         break;
 659
 660                 DBG_88E("%s writeFW_retry:%u, time after fwdl_start_time:%ums\n",
 661                         __func__, writeFW_retry, rtw_get_passing_time_ms(fwdl_start_time)
 662                 );
 663         }
 664         _FWDownloadEnable(padapter, false);
 665         if (_SUCCESS != rtStatus) {
 666                 DBG_88E("DL Firmware failed!\n");
 667                 goto Exit;
 668         }
 669
 670         rtStatus = _FWFreeToGo(padapter);
 671         if (_SUCCESS != rtStatus) {
 672                 DBG_88E("DL Firmware failed!\n");
 673                 goto Exit;
 674         }
 675         RT_TRACE(_module_hal_init_c_, _drv_info_, ("Firmware is ready to run!\n"));
 676
 677 Exit:
 678         return rtStatus;
 679 }
 680
 681 void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
 682 {
 683         struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
 684
 685         /*  Init Fw LPS related. */
 686         padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
 687
 688         /*  Init H2C counter. by tynli. 2009.12.09. */
 689         pHalData->LastHMEBoxNum = 0;
 690 }
 691
 692 static void rtl8188e_free_hal_data(struct adapter *padapter)
 693 {
 694
 695         kfree(padapter->HalData);
 696         padapter->HalData = NULL;
 697
 698 }
 699
 700 /*  */
 701 /*                      Efuse related code */
 702 /*  */
 703 enum{
 704                 VOLTAGE_V25                                             = 0x03,
 705                 LDOE25_SHIFT                                            = 28,
 706         };
 707
 708 static bool
 709 hal_EfusePgPacketWrite2ByteHeader(
 710                 struct adapter *pAdapter,
 711                 u8 efuseType,
 712                 u16                             *pAddr,
 713                 struct pgpkt *pTargetPkt,
 714                 bool bPseudoTest);
 715 static bool
 716 hal_EfusePgPacketWrite1ByteHeader(
 717                 struct adapter *pAdapter,
 718                 u8 efuseType,
 719                 u16                             *pAddr,
 720                 struct pgpkt *pTargetPkt,
 721                 bool bPseudoTest);
 722 static bool
 723 hal_EfusePgPacketWriteData(
 724                 struct adapter *pAdapter,
 725                 u8 efuseType,
 726                 u16                             *pAddr,
 727                 struct pgpkt *pTargetPkt,
 728                 bool bPseudoTest);
 729
 730 static void
 731 hal_EfusePowerSwitch_RTL8188E(
 732                 struct adapter *pAdapter,
 733                 u8 bWrite,
 734                 u8 PwrState)
 735 {
 736         u8 tempval;
 737         u16     tmpV16;
 738
 739         if (PwrState) {
 740                 rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
 741
 742                 /*  1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */
 743                 tmpV16 = rtw_read16(pAdapter, REG_SYS_ISO_CTRL);
 744                 if (!(tmpV16 & PWC_EV12V)) {
 745                         tmpV16 |= PWC_EV12V;
 746                          rtw_write16(pAdapter, REG_SYS_ISO_CTRL, tmpV16);
 747                 }
 748                 /*  Reset: 0x0000h[28], default valid */
 749                 tmpV16 =  rtw_read16(pAdapter, REG_SYS_FUNC_EN);
 750                 if (!(tmpV16 & FEN_ELDR)) {
 751                         tmpV16 |= FEN_ELDR;
 752                         rtw_write16(pAdapter, REG_SYS_FUNC_EN, tmpV16);
 753                 }
 754
 755                 /*  Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */
 756                 tmpV16 = rtw_read16(pAdapter, REG_SYS_CLKR);
 757                 if ((!(tmpV16 & LOADER_CLK_EN))  || (!(tmpV16 & ANA8M))) {
 758                         tmpV16 |= (LOADER_CLK_EN | ANA8M);
 759                         rtw_write16(pAdapter, REG_SYS_CLKR, tmpV16);
 760                 }
 761
 762                 if (bWrite) {
 763                         /*  Enable LDO 2.5V before read/write action */
 764                         tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
 765                         tempval &= 0x0F;
 766                         tempval |= (VOLTAGE_V25 << 4);
 767                         rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80));
 768                 }
 769         } else {
 770                 rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);
 771
 772                 if (bWrite) {
 773                         /*  Disable LDO 2.5V after read/write action */
 774                         tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
 775                         rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F));
 776                 }
 777         }
 778 }
 779
 780 static void
 781 rtl8188e_EfusePowerSwitch(
 782                 struct adapter *pAdapter,
 783                 u8 bWrite,
 784                 u8 PwrState)
 785 {
 786         hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState);
 787 }
 788
 789 static void Hal_EfuseReadEFuse88E(struct adapter *Adapter,
 790         u16                     _offset,
 791         u16                     _size_byte,
 792         u8 *pbuf,
 793                 bool bPseudoTest
 794         )
 795 {
 796         u8 *efuseTbl = NULL;
 797         u8 rtemp8[1];
 798         u16     eFuse_Addr = 0;
 799         u8 offset, wren;
 800         u16     i, j;
 801         u16     **eFuseWord = NULL;
 802         u16     efuse_utilized = 0;
 803         u8 u1temp = 0;
 804
 805         /*  */
 806         /*  Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */
 807         /*  */
 808         if ((_offset + _size_byte) > EFUSE_MAP_LEN_88E) {/*  total E-Fuse table is 512bytes */
 809                 DBG_88E("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n", _offset, _size_byte);
 810                 goto exit;
 811         }
 812
 813         efuseTbl = (u8 *)rtw_zmalloc(EFUSE_MAP_LEN_88E);
 814         if (efuseTbl == NULL) {
 815                 DBG_88E("%s: alloc efuseTbl fail!\n", __func__);
 816                 goto exit;
 817         }
 818
 819         eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
 820         if (eFuseWord == NULL) {
 821                 DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
 822                 goto exit;
 823         }
 824
 825         /*  0. Refresh efuse init map as all oxFF. */
 826         for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
 827                 for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
 828                         eFuseWord[i][j] = 0xFFFF;
 829
 830         /*  */
 831         /*  1. Read the first byte to check if efuse is empty!!! */
 832         /*  */
 833         /*  */
 834         ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
 835         if (*rtemp8 != 0xFF) {
 836                 efuse_utilized++;
 837                 eFuse_Addr++;
 838         } else {
 839                 DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, *rtemp8);
 840                 goto exit;
 841         }
 842
 843         /*  */
 844         /*  2. Read real efuse content. Filter PG header and every section data. */
 845         /*  */
 846         while ((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
 847                 /*  Check PG header for section num. */
 848                 if ((*rtemp8 & 0x1F) == 0x0F) {         /* extended header */
 849                         u1temp = ((*rtemp8 & 0xE0) >> 5);
 850
 851                         ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
 852
 853                         if ((*rtemp8 & 0x0F) == 0x0F) {
 854                                 eFuse_Addr++;
 855                                 ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
 856
 857                                 if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
 858                                         eFuse_Addr++;
 859                                 continue;
 860                         } else {
 861                                 offset = ((*rtemp8 & 0xF0) >> 1) | u1temp;
 862                                 wren = (*rtemp8 & 0x0F);
 863                                 eFuse_Addr++;
 864                         }
 865                 } else {
 866                         offset = ((*rtemp8 >> 4) & 0x0f);
 867                         wren = (*rtemp8 & 0x0f);
 868                 }
 869
 870                 if (offset < EFUSE_MAX_SECTION_88E) {
 871                         /*  Get word enable value from PG header */
 872
 873                         for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
 874                                 /*  Check word enable condition in the section */
 875                                 if (!(wren & 0x01)) {
 876                                         ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
 877                                         eFuse_Addr++;
 878                                         efuse_utilized++;
 879                                         eFuseWord[offset][i] = (*rtemp8 & 0xff);
 880                                         if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
 881                                                 break;
 882                                         ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
 883                                         eFuse_Addr++;
 884                                         efuse_utilized++;
 885                                         eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00);
 886                                         if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
 887                                                 break;
 888                                 }
 889                                 wren >>= 1;
 890                         }
 891                 }
 892
 893                 /*  Read next PG header */
 894                 ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
 895
 896                 if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
 897                         efuse_utilized++;
 898                         eFuse_Addr++;
 899                 }
 900         }
 901
 902         /*  3. Collect 16 sections and 4 word unit into Efuse map. */
 903         for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) {
 904                 for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
 905                         efuseTbl[(i*8)+(j*2)] = (eFuseWord[i][j] & 0xff);
 906                         efuseTbl[(i*8)+((j*2)+1)] = ((eFuseWord[i][j] >> 8) & 0xff);
 907                 }
 908         }
 909
 910         /*  4. Copy from Efuse map to output pointer memory!!! */
 911         for (i = 0; i < _size_byte; i++)
 912                 pbuf[i] = efuseTbl[_offset+i];
 913
 914         /*  5. Calculate Efuse utilization. */
 915         rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr);
 916
 917 exit:
 918         kfree(efuseTbl);
 919         kfree(eFuseWord);
 920 }
 921
 922 static void ReadEFuseByIC(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest)
 923 {
 924         if (!bPseudoTest) {
 925                 int ret = _FAIL;
 926                 if (rtw_IOL_applied(Adapter)) {
 927                         rtw_hal_power_on(Adapter);
 928
 929                         iol_mode_enable(Adapter, 1);
 930                         ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf);
 931                         iol_mode_enable(Adapter, 0);
 932
 933                         if (_SUCCESS == ret)
 934                                 goto exit;
 935                 }
 936         }
 937         Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
 938
 939 exit:
 940         return;
 941 }
 942
 943 static void ReadEFuse_Pseudo(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest)
 944 {
 945         Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
 946 }
 947
 948 static void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType,
 949                                u16 _offset, u16 _size_byte, u8 *pbuf,
 950                                bool bPseudoTest)
 951 {
 952         if (bPseudoTest)
 953                 ReadEFuse_Pseudo (Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
 954         else
 955                 ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
 956 }
 957
 958 /* Do not support BT */
 959 static void Hal_EFUSEGetEfuseDefinition88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut)
 960 {
 961         switch (type) {
 962         case TYPE_EFUSE_MAX_SECTION:
 963                 {
 964                         u8 *pMax_section;
 965                         pMax_section = (u8 *)pOut;
 966                         *pMax_section = EFUSE_MAX_SECTION_88E;
 967                 }
 968                 break;
 969         case TYPE_EFUSE_REAL_CONTENT_LEN:
 970                 {
 971                         u16 *pu2Tmp;
 972                         pu2Tmp = (u16 *)pOut;
 973                         *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
 974                 }
 975                 break;
 976         case TYPE_EFUSE_CONTENT_LEN_BANK:
 977                 {
 978                         u16 *pu2Tmp;
 979                         pu2Tmp = (u16 *)pOut;
 980                         *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
 981                 }
 982                 break;
 983         case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
 984                 {
 985                         u16 *pu2Tmp;
 986                         pu2Tmp = (u16 *)pOut;
 987                         *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
 988                 }
 989                 break;
 990         case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
 991                 {
 992                         u16 *pu2Tmp;
 993                         pu2Tmp = (u16 *)pOut;
 994                         *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
 995                 }
 996                 break;
 997         case TYPE_EFUSE_MAP_LEN:
 998                 {
 999                         u16 *pu2Tmp;
1000                         pu2Tmp = (u16 *)pOut;
1001                         *pu2Tmp = (u16)EFUSE_MAP_LEN_88E;
1002                 }
1003                 break;
1004         case TYPE_EFUSE_PROTECT_BYTES_BANK:
1005                 {
1006                         u8 *pu1Tmp;
1007                         pu1Tmp = (u8 *)pOut;
1008                         *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E);
1009                 }
1010                 break;
1011         default:
1012                 {
1013                         u8 *pu1Tmp;
1014                         pu1Tmp = (u8 *)pOut;
1015                         *pu1Tmp = 0;
1016                 }
1017                 break;
1018         }
1019 }
1020
1021 static void Hal_EFUSEGetEfuseDefinition_Pseudo88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut)
1022 {
1023         switch (type) {
1024         case TYPE_EFUSE_MAX_SECTION:
1025                 {
1026                         u8 *pMax_section;
1027                         pMax_section = (u8 *)pOut;
1028                         *pMax_section = EFUSE_MAX_SECTION_88E;
1029                 }
1030                 break;
1031         case TYPE_EFUSE_REAL_CONTENT_LEN:
1032                 {
1033                         u16 *pu2Tmp;
1034                         pu2Tmp = (u16 *)pOut;
1035                         *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
1036                 }
1037                 break;
1038         case TYPE_EFUSE_CONTENT_LEN_BANK:
1039                 {
1040                         u16 *pu2Tmp;
1041                         pu2Tmp = (u16 *)pOut;
1042                         *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
1043                 }
1044                 break;
1045         case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
1046                 {
1047                         u16 *pu2Tmp;
1048                         pu2Tmp = (u16 *)pOut;
1049                         *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
1050                 }
1051                 break;
1052         case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
1053                 {
1054                         u16 *pu2Tmp;
1055                         pu2Tmp = (u16 *)pOut;
1056                         *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
1057                 }
1058                 break;
1059         case TYPE_EFUSE_MAP_LEN:
1060                 {
1061                         u16 *pu2Tmp;
1062                         pu2Tmp = (u16 *)pOut;
1063                         *pu2Tmp = (u16)EFUSE_MAP_LEN_88E;
1064                 }
1065                 break;
1066         case TYPE_EFUSE_PROTECT_BYTES_BANK:
1067                 {
1068                         u8 *pu1Tmp;
1069                         pu1Tmp = (u8 *)pOut;
1070                         *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E);
1071                 }
1072                 break;
1073         default:
1074                 {
1075                         u8 *pu1Tmp;
1076                         pu1Tmp = (u8 *)pOut;
1077                         *pu1Tmp = 0;
1078                 }
1079                 break;
1080         }
1081 }
1082
1083 static void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest)
1084 {
1085         if (bPseudoTest)
1086                 Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut);
1087         else
1088                 Hal_EFUSEGetEfuseDefinition88E(pAdapter, efuseType, type, pOut);
1089 }
1090
1091 static u8 Hal_EfuseWordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest)
1092 {
1093         u16     tmpaddr = 0;
1094         u16     start_addr = efuse_addr;
1095         u8 badworden = 0x0F;
1096         u8 tmpdata[8];
1097
1098         memset((void *)tmpdata, 0xff, PGPKT_DATA_SIZE);
1099
1100         if (!(word_en&BIT0)) {
1101                 tmpaddr = start_addr;
1102                 efuse_OneByteWrite(pAdapter, start_addr++, data[0], bPseudoTest);
1103                 efuse_OneByteWrite(pAdapter, start_addr++, data[1], bPseudoTest);
1104
1105                 efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[0], bPseudoTest);
1106                 efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[1], bPseudoTest);
1107                 if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1]))
1108                         badworden &= (~BIT0);
1109         }
1110         if (!(word_en&BIT1)) {
1111                 tmpaddr = start_addr;
1112                 efuse_OneByteWrite(pAdapter, start_addr++, data[2], bPseudoTest);
1113                 efuse_OneByteWrite(pAdapter, start_addr++, data[3], bPseudoTest);
1114
1115                 efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[2], bPseudoTest);
1116                 efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[3], bPseudoTest);
1117                 if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3]))
1118                         badworden &= (~BIT1);
1119         }
1120         if (!(word_en&BIT2)) {
1121                 tmpaddr = start_addr;
1122                 efuse_OneByteWrite(pAdapter, start_addr++, data[4], bPseudoTest);
1123                 efuse_OneByteWrite(pAdapter, start_addr++, data[5], bPseudoTest);
1124
1125                 efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[4], bPseudoTest);
1126                 efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[5], bPseudoTest);
1127                 if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5]))
1128                         badworden &= (~BIT2);
1129         }
1130         if (!(word_en&BIT3)) {
1131                 tmpaddr = start_addr;
1132                 efuse_OneByteWrite(pAdapter, start_addr++, data[6], bPseudoTest);
1133                 efuse_OneByteWrite(pAdapter, start_addr++, data[7], bPseudoTest);
1134
1135                 efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[6], bPseudoTest);
1136                 efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[7], bPseudoTest);
1137                 if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7]))
1138                         badworden &= (~BIT3);
1139         }
1140         return badworden;
1141 }
1142
1143 static u8 Hal_EfuseWordEnableDataWrite_Pseudo(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest)
1144 {
1145         u8 ret;
1146
1147         ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
1148         return ret;
1149 }
1150
1151 static u8 rtl8188e_Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest)
1152 {
1153         u8 ret = 0;
1154
1155         if (bPseudoTest)
1156                 ret = Hal_EfuseWordEnableDataWrite_Pseudo (pAdapter, efuse_addr, word_en, data, bPseudoTest);
1157         else
1158                 ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
1159         return ret;
1160 }
1161
1162 static u16 hal_EfuseGetCurrentSize_8188e(struct adapter *pAdapter, bool bPseudoTest)
1163 {
1164         int     bContinual = true;
1165         u16     efuse_addr = 0;
1166         u8 hoffset = 0, hworden = 0;
1167         u8 efuse_data, word_cnts = 0;
1168
1169         if (bPseudoTest)
1170                 efuse_addr = (u16)(fakeEfuseUsedBytes);
1171         else
1172                 rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
1173
1174         while (bContinual &&
1175                efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) &&
1176                AVAILABLE_EFUSE_ADDR(efuse_addr)) {
1177                 if (efuse_data != 0xFF) {
1178                         if ((efuse_data&0x1F) == 0x0F) {                /* extended header */
1179                                 hoffset = efuse_data;
1180                                 efuse_addr++;
1181                                 efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest);
1182                                 if ((efuse_data & 0x0F) == 0x0F) {
1183                                         efuse_addr++;
1184                                         continue;
1185                                 } else {
1186                                         hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
1187                                         hworden = efuse_data & 0x0F;
1188                                 }
1189                         } else {
1190                                 hoffset = (efuse_data>>4) & 0x0F;
1191                                 hworden =  efuse_data & 0x0F;
1192                         }
1193                         word_cnts = Efuse_CalculateWordCnts(hworden);
1194                         /* read next header */
1195                         efuse_addr = efuse_addr + (word_cnts*2)+1;
1196                 } else {
1197                         bContinual = false;
1198                 }
1199         }
1200
1201         if (bPseudoTest)
1202                 fakeEfuseUsedBytes = efuse_addr;
1203         else
1204                 rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
1205
1206         return efuse_addr;
1207 }
1208
1209 static u16 Hal_EfuseGetCurrentSize_Pseudo(struct adapter *pAdapter, bool bPseudoTest)
1210 {
1211         u16     ret = 0;
1212
1213         ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest);
1214         return ret;
1215 }
1216
1217 static u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest)
1218 {
1219         u16     ret = 0;
1220
1221         if (bPseudoTest)
1222                 ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest);
1223         else
1224                 ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest);
1225         return ret;
1226 }
1227
1228 static int hal_EfusePgPacketRead_8188e(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
1229 {
1230         u8 ReadState = PG_STATE_HEADER;
1231         int     bContinual = true;
1232         int     bDataEmpty = true;
1233         u8 efuse_data, word_cnts = 0;
1234         u16     efuse_addr = 0;
1235         u8 hoffset = 0, hworden = 0;
1236         u8 tmpidx = 0;
1237         u8 tmpdata[8];
1238         u8 max_section = 0;
1239         u8 tmp_header = 0;
1240
1241         EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest);
1242
1243         if (data == NULL)
1244                 return false;
1245         if (offset > max_section)
1246                 return false;
1247
1248         memset((void *)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
1249         memset((void *)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
1250
1251         /*  <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */
1252         /*  Skip dummy parts to prevent unexpected data read from Efuse. */
1253         /*  By pass right now. 2009.02.19. */
1254         while (bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr)) {
1255                 /*   Header Read ------------- */
1256                 if (ReadState & PG_STATE_HEADER) {
1257                         if (efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) {
1258                                 if (EXT_HEADER(efuse_data)) {
1259                                         tmp_header = efuse_data;
1260                                         efuse_addr++;
1261                                         efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest);
1262                                         if (!ALL_WORDS_DISABLED(efuse_data)) {
1263                                                 hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
1264                                                 hworden = efuse_data & 0x0F;
1265                                         } else {
1266                                                 DBG_88E("Error, All words disabled\n");
1267                                                 efuse_addr++;
1268                                                 continue;
1269                                         }
1270                                 } else {
1271                                         hoffset = (efuse_data>>4) & 0x0F;
1272                                         hworden =  efuse_data & 0x0F;
1273                                 }
1274                                 word_cnts = Efuse_CalculateWordCnts(hworden);
1275                                 bDataEmpty = true;
1276
1277                                 if (hoffset == offset) {
1278                                         for (tmpidx = 0; tmpidx < word_cnts*2; tmpidx++) {
1279                                                 if (efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx, &efuse_data, bPseudoTest)) {
1280                                                         tmpdata[tmpidx] = efuse_data;
1281                                                         if (efuse_data != 0xff)
1282                                                                 bDataEmpty = false;
1283                                                 }
1284                                         }
1285                                         if (bDataEmpty == false) {
1286                                                 ReadState = PG_STATE_DATA;
1287                                         } else {/* read next header */
1288                                                 efuse_addr = efuse_addr + (word_cnts*2)+1;
1289                                                 ReadState = PG_STATE_HEADER;
1290                                         }
1291                                 } else {/* read next header */
1292                                         efuse_addr = efuse_addr + (word_cnts*2)+1;
1293                                         ReadState = PG_STATE_HEADER;
1294                                 }
1295                         } else {
1296                                 bContinual = false;
1297                         }
1298                 } else if (ReadState & PG_STATE_DATA) {
1299                 /*   Data section Read ------------- */
1300                         efuse_WordEnableDataRead(hworden, tmpdata, data);
1301                         efuse_addr = efuse_addr + (word_cnts*2)+1;
1302                         ReadState = PG_STATE_HEADER;
1303                 }
1304
1305         }
1306
1307         if ((data[0] == 0xff) && (data[1] == 0xff) && (data[2] == 0xff)  && (data[3] == 0xff) &&
1308             (data[4] == 0xff) && (data[5] == 0xff) && (data[6] == 0xff)  && (data[7] == 0xff))
1309                 return false;
1310         else
1311                 return true;
1312 }
1313
1314 static int Hal_EfusePgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
1315 {
1316         int     ret;
1317
1318         ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest);
1319         return ret;
1320 }
1321
1322 static int Hal_EfusePgPacketRead_Pseudo(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
1323 {
1324         int     ret;
1325
1326         ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest);
1327         return ret;
1328 }
1329
1330 static int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
1331 {
1332         int     ret;
1333
1334         if (bPseudoTest)
1335                 ret = Hal_EfusePgPacketRead_Pseudo (pAdapter, offset, data, bPseudoTest);
1336         else
1337                 ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest);
1338         return ret;
1339 }
1340
1341 static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, u8 efuseType, struct pgpkt *pFixPkt, u16 *pAddr, bool bPseudoTest)
1342 {
1343         u8 originaldata[8], badworden = 0;
1344         u16     efuse_addr = *pAddr;
1345         u32     PgWriteSuccess = 0;
1346
1347         memset((void *)originaldata, 0xff, 8);
1348
1349         if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) {
1350                 /* check if data exist */
1351                 badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest);
1352
1353                 if (badworden != 0xf) { /*  write fail */
1354                         PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
1355
1356                         if (!PgWriteSuccess)
1357                                 return false;
1358                         else
1359                                 efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
1360                 } else {
1361                         efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) + 1;
1362                 }
1363         } else {
1364                 efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) + 1;
1365         }
1366         *pAddr = efuse_addr;
1367         return true;
1368 }
1369
1370 static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
1371 {
1372         bool bRet = false;
1373         u16     efuse_addr = *pAddr, efuse_max_available_len = 0;
1374         u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0;
1375         u8 repeatcnt = 0;
1376
1377         EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
1378
1379         while (efuse_addr < efuse_max_available_len) {
1380                 pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
1381                 efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1382                 efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1383
1384                 while (tmp_header == 0xFF) {
1385                         if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
1386                                 return false;
1387
1388                         efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1389                         efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1390                 }
1391
1392                 /* to write ext_header */
1393                 if (tmp_header == pg_header) {
1394                         efuse_addr++;
1395                         pg_header_temp = pg_header;
1396                         pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;
1397
1398                         efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1399                         efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1400
1401                         while (tmp_header == 0xFF) {
1402                                 if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
1403                                         return false;
1404
1405                                 efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1406                                 efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1407                         }
1408
1409                         if ((tmp_header & 0x0F) == 0x0F) {      /* word_en PG fail */
1410                                 if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
1411                                         return false;
1412                                 } else {
1413                                         efuse_addr++;
1414                                         continue;
1415                                 }
1416                         } else if (pg_header != tmp_header) {   /* offset PG fail */
1417                                 struct pgpkt    fixPkt;
1418                                 fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1);
1419                                 fixPkt.word_en = tmp_header & 0x0F;
1420                                 fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
1421                                 if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
1422                                         return false;
1423                         } else {
1424                                 bRet = true;
1425                                 break;
1426                         }
1427                 } else if ((tmp_header & 0x1F) == 0x0F) {               /* wrong extended header */
1428                         efuse_addr += 2;
1429                         continue;
1430                 }
1431         }
1432
1433         *pAddr = efuse_addr;
1434         return bRet;
1435 }
1436
1437 static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
1438 {
1439         bool bRet = false;
1440         u8 pg_header = 0, tmp_header = 0;
1441         u16     efuse_addr = *pAddr;
1442         u8 repeatcnt = 0;
1443
1444         pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en;
1445
1446         efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1447         efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1448
1449         while (tmp_header == 0xFF) {
1450                 if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
1451                         return false;
1452                 efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1453                 efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1454         }
1455
1456         if (pg_header == tmp_header) {
1457                 bRet = true;
1458         } else {
1459                 struct pgpkt    fixPkt;
1460                 fixPkt.offset = (tmp_header>>4) & 0x0F;
1461                 fixPkt.word_en = tmp_header & 0x0F;
1462                 fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
1463                 if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
1464                         return false;
1465         }
1466
1467         *pAddr = efuse_addr;
1468         return bRet;
1469 }
1470
1471 static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
1472 {
1473         u16     efuse_addr = *pAddr;
1474         u8 badworden = 0;
1475         u32     PgWriteSuccess = 0;
1476
1477         badworden = 0x0f;
1478         badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
1479         if (badworden == 0x0F) {
1480                 /*  write ok */
1481                 return true;
1482         } else {
1483                 /* reorganize other pg packet */
1484                 PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
1485                 if (!PgWriteSuccess)
1486                         return false;
1487                 else
1488                         return true;
1489         }
1490 }
1491
1492 static bool
1493 hal_EfusePgPacketWriteHeader(
1494                                 struct adapter *pAdapter,
1495                                 u8 efuseType,
1496                                 u16                             *pAddr,
1497                                 struct pgpkt *pTargetPkt,
1498                                 bool bPseudoTest)
1499 {
1500         bool bRet = false;
1501
1502         if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
1503                 bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
1504         else
1505                 bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
1506
1507         return bRet;
1508 }
1509
1510 static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt,
1511                           u8 *pWden)
1512 {
1513         u8 match_word_en = 0x0F;        /*  default all words are disabled */
1514
1515         /*  check if the same words are enabled both target and current PG packet */
1516         if (((pTargetPkt->word_en & BIT0) == 0) &&
1517             ((pCurPkt->word_en & BIT0) == 0))
1518                 match_word_en &= ~BIT0;                         /*  enable word 0 */
1519         if (((pTargetPkt->word_en & BIT1) == 0) &&
1520             ((pCurPkt->word_en & BIT1) == 0))
1521                 match_word_en &= ~BIT1;                         /*  enable word 1 */
1522         if (((pTargetPkt->word_en & BIT2) == 0) &&
1523             ((pCurPkt->word_en & BIT2) == 0))
1524                 match_word_en &= ~BIT2;                         /*  enable word 2 */
1525         if (((pTargetPkt->word_en & BIT3) == 0) &&
1526             ((pCurPkt->word_en & BIT3) == 0))
1527                 match_word_en &= ~BIT3;                         /*  enable word 3 */
1528
1529         *pWden = match_word_en;
1530
1531         if (match_word_en != 0xf)
1532                 return true;
1533         else
1534                 return false;
1535 }
1536
1537 static bool hal_EfuseCheckIfDatafollowed(struct adapter *pAdapter, u8 word_cnts, u16 startAddr, bool bPseudoTest)
1538 {
1539         bool bRet = false;
1540         u8 i, efuse_data;
1541
1542         for (i = 0; i < (word_cnts*2); i++) {
1543                 if (efuse_OneByteRead(pAdapter, (startAddr+i), &efuse_data, bPseudoTest) && (efuse_data != 0xFF))
1544                         bRet = true;
1545         }
1546         return bRet;
1547 }
1548
1549 static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
1550 {
1551         bool bRet = false;
1552         u8 i, efuse_data = 0, cur_header = 0;
1553         u8 matched_wden = 0, badworden = 0;
1554         u16     startAddr = 0, efuse_max_available_len = 0, efuse_max = 0;
1555         struct pgpkt curPkt;
1556
1557         EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
1558         EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest);
1559
1560         if (efuseType == EFUSE_WIFI) {
1561                 if (bPseudoTest) {
1562                         startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
1563                 } else {
1564                         rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
1565                         startAddr %= EFUSE_REAL_CONTENT_LEN;
1566                 }
1567         } else {
1568                 if (bPseudoTest)
1569                         startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
1570                 else
1571                         startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
1572         }
1573
1574         while (1) {
1575                 if (startAddr >= efuse_max_available_len) {
1576                         bRet = false;
1577                         break;
1578                 }
1579
1580                 if (efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) {
1581                         if (EXT_HEADER(efuse_data)) {
1582                                 cur_header = efuse_data;
1583                                 startAddr++;
1584                                 efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest);
1585                                 if (ALL_WORDS_DISABLED(efuse_data)) {
1586                                         bRet = false;
1587                                         break;
1588                                 } else {
1589                                         curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
1590                                         curPkt.word_en = efuse_data & 0x0F;
1591                                 }
1592                         } else {
1593                                 cur_header  =  efuse_data;
1594                                 curPkt.offset = (cur_header>>4) & 0x0F;
1595                                 curPkt.word_en = cur_header & 0x0F;
1596                         }
1597
1598                         curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en);
1599                         /*  if same header is found but no data followed */
1600                         /*  write some part of data followed by the header. */
1601                         if ((curPkt.offset == pTargetPkt->offset) &&
1602                             (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) &&
1603                             wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) {
1604                                 /*  Here to write partial data */
1605                                 badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest);
1606                                 if (badworden != 0x0F) {
1607                                         u32     PgWriteSuccess = 0;
1608                                         /*  if write fail on some words, write these bad words again */
1609
1610                                         PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
1611
1612                                         if (!PgWriteSuccess) {
1613                                                 bRet = false;   /*  write fail, return */
1614                                                 break;
1615                                         }
1616                                 }
1617                                 /*  partial write ok, update the target packet for later use */
1618                                 for (i = 0; i < 4; i++) {
1619                                         if ((matched_wden & (0x1<<i)) == 0)     /*  this word has been written */
1620                                                 pTargetPkt->word_en |= (0x1<<i);        /*  disable the word */
1621                                 }
1622                                 pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
1623                         }
1624                         /*  read from next header */
1625                         startAddr = startAddr + (curPkt.word_cnts*2) + 1;
1626                 } else {
1627                         /*  not used header, 0xff */
1628                         *pAddr = startAddr;
1629                         bRet = true;
1630                         break;
1631                 }
1632         }
1633         return bRet;
1634 }
1635
1636 static bool
1637 hal_EfusePgCheckAvailableAddr(
1638                 struct adapter *pAdapter,
1639                 u8 efuseType,
1640                 bool bPseudoTest
1641         )
1642 {
1643         u16     efuse_max_available_len = 0;
1644
1645         /* Change to check TYPE_EFUSE_MAP_LEN , because 8188E raw 256, logic map over 256. */
1646         EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, false);
1647
1648         if (Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len)
1649                 return false;
1650         return true;
1651 }
1652
1653 static void hal_EfuseConstructPGPkt(u8 offset, u8 word_en, u8 *pData, struct pgpkt *pTargetPkt)
1654 {
1655         memset((void *)pTargetPkt->data, 0xFF, sizeof(u8)*8);
1656         pTargetPkt->offset = offset;
1657         pTargetPkt->word_en = word_en;
1658         efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
1659         pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
1660 }
1661
1662 static bool hal_EfusePgPacketWrite_8188e(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *pData, bool bPseudoTest)
1663 {
1664         struct pgpkt    targetPkt;
1665         u16                     startAddr = 0;
1666         u8 efuseType = EFUSE_WIFI;
1667
1668         if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
1669                 return false;
1670
1671         hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
1672
1673         if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
1674                 return false;
1675
1676         if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
1677                 return false;
1678
1679         if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
1680                 return false;
1681
1682         return true;
1683 }
1684
1685 static int Hal_EfusePgPacketWrite_Pseudo(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
1686 {
1687         int ret;
1688
1689         ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest);
1690         return ret;
1691 }
1692
1693 static int Hal_EfusePgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
1694 {
1695         int     ret = 0;
1696         ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest);
1697
1698         return ret;
1699 }
1700
1701 static int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
1702 {
1703         int     ret;
1704
1705         if (bPseudoTest)
1706                 ret = Hal_EfusePgPacketWrite_Pseudo (pAdapter, offset, word_en, data, bPseudoTest);
1707         else
1708                 ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest);
1709         return ret;
1710 }
1711
1712 static struct HAL_VERSION ReadChipVersion8188E(struct adapter *padapter)
1713 {
1714         u32                             value32;
1715         struct HAL_VERSION              ChipVersion;
1716         struct hal_data_8188e   *pHalData;
1717
1718         pHalData = GET_HAL_DATA(padapter);
1719
1720         value32 = rtw_read32(padapter, REG_SYS_CFG);
1721         ChipVersion.ICType = CHIP_8188E;
1722         ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
1723
1724         ChipVersion.RFType = RF_TYPE_1T1R;
1725         ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
1726         ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /*  IC version (CUT) */
1727
1728         /*  For regulator mode. by tynli. 2011.01.14 */
1729         pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
1730
1731         ChipVersion.ROMVer = 0; /*  ROM code version. */
1732         pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
1733
1734         dump_chip_info(ChipVersion);
1735
1736         pHalData->VersionID = ChipVersion;
1737
1738         if (IS_1T2R(ChipVersion)) {
1739                 pHalData->rf_type = RF_1T2R;
1740                 pHalData->NumTotalRFPath = 2;
1741         } else if (IS_2T2R(ChipVersion)) {
1742                 pHalData->rf_type = RF_2T2R;
1743                 pHalData->NumTotalRFPath = 2;
1744         } else {
1745                 pHalData->rf_type = RF_1T1R;
1746                 pHalData->NumTotalRFPath = 1;
1747         }
1748
1749         MSG_88E("RF_Type is %x!!\n", pHalData->rf_type);
1750
1751         return ChipVersion;
1752 }
1753
1754 static void rtl8188e_read_chip_version(struct adapter *padapter)
1755 {
1756         ReadChipVersion8188E(padapter);
1757 }
1758
1759 static void rtl8188e_GetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
1760 {
1761 }
1762
1763 static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
1764 {
1765         struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
1766         struct odm_dm_struct *podmpriv = &pHalData->odmpriv;
1767         switch (eVariable) {
1768         case HAL_ODM_STA_INFO:
1769                 {
1770                         struct sta_info *psta = (struct sta_info *)pValue1;
1771                         if (bSet) {
1772                                 DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
1773                                 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
1774                                 ODM_RAInfo_Init(podmpriv, psta->mac_id);
1775                         } else {
1776                                 DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
1777                                 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
1778                        }
1779                 }
1780                 break;
1781         case HAL_ODM_P2P_STATE:
1782                         ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
1783                 break;
1784         case HAL_ODM_WIFI_DISPLAY_STATE:
1785                         ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
1786                 break;
1787         default:
1788                 break;
1789         }
1790 }
1791
1792 void rtl8188e_clone_haldata(struct adapter *dst_adapter, struct adapter *src_adapter)
1793 {
1794         memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz);
1795 }
1796
1797 void rtl8188e_start_thread(struct adapter *padapter)
1798 {
1799 }
1800
1801 void rtl8188e_stop_thread(struct adapter *padapter)
1802 {
1803 }
1804
1805 static void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
1806 {
1807         if (enable) {
1808                 DBG_88E("Enable notch filter\n");
1809                 rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1);
1810         } else {
1811                 DBG_88E("Disable notch filter\n");
1812                 rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1);
1813         }
1814 }
1815 void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
1816 {
1817         pHalFunc->free_hal_data = &rtl8188e_free_hal_data;
1818
1819         pHalFunc->dm_init = &rtl8188e_init_dm_priv;
1820         pHalFunc->dm_deinit = &rtl8188e_deinit_dm_priv;
1821
1822         pHalFunc->read_chip_version = &rtl8188e_read_chip_version;
1823
1824         pHalFunc->set_bwmode_handler = &PHY_SetBWMode8188E;
1825         pHalFunc->set_channel_handler = &PHY_SwChnl8188E;
1826
1827         pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog;
1828
1829         pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid;
1830         pHalFunc->run_thread = &rtl8188e_start_thread;
1831         pHalFunc->cancel_thread = &rtl8188e_stop_thread;
1832
1833         pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E;
1834         pHalFunc->AntDivCompareHandler = &AntDivCompare8188E;
1835         pHalFunc->read_bbreg = &rtl8188e_PHY_QueryBBReg;
1836         pHalFunc->write_bbreg = &rtl8188e_PHY_SetBBReg;
1837         pHalFunc->read_rfreg = &rtl8188e_PHY_QueryRFReg;
1838         pHalFunc->write_rfreg = &rtl8188e_PHY_SetRFReg;
1839
1840         /*  Efuse related function */
1841         pHalFunc->EfusePowerSwitch = &rtl8188e_EfusePowerSwitch;
1842         pHalFunc->ReadEFuse = &rtl8188e_ReadEFuse;
1843         pHalFunc->EFUSEGetEfuseDefinition = &rtl8188e_EFUSE_GetEfuseDefinition;
1844         pHalFunc->EfuseGetCurrentSize = &rtl8188e_EfuseGetCurrentSize;
1845         pHalFunc->Efuse_PgPacketRead = &rtl8188e_Efuse_PgPacketRead;
1846         pHalFunc->Efuse_PgPacketWrite = &rtl8188e_Efuse_PgPacketWrite;
1847         pHalFunc->Efuse_WordEnableDataWrite = &rtl8188e_Efuse_WordEnableDataWrite;
1848
1849         pHalFunc->sreset_init_value = &sreset_init_value;
1850         pHalFunc->sreset_reset_value = &sreset_reset_value;
1851         pHalFunc->silentreset = &rtl8188e_silentreset_for_specific_platform;
1852         pHalFunc->sreset_xmit_status_check = &rtl8188e_sreset_xmit_status_check;
1853         pHalFunc->sreset_linked_status_check  = &rtl8188e_sreset_linked_status_check;
1854         pHalFunc->sreset_get_wifi_status  = &sreset_get_wifi_status;
1855
1856         pHalFunc->GetHalODMVarHandler = &rtl8188e_GetHalODMVar;
1857         pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar;
1858
1859         pHalFunc->IOL_exec_cmds_sync = &rtl8188e_IOL_exec_cmds_sync;
1860
1861         pHalFunc->hal_notch_filter = &hal_notch_filter_8188e;
1862 }
1863
1864 u8 GetEEPROMSize8188E(struct adapter *padapter)
1865 {
1866         u8 size = 0;
1867         u32     cr;
1868
1869         cr = rtw_read16(padapter, REG_9346CR);
1870         /*  6: EEPROM used is 93C46, 4: boot from E-Fuse. */
1871         size = (cr & BOOT_FROM_EEPROM) ? 6 : 4;
1872
1873         MSG_88E("EEPROM type is %s\n", size == 4 ? "E-FUSE" : "93C46");
1874
1875         return size;
1876 }
1877
1878 /*  */
1879 /*  */
1880 /*  LLT R/W/Init function */
1881 /*  */
1882 /*  */
1883 static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
1884 {
1885         s32     status = _SUCCESS;
1886         s32     count = 0;
1887         u32     value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
1888         u16     LLTReg = REG_LLT_INIT;
1889
1890         rtw_write32(padapter, LLTReg, value);
1891
1892         /* polling */
1893         do {
1894                 value = rtw_read32(padapter, LLTReg);
1895                 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
1896                         break;
1897
1898                 if (count > POLLING_LLT_THRESHOLD) {
1899                         RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address));
1900                         status = _FAIL;
1901                         break;
1902                 }
1903         } while (count++);
1904
1905         return status;
1906 }
1907
1908 s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
1909 {
1910         s32     status = _FAIL;
1911         u32     i;
1912         u32     Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/*  176, 22k */
1913
1914         if (rtw_IOL_applied(padapter)) {
1915                 status = iol_InitLLTTable(padapter, txpktbuf_bndy);
1916         } else {
1917                 for (i = 0; i < (txpktbuf_bndy - 1); i++) {
1918                         status = _LLTWrite(padapter, i, i + 1);
1919                         if (_SUCCESS != status)
1920                                 return status;
1921                 }
1922
1923                 /*  end of list */
1924                 status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
1925                 if (_SUCCESS != status)
1926                         return status;
1927
1928                 /*  Make the other pages as ring buffer */
1929                 /*  This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
1930                 /*  Otherwise used as local loopback buffer. */
1931                 for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
1932                         status = _LLTWrite(padapter, i, (i + 1));
1933                         if (_SUCCESS != status)
1934                                 return status;
1935                 }
1936
1937                 /*  Let last entry point to the start entry of ring buffer */
1938                 status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
1939                 if (_SUCCESS != status) {
1940                         return status;
1941                 }
1942         }
1943
1944         return status;
1945 }
1946
1947 void
1948 Hal_InitPGData88E(struct adapter *padapter)
1949 {
1950         struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
1951
1952         if (!pEEPROM->bautoload_fail_flag) { /*  autoload OK. */
1953                 if (!is_boot_from_eeprom(padapter)) {
1954                         /*  Read EFUSE real map to shadow. */
1955                         EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
1956                 }
1957         } else {/* autoload fail */
1958                 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
1959                 /* update to default value 0xFF */
1960                 if (!is_boot_from_eeprom(padapter))
1961                         EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
1962         }
1963 }
1964
1965 void
1966 Hal_EfuseParseIDCode88E(
1967                 struct adapter *padapter,
1968                 u8 *hwinfo
1969         )
1970 {
1971         struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
1972         u16                     EEPROMId;
1973
1974         /*  Check 0x8129 again for making sure autoload status!! */
1975         EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
1976         if (EEPROMId != RTL_EEPROM_ID) {
1977                 pr_err("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
1978                 pEEPROM->bautoload_fail_flag = true;
1979         } else {
1980                 pEEPROM->bautoload_fail_flag = false;
1981         }
1982
1983         pr_info("EEPROM ID = 0x%04x\n", EEPROMId);
1984 }
1985
1986 static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
1987 {
1988         u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
1989
1990         memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
1991
1992         if (AutoLoadFail) {
1993                 for (rfPath = 0; rfPath < RF_PATH_MAX; rfPath++) {
1994                         /* 2.4G default value */
1995                         for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
1996                                 pwrInfo24G->IndexCCK_Base[rfPath][group] =      EEPROM_DEFAULT_24G_INDEX;
1997                                 pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
1998                         }
1999                         for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
2000                                 if (TxCount == 0) {
2001                                         pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
2002                                         pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
2003                                 } else {
2004                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
2005                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
2006                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
2007                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
2008                                 }
2009                         }
2010                 }
2011                 return;
2012         }
2013
2014         for (rfPath = 0; rfPath < RF_PATH_MAX; rfPath++) {
2015                 /* 2.4G default value */
2016                 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
2017                         pwrInfo24G->IndexCCK_Base[rfPath][group] =      PROMContent[eeAddr++];
2018                         if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
2019                                 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
2020                 }
2021                 for (group = 0; group < MAX_CHNL_GROUP_24G-1; group++) {
2022                         pwrInfo24G->IndexBW40_Base[rfPath][group] =     PROMContent[eeAddr++];
2023                         if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
2024                                 pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
2025                 }
2026                 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
2027                         if (TxCount == 0) {
2028                                 pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
2029                                 if (PROMContent[eeAddr] == 0xFF) {
2030                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
2031                                 } else {
2032                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
2033                                         if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
2034                                                 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
2035                                 }
2036
2037                                 if (PROMContent[eeAddr] == 0xFF) {
2038                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_24G_OFDM_DIFF;
2039                                 } else {
2040                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0x0f);
2041                                         if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
2042                                                 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
2043                                 }
2044                                 pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
2045                                 eeAddr++;
2046                         } else {
2047                                 if (PROMContent[eeAddr] == 0xFF) {
2048                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
2049                                 } else {
2050                                         pwrInfo24G->BW40_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
2051                                         if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
2052                                                 pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
2053                                 }
2054
2055                                 if (PROMContent[eeAddr] == 0xFF) {
2056                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
2057                                 } else {
2058                                         pwrInfo24G->BW20_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0x0f);
2059                                         if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
2060                                                 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
2061                                 }
2062                                 eeAddr++;
2063
2064                                 if (PROMContent[eeAddr] == 0xFF) {
2065                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
2066                                 } else {
2067                                         pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
2068                                         if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
2069                                                 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
2070                                 }
2071
2072                                 if (PROMContent[eeAddr] == 0xFF) {
2073                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
2074                                 } else {
2075                                         pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
2076                                         if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3)               /* 4bit sign number to 8 bit sign number */
2077                                                 pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
2078                                 }
2079                                 eeAddr++;
2080                         }
2081                 }
2082         }
2083 }
2084
2085 static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup)
2086 {
2087         u8 bIn24G = true;
2088
2089         if (chnl <= 14) {
2090                 bIn24G = true;
2091
2092                 if (chnl < 3)                   /*  Channel 1-2 */
2093                         *pGroup = 0;
2094                 else if (chnl < 6)              /*  Channel 3-5 */
2095                         *pGroup = 1;
2096                 else     if (chnl < 9)          /*  Channel 6-8 */
2097                         *pGroup = 2;
2098                 else if (chnl < 12)             /*  Channel 9-11 */
2099                         *pGroup = 3;
2100                 else if (chnl < 14)             /*  Channel 12-13 */
2101                         *pGroup = 4;
2102                 else if (chnl == 14)            /*  Channel 14 */
2103                         *pGroup = 5;
2104         } else {
2105                 bIn24G = false;
2106
2107                 if (chnl <= 40)
2108                         *pGroup = 0;
2109                 else if (chnl <= 48)
2110                         *pGroup = 1;
2111                 else     if (chnl <= 56)
2112                         *pGroup = 2;
2113                 else if (chnl <= 64)
2114                         *pGroup = 3;
2115                 else if (chnl <= 104)
2116                         *pGroup = 4;
2117                 else if (chnl <= 112)
2118                         *pGroup = 5;
2119                 else if (chnl <= 120)
2120                         *pGroup = 5;
2121                 else if (chnl <= 128)
2122                         *pGroup = 6;
2123                 else if (chnl <= 136)
2124                         *pGroup = 7;
2125                 else if (chnl <= 144)
2126                         *pGroup = 8;
2127                 else if (chnl <= 153)
2128                         *pGroup = 9;
2129                 else if (chnl <= 161)
2130                         *pGroup = 10;
2131                 else if (chnl <= 177)
2132                         *pGroup = 11;
2133         }
2134         return bIn24G;
2135 }
2136
2137 void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
2138 {
2139         if (AutoLoadFail) {
2140                 padapter->pwrctrlpriv.bHWPowerdown = false;
2141                 padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
2142         } else {
2143                 /* hw power down mode selection , 0:rf-off / 1:power down */
2144
2145                 if (padapter->registrypriv.hwpdn_mode == 2)
2146                         padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT4);
2147                 else
2148                         padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
2149
2150                 /*  decide hw if support remote wakeup function */
2151                 /*  if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
2152                 padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1) ? true : false;
2153
2154                 DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
2155                 padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown, padapter->pwrctrlpriv.bSupportRemoteWakeup);
2156
2157                 DBG_88E("### PS params =>  power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
2158         }
2159 }
2160
2161 void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
2162 {
2163         struct hal_data_8188e   *pHalData = GET_HAL_DATA(padapter);
2164         struct txpowerinfo24g pwrInfo24G;
2165         u8 rfPath, ch, group;
2166         u8 bIn24G, TxCount;
2167
2168         Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
2169
2170         if (!AutoLoadFail)
2171                 pHalData->bTXPowerDataReadFromEEPORM = true;
2172
2173         for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) {
2174                 for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
2175                         bIn24G = Hal_GetChnlGroup88E(ch, &group);
2176                         if (bIn24G) {
2177                                 pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
2178                                 if (ch == 14)
2179                                         pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
2180                                 else
2181                                         pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
2182                         }
2183                         if (bIn24G) {
2184                                 DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
2185                                 DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch]);
2186                                 DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch]);
2187                         }
2188                 }
2189                 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
2190                         pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
2191                         pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
2192                         pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
2193                         pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];
2194                         DBG_88E("======= TxCount %d =======\n", TxCount);
2195                         DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]);
2196                         DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]);
2197                         DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]);
2198                         DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]);
2199                 }
2200         }
2201
2202         /*  2010/10/19 MH Add Regulator recognize for CU. */
2203         if (!AutoLoadFail) {
2204                 pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7);     /* bit0~2 */
2205                 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
2206                         pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */
2207         } else {
2208                 pHalData->EEPROMRegulatory = 0;
2209         }
2210         DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
2211 }
2212
2213 void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
2214 {
2215         struct hal_data_8188e   *pHalData = GET_HAL_DATA(pAdapter);
2216
2217         if (!AutoLoadFail) {
2218                 pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
2219                 if (pHalData->CrystalCap == 0xFF)
2220                         pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
2221         } else {
2222                 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
2223         }
2224         DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
2225 }
2226
2227 void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
2228 {
2229         struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
2230
2231         if (!AutoLoadFail)
2232                 pHalData->BoardType = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E]&0xE0)>>5);
2233         else
2234                 pHalData->BoardType = 0;
2235         DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
2236 }
2237
2238 void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
2239 {
2240         struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
2241
2242         if (!AutoLoadFail) {
2243                 pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
2244                 if (pHalData->EEPROMVersion == 0xFF)
2245                         pHalData->EEPROMVersion = EEPROM_Default_Version;
2246         } else {
2247                 pHalData->EEPROMVersion = 1;
2248         }
2249         RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
2250                  ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
2251                  pHalData->EEPROMVersion));
2252 }
2253
2254 void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
2255 {
2256         padapter->mlmepriv.ChannelPlan =
2257                  hal_com_get_channel_plan(padapter,
2258                                           hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
2259                                           padapter->registrypriv.channel_plan,
2260                                           RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
2261
2262         DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
2263 }
2264
2265 void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
2266 {
2267         struct hal_data_8188e   *pHalData = GET_HAL_DATA(padapter);
2268
2269         if (!AutoLoadFail) {
2270                 pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
2271         } else {
2272                 pHalData->EEPROMCustomerID = 0;
2273                 pHalData->EEPROMSubCustomerID = 0;
2274         }
2275         DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
2276 }
2277
2278 void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
2279 {
2280         struct hal_data_8188e   *pHalData = GET_HAL_DATA(pAdapter);
2281         struct registry_priv    *registry_par = &pAdapter->registrypriv;
2282
2283         if (!AutoLoadFail) {
2284                 /*  Antenna Diversity setting. */
2285                 if (registry_par->antdiv_cfg == 2) { /*  2:By EFUSE */
2286                         pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3;
2287                         if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
2288                                 pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;;
2289                 } else {
2290                         pHalData->AntDivCfg = registry_par->antdiv_cfg;  /*  0:OFF , 1:ON, 2:By EFUSE */
2291                 }
2292
2293                 if (registry_par->antdiv_type == 0) {
2294                         /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
2295                         pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
2296                         if (pHalData->TRxAntDivType == 0xFF)
2297                                 pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /*  For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
2298                 } else {
2299                         pHalData->TRxAntDivType = registry_par->antdiv_type;
2300                 }
2301
2302                 if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
2303                         pHalData->AntDivCfg = 1; /*  0xC1[3] is ignored. */
2304         } else {
2305                 pHalData->AntDivCfg = 0;
2306                 pHalData->TRxAntDivType = pHalData->TRxAntDivType; /*  The value in the driver setting of device manager. */
2307         }
2308         DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
2309 }
2310
2311 void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
2312 {
2313         struct hal_data_8188e   *pHalData = GET_HAL_DATA(Adapter);
2314
2315         /*  ThermalMeter from EEPROM */
2316         if (!AutoloadFail)
2317                 pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
2318         else
2319                 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
2320
2321         if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) {
2322                 pHalData->bAPKThermalMeterIgnore = true;
2323                 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
2324         }
2325         DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
2326 }
2327
2328 void Hal_InitChannelPlan(struct adapter *padapter)
2329 {
2330 }
2331
2332 bool HalDetectPwrDownMode88E(struct adapter *Adapter)
2333 {
2334         u8 tmpvalue = 0;
2335         struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
2336         struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
2337
2338         EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_FEATURE_OPTION_88E, (u32 *)&tmpvalue);
2339
2340         /*  2010/08/25 MH INF priority > PDN Efuse value. */
2341         if (tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode)
2342                 pHalData->pwrdown = true;
2343         else
2344                 pHalData->pwrdown = false;
2345
2346         DBG_88E("HalDetectPwrDownMode(): PDN =%d\n", pHalData->pwrdown);
2347
2348         return pHalData->pwrdown;
2349 }       /*  HalDetectPwrDownMode */
2350
2351 /*  This function is used only for 92C to set REG_BCN_CTRL(0x550) register. */
2352 /*  We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate */
2353 /*  the value of the register via atomic operation. */
2354 /*  This prevents from race condition when setting this register. */
2355 /*  The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. */
2356
2357 void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits)
2358 {
2359         struct hal_data_8188e *pHalData;
2360
2361         pHalData = GET_HAL_DATA(padapter);
2362
2363         pHalData->RegBcnCtrlVal |= SetBits;
2364         pHalData->RegBcnCtrlVal &= ~ClearBits;
2365
2366         rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal);
2367 }