1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
4 #include "../include/odm_precomp.h"
5 #include "../include/rtw_iol.h"
7 #define read_next_pair(array, v1, v2, i) \
14 static bool CheckCondition(const u32 condition, const u32 hex)
16 u32 _board = (hex & 0x000000FF);
17 u32 _interface = (hex & 0x0000FF00) >> 8;
18 u32 _platform = (hex & 0x00FF0000) >> 16;
21 if (condition == 0xCDCDCDCD)
24 cond = condition & 0x000000FF;
25 if ((_board == cond) && cond != 0x00)
28 cond = condition & 0x0000FF00;
30 if ((_interface & cond) == 0 && cond != 0x07)
33 cond = condition & 0x00FF0000;
35 if ((_platform & cond) == 0 && cond != 0x0F)
40 /******************************************************************************
42 ******************************************************************************/
44 static u32 array_agc_tab_1t_8188e[] = {
175 enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
179 u8 platform = dm_odm->SupportPlatform;
180 u8 interfaceValue = dm_odm->SupportInterface;
181 u8 board = dm_odm->BoardType;
182 u32 arraylen = sizeof(array_agc_tab_1t_8188e)/sizeof(u32);
183 u32 *array = array_agc_tab_1t_8188e;
185 struct adapter *adapter = dm_odm->Adapter;
186 struct xmit_frame *pxmit_frame = NULL;
188 enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
191 hex += interfaceValue << 8;
192 hex += platform << 16;
194 biol = rtw_IOL_applied(adapter);
197 pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter);
198 if (pxmit_frame == NULL) {
199 pr_info("rtw_IOL_accquire_xmit_frame failed\n");
200 return HAL_STATUS_FAILURE;
204 for (i = 0; i < arraylen; i += 2) {
208 /* This (offset, data) pair meets the condition. */
209 if (v1 < 0xCDCDCDCD) {
211 if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
213 rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord);
215 odm_ConfigBB_AGC_8188E(dm_odm, v1, bMaskDWord, v2);
219 /* This line is the start line of branch. */
220 if (!CheckCondition(array[i], hex)) {
221 /* Discard the following (offset, data) pairs. */
222 read_next_pair(array, v1, v2, i);
223 while (v2 != 0xDEAD &&
225 v2 != 0xCDCD && i < arraylen - 2)
226 read_next_pair(array, v1, v2, i);
227 i -= 2; /* prevent from for-loop += 2 */
228 } else { /* Configure matched pairs and skip to end of if-else. */
229 read_next_pair(array, v1, v2, i);
230 while (v2 != 0xDEAD &&
232 v2 != 0xCDCD && i < arraylen - 2) {
234 if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
236 rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord);
238 odm_ConfigBB_AGC_8188E(dm_odm, v1, bMaskDWord, v2);
240 read_next_pair(array, v1, v2, i);
243 while (v2 != 0xDEAD && i < arraylen - 2)
244 read_next_pair(array, v1, v2, i);
249 if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
250 printk("~~~ %s IOL_exec_cmds Failed !!!\n", __func__);
251 rst = HAL_STATUS_FAILURE;
257 /******************************************************************************
259 ******************************************************************************/
261 static u32 array_phy_reg_1t_8188e[] = {
455 enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
459 u8 platform = dm_odm->SupportPlatform;
460 u8 interfaceValue = dm_odm->SupportInterface;
461 u8 board = dm_odm->BoardType;
462 u32 arraylen = sizeof(array_phy_reg_1t_8188e)/sizeof(u32);
463 u32 *array = array_phy_reg_1t_8188e;
465 struct adapter *adapter = dm_odm->Adapter;
466 struct xmit_frame *pxmit_frame = NULL;
468 enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
470 hex += interfaceValue << 8;
471 hex += platform << 16;
473 biol = rtw_IOL_applied(adapter);
476 pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter);
477 if (pxmit_frame == NULL) {
478 pr_info("rtw_IOL_accquire_xmit_frame failed\n");
479 return HAL_STATUS_FAILURE;
483 for (i = 0; i < arraylen; i += 2) {
487 /* This (offset, data) pair meets the condition. */
488 if (v1 < 0xCDCDCDCD) {
490 if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
493 rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50);
494 } else if (v1 == 0xfd) {
495 rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5);
496 } else if (v1 == 0xfc) {
497 rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1);
498 } else if (v1 == 0xfb) {
499 rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50);
500 } else if (v1 == 0xfa) {
501 rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5);
502 } else if (v1 == 0xf9) {
503 rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1);
506 dm_odm->RFCalibrateInfo.RegA24 = v2;
507 rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord);
510 odm_ConfigBB_PHY_8188E(dm_odm, v1, bMaskDWord, v2);
513 } else { /* This line is the start line of branch. */
514 if (!CheckCondition(array[i], hex)) {
515 /* Discard the following (offset, data) pairs. */
516 read_next_pair(array, v1, v2, i);
517 while (v2 != 0xDEAD &&
519 v2 != 0xCDCD && i < arraylen - 2)
520 read_next_pair(array, v1, v2, i);
521 i -= 2; /* prevent from for-loop += 2 */
522 } else { /* Configure matched pairs and skip to end of if-else. */
523 read_next_pair(array, v1, v2, i);
524 while (v2 != 0xDEAD &&
526 v2 != 0xCDCD && i < arraylen - 2) {
528 if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
531 rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50);
532 } else if (v1 == 0xfd) {
533 rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5);
534 } else if (v1 == 0xfc) {
535 rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1);
536 } else if (v1 == 0xfb) {
537 rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50);
538 } else if (v1 == 0xfa) {
539 rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5);
540 } else if (v1 == 0xf9) {
541 rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1);
544 dm_odm->RFCalibrateInfo.RegA24 = v2;
546 rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord);
549 odm_ConfigBB_PHY_8188E(dm_odm, v1, bMaskDWord, v2);
551 read_next_pair(array, v1, v2, i);
554 while (v2 != 0xDEAD && i < arraylen - 2)
555 read_next_pair(array, v1, v2, i);
560 if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
561 rst = HAL_STATUS_FAILURE;
562 pr_info("~~~ IOL Config %s Failed !!!\n", __func__);
568 /******************************************************************************
570 ******************************************************************************/
572 static u32 array_phy_reg_pg_8188e[] = {
573 0xE00, 0xFFFFFFFF, 0x06070809,
574 0xE04, 0xFFFFFFFF, 0x02020405,
575 0xE08, 0x0000FF00, 0x00000006,
576 0x86C, 0xFFFFFF00, 0x00020400,
577 0xE10, 0xFFFFFFFF, 0x08090A0B,
578 0xE14, 0xFFFFFFFF, 0x01030607,
579 0xE18, 0xFFFFFFFF, 0x08090A0B,
580 0xE1C, 0xFFFFFFFF, 0x01030607,
581 0xE00, 0xFFFFFFFF, 0x00000000,
582 0xE04, 0xFFFFFFFF, 0x00000000,
583 0xE08, 0x0000FF00, 0x00000000,
584 0x86C, 0xFFFFFF00, 0x00000000,
585 0xE10, 0xFFFFFFFF, 0x00000000,
586 0xE14, 0xFFFFFFFF, 0x00000000,
587 0xE18, 0xFFFFFFFF, 0x00000000,
588 0xE1C, 0xFFFFFFFF, 0x00000000,
589 0xE00, 0xFFFFFFFF, 0x02020202,
590 0xE04, 0xFFFFFFFF, 0x00020202,
591 0xE08, 0x0000FF00, 0x00000000,
592 0x86C, 0xFFFFFF00, 0x00000000,
593 0xE10, 0xFFFFFFFF, 0x04040404,
594 0xE14, 0xFFFFFFFF, 0x00020404,
595 0xE18, 0xFFFFFFFF, 0x00000000,
596 0xE1C, 0xFFFFFFFF, 0x00000000,
597 0xE00, 0xFFFFFFFF, 0x02020202,
598 0xE04, 0xFFFFFFFF, 0x00020202,
599 0xE08, 0x0000FF00, 0x00000000,
600 0x86C, 0xFFFFFF00, 0x00000000,
601 0xE10, 0xFFFFFFFF, 0x04040404,
602 0xE14, 0xFFFFFFFF, 0x00020404,
603 0xE18, 0xFFFFFFFF, 0x00000000,
604 0xE1C, 0xFFFFFFFF, 0x00000000,
605 0xE00, 0xFFFFFFFF, 0x00000000,
606 0xE04, 0xFFFFFFFF, 0x00000000,
607 0xE08, 0x0000FF00, 0x00000000,
608 0x86C, 0xFFFFFF00, 0x00000000,
609 0xE10, 0xFFFFFFFF, 0x00000000,
610 0xE14, 0xFFFFFFFF, 0x00000000,
611 0xE18, 0xFFFFFFFF, 0x00000000,
612 0xE1C, 0xFFFFFFFF, 0x00000000,
613 0xE00, 0xFFFFFFFF, 0x02020202,
614 0xE04, 0xFFFFFFFF, 0x00020202,
615 0xE08, 0x0000FF00, 0x00000000,
616 0x86C, 0xFFFFFF00, 0x00000000,
617 0xE10, 0xFFFFFFFF, 0x04040404,
618 0xE14, 0xFFFFFFFF, 0x00020404,
619 0xE18, 0xFFFFFFFF, 0x00000000,
620 0xE1C, 0xFFFFFFFF, 0x00000000,
621 0xE00, 0xFFFFFFFF, 0x00000000,
622 0xE04, 0xFFFFFFFF, 0x00000000,
623 0xE08, 0x0000FF00, 0x00000000,
624 0x86C, 0xFFFFFF00, 0x00000000,
625 0xE10, 0xFFFFFFFF, 0x00000000,
626 0xE14, 0xFFFFFFFF, 0x00000000,
627 0xE18, 0xFFFFFFFF, 0x00000000,
628 0xE1C, 0xFFFFFFFF, 0x00000000,
629 0xE00, 0xFFFFFFFF, 0x00000000,
630 0xE04, 0xFFFFFFFF, 0x00000000,
631 0xE08, 0x0000FF00, 0x00000000,
632 0x86C, 0xFFFFFF00, 0x00000000,
633 0xE10, 0xFFFFFFFF, 0x00000000,
634 0xE14, 0xFFFFFFFF, 0x00000000,
635 0xE18, 0xFFFFFFFF, 0x00000000,
636 0xE1C, 0xFFFFFFFF, 0x00000000,
637 0xE00, 0xFFFFFFFF, 0x00000000,
638 0xE04, 0xFFFFFFFF, 0x00000000,
639 0xE08, 0x0000FF00, 0x00000000,
640 0x86C, 0xFFFFFF00, 0x00000000,
641 0xE10, 0xFFFFFFFF, 0x00000000,
642 0xE14, 0xFFFFFFFF, 0x00000000,
643 0xE18, 0xFFFFFFFF, 0x00000000,
644 0xE1C, 0xFFFFFFFF, 0x00000000,
645 0xE00, 0xFFFFFFFF, 0x00000000,
646 0xE04, 0xFFFFFFFF, 0x00000000,
647 0xE08, 0x0000FF00, 0x00000000,
648 0x86C, 0xFFFFFF00, 0x00000000,
649 0xE10, 0xFFFFFFFF, 0x00000000,
650 0xE14, 0xFFFFFFFF, 0x00000000,
651 0xE18, 0xFFFFFFFF, 0x00000000,
652 0xE1C, 0xFFFFFFFF, 0x00000000,
653 0xE00, 0xFFFFFFFF, 0x00000000,
654 0xE04, 0xFFFFFFFF, 0x00000000,
655 0xE08, 0x0000FF00, 0x00000000,
656 0x86C, 0xFFFFFF00, 0x00000000,
657 0xE10, 0xFFFFFFFF, 0x00000000,
658 0xE14, 0xFFFFFFFF, 0x00000000,
659 0xE18, 0xFFFFFFFF, 0x00000000,
660 0xE1C, 0xFFFFFFFF, 0x00000000,
664 void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm)
668 u8 platform = dm_odm->SupportPlatform;
669 u8 interfaceValue = dm_odm->SupportInterface;
670 u8 board = dm_odm->BoardType;
671 u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32);
672 u32 *array = array_phy_reg_pg_8188e;
674 hex = board + (interfaceValue << 8);
675 hex += (platform << 16) + 0xFF000000;
677 for (i = 0; i < arraylen; i += 3) {
682 /* this line is a line of pure_body */
683 if (v1 < 0xCDCDCDCD) {
684 odm_ConfigBB_PHY_REG_PG_8188E(dm_odm, v1, v2, v3);
686 } else { /* this line is the start of branch */
687 if (!CheckCondition(array[i], hex)) {
688 /* don't need the hw_body */
689 i += 2; /* skip the pair of expression */
693 while (v2 != 0xDEAD) {