Merge tag 'xtensa-20181228' of git://github.com/jcmvbkbc/linux-xtensa
[linux-2.6-microblaze.git] / drivers / staging / pi433 / rf69.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * abstraction of the spi interface of HopeRf rf69 radio module
4  *
5  * Copyright (C) 2016 Wolf-Entwicklungen
6  *      Marcus Wolf <linux@wolf-entwicklungen.de>
7  */
8
9 /* enable prosa debug info */
10 #undef DEBUG
11 /* enable print of values on reg access */
12 #undef DEBUG_VALUES
13 /* enable print of values on fifo access */
14 #undef DEBUG_FIFO_ACCESS
15
16 #include <linux/types.h>
17 #include <linux/spi/spi.h>
18
19 #include "rf69.h"
20 #include "rf69_registers.h"
21
22 #define F_OSC     32000000 /* in Hz */
23 #define FIFO_SIZE 66       /* in byte */
24
25 /*-------------------------------------------------------------------------*/
26
27 static u8 rf69_read_reg(struct spi_device *spi, u8 addr)
28 {
29         int retval;
30
31         retval = spi_w8r8(spi, addr);
32
33 #ifdef DEBUG_VALUES
34         if (retval < 0)
35                 /*
36                  * should never happen, since we already checked,
37                  * that module is connected. Therefore no error
38                  * handling, just an optional error message...
39                  */
40                 dev_dbg(&spi->dev, "read 0x%x FAILED\n", addr);
41         else
42                 dev_dbg(&spi->dev, "read 0x%x from reg 0x%x\n", retval, addr);
43 #endif
44
45         return retval;
46 }
47
48 static int rf69_write_reg(struct spi_device *spi, u8 addr, u8 value)
49 {
50         int retval;
51         char buffer[2];
52
53         buffer[0] = addr | WRITE_BIT;
54         buffer[1] = value;
55
56         retval = spi_write(spi, &buffer, 2);
57
58 #ifdef DEBUG_VALUES
59         if (retval < 0)
60                 /*
61                  * should never happen, since we already checked,
62                  * that module is connected. Therefore no error
63                  * handling, just an optional error message...
64                  */
65                 dev_dbg(&spi->dev, "write 0x%x to 0x%x FAILED\n", value, addr);
66         else
67                 dev_dbg(&spi->dev, "wrote 0x%x to reg 0x%x\n", value, addr);
68 #endif
69
70         return retval;
71 }
72
73 /*-------------------------------------------------------------------------*/
74
75 static int rf69_set_bit(struct spi_device *spi, u8 reg, u8 mask)
76 {
77         u8 tmp;
78
79         tmp = rf69_read_reg(spi, reg);
80         tmp = tmp | mask;
81         return rf69_write_reg(spi, reg, tmp);
82 }
83
84 static int rf69_clear_bit(struct spi_device *spi, u8 reg, u8 mask)
85 {
86         u8 tmp;
87
88         tmp = rf69_read_reg(spi, reg);
89         tmp = tmp & ~mask;
90         return rf69_write_reg(spi, reg, tmp);
91 }
92
93 static inline int rf69_read_mod_write(struct spi_device *spi, u8 reg,
94                                       u8 mask, u8 value)
95 {
96         u8 tmp;
97
98         tmp = rf69_read_reg(spi, reg);
99         tmp = (tmp & ~mask) | value;
100         return rf69_write_reg(spi, reg, tmp);
101 }
102
103 /*-------------------------------------------------------------------------*/
104
105 int rf69_set_mode(struct spi_device *spi, enum mode mode)
106 {
107         static const u8 mode_map[] = {
108                 [transmit] = OPMODE_MODE_TRANSMIT,
109                 [receive] = OPMODE_MODE_RECEIVE,
110                 [synthesizer] = OPMODE_MODE_SYNTHESIZER,
111                 [standby] = OPMODE_MODE_STANDBY,
112                 [mode_sleep] = OPMODE_MODE_SLEEP,
113         };
114
115         if (unlikely(mode >= ARRAY_SIZE(mode_map))) {
116                 dev_dbg(&spi->dev, "set: illegal input param");
117                 return -EINVAL;
118         }
119
120         return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE,
121                                    mode_map[mode]);
122
123         /*
124          * we are using packet mode, so this check is not really needed
125          * but waiting for mode ready is necessary when going from sleep
126          * because the FIFO may not be immediately available from previous mode
127          * while (_mode == RF69_MODE_SLEEP && (READ_REG(REG_IRQFLAGS1) &
128                   RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
129          */
130 }
131
132 int rf69_set_data_mode(struct spi_device *spi, u8 data_mode)
133 {
134         return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODE,
135                                    data_mode);
136 }
137
138 int rf69_set_modulation(struct spi_device *spi, enum modulation modulation)
139 {
140         static const u8 modulation_map[] = {
141                 [OOK] = DATAMODUL_MODULATION_TYPE_OOK,
142                 [FSK] = DATAMODUL_MODULATION_TYPE_FSK,
143         };
144
145         if (unlikely(modulation >= ARRAY_SIZE(modulation_map))) {
146                 dev_dbg(&spi->dev, "set: illegal input param");
147                 return -EINVAL;
148         }
149
150         return rf69_read_mod_write(spi, REG_DATAMODUL,
151                                    MASK_DATAMODUL_MODULATION_TYPE,
152                                    modulation_map[modulation]);
153 }
154
155 static enum modulation rf69_get_modulation(struct spi_device *spi)
156 {
157         u8 modulation_reg;
158
159         modulation_reg = rf69_read_reg(spi, REG_DATAMODUL);
160
161         switch (modulation_reg & MASK_DATAMODUL_MODULATION_TYPE) {
162         case DATAMODUL_MODULATION_TYPE_OOK:
163                 return OOK;
164         case DATAMODUL_MODULATION_TYPE_FSK:
165                 return FSK;
166         default:
167                 return UNDEF;
168         }
169 }
170
171 int rf69_set_modulation_shaping(struct spi_device *spi,
172                                 enum mod_shaping mod_shaping)
173 {
174         switch (rf69_get_modulation(spi)) {
175         case FSK:
176                 switch (mod_shaping) {
177                 case SHAPING_OFF:
178                         return rf69_read_mod_write(spi, REG_DATAMODUL,
179                                                    MASK_DATAMODUL_MODULATION_SHAPE,
180                                                    DATAMODUL_MODULATION_SHAPE_NONE);
181                 case SHAPING_1_0:
182                         return rf69_read_mod_write(spi, REG_DATAMODUL,
183                                                    MASK_DATAMODUL_MODULATION_SHAPE,
184                                                    DATAMODUL_MODULATION_SHAPE_1_0);
185                 case SHAPING_0_5:
186                         return rf69_read_mod_write(spi, REG_DATAMODUL,
187                                                    MASK_DATAMODUL_MODULATION_SHAPE,
188                                                    DATAMODUL_MODULATION_SHAPE_0_5);
189                 case SHAPING_0_3:
190                         return rf69_read_mod_write(spi, REG_DATAMODUL,
191                                                    MASK_DATAMODUL_MODULATION_SHAPE,
192                                                    DATAMODUL_MODULATION_SHAPE_0_3);
193                 default:
194                         dev_dbg(&spi->dev, "set: illegal input param");
195                         return -EINVAL;
196                 }
197         case OOK:
198                 switch (mod_shaping) {
199                 case SHAPING_OFF:
200                         return rf69_read_mod_write(spi, REG_DATAMODUL,
201                                                    MASK_DATAMODUL_MODULATION_SHAPE,
202                                                    DATAMODUL_MODULATION_SHAPE_NONE);
203                 case SHAPING_BR:
204                         return rf69_read_mod_write(spi, REG_DATAMODUL,
205                                                    MASK_DATAMODUL_MODULATION_SHAPE,
206                                                    DATAMODUL_MODULATION_SHAPE_BR);
207                 case SHAPING_2BR:
208                         return rf69_read_mod_write(spi, REG_DATAMODUL,
209                                                    MASK_DATAMODUL_MODULATION_SHAPE,
210                                                    DATAMODUL_MODULATION_SHAPE_2BR);
211                 default:
212                         dev_dbg(&spi->dev, "set: illegal input param");
213                         return -EINVAL;
214                 }
215         default:
216                 dev_dbg(&spi->dev, "set: modulation undefined");
217                 return -EINVAL;
218         }
219 }
220
221 int rf69_set_bit_rate(struct spi_device *spi, u16 bit_rate)
222 {
223         int retval;
224         u32 bit_rate_min;
225         u32 bit_rate_reg;
226         u8 msb;
227         u8 lsb;
228
229         // check input value
230         bit_rate_min = F_OSC / 8388608; // 8388608 = 2^23;
231         if (bit_rate < bit_rate_min) {
232                 dev_dbg(&spi->dev, "setBitRate: illegal input param");
233                 return -EINVAL;
234         }
235
236         // calculate reg settings
237         bit_rate_reg = (F_OSC / bit_rate);
238
239         msb = (bit_rate_reg & 0xff00) >> 8;
240         lsb = (bit_rate_reg & 0xff);
241
242         // transmit to RF 69
243         retval = rf69_write_reg(spi, REG_BITRATE_MSB, msb);
244         if (retval)
245                 return retval;
246         retval = rf69_write_reg(spi, REG_BITRATE_LSB, lsb);
247         if (retval)
248                 return retval;
249
250         return 0;
251 }
252
253 int rf69_set_deviation(struct spi_device *spi, u32 deviation)
254 {
255         int retval;
256         u64 f_reg;
257         u64 f_step;
258         u8 msb;
259         u8 lsb;
260         u64 factor = 1000000; // to improve precision of calculation
261
262         // TODO: Dependency to bitrate
263         if (deviation < 600 || deviation > 500000) {
264                 dev_dbg(&spi->dev, "set_deviation: illegal input param");
265                 return -EINVAL;
266         }
267
268         // calculat f step
269         f_step = F_OSC * factor;
270         do_div(f_step, 524288); //  524288 = 2^19
271
272         // calculate register settings
273         f_reg = deviation * factor;
274         do_div(f_reg, f_step);
275
276         msb = (f_reg & 0xff00) >> 8;
277         lsb = (f_reg & 0xff);
278
279         // check msb
280         if (msb & ~FDEVMASB_MASK) {
281                 dev_dbg(&spi->dev, "set_deviation: err in calc of msb");
282                 return -EINVAL;
283         }
284
285         // write to chip
286         retval = rf69_write_reg(spi, REG_FDEV_MSB, msb);
287         if (retval)
288                 return retval;
289         retval = rf69_write_reg(spi, REG_FDEV_LSB, lsb);
290         if (retval)
291                 return retval;
292
293         return 0;
294 }
295
296 int rf69_set_frequency(struct spi_device *spi, u32 frequency)
297 {
298         int retval;
299         u32 f_max;
300         u64 f_reg;
301         u64 f_step;
302         u8 msb;
303         u8 mid;
304         u8 lsb;
305         u64 factor = 1000000; // to improve precision of calculation
306
307         // calculat f step
308         f_step = F_OSC * factor;
309         do_div(f_step, 524288); //  524288 = 2^19
310
311         // check input value
312         f_max = div_u64(f_step * 8388608, factor);
313         if (frequency > f_max) {
314                 dev_dbg(&spi->dev, "setFrequency: illegal input param");
315                 return -EINVAL;
316         }
317
318         // calculate reg settings
319         f_reg = frequency * factor;
320         do_div(f_reg, f_step);
321
322         msb = (f_reg & 0xff0000) >> 16;
323         mid = (f_reg & 0xff00)   >>  8;
324         lsb = (f_reg & 0xff);
325
326         // write to chip
327         retval = rf69_write_reg(spi, REG_FRF_MSB, msb);
328         if (retval)
329                 return retval;
330         retval = rf69_write_reg(spi, REG_FRF_MID, mid);
331         if (retval)
332                 return retval;
333         retval = rf69_write_reg(spi, REG_FRF_LSB, lsb);
334         if (retval)
335                 return retval;
336
337         return 0;
338 }
339
340 int rf69_enable_amplifier(struct spi_device *spi, u8 amplifier_mask)
341 {
342         return rf69_set_bit(spi, REG_PALEVEL, amplifier_mask);
343 }
344
345 int rf69_disable_amplifier(struct spi_device *spi, u8 amplifier_mask)
346 {
347         return rf69_clear_bit(spi, REG_PALEVEL, amplifier_mask);
348 }
349
350 int rf69_set_output_power_level(struct spi_device *spi, u8 power_level)
351 {
352         // TODO: Dependency to PA0,1,2 setting
353         power_level += 18;
354
355         // check input value
356         if (power_level > 0x1f) {
357                 dev_dbg(&spi->dev, "set: illegal input param");
358                 return -EINVAL;
359         }
360
361         // write value
362         return rf69_read_mod_write(spi, REG_PALEVEL, MASK_PALEVEL_OUTPUT_POWER,
363                                    power_level);
364 }
365
366 int rf69_set_pa_ramp(struct spi_device *spi, enum pa_ramp pa_ramp)
367 {
368         static const u8 pa_ramp_map[] = {
369                 [ramp3400] = PARAMP_3400,
370                 [ramp2000] = PARAMP_2000,
371                 [ramp1000] = PARAMP_1000,
372                 [ramp500] = PARAMP_500,
373                 [ramp250] = PARAMP_250,
374                 [ramp125] = PARAMP_125,
375                 [ramp100] = PARAMP_100,
376                 [ramp62] = PARAMP_62,
377                 [ramp50] = PARAMP_50,
378                 [ramp40] = PARAMP_40,
379                 [ramp31] = PARAMP_31,
380                 [ramp25] = PARAMP_25,
381                 [ramp20] = PARAMP_20,
382                 [ramp15] = PARAMP_15,
383                 [ramp10] = PARAMP_10,
384         };
385
386         if (unlikely(pa_ramp >= ARRAY_SIZE(pa_ramp_map))) {
387                 dev_dbg(&spi->dev, "set: illegal input param");
388                 return -EINVAL;
389         }
390
391         return rf69_write_reg(spi, REG_PARAMP, pa_ramp_map[pa_ramp]);
392 }
393
394 int rf69_set_antenna_impedance(struct spi_device *spi,
395                                enum antenna_impedance antenna_impedance)
396 {
397         switch (antenna_impedance) {
398         case fifty_ohm:
399                 return rf69_clear_bit(spi, REG_LNA, MASK_LNA_ZIN);
400         case two_hundred_ohm:
401                 return rf69_set_bit(spi, REG_LNA, MASK_LNA_ZIN);
402         default:
403                 dev_dbg(&spi->dev, "set: illegal input param");
404                 return -EINVAL;
405         }
406 }
407
408 int rf69_set_lna_gain(struct spi_device *spi, enum lna_gain lna_gain)
409 {
410         static const u8 lna_gain_map[] = {
411                 [automatic] = LNA_GAIN_AUTO,
412                 [max] = LNA_GAIN_MAX,
413                 [max_minus_6] = LNA_GAIN_MAX_MINUS_6,
414                 [max_minus_12] = LNA_GAIN_MAX_MINUS_12,
415                 [max_minus_24] = LNA_GAIN_MAX_MINUS_24,
416                 [max_minus_36] = LNA_GAIN_MAX_MINUS_36,
417                 [max_minus_48] = LNA_GAIN_MAX_MINUS_48,
418         };
419
420         if (unlikely(lna_gain >= ARRAY_SIZE(lna_gain_map))) {
421                 dev_dbg(&spi->dev, "set: illegal input param");
422                 return -EINVAL;
423         }
424
425         return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
426                                    lna_gain_map[lna_gain]);
427 }
428
429 static int rf69_set_bandwidth_intern(struct spi_device *spi, u8 reg,
430                                      enum mantisse mantisse, u8 exponent)
431 {
432         u8 bandwidth;
433
434         // check value for mantisse and exponent
435         if (exponent > 7) {
436                 dev_dbg(&spi->dev, "set: illegal input param");
437                 return -EINVAL;
438         }
439
440         if ((mantisse != mantisse16) &&
441             (mantisse != mantisse20) &&
442             (mantisse != mantisse24)) {
443                 dev_dbg(&spi->dev, "set: illegal input param");
444                 return -EINVAL;
445         }
446
447         // read old value
448         bandwidth = rf69_read_reg(spi, reg);
449
450         // "delete" mantisse and exponent = just keep the DCC setting
451         bandwidth = bandwidth & MASK_BW_DCC_FREQ;
452
453         // add new mantisse
454         switch (mantisse) {
455         case mantisse16:
456                 bandwidth = bandwidth | BW_MANT_16;
457                 break;
458         case mantisse20:
459                 bandwidth = bandwidth | BW_MANT_20;
460                 break;
461         case mantisse24:
462                 bandwidth = bandwidth | BW_MANT_24;
463                 break;
464         }
465
466         // add new exponent
467         bandwidth = bandwidth | exponent;
468
469         // write back
470         return rf69_write_reg(spi, reg, bandwidth);
471 }
472
473 int rf69_set_bandwidth(struct spi_device *spi, enum mantisse mantisse,
474                        u8 exponent)
475 {
476         return rf69_set_bandwidth_intern(spi, REG_RXBW, mantisse, exponent);
477 }
478
479 int rf69_set_bandwidth_during_afc(struct spi_device *spi,
480                                   enum mantisse mantisse,
481                                   u8 exponent)
482 {
483         return rf69_set_bandwidth_intern(spi, REG_AFCBW, mantisse, exponent);
484 }
485
486 int rf69_set_ook_threshold_dec(struct spi_device *spi,
487                                enum threshold_decrement threshold_decrement)
488 {
489         static const u8 td_map[] = {
490                 [dec_every8th] = OOKPEAK_THRESHDEC_EVERY_8TH,
491                 [dec_every4th] = OOKPEAK_THRESHDEC_EVERY_4TH,
492                 [dec_every2nd] = OOKPEAK_THRESHDEC_EVERY_2ND,
493                 [dec_once] = OOKPEAK_THRESHDEC_ONCE,
494                 [dec_twice] = OOKPEAK_THRESHDEC_TWICE,
495                 [dec_4times] = OOKPEAK_THRESHDEC_4_TIMES,
496                 [dec_8times] = OOKPEAK_THRESHDEC_8_TIMES,
497                 [dec_16times] = OOKPEAK_THRESHDEC_16_TIMES,
498         };
499
500         if (unlikely(threshold_decrement >= ARRAY_SIZE(td_map))) {
501                 dev_dbg(&spi->dev, "set: illegal input param");
502                 return -EINVAL;
503         }
504
505         return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC,
506                                    td_map[threshold_decrement]);
507 }
508
509 int rf69_set_dio_mapping(struct spi_device *spi, u8 dio_number, u8 value)
510 {
511         u8 mask;
512         u8 shift;
513         u8 dio_addr;
514         u8 dio_value;
515
516         switch (dio_number) {
517         case 0:
518                 mask = MASK_DIO0;
519                 shift = SHIFT_DIO0;
520                 dio_addr = REG_DIOMAPPING1;
521                 break;
522         case 1:
523                 mask = MASK_DIO1;
524                 shift = SHIFT_DIO1;
525                 dio_addr = REG_DIOMAPPING1;
526                 break;
527         case 2:
528                 mask = MASK_DIO2;
529                 shift = SHIFT_DIO2;
530                 dio_addr = REG_DIOMAPPING1;
531                 break;
532         case 3:
533                 mask = MASK_DIO3;
534                 shift = SHIFT_DIO3;
535                 dio_addr = REG_DIOMAPPING1;
536                 break;
537         case 4:
538                 mask = MASK_DIO4;
539                 shift = SHIFT_DIO4;
540                 dio_addr = REG_DIOMAPPING2;
541                 break;
542         case 5:
543                 mask = MASK_DIO5;
544                 shift = SHIFT_DIO5;
545                 dio_addr = REG_DIOMAPPING2;
546                 break;
547         default:
548         dev_dbg(&spi->dev, "set: illegal input param");
549                 return -EINVAL;
550         }
551
552         // read reg
553         dio_value = rf69_read_reg(spi, dio_addr);
554         // delete old value
555         dio_value = dio_value & ~mask;
556         // add new value
557         dio_value = dio_value | value << shift;
558         // write back
559         return rf69_write_reg(spi, dio_addr, dio_value);
560 }
561
562 bool rf69_get_flag(struct spi_device *spi, enum flag flag)
563 {
564         switch (flag) {
565         case mode_switch_completed:
566                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
567         case ready_to_receive:
568                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
569         case ready_to_send:
570                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
571         case pll_locked:
572                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
573         case rssi_exceeded_threshold:
574                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
575         case timeout:
576                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
577         case automode:
578                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
579         case sync_address_match:
580                 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
581         case fifo_full:
582                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
583 /*
584  *      case fifo_not_empty:
585  *              return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
586  */
587         case fifo_empty:
588                 return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
589         case fifo_level_below_threshold:
590                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
591         case fifo_overrun:
592                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
593         case packet_sent:
594                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
595         case payload_ready:
596                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
597         case crc_ok:
598                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
599         case battery_low:
600                 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
601         default:                         return false;
602         }
603 }
604
605 int rf69_set_rssi_threshold(struct spi_device *spi, u8 threshold)
606 {
607         /* no value check needed - u8 exactly matches register size */
608
609         return rf69_write_reg(spi, REG_RSSITHRESH, threshold);
610 }
611
612 int rf69_set_preamble_length(struct spi_device *spi, u16 preamble_length)
613 {
614         int retval;
615         u8 msb, lsb;
616
617         /* no value check needed - u16 exactly matches register size */
618
619         /* calculate reg settings */
620         msb = (preamble_length & 0xff00) >> 8;
621         lsb = (preamble_length & 0xff);
622
623         /* transmit to chip */
624         retval = rf69_write_reg(spi, REG_PREAMBLE_MSB, msb);
625         if (retval)
626                 return retval;
627         retval = rf69_write_reg(spi, REG_PREAMBLE_LSB, lsb);
628
629         return retval;
630 }
631
632 int rf69_enable_sync(struct spi_device *spi)
633 {
634         return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
635 }
636
637 int rf69_disable_sync(struct spi_device *spi)
638 {
639         return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
640 }
641
642 int rf69_set_fifo_fill_condition(struct spi_device *spi,
643                                  enum fifo_fill_condition fifo_fill_condition)
644 {
645         switch (fifo_fill_condition) {
646         case always:
647                 return rf69_set_bit(spi, REG_SYNC_CONFIG,
648                                     MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
649         case after_sync_interrupt:
650                 return rf69_clear_bit(spi, REG_SYNC_CONFIG,
651                                       MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
652         default:
653                 dev_dbg(&spi->dev, "set: illegal input param");
654                 return -EINVAL;
655         }
656 }
657
658 int rf69_set_sync_size(struct spi_device *spi, u8 sync_size)
659 {
660         // check input value
661         if (sync_size > 0x07) {
662                 dev_dbg(&spi->dev, "set: illegal input param");
663                 return -EINVAL;
664         }
665
666         // write value
667         return rf69_read_mod_write(spi, REG_SYNC_CONFIG,
668                                    MASK_SYNC_CONFIG_SYNC_SIZE,
669                                    (sync_size << 3));
670 }
671
672 int rf69_set_sync_values(struct spi_device *spi, u8 sync_values[8])
673 {
674         int retval = 0;
675
676         retval += rf69_write_reg(spi, REG_SYNCVALUE1, sync_values[0]);
677         retval += rf69_write_reg(spi, REG_SYNCVALUE2, sync_values[1]);
678         retval += rf69_write_reg(spi, REG_SYNCVALUE3, sync_values[2]);
679         retval += rf69_write_reg(spi, REG_SYNCVALUE4, sync_values[3]);
680         retval += rf69_write_reg(spi, REG_SYNCVALUE5, sync_values[4]);
681         retval += rf69_write_reg(spi, REG_SYNCVALUE6, sync_values[5]);
682         retval += rf69_write_reg(spi, REG_SYNCVALUE7, sync_values[6]);
683         retval += rf69_write_reg(spi, REG_SYNCVALUE8, sync_values[7]);
684
685         return retval;
686 }
687
688 int rf69_set_packet_format(struct spi_device *spi,
689                            enum packet_format packet_format)
690 {
691         switch (packet_format) {
692         case packet_length_var:
693                 return rf69_set_bit(spi, REG_PACKETCONFIG1,
694                                     MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
695         case packet_length_fix:
696                 return rf69_clear_bit(spi, REG_PACKETCONFIG1,
697                                       MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
698         default:
699                 dev_dbg(&spi->dev, "set: illegal input param");
700                 return -EINVAL;
701         }
702 }
703
704 int rf69_enable_crc(struct spi_device *spi)
705 {
706         return rf69_set_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
707 }
708
709 int rf69_disable_crc(struct spi_device *spi)
710 {
711         return rf69_clear_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
712 }
713
714 int rf69_set_address_filtering(struct spi_device *spi,
715                                enum address_filtering address_filtering)
716 {
717         static const u8 af_map[] = {
718                 [filtering_off] = PACKETCONFIG1_ADDRESSFILTERING_OFF,
719                 [node_address] = PACKETCONFIG1_ADDRESSFILTERING_NODE,
720                 [node_or_broadcast_address] =
721                         PACKETCONFIG1_ADDRESSFILTERING_NODEBROADCAST,
722         };
723
724         if (unlikely(address_filtering >= ARRAY_SIZE(af_map))) {
725                 dev_dbg(&spi->dev, "set: illegal input param");
726                 return -EINVAL;
727         }
728
729         return rf69_read_mod_write(spi, REG_PACKETCONFIG1,
730                                    MASK_PACKETCONFIG1_ADDRESSFILTERING,
731                                    af_map[address_filtering]);
732 }
733
734 int rf69_set_payload_length(struct spi_device *spi, u8 payload_length)
735 {
736         return rf69_write_reg(spi, REG_PAYLOAD_LENGTH, payload_length);
737 }
738
739 int rf69_set_node_address(struct spi_device *spi, u8 node_address)
740 {
741         return rf69_write_reg(spi, REG_NODEADRS, node_address);
742 }
743
744 int rf69_set_broadcast_address(struct spi_device *spi, u8 broadcast_address)
745 {
746         return rf69_write_reg(spi, REG_BROADCASTADRS, broadcast_address);
747 }
748
749 int rf69_set_tx_start_condition(struct spi_device *spi,
750                                 enum tx_start_condition tx_start_condition)
751 {
752         switch (tx_start_condition) {
753         case fifo_level:
754                 return rf69_clear_bit(spi, REG_FIFO_THRESH,
755                                       MASK_FIFO_THRESH_TXSTART);
756         case fifo_not_empty:
757                 return rf69_set_bit(spi, REG_FIFO_THRESH,
758                                     MASK_FIFO_THRESH_TXSTART);
759         default:
760                 dev_dbg(&spi->dev, "set: illegal input param");
761                 return -EINVAL;
762         }
763 }
764
765 int rf69_set_fifo_threshold(struct spi_device *spi, u8 threshold)
766 {
767         int retval;
768
769         /* check input value */
770         if (threshold & 0x80) {
771                 dev_dbg(&spi->dev, "set: illegal input param");
772                 return -EINVAL;
773         }
774
775         /* write value */
776         retval = rf69_read_mod_write(spi, REG_FIFO_THRESH,
777                                      MASK_FIFO_THRESH_VALUE,
778                                      threshold);
779         if (retval)
780                 return retval;
781
782         /*
783          * access the fifo to activate new threshold
784          * retval (mis-) used as buffer here
785          */
786         return rf69_read_fifo(spi, (u8 *)&retval, 1);
787 }
788
789 int rf69_set_dagc(struct spi_device *spi, enum dagc dagc)
790 {
791         static const u8 dagc_map[] = {
792                 [normal_mode] = DAGC_NORMAL,
793                 [improve] = DAGC_IMPROVED_LOWBETA0,
794                 [improve_for_low_modulation_index] = DAGC_IMPROVED_LOWBETA1,
795         };
796
797         if (unlikely(dagc >= ARRAY_SIZE(dagc_map))) {
798                 dev_dbg(&spi->dev, "set: illegal input param");
799                 return -EINVAL;
800         }
801
802         return rf69_write_reg(spi, REG_TESTDAGC, dagc_map[dagc]);
803 }
804
805 /*-------------------------------------------------------------------------*/
806
807 int rf69_read_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
808 {
809 #ifdef DEBUG_FIFO_ACCESS
810         int i;
811 #endif
812         struct spi_transfer transfer;
813         u8 local_buffer[FIFO_SIZE + 1];
814         int retval;
815
816         if (size > FIFO_SIZE) {
817                 dev_dbg(&spi->dev,
818                         "read fifo: passed in buffer bigger then internal buffer\n");
819                 return -EMSGSIZE;
820         }
821
822         /* prepare a bidirectional transfer */
823         local_buffer[0] = REG_FIFO;
824         memset(&transfer, 0, sizeof(transfer));
825         transfer.tx_buf = local_buffer;
826         transfer.rx_buf = local_buffer;
827         transfer.len    = size + 1;
828
829         retval = spi_sync_transfer(spi, &transfer, 1);
830
831 #ifdef DEBUG_FIFO_ACCESS
832         for (i = 0; i < size; i++)
833                 dev_dbg(&spi->dev, "%d - 0x%x\n", i, local_buffer[i + 1]);
834 #endif
835
836         memcpy(buffer, &local_buffer[1], size);
837
838         return retval;
839 }
840
841 int rf69_write_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
842 {
843 #ifdef DEBUG_FIFO_ACCESS
844         int i;
845 #endif
846         u8 local_buffer[FIFO_SIZE + 1];
847
848         if (size > FIFO_SIZE) {
849                 dev_dbg(&spi->dev,
850                         "read fifo: passed in buffer bigger then internal buffer\n");
851                 return -EMSGSIZE;
852         }
853
854         local_buffer[0] = REG_FIFO | WRITE_BIT;
855         memcpy(&local_buffer[1], buffer, size);
856
857 #ifdef DEBUG_FIFO_ACCESS
858         for (i = 0; i < size; i++)
859                 dev_dbg(&spi->dev, "0x%x\n", buffer[i]);
860 #endif
861
862         return spi_write(spi, local_buffer, size + 1);
863 }
864