drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Rockchip VPU codec driver
   4  *
   5  * Copyright (C) 2018 Collabora, Ltd.
   6  * Copyright 2018 Google LLC.
   7  *      Tomasz Figa <tfiga@chromium.org>
   8  *
   9  * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
  10  * Copyright (C) 2011 Samsung Electronics Co., Ltd.
  11  */
  12
  13 #include <linux/clk.h>
  14 #include <linux/module.h>
  15 #include <linux/of.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/pm.h>
  18 #include <linux/pm_runtime.h>
  19 #include <linux/slab.h>
  20 #include <linux/videodev2.h>
  21 #include <linux/workqueue.h>
  22 #include <media/v4l2-event.h>
  23 #include <media/v4l2-mem2mem.h>
  24 #include <media/videobuf2-core.h>
  25 #include <media/videobuf2-vmalloc.h>
  26
  27 #include "rockchip_vpu_common.h"
  28 #include "rockchip_vpu.h"
  29 #include "rockchip_vpu_hw.h"
  30
  31 #define DRIVER_NAME "rockchip-vpu"
  32
  33 int rockchip_vpu_debug;
  34 module_param_named(debug, rockchip_vpu_debug, int, 0644);
  35 MODULE_PARM_DESC(debug,
  36                  "Debug level - higher value produces more verbose messages");
  37
  38 static void rockchip_vpu_job_finish(struct rockchip_vpu_dev *vpu,
  39                                     struct rockchip_vpu_ctx *ctx,
  40                                     unsigned int bytesused,
  41                                     enum vb2_buffer_state result)
  42 {
  43         struct vb2_v4l2_buffer *src, *dst;
  44         size_t avail_size;
  45
  46         pm_runtime_mark_last_busy(vpu->dev);
  47         pm_runtime_put_autosuspend(vpu->dev);
  48         clk_bulk_disable(vpu->variant->num_clocks, vpu->clocks);
  49
  50         src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
  51         dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
  52
  53         if (WARN_ON(!src))
  54                 return;
  55         if (WARN_ON(!dst))
  56                 return;
  57
  58         src->sequence = ctx->sequence_out++;
  59         dst->sequence = ctx->sequence_cap++;
  60
  61         dst->field = src->field;
  62         if (src->flags & V4L2_BUF_FLAG_TIMECODE)
  63                 dst->timecode = src->timecode;
  64         dst->vb2_buf.timestamp = src->vb2_buf.timestamp;
  65         dst->flags &= ~(V4L2_BUF_FLAG_TSTAMP_SRC_MASK |
  66                         V4L2_BUF_FLAG_TIMECODE);
  67         dst->flags |= src->flags & (V4L2_BUF_FLAG_TSTAMP_SRC_MASK |
  68                                     V4L2_BUF_FLAG_TIMECODE);
  69
  70         avail_size = vb2_plane_size(&dst->vb2_buf, 0) -
  71                      ctx->vpu_dst_fmt->header_size;
  72         if (bytesused <= avail_size) {
  73                 if (ctx->bounce_buf) {
  74                         memcpy(vb2_plane_vaddr(&dst->vb2_buf, 0) +
  75                                ctx->vpu_dst_fmt->header_size,
  76                                ctx->bounce_buf, bytesused);
  77                 }
  78                 dst->vb2_buf.planes[0].bytesused =
  79                         ctx->vpu_dst_fmt->header_size + bytesused;
  80         } else {
  81                 result = VB2_BUF_STATE_ERROR;
  82         }
  83
  84         v4l2_m2m_buf_done(src, result);
  85         v4l2_m2m_buf_done(dst, result);
  86
  87         v4l2_m2m_job_finish(vpu->m2m_dev, ctx->fh.m2m_ctx);
  88 }
  89
  90 void rockchip_vpu_irq_done(struct rockchip_vpu_dev *vpu,
  91                            unsigned int bytesused,
  92                            enum vb2_buffer_state result)
  93 {
  94         struct rockchip_vpu_ctx *ctx =
  95                 v4l2_m2m_get_curr_priv(vpu->m2m_dev);
  96
  97         /*
  98          * If cancel_delayed_work returns false
  99          * the timeout expired. The watchdog is running,
 100          * and will take care of finishing the job.
 101          */
 102         if (cancel_delayed_work(&vpu->watchdog_work))
 103                 rockchip_vpu_job_finish(vpu, ctx, bytesused, result);
 104 }
 105
 106 void rockchip_vpu_watchdog(struct work_struct *work)
 107 {
 108         struct rockchip_vpu_dev *vpu;
 109         struct rockchip_vpu_ctx *ctx;
 110
 111         vpu = container_of(to_delayed_work(work),
 112                            struct rockchip_vpu_dev, watchdog_work);
 113         ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev);
 114         if (ctx) {
 115                 vpu_err("frame processing timed out!\n");
 116                 ctx->codec_ops->reset(ctx);
 117                 rockchip_vpu_job_finish(vpu, ctx, 0, VB2_BUF_STATE_ERROR);
 118         }
 119 }
 120
 121 static void device_run(void *priv)
 122 {
 123         struct rockchip_vpu_ctx *ctx = priv;
 124         int ret;
 125
 126         ret = clk_bulk_enable(ctx->dev->variant->num_clocks, ctx->dev->clocks);
 127         if (ret)
 128                 goto err_cancel_job;
 129         ret = pm_runtime_get_sync(ctx->dev->dev);
 130         if (ret < 0)
 131                 goto err_cancel_job;
 132
 133         ctx->codec_ops->run(ctx);
 134         return;
 135
 136 err_cancel_job:
 137         rockchip_vpu_job_finish(ctx->dev, ctx, 0, VB2_BUF_STATE_ERROR);
 138 }
 139
 140 static struct v4l2_m2m_ops vpu_m2m_ops = {
 141         .device_run = device_run,
 142 };
 143
 144 static int
 145 enc_queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
 146 {
 147         struct rockchip_vpu_ctx *ctx = priv;
 148         int ret;
 149
 150         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
 151         src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
 152         src_vq->drv_priv = ctx;
 153         src_vq->ops = &rockchip_vpu_enc_queue_ops;
 154         src_vq->mem_ops = &vb2_dma_contig_memops;
 155
 156         /*
 157          * Driver does mostly sequential access, so sacrifice TLB efficiency
 158          * for faster allocation. Also, no CPU access on the source queue,
 159          * so no kernel mapping needed.
 160          */
 161         src_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES |
 162                             DMA_ATTR_NO_KERNEL_MAPPING;
 163         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
 164         src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 165         src_vq->lock = &ctx->dev->vpu_mutex;
 166         src_vq->dev = ctx->dev->v4l2_dev.dev;
 167
 168         ret = vb2_queue_init(src_vq);
 169         if (ret)
 170                 return ret;
 171
 172         /*
 173          * The CAPTURE queue doesn't need dma memory,
 174          * as the CPU needs to create the JPEG frames,
 175          * from the hardware-produced JPEG payload.
 176          *
 177          * For the DMA destination buffer, we use
 178          * a bounce buffer.
 179          */
 180         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
 181         dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
 182         dst_vq->drv_priv = ctx;
 183         dst_vq->ops = &rockchip_vpu_enc_queue_ops;
 184         dst_vq->mem_ops = &vb2_vmalloc_memops;
 185         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
 186         dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 187         dst_vq->lock = &ctx->dev->vpu_mutex;
 188         dst_vq->dev = ctx->dev->v4l2_dev.dev;
 189
 190         return vb2_queue_init(dst_vq);
 191 }
 192
 193 static int rockchip_vpu_s_ctrl(struct v4l2_ctrl *ctrl)
 194 {
 195         struct rockchip_vpu_ctx *ctx;
 196
 197         ctx = container_of(ctrl->handler,
 198                            struct rockchip_vpu_ctx, ctrl_handler);
 199
 200         vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
 201
 202         switch (ctrl->id) {
 203         case V4L2_CID_JPEG_COMPRESSION_QUALITY:
 204                 ctx->jpeg_quality = ctrl->val;
 205                 break;
 206         default:
 207                 return -EINVAL;
 208         }
 209
 210         return 0;
 211 }
 212
 213 static const struct v4l2_ctrl_ops rockchip_vpu_ctrl_ops = {
 214         .s_ctrl = rockchip_vpu_s_ctrl,
 215 };
 216
 217 static int rockchip_vpu_ctrls_setup(struct rockchip_vpu_dev *vpu,
 218                                     struct rockchip_vpu_ctx *ctx)
 219 {
 220         v4l2_ctrl_handler_init(&ctx->ctrl_handler, 1);
 221         if (vpu->variant->codec & RK_VPU_CODEC_JPEG) {
 222                 v4l2_ctrl_new_std(&ctx->ctrl_handler, &rockchip_vpu_ctrl_ops,
 223                                   V4L2_CID_JPEG_COMPRESSION_QUALITY,
 224                                   5, 100, 1, 50);
 225                 if (ctx->ctrl_handler.error) {
 226                         vpu_err("Adding JPEG control failed %d\n",
 227                                 ctx->ctrl_handler.error);
 228                         v4l2_ctrl_handler_free(&ctx->ctrl_handler);
 229                         return ctx->ctrl_handler.error;
 230                 }
 231         }
 232
 233         return v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
 234 }
 235
 236 /*
 237  * V4L2 file operations.
 238  */
 239
 240 static int rockchip_vpu_open(struct file *filp)
 241 {
 242         struct rockchip_vpu_dev *vpu = video_drvdata(filp);
 243         struct video_device *vdev = video_devdata(filp);
 244         struct rockchip_vpu_ctx *ctx;
 245         int ret;
 246
 247         /*
 248          * We do not need any extra locking here, because we operate only
 249          * on local data here, except reading few fields from dev, which
 250          * do not change through device's lifetime (which is guaranteed by
 251          * reference on module from open()) and V4L2 internal objects (such
 252          * as vdev and ctx->fh), which have proper locking done in respective
 253          * helper functions used here.
 254          */
 255
 256         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 257         if (!ctx)
 258                 return -ENOMEM;
 259
 260         ctx->dev = vpu;
 261         if (vdev == vpu->vfd_enc)
 262                 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(vpu->m2m_dev, ctx,
 263                                                     &enc_queue_init);
 264         else
 265                 ctx->fh.m2m_ctx = ERR_PTR(-ENODEV);
 266         if (IS_ERR(ctx->fh.m2m_ctx)) {
 267                 ret = PTR_ERR(ctx->fh.m2m_ctx);
 268                 kfree(ctx);
 269                 return ret;
 270         }
 271
 272         v4l2_fh_init(&ctx->fh, vdev);
 273         filp->private_data = &ctx->fh;
 274         v4l2_fh_add(&ctx->fh);
 275
 276         if (vdev == vpu->vfd_enc) {
 277                 rockchip_vpu_enc_reset_dst_fmt(vpu, ctx);
 278                 rockchip_vpu_enc_reset_src_fmt(vpu, ctx);
 279         }
 280
 281         ret = rockchip_vpu_ctrls_setup(vpu, ctx);
 282         if (ret) {
 283                 vpu_err("Failed to set up controls\n");
 284                 goto err_fh_free;
 285         }
 286         ctx->fh.ctrl_handler = &ctx->ctrl_handler;
 287
 288         return 0;
 289
 290 err_fh_free:
 291         v4l2_fh_del(&ctx->fh);
 292         v4l2_fh_exit(&ctx->fh);
 293         kfree(ctx);
 294         return ret;
 295 }
 296
 297 static int rockchip_vpu_release(struct file *filp)
 298 {
 299         struct rockchip_vpu_ctx *ctx =
 300                 container_of(filp->private_data, struct rockchip_vpu_ctx, fh);
 301
 302         /*
 303          * No need for extra locking because this was the last reference
 304          * to this file.
 305          */
 306         v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
 307         v4l2_fh_del(&ctx->fh);
 308         v4l2_fh_exit(&ctx->fh);
 309         v4l2_ctrl_handler_free(&ctx->ctrl_handler);
 310         kfree(ctx);
 311
 312         return 0;
 313 }
 314
 315 static const struct v4l2_file_operations rockchip_vpu_fops = {
 316         .owner = THIS_MODULE,
 317         .open = rockchip_vpu_open,
 318         .release = rockchip_vpu_release,
 319         .poll = v4l2_m2m_fop_poll,
 320         .unlocked_ioctl = video_ioctl2,
 321         .mmap = v4l2_m2m_fop_mmap,
 322 };
 323
 324 static const struct of_device_id of_rockchip_vpu_match[] = {
 325         { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
 326         { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
 327         { /* sentinel */ }
 328 };
 329 MODULE_DEVICE_TABLE(of, of_rockchip_vpu_match);
 330
 331 static int rockchip_vpu_video_device_register(struct rockchip_vpu_dev *vpu)
 332 {
 333         const struct of_device_id *match;
 334         struct video_device *vfd;
 335         int function, ret;
 336
 337         match = of_match_node(of_rockchip_vpu_match, vpu->dev->of_node);
 338         vfd = video_device_alloc();
 339         if (!vfd) {
 340                 v4l2_err(&vpu->v4l2_dev, "Failed to allocate video device\n");
 341                 return -ENOMEM;
 342         }
 343
 344         vfd->fops = &rockchip_vpu_fops;
 345         vfd->release = video_device_release;
 346         vfd->lock = &vpu->vpu_mutex;
 347         vfd->v4l2_dev = &vpu->v4l2_dev;
 348         vfd->vfl_dir = VFL_DIR_M2M;
 349         vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_M2M_MPLANE;
 350         vfd->ioctl_ops = &rockchip_vpu_enc_ioctl_ops;
 351         snprintf(vfd->name, sizeof(vfd->name), "%s-enc", match->compatible);
 352         vpu->vfd_enc = vfd;
 353         video_set_drvdata(vfd, vpu);
 354
 355         ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
 356         if (ret) {
 357                 v4l2_err(&vpu->v4l2_dev, "Failed to register video device\n");
 358                 goto err_free_dev;
 359         }
 360         v4l2_info(&vpu->v4l2_dev, "registered as /dev/video%d\n", vfd->num);
 361
 362         function = MEDIA_ENT_F_PROC_VIDEO_ENCODER;
 363         ret = v4l2_m2m_register_media_controller(vpu->m2m_dev, vfd, function);
 364         if (ret) {
 365                 v4l2_err(&vpu->v4l2_dev, "Failed to init mem2mem media controller\n");
 366                 goto err_unreg_video;
 367         }
 368         return 0;
 369
 370 err_unreg_video:
 371         video_unregister_device(vfd);
 372 err_free_dev:
 373         video_device_release(vfd);
 374         return ret;
 375 }
 376
 377 static int rockchip_vpu_probe(struct platform_device *pdev)
 378 {
 379         const struct of_device_id *match;
 380         struct rockchip_vpu_dev *vpu;
 381         struct resource *res;
 382         int i, ret;
 383
 384         vpu = devm_kzalloc(&pdev->dev, sizeof(*vpu), GFP_KERNEL);
 385         if (!vpu)
 386                 return -ENOMEM;
 387
 388         vpu->dev = &pdev->dev;
 389         vpu->pdev = pdev;
 390         mutex_init(&vpu->vpu_mutex);
 391         spin_lock_init(&vpu->irqlock);
 392
 393         match = of_match_node(of_rockchip_vpu_match, pdev->dev.of_node);
 394         vpu->variant = match->data;
 395
 396         INIT_DELAYED_WORK(&vpu->watchdog_work, rockchip_vpu_watchdog);
 397
 398         for (i = 0; i < vpu->variant->num_clocks; i++)
 399                 vpu->clocks[i].id = vpu->variant->clk_names[i];
 400         ret = devm_clk_bulk_get(&pdev->dev, vpu->variant->num_clocks,
 401                                 vpu->clocks);
 402         if (ret)
 403                 return ret;
 404
 405         res = platform_get_resource(vpu->pdev, IORESOURCE_MEM, 0);
 406         vpu->base = devm_ioremap_resource(vpu->dev, res);
 407         if (IS_ERR(vpu->base))
 408                 return PTR_ERR(vpu->base);
 409         vpu->enc_base = vpu->base + vpu->variant->enc_offset;
 410
 411         ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32));
 412         if (ret) {
 413                 dev_err(vpu->dev, "Could not set DMA coherent mask.\n");
 414                 return ret;
 415         }
 416
 417         if (vpu->variant->vepu_irq) {
 418                 int irq;
 419
 420                 irq = platform_get_irq_byname(vpu->pdev, "vepu");
 421                 if (irq <= 0) {
 422                         dev_err(vpu->dev, "Could not get vepu IRQ.\n");
 423                         return -ENXIO;
 424                 }
 425
 426                 ret = devm_request_irq(vpu->dev, irq, vpu->variant->vepu_irq,
 427                                        0, dev_name(vpu->dev), vpu);
 428                 if (ret) {
 429                         dev_err(vpu->dev, "Could not request vepu IRQ.\n");
 430                         return ret;
 431                 }
 432         }
 433
 434         ret = vpu->variant->init(vpu);
 435         if (ret) {
 436                 dev_err(&pdev->dev, "Failed to init VPU hardware\n");
 437                 return ret;
 438         }
 439
 440         pm_runtime_set_autosuspend_delay(vpu->dev, 100);
 441         pm_runtime_use_autosuspend(vpu->dev);
 442         pm_runtime_enable(vpu->dev);
 443
 444         ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks);
 445         if (ret) {
 446                 dev_err(&pdev->dev, "Failed to prepare clocks\n");
 447                 return ret;
 448         }
 449
 450         ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev);
 451         if (ret) {
 452                 dev_err(&pdev->dev, "Failed to register v4l2 device\n");
 453                 goto err_clk_unprepare;
 454         }
 455         platform_set_drvdata(pdev, vpu);
 456
 457         vpu->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops);
 458         if (IS_ERR(vpu->m2m_dev)) {
 459                 v4l2_err(&vpu->v4l2_dev, "Failed to init mem2mem device\n");
 460                 ret = PTR_ERR(vpu->m2m_dev);
 461                 goto err_v4l2_unreg;
 462         }
 463
 464         vpu->mdev.dev = vpu->dev;
 465         strscpy(vpu->mdev.model, DRIVER_NAME, sizeof(vpu->mdev.model));
 466         media_device_init(&vpu->mdev);
 467         vpu->v4l2_dev.mdev = &vpu->mdev;
 468
 469         ret = rockchip_vpu_video_device_register(vpu);
 470         if (ret) {
 471                 dev_err(&pdev->dev, "Failed to register encoder\n");
 472                 goto err_m2m_rel;
 473         }
 474
 475         ret = media_device_register(&vpu->mdev);
 476         if (ret) {
 477                 v4l2_err(&vpu->v4l2_dev, "Failed to register mem2mem media device\n");
 478                 goto err_video_dev_unreg;
 479         }
 480         return 0;
 481 err_video_dev_unreg:
 482         if (vpu->vfd_enc) {
 483                 video_unregister_device(vpu->vfd_enc);
 484                 video_device_release(vpu->vfd_enc);
 485         }
 486 err_m2m_rel:
 487         v4l2_m2m_release(vpu->m2m_dev);
 488 err_v4l2_unreg:
 489         v4l2_device_unregister(&vpu->v4l2_dev);
 490 err_clk_unprepare:
 491         clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks);
 492         pm_runtime_disable(vpu->dev);
 493         return ret;
 494 }
 495
 496 static int rockchip_vpu_remove(struct platform_device *pdev)
 497 {
 498         struct rockchip_vpu_dev *vpu = platform_get_drvdata(pdev);
 499
 500         v4l2_info(&vpu->v4l2_dev, "Removing %s\n", pdev->name);
 501
 502         media_device_unregister(&vpu->mdev);
 503         v4l2_m2m_unregister_media_controller(vpu->m2m_dev);
 504         v4l2_m2m_release(vpu->m2m_dev);
 505         media_device_cleanup(&vpu->mdev);
 506         if (vpu->vfd_enc) {
 507                 video_unregister_device(vpu->vfd_enc);
 508                 video_device_release(vpu->vfd_enc);
 509         }
 510         v4l2_device_unregister(&vpu->v4l2_dev);
 511         clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks);
 512         pm_runtime_disable(vpu->dev);
 513         return 0;
 514 }
 515
 516 static const struct dev_pm_ops rockchip_vpu_pm_ops = {
 517         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
 518                                 pm_runtime_force_resume)
 519 };
 520
 521 static struct platform_driver rockchip_vpu_driver = {
 522         .probe = rockchip_vpu_probe,
 523         .remove = rockchip_vpu_remove,
 524         .driver = {
 525                    .name = DRIVER_NAME,
 526                    .of_match_table = of_match_ptr(of_rockchip_vpu_match),
 527                    .pm = &rockchip_vpu_pm_ops,
 528         },
 529 };
 530 module_platform_driver(rockchip_vpu_driver);
 531
 532 MODULE_LICENSE("GPL v2");
 533 MODULE_AUTHOR("Alpha Lin <Alpha.Lin@Rock-Chips.com>");
 534 MODULE_AUTHOR("Tomasz Figa <tfiga@chromium.org>");
 535 MODULE_AUTHOR("Ezequiel Garcia <ezequiel@collabora.com>");
 536 MODULE_DESCRIPTION("Rockchip VPU codec driver");