drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.c

   1 /*
   2  * Support for Intel Camera Imaging ISP subsystem.
   3  * Copyright (c) 2015, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include "ia_css_types.h"
  16 #include "sh_css_defs.h"
  17 #include "ia_css_debug.h"
  18 #include "sh_css_frac.h"
  19
  20 #include "ia_css_dp.host.h"
  21
  22 /* We use a different set of DPC configuration parameters when
  23  * DPC is used before OBC and NORM. Currently these parameters
  24  * are used in usecases which selects both BDS and DPC.
  25  **/
  26 const struct ia_css_dp_config default_dp_10bpp_config = {
  27         1024,
  28         2048,
  29         32768,
  30         32768,
  31         32768,
  32         32768
  33 };
  34
  35 const struct ia_css_dp_config default_dp_config = {
  36         8192,
  37         2048,
  38         32768,
  39         32768,
  40         32768,
  41         32768
  42 };
  43
  44 void
  45 ia_css_dp_encode(
  46     struct sh_css_isp_dp_params *to,
  47     const struct ia_css_dp_config *from,
  48     unsigned int size)
  49 {
  50         int gain = from->gain;
  51         int gr   = from->gr;
  52         int r    = from->r;
  53         int b    = from->b;
  54         int gb   = from->gb;
  55
  56         (void)size;
  57         to->threshold_single =
  58             SH_CSS_BAYER_MAXVAL;
  59         to->threshold_2adjacent =
  60             uDIGIT_FITTING(from->threshold, 16, SH_CSS_BAYER_BITS);
  61         to->gain =
  62             uDIGIT_FITTING(from->gain, 8, SH_CSS_DP_GAIN_SHIFT);
  63
  64         to->coef_rr_gr =
  65             uDIGIT_FITTING(gain * gr / r, 8, SH_CSS_DP_GAIN_SHIFT);
  66         to->coef_rr_gb =
  67             uDIGIT_FITTING(gain * gb / r, 8, SH_CSS_DP_GAIN_SHIFT);
  68         to->coef_bb_gb =
  69             uDIGIT_FITTING(gain * gb / b, 8, SH_CSS_DP_GAIN_SHIFT);
  70         to->coef_bb_gr =
  71             uDIGIT_FITTING(gain * gr / b, 8, SH_CSS_DP_GAIN_SHIFT);
  72         to->coef_gr_rr =
  73             uDIGIT_FITTING(gain * r / gr, 8, SH_CSS_DP_GAIN_SHIFT);
  74         to->coef_gr_bb =
  75             uDIGIT_FITTING(gain * b / gr, 8, SH_CSS_DP_GAIN_SHIFT);
  76         to->coef_gb_bb =
  77             uDIGIT_FITTING(gain * b / gb, 8, SH_CSS_DP_GAIN_SHIFT);
  78         to->coef_gb_rr =
  79             uDIGIT_FITTING(gain * r / gb, 8, SH_CSS_DP_GAIN_SHIFT);
  80 }
  81
  82 void
  83 ia_css_dp_dump(
  84     const struct sh_css_isp_dp_params *dp,
  85     unsigned int level)
  86 {
  87         if (!dp) return;
  88         ia_css_debug_dtrace(level, "Defect Pixel Correction:\n");
  89         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
  90                             "dp_threshold_single_w_2adj_on",
  91                             dp->threshold_single);
  92         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
  93                             "dp_threshold_2adj_w_2adj_on",
  94                             dp->threshold_2adjacent);
  95         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
  96                             "dp_gain", dp->gain);
  97         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
  98                             "dpc_coef_rr_gr", dp->coef_rr_gr);
  99         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 100                             "dpc_coef_rr_gb", dp->coef_rr_gb);
 101         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 102                             "dpc_coef_bb_gb", dp->coef_bb_gb);
 103         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 104                             "dpc_coef_bb_gr", dp->coef_bb_gr);
 105         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 106                             "dpc_coef_gr_rr", dp->coef_gr_rr);
 107         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 108                             "dpc_coef_gr_bb", dp->coef_gr_bb);
 109         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 110                             "dpc_coef_gb_bb", dp->coef_gb_bb);
 111         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 112                             "dpc_coef_gb_rr", dp->coef_gb_rr);
 113 }
 114
 115 void
 116 ia_css_dp_debug_dtrace(
 117     const struct ia_css_dp_config *config,
 118     unsigned int level)
 119 {
 120         ia_css_debug_dtrace(level,
 121                             "config.threshold=%d, config.gain=%d\n",
 122                             config->threshold, config->gain);
 123 }
 124
 125 void
 126 ia_css_init_dp_state(
 127     void/*struct sh_css_isp_dp_vmem_state*/ * state,
 128     size_t size)
 129 {
 130         memset(state, 0, size);
 131 }