2 * Support for Medifield PNW Camera Imaging ISP subsystem.
4 * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
6 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/pm_qos.h>
23 #include <linux/timer.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
27 #include <asm/iosf_mbi.h>
29 #include "../../include/linux/atomisp_gmin_platform.h"
31 #include "atomisp_cmd.h"
32 #include "atomisp_common.h"
33 #include "atomisp_fops.h"
34 #include "atomisp_file.h"
35 #include "atomisp_ioctl.h"
36 #include "atomisp_internal.h"
37 #include "atomisp_acc.h"
38 #include "atomisp-regs.h"
39 #include "atomisp_dfs_tables.h"
40 #include "atomisp_drvfs.h"
42 #include "atomisp_trace_event.h"
44 #include "hrt/hive_isp_css_mm_hrt.h"
46 #include "device_access.h"
48 /* G-Min addition: pull this in from intel_mid_pm.h */
49 #define CSTATE_EXIT_LATENCY_C1 1
51 static uint skip_fwload;
52 module_param(skip_fwload, uint, 0644);
53 MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load");
55 /* set reserved memory pool size in page */
56 static unsigned int repool_pgnr;
57 module_param(repool_pgnr, uint, 0644);
58 MODULE_PARM_DESC(repool_pgnr,
59 "Set the reserved memory pool size in page (default:0)");
61 /* set dynamic memory pool size in page */
62 unsigned int dypool_pgnr = UINT_MAX;
63 module_param(dypool_pgnr, uint, 0644);
64 MODULE_PARM_DESC(dypool_pgnr,
65 "Set the dynamic memory pool size in page (default:0)");
68 module_param(dypool_enable, bool, 0644);
69 MODULE_PARM_DESC(dypool_enable,
70 "dynamic memory pool enable/disable (default:disable)");
72 /* memory optimization: deferred firmware loading */
74 module_param(defer_fw_load, bool, 0644);
75 MODULE_PARM_DESC(defer_fw_load,
76 "Defer FW loading until device is opened (default:disable)");
78 /* cross componnet debug message flag */
80 module_param(dbg_level, int, 0644);
81 MODULE_PARM_DESC(dbg_level, "debug message on/off (default:off)");
83 /* log function switch */
85 module_param(dbg_func, int, 0644);
86 MODULE_PARM_DESC(dbg_func,
87 "log function switch non/trace_printk/printk (default:printk)");
90 module_param(mipicsi_flag, int, 0644);
91 MODULE_PARM_DESC(mipicsi_flag, "mipi csi compression predictor algorithm");
93 /*set to 16x16 since this is the amount of lines and pixels the sensor
94 exports extra. If these are kept at the 10x8 that they were on, in yuv
95 downscaling modes incorrect resolutions where requested to the sensor
96 driver with strange outcomes as a result. The proper way tot do this
97 would be to have a list of tables the specify the sensor res, mipi rec,
98 output res, and isp output res. however since we do not have this yet,
99 the chosen solution is the next best thing. */
101 module_param(pad_w, int, 0644);
102 MODULE_PARM_DESC(pad_w, "extra data for ISP processing");
105 module_param(pad_h, int, 0644);
106 MODULE_PARM_DESC(pad_h, "extra data for ISP processing");
109 * FIXME: this is a hack to make easier to support ISP2401 variant.
110 * As a given system will either be ISP2401 or not, we can just use
111 * a boolean, in order to replace existing #ifdef ISP2401 everywhere.
113 * Once this driver gets into a better shape, however, the best would
114 * be to replace this to something stored inside atomisp allocated
117 bool atomisp_hw_is_isp2401;
119 /* Types of atomisp hardware */
120 #define HW_IS_ISP2400 0
121 #define HW_IS_ISP2401 1
123 struct device *atomisp_dev;
125 void __iomem *atomisp_io_base;
127 static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = {
129 .width = ISP_FREQ_RULE_ANY,
130 .height = ISP_FREQ_RULE_ANY,
131 .fps = ISP_FREQ_RULE_ANY,
132 .isp_freq = ISP_FREQ_400MHZ,
133 .run_mode = ATOMISP_RUN_MODE_VIDEO,
136 .width = ISP_FREQ_RULE_ANY,
137 .height = ISP_FREQ_RULE_ANY,
138 .fps = ISP_FREQ_RULE_ANY,
139 .isp_freq = ISP_FREQ_400MHZ,
140 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
143 .width = ISP_FREQ_RULE_ANY,
144 .height = ISP_FREQ_RULE_ANY,
145 .fps = ISP_FREQ_RULE_ANY,
146 .isp_freq = ISP_FREQ_400MHZ,
147 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
150 .width = ISP_FREQ_RULE_ANY,
151 .height = ISP_FREQ_RULE_ANY,
152 .fps = ISP_FREQ_RULE_ANY,
153 .isp_freq = ISP_FREQ_400MHZ,
154 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
157 .width = ISP_FREQ_RULE_ANY,
158 .height = ISP_FREQ_RULE_ANY,
159 .fps = ISP_FREQ_RULE_ANY,
160 .isp_freq = ISP_FREQ_457MHZ,
161 .run_mode = ATOMISP_RUN_MODE_SDV,
165 /* Merrifield and Moorefield DFS rules */
166 static const struct atomisp_dfs_config dfs_config_merr = {
167 .lowest_freq = ISP_FREQ_200MHZ,
168 .max_freq_at_vmin = ISP_FREQ_400MHZ,
169 .highest_freq = ISP_FREQ_457MHZ,
170 .dfs_table = dfs_rules_merr,
171 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr),
174 static const struct atomisp_freq_scaling_rule dfs_rules_merr_1179[] = {
176 .width = ISP_FREQ_RULE_ANY,
177 .height = ISP_FREQ_RULE_ANY,
178 .fps = ISP_FREQ_RULE_ANY,
179 .isp_freq = ISP_FREQ_400MHZ,
180 .run_mode = ATOMISP_RUN_MODE_VIDEO,
183 .width = ISP_FREQ_RULE_ANY,
184 .height = ISP_FREQ_RULE_ANY,
185 .fps = ISP_FREQ_RULE_ANY,
186 .isp_freq = ISP_FREQ_400MHZ,
187 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
190 .width = ISP_FREQ_RULE_ANY,
191 .height = ISP_FREQ_RULE_ANY,
192 .fps = ISP_FREQ_RULE_ANY,
193 .isp_freq = ISP_FREQ_400MHZ,
194 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
197 .width = ISP_FREQ_RULE_ANY,
198 .height = ISP_FREQ_RULE_ANY,
199 .fps = ISP_FREQ_RULE_ANY,
200 .isp_freq = ISP_FREQ_400MHZ,
201 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
204 .width = ISP_FREQ_RULE_ANY,
205 .height = ISP_FREQ_RULE_ANY,
206 .fps = ISP_FREQ_RULE_ANY,
207 .isp_freq = ISP_FREQ_400MHZ,
208 .run_mode = ATOMISP_RUN_MODE_SDV,
212 static const struct atomisp_dfs_config dfs_config_merr_1179 = {
213 .lowest_freq = ISP_FREQ_200MHZ,
214 .max_freq_at_vmin = ISP_FREQ_400MHZ,
215 .highest_freq = ISP_FREQ_400MHZ,
216 .dfs_table = dfs_rules_merr_1179,
217 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179),
220 static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = {
225 .isp_freq = ISP_FREQ_266MHZ,
226 .run_mode = ATOMISP_RUN_MODE_VIDEO,
232 .isp_freq = ISP_FREQ_266MHZ,
233 .run_mode = ATOMISP_RUN_MODE_VIDEO,
239 .isp_freq = ISP_FREQ_320MHZ,
240 .run_mode = ATOMISP_RUN_MODE_VIDEO,
246 .isp_freq = ISP_FREQ_320MHZ,
247 .run_mode = ATOMISP_RUN_MODE_VIDEO,
250 .width = ISP_FREQ_RULE_ANY,
251 .height = ISP_FREQ_RULE_ANY,
253 .isp_freq = ISP_FREQ_356MHZ,
254 .run_mode = ATOMISP_RUN_MODE_VIDEO,
257 .width = ISP_FREQ_RULE_ANY,
258 .height = ISP_FREQ_RULE_ANY,
259 .fps = ISP_FREQ_RULE_ANY,
260 .isp_freq = ISP_FREQ_200MHZ,
261 .run_mode = ATOMISP_RUN_MODE_VIDEO,
264 .width = ISP_FREQ_RULE_ANY,
265 .height = ISP_FREQ_RULE_ANY,
266 .fps = ISP_FREQ_RULE_ANY,
267 .isp_freq = ISP_FREQ_400MHZ,
268 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
271 .width = ISP_FREQ_RULE_ANY,
272 .height = ISP_FREQ_RULE_ANY,
273 .fps = ISP_FREQ_RULE_ANY,
274 .isp_freq = ISP_FREQ_400MHZ,
275 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
278 .width = ISP_FREQ_RULE_ANY,
279 .height = ISP_FREQ_RULE_ANY,
280 .fps = ISP_FREQ_RULE_ANY,
281 .isp_freq = ISP_FREQ_200MHZ,
282 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
285 .width = ISP_FREQ_RULE_ANY,
286 .height = ISP_FREQ_RULE_ANY,
287 .fps = ISP_FREQ_RULE_ANY,
288 .isp_freq = ISP_FREQ_400MHZ,
289 .run_mode = ATOMISP_RUN_MODE_SDV,
293 static struct atomisp_dfs_config dfs_config_merr_117a = {
294 .lowest_freq = ISP_FREQ_200MHZ,
295 .max_freq_at_vmin = ISP_FREQ_200MHZ,
296 .highest_freq = ISP_FREQ_400MHZ,
297 .dfs_table = dfs_rules_merr_117a,
298 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_117a),
301 static const struct atomisp_freq_scaling_rule dfs_rules_byt[] = {
303 .width = ISP_FREQ_RULE_ANY,
304 .height = ISP_FREQ_RULE_ANY,
305 .fps = ISP_FREQ_RULE_ANY,
306 .isp_freq = ISP_FREQ_400MHZ,
307 .run_mode = ATOMISP_RUN_MODE_VIDEO,
310 .width = ISP_FREQ_RULE_ANY,
311 .height = ISP_FREQ_RULE_ANY,
312 .fps = ISP_FREQ_RULE_ANY,
313 .isp_freq = ISP_FREQ_400MHZ,
314 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
317 .width = ISP_FREQ_RULE_ANY,
318 .height = ISP_FREQ_RULE_ANY,
319 .fps = ISP_FREQ_RULE_ANY,
320 .isp_freq = ISP_FREQ_400MHZ,
321 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
324 .width = ISP_FREQ_RULE_ANY,
325 .height = ISP_FREQ_RULE_ANY,
326 .fps = ISP_FREQ_RULE_ANY,
327 .isp_freq = ISP_FREQ_400MHZ,
328 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
331 .width = ISP_FREQ_RULE_ANY,
332 .height = ISP_FREQ_RULE_ANY,
333 .fps = ISP_FREQ_RULE_ANY,
334 .isp_freq = ISP_FREQ_400MHZ,
335 .run_mode = ATOMISP_RUN_MODE_SDV,
339 static const struct atomisp_dfs_config dfs_config_byt = {
340 .lowest_freq = ISP_FREQ_200MHZ,
341 .max_freq_at_vmin = ISP_FREQ_400MHZ,
342 .highest_freq = ISP_FREQ_400MHZ,
343 .dfs_table = dfs_rules_byt,
344 .dfs_table_size = ARRAY_SIZE(dfs_rules_byt),
347 static const struct atomisp_freq_scaling_rule dfs_rules_byt_cr[] = {
349 .width = ISP_FREQ_RULE_ANY,
350 .height = ISP_FREQ_RULE_ANY,
351 .fps = ISP_FREQ_RULE_ANY,
352 .isp_freq = ISP_FREQ_320MHZ,
353 .run_mode = ATOMISP_RUN_MODE_VIDEO,
356 .width = ISP_FREQ_RULE_ANY,
357 .height = ISP_FREQ_RULE_ANY,
358 .fps = ISP_FREQ_RULE_ANY,
359 .isp_freq = ISP_FREQ_320MHZ,
360 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
363 .width = ISP_FREQ_RULE_ANY,
364 .height = ISP_FREQ_RULE_ANY,
365 .fps = ISP_FREQ_RULE_ANY,
366 .isp_freq = ISP_FREQ_320MHZ,
367 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
370 .width = ISP_FREQ_RULE_ANY,
371 .height = ISP_FREQ_RULE_ANY,
372 .fps = ISP_FREQ_RULE_ANY,
373 .isp_freq = ISP_FREQ_320MHZ,
374 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
377 .width = ISP_FREQ_RULE_ANY,
378 .height = ISP_FREQ_RULE_ANY,
379 .fps = ISP_FREQ_RULE_ANY,
380 .isp_freq = ISP_FREQ_320MHZ,
381 .run_mode = ATOMISP_RUN_MODE_SDV,
385 static const struct atomisp_dfs_config dfs_config_byt_cr = {
386 .lowest_freq = ISP_FREQ_200MHZ,
387 .max_freq_at_vmin = ISP_FREQ_320MHZ,
388 .highest_freq = ISP_FREQ_320MHZ,
389 .dfs_table = dfs_rules_byt_cr,
390 .dfs_table_size = ARRAY_SIZE(dfs_rules_byt_cr),
393 static const struct atomisp_freq_scaling_rule dfs_rules_cht[] = {
395 .width = ISP_FREQ_RULE_ANY,
396 .height = ISP_FREQ_RULE_ANY,
397 .fps = ISP_FREQ_RULE_ANY,
398 .isp_freq = ISP_FREQ_320MHZ,
399 .run_mode = ATOMISP_RUN_MODE_VIDEO,
402 .width = ISP_FREQ_RULE_ANY,
403 .height = ISP_FREQ_RULE_ANY,
404 .fps = ISP_FREQ_RULE_ANY,
405 .isp_freq = ISP_FREQ_356MHZ,
406 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
409 .width = ISP_FREQ_RULE_ANY,
410 .height = ISP_FREQ_RULE_ANY,
411 .fps = ISP_FREQ_RULE_ANY,
412 .isp_freq = ISP_FREQ_320MHZ,
413 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
416 .width = ISP_FREQ_RULE_ANY,
417 .height = ISP_FREQ_RULE_ANY,
418 .fps = ISP_FREQ_RULE_ANY,
419 .isp_freq = ISP_FREQ_320MHZ,
420 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
425 .fps = ISP_FREQ_RULE_ANY,
426 .isp_freq = ISP_FREQ_320MHZ,
427 .run_mode = ATOMISP_RUN_MODE_SDV,
430 .width = ISP_FREQ_RULE_ANY,
431 .height = ISP_FREQ_RULE_ANY,
432 .fps = ISP_FREQ_RULE_ANY,
433 .isp_freq = ISP_FREQ_356MHZ,
434 .run_mode = ATOMISP_RUN_MODE_SDV,
438 static const struct atomisp_freq_scaling_rule dfs_rules_cht_soc[] = {
440 .width = ISP_FREQ_RULE_ANY,
441 .height = ISP_FREQ_RULE_ANY,
442 .fps = ISP_FREQ_RULE_ANY,
443 .isp_freq = ISP_FREQ_356MHZ,
444 .run_mode = ATOMISP_RUN_MODE_VIDEO,
447 .width = ISP_FREQ_RULE_ANY,
448 .height = ISP_FREQ_RULE_ANY,
449 .fps = ISP_FREQ_RULE_ANY,
450 .isp_freq = ISP_FREQ_356MHZ,
451 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
454 .width = ISP_FREQ_RULE_ANY,
455 .height = ISP_FREQ_RULE_ANY,
456 .fps = ISP_FREQ_RULE_ANY,
457 .isp_freq = ISP_FREQ_320MHZ,
458 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
461 .width = ISP_FREQ_RULE_ANY,
462 .height = ISP_FREQ_RULE_ANY,
463 .fps = ISP_FREQ_RULE_ANY,
464 .isp_freq = ISP_FREQ_320MHZ,
465 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
468 .width = ISP_FREQ_RULE_ANY,
469 .height = ISP_FREQ_RULE_ANY,
470 .fps = ISP_FREQ_RULE_ANY,
471 .isp_freq = ISP_FREQ_356MHZ,
472 .run_mode = ATOMISP_RUN_MODE_SDV,
476 static const struct atomisp_dfs_config dfs_config_cht = {
477 .lowest_freq = ISP_FREQ_100MHZ,
478 .max_freq_at_vmin = ISP_FREQ_356MHZ,
479 .highest_freq = ISP_FREQ_356MHZ,
480 .dfs_table = dfs_rules_cht,
481 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht),
484 /* This one should be visible also by atomisp_cmd.c */
485 const struct atomisp_dfs_config dfs_config_cht_soc = {
486 .lowest_freq = ISP_FREQ_100MHZ,
487 .max_freq_at_vmin = ISP_FREQ_356MHZ,
488 .highest_freq = ISP_FREQ_356MHZ,
489 .dfs_table = dfs_rules_cht_soc,
490 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc),
493 int atomisp_video_init(struct atomisp_video_pipe *video, const char *name)
496 const char *direction;
498 switch (video->type) {
499 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
500 direction = "output";
501 video->pad.flags = MEDIA_PAD_FL_SINK;
502 video->vdev.fops = &atomisp_fops;
503 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
505 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
507 video->pad.flags = MEDIA_PAD_FL_SOURCE;
508 video->vdev.fops = &atomisp_file_fops;
509 video->vdev.ioctl_ops = &atomisp_file_ioctl_ops;
515 ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad);
519 /* Initialize the video device. */
520 snprintf(video->vdev.name, sizeof(video->vdev.name),
521 "ATOMISP ISP %s %s", name, direction);
522 video->vdev.release = video_device_release_empty;
523 video_set_drvdata(&video->vdev, video->isp);
528 void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name)
530 video->vdev.fops = &atomisp_fops;
531 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
533 /* Initialize the video device. */
534 snprintf(video->vdev.name, sizeof(video->vdev.name),
535 "ATOMISP ISP %s", name);
536 video->vdev.release = video_device_release_empty;
537 video_set_drvdata(&video->vdev, video->isp);
540 void atomisp_video_unregister(struct atomisp_video_pipe *video)
542 if (video_is_registered(&video->vdev)) {
543 media_entity_cleanup(&video->vdev.entity);
544 video_unregister_device(&video->vdev);
548 void atomisp_acc_unregister(struct atomisp_acc_pipe *video)
550 if (video_is_registered(&video->vdev))
551 video_unregister_device(&video->vdev);
554 static int atomisp_save_iunit_reg(struct atomisp_device *isp)
556 struct pci_dev *dev = isp->pdev;
558 dev_dbg(isp->dev, "%s\n", __func__);
560 pci_read_config_word(dev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
561 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
562 pci_read_config_dword(dev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
563 pci_read_config_dword(dev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
564 pci_read_config_word(dev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
565 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
566 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL,
567 &isp->saved_regs.interrupt_control);
569 pci_read_config_dword(dev, MRFLD_PCI_PMCS,
570 &isp->saved_regs.pmcs);
571 /* Ensure read/write combining is enabled. */
572 pci_read_config_dword(dev, PCI_I_CONTROL,
573 &isp->saved_regs.i_control);
574 isp->saved_regs.i_control |=
575 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
576 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
577 pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
578 &isp->saved_regs.csi_access_viol);
579 pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
580 &isp->saved_regs.csi_rcomp_config);
582 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
583 * ANN/CHV: RCOMP updates do not happen when using CSI2+ path
584 * and sensor sending "continuous clock".
585 * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence
586 * is missed, and IUNIT can hang.
587 * For both issues, setting this bit is a workaround.
589 isp->saved_regs.csi_rcomp_config |=
590 MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
591 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
592 &isp->saved_regs.csi_afe_dly);
593 pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
594 &isp->saved_regs.csi_control);
595 if (isp->media_dev.hw_revision >=
596 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
597 isp->saved_regs.csi_control |=
598 MRFLD_PCI_CSI_CONTROL_PARPATHEN;
600 * On CHT CSI_READY bit should be enabled before stream on
602 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
603 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
604 isp->saved_regs.csi_control |=
605 MRFLD_PCI_CSI_CONTROL_CSI_READY;
606 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
607 &isp->saved_regs.csi_afe_rcomp_config);
608 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
609 &isp->saved_regs.csi_afe_hs_control);
610 pci_read_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
611 &isp->saved_regs.csi_deadline_control);
615 static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
617 struct pci_dev *dev = isp->pdev;
619 dev_dbg(isp->dev, "%s\n", __func__);
621 pci_write_config_word(dev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
622 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
623 isp->saved_regs.ispmmadr);
624 pci_write_config_dword(dev, PCI_MSI_CAPID, isp->saved_regs.msicap);
625 pci_write_config_dword(dev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
626 pci_write_config_word(dev, PCI_MSI_DATA, isp->saved_regs.msi_data);
627 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
628 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL,
629 isp->saved_regs.interrupt_control);
630 pci_write_config_dword(dev, PCI_I_CONTROL,
631 isp->saved_regs.i_control);
633 pci_write_config_dword(dev, MRFLD_PCI_PMCS,
634 isp->saved_regs.pmcs);
635 pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
636 isp->saved_regs.csi_access_viol);
637 pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
638 isp->saved_regs.csi_rcomp_config);
639 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
640 isp->saved_regs.csi_afe_dly);
641 pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
642 isp->saved_regs.csi_control);
643 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
644 isp->saved_regs.csi_afe_rcomp_config);
645 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
646 isp->saved_regs.csi_afe_hs_control);
647 pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
648 isp->saved_regs.csi_deadline_control);
651 * for MRFLD, Software/firmware needs to write a 1 to bit0
652 * of the register at CSI_RECEIVER_SELECTION_REG to enable
653 * SH CSI backend write 0 will enable Arasan CSI backend,
654 * which has bugs(like sighting:4567697 and 4567699) and
655 * will be removed in B0
657 atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
661 static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
663 struct pci_dev *dev = isp->pdev;
667 spin_lock_irqsave(&isp->lock, flags);
668 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
669 spin_unlock_irqrestore(&isp->lock, flags);
670 dev_dbg(isp->dev, "<%s %d.\n", __func__, __LINE__);
674 * MRFLD HAS requirement: cannot power off i-unit if
675 * ISP has IRQ not serviced.
676 * So, here we need to check if there is any pending
677 * IRQ, if so, waiting for it to be served
679 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
680 irq = irq & 1 << INTR_IIR;
681 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
683 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
684 if (!(irq & (1 << INTR_IIR)))
687 atomisp_store_uint32(MRFLD_INTR_CLEAR_REG, 0xFFFFFFFF);
688 atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq);
691 "%s: fail to clear isp interrupt status reg=0x%x\n",
693 spin_unlock_irqrestore(&isp->lock, flags);
696 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
697 irq = irq & 1 << INTR_IIR;
698 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
700 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
701 if (!(irq & (1 << INTR_IIR))) {
702 atomisp_store_uint32(MRFLD_INTR_ENABLE_REG, 0x0);
706 "%s: error in iunit interrupt. status reg=0x%x\n",
708 spin_unlock_irqrestore(&isp->lock, flags);
714 * before powering off IUNIT, clear the pending interrupts
715 * and disable the interrupt. driver should avoid writing 0
716 * to IIR. It could block subsequent interrupt messages.
717 * HW sighting:4568410.
719 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
720 irq &= ~(1 << INTR_IER);
721 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
723 atomisp_msi_irq_uninit(isp, dev);
724 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
725 spin_unlock_irqrestore(&isp->lock, flags);
731 * WA for DDR DVFS enable/disable
732 * By default, ISP will force DDR DVFS 1600MHz before disable DVFS
734 static void punit_ddr_dvfs_enable(bool enable)
736 int door_bell = 1 << 8;
740 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
742 reg &= ~(MRFLD_BIT0 | MRFLD_BIT1);
744 reg |= (MRFLD_BIT1 | door_bell);
745 reg &= ~(MRFLD_BIT0);
747 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSDVFS, reg);
749 /* Check Req_ACK to see freq status, wait until door_bell is cleared */
750 while ((reg & door_bell) && max_wait--) {
751 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
752 usleep_range(100, 500);
756 pr_info("DDR DVFS, door bell is not cleared within 3ms\n");
759 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
760 int atomisp_mrfld_power_down(struct atomisp_device *isp)
762 unsigned long timeout;
765 /* writing 0x3 to ISPSSPM0 bit[1:0] to power off the IUNIT */
766 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value);
767 reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
768 reg_value |= MRFLD_ISPSSPM0_IUNIT_POWER_OFF;
769 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value);
773 punit_ddr_dvfs_enable(true);
776 * There should be no iunit access while power-down is
777 * in progress HW sighting: 4567865
778 * FIXME: msecs_to_jiffies(50)- experienced value
780 timeout = jiffies + msecs_to_jiffies(50);
782 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value);
783 dev_dbg(isp->dev, "power-off in progress, ISPSSPM0: 0x%x\n",
785 /* wait until ISPSSPM0 bit[25:24] shows 0x3 */
786 if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
787 MRFLD_ISPSSPM0_IUNIT_POWER_OFF) {
792 if (time_after(jiffies, timeout)) {
793 dev_err(isp->dev, "power-off iunit timeout.\n");
796 /* FIXME: experienced value for delay */
797 usleep_range(100, 150);
801 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
802 int atomisp_mrfld_power_up(struct atomisp_device *isp)
804 unsigned long timeout;
807 /*WA for PUNIT, if DVFS enabled, ISP timeout observed*/
809 punit_ddr_dvfs_enable(false);
812 * FIXME:WA for ECS28A, with this sleep, CTS
813 * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort
814 * PASS, no impact on other platforms
819 /* writing 0x0 to ISPSSPM0 bit[1:0] to power off the IUNIT */
820 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value);
821 reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
822 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value);
824 /* FIXME: experienced value for delay */
825 timeout = jiffies + msecs_to_jiffies(50);
827 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value);
828 dev_dbg(isp->dev, "power-on in progress, ISPSSPM0: 0x%x\n",
830 /* wait until ISPSSPM0 bit[25:24] shows 0x0 */
831 if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
832 MRFLD_ISPSSPM0_IUNIT_POWER_ON) {
837 if (time_after(jiffies, timeout)) {
838 dev_err(isp->dev, "power-on iunit timeout.\n");
841 /* FIXME: experienced value for delay */
842 usleep_range(100, 150);
846 int atomisp_runtime_suspend(struct device *dev)
848 struct atomisp_device *isp = (struct atomisp_device *)
849 dev_get_drvdata(dev);
852 ret = atomisp_mrfld_pre_power_down(isp);
856 /*Turn off the ISP d-phy*/
857 ret = atomisp_ospm_dphy_down(isp);
860 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
861 return atomisp_mrfld_power_down(isp);
864 int atomisp_runtime_resume(struct device *dev)
866 struct atomisp_device *isp = (struct atomisp_device *)
867 dev_get_drvdata(dev);
870 ret = atomisp_mrfld_power_up(isp);
874 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
875 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
876 /*Turn on ISP d-phy */
877 ret = atomisp_ospm_dphy_up(isp);
879 dev_err(isp->dev, "Failed to power up ISP!.\n");
884 /*restore register values for iUnit and iUnitPHY registers*/
885 if (isp->saved_regs.pcicmdsts)
886 atomisp_restore_iunit_reg(isp);
888 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
892 static int __maybe_unused atomisp_suspend(struct device *dev)
894 struct atomisp_device *isp = (struct atomisp_device *)
895 dev_get_drvdata(dev);
896 /* FIXME: only has one isp_subdev at present */
897 struct atomisp_sub_device *asd = &isp->asd[0];
902 * FIXME: Suspend is not supported by sensors. Abort if any video
905 if (atomisp_dev_users(isp))
908 spin_lock_irqsave(&isp->lock, flags);
909 if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) {
910 spin_unlock_irqrestore(&isp->lock, flags);
911 dev_err(isp->dev, "atomisp cannot suspend at this time.\n");
914 spin_unlock_irqrestore(&isp->lock, flags);
916 ret = atomisp_mrfld_pre_power_down(isp);
920 /*Turn off the ISP d-phy */
921 ret = atomisp_ospm_dphy_down(isp);
923 dev_err(isp->dev, "fail to power off ISP\n");
926 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
927 return atomisp_mrfld_power_down(isp);
930 static int __maybe_unused atomisp_resume(struct device *dev)
932 struct atomisp_device *isp = (struct atomisp_device *)
933 dev_get_drvdata(dev);
936 ret = atomisp_mrfld_power_up(isp);
940 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
942 /*Turn on ISP d-phy */
943 ret = atomisp_ospm_dphy_up(isp);
945 dev_err(isp->dev, "Failed to power up ISP!.\n");
949 /*restore register values for iUnit and iUnitPHY registers*/
950 if (isp->saved_regs.pcicmdsts)
951 atomisp_restore_iunit_reg(isp);
953 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
957 int atomisp_csi_lane_config(struct atomisp_device *isp)
959 static const struct {
961 u8 lanes[MRFLD_PORT_NUM];
963 /* Tangier/Merrifield available lane configurations */
964 { 0x00, { 4, 1, 0 } }, /* 00000 */
965 { 0x01, { 3, 1, 0 } }, /* 00001 */
966 { 0x02, { 2, 1, 0 } }, /* 00010 */
967 { 0x03, { 1, 1, 0 } }, /* 00011 */
968 { 0x04, { 2, 1, 2 } }, /* 00100 */
969 { 0x08, { 3, 1, 1 } }, /* 01000 */
970 { 0x09, { 2, 1, 1 } }, /* 01001 */
971 { 0x0a, { 1, 1, 1 } }, /* 01010 */
973 /* Anniedale/Moorefield only configurations */
974 { 0x10, { 4, 2, 0 } }, /* 10000 */
975 { 0x11, { 3, 2, 0 } }, /* 10001 */
976 { 0x12, { 2, 2, 0 } }, /* 10010 */
977 { 0x13, { 1, 2, 0 } }, /* 10011 */
978 { 0x14, { 2, 2, 2 } }, /* 10100 */
979 { 0x18, { 3, 2, 1 } }, /* 11000 */
980 { 0x19, { 2, 2, 1 } }, /* 11001 */
981 { 0x1a, { 1, 2, 1 } }, /* 11010 */
985 u8 sensor_lanes[MRFLD_PORT_NUM] = { 0 };
988 u32 port_config_mask;
989 int port3_lanes_shift;
991 if (isp->media_dev.hw_revision <
992 ATOMISP_HW_REVISION_ISP2401_LEGACY <<
993 ATOMISP_HW_REVISION_SHIFT) {
995 port_config_mask = MRFLD_PORT_CONFIG_MASK;
996 port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT;
998 /* Moorefield / Cherryview */
999 port_config_mask = CHV_PORT_CONFIG_MASK;
1000 port3_lanes_shift = CHV_PORT3_LANES_SHIFT;
1003 if (isp->media_dev.hw_revision <
1004 ATOMISP_HW_REVISION_ISP2401 <<
1005 ATOMISP_HW_REVISION_SHIFT) {
1006 /* Merrifield / Moorefield legacy input system */
1007 nportconfigs = MRFLD_PORT_CONFIG_NUM;
1009 /* Moorefield / Cherryview new input system */
1010 nportconfigs = ARRAY_SIZE(portconfigs);
1013 for (i = 0; i < isp->input_cnt; i++) {
1014 struct camera_mipi_info *mipi_info;
1016 if (isp->inputs[i].type != RAW_CAMERA &&
1017 isp->inputs[i].type != SOC_CAMERA)
1020 mipi_info = atomisp_to_sensor_mipi_info(isp->inputs[i].camera);
1024 switch (mipi_info->port) {
1025 case ATOMISP_CAMERA_PORT_PRIMARY:
1026 sensor_lanes[0] = mipi_info->num_lanes;
1028 case ATOMISP_CAMERA_PORT_SECONDARY:
1029 sensor_lanes[1] = mipi_info->num_lanes;
1031 case ATOMISP_CAMERA_PORT_TERTIARY:
1032 sensor_lanes[2] = mipi_info->num_lanes;
1036 "%s: invalid port: %d for the %dth sensor\n",
1037 __func__, mipi_info->port, i);
1042 for (i = 0; i < nportconfigs; i++) {
1043 for (j = 0; j < MRFLD_PORT_NUM; j++)
1044 if (sensor_lanes[j] &&
1045 sensor_lanes[j] != portconfigs[i].lanes[j])
1048 if (j == MRFLD_PORT_NUM)
1049 break; /* Found matching setting */
1052 if (i >= nportconfigs) {
1054 "%s: could not find the CSI port setting for %d-%d-%d\n",
1056 sensor_lanes[0], sensor_lanes[1], sensor_lanes[2]);
1060 pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
1061 csi_control &= ~port_config_mask;
1062 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
1063 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
1064 | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
1065 | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
1066 | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
1067 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
1068 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
1070 pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
1073 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
1074 __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[1],
1075 portconfigs[i].lanes[2], csi_control);
1080 static int atomisp_subdev_probe(struct atomisp_device *isp)
1082 const struct atomisp_platform_data *pdata;
1083 struct intel_v4l2_subdev_table *subdevs;
1084 int ret, raw_index = -1;
1086 pdata = atomisp_get_platform_data();
1088 dev_err(isp->dev, "no platform data available\n");
1092 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
1093 struct v4l2_subdev *subdev;
1094 struct i2c_board_info *board_info =
1095 &subdevs->v4l2_subdev.board_info;
1096 struct i2c_adapter *adapter =
1097 i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
1102 "Failed to find i2c adapter for subdev %s\n",
1107 /* In G-Min, the sensor devices will already be probed
1108 * (via ACPI) and registered, do not create new
1110 subdev = atomisp_gmin_find_subdev(adapter, board_info);
1111 ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev);
1113 dev_warn(isp->dev, "Subdev %s detection fail\n",
1119 dev_warn(isp->dev, "Subdev %s detection fail\n",
1124 dev_info(isp->dev, "Subdev %s successfully register\n",
1127 switch (subdevs->type) {
1129 raw_index = isp->input_cnt;
1130 dev_dbg(isp->dev, "raw_index: %d\n", raw_index);
1132 dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt);
1133 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1135 "too many atomisp inputs, ignored\n");
1139 isp->inputs[isp->input_cnt].type = subdevs->type;
1140 isp->inputs[isp->input_cnt].port = subdevs->port;
1141 isp->inputs[isp->input_cnt].camera = subdev;
1142 isp->inputs[isp->input_cnt].sensor_index = 0;
1144 * initialize the subdev frame size, then next we can
1145 * judge whether frame_size store effective value via
1148 isp->inputs[isp->input_cnt].frame_size.pixel_format = 0;
1149 isp->inputs[isp->input_cnt].camera_caps =
1150 atomisp_get_default_camera_caps();
1151 sensor_num = isp->inputs[isp->input_cnt]
1152 .camera_caps->sensor_num;
1154 for (i = 1; i < sensor_num; i++) {
1155 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1157 "atomisp inputs out of range\n");
1160 isp->inputs[isp->input_cnt] =
1161 isp->inputs[isp->input_cnt - 1];
1162 isp->inputs[isp->input_cnt].sensor_index = i;
1167 isp->motor = subdev;
1171 isp->flash = subdev;
1174 dev_dbg(isp->dev, "unknown subdev probed\n");
1180 * HACK: Currently VCM belongs to primary sensor only, but correct
1181 * approach must be to acquire from platform code which sensor
1184 if (isp->motor && raw_index >= 0)
1185 isp->inputs[raw_index].motor = isp->motor;
1187 /* Proceed even if no modules detected. For COS mode and no modules. */
1188 if (!isp->inputs[0].camera)
1189 dev_warn(isp->dev, "no camera attached or fail to detect\n");
1191 return atomisp_csi_lane_config(isp);
1194 static void atomisp_unregister_entities(struct atomisp_device *isp)
1197 struct v4l2_subdev *sd, *next;
1199 for (i = 0; i < isp->num_of_streams; i++)
1200 atomisp_subdev_unregister_entities(&isp->asd[i]);
1201 atomisp_tpg_unregister_entities(&isp->tpg);
1202 atomisp_file_input_unregister_entities(&isp->file_dev);
1203 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1204 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1206 list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list)
1207 v4l2_device_unregister_subdev(sd);
1209 v4l2_device_unregister(&isp->v4l2_dev);
1210 media_device_unregister(&isp->media_dev);
1213 static int atomisp_register_entities(struct atomisp_device *isp)
1218 isp->media_dev.dev = isp->dev;
1220 strlcpy(isp->media_dev.model, "Intel Atom ISP",
1221 sizeof(isp->media_dev.model));
1223 media_device_init(&isp->media_dev);
1224 isp->v4l2_dev.mdev = &isp->media_dev;
1225 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1227 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1229 goto v4l2_device_failed;
1232 ret = atomisp_subdev_probe(isp);
1234 goto csi_and_subdev_probe_failed;
1236 /* Register internal entities */
1237 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) {
1238 ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i],
1244 dev_err(isp->dev, "failed to register the CSI port: %d\n", i);
1245 /* deregister all registered CSI ports */
1247 atomisp_mipi_csi2_unregister_entities(
1248 &isp->csi2_port[i]);
1250 goto csi_and_subdev_probe_failed;
1254 atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev);
1256 dev_err(isp->dev, "atomisp_file_input_register_entities\n");
1257 goto file_input_register_failed;
1260 ret = atomisp_tpg_register_entities(&isp->tpg, &isp->v4l2_dev);
1262 dev_err(isp->dev, "atomisp_tpg_register_entities\n");
1263 goto tpg_register_failed;
1266 for (i = 0; i < isp->num_of_streams; i++) {
1267 struct atomisp_sub_device *asd = &isp->asd[i];
1269 ret = atomisp_subdev_register_entities(asd, &isp->v4l2_dev);
1272 "atomisp_subdev_register_entities fail\n");
1274 atomisp_subdev_unregister_entities(
1276 goto subdev_register_failed;
1280 for (i = 0; i < isp->num_of_streams; i++) {
1281 struct atomisp_sub_device *asd = &isp->asd[i];
1283 init_completion(&asd->init_done);
1285 asd->delayed_init_workq =
1286 alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
1288 if (!asd->delayed_init_workq) {
1290 "Failed to initialize delayed init workq\n");
1294 destroy_workqueue(isp->asd[i - 1].
1295 delayed_init_workq);
1296 goto wq_alloc_failed;
1298 INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work);
1301 for (i = 0; i < isp->input_cnt; i++) {
1302 if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) {
1303 dev_err(isp->dev, "isp->inputs port %d not supported\n",
1304 isp->inputs[i].port);
1311 "FILE_INPUT enable, camera_cnt: %d\n", isp->input_cnt);
1312 isp->inputs[isp->input_cnt].type = FILE_INPUT;
1313 isp->inputs[isp->input_cnt].port = -1;
1314 isp->inputs[isp->input_cnt].camera_caps =
1315 atomisp_get_default_camera_caps();
1316 isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd;
1318 if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) {
1320 "TPG detected, camera_cnt: %d\n", isp->input_cnt);
1321 isp->inputs[isp->input_cnt].type = TEST_PATTERN;
1322 isp->inputs[isp->input_cnt].port = -1;
1323 isp->inputs[isp->input_cnt].camera_caps =
1324 atomisp_get_default_camera_caps();
1325 isp->inputs[isp->input_cnt++].camera = &isp->tpg.sd;
1327 dev_warn(isp->dev, "too many atomisp inputs, TPG ignored.\n");
1330 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1334 return media_device_register(&isp->media_dev);
1337 for (i = 0; i < isp->num_of_streams; i++)
1338 destroy_workqueue(isp->asd[i].
1339 delayed_init_workq);
1341 for (i = 0; i < isp->num_of_streams; i++)
1342 atomisp_subdev_unregister_entities(
1344 subdev_register_failed:
1345 atomisp_tpg_unregister_entities(&isp->tpg);
1346 tpg_register_failed:
1347 atomisp_file_input_unregister_entities(&isp->file_dev);
1348 file_input_register_failed:
1349 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1350 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1351 csi_and_subdev_probe_failed:
1352 v4l2_device_unregister(&isp->v4l2_dev);
1354 media_device_unregister(&isp->media_dev);
1355 media_device_cleanup(&isp->media_dev);
1359 static int atomisp_initialize_modules(struct atomisp_device *isp)
1363 ret = atomisp_mipi_csi2_init(isp);
1365 dev_err(isp->dev, "mipi csi2 initialization failed\n");
1366 goto error_mipi_csi2;
1369 ret = atomisp_file_input_init(isp);
1372 "file input device initialization failed\n");
1373 goto error_file_input;
1376 ret = atomisp_tpg_init(isp);
1378 dev_err(isp->dev, "tpg initialization failed\n");
1382 ret = atomisp_subdev_init(isp);
1384 dev_err(isp->dev, "ISP subdev initialization failed\n");
1385 goto error_isp_subdev;
1392 atomisp_tpg_cleanup(isp);
1394 atomisp_file_input_cleanup(isp);
1396 atomisp_mipi_csi2_cleanup(isp);
1400 static void atomisp_uninitialize_modules(struct atomisp_device *isp)
1402 atomisp_tpg_cleanup(isp);
1403 atomisp_file_input_cleanup(isp);
1404 atomisp_mipi_csi2_cleanup(isp);
1407 const struct firmware *
1408 atomisp_load_firmware(struct atomisp_device *isp)
1410 const struct firmware *fw;
1412 char *fw_path = NULL;
1417 if (isp->media_dev.hw_revision ==
1418 ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT)
1419 | ATOMISP_HW_STEPPING_B0))
1420 fw_path = "shisp_2401b0_v21.bin";
1422 if (isp->media_dev.hw_revision ==
1423 ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT)
1424 | ATOMISP_HW_STEPPING_A0))
1425 fw_path = "shisp_2401a0_v21.bin";
1427 if (isp->media_dev.hw_revision ==
1428 ((ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT)
1429 | ATOMISP_HW_STEPPING_A0))
1430 fw_path = "shisp_2401a0_legacy_v21.bin";
1432 if (isp->media_dev.hw_revision ==
1433 ((ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT)
1434 | ATOMISP_HW_STEPPING_B0))
1435 fw_path = "shisp_2400b0_v21.bin";
1438 dev_err(isp->dev, "Unsupported hw_revision 0x%x\n",
1439 isp->media_dev.hw_revision);
1443 rc = request_firmware(&fw, fw_path, isp->dev);
1446 "atomisp: Error %d while requesting firmware %s\n",
1455 * Check for flags the driver was compiled with against the PCI
1456 * device. Always returns true on other than ISP 2400.
1458 static bool is_valid_device(struct pci_dev *dev,
1459 const struct pci_device_id *id)
1461 unsigned int a0_max_id = 0;
1464 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1465 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1466 a0_max_id = ATOMISP_PCI_REV_MRFLD_A0_MAX;
1467 atomisp_hw_is_isp2401 = false;
1468 name = "Merrifield";
1470 case ATOMISP_PCI_DEVICE_SOC_BYT:
1471 a0_max_id = ATOMISP_PCI_REV_BYT_A0_MAX;
1472 atomisp_hw_is_isp2401 = false;
1475 case ATOMISP_PCI_DEVICE_SOC_ANN:
1477 atomisp_hw_is_isp2401 = true;
1479 case ATOMISP_PCI_DEVICE_SOC_CHT:
1480 name = "Cherrytrail";
1481 atomisp_hw_is_isp2401 = true;
1484 dev_err(&dev->dev, "Unknown device ID %x04:%x04\n",
1485 id->vendor, id->device);
1489 if (dev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) {
1490 dev_err(&dev->dev, "%s revision %d is not unsupported\n",
1491 name, dev->revision);
1497 * remove the if once the driver become generic
1500 #if defined(ISP2400)
1501 if (atomisp_hw_is_isp2401) {
1502 dev_err(&dev->dev, "Support for %s (ISP2401) was disabled at compile time\n",
1507 if (!atomisp_hw_is_isp2401) {
1508 dev_err(&dev->dev, "Support for %s (ISP2400) was disabled at compile time\n",
1514 dev_info(&dev->dev, "Detected %s version %d (ISP240%c)\n",
1515 name, dev->revision,
1516 atomisp_hw_is_isp2401 ? '1' : '0');
1521 static int init_atomisp_wdts(struct atomisp_device *isp)
1525 atomic_set(&isp->wdt_work_queued, 0);
1526 isp->wdt_work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1);
1527 if (!isp->wdt_work_queue) {
1528 dev_err(isp->dev, "Failed to initialize wdt work queue\n");
1532 INIT_WORK(&isp->wdt_work, atomisp_wdt_work);
1534 for (i = 0; i < isp->num_of_streams; i++) {
1535 struct atomisp_sub_device *asd = &isp->asd[i];
1536 if (!atomisp_hw_is_isp2401)
1537 timer_setup(&asd->wdt, atomisp_wdt, 0);
1539 timer_setup(&asd->video_out_capture.wdt,
1541 timer_setup(&asd->video_out_preview.wdt,
1543 timer_setup(&asd->video_out_vf.wdt, atomisp_wdt, 0);
1544 timer_setup(&asd->video_out_video_capture.wdt,
1553 #define ATOM_ISP_PCI_BAR 0
1555 static int atomisp_pci_probe(struct pci_dev *dev,
1556 const struct pci_device_id *id)
1558 const struct atomisp_platform_data *pdata;
1559 struct atomisp_device *isp;
1565 if (!is_valid_device(dev, id))
1568 /* Pointer to struct device. */
1569 atomisp_dev = &dev->dev;
1571 pdata = atomisp_get_platform_data();
1573 dev_warn(&dev->dev, "no platform data available\n");
1575 err = pci_enable_device(dev);
1577 dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n",
1582 start = pci_resource_start(dev, ATOM_ISP_PCI_BAR);
1583 dev_dbg(&dev->dev, "start: 0x%x\n", start);
1585 err = pcim_iomap_regions(dev, 1 << ATOM_ISP_PCI_BAR, pci_name(dev));
1587 dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n",
1592 base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR];
1593 dev_dbg(&dev->dev, "base: %p\n", base);
1595 atomisp_io_base = base;
1597 dev_dbg(&dev->dev, "atomisp_io_base: %p\n", atomisp_io_base);
1599 isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL);
1602 goto atomisp_dev_alloc_fail;
1605 isp->dev = &dev->dev;
1606 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
1607 isp->saved_regs.ispmmadr = start;
1609 rt_mutex_init(&isp->mutex);
1610 mutex_init(&isp->streamoff_mutex);
1611 spin_lock_init(&isp->lock);
1613 /* This is not a true PCI device on SoC, so the delay is not needed. */
1614 isp->pdev->d3_delay = 0;
1616 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1617 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1618 isp->media_dev.hw_revision =
1619 (ATOMISP_HW_REVISION_ISP2400
1620 << ATOMISP_HW_REVISION_SHIFT) |
1621 ATOMISP_HW_STEPPING_B0;
1623 switch (id->device) {
1624 case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179:
1625 isp->dfs = &dfs_config_merr_1179;
1627 case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A:
1628 isp->dfs = &dfs_config_merr_117a;
1632 isp->dfs = &dfs_config_merr;
1635 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1637 case ATOMISP_PCI_DEVICE_SOC_BYT:
1638 isp->media_dev.hw_revision =
1639 (ATOMISP_HW_REVISION_ISP2400
1640 << ATOMISP_HW_REVISION_SHIFT) |
1641 ATOMISP_HW_STEPPING_B0;
1643 if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) ||
1644 INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) {
1645 isp->dfs = &dfs_config_byt_cr;
1646 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1650 isp->dfs = &dfs_config_byt;
1651 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1653 /* HPLL frequency is known to be device-specific, but we don't
1654 * have specs yet for exactly how it varies. Default to
1655 * BYT-CR but let provisioning set it via EFI variable */
1656 isp->hpll_freq = gmin_get_var_int(&dev->dev, "HpllFreq",
1660 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1661 * in power off. Set d3cold_delay to 0 since default 100ms is not
1664 isp->pdev->d3cold_delay = 0;
1666 case ATOMISP_PCI_DEVICE_SOC_ANN:
1667 isp->media_dev.hw_revision = (
1668 #ifdef ISP2401_NEW_INPUT_SYSTEM
1669 ATOMISP_HW_REVISION_ISP2401
1671 ATOMISP_HW_REVISION_ISP2401_LEGACY
1673 << ATOMISP_HW_REVISION_SHIFT);
1674 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1675 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1676 isp->dfs = &dfs_config_merr;
1677 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1679 case ATOMISP_PCI_DEVICE_SOC_CHT:
1680 isp->media_dev.hw_revision = (
1681 #ifdef ISP2401_NEW_INPUT_SYSTEM
1682 ATOMISP_HW_REVISION_ISP2401
1684 ATOMISP_HW_REVISION_ISP2401_LEGACY
1686 << ATOMISP_HW_REVISION_SHIFT);
1687 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1688 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1690 isp->dfs = &dfs_config_cht;
1691 isp->pdev->d3cold_delay = 0;
1693 iosf_mbi_read(CCK_PORT, MBI_REG_READ, CCK_FUSE_REG_0, &val);
1694 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
1696 isp->hpll_freq = HPLL_FREQ_800MHZ;
1699 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1702 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1705 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1707 "read HPLL from cck failed.default 1600MHz.\n");
1711 dev_err(&dev->dev, "un-supported IUNIT device\n");
1713 goto atomisp_dev_alloc_fail;
1716 dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n",
1719 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
1721 /* Load isp firmware from user space */
1722 if (!defer_fw_load) {
1723 isp->firmware = atomisp_load_firmware(isp);
1724 if (!isp->firmware) {
1726 dev_dbg(&dev->dev, "Firmware load failed\n");
1730 err = atomisp_css_check_firmware_version(isp);
1732 dev_dbg(&dev->dev, "Firmware version check failed\n");
1733 goto fw_validation_fail;
1736 dev_info(&dev->dev, "Firmware load will be deferred\n");
1739 pci_set_master(dev);
1740 pci_set_drvdata(dev, isp);
1742 err = pci_enable_msi(dev);
1744 dev_err(&dev->dev, "Failed to enable msi (%d)\n", err);
1745 goto enable_msi_fail;
1748 atomisp_msi_irq_init(isp, dev);
1750 cpu_latency_qos_add_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
1753 * for MRFLD, Software/firmware needs to write a 1 to bit 0 of
1754 * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI
1755 * backend write 0 will enable Arasan CSI backend, which has
1756 * bugs(like sighting:4567697 and 4567699) and will be removed
1759 atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
1761 if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
1762 ATOMISP_PCI_DEVICE_SOC_MRFLD) {
1766 * Workaround for imbalance data eye issue which is observed
1769 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1771 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1772 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1773 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1774 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1775 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1776 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
1777 csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM <<
1778 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1779 (MRFLD_PCI_CSI2_HSRXCLKTRIM <<
1780 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1781 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
1782 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1783 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1787 err = atomisp_initialize_modules(isp);
1789 dev_err(&dev->dev, "atomisp_initialize_modules (%d)\n", err);
1790 goto initialize_modules_fail;
1793 err = atomisp_register_entities(isp);
1795 dev_err(&dev->dev, "atomisp_register_entities failed (%d)\n",
1797 goto register_entities_fail;
1799 err = atomisp_create_pads_links(isp);
1801 goto register_entities_fail;
1802 /* init atomisp wdts */
1803 if (init_atomisp_wdts(isp) != 0)
1804 goto wdt_work_queue_fail;
1806 /* save the iunit context only once after all the values are init'ed. */
1807 atomisp_save_iunit_reg(isp);
1809 pm_runtime_put_noidle(&dev->dev);
1810 pm_runtime_allow(&dev->dev);
1812 hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);
1813 err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);
1815 dev_err(&dev->dev, "Failed to register reserved memory pool.\n");
1819 /* Init ISP memory management */
1822 err = devm_request_threaded_irq(&dev->dev, dev->irq,
1823 atomisp_isr, atomisp_isr_thread,
1824 IRQF_SHARED, "isp_irq", isp);
1826 dev_err(&dev->dev, "Failed to request irq (%d)\n", err);
1827 goto request_irq_fail;
1830 /* Load firmware into ISP memory */
1831 if (!defer_fw_load) {
1832 err = atomisp_css_load_firmware(isp);
1834 dev_err(&dev->dev, "Failed to init css.\n");
1838 dev_dbg(&dev->dev, "Skip css init.\n");
1840 /* Clear FW image from memory */
1841 release_firmware(isp->firmware);
1842 isp->firmware = NULL;
1843 isp->css_env.isp_css_fw.data = NULL;
1845 atomisp_drvfs_init(&dev->driver->driver, isp);
1850 devm_free_irq(&dev->dev, dev->irq, isp);
1853 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1855 destroy_workqueue(isp->wdt_work_queue);
1856 wdt_work_queue_fail:
1857 atomisp_acc_cleanup(isp);
1858 atomisp_unregister_entities(isp);
1859 register_entities_fail:
1860 atomisp_uninitialize_modules(isp);
1861 initialize_modules_fail:
1862 cpu_latency_qos_remove_request(&isp->pm_qos);
1863 atomisp_msi_irq_uninit(isp, dev);
1864 pci_disable_msi(dev);
1866 pci_disable_device(dev);
1868 release_firmware(isp->firmware);
1871 * Switch off ISP, as keeping it powered on would prevent
1872 * reaching S0ix states.
1874 * The following lines have been copied from atomisp suspend path
1877 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1878 irq = irq & 1 << INTR_IIR;
1879 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1881 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1882 irq &= ~(1 << INTR_IER);
1883 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1885 atomisp_msi_irq_uninit(isp, dev);
1887 atomisp_ospm_dphy_down(isp);
1889 /* Address later when we worry about the ...field chips */
1890 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1891 dev_err(&dev->dev, "Failed to switch off ISP\n");
1893 atomisp_dev_alloc_fail:
1894 pcim_iounmap_regions(dev, 1 << ATOM_ISP_PCI_BAR);
1900 static void atomisp_pci_remove(struct pci_dev *dev)
1902 struct atomisp_device *isp = (struct atomisp_device *)
1903 pci_get_drvdata(dev);
1905 dev_info(&dev->dev, "Removing atomisp driver\n");
1907 atomisp_drvfs_exit();
1909 atomisp_acc_cleanup(isp);
1911 atomisp_css_unload_firmware(isp);
1914 pm_runtime_forbid(&dev->dev);
1915 pm_runtime_get_noresume(&dev->dev);
1916 cpu_latency_qos_remove_request(&isp->pm_qos);
1918 atomisp_msi_irq_uninit(isp, dev);
1919 atomisp_unregister_entities(isp);
1921 destroy_workqueue(isp->wdt_work_queue);
1922 atomisp_file_input_cleanup(isp);
1924 release_firmware(isp->firmware);
1926 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1928 pci_disable_device(dev);
1931 static const struct pci_device_id atomisp_pci_tbl[] = {
1933 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD)},
1934 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_1179)},
1935 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_117A)},
1937 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_BYT)},
1938 /* Anniedale (Merrifield+ / Moorefield) */
1939 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_ANN)},
1941 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_CHT)},
1945 MODULE_DEVICE_TABLE(pci, atomisp_pci_tbl);
1947 static const struct dev_pm_ops atomisp_pm_ops = {
1948 .runtime_suspend = atomisp_runtime_suspend,
1949 .runtime_resume = atomisp_runtime_resume,
1950 .suspend = atomisp_suspend,
1951 .resume = atomisp_resume,
1954 static struct pci_driver atomisp_pci_driver = {
1956 .pm = &atomisp_pm_ops,
1958 .name = "atomisp-isp2",
1959 .id_table = atomisp_pci_tbl,
1960 .probe = atomisp_pci_probe,
1961 .remove = atomisp_pci_remove,
1964 module_pci_driver(atomisp_pci_driver);
1966 MODULE_AUTHOR("Wen Wang <wen.w.wang@intel.com>");
1967 MODULE_AUTHOR("Xiaolin Zhang <xiaolin.zhang@intel.com>");
1968 MODULE_LICENSE("GPL");
1969 MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver");