1 // SPDX-License-Identifier: GPL-2.0
3 * Support for Medifield PNW Camera Imaging ISP subsystem.
5 * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
7 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License version
11 * 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/pm_qos.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
26 #include <linux/dmi.h>
27 #include <linux/interrupt.h>
29 #include <asm/iosf_mbi.h>
31 #include "../../include/linux/atomisp_gmin_platform.h"
33 #include "atomisp_cmd.h"
34 #include "atomisp_common.h"
35 #include "atomisp_fops.h"
36 #include "atomisp_file.h"
37 #include "atomisp_ioctl.h"
38 #include "atomisp_internal.h"
39 #include "atomisp_acc.h"
40 #include "atomisp-regs.h"
41 #include "atomisp_dfs_tables.h"
42 #include "atomisp_drvfs.h"
44 #include "atomisp_trace_event.h"
46 #include "sh_css_firmware.h"
48 #include "device_access.h"
50 /* Timeouts to wait for all subdevs to be registered */
51 #define SUBDEV_WAIT_TIMEOUT 50 /* ms */
52 #define SUBDEV_WAIT_TIMEOUT_MAX_COUNT 40 /* up to 2 seconds */
54 /* G-Min addition: pull this in from intel_mid_pm.h */
55 #define CSTATE_EXIT_LATENCY_C1 1
57 static uint skip_fwload;
58 module_param(skip_fwload, uint, 0644);
59 MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load");
61 /* set reserved memory pool size in page */
62 static unsigned int repool_pgnr = 32768;
63 module_param(repool_pgnr, uint, 0644);
64 MODULE_PARM_DESC(repool_pgnr,
65 "Set the reserved memory pool size in page (default:32768)");
67 /* set dynamic memory pool size in page */
68 unsigned int dypool_pgnr = UINT_MAX;
69 module_param(dypool_pgnr, uint, 0644);
70 MODULE_PARM_DESC(dypool_pgnr,
71 "Set the dynamic memory pool size in page (default: unlimited)");
73 bool dypool_enable = true;
74 module_param(dypool_enable, bool, 0644);
75 MODULE_PARM_DESC(dypool_enable,
76 "dynamic memory pool enable/disable (default:enabled)");
78 /* memory optimization: deferred firmware loading */
80 module_param(defer_fw_load, bool, 0644);
81 MODULE_PARM_DESC(defer_fw_load,
82 "Defer FW loading until device is opened (default:disable)");
84 /* cross componnet debug message flag */
86 module_param(dbg_level, int, 0644);
87 MODULE_PARM_DESC(dbg_level, "debug message level (default:0)");
89 /* log function switch */
91 module_param(dbg_func, int, 0644);
92 MODULE_PARM_DESC(dbg_func,
93 "log function switch non/trace_printk/printk (default:printk)");
96 module_param(mipicsi_flag, int, 0644);
97 MODULE_PARM_DESC(mipicsi_flag, "mipi csi compression predictor algorithm");
99 static char firmware_name[256];
100 module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
101 MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the default firmware name.");
103 /*set to 16x16 since this is the amount of lines and pixels the sensor
104 exports extra. If these are kept at the 10x8 that they were on, in yuv
105 downscaling modes incorrect resolutions where requested to the sensor
106 driver with strange outcomes as a result. The proper way tot do this
107 would be to have a list of tables the specify the sensor res, mipi rec,
108 output res, and isp output res. however since we do not have this yet,
109 the chosen solution is the next best thing. */
111 module_param(pad_w, int, 0644);
112 MODULE_PARM_DESC(pad_w, "extra data for ISP processing");
115 module_param(pad_h, int, 0644);
116 MODULE_PARM_DESC(pad_h, "extra data for ISP processing");
119 * FIXME: this is a hack to make easier to support ISP2401 variant.
120 * As a given system will either be ISP2401 or not, we can just use
121 * a boolean, in order to replace existing #ifdef ISP2401 everywhere.
123 * Once this driver gets into a better shape, however, the best would
124 * be to replace this to something stored inside atomisp allocated
128 struct device *atomisp_dev;
130 void __iomem *atomisp_io_base;
132 static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = {
134 .width = ISP_FREQ_RULE_ANY,
135 .height = ISP_FREQ_RULE_ANY,
136 .fps = ISP_FREQ_RULE_ANY,
137 .isp_freq = ISP_FREQ_400MHZ,
138 .run_mode = ATOMISP_RUN_MODE_VIDEO,
141 .width = ISP_FREQ_RULE_ANY,
142 .height = ISP_FREQ_RULE_ANY,
143 .fps = ISP_FREQ_RULE_ANY,
144 .isp_freq = ISP_FREQ_400MHZ,
145 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
148 .width = ISP_FREQ_RULE_ANY,
149 .height = ISP_FREQ_RULE_ANY,
150 .fps = ISP_FREQ_RULE_ANY,
151 .isp_freq = ISP_FREQ_400MHZ,
152 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
155 .width = ISP_FREQ_RULE_ANY,
156 .height = ISP_FREQ_RULE_ANY,
157 .fps = ISP_FREQ_RULE_ANY,
158 .isp_freq = ISP_FREQ_400MHZ,
159 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
162 .width = ISP_FREQ_RULE_ANY,
163 .height = ISP_FREQ_RULE_ANY,
164 .fps = ISP_FREQ_RULE_ANY,
165 .isp_freq = ISP_FREQ_457MHZ,
166 .run_mode = ATOMISP_RUN_MODE_SDV,
170 /* Merrifield and Moorefield DFS rules */
171 static const struct atomisp_dfs_config dfs_config_merr = {
172 .lowest_freq = ISP_FREQ_200MHZ,
173 .max_freq_at_vmin = ISP_FREQ_400MHZ,
174 .highest_freq = ISP_FREQ_457MHZ,
175 .dfs_table = dfs_rules_merr,
176 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr),
179 static const struct atomisp_freq_scaling_rule dfs_rules_merr_1179[] = {
181 .width = ISP_FREQ_RULE_ANY,
182 .height = ISP_FREQ_RULE_ANY,
183 .fps = ISP_FREQ_RULE_ANY,
184 .isp_freq = ISP_FREQ_400MHZ,
185 .run_mode = ATOMISP_RUN_MODE_VIDEO,
188 .width = ISP_FREQ_RULE_ANY,
189 .height = ISP_FREQ_RULE_ANY,
190 .fps = ISP_FREQ_RULE_ANY,
191 .isp_freq = ISP_FREQ_400MHZ,
192 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
195 .width = ISP_FREQ_RULE_ANY,
196 .height = ISP_FREQ_RULE_ANY,
197 .fps = ISP_FREQ_RULE_ANY,
198 .isp_freq = ISP_FREQ_400MHZ,
199 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
202 .width = ISP_FREQ_RULE_ANY,
203 .height = ISP_FREQ_RULE_ANY,
204 .fps = ISP_FREQ_RULE_ANY,
205 .isp_freq = ISP_FREQ_400MHZ,
206 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
209 .width = ISP_FREQ_RULE_ANY,
210 .height = ISP_FREQ_RULE_ANY,
211 .fps = ISP_FREQ_RULE_ANY,
212 .isp_freq = ISP_FREQ_400MHZ,
213 .run_mode = ATOMISP_RUN_MODE_SDV,
217 static const struct atomisp_dfs_config dfs_config_merr_1179 = {
218 .lowest_freq = ISP_FREQ_200MHZ,
219 .max_freq_at_vmin = ISP_FREQ_400MHZ,
220 .highest_freq = ISP_FREQ_400MHZ,
221 .dfs_table = dfs_rules_merr_1179,
222 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179),
225 static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = {
230 .isp_freq = ISP_FREQ_266MHZ,
231 .run_mode = ATOMISP_RUN_MODE_VIDEO,
237 .isp_freq = ISP_FREQ_266MHZ,
238 .run_mode = ATOMISP_RUN_MODE_VIDEO,
244 .isp_freq = ISP_FREQ_320MHZ,
245 .run_mode = ATOMISP_RUN_MODE_VIDEO,
251 .isp_freq = ISP_FREQ_320MHZ,
252 .run_mode = ATOMISP_RUN_MODE_VIDEO,
255 .width = ISP_FREQ_RULE_ANY,
256 .height = ISP_FREQ_RULE_ANY,
258 .isp_freq = ISP_FREQ_356MHZ,
259 .run_mode = ATOMISP_RUN_MODE_VIDEO,
262 .width = ISP_FREQ_RULE_ANY,
263 .height = ISP_FREQ_RULE_ANY,
264 .fps = ISP_FREQ_RULE_ANY,
265 .isp_freq = ISP_FREQ_200MHZ,
266 .run_mode = ATOMISP_RUN_MODE_VIDEO,
269 .width = ISP_FREQ_RULE_ANY,
270 .height = ISP_FREQ_RULE_ANY,
271 .fps = ISP_FREQ_RULE_ANY,
272 .isp_freq = ISP_FREQ_400MHZ,
273 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
276 .width = ISP_FREQ_RULE_ANY,
277 .height = ISP_FREQ_RULE_ANY,
278 .fps = ISP_FREQ_RULE_ANY,
279 .isp_freq = ISP_FREQ_400MHZ,
280 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
283 .width = ISP_FREQ_RULE_ANY,
284 .height = ISP_FREQ_RULE_ANY,
285 .fps = ISP_FREQ_RULE_ANY,
286 .isp_freq = ISP_FREQ_200MHZ,
287 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
290 .width = ISP_FREQ_RULE_ANY,
291 .height = ISP_FREQ_RULE_ANY,
292 .fps = ISP_FREQ_RULE_ANY,
293 .isp_freq = ISP_FREQ_400MHZ,
294 .run_mode = ATOMISP_RUN_MODE_SDV,
298 static struct atomisp_dfs_config dfs_config_merr_117a = {
299 .lowest_freq = ISP_FREQ_200MHZ,
300 .max_freq_at_vmin = ISP_FREQ_200MHZ,
301 .highest_freq = ISP_FREQ_400MHZ,
302 .dfs_table = dfs_rules_merr_117a,
303 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_117a),
306 static const struct atomisp_freq_scaling_rule dfs_rules_byt[] = {
308 .width = ISP_FREQ_RULE_ANY,
309 .height = ISP_FREQ_RULE_ANY,
310 .fps = ISP_FREQ_RULE_ANY,
311 .isp_freq = ISP_FREQ_400MHZ,
312 .run_mode = ATOMISP_RUN_MODE_VIDEO,
315 .width = ISP_FREQ_RULE_ANY,
316 .height = ISP_FREQ_RULE_ANY,
317 .fps = ISP_FREQ_RULE_ANY,
318 .isp_freq = ISP_FREQ_400MHZ,
319 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
322 .width = ISP_FREQ_RULE_ANY,
323 .height = ISP_FREQ_RULE_ANY,
324 .fps = ISP_FREQ_RULE_ANY,
325 .isp_freq = ISP_FREQ_400MHZ,
326 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
329 .width = ISP_FREQ_RULE_ANY,
330 .height = ISP_FREQ_RULE_ANY,
331 .fps = ISP_FREQ_RULE_ANY,
332 .isp_freq = ISP_FREQ_400MHZ,
333 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
336 .width = ISP_FREQ_RULE_ANY,
337 .height = ISP_FREQ_RULE_ANY,
338 .fps = ISP_FREQ_RULE_ANY,
339 .isp_freq = ISP_FREQ_400MHZ,
340 .run_mode = ATOMISP_RUN_MODE_SDV,
344 static const struct atomisp_dfs_config dfs_config_byt = {
345 .lowest_freq = ISP_FREQ_200MHZ,
346 .max_freq_at_vmin = ISP_FREQ_400MHZ,
347 .highest_freq = ISP_FREQ_400MHZ,
348 .dfs_table = dfs_rules_byt,
349 .dfs_table_size = ARRAY_SIZE(dfs_rules_byt),
352 static const struct atomisp_freq_scaling_rule dfs_rules_cht[] = {
354 .width = ISP_FREQ_RULE_ANY,
355 .height = ISP_FREQ_RULE_ANY,
356 .fps = ISP_FREQ_RULE_ANY,
357 .isp_freq = ISP_FREQ_320MHZ,
358 .run_mode = ATOMISP_RUN_MODE_VIDEO,
361 .width = ISP_FREQ_RULE_ANY,
362 .height = ISP_FREQ_RULE_ANY,
363 .fps = ISP_FREQ_RULE_ANY,
364 .isp_freq = ISP_FREQ_356MHZ,
365 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
368 .width = ISP_FREQ_RULE_ANY,
369 .height = ISP_FREQ_RULE_ANY,
370 .fps = ISP_FREQ_RULE_ANY,
371 .isp_freq = ISP_FREQ_320MHZ,
372 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
375 .width = ISP_FREQ_RULE_ANY,
376 .height = ISP_FREQ_RULE_ANY,
377 .fps = ISP_FREQ_RULE_ANY,
378 .isp_freq = ISP_FREQ_320MHZ,
379 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
384 .fps = ISP_FREQ_RULE_ANY,
385 .isp_freq = ISP_FREQ_320MHZ,
386 .run_mode = ATOMISP_RUN_MODE_SDV,
389 .width = ISP_FREQ_RULE_ANY,
390 .height = ISP_FREQ_RULE_ANY,
391 .fps = ISP_FREQ_RULE_ANY,
392 .isp_freq = ISP_FREQ_356MHZ,
393 .run_mode = ATOMISP_RUN_MODE_SDV,
397 static const struct atomisp_freq_scaling_rule dfs_rules_cht_soc[] = {
399 .width = ISP_FREQ_RULE_ANY,
400 .height = ISP_FREQ_RULE_ANY,
401 .fps = ISP_FREQ_RULE_ANY,
402 .isp_freq = ISP_FREQ_356MHZ,
403 .run_mode = ATOMISP_RUN_MODE_VIDEO,
406 .width = ISP_FREQ_RULE_ANY,
407 .height = ISP_FREQ_RULE_ANY,
408 .fps = ISP_FREQ_RULE_ANY,
409 .isp_freq = ISP_FREQ_356MHZ,
410 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
413 .width = ISP_FREQ_RULE_ANY,
414 .height = ISP_FREQ_RULE_ANY,
415 .fps = ISP_FREQ_RULE_ANY,
416 .isp_freq = ISP_FREQ_320MHZ,
417 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
420 .width = ISP_FREQ_RULE_ANY,
421 .height = ISP_FREQ_RULE_ANY,
422 .fps = ISP_FREQ_RULE_ANY,
423 .isp_freq = ISP_FREQ_320MHZ,
424 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
427 .width = ISP_FREQ_RULE_ANY,
428 .height = ISP_FREQ_RULE_ANY,
429 .fps = ISP_FREQ_RULE_ANY,
430 .isp_freq = ISP_FREQ_356MHZ,
431 .run_mode = ATOMISP_RUN_MODE_SDV,
435 static const struct atomisp_dfs_config dfs_config_cht = {
436 .lowest_freq = ISP_FREQ_100MHZ,
437 .max_freq_at_vmin = ISP_FREQ_356MHZ,
438 .highest_freq = ISP_FREQ_356MHZ,
439 .dfs_table = dfs_rules_cht,
440 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht),
443 /* This one should be visible also by atomisp_cmd.c */
444 const struct atomisp_dfs_config dfs_config_cht_soc = {
445 .lowest_freq = ISP_FREQ_100MHZ,
446 .max_freq_at_vmin = ISP_FREQ_356MHZ,
447 .highest_freq = ISP_FREQ_356MHZ,
448 .dfs_table = dfs_rules_cht_soc,
449 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc),
452 int atomisp_video_init(struct atomisp_video_pipe *video, const char *name)
455 const char *direction;
457 switch (video->type) {
458 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
459 direction = "output";
460 video->pad.flags = MEDIA_PAD_FL_SINK;
461 video->vdev.fops = &atomisp_fops;
462 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
464 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
466 video->pad.flags = MEDIA_PAD_FL_SOURCE;
467 video->vdev.fops = &atomisp_file_fops;
468 video->vdev.ioctl_ops = &atomisp_file_ioctl_ops;
474 ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad);
478 /* Initialize the video device. */
479 snprintf(video->vdev.name, sizeof(video->vdev.name),
480 "ATOMISP ISP %s %s", name, direction);
481 video->vdev.release = video_device_release_empty;
482 video_set_drvdata(&video->vdev, video->isp);
487 void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name)
489 video->vdev.fops = &atomisp_fops;
490 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
492 /* Initialize the video device. */
493 snprintf(video->vdev.name, sizeof(video->vdev.name),
494 "ATOMISP ISP %s", name);
495 video->vdev.release = video_device_release_empty;
496 video_set_drvdata(&video->vdev, video->isp);
499 void atomisp_video_unregister(struct atomisp_video_pipe *video)
501 if (video_is_registered(&video->vdev)) {
502 media_entity_cleanup(&video->vdev.entity);
503 video_unregister_device(&video->vdev);
507 void atomisp_acc_unregister(struct atomisp_acc_pipe *video)
509 if (video_is_registered(&video->vdev))
510 video_unregister_device(&video->vdev);
513 static int atomisp_save_iunit_reg(struct atomisp_device *isp)
515 struct pci_dev *dev = isp->pdev;
517 dev_dbg(isp->dev, "%s\n", __func__);
519 pci_read_config_word(dev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
520 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
521 pci_read_config_dword(dev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
522 pci_read_config_dword(dev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
523 pci_read_config_word(dev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
524 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
525 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL,
526 &isp->saved_regs.interrupt_control);
528 pci_read_config_dword(dev, MRFLD_PCI_PMCS,
529 &isp->saved_regs.pmcs);
530 /* Ensure read/write combining is enabled. */
531 pci_read_config_dword(dev, PCI_I_CONTROL,
532 &isp->saved_regs.i_control);
533 isp->saved_regs.i_control |=
534 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
535 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
536 pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
537 &isp->saved_regs.csi_access_viol);
538 pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
539 &isp->saved_regs.csi_rcomp_config);
541 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
542 * ANN/CHV: RCOMP updates do not happen when using CSI2+ path
543 * and sensor sending "continuous clock".
544 * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence
545 * is missed, and IUNIT can hang.
546 * For both issues, setting this bit is a workaround.
548 isp->saved_regs.csi_rcomp_config |=
549 MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
550 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
551 &isp->saved_regs.csi_afe_dly);
552 pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
553 &isp->saved_regs.csi_control);
554 if (isp->media_dev.hw_revision >=
555 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
556 isp->saved_regs.csi_control |=
557 MRFLD_PCI_CSI_CONTROL_PARPATHEN;
559 * On CHT CSI_READY bit should be enabled before stream on
561 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
562 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
563 isp->saved_regs.csi_control |=
564 MRFLD_PCI_CSI_CONTROL_CSI_READY;
565 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
566 &isp->saved_regs.csi_afe_rcomp_config);
567 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
568 &isp->saved_regs.csi_afe_hs_control);
569 pci_read_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
570 &isp->saved_regs.csi_deadline_control);
574 static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
576 struct pci_dev *dev = isp->pdev;
578 dev_dbg(isp->dev, "%s\n", __func__);
580 pci_write_config_word(dev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
581 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
582 isp->saved_regs.ispmmadr);
583 pci_write_config_dword(dev, PCI_MSI_CAPID, isp->saved_regs.msicap);
584 pci_write_config_dword(dev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
585 pci_write_config_word(dev, PCI_MSI_DATA, isp->saved_regs.msi_data);
586 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
587 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL,
588 isp->saved_regs.interrupt_control);
589 pci_write_config_dword(dev, PCI_I_CONTROL,
590 isp->saved_regs.i_control);
592 pci_write_config_dword(dev, MRFLD_PCI_PMCS,
593 isp->saved_regs.pmcs);
594 pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
595 isp->saved_regs.csi_access_viol);
596 pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
597 isp->saved_regs.csi_rcomp_config);
598 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
599 isp->saved_regs.csi_afe_dly);
600 pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
601 isp->saved_regs.csi_control);
602 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
603 isp->saved_regs.csi_afe_rcomp_config);
604 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
605 isp->saved_regs.csi_afe_hs_control);
606 pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
607 isp->saved_regs.csi_deadline_control);
610 * for MRFLD, Software/firmware needs to write a 1 to bit0
611 * of the register at CSI_RECEIVER_SELECTION_REG to enable
612 * SH CSI backend write 0 will enable Arasan CSI backend,
613 * which has bugs(like sighting:4567697 and 4567699) and
614 * will be removed in B0
616 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
620 static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
622 struct pci_dev *dev = isp->pdev;
626 spin_lock_irqsave(&isp->lock, flags);
627 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
628 spin_unlock_irqrestore(&isp->lock, flags);
629 dev_dbg(isp->dev, "<%s %d.\n", __func__, __LINE__);
633 * MRFLD HAS requirement: cannot power off i-unit if
634 * ISP has IRQ not serviced.
635 * So, here we need to check if there is any pending
636 * IRQ, if so, waiting for it to be served
638 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
639 irq = irq & 1 << INTR_IIR;
640 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
642 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
643 if (!(irq & (1 << INTR_IIR)))
646 atomisp_css2_hw_store_32(MRFLD_INTR_CLEAR_REG, 0xFFFFFFFF);
647 atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq);
650 "%s: fail to clear isp interrupt status reg=0x%x\n",
652 spin_unlock_irqrestore(&isp->lock, flags);
655 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
656 irq = irq & 1 << INTR_IIR;
657 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
659 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
660 if (!(irq & (1 << INTR_IIR))) {
661 atomisp_css2_hw_store_32(MRFLD_INTR_ENABLE_REG, 0x0);
665 "%s: error in iunit interrupt. status reg=0x%x\n",
667 spin_unlock_irqrestore(&isp->lock, flags);
673 * before powering off IUNIT, clear the pending interrupts
674 * and disable the interrupt. driver should avoid writing 0
675 * to IIR. It could block subsequent interrupt messages.
676 * HW sighting:4568410.
678 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
679 irq &= ~(1 << INTR_IER);
680 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
682 atomisp_msi_irq_uninit(isp, dev);
683 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
684 spin_unlock_irqrestore(&isp->lock, flags);
690 * WA for DDR DVFS enable/disable
691 * By default, ISP will force DDR DVFS 1600MHz before disable DVFS
693 static void punit_ddr_dvfs_enable(bool enable)
695 int door_bell = 1 << 8;
699 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
701 reg &= ~(MRFLD_BIT0 | MRFLD_BIT1);
703 reg |= (MRFLD_BIT1 | door_bell);
704 reg &= ~(MRFLD_BIT0);
706 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSDVFS, reg);
708 /* Check Req_ACK to see freq status, wait until door_bell is cleared */
709 while ((reg & door_bell) && max_wait--) {
710 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
711 usleep_range(100, 500);
715 pr_info("DDR DVFS, door bell is not cleared within 3ms\n");
718 static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable)
720 unsigned long timeout;
721 u32 val = enable ? MRFLD_ISPSSPM0_IUNIT_POWER_ON :
722 MRFLD_ISPSSPM0_IUNIT_POWER_OFF;
724 dev_dbg(isp->dev, "IUNIT power-%s.\n", enable ? "on" : "off");
727 if (IS_CHT && enable)
728 punit_ddr_dvfs_enable(true);
731 * FIXME:WA for ECS28A, with this sleep, CTS
732 * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort
733 * PASS, no impact on other platforms
735 if (IS_BYT && enable)
738 /* Write to ISPSSPM0 bit[1:0] to power on/off the IUNIT */
739 iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0,
740 val, MRFLD_ISPSSPM0_ISPSSC_MASK);
743 if (IS_CHT && !enable)
744 punit_ddr_dvfs_enable(true);
747 * There should be no IUNIT access while power-down is
748 * in progress. HW sighting: 4567865.
749 * Wait up to 50 ms for the IUNIT to shut down.
750 * And we do the same for power on.
752 timeout = jiffies + msecs_to_jiffies(50);
756 /* Wait until ISPSSPM0 bit[25:24] shows the right value */
757 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &tmp);
758 tmp = (tmp & MRFLD_ISPSSPM0_ISPSSC_MASK) >> MRFLD_ISPSSPM0_ISPSSS_OFFSET;
760 trace_ipu_cstate(enable);
764 if (time_after(jiffies, timeout))
767 /* FIXME: experienced value for delay */
768 usleep_range(100, 150);
774 dev_err(isp->dev, "IUNIT power-%s timeout.\n", enable ? "on" : "off");
778 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
779 int atomisp_mrfld_power_down(struct atomisp_device *isp)
782 // FIXME: at least with ISP2401, the code below causes the driver to break
783 // return atomisp_mrfld_power(isp, false);
786 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
787 int atomisp_mrfld_power_up(struct atomisp_device *isp)
790 // FIXME: at least with ISP2401, the code below causes the driver to break
791 // return atomisp_mrfld_power(isp, true);
794 int atomisp_runtime_suspend(struct device *dev)
796 struct atomisp_device *isp = (struct atomisp_device *)
797 dev_get_drvdata(dev);
800 ret = atomisp_mrfld_pre_power_down(isp);
804 /*Turn off the ISP d-phy*/
805 ret = atomisp_ospm_dphy_down(isp);
808 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
809 return atomisp_mrfld_power_down(isp);
812 int atomisp_runtime_resume(struct device *dev)
814 struct atomisp_device *isp = (struct atomisp_device *)
815 dev_get_drvdata(dev);
818 ret = atomisp_mrfld_power_up(isp);
822 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
823 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
824 /*Turn on ISP d-phy */
825 ret = atomisp_ospm_dphy_up(isp);
827 dev_err(isp->dev, "Failed to power up ISP!.\n");
832 /*restore register values for iUnit and iUnitPHY registers*/
833 if (isp->saved_regs.pcicmdsts)
834 atomisp_restore_iunit_reg(isp);
836 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
840 static int __maybe_unused atomisp_suspend(struct device *dev)
842 struct atomisp_device *isp = (struct atomisp_device *)
843 dev_get_drvdata(dev);
844 /* FIXME: only has one isp_subdev at present */
845 struct atomisp_sub_device *asd = &isp->asd[0];
850 * FIXME: Suspend is not supported by sensors. Abort if any video
853 if (atomisp_dev_users(isp))
856 spin_lock_irqsave(&isp->lock, flags);
857 if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) {
858 spin_unlock_irqrestore(&isp->lock, flags);
859 dev_err(isp->dev, "atomisp cannot suspend at this time.\n");
862 spin_unlock_irqrestore(&isp->lock, flags);
864 ret = atomisp_mrfld_pre_power_down(isp);
868 /*Turn off the ISP d-phy */
869 ret = atomisp_ospm_dphy_down(isp);
871 dev_err(isp->dev, "fail to power off ISP\n");
874 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
875 return atomisp_mrfld_power_down(isp);
878 static int __maybe_unused atomisp_resume(struct device *dev)
880 struct atomisp_device *isp = (struct atomisp_device *)
881 dev_get_drvdata(dev);
884 ret = atomisp_mrfld_power_up(isp);
888 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
890 /*Turn on ISP d-phy */
891 ret = atomisp_ospm_dphy_up(isp);
893 dev_err(isp->dev, "Failed to power up ISP!.\n");
897 /*restore register values for iUnit and iUnitPHY registers*/
898 if (isp->saved_regs.pcicmdsts)
899 atomisp_restore_iunit_reg(isp);
901 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
905 int atomisp_csi_lane_config(struct atomisp_device *isp)
907 static const struct {
909 u8 lanes[MRFLD_PORT_NUM];
911 /* Tangier/Merrifield available lane configurations */
912 { 0x00, { 4, 1, 0 } }, /* 00000 */
913 { 0x01, { 3, 1, 0 } }, /* 00001 */
914 { 0x02, { 2, 1, 0 } }, /* 00010 */
915 { 0x03, { 1, 1, 0 } }, /* 00011 */
916 { 0x04, { 2, 1, 2 } }, /* 00100 */
917 { 0x08, { 3, 1, 1 } }, /* 01000 */
918 { 0x09, { 2, 1, 1 } }, /* 01001 */
919 { 0x0a, { 1, 1, 1 } }, /* 01010 */
921 /* Anniedale/Moorefield only configurations */
922 { 0x10, { 4, 2, 0 } }, /* 10000 */
923 { 0x11, { 3, 2, 0 } }, /* 10001 */
924 { 0x12, { 2, 2, 0 } }, /* 10010 */
925 { 0x13, { 1, 2, 0 } }, /* 10011 */
926 { 0x14, { 2, 2, 2 } }, /* 10100 */
927 { 0x18, { 3, 2, 1 } }, /* 11000 */
928 { 0x19, { 2, 2, 1 } }, /* 11001 */
929 { 0x1a, { 1, 2, 1 } }, /* 11010 */
933 u8 sensor_lanes[MRFLD_PORT_NUM] = { 0 };
936 u32 port_config_mask;
937 int port3_lanes_shift;
939 if (isp->media_dev.hw_revision <
940 ATOMISP_HW_REVISION_ISP2401_LEGACY <<
941 ATOMISP_HW_REVISION_SHIFT) {
943 port_config_mask = MRFLD_PORT_CONFIG_MASK;
944 port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT;
946 /* Moorefield / Cherryview */
947 port_config_mask = CHV_PORT_CONFIG_MASK;
948 port3_lanes_shift = CHV_PORT3_LANES_SHIFT;
951 if (isp->media_dev.hw_revision <
952 ATOMISP_HW_REVISION_ISP2401 <<
953 ATOMISP_HW_REVISION_SHIFT) {
954 /* Merrifield / Moorefield legacy input system */
955 nportconfigs = MRFLD_PORT_CONFIG_NUM;
957 /* Moorefield / Cherryview new input system */
958 nportconfigs = ARRAY_SIZE(portconfigs);
961 for (i = 0; i < isp->input_cnt; i++) {
962 struct camera_mipi_info *mipi_info;
964 if (isp->inputs[i].type != RAW_CAMERA &&
965 isp->inputs[i].type != SOC_CAMERA)
968 mipi_info = atomisp_to_sensor_mipi_info(isp->inputs[i].camera);
972 switch (mipi_info->port) {
973 case ATOMISP_CAMERA_PORT_PRIMARY:
974 sensor_lanes[0] = mipi_info->num_lanes;
976 case ATOMISP_CAMERA_PORT_SECONDARY:
977 sensor_lanes[1] = mipi_info->num_lanes;
979 case ATOMISP_CAMERA_PORT_TERTIARY:
980 sensor_lanes[2] = mipi_info->num_lanes;
984 "%s: invalid port: %d for the %dth sensor\n",
985 __func__, mipi_info->port, i);
990 for (i = 0; i < nportconfigs; i++) {
991 for (j = 0; j < MRFLD_PORT_NUM; j++)
992 if (sensor_lanes[j] &&
993 sensor_lanes[j] != portconfigs[i].lanes[j])
996 if (j == MRFLD_PORT_NUM)
997 break; /* Found matching setting */
1000 if (i >= nportconfigs) {
1002 "%s: could not find the CSI port setting for %d-%d-%d\n",
1004 sensor_lanes[0], sensor_lanes[1], sensor_lanes[2]);
1008 pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
1009 csi_control &= ~port_config_mask;
1010 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
1011 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
1012 | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
1013 | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
1014 | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
1015 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
1016 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
1018 pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
1021 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
1022 __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[1],
1023 portconfigs[i].lanes[2], csi_control);
1028 static int atomisp_subdev_probe(struct atomisp_device *isp)
1030 const struct atomisp_platform_data *pdata;
1031 struct intel_v4l2_subdev_table *subdevs;
1032 int ret, raw_index = -1, count;
1034 pdata = atomisp_get_platform_data();
1036 dev_err(isp->dev, "no platform data available\n");
1040 /* FIXME: should return -EPROBE_DEFER if not all subdevs were probed */
1041 for (count = 0; count < SUBDEV_WAIT_TIMEOUT_MAX_COUNT; count++) {
1042 int camera_count = 0;
1044 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
1045 if (subdevs->type == RAW_CAMERA ||
1046 subdevs->type == SOC_CAMERA)
1051 msleep(SUBDEV_WAIT_TIMEOUT);
1053 /* Wait more time to give more time for subdev init code to finish */
1054 msleep(5 * SUBDEV_WAIT_TIMEOUT);
1056 /* FIXME: should, instead, use I2C probe */
1058 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
1059 struct v4l2_subdev *subdev;
1060 struct i2c_board_info *board_info =
1061 &subdevs->v4l2_subdev.board_info;
1062 struct i2c_adapter *adapter =
1063 i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
1066 dev_info(isp->dev, "Probing Subdev %s\n", board_info->type);
1070 "Failed to find i2c adapter for subdev %s\n",
1075 /* In G-Min, the sensor devices will already be probed
1076 * (via ACPI) and registered, do not create new
1078 subdev = atomisp_gmin_find_subdev(adapter, board_info);
1080 dev_warn(isp->dev, "Subdev %s not found\n",
1084 ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev);
1086 dev_warn(isp->dev, "Subdev %s detection fail\n",
1092 dev_warn(isp->dev, "Subdev %s detection fail\n",
1097 dev_info(isp->dev, "Subdev %s successfully register\n",
1100 switch (subdevs->type) {
1102 dev_dbg(isp->dev, "raw_index: %d\n", raw_index);
1103 raw_index = isp->input_cnt;
1106 dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt);
1107 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1109 "too many atomisp inputs, ignored\n");
1113 isp->inputs[isp->input_cnt].type = subdevs->type;
1114 isp->inputs[isp->input_cnt].port = subdevs->port;
1115 isp->inputs[isp->input_cnt].camera = subdev;
1116 isp->inputs[isp->input_cnt].sensor_index = 0;
1118 * initialize the subdev frame size, then next we can
1119 * judge whether frame_size store effective value via
1122 isp->inputs[isp->input_cnt].frame_size.pixel_format = 0;
1123 isp->inputs[isp->input_cnt].camera_caps =
1124 atomisp_get_default_camera_caps();
1125 sensor_num = isp->inputs[isp->input_cnt]
1126 .camera_caps->sensor_num;
1128 for (i = 1; i < sensor_num; i++) {
1129 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1131 "atomisp inputs out of range\n");
1134 isp->inputs[isp->input_cnt] =
1135 isp->inputs[isp->input_cnt - 1];
1136 isp->inputs[isp->input_cnt].sensor_index = i;
1143 "too many atomisp motors, ignored %s\n",
1147 isp->motor = subdev;
1153 "too many atomisp flash devices, ignored %s\n",
1157 isp->flash = subdev;
1160 dev_dbg(isp->dev, "unknown subdev probed\n");
1166 * HACK: Currently VCM belongs to primary sensor only, but correct
1167 * approach must be to acquire from platform code which sensor
1170 if (isp->motor && raw_index >= 0)
1171 isp->inputs[raw_index].motor = isp->motor;
1173 /* Proceed even if no modules detected. For COS mode and no modules. */
1174 if (!isp->input_cnt)
1175 dev_warn(isp->dev, "no camera attached or fail to detect\n");
1177 dev_info(isp->dev, "detected %d camera sensors\n",
1180 return atomisp_csi_lane_config(isp);
1183 static void atomisp_unregister_entities(struct atomisp_device *isp)
1186 struct v4l2_subdev *sd, *next;
1188 for (i = 0; i < isp->num_of_streams; i++)
1189 atomisp_subdev_unregister_entities(&isp->asd[i]);
1190 atomisp_tpg_unregister_entities(&isp->tpg);
1191 atomisp_file_input_unregister_entities(&isp->file_dev);
1192 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1193 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1195 list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list)
1196 v4l2_device_unregister_subdev(sd);
1198 v4l2_device_unregister(&isp->v4l2_dev);
1199 media_device_unregister(&isp->media_dev);
1202 static int atomisp_register_entities(struct atomisp_device *isp)
1207 isp->media_dev.dev = isp->dev;
1209 strlcpy(isp->media_dev.model, "Intel Atom ISP",
1210 sizeof(isp->media_dev.model));
1212 media_device_init(&isp->media_dev);
1213 isp->v4l2_dev.mdev = &isp->media_dev;
1214 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1216 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1218 goto v4l2_device_failed;
1221 ret = atomisp_subdev_probe(isp);
1223 goto csi_and_subdev_probe_failed;
1225 /* Register internal entities */
1226 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) {
1227 ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i],
1233 dev_err(isp->dev, "failed to register the CSI port: %d\n", i);
1234 /* deregister all registered CSI ports */
1236 atomisp_mipi_csi2_unregister_entities(
1237 &isp->csi2_port[i]);
1239 goto csi_and_subdev_probe_failed;
1243 atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev);
1245 dev_err(isp->dev, "atomisp_file_input_register_entities\n");
1246 goto file_input_register_failed;
1249 ret = atomisp_tpg_register_entities(&isp->tpg, &isp->v4l2_dev);
1251 dev_err(isp->dev, "atomisp_tpg_register_entities\n");
1252 goto tpg_register_failed;
1255 for (i = 0; i < isp->num_of_streams; i++) {
1256 struct atomisp_sub_device *asd = &isp->asd[i];
1258 ret = atomisp_subdev_register_entities(asd, &isp->v4l2_dev);
1261 "atomisp_subdev_register_entities fail\n");
1263 atomisp_subdev_unregister_entities(
1265 goto subdev_register_failed;
1269 for (i = 0; i < isp->num_of_streams; i++) {
1270 struct atomisp_sub_device *asd = &isp->asd[i];
1272 init_completion(&asd->init_done);
1274 asd->delayed_init_workq =
1275 alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
1277 if (!asd->delayed_init_workq) {
1279 "Failed to initialize delayed init workq\n");
1283 destroy_workqueue(isp->asd[i - 1].
1284 delayed_init_workq);
1285 goto wq_alloc_failed;
1287 INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work);
1290 for (i = 0; i < isp->input_cnt; i++) {
1291 if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) {
1292 dev_err(isp->dev, "isp->inputs port %d not supported\n",
1293 isp->inputs[i].port);
1300 "FILE_INPUT enable, camera_cnt: %d\n", isp->input_cnt);
1301 isp->inputs[isp->input_cnt].type = FILE_INPUT;
1302 isp->inputs[isp->input_cnt].port = -1;
1303 isp->inputs[isp->input_cnt].camera_caps =
1304 atomisp_get_default_camera_caps();
1305 isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd;
1307 if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) {
1309 "TPG detected, camera_cnt: %d\n", isp->input_cnt);
1310 isp->inputs[isp->input_cnt].type = TEST_PATTERN;
1311 isp->inputs[isp->input_cnt].port = -1;
1312 isp->inputs[isp->input_cnt].camera_caps =
1313 atomisp_get_default_camera_caps();
1314 isp->inputs[isp->input_cnt++].camera = &isp->tpg.sd;
1316 dev_warn(isp->dev, "too many atomisp inputs, TPG ignored.\n");
1319 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1323 return media_device_register(&isp->media_dev);
1326 for (i = 0; i < isp->num_of_streams; i++)
1327 destroy_workqueue(isp->asd[i].
1328 delayed_init_workq);
1330 for (i = 0; i < isp->num_of_streams; i++)
1331 atomisp_subdev_unregister_entities(
1333 subdev_register_failed:
1334 atomisp_tpg_unregister_entities(&isp->tpg);
1335 tpg_register_failed:
1336 atomisp_file_input_unregister_entities(&isp->file_dev);
1337 file_input_register_failed:
1338 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1339 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1340 csi_and_subdev_probe_failed:
1341 v4l2_device_unregister(&isp->v4l2_dev);
1343 media_device_unregister(&isp->media_dev);
1344 media_device_cleanup(&isp->media_dev);
1348 static int atomisp_initialize_modules(struct atomisp_device *isp)
1352 ret = atomisp_mipi_csi2_init(isp);
1354 dev_err(isp->dev, "mipi csi2 initialization failed\n");
1355 goto error_mipi_csi2;
1358 ret = atomisp_file_input_init(isp);
1361 "file input device initialization failed\n");
1362 goto error_file_input;
1365 ret = atomisp_tpg_init(isp);
1367 dev_err(isp->dev, "tpg initialization failed\n");
1371 ret = atomisp_subdev_init(isp);
1373 dev_err(isp->dev, "ISP subdev initialization failed\n");
1374 goto error_isp_subdev;
1381 atomisp_tpg_cleanup(isp);
1383 atomisp_file_input_cleanup(isp);
1385 atomisp_mipi_csi2_cleanup(isp);
1389 static void atomisp_uninitialize_modules(struct atomisp_device *isp)
1391 atomisp_tpg_cleanup(isp);
1392 atomisp_file_input_cleanup(isp);
1393 atomisp_mipi_csi2_cleanup(isp);
1396 const struct firmware *
1397 atomisp_load_firmware(struct atomisp_device *isp)
1399 const struct firmware *fw;
1401 char *fw_path = NULL;
1406 if (firmware_name[0] != '\0') {
1407 fw_path = firmware_name;
1409 if ((isp->media_dev.hw_revision >> ATOMISP_HW_REVISION_SHIFT)
1410 == ATOMISP_HW_REVISION_ISP2401)
1411 fw_path = "shisp_2401a0_v21.bin";
1413 if (isp->media_dev.hw_revision ==
1414 ((ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT)
1415 | ATOMISP_HW_STEPPING_A0))
1416 fw_path = "shisp_2401a0_legacy_v21.bin";
1418 if (isp->media_dev.hw_revision ==
1419 ((ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT)
1420 | ATOMISP_HW_STEPPING_B0))
1421 fw_path = "shisp_2400b0_v21.bin";
1425 dev_err(isp->dev, "Unsupported hw_revision 0x%x\n",
1426 isp->media_dev.hw_revision);
1430 rc = request_firmware(&fw, fw_path, isp->dev);
1433 "atomisp: Error %d while requesting firmware %s\n",
1442 * Check for flags the driver was compiled with against the PCI
1443 * device. Always returns true on other than ISP 2400.
1445 static bool is_valid_device(struct pci_dev *dev,
1446 const struct pci_device_id *id)
1448 unsigned int a0_max_id = 0;
1450 const char *product;
1452 product = dmi_get_system_info(DMI_PRODUCT_NAME);
1454 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1455 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1456 a0_max_id = ATOMISP_PCI_REV_MRFLD_A0_MAX;
1457 name = "Merrifield";
1459 case ATOMISP_PCI_DEVICE_SOC_BYT:
1460 a0_max_id = ATOMISP_PCI_REV_BYT_A0_MAX;
1463 case ATOMISP_PCI_DEVICE_SOC_ANN:
1466 case ATOMISP_PCI_DEVICE_SOC_CHT:
1467 name = "Cherrytrail";
1470 dev_err(&dev->dev, "%s: unknown device ID %x04:%x04\n",
1471 product, id->vendor, id->device);
1475 if (dev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) {
1476 dev_err(&dev->dev, "%s revision %d is not unsupported\n",
1477 name, dev->revision);
1483 * remove the if once the driver become generic
1486 #if defined(ISP2400)
1488 dev_err(&dev->dev, "Support for %s (ISP2401) was disabled at compile time\n",
1494 dev_err(&dev->dev, "Support for %s (ISP2400) was disabled at compile time\n",
1500 dev_info(&dev->dev, "Detected %s version %d (ISP240%c) on %s\n",
1501 name, dev->revision,
1502 IS_ISP2401 ? '1' : '0',
1508 static int init_atomisp_wdts(struct atomisp_device *isp)
1512 atomic_set(&isp->wdt_work_queued, 0);
1513 isp->wdt_work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1);
1514 if (!isp->wdt_work_queue) {
1515 dev_err(isp->dev, "Failed to initialize wdt work queue\n");
1519 INIT_WORK(&isp->wdt_work, atomisp_wdt_work);
1521 for (i = 0; i < isp->num_of_streams; i++) {
1522 struct atomisp_sub_device *asd = &isp->asd[i];
1525 timer_setup(&asd->wdt, atomisp_wdt, 0);
1527 timer_setup(&asd->video_out_capture.wdt,
1529 timer_setup(&asd->video_out_preview.wdt,
1531 timer_setup(&asd->video_out_vf.wdt, atomisp_wdt, 0);
1532 timer_setup(&asd->video_out_video_capture.wdt,
1541 #define ATOM_ISP_PCI_BAR 0
1543 static int atomisp_pci_probe(struct pci_dev *dev,
1544 const struct pci_device_id *id)
1546 const struct atomisp_platform_data *pdata;
1547 struct atomisp_device *isp;
1553 if (!is_valid_device(dev, id))
1556 /* Pointer to struct device. */
1557 atomisp_dev = &dev->dev;
1559 pdata = atomisp_get_platform_data();
1561 dev_warn(&dev->dev, "no platform data available\n");
1563 err = pcim_enable_device(dev);
1565 dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n",
1570 start = pci_resource_start(dev, ATOM_ISP_PCI_BAR);
1571 dev_dbg(&dev->dev, "start: 0x%x\n", start);
1573 err = pcim_iomap_regions(dev, 1 << ATOM_ISP_PCI_BAR, pci_name(dev));
1575 dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n",
1580 base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR];
1581 dev_dbg(&dev->dev, "base: %p\n", base);
1583 atomisp_io_base = base;
1585 dev_dbg(&dev->dev, "atomisp_io_base: %p\n", atomisp_io_base);
1587 isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL);
1590 goto atomisp_dev_alloc_fail;
1593 isp->dev = &dev->dev;
1594 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
1595 isp->saved_regs.ispmmadr = start;
1597 rt_mutex_init(&isp->mutex);
1598 mutex_init(&isp->streamoff_mutex);
1599 spin_lock_init(&isp->lock);
1601 /* This is not a true PCI device on SoC, so the delay is not needed. */
1602 isp->pdev->d3_delay = 0;
1604 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1605 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1606 isp->media_dev.hw_revision =
1607 (ATOMISP_HW_REVISION_ISP2400
1608 << ATOMISP_HW_REVISION_SHIFT) |
1609 ATOMISP_HW_STEPPING_B0;
1611 switch (id->device) {
1612 case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179:
1613 isp->dfs = &dfs_config_merr_1179;
1615 case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A:
1616 isp->dfs = &dfs_config_merr_117a;
1620 isp->dfs = &dfs_config_merr;
1623 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1625 case ATOMISP_PCI_DEVICE_SOC_BYT:
1626 isp->media_dev.hw_revision =
1627 (ATOMISP_HW_REVISION_ISP2400
1628 << ATOMISP_HW_REVISION_SHIFT) |
1629 ATOMISP_HW_STEPPING_B0;
1632 * Note: some Intel-based tablets with Android use a different
1633 * DFS table. Based on the comments at the Yocto Aero meta
1634 * version of this driver (at the ssid.h header), they're
1635 * identified via a "spid" var:
1637 * androidboot.spid=vend:cust:manu:plat:prod:hard
1639 * As we don't have this upstream, nor we know enough details
1640 * to use a DMI or PCI match table, the old code was just
1641 * removed, but let's keep a note here as a reminder that,
1642 * for certain devices, we may need to limit the max DFS
1643 * frequency to be below certain values, adjusting the
1644 * resolution accordingly.
1646 isp->dfs = &dfs_config_byt;
1649 * HPLL frequency is known to be device-specific, but we don't
1650 * have specs yet for exactly how it varies. Default to
1651 * BYT-CR but let provisioning set it via EFI variable
1653 isp->hpll_freq = gmin_get_var_int(&dev->dev, false, "HpllFreq",
1657 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1658 * in power off. Set d3cold_delay to 0 since default 100ms is not
1661 isp->pdev->d3cold_delay = 0;
1663 case ATOMISP_PCI_DEVICE_SOC_ANN:
1664 isp->media_dev.hw_revision = (
1665 #ifdef ISP2401_NEW_INPUT_SYSTEM
1666 ATOMISP_HW_REVISION_ISP2401
1668 ATOMISP_HW_REVISION_ISP2401_LEGACY
1670 << ATOMISP_HW_REVISION_SHIFT);
1671 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1672 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1673 isp->dfs = &dfs_config_merr;
1674 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1676 case ATOMISP_PCI_DEVICE_SOC_CHT:
1677 isp->media_dev.hw_revision = (
1678 #ifdef ISP2401_NEW_INPUT_SYSTEM
1679 ATOMISP_HW_REVISION_ISP2401
1681 ATOMISP_HW_REVISION_ISP2401_LEGACY
1683 << ATOMISP_HW_REVISION_SHIFT);
1684 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1685 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1687 isp->dfs = &dfs_config_cht;
1688 isp->pdev->d3cold_delay = 0;
1690 iosf_mbi_read(CCK_PORT, MBI_REG_READ, CCK_FUSE_REG_0, &val);
1691 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
1693 isp->hpll_freq = HPLL_FREQ_800MHZ;
1696 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1699 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1702 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1704 "read HPLL from cck failed. Default to 1600 MHz.\n");
1708 dev_err(&dev->dev, "un-supported IUNIT device\n");
1710 goto atomisp_dev_alloc_fail;
1713 dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n",
1716 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
1718 /* Load isp firmware from user space */
1719 if (!defer_fw_load) {
1720 isp->firmware = atomisp_load_firmware(isp);
1721 if (!isp->firmware) {
1723 dev_dbg(&dev->dev, "Firmware load failed\n");
1727 err = sh_css_check_firmware_version(isp->dev,
1728 isp->firmware->data);
1730 dev_dbg(&dev->dev, "Firmware version check failed\n");
1731 goto fw_validation_fail;
1734 dev_info(&dev->dev, "Firmware load will be deferred\n");
1737 pci_set_master(dev);
1738 pci_set_drvdata(dev, isp);
1740 err = pci_enable_msi(dev);
1742 dev_err(&dev->dev, "Failed to enable msi (%d)\n", err);
1743 goto enable_msi_fail;
1746 atomisp_msi_irq_init(isp, dev);
1748 cpu_latency_qos_add_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
1751 * for MRFLD, Software/firmware needs to write a 1 to bit 0 of
1752 * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI
1753 * backend write 0 will enable Arasan CSI backend, which has
1754 * bugs(like sighting:4567697 and 4567699) and will be removed
1757 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
1759 if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
1760 ATOMISP_PCI_DEVICE_SOC_MRFLD) {
1764 * Workaround for imbalance data eye issue which is observed
1767 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1769 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1770 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1771 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1772 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1773 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1774 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
1775 csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM <<
1776 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1777 (MRFLD_PCI_CSI2_HSRXCLKTRIM <<
1778 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1779 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
1780 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1781 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1785 err = atomisp_initialize_modules(isp);
1787 dev_err(&dev->dev, "atomisp_initialize_modules (%d)\n", err);
1788 goto initialize_modules_fail;
1791 err = atomisp_register_entities(isp);
1793 dev_err(&dev->dev, "atomisp_register_entities failed (%d)\n",
1795 goto register_entities_fail;
1797 err = atomisp_create_pads_links(isp);
1799 goto register_entities_fail;
1800 /* init atomisp wdts */
1801 if (init_atomisp_wdts(isp) != 0)
1802 goto wdt_work_queue_fail;
1804 /* save the iunit context only once after all the values are init'ed. */
1805 atomisp_save_iunit_reg(isp);
1807 pm_runtime_put_noidle(&dev->dev);
1808 pm_runtime_allow(&dev->dev);
1810 hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);
1811 err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);
1813 dev_err(&dev->dev, "Failed to register reserved memory pool.\n");
1817 /* Init ISP memory management */
1820 err = devm_request_threaded_irq(&dev->dev, dev->irq,
1821 atomisp_isr, atomisp_isr_thread,
1822 IRQF_SHARED, "isp_irq", isp);
1824 dev_err(&dev->dev, "Failed to request irq (%d)\n", err);
1825 goto request_irq_fail;
1828 /* Load firmware into ISP memory */
1829 if (!defer_fw_load) {
1830 err = atomisp_css_load_firmware(isp);
1832 dev_err(&dev->dev, "Failed to init css.\n");
1836 dev_dbg(&dev->dev, "Skip css init.\n");
1838 /* Clear FW image from memory */
1839 release_firmware(isp->firmware);
1840 isp->firmware = NULL;
1841 isp->css_env.isp_css_fw.data = NULL;
1843 atomisp_drvfs_init(&dev->driver->driver, isp);
1848 devm_free_irq(&dev->dev, dev->irq, isp);
1851 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1853 destroy_workqueue(isp->wdt_work_queue);
1854 wdt_work_queue_fail:
1855 atomisp_acc_cleanup(isp);
1856 atomisp_unregister_entities(isp);
1857 register_entities_fail:
1858 atomisp_uninitialize_modules(isp);
1859 initialize_modules_fail:
1860 cpu_latency_qos_remove_request(&isp->pm_qos);
1861 atomisp_msi_irq_uninit(isp, dev);
1862 pci_disable_msi(dev);
1865 release_firmware(isp->firmware);
1868 * Switch off ISP, as keeping it powered on would prevent
1869 * reaching S0ix states.
1871 * The following lines have been copied from atomisp suspend path
1874 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1875 irq = irq & 1 << INTR_IIR;
1876 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1878 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1879 irq &= ~(1 << INTR_IER);
1880 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1882 atomisp_msi_irq_uninit(isp, dev);
1884 atomisp_ospm_dphy_down(isp);
1886 /* Address later when we worry about the ...field chips */
1887 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1888 dev_err(&dev->dev, "Failed to switch off ISP\n");
1890 atomisp_dev_alloc_fail:
1891 pcim_iounmap_regions(dev, 1 << ATOM_ISP_PCI_BAR);
1897 static void atomisp_pci_remove(struct pci_dev *dev)
1899 struct atomisp_device *isp = (struct atomisp_device *)
1900 pci_get_drvdata(dev);
1902 dev_info(&dev->dev, "Removing atomisp driver\n");
1904 atomisp_drvfs_exit();
1906 atomisp_acc_cleanup(isp);
1908 ia_css_unload_firmware();
1911 pm_runtime_forbid(&dev->dev);
1912 pm_runtime_get_noresume(&dev->dev);
1913 cpu_latency_qos_remove_request(&isp->pm_qos);
1915 atomisp_msi_irq_uninit(isp, dev);
1916 atomisp_unregister_entities(isp);
1918 destroy_workqueue(isp->wdt_work_queue);
1919 atomisp_file_input_cleanup(isp);
1921 release_firmware(isp->firmware);
1923 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1926 static const struct pci_device_id atomisp_pci_tbl[] = {
1928 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD)},
1929 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_1179)},
1930 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_117A)},
1932 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_BYT)},
1933 /* Anniedale (Merrifield+ / Moorefield) */
1934 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_ANN)},
1936 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_CHT)},
1940 MODULE_DEVICE_TABLE(pci, atomisp_pci_tbl);
1942 static const struct dev_pm_ops atomisp_pm_ops = {
1943 .runtime_suspend = atomisp_runtime_suspend,
1944 .runtime_resume = atomisp_runtime_resume,
1945 .suspend = atomisp_suspend,
1946 .resume = atomisp_resume,
1949 static struct pci_driver atomisp_pci_driver = {
1951 .pm = &atomisp_pm_ops,
1953 .name = "atomisp-isp2",
1954 .id_table = atomisp_pci_tbl,
1955 .probe = atomisp_pci_probe,
1956 .remove = atomisp_pci_remove,
1959 module_pci_driver(atomisp_pci_driver);
1961 MODULE_AUTHOR("Wen Wang <wen.w.wang@intel.com>");
1962 MODULE_AUTHOR("Xiaolin Zhang <xiaolin.zhang@intel.com>");
1963 MODULE_LICENSE("GPL");
1964 MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver");