1 // SPDX-License-Identifier: GPL-2.0
3 * Support for Medifield PNW Camera Imaging ISP subsystem.
5 * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
7 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License version
11 * 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/pm_qos.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
26 #include <linux/dmi.h>
27 #include <linux/interrupt.h>
29 #include <asm/iosf_mbi.h>
31 #include "../../include/linux/atomisp_gmin_platform.h"
33 #include "atomisp_cmd.h"
34 #include "atomisp_common.h"
35 #include "atomisp_fops.h"
36 #include "atomisp_file.h"
37 #include "atomisp_ioctl.h"
38 #include "atomisp_internal.h"
39 #include "atomisp_acc.h"
40 #include "atomisp-regs.h"
41 #include "atomisp_dfs_tables.h"
42 #include "atomisp_drvfs.h"
44 #include "atomisp_trace_event.h"
46 #include "sh_css_firmware.h"
48 #include "device_access.h"
50 /* Timeouts to wait for all subdevs to be registered */
51 #define SUBDEV_WAIT_TIMEOUT 50 /* ms */
52 #define SUBDEV_WAIT_TIMEOUT_MAX_COUNT 40 /* up to 2 seconds */
54 /* G-Min addition: pull this in from intel_mid_pm.h */
55 #define CSTATE_EXIT_LATENCY_C1 1
57 static uint skip_fwload;
58 module_param(skip_fwload, uint, 0644);
59 MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load");
61 /* set reserved memory pool size in page */
62 static unsigned int repool_pgnr = 32768;
63 module_param(repool_pgnr, uint, 0644);
64 MODULE_PARM_DESC(repool_pgnr,
65 "Set the reserved memory pool size in page (default:32768)");
67 /* set dynamic memory pool size in page */
68 unsigned int dypool_pgnr = UINT_MAX;
69 module_param(dypool_pgnr, uint, 0644);
70 MODULE_PARM_DESC(dypool_pgnr,
71 "Set the dynamic memory pool size in page (default: unlimited)");
73 bool dypool_enable = true;
74 module_param(dypool_enable, bool, 0644);
75 MODULE_PARM_DESC(dypool_enable,
76 "dynamic memory pool enable/disable (default:enabled)");
78 /* memory optimization: deferred firmware loading */
80 module_param(defer_fw_load, bool, 0644);
81 MODULE_PARM_DESC(defer_fw_load,
82 "Defer FW loading until device is opened (default:disable)");
84 /* cross componnet debug message flag */
86 module_param(dbg_level, int, 0644);
87 MODULE_PARM_DESC(dbg_level, "debug message level (default:0)");
89 /* log function switch */
91 module_param(dbg_func, int, 0644);
92 MODULE_PARM_DESC(dbg_func,
93 "log function switch non/trace_printk/printk (default:printk)");
96 module_param(mipicsi_flag, int, 0644);
97 MODULE_PARM_DESC(mipicsi_flag, "mipi csi compression predictor algorithm");
99 static char firmware_name[256];
100 module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
101 MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the default firmware name.");
103 /*set to 16x16 since this is the amount of lines and pixels the sensor
104 exports extra. If these are kept at the 10x8 that they were on, in yuv
105 downscaling modes incorrect resolutions where requested to the sensor
106 driver with strange outcomes as a result. The proper way tot do this
107 would be to have a list of tables the specify the sensor res, mipi rec,
108 output res, and isp output res. however since we do not have this yet,
109 the chosen solution is the next best thing. */
111 module_param(pad_w, int, 0644);
112 MODULE_PARM_DESC(pad_w, "extra data for ISP processing");
115 module_param(pad_h, int, 0644);
116 MODULE_PARM_DESC(pad_h, "extra data for ISP processing");
119 * FIXME: this is a hack to make easier to support ISP2401 variant.
120 * As a given system will either be ISP2401 or not, we can just use
121 * a boolean, in order to replace existing #ifdef ISP2401 everywhere.
123 * Once this driver gets into a better shape, however, the best would
124 * be to replace this to something stored inside atomisp allocated
127 bool atomisp_hw_is_isp2401;
129 /* Types of atomisp hardware */
130 #define HW_IS_ISP2400 0
131 #define HW_IS_ISP2401 1
133 struct device *atomisp_dev;
135 void __iomem *atomisp_io_base;
137 static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = {
139 .width = ISP_FREQ_RULE_ANY,
140 .height = ISP_FREQ_RULE_ANY,
141 .fps = ISP_FREQ_RULE_ANY,
142 .isp_freq = ISP_FREQ_400MHZ,
143 .run_mode = ATOMISP_RUN_MODE_VIDEO,
146 .width = ISP_FREQ_RULE_ANY,
147 .height = ISP_FREQ_RULE_ANY,
148 .fps = ISP_FREQ_RULE_ANY,
149 .isp_freq = ISP_FREQ_400MHZ,
150 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
153 .width = ISP_FREQ_RULE_ANY,
154 .height = ISP_FREQ_RULE_ANY,
155 .fps = ISP_FREQ_RULE_ANY,
156 .isp_freq = ISP_FREQ_400MHZ,
157 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
160 .width = ISP_FREQ_RULE_ANY,
161 .height = ISP_FREQ_RULE_ANY,
162 .fps = ISP_FREQ_RULE_ANY,
163 .isp_freq = ISP_FREQ_400MHZ,
164 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
167 .width = ISP_FREQ_RULE_ANY,
168 .height = ISP_FREQ_RULE_ANY,
169 .fps = ISP_FREQ_RULE_ANY,
170 .isp_freq = ISP_FREQ_457MHZ,
171 .run_mode = ATOMISP_RUN_MODE_SDV,
175 /* Merrifield and Moorefield DFS rules */
176 static const struct atomisp_dfs_config dfs_config_merr = {
177 .lowest_freq = ISP_FREQ_200MHZ,
178 .max_freq_at_vmin = ISP_FREQ_400MHZ,
179 .highest_freq = ISP_FREQ_457MHZ,
180 .dfs_table = dfs_rules_merr,
181 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr),
184 static const struct atomisp_freq_scaling_rule dfs_rules_merr_1179[] = {
186 .width = ISP_FREQ_RULE_ANY,
187 .height = ISP_FREQ_RULE_ANY,
188 .fps = ISP_FREQ_RULE_ANY,
189 .isp_freq = ISP_FREQ_400MHZ,
190 .run_mode = ATOMISP_RUN_MODE_VIDEO,
193 .width = ISP_FREQ_RULE_ANY,
194 .height = ISP_FREQ_RULE_ANY,
195 .fps = ISP_FREQ_RULE_ANY,
196 .isp_freq = ISP_FREQ_400MHZ,
197 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
200 .width = ISP_FREQ_RULE_ANY,
201 .height = ISP_FREQ_RULE_ANY,
202 .fps = ISP_FREQ_RULE_ANY,
203 .isp_freq = ISP_FREQ_400MHZ,
204 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
207 .width = ISP_FREQ_RULE_ANY,
208 .height = ISP_FREQ_RULE_ANY,
209 .fps = ISP_FREQ_RULE_ANY,
210 .isp_freq = ISP_FREQ_400MHZ,
211 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
214 .width = ISP_FREQ_RULE_ANY,
215 .height = ISP_FREQ_RULE_ANY,
216 .fps = ISP_FREQ_RULE_ANY,
217 .isp_freq = ISP_FREQ_400MHZ,
218 .run_mode = ATOMISP_RUN_MODE_SDV,
222 static const struct atomisp_dfs_config dfs_config_merr_1179 = {
223 .lowest_freq = ISP_FREQ_200MHZ,
224 .max_freq_at_vmin = ISP_FREQ_400MHZ,
225 .highest_freq = ISP_FREQ_400MHZ,
226 .dfs_table = dfs_rules_merr_1179,
227 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179),
230 static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = {
235 .isp_freq = ISP_FREQ_266MHZ,
236 .run_mode = ATOMISP_RUN_MODE_VIDEO,
242 .isp_freq = ISP_FREQ_266MHZ,
243 .run_mode = ATOMISP_RUN_MODE_VIDEO,
249 .isp_freq = ISP_FREQ_320MHZ,
250 .run_mode = ATOMISP_RUN_MODE_VIDEO,
256 .isp_freq = ISP_FREQ_320MHZ,
257 .run_mode = ATOMISP_RUN_MODE_VIDEO,
260 .width = ISP_FREQ_RULE_ANY,
261 .height = ISP_FREQ_RULE_ANY,
263 .isp_freq = ISP_FREQ_356MHZ,
264 .run_mode = ATOMISP_RUN_MODE_VIDEO,
267 .width = ISP_FREQ_RULE_ANY,
268 .height = ISP_FREQ_RULE_ANY,
269 .fps = ISP_FREQ_RULE_ANY,
270 .isp_freq = ISP_FREQ_200MHZ,
271 .run_mode = ATOMISP_RUN_MODE_VIDEO,
274 .width = ISP_FREQ_RULE_ANY,
275 .height = ISP_FREQ_RULE_ANY,
276 .fps = ISP_FREQ_RULE_ANY,
277 .isp_freq = ISP_FREQ_400MHZ,
278 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
281 .width = ISP_FREQ_RULE_ANY,
282 .height = ISP_FREQ_RULE_ANY,
283 .fps = ISP_FREQ_RULE_ANY,
284 .isp_freq = ISP_FREQ_400MHZ,
285 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
288 .width = ISP_FREQ_RULE_ANY,
289 .height = ISP_FREQ_RULE_ANY,
290 .fps = ISP_FREQ_RULE_ANY,
291 .isp_freq = ISP_FREQ_200MHZ,
292 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
295 .width = ISP_FREQ_RULE_ANY,
296 .height = ISP_FREQ_RULE_ANY,
297 .fps = ISP_FREQ_RULE_ANY,
298 .isp_freq = ISP_FREQ_400MHZ,
299 .run_mode = ATOMISP_RUN_MODE_SDV,
303 static struct atomisp_dfs_config dfs_config_merr_117a = {
304 .lowest_freq = ISP_FREQ_200MHZ,
305 .max_freq_at_vmin = ISP_FREQ_200MHZ,
306 .highest_freq = ISP_FREQ_400MHZ,
307 .dfs_table = dfs_rules_merr_117a,
308 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_117a),
311 static const struct atomisp_freq_scaling_rule dfs_rules_byt[] = {
313 .width = ISP_FREQ_RULE_ANY,
314 .height = ISP_FREQ_RULE_ANY,
315 .fps = ISP_FREQ_RULE_ANY,
316 .isp_freq = ISP_FREQ_400MHZ,
317 .run_mode = ATOMISP_RUN_MODE_VIDEO,
320 .width = ISP_FREQ_RULE_ANY,
321 .height = ISP_FREQ_RULE_ANY,
322 .fps = ISP_FREQ_RULE_ANY,
323 .isp_freq = ISP_FREQ_400MHZ,
324 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
327 .width = ISP_FREQ_RULE_ANY,
328 .height = ISP_FREQ_RULE_ANY,
329 .fps = ISP_FREQ_RULE_ANY,
330 .isp_freq = ISP_FREQ_400MHZ,
331 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
334 .width = ISP_FREQ_RULE_ANY,
335 .height = ISP_FREQ_RULE_ANY,
336 .fps = ISP_FREQ_RULE_ANY,
337 .isp_freq = ISP_FREQ_400MHZ,
338 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
341 .width = ISP_FREQ_RULE_ANY,
342 .height = ISP_FREQ_RULE_ANY,
343 .fps = ISP_FREQ_RULE_ANY,
344 .isp_freq = ISP_FREQ_400MHZ,
345 .run_mode = ATOMISP_RUN_MODE_SDV,
349 static const struct atomisp_dfs_config dfs_config_byt = {
350 .lowest_freq = ISP_FREQ_200MHZ,
351 .max_freq_at_vmin = ISP_FREQ_400MHZ,
352 .highest_freq = ISP_FREQ_400MHZ,
353 .dfs_table = dfs_rules_byt,
354 .dfs_table_size = ARRAY_SIZE(dfs_rules_byt),
357 static const struct atomisp_freq_scaling_rule dfs_rules_byt_cr[] = {
359 .width = ISP_FREQ_RULE_ANY,
360 .height = ISP_FREQ_RULE_ANY,
361 .fps = ISP_FREQ_RULE_ANY,
362 .isp_freq = ISP_FREQ_320MHZ,
363 .run_mode = ATOMISP_RUN_MODE_VIDEO,
366 .width = ISP_FREQ_RULE_ANY,
367 .height = ISP_FREQ_RULE_ANY,
368 .fps = ISP_FREQ_RULE_ANY,
369 .isp_freq = ISP_FREQ_320MHZ,
370 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
373 .width = ISP_FREQ_RULE_ANY,
374 .height = ISP_FREQ_RULE_ANY,
375 .fps = ISP_FREQ_RULE_ANY,
376 .isp_freq = ISP_FREQ_320MHZ,
377 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
380 .width = ISP_FREQ_RULE_ANY,
381 .height = ISP_FREQ_RULE_ANY,
382 .fps = ISP_FREQ_RULE_ANY,
383 .isp_freq = ISP_FREQ_320MHZ,
384 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
387 .width = ISP_FREQ_RULE_ANY,
388 .height = ISP_FREQ_RULE_ANY,
389 .fps = ISP_FREQ_RULE_ANY,
390 .isp_freq = ISP_FREQ_320MHZ,
391 .run_mode = ATOMISP_RUN_MODE_SDV,
397 * Disable this, as it is used only when this is true:
398 * INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) ||
399 * INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2))
400 * However, the original code is commented
402 static const struct atomisp_dfs_config dfs_config_byt_cr = {
403 .lowest_freq = ISP_FREQ_200MHZ,
404 .max_freq_at_vmin = ISP_FREQ_320MHZ,
405 .highest_freq = ISP_FREQ_320MHZ,
406 .dfs_table = dfs_rules_byt_cr,
407 .dfs_table_size = ARRAY_SIZE(dfs_rules_byt_cr),
411 static const struct atomisp_freq_scaling_rule dfs_rules_cht[] = {
413 .width = ISP_FREQ_RULE_ANY,
414 .height = ISP_FREQ_RULE_ANY,
415 .fps = ISP_FREQ_RULE_ANY,
416 .isp_freq = ISP_FREQ_320MHZ,
417 .run_mode = ATOMISP_RUN_MODE_VIDEO,
420 .width = ISP_FREQ_RULE_ANY,
421 .height = ISP_FREQ_RULE_ANY,
422 .fps = ISP_FREQ_RULE_ANY,
423 .isp_freq = ISP_FREQ_356MHZ,
424 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
427 .width = ISP_FREQ_RULE_ANY,
428 .height = ISP_FREQ_RULE_ANY,
429 .fps = ISP_FREQ_RULE_ANY,
430 .isp_freq = ISP_FREQ_320MHZ,
431 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
434 .width = ISP_FREQ_RULE_ANY,
435 .height = ISP_FREQ_RULE_ANY,
436 .fps = ISP_FREQ_RULE_ANY,
437 .isp_freq = ISP_FREQ_320MHZ,
438 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
443 .fps = ISP_FREQ_RULE_ANY,
444 .isp_freq = ISP_FREQ_320MHZ,
445 .run_mode = ATOMISP_RUN_MODE_SDV,
448 .width = ISP_FREQ_RULE_ANY,
449 .height = ISP_FREQ_RULE_ANY,
450 .fps = ISP_FREQ_RULE_ANY,
451 .isp_freq = ISP_FREQ_356MHZ,
452 .run_mode = ATOMISP_RUN_MODE_SDV,
456 static const struct atomisp_freq_scaling_rule dfs_rules_cht_soc[] = {
458 .width = ISP_FREQ_RULE_ANY,
459 .height = ISP_FREQ_RULE_ANY,
460 .fps = ISP_FREQ_RULE_ANY,
461 .isp_freq = ISP_FREQ_356MHZ,
462 .run_mode = ATOMISP_RUN_MODE_VIDEO,
465 .width = ISP_FREQ_RULE_ANY,
466 .height = ISP_FREQ_RULE_ANY,
467 .fps = ISP_FREQ_RULE_ANY,
468 .isp_freq = ISP_FREQ_356MHZ,
469 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
472 .width = ISP_FREQ_RULE_ANY,
473 .height = ISP_FREQ_RULE_ANY,
474 .fps = ISP_FREQ_RULE_ANY,
475 .isp_freq = ISP_FREQ_320MHZ,
476 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
479 .width = ISP_FREQ_RULE_ANY,
480 .height = ISP_FREQ_RULE_ANY,
481 .fps = ISP_FREQ_RULE_ANY,
482 .isp_freq = ISP_FREQ_320MHZ,
483 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
486 .width = ISP_FREQ_RULE_ANY,
487 .height = ISP_FREQ_RULE_ANY,
488 .fps = ISP_FREQ_RULE_ANY,
489 .isp_freq = ISP_FREQ_356MHZ,
490 .run_mode = ATOMISP_RUN_MODE_SDV,
494 static const struct atomisp_dfs_config dfs_config_cht = {
495 .lowest_freq = ISP_FREQ_100MHZ,
496 .max_freq_at_vmin = ISP_FREQ_356MHZ,
497 .highest_freq = ISP_FREQ_356MHZ,
498 .dfs_table = dfs_rules_cht,
499 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht),
502 /* This one should be visible also by atomisp_cmd.c */
503 const struct atomisp_dfs_config dfs_config_cht_soc = {
504 .lowest_freq = ISP_FREQ_100MHZ,
505 .max_freq_at_vmin = ISP_FREQ_356MHZ,
506 .highest_freq = ISP_FREQ_356MHZ,
507 .dfs_table = dfs_rules_cht_soc,
508 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc),
511 int atomisp_video_init(struct atomisp_video_pipe *video, const char *name)
514 const char *direction;
516 switch (video->type) {
517 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
518 direction = "output";
519 video->pad.flags = MEDIA_PAD_FL_SINK;
520 video->vdev.fops = &atomisp_fops;
521 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
523 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
525 video->pad.flags = MEDIA_PAD_FL_SOURCE;
526 video->vdev.fops = &atomisp_file_fops;
527 video->vdev.ioctl_ops = &atomisp_file_ioctl_ops;
533 ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad);
537 /* Initialize the video device. */
538 snprintf(video->vdev.name, sizeof(video->vdev.name),
539 "ATOMISP ISP %s %s", name, direction);
540 video->vdev.release = video_device_release_empty;
541 video_set_drvdata(&video->vdev, video->isp);
546 void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name)
548 video->vdev.fops = &atomisp_fops;
549 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
551 /* Initialize the video device. */
552 snprintf(video->vdev.name, sizeof(video->vdev.name),
553 "ATOMISP ISP %s", name);
554 video->vdev.release = video_device_release_empty;
555 video_set_drvdata(&video->vdev, video->isp);
558 void atomisp_video_unregister(struct atomisp_video_pipe *video)
560 if (video_is_registered(&video->vdev)) {
561 media_entity_cleanup(&video->vdev.entity);
562 video_unregister_device(&video->vdev);
566 void atomisp_acc_unregister(struct atomisp_acc_pipe *video)
568 if (video_is_registered(&video->vdev))
569 video_unregister_device(&video->vdev);
572 static int atomisp_save_iunit_reg(struct atomisp_device *isp)
574 struct pci_dev *dev = isp->pdev;
576 dev_dbg(isp->dev, "%s\n", __func__);
578 pci_read_config_word(dev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
579 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
580 pci_read_config_dword(dev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
581 pci_read_config_dword(dev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
582 pci_read_config_word(dev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
583 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
584 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL,
585 &isp->saved_regs.interrupt_control);
587 pci_read_config_dword(dev, MRFLD_PCI_PMCS,
588 &isp->saved_regs.pmcs);
589 /* Ensure read/write combining is enabled. */
590 pci_read_config_dword(dev, PCI_I_CONTROL,
591 &isp->saved_regs.i_control);
592 isp->saved_regs.i_control |=
593 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
594 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
595 pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
596 &isp->saved_regs.csi_access_viol);
597 pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
598 &isp->saved_regs.csi_rcomp_config);
600 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
601 * ANN/CHV: RCOMP updates do not happen when using CSI2+ path
602 * and sensor sending "continuous clock".
603 * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence
604 * is missed, and IUNIT can hang.
605 * For both issues, setting this bit is a workaround.
607 isp->saved_regs.csi_rcomp_config |=
608 MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
609 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
610 &isp->saved_regs.csi_afe_dly);
611 pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
612 &isp->saved_regs.csi_control);
613 if (isp->media_dev.hw_revision >=
614 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
615 isp->saved_regs.csi_control |=
616 MRFLD_PCI_CSI_CONTROL_PARPATHEN;
618 * On CHT CSI_READY bit should be enabled before stream on
620 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
621 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
622 isp->saved_regs.csi_control |=
623 MRFLD_PCI_CSI_CONTROL_CSI_READY;
624 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
625 &isp->saved_regs.csi_afe_rcomp_config);
626 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
627 &isp->saved_regs.csi_afe_hs_control);
628 pci_read_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
629 &isp->saved_regs.csi_deadline_control);
633 static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
635 struct pci_dev *dev = isp->pdev;
637 dev_dbg(isp->dev, "%s\n", __func__);
639 pci_write_config_word(dev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
640 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
641 isp->saved_regs.ispmmadr);
642 pci_write_config_dword(dev, PCI_MSI_CAPID, isp->saved_regs.msicap);
643 pci_write_config_dword(dev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
644 pci_write_config_word(dev, PCI_MSI_DATA, isp->saved_regs.msi_data);
645 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
646 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL,
647 isp->saved_regs.interrupt_control);
648 pci_write_config_dword(dev, PCI_I_CONTROL,
649 isp->saved_regs.i_control);
651 pci_write_config_dword(dev, MRFLD_PCI_PMCS,
652 isp->saved_regs.pmcs);
653 pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
654 isp->saved_regs.csi_access_viol);
655 pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
656 isp->saved_regs.csi_rcomp_config);
657 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
658 isp->saved_regs.csi_afe_dly);
659 pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
660 isp->saved_regs.csi_control);
661 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
662 isp->saved_regs.csi_afe_rcomp_config);
663 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
664 isp->saved_regs.csi_afe_hs_control);
665 pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
666 isp->saved_regs.csi_deadline_control);
669 * for MRFLD, Software/firmware needs to write a 1 to bit0
670 * of the register at CSI_RECEIVER_SELECTION_REG to enable
671 * SH CSI backend write 0 will enable Arasan CSI backend,
672 * which has bugs(like sighting:4567697 and 4567699) and
673 * will be removed in B0
675 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
679 static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
681 struct pci_dev *dev = isp->pdev;
685 spin_lock_irqsave(&isp->lock, flags);
686 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
687 spin_unlock_irqrestore(&isp->lock, flags);
688 dev_dbg(isp->dev, "<%s %d.\n", __func__, __LINE__);
692 * MRFLD HAS requirement: cannot power off i-unit if
693 * ISP has IRQ not serviced.
694 * So, here we need to check if there is any pending
695 * IRQ, if so, waiting for it to be served
697 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
698 irq = irq & 1 << INTR_IIR;
699 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
701 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
702 if (!(irq & (1 << INTR_IIR)))
705 atomisp_css2_hw_store_32(MRFLD_INTR_CLEAR_REG, 0xFFFFFFFF);
706 atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq);
709 "%s: fail to clear isp interrupt status reg=0x%x\n",
711 spin_unlock_irqrestore(&isp->lock, flags);
714 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
715 irq = irq & 1 << INTR_IIR;
716 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
718 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
719 if (!(irq & (1 << INTR_IIR))) {
720 atomisp_css2_hw_store_32(MRFLD_INTR_ENABLE_REG, 0x0);
724 "%s: error in iunit interrupt. status reg=0x%x\n",
726 spin_unlock_irqrestore(&isp->lock, flags);
732 * before powering off IUNIT, clear the pending interrupts
733 * and disable the interrupt. driver should avoid writing 0
734 * to IIR. It could block subsequent interrupt messages.
735 * HW sighting:4568410.
737 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
738 irq &= ~(1 << INTR_IER);
739 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
741 atomisp_msi_irq_uninit(isp, dev);
742 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
743 spin_unlock_irqrestore(&isp->lock, flags);
749 * WA for DDR DVFS enable/disable
750 * By default, ISP will force DDR DVFS 1600MHz before disable DVFS
752 static void punit_ddr_dvfs_enable(bool enable)
754 int door_bell = 1 << 8;
758 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
760 reg &= ~(MRFLD_BIT0 | MRFLD_BIT1);
762 reg |= (MRFLD_BIT1 | door_bell);
763 reg &= ~(MRFLD_BIT0);
765 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSDVFS, reg);
767 /* Check Req_ACK to see freq status, wait until door_bell is cleared */
768 while ((reg & door_bell) && max_wait--) {
769 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
770 usleep_range(100, 500);
774 pr_info("DDR DVFS, door bell is not cleared within 3ms\n");
777 static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable)
779 unsigned long timeout;
780 u32 val = enable ? MRFLD_ISPSSPM0_IUNIT_POWER_ON :
781 MRFLD_ISPSSPM0_IUNIT_POWER_OFF;
783 dev_dbg(isp->dev, "IUNIT power-%s.\n", enable ? "on" : "off");
786 if (IS_CHT && enable)
787 punit_ddr_dvfs_enable(true);
790 * FIXME:WA for ECS28A, with this sleep, CTS
791 * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort
792 * PASS, no impact on other platforms
794 if (IS_BYT && enable)
797 /* Write to ISPSSPM0 bit[1:0] to power on/off the IUNIT */
798 iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0,
799 val, MRFLD_ISPSSPM0_ISPSSC_MASK);
802 if (IS_CHT && !enable)
803 punit_ddr_dvfs_enable(true);
806 * There should be no IUNIT access while power-down is
807 * in progress. HW sighting: 4567865.
808 * Wait up to 50 ms for the IUNIT to shut down.
809 * And we do the same for power on.
811 timeout = jiffies + msecs_to_jiffies(50);
815 /* Wait until ISPSSPM0 bit[25:24] shows the right value */
816 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &tmp);
817 tmp = (tmp & MRFLD_ISPSSPM0_ISPSSC_MASK) >> MRFLD_ISPSSPM0_ISPSSS_OFFSET;
819 trace_ipu_cstate(enable);
823 if (time_after(jiffies, timeout))
826 /* FIXME: experienced value for delay */
827 usleep_range(100, 150);
833 dev_err(isp->dev, "IUNIT power-%s timeout.\n", enable ? "on" : "off");
837 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
838 int atomisp_mrfld_power_down(struct atomisp_device *isp)
841 // FIXME: at least with ISP2401, the code below causes the driver to break
842 // return atomisp_mrfld_power(isp, false);
845 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
846 int atomisp_mrfld_power_up(struct atomisp_device *isp)
849 // FIXME: at least with ISP2401, the code below causes the driver to break
850 // return atomisp_mrfld_power(isp, true);
853 int atomisp_runtime_suspend(struct device *dev)
855 struct atomisp_device *isp = (struct atomisp_device *)
856 dev_get_drvdata(dev);
859 ret = atomisp_mrfld_pre_power_down(isp);
863 /*Turn off the ISP d-phy*/
864 ret = atomisp_ospm_dphy_down(isp);
867 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
868 return atomisp_mrfld_power_down(isp);
871 int atomisp_runtime_resume(struct device *dev)
873 struct atomisp_device *isp = (struct atomisp_device *)
874 dev_get_drvdata(dev);
877 ret = atomisp_mrfld_power_up(isp);
881 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
882 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
883 /*Turn on ISP d-phy */
884 ret = atomisp_ospm_dphy_up(isp);
886 dev_err(isp->dev, "Failed to power up ISP!.\n");
891 /*restore register values for iUnit and iUnitPHY registers*/
892 if (isp->saved_regs.pcicmdsts)
893 atomisp_restore_iunit_reg(isp);
895 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
899 static int __maybe_unused atomisp_suspend(struct device *dev)
901 struct atomisp_device *isp = (struct atomisp_device *)
902 dev_get_drvdata(dev);
903 /* FIXME: only has one isp_subdev at present */
904 struct atomisp_sub_device *asd = &isp->asd[0];
909 * FIXME: Suspend is not supported by sensors. Abort if any video
912 if (atomisp_dev_users(isp))
915 spin_lock_irqsave(&isp->lock, flags);
916 if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) {
917 spin_unlock_irqrestore(&isp->lock, flags);
918 dev_err(isp->dev, "atomisp cannot suspend at this time.\n");
921 spin_unlock_irqrestore(&isp->lock, flags);
923 ret = atomisp_mrfld_pre_power_down(isp);
927 /*Turn off the ISP d-phy */
928 ret = atomisp_ospm_dphy_down(isp);
930 dev_err(isp->dev, "fail to power off ISP\n");
933 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
934 return atomisp_mrfld_power_down(isp);
937 static int __maybe_unused atomisp_resume(struct device *dev)
939 struct atomisp_device *isp = (struct atomisp_device *)
940 dev_get_drvdata(dev);
943 ret = atomisp_mrfld_power_up(isp);
947 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
949 /*Turn on ISP d-phy */
950 ret = atomisp_ospm_dphy_up(isp);
952 dev_err(isp->dev, "Failed to power up ISP!.\n");
956 /*restore register values for iUnit and iUnitPHY registers*/
957 if (isp->saved_regs.pcicmdsts)
958 atomisp_restore_iunit_reg(isp);
960 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
964 int atomisp_csi_lane_config(struct atomisp_device *isp)
966 static const struct {
968 u8 lanes[MRFLD_PORT_NUM];
970 /* Tangier/Merrifield available lane configurations */
971 { 0x00, { 4, 1, 0 } }, /* 00000 */
972 { 0x01, { 3, 1, 0 } }, /* 00001 */
973 { 0x02, { 2, 1, 0 } }, /* 00010 */
974 { 0x03, { 1, 1, 0 } }, /* 00011 */
975 { 0x04, { 2, 1, 2 } }, /* 00100 */
976 { 0x08, { 3, 1, 1 } }, /* 01000 */
977 { 0x09, { 2, 1, 1 } }, /* 01001 */
978 { 0x0a, { 1, 1, 1 } }, /* 01010 */
980 /* Anniedale/Moorefield only configurations */
981 { 0x10, { 4, 2, 0 } }, /* 10000 */
982 { 0x11, { 3, 2, 0 } }, /* 10001 */
983 { 0x12, { 2, 2, 0 } }, /* 10010 */
984 { 0x13, { 1, 2, 0 } }, /* 10011 */
985 { 0x14, { 2, 2, 2 } }, /* 10100 */
986 { 0x18, { 3, 2, 1 } }, /* 11000 */
987 { 0x19, { 2, 2, 1 } }, /* 11001 */
988 { 0x1a, { 1, 2, 1 } }, /* 11010 */
992 u8 sensor_lanes[MRFLD_PORT_NUM] = { 0 };
995 u32 port_config_mask;
996 int port3_lanes_shift;
998 if (isp->media_dev.hw_revision <
999 ATOMISP_HW_REVISION_ISP2401_LEGACY <<
1000 ATOMISP_HW_REVISION_SHIFT) {
1002 port_config_mask = MRFLD_PORT_CONFIG_MASK;
1003 port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT;
1005 /* Moorefield / Cherryview */
1006 port_config_mask = CHV_PORT_CONFIG_MASK;
1007 port3_lanes_shift = CHV_PORT3_LANES_SHIFT;
1010 if (isp->media_dev.hw_revision <
1011 ATOMISP_HW_REVISION_ISP2401 <<
1012 ATOMISP_HW_REVISION_SHIFT) {
1013 /* Merrifield / Moorefield legacy input system */
1014 nportconfigs = MRFLD_PORT_CONFIG_NUM;
1016 /* Moorefield / Cherryview new input system */
1017 nportconfigs = ARRAY_SIZE(portconfigs);
1020 for (i = 0; i < isp->input_cnt; i++) {
1021 struct camera_mipi_info *mipi_info;
1023 if (isp->inputs[i].type != RAW_CAMERA &&
1024 isp->inputs[i].type != SOC_CAMERA)
1027 mipi_info = atomisp_to_sensor_mipi_info(isp->inputs[i].camera);
1031 switch (mipi_info->port) {
1032 case ATOMISP_CAMERA_PORT_PRIMARY:
1033 sensor_lanes[0] = mipi_info->num_lanes;
1035 case ATOMISP_CAMERA_PORT_SECONDARY:
1036 sensor_lanes[1] = mipi_info->num_lanes;
1038 case ATOMISP_CAMERA_PORT_TERTIARY:
1039 sensor_lanes[2] = mipi_info->num_lanes;
1043 "%s: invalid port: %d for the %dth sensor\n",
1044 __func__, mipi_info->port, i);
1049 for (i = 0; i < nportconfigs; i++) {
1050 for (j = 0; j < MRFLD_PORT_NUM; j++)
1051 if (sensor_lanes[j] &&
1052 sensor_lanes[j] != portconfigs[i].lanes[j])
1055 if (j == MRFLD_PORT_NUM)
1056 break; /* Found matching setting */
1059 if (i >= nportconfigs) {
1061 "%s: could not find the CSI port setting for %d-%d-%d\n",
1063 sensor_lanes[0], sensor_lanes[1], sensor_lanes[2]);
1067 pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
1068 csi_control &= ~port_config_mask;
1069 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
1070 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
1071 | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
1072 | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
1073 | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
1074 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
1075 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
1077 pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
1080 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
1081 __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[1],
1082 portconfigs[i].lanes[2], csi_control);
1087 static int atomisp_subdev_probe(struct atomisp_device *isp)
1089 const struct atomisp_platform_data *pdata;
1090 struct intel_v4l2_subdev_table *subdevs;
1091 int ret, raw_index = -1, count;
1093 pdata = atomisp_get_platform_data();
1095 dev_err(isp->dev, "no platform data available\n");
1099 /* FIXME: should return -EPROBE_DEFER if not all subdevs were probed */
1100 for (count = 0; count < SUBDEV_WAIT_TIMEOUT_MAX_COUNT; count++) {
1101 int camera_count = 0;
1103 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
1104 if (subdevs->type == RAW_CAMERA ||
1105 subdevs->type == SOC_CAMERA)
1110 msleep(SUBDEV_WAIT_TIMEOUT);
1112 /* Wait more time to give more time for subdev init code to finish */
1113 msleep(5 * SUBDEV_WAIT_TIMEOUT);
1115 /* FIXME: should, instead, use I2C probe */
1117 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
1118 struct v4l2_subdev *subdev;
1119 struct i2c_board_info *board_info =
1120 &subdevs->v4l2_subdev.board_info;
1121 struct i2c_adapter *adapter =
1122 i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
1125 dev_info(isp->dev, "Probing Subdev %s\n", board_info->type);
1129 "Failed to find i2c adapter for subdev %s\n",
1134 /* In G-Min, the sensor devices will already be probed
1135 * (via ACPI) and registered, do not create new
1137 subdev = atomisp_gmin_find_subdev(adapter, board_info);
1139 dev_warn(isp->dev, "Subdev %s not found\n",
1143 ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev);
1145 dev_warn(isp->dev, "Subdev %s detection fail\n",
1151 dev_warn(isp->dev, "Subdev %s detection fail\n",
1156 dev_info(isp->dev, "Subdev %s successfully register\n",
1159 switch (subdevs->type) {
1161 dev_dbg(isp->dev, "raw_index: %d\n", raw_index);
1162 raw_index = isp->input_cnt;
1165 dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt);
1166 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1168 "too many atomisp inputs, ignored\n");
1172 isp->inputs[isp->input_cnt].type = subdevs->type;
1173 isp->inputs[isp->input_cnt].port = subdevs->port;
1174 isp->inputs[isp->input_cnt].camera = subdev;
1175 isp->inputs[isp->input_cnt].sensor_index = 0;
1177 * initialize the subdev frame size, then next we can
1178 * judge whether frame_size store effective value via
1181 isp->inputs[isp->input_cnt].frame_size.pixel_format = 0;
1182 isp->inputs[isp->input_cnt].camera_caps =
1183 atomisp_get_default_camera_caps();
1184 sensor_num = isp->inputs[isp->input_cnt]
1185 .camera_caps->sensor_num;
1187 for (i = 1; i < sensor_num; i++) {
1188 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1190 "atomisp inputs out of range\n");
1193 isp->inputs[isp->input_cnt] =
1194 isp->inputs[isp->input_cnt - 1];
1195 isp->inputs[isp->input_cnt].sensor_index = i;
1202 "too many atomisp motors, ignored %s\n",
1206 isp->motor = subdev;
1212 "too many atomisp flash devices, ignored %s\n",
1216 isp->flash = subdev;
1219 dev_dbg(isp->dev, "unknown subdev probed\n");
1225 * HACK: Currently VCM belongs to primary sensor only, but correct
1226 * approach must be to acquire from platform code which sensor
1229 if (isp->motor && raw_index >= 0)
1230 isp->inputs[raw_index].motor = isp->motor;
1232 /* Proceed even if no modules detected. For COS mode and no modules. */
1233 if (!isp->input_cnt)
1234 dev_warn(isp->dev, "no camera attached or fail to detect\n");
1236 dev_info(isp->dev, "detected %d camera sensors\n",
1239 return atomisp_csi_lane_config(isp);
1242 static void atomisp_unregister_entities(struct atomisp_device *isp)
1245 struct v4l2_subdev *sd, *next;
1247 for (i = 0; i < isp->num_of_streams; i++)
1248 atomisp_subdev_unregister_entities(&isp->asd[i]);
1249 atomisp_tpg_unregister_entities(&isp->tpg);
1250 atomisp_file_input_unregister_entities(&isp->file_dev);
1251 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1252 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1254 list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list)
1255 v4l2_device_unregister_subdev(sd);
1257 v4l2_device_unregister(&isp->v4l2_dev);
1258 media_device_unregister(&isp->media_dev);
1261 static int atomisp_register_entities(struct atomisp_device *isp)
1266 isp->media_dev.dev = isp->dev;
1268 strlcpy(isp->media_dev.model, "Intel Atom ISP",
1269 sizeof(isp->media_dev.model));
1271 media_device_init(&isp->media_dev);
1272 isp->v4l2_dev.mdev = &isp->media_dev;
1273 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1275 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1277 goto v4l2_device_failed;
1280 ret = atomisp_subdev_probe(isp);
1282 goto csi_and_subdev_probe_failed;
1284 /* Register internal entities */
1285 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) {
1286 ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i],
1292 dev_err(isp->dev, "failed to register the CSI port: %d\n", i);
1293 /* deregister all registered CSI ports */
1295 atomisp_mipi_csi2_unregister_entities(
1296 &isp->csi2_port[i]);
1298 goto csi_and_subdev_probe_failed;
1302 atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev);
1304 dev_err(isp->dev, "atomisp_file_input_register_entities\n");
1305 goto file_input_register_failed;
1308 ret = atomisp_tpg_register_entities(&isp->tpg, &isp->v4l2_dev);
1310 dev_err(isp->dev, "atomisp_tpg_register_entities\n");
1311 goto tpg_register_failed;
1314 for (i = 0; i < isp->num_of_streams; i++) {
1315 struct atomisp_sub_device *asd = &isp->asd[i];
1317 ret = atomisp_subdev_register_entities(asd, &isp->v4l2_dev);
1320 "atomisp_subdev_register_entities fail\n");
1322 atomisp_subdev_unregister_entities(
1324 goto subdev_register_failed;
1328 for (i = 0; i < isp->num_of_streams; i++) {
1329 struct atomisp_sub_device *asd = &isp->asd[i];
1331 init_completion(&asd->init_done);
1333 asd->delayed_init_workq =
1334 alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
1336 if (!asd->delayed_init_workq) {
1338 "Failed to initialize delayed init workq\n");
1342 destroy_workqueue(isp->asd[i - 1].
1343 delayed_init_workq);
1344 goto wq_alloc_failed;
1346 INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work);
1349 for (i = 0; i < isp->input_cnt; i++) {
1350 if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) {
1351 dev_err(isp->dev, "isp->inputs port %d not supported\n",
1352 isp->inputs[i].port);
1359 "FILE_INPUT enable, camera_cnt: %d\n", isp->input_cnt);
1360 isp->inputs[isp->input_cnt].type = FILE_INPUT;
1361 isp->inputs[isp->input_cnt].port = -1;
1362 isp->inputs[isp->input_cnt].camera_caps =
1363 atomisp_get_default_camera_caps();
1364 isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd;
1366 if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) {
1368 "TPG detected, camera_cnt: %d\n", isp->input_cnt);
1369 isp->inputs[isp->input_cnt].type = TEST_PATTERN;
1370 isp->inputs[isp->input_cnt].port = -1;
1371 isp->inputs[isp->input_cnt].camera_caps =
1372 atomisp_get_default_camera_caps();
1373 isp->inputs[isp->input_cnt++].camera = &isp->tpg.sd;
1375 dev_warn(isp->dev, "too many atomisp inputs, TPG ignored.\n");
1378 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1382 return media_device_register(&isp->media_dev);
1385 for (i = 0; i < isp->num_of_streams; i++)
1386 destroy_workqueue(isp->asd[i].
1387 delayed_init_workq);
1389 for (i = 0; i < isp->num_of_streams; i++)
1390 atomisp_subdev_unregister_entities(
1392 subdev_register_failed:
1393 atomisp_tpg_unregister_entities(&isp->tpg);
1394 tpg_register_failed:
1395 atomisp_file_input_unregister_entities(&isp->file_dev);
1396 file_input_register_failed:
1397 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1398 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1399 csi_and_subdev_probe_failed:
1400 v4l2_device_unregister(&isp->v4l2_dev);
1402 media_device_unregister(&isp->media_dev);
1403 media_device_cleanup(&isp->media_dev);
1407 static int atomisp_initialize_modules(struct atomisp_device *isp)
1411 ret = atomisp_mipi_csi2_init(isp);
1413 dev_err(isp->dev, "mipi csi2 initialization failed\n");
1414 goto error_mipi_csi2;
1417 ret = atomisp_file_input_init(isp);
1420 "file input device initialization failed\n");
1421 goto error_file_input;
1424 ret = atomisp_tpg_init(isp);
1426 dev_err(isp->dev, "tpg initialization failed\n");
1430 ret = atomisp_subdev_init(isp);
1432 dev_err(isp->dev, "ISP subdev initialization failed\n");
1433 goto error_isp_subdev;
1440 atomisp_tpg_cleanup(isp);
1442 atomisp_file_input_cleanup(isp);
1444 atomisp_mipi_csi2_cleanup(isp);
1448 static void atomisp_uninitialize_modules(struct atomisp_device *isp)
1450 atomisp_tpg_cleanup(isp);
1451 atomisp_file_input_cleanup(isp);
1452 atomisp_mipi_csi2_cleanup(isp);
1455 const struct firmware *
1456 atomisp_load_firmware(struct atomisp_device *isp)
1458 const struct firmware *fw;
1460 char *fw_path = NULL;
1465 if (firmware_name[0] != '\0') {
1466 fw_path = firmware_name;
1468 if ((isp->media_dev.hw_revision >> ATOMISP_HW_REVISION_SHIFT)
1469 == ATOMISP_HW_REVISION_ISP2401)
1470 fw_path = "shisp_2401a0_v21.bin";
1472 if (isp->media_dev.hw_revision ==
1473 ((ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT)
1474 | ATOMISP_HW_STEPPING_A0))
1475 fw_path = "shisp_2401a0_legacy_v21.bin";
1477 if (isp->media_dev.hw_revision ==
1478 ((ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT)
1479 | ATOMISP_HW_STEPPING_B0))
1480 fw_path = "shisp_2400b0_v21.bin";
1484 dev_err(isp->dev, "Unsupported hw_revision 0x%x\n",
1485 isp->media_dev.hw_revision);
1489 rc = request_firmware(&fw, fw_path, isp->dev);
1492 "atomisp: Error %d while requesting firmware %s\n",
1501 * Check for flags the driver was compiled with against the PCI
1502 * device. Always returns true on other than ISP 2400.
1504 static bool is_valid_device(struct pci_dev *dev,
1505 const struct pci_device_id *id)
1507 unsigned int a0_max_id = 0;
1509 const char *product;
1511 product = dmi_get_system_info(DMI_PRODUCT_NAME);
1513 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1514 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1515 a0_max_id = ATOMISP_PCI_REV_MRFLD_A0_MAX;
1516 atomisp_hw_is_isp2401 = false;
1517 name = "Merrifield";
1519 case ATOMISP_PCI_DEVICE_SOC_BYT:
1520 a0_max_id = ATOMISP_PCI_REV_BYT_A0_MAX;
1521 atomisp_hw_is_isp2401 = false;
1524 case ATOMISP_PCI_DEVICE_SOC_ANN:
1526 atomisp_hw_is_isp2401 = true;
1528 case ATOMISP_PCI_DEVICE_SOC_CHT:
1529 name = "Cherrytrail";
1530 atomisp_hw_is_isp2401 = true;
1533 dev_err(&dev->dev, "%s: unknown device ID %x04:%x04\n",
1534 product, id->vendor, id->device);
1538 if (dev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) {
1539 dev_err(&dev->dev, "%s revision %d is not unsupported\n",
1540 name, dev->revision);
1546 * remove the if once the driver become generic
1549 #if defined(ISP2400)
1550 if (atomisp_hw_is_isp2401) {
1551 dev_err(&dev->dev, "Support for %s (ISP2401) was disabled at compile time\n",
1556 if (!atomisp_hw_is_isp2401) {
1557 dev_err(&dev->dev, "Support for %s (ISP2400) was disabled at compile time\n",
1563 dev_info(&dev->dev, "Detected %s version %d (ISP240%c) on %s\n",
1564 name, dev->revision,
1565 atomisp_hw_is_isp2401 ? '1' : '0',
1571 static int init_atomisp_wdts(struct atomisp_device *isp)
1575 atomic_set(&isp->wdt_work_queued, 0);
1576 isp->wdt_work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1);
1577 if (!isp->wdt_work_queue) {
1578 dev_err(isp->dev, "Failed to initialize wdt work queue\n");
1582 INIT_WORK(&isp->wdt_work, atomisp_wdt_work);
1584 for (i = 0; i < isp->num_of_streams; i++) {
1585 struct atomisp_sub_device *asd = &isp->asd[i];
1587 if (!atomisp_hw_is_isp2401)
1588 timer_setup(&asd->wdt, atomisp_wdt, 0);
1590 timer_setup(&asd->video_out_capture.wdt,
1592 timer_setup(&asd->video_out_preview.wdt,
1594 timer_setup(&asd->video_out_vf.wdt, atomisp_wdt, 0);
1595 timer_setup(&asd->video_out_video_capture.wdt,
1604 #define ATOM_ISP_PCI_BAR 0
1606 static int atomisp_pci_probe(struct pci_dev *dev,
1607 const struct pci_device_id *id)
1609 const struct atomisp_platform_data *pdata;
1610 struct atomisp_device *isp;
1616 if (!is_valid_device(dev, id))
1619 /* Pointer to struct device. */
1620 atomisp_dev = &dev->dev;
1622 pdata = atomisp_get_platform_data();
1624 dev_warn(&dev->dev, "no platform data available\n");
1626 err = pcim_enable_device(dev);
1628 dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n",
1633 start = pci_resource_start(dev, ATOM_ISP_PCI_BAR);
1634 dev_dbg(&dev->dev, "start: 0x%x\n", start);
1636 err = pcim_iomap_regions(dev, 1 << ATOM_ISP_PCI_BAR, pci_name(dev));
1638 dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n",
1643 base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR];
1644 dev_dbg(&dev->dev, "base: %p\n", base);
1646 atomisp_io_base = base;
1648 dev_dbg(&dev->dev, "atomisp_io_base: %p\n", atomisp_io_base);
1650 isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL);
1653 goto atomisp_dev_alloc_fail;
1656 isp->dev = &dev->dev;
1657 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
1658 isp->saved_regs.ispmmadr = start;
1660 rt_mutex_init(&isp->mutex);
1661 mutex_init(&isp->streamoff_mutex);
1662 spin_lock_init(&isp->lock);
1664 /* This is not a true PCI device on SoC, so the delay is not needed. */
1665 isp->pdev->d3_delay = 0;
1667 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1668 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1669 isp->media_dev.hw_revision =
1670 (ATOMISP_HW_REVISION_ISP2400
1671 << ATOMISP_HW_REVISION_SHIFT) |
1672 ATOMISP_HW_STEPPING_B0;
1674 switch (id->device) {
1675 case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179:
1676 isp->dfs = &dfs_config_merr_1179;
1678 case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A:
1679 isp->dfs = &dfs_config_merr_117a;
1683 isp->dfs = &dfs_config_merr;
1686 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1688 case ATOMISP_PCI_DEVICE_SOC_BYT:
1689 isp->media_dev.hw_revision =
1690 (ATOMISP_HW_REVISION_ISP2400
1691 << ATOMISP_HW_REVISION_SHIFT) |
1692 ATOMISP_HW_STEPPING_B0;
1694 if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) ||
1695 INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) {
1696 isp->dfs = &dfs_config_byt_cr;
1697 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1701 isp->dfs = &dfs_config_byt;
1702 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1704 /* HPLL frequency is known to be device-specific, but we don't
1705 * have specs yet for exactly how it varies. Default to
1706 * BYT-CR but let provisioning set it via EFI variable */
1707 isp->hpll_freq = gmin_get_var_int(&dev->dev, false, "HpllFreq",
1711 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1712 * in power off. Set d3cold_delay to 0 since default 100ms is not
1715 isp->pdev->d3cold_delay = 0;
1717 case ATOMISP_PCI_DEVICE_SOC_ANN:
1718 isp->media_dev.hw_revision = (
1719 #ifdef ISP2401_NEW_INPUT_SYSTEM
1720 ATOMISP_HW_REVISION_ISP2401
1722 ATOMISP_HW_REVISION_ISP2401_LEGACY
1724 << ATOMISP_HW_REVISION_SHIFT);
1725 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1726 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1727 isp->dfs = &dfs_config_merr;
1728 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1730 case ATOMISP_PCI_DEVICE_SOC_CHT:
1731 isp->media_dev.hw_revision = (
1732 #ifdef ISP2401_NEW_INPUT_SYSTEM
1733 ATOMISP_HW_REVISION_ISP2401
1735 ATOMISP_HW_REVISION_ISP2401_LEGACY
1737 << ATOMISP_HW_REVISION_SHIFT);
1738 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1739 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1741 isp->dfs = &dfs_config_cht;
1742 isp->pdev->d3cold_delay = 0;
1744 iosf_mbi_read(CCK_PORT, MBI_REG_READ, CCK_FUSE_REG_0, &val);
1745 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
1747 isp->hpll_freq = HPLL_FREQ_800MHZ;
1750 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1753 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1756 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1758 "read HPLL from cck failed.default 1600MHz.\n");
1762 dev_err(&dev->dev, "un-supported IUNIT device\n");
1764 goto atomisp_dev_alloc_fail;
1767 dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n",
1770 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
1772 /* Load isp firmware from user space */
1773 if (!defer_fw_load) {
1774 isp->firmware = atomisp_load_firmware(isp);
1775 if (!isp->firmware) {
1777 dev_dbg(&dev->dev, "Firmware load failed\n");
1781 err = sh_css_check_firmware_version(isp->dev,
1782 isp->firmware->data);
1784 dev_dbg(&dev->dev, "Firmware version check failed\n");
1785 goto fw_validation_fail;
1788 dev_info(&dev->dev, "Firmware load will be deferred\n");
1791 pci_set_master(dev);
1792 pci_set_drvdata(dev, isp);
1794 err = pci_enable_msi(dev);
1796 dev_err(&dev->dev, "Failed to enable msi (%d)\n", err);
1797 goto enable_msi_fail;
1800 atomisp_msi_irq_init(isp, dev);
1802 cpu_latency_qos_add_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
1805 * for MRFLD, Software/firmware needs to write a 1 to bit 0 of
1806 * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI
1807 * backend write 0 will enable Arasan CSI backend, which has
1808 * bugs(like sighting:4567697 and 4567699) and will be removed
1811 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
1813 if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
1814 ATOMISP_PCI_DEVICE_SOC_MRFLD) {
1818 * Workaround for imbalance data eye issue which is observed
1821 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1823 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1824 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1825 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1826 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1827 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1828 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
1829 csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM <<
1830 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1831 (MRFLD_PCI_CSI2_HSRXCLKTRIM <<
1832 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1833 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
1834 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1835 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1839 err = atomisp_initialize_modules(isp);
1841 dev_err(&dev->dev, "atomisp_initialize_modules (%d)\n", err);
1842 goto initialize_modules_fail;
1845 err = atomisp_register_entities(isp);
1847 dev_err(&dev->dev, "atomisp_register_entities failed (%d)\n",
1849 goto register_entities_fail;
1851 err = atomisp_create_pads_links(isp);
1853 goto register_entities_fail;
1854 /* init atomisp wdts */
1855 if (init_atomisp_wdts(isp) != 0)
1856 goto wdt_work_queue_fail;
1858 /* save the iunit context only once after all the values are init'ed. */
1859 atomisp_save_iunit_reg(isp);
1861 pm_runtime_put_noidle(&dev->dev);
1862 pm_runtime_allow(&dev->dev);
1864 hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);
1865 err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);
1867 dev_err(&dev->dev, "Failed to register reserved memory pool.\n");
1871 /* Init ISP memory management */
1874 err = devm_request_threaded_irq(&dev->dev, dev->irq,
1875 atomisp_isr, atomisp_isr_thread,
1876 IRQF_SHARED, "isp_irq", isp);
1878 dev_err(&dev->dev, "Failed to request irq (%d)\n", err);
1879 goto request_irq_fail;
1882 /* Load firmware into ISP memory */
1883 if (!defer_fw_load) {
1884 err = atomisp_css_load_firmware(isp);
1886 dev_err(&dev->dev, "Failed to init css.\n");
1890 dev_dbg(&dev->dev, "Skip css init.\n");
1892 /* Clear FW image from memory */
1893 release_firmware(isp->firmware);
1894 isp->firmware = NULL;
1895 isp->css_env.isp_css_fw.data = NULL;
1897 atomisp_drvfs_init(&dev->driver->driver, isp);
1902 devm_free_irq(&dev->dev, dev->irq, isp);
1905 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1907 destroy_workqueue(isp->wdt_work_queue);
1908 wdt_work_queue_fail:
1909 atomisp_acc_cleanup(isp);
1910 atomisp_unregister_entities(isp);
1911 register_entities_fail:
1912 atomisp_uninitialize_modules(isp);
1913 initialize_modules_fail:
1914 cpu_latency_qos_remove_request(&isp->pm_qos);
1915 atomisp_msi_irq_uninit(isp, dev);
1916 pci_disable_msi(dev);
1919 release_firmware(isp->firmware);
1922 * Switch off ISP, as keeping it powered on would prevent
1923 * reaching S0ix states.
1925 * The following lines have been copied from atomisp suspend path
1928 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1929 irq = irq & 1 << INTR_IIR;
1930 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1932 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1933 irq &= ~(1 << INTR_IER);
1934 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1936 atomisp_msi_irq_uninit(isp, dev);
1938 atomisp_ospm_dphy_down(isp);
1940 /* Address later when we worry about the ...field chips */
1941 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1942 dev_err(&dev->dev, "Failed to switch off ISP\n");
1944 atomisp_dev_alloc_fail:
1945 pcim_iounmap_regions(dev, 1 << ATOM_ISP_PCI_BAR);
1951 static void atomisp_pci_remove(struct pci_dev *dev)
1953 struct atomisp_device *isp = (struct atomisp_device *)
1954 pci_get_drvdata(dev);
1956 dev_info(&dev->dev, "Removing atomisp driver\n");
1958 atomisp_drvfs_exit();
1960 atomisp_acc_cleanup(isp);
1962 ia_css_unload_firmware();
1965 pm_runtime_forbid(&dev->dev);
1966 pm_runtime_get_noresume(&dev->dev);
1967 cpu_latency_qos_remove_request(&isp->pm_qos);
1969 atomisp_msi_irq_uninit(isp, dev);
1970 atomisp_unregister_entities(isp);
1972 destroy_workqueue(isp->wdt_work_queue);
1973 atomisp_file_input_cleanup(isp);
1975 release_firmware(isp->firmware);
1977 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1980 static const struct pci_device_id atomisp_pci_tbl[] = {
1982 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD)},
1983 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_1179)},
1984 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_117A)},
1986 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_BYT)},
1987 /* Anniedale (Merrifield+ / Moorefield) */
1988 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_ANN)},
1990 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_CHT)},
1994 MODULE_DEVICE_TABLE(pci, atomisp_pci_tbl);
1996 static const struct dev_pm_ops atomisp_pm_ops = {
1997 .runtime_suspend = atomisp_runtime_suspend,
1998 .runtime_resume = atomisp_runtime_resume,
1999 .suspend = atomisp_suspend,
2000 .resume = atomisp_resume,
2003 static struct pci_driver atomisp_pci_driver = {
2005 .pm = &atomisp_pm_ops,
2007 .name = "atomisp-isp2",
2008 .id_table = atomisp_pci_tbl,
2009 .probe = atomisp_pci_probe,
2010 .remove = atomisp_pci_remove,
2013 module_pci_driver(atomisp_pci_driver);
2015 MODULE_AUTHOR("Wen Wang <wen.w.wang@intel.com>");
2016 MODULE_AUTHOR("Xiaolin Zhang <xiaolin.zhang@intel.com>");
2017 MODULE_LICENSE("GPL");
2018 MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver");