2 * Support for Medifield PNW Camera Imaging ISP subsystem.
4 * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
6 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/pm_qos.h>
23 #include <linux/timer.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
27 #include <asm/iosf_mbi.h>
29 #include "../../include/linux/atomisp_gmin_platform.h"
31 #include "atomisp_cmd.h"
32 #include "atomisp_common.h"
33 #include "atomisp_fops.h"
34 #include "atomisp_file.h"
35 #include "atomisp_ioctl.h"
36 #include "atomisp_internal.h"
37 #include "atomisp_acc.h"
38 #include "atomisp-regs.h"
39 #include "atomisp_dfs_tables.h"
40 #include "atomisp_drvfs.h"
42 #include "atomisp_trace_event.h"
44 #include "hrt/hive_isp_css_mm_hrt.h"
46 #include "device_access.h"
48 /* G-Min addition: pull this in from intel_mid_pm.h */
49 #define CSTATE_EXIT_LATENCY_C1 1
51 static uint skip_fwload;
52 module_param(skip_fwload, uint, 0644);
53 MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load");
55 /* set reserved memory pool size in page */
56 static unsigned int repool_pgnr;
57 module_param(repool_pgnr, uint, 0644);
58 MODULE_PARM_DESC(repool_pgnr,
59 "Set the reserved memory pool size in page (default:0)");
61 /* set dynamic memory pool size in page */
62 unsigned int dypool_pgnr = UINT_MAX;
63 module_param(dypool_pgnr, uint, 0644);
64 MODULE_PARM_DESC(dypool_pgnr,
65 "Set the dynamic memory pool size in page (default:0)");
68 module_param(dypool_enable, bool, 0644);
69 MODULE_PARM_DESC(dypool_enable,
70 "dynamic memory pool enable/disable (default:disable)");
72 /* memory optimization: deferred firmware loading */
74 module_param(defer_fw_load, bool, 0644);
75 MODULE_PARM_DESC(defer_fw_load,
76 "Defer FW loading until device is opened (default:disable)");
78 /* cross componnet debug message flag */
80 module_param(dbg_level, int, 0644);
81 MODULE_PARM_DESC(dbg_level, "debug message on/off (default:off)");
83 /* log function switch */
85 module_param(dbg_func, int, 0644);
86 MODULE_PARM_DESC(dbg_func,
87 "log function switch non/trace_printk/printk (default:printk)");
90 module_param(mipicsi_flag, int, 0644);
91 MODULE_PARM_DESC(mipicsi_flag, "mipi csi compression predictor algorithm");
93 /*set to 16x16 since this is the amount of lines and pixels the sensor
94 exports extra. If these are kept at the 10x8 that they were on, in yuv
95 downscaling modes incorrect resolutions where requested to the sensor
96 driver with strange outcomes as a result. The proper way tot do this
97 would be to have a list of tables the specify the sensor res, mipi rec,
98 output res, and isp output res. however since we do not have this yet,
99 the chosen solution is the next best thing. */
101 module_param(pad_w, int, 0644);
102 MODULE_PARM_DESC(pad_w, "extra data for ISP processing");
105 module_param(pad_h, int, 0644);
106 MODULE_PARM_DESC(pad_h, "extra data for ISP processing");
108 struct device *atomisp_dev;
110 void __iomem *atomisp_io_base;
112 int atomisp_video_init(struct atomisp_video_pipe *video, const char *name)
115 const char *direction;
117 switch (video->type) {
118 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
119 direction = "output";
120 video->pad.flags = MEDIA_PAD_FL_SINK;
121 video->vdev.fops = &atomisp_fops;
122 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
124 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
126 video->pad.flags = MEDIA_PAD_FL_SOURCE;
127 video->vdev.fops = &atomisp_file_fops;
128 video->vdev.ioctl_ops = &atomisp_file_ioctl_ops;
134 ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad);
138 /* Initialize the video device. */
139 snprintf(video->vdev.name, sizeof(video->vdev.name),
140 "ATOMISP ISP %s %s", name, direction);
141 video->vdev.release = video_device_release_empty;
142 video_set_drvdata(&video->vdev, video->isp);
147 void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name)
149 video->vdev.fops = &atomisp_fops;
150 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
152 /* Initialize the video device. */
153 snprintf(video->vdev.name, sizeof(video->vdev.name),
154 "ATOMISP ISP %s", name);
155 video->vdev.release = video_device_release_empty;
156 video_set_drvdata(&video->vdev, video->isp);
159 int atomisp_video_register(struct atomisp_video_pipe *video,
160 struct v4l2_device *vdev)
164 video->vdev.v4l2_dev = vdev;
166 ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1);
168 dev_err(vdev->dev, "%s: could not register video device (%d)\n",
174 int atomisp_acc_register(struct atomisp_acc_pipe *video,
175 struct v4l2_device *vdev)
179 video->vdev.v4l2_dev = vdev;
181 ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1);
183 dev_err(vdev->dev, "%s: could not register video device (%d)\n",
189 void atomisp_video_unregister(struct atomisp_video_pipe *video)
191 if (video_is_registered(&video->vdev)) {
192 media_entity_cleanup(&video->vdev.entity);
193 video_unregister_device(&video->vdev);
197 void atomisp_acc_unregister(struct atomisp_acc_pipe *video)
199 if (video_is_registered(&video->vdev))
200 video_unregister_device(&video->vdev);
203 static int atomisp_save_iunit_reg(struct atomisp_device *isp)
205 struct pci_dev *dev = isp->pdev;
207 dev_dbg(isp->dev, "%s\n", __func__);
209 pci_read_config_word(dev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
210 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
211 pci_read_config_dword(dev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
212 pci_read_config_dword(dev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
213 pci_read_config_word(dev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
214 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
215 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL,
216 &isp->saved_regs.interrupt_control);
218 pci_read_config_dword(dev, MRFLD_PCI_PMCS,
219 &isp->saved_regs.pmcs);
220 /* Ensure read/write combining is enabled. */
221 pci_read_config_dword(dev, PCI_I_CONTROL,
222 &isp->saved_regs.i_control);
223 isp->saved_regs.i_control |=
224 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
225 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
226 pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
227 &isp->saved_regs.csi_access_viol);
228 pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
229 &isp->saved_regs.csi_rcomp_config);
231 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
232 * ANN/CHV: RCOMP updates do not happen when using CSI2+ path
233 * and sensor sending "continuous clock".
234 * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence
235 * is missed, and IUNIT can hang.
236 * For both issues, setting this bit is a workaround.
238 isp->saved_regs.csi_rcomp_config |=
239 MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
240 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
241 &isp->saved_regs.csi_afe_dly);
242 pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
243 &isp->saved_regs.csi_control);
244 if (isp->media_dev.hw_revision >=
245 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
246 isp->saved_regs.csi_control |=
247 MRFLD_PCI_CSI_CONTROL_PARPATHEN;
249 * On CHT CSI_READY bit should be enabled before stream on
251 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
252 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
253 isp->saved_regs.csi_control |=
254 MRFLD_PCI_CSI_CONTROL_CSI_READY;
255 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
256 &isp->saved_regs.csi_afe_rcomp_config);
257 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
258 &isp->saved_regs.csi_afe_hs_control);
259 pci_read_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
260 &isp->saved_regs.csi_deadline_control);
264 static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
266 struct pci_dev *dev = isp->pdev;
268 dev_dbg(isp->dev, "%s\n", __func__);
270 pci_write_config_word(dev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
271 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
272 isp->saved_regs.ispmmadr);
273 pci_write_config_dword(dev, PCI_MSI_CAPID, isp->saved_regs.msicap);
274 pci_write_config_dword(dev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
275 pci_write_config_word(dev, PCI_MSI_DATA, isp->saved_regs.msi_data);
276 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
277 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL,
278 isp->saved_regs.interrupt_control);
279 pci_write_config_dword(dev, PCI_I_CONTROL,
280 isp->saved_regs.i_control);
282 pci_write_config_dword(dev, MRFLD_PCI_PMCS,
283 isp->saved_regs.pmcs);
284 pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
285 isp->saved_regs.csi_access_viol);
286 pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
287 isp->saved_regs.csi_rcomp_config);
288 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
289 isp->saved_regs.csi_afe_dly);
290 pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
291 isp->saved_regs.csi_control);
292 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
293 isp->saved_regs.csi_afe_rcomp_config);
294 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
295 isp->saved_regs.csi_afe_hs_control);
296 pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
297 isp->saved_regs.csi_deadline_control);
300 * for MRFLD, Software/firmware needs to write a 1 to bit0
301 * of the register at CSI_RECEIVER_SELECTION_REG to enable
302 * SH CSI backend write 0 will enable Arasan CSI backend,
303 * which has bugs(like sighting:4567697 and 4567699) and
304 * will be removed in B0
306 atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
310 static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
312 struct pci_dev *dev = isp->pdev;
316 spin_lock_irqsave(&isp->lock, flags);
317 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
318 spin_unlock_irqrestore(&isp->lock, flags);
319 dev_dbg(isp->dev, "<%s %d.\n", __func__, __LINE__);
323 * MRFLD HAS requirement: cannot power off i-unit if
324 * ISP has IRQ not serviced.
325 * So, here we need to check if there is any pending
326 * IRQ, if so, waiting for it to be served
328 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
329 irq = irq & 1 << INTR_IIR;
330 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
332 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
333 if (!(irq & (1 << INTR_IIR)))
336 atomisp_store_uint32(MRFLD_INTR_CLEAR_REG, 0xFFFFFFFF);
337 atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq);
340 "%s: fail to clear isp interrupt status reg=0x%x\n",
342 spin_unlock_irqrestore(&isp->lock, flags);
345 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
346 irq = irq & 1 << INTR_IIR;
347 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
349 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
350 if (!(irq & (1 << INTR_IIR))) {
351 atomisp_store_uint32(MRFLD_INTR_ENABLE_REG, 0x0);
355 "%s: error in iunit interrupt. status reg=0x%x\n",
357 spin_unlock_irqrestore(&isp->lock, flags);
363 * before powering off IUNIT, clear the pending interrupts
364 * and disable the interrupt. driver should avoid writing 0
365 * to IIR. It could block subsequent interrupt messages.
366 * HW sighting:4568410.
368 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
369 irq &= ~(1 << INTR_IER);
370 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
372 atomisp_msi_irq_uninit(isp, dev);
373 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
374 spin_unlock_irqrestore(&isp->lock, flags);
381 * WA for DDR DVFS enable/disable
382 * By default, ISP will force DDR DVFS 1600MHz before disable DVFS
384 static void punit_ddr_dvfs_enable(bool enable)
386 int door_bell = 1 << 8;
390 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
392 reg &= ~(MRFLD_BIT0 | MRFLD_BIT1);
394 reg |= (MRFLD_BIT1 | door_bell);
395 reg &= ~(MRFLD_BIT0);
397 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSDVFS, reg);
399 /* Check Req_ACK to see freq status, wait until door_bell is cleared */
400 while ((reg & door_bell) && max_wait--) {
401 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
402 usleep_range(100, 500);
406 pr_info("DDR DVFS, door bell is not cleared within 3ms\n");
409 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
410 int atomisp_mrfld_power_down(struct atomisp_device *isp)
412 unsigned long timeout;
415 /* writing 0x3 to ISPSSPM0 bit[1:0] to power off the IUNIT */
416 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value);
417 reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
418 reg_value |= MRFLD_ISPSSPM0_IUNIT_POWER_OFF;
419 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value);
423 punit_ddr_dvfs_enable(true);
426 * There should be no iunit access while power-down is
427 * in progress HW sighting: 4567865
428 * FIXME: msecs_to_jiffies(50)- experienced value
430 timeout = jiffies + msecs_to_jiffies(50);
432 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value);
433 dev_dbg(isp->dev, "power-off in progress, ISPSSPM0: 0x%x\n",
435 /* wait until ISPSSPM0 bit[25:24] shows 0x3 */
436 if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
437 MRFLD_ISPSSPM0_IUNIT_POWER_OFF) {
442 if (time_after(jiffies, timeout)) {
443 dev_err(isp->dev, "power-off iunit timeout.\n");
446 /* FIXME: experienced value for delay */
447 usleep_range(100, 150);
452 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
453 int atomisp_mrfld_power_up(struct atomisp_device *isp)
455 unsigned long timeout;
458 /*WA for PUNIT, if DVFS enabled, ISP timeout observed*/
460 punit_ddr_dvfs_enable(false);
463 * FIXME:WA for ECS28A, with this sleep, CTS
464 * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort
465 * PASS, no impact on other platforms
470 /* writing 0x0 to ISPSSPM0 bit[1:0] to power off the IUNIT */
471 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value);
472 reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
473 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value);
475 /* FIXME: experienced value for delay */
476 timeout = jiffies + msecs_to_jiffies(50);
478 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value);
479 dev_dbg(isp->dev, "power-on in progress, ISPSSPM0: 0x%x\n",
481 /* wait until ISPSSPM0 bit[25:24] shows 0x0 */
482 if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
483 MRFLD_ISPSSPM0_IUNIT_POWER_ON) {
488 if (time_after(jiffies, timeout)) {
489 dev_err(isp->dev, "power-on iunit timeout.\n");
492 /* FIXME: experienced value for delay */
493 usleep_range(100, 150);
497 int atomisp_runtime_suspend(struct device *dev)
499 struct atomisp_device *isp = (struct atomisp_device *)
500 dev_get_drvdata(dev);
503 ret = atomisp_mrfld_pre_power_down(isp);
507 /*Turn off the ISP d-phy*/
508 ret = atomisp_ospm_dphy_down(isp);
511 pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
512 return atomisp_mrfld_power_down(isp);
515 int atomisp_runtime_resume(struct device *dev)
517 struct atomisp_device *isp = (struct atomisp_device *)
518 dev_get_drvdata(dev);
521 ret = atomisp_mrfld_power_up(isp);
525 pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
526 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
527 /*Turn on ISP d-phy */
528 ret = atomisp_ospm_dphy_up(isp);
530 dev_err(isp->dev, "Failed to power up ISP!.\n");
535 /*restore register values for iUnit and iUnitPHY registers*/
536 if (isp->saved_regs.pcicmdsts)
537 atomisp_restore_iunit_reg(isp);
539 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
543 static int __maybe_unused atomisp_suspend(struct device *dev)
545 struct atomisp_device *isp = (struct atomisp_device *)
546 dev_get_drvdata(dev);
547 /* FIXME: only has one isp_subdev at present */
548 struct atomisp_sub_device *asd = &isp->asd[0];
553 * FIXME: Suspend is not supported by sensors. Abort if any video
556 if (atomisp_dev_users(isp))
559 spin_lock_irqsave(&isp->lock, flags);
560 if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) {
561 spin_unlock_irqrestore(&isp->lock, flags);
562 dev_err(isp->dev, "atomisp cannot suspend at this time.\n");
565 spin_unlock_irqrestore(&isp->lock, flags);
567 ret = atomisp_mrfld_pre_power_down(isp);
571 /*Turn off the ISP d-phy */
572 ret = atomisp_ospm_dphy_down(isp);
574 dev_err(isp->dev, "fail to power off ISP\n");
577 pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
578 return atomisp_mrfld_power_down(isp);
581 static int __maybe_unused atomisp_resume(struct device *dev)
583 struct atomisp_device *isp = (struct atomisp_device *)
584 dev_get_drvdata(dev);
587 ret = atomisp_mrfld_power_up(isp);
591 pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
593 /*Turn on ISP d-phy */
594 ret = atomisp_ospm_dphy_up(isp);
596 dev_err(isp->dev, "Failed to power up ISP!.\n");
600 /*restore register values for iUnit and iUnitPHY registers*/
601 if (isp->saved_regs.pcicmdsts)
602 atomisp_restore_iunit_reg(isp);
604 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
608 int atomisp_csi_lane_config(struct atomisp_device *isp)
610 static const struct {
612 u8 lanes[MRFLD_PORT_NUM];
614 /* Tangier/Merrifield available lane configurations */
615 { 0x00, { 4, 1, 0 } }, /* 00000 */
616 { 0x01, { 3, 1, 0 } }, /* 00001 */
617 { 0x02, { 2, 1, 0 } }, /* 00010 */
618 { 0x03, { 1, 1, 0 } }, /* 00011 */
619 { 0x04, { 2, 1, 2 } }, /* 00100 */
620 { 0x08, { 3, 1, 1 } }, /* 01000 */
621 { 0x09, { 2, 1, 1 } }, /* 01001 */
622 { 0x0a, { 1, 1, 1 } }, /* 01010 */
624 /* Anniedale/Moorefield only configurations */
625 { 0x10, { 4, 2, 0 } }, /* 10000 */
626 { 0x11, { 3, 2, 0 } }, /* 10001 */
627 { 0x12, { 2, 2, 0 } }, /* 10010 */
628 { 0x13, { 1, 2, 0 } }, /* 10011 */
629 { 0x14, { 2, 2, 2 } }, /* 10100 */
630 { 0x18, { 3, 2, 1 } }, /* 11000 */
631 { 0x19, { 2, 2, 1 } }, /* 11001 */
632 { 0x1a, { 1, 2, 1 } }, /* 11010 */
636 u8 sensor_lanes[MRFLD_PORT_NUM] = { 0 };
639 u32 port_config_mask;
640 int port3_lanes_shift;
642 if (isp->media_dev.hw_revision <
643 ATOMISP_HW_REVISION_ISP2401_LEGACY <<
644 ATOMISP_HW_REVISION_SHIFT) {
646 port_config_mask = MRFLD_PORT_CONFIG_MASK;
647 port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT;
649 /* Moorefield / Cherryview */
650 port_config_mask = CHV_PORT_CONFIG_MASK;
651 port3_lanes_shift = CHV_PORT3_LANES_SHIFT;
654 if (isp->media_dev.hw_revision <
655 ATOMISP_HW_REVISION_ISP2401 <<
656 ATOMISP_HW_REVISION_SHIFT) {
657 /* Merrifield / Moorefield legacy input system */
658 nportconfigs = MRFLD_PORT_CONFIG_NUM;
660 /* Moorefield / Cherryview new input system */
661 nportconfigs = ARRAY_SIZE(portconfigs);
664 for (i = 0; i < isp->input_cnt; i++) {
665 struct camera_mipi_info *mipi_info;
667 if (isp->inputs[i].type != RAW_CAMERA &&
668 isp->inputs[i].type != SOC_CAMERA)
671 mipi_info = atomisp_to_sensor_mipi_info(isp->inputs[i].camera);
675 switch (mipi_info->port) {
676 case ATOMISP_CAMERA_PORT_PRIMARY:
677 sensor_lanes[0] = mipi_info->num_lanes;
679 case ATOMISP_CAMERA_PORT_SECONDARY:
680 sensor_lanes[1] = mipi_info->num_lanes;
682 case ATOMISP_CAMERA_PORT_TERTIARY:
683 sensor_lanes[2] = mipi_info->num_lanes;
687 "%s: invalid port: %d for the %dth sensor\n",
688 __func__, mipi_info->port, i);
693 for (i = 0; i < nportconfigs; i++) {
694 for (j = 0; j < MRFLD_PORT_NUM; j++)
695 if (sensor_lanes[j] &&
696 sensor_lanes[j] != portconfigs[i].lanes[j])
699 if (j == MRFLD_PORT_NUM)
700 break; /* Found matching setting */
703 if (i >= nportconfigs) {
705 "%s: could not find the CSI port setting for %d-%d-%d\n",
707 sensor_lanes[0], sensor_lanes[1], sensor_lanes[2]);
711 pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
712 csi_control &= ~port_config_mask;
713 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
714 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
715 | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
716 | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
717 | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
718 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
719 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
721 pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
724 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
725 __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[1],
726 portconfigs[i].lanes[2], csi_control);
731 static int atomisp_subdev_probe(struct atomisp_device *isp)
733 const struct atomisp_platform_data *pdata;
734 struct intel_v4l2_subdev_table *subdevs;
735 int ret, raw_index = -1;
737 pdata = atomisp_get_platform_data();
739 dev_err(isp->dev, "no platform data available\n");
743 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
744 struct v4l2_subdev *subdev;
745 struct i2c_board_info *board_info =
746 &subdevs->v4l2_subdev.board_info;
747 struct i2c_adapter *adapter =
748 i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
751 if (adapter == NULL) {
753 "Failed to find i2c adapter for subdev %s\n",
758 /* In G-Min, the sensor devices will already be probed
759 * (via ACPI) and registered, do not create new
761 subdev = atomisp_gmin_find_subdev(adapter, board_info);
762 ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev);
764 dev_warn(isp->dev, "Subdev %s detection fail\n",
769 if (subdev == NULL) {
770 dev_warn(isp->dev, "Subdev %s detection fail\n",
775 dev_info(isp->dev, "Subdev %s successfully register\n",
778 switch (subdevs->type) {
780 raw_index = isp->input_cnt;
781 dev_dbg(isp->dev, "raw_index: %d\n", raw_index);
783 dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt);
784 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
786 "too many atomisp inputs, ignored\n");
790 isp->inputs[isp->input_cnt].type = subdevs->type;
791 isp->inputs[isp->input_cnt].port = subdevs->port;
792 isp->inputs[isp->input_cnt].camera = subdev;
793 isp->inputs[isp->input_cnt].sensor_index = 0;
795 * initialize the subdev frame size, then next we can
796 * judge whether frame_size store effective value via
799 isp->inputs[isp->input_cnt].frame_size.pixel_format = 0;
800 isp->inputs[isp->input_cnt].camera_caps =
801 atomisp_get_default_camera_caps();
802 sensor_num = isp->inputs[isp->input_cnt]
803 .camera_caps->sensor_num;
805 for (i = 1; i < sensor_num; i++) {
806 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
808 "atomisp inputs out of range\n");
811 isp->inputs[isp->input_cnt] =
812 isp->inputs[isp->input_cnt - 1];
813 isp->inputs[isp->input_cnt].sensor_index = i;
825 dev_dbg(isp->dev, "unknown subdev probed\n");
832 * HACK: Currently VCM belongs to primary sensor only, but correct
833 * approach must be to acquire from platform code which sensor
836 if (isp->motor && raw_index >= 0)
837 isp->inputs[raw_index].motor = isp->motor;
839 /* Proceed even if no modules detected. For COS mode and no modules. */
840 if (!isp->inputs[0].camera)
841 dev_warn(isp->dev, "no camera attached or fail to detect\n");
843 return atomisp_csi_lane_config(isp);
846 static void atomisp_unregister_entities(struct atomisp_device *isp)
849 struct v4l2_subdev *sd, *next;
851 for (i = 0; i < isp->num_of_streams; i++)
852 atomisp_subdev_unregister_entities(&isp->asd[i]);
853 atomisp_tpg_unregister_entities(&isp->tpg);
854 atomisp_file_input_unregister_entities(&isp->file_dev);
855 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
856 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
858 list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list)
859 v4l2_device_unregister_subdev(sd);
861 v4l2_device_unregister(&isp->v4l2_dev);
862 media_device_unregister(&isp->media_dev);
865 static int atomisp_register_entities(struct atomisp_device *isp)
870 isp->media_dev.dev = isp->dev;
872 strlcpy(isp->media_dev.model, "Intel Atom ISP",
873 sizeof(isp->media_dev.model));
875 media_device_init(&isp->media_dev);
876 isp->v4l2_dev.mdev = &isp->media_dev;
877 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
879 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
881 goto v4l2_device_failed;
884 ret = atomisp_subdev_probe(isp);
886 goto csi_and_subdev_probe_failed;
888 /* Register internal entities */
889 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) {
890 ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i],
896 dev_err(isp->dev, "failed to register the CSI port: %d\n", i);
897 /* deregister all registered CSI ports */
899 atomisp_mipi_csi2_unregister_entities(
902 goto csi_and_subdev_probe_failed;
906 atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev);
908 dev_err(isp->dev, "atomisp_file_input_register_entities\n");
909 goto file_input_register_failed;
912 ret = atomisp_tpg_register_entities(&isp->tpg, &isp->v4l2_dev);
914 dev_err(isp->dev, "atomisp_tpg_register_entities\n");
915 goto tpg_register_failed;
918 for (i = 0; i < isp->num_of_streams; i++) {
919 struct atomisp_sub_device *asd = &isp->asd[i];
921 ret = atomisp_subdev_register_entities(asd, &isp->v4l2_dev);
924 "atomisp_subdev_register_entities fail\n");
926 atomisp_subdev_unregister_entities(
928 goto subdev_register_failed;
932 for (i = 0; i < isp->num_of_streams; i++) {
933 struct atomisp_sub_device *asd = &isp->asd[i];
935 init_completion(&asd->init_done);
937 asd->delayed_init_workq =
938 alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
940 if (asd->delayed_init_workq == NULL) {
942 "Failed to initialize delayed init workq\n");
946 destroy_workqueue(isp->asd[i - 1].
948 goto wq_alloc_failed;
950 INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work);
953 for (i = 0; i < isp->input_cnt; i++) {
954 if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) {
955 dev_err(isp->dev, "isp->inputs port %d not supported\n",
956 isp->inputs[i].port);
963 "FILE_INPUT enable, camera_cnt: %d\n", isp->input_cnt);
964 isp->inputs[isp->input_cnt].type = FILE_INPUT;
965 isp->inputs[isp->input_cnt].port = -1;
966 isp->inputs[isp->input_cnt].camera_caps =
967 atomisp_get_default_camera_caps();
968 isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd;
970 if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) {
972 "TPG detected, camera_cnt: %d\n", isp->input_cnt);
973 isp->inputs[isp->input_cnt].type = TEST_PATTERN;
974 isp->inputs[isp->input_cnt].port = -1;
975 isp->inputs[isp->input_cnt].camera_caps =
976 atomisp_get_default_camera_caps();
977 isp->inputs[isp->input_cnt++].camera = &isp->tpg.sd;
979 dev_warn(isp->dev, "too many atomisp inputs, TPG ignored.\n");
982 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
986 return media_device_register(&isp->media_dev);
989 for (i = 0; i < isp->num_of_streams; i++)
990 destroy_workqueue(isp->asd[i].
993 for (i = 0; i < isp->num_of_streams; i++)
994 atomisp_subdev_unregister_entities(
996 subdev_register_failed:
997 atomisp_tpg_unregister_entities(&isp->tpg);
999 atomisp_file_input_unregister_entities(&isp->file_dev);
1000 file_input_register_failed:
1001 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1002 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1003 csi_and_subdev_probe_failed:
1004 v4l2_device_unregister(&isp->v4l2_dev);
1006 media_device_unregister(&isp->media_dev);
1007 media_device_cleanup(&isp->media_dev);
1011 static int atomisp_initialize_modules(struct atomisp_device *isp)
1015 ret = atomisp_mipi_csi2_init(isp);
1017 dev_err(isp->dev, "mipi csi2 initialization failed\n");
1018 goto error_mipi_csi2;
1021 ret = atomisp_file_input_init(isp);
1024 "file input device initialization failed\n");
1025 goto error_file_input;
1028 ret = atomisp_tpg_init(isp);
1030 dev_err(isp->dev, "tpg initialization failed\n");
1034 ret = atomisp_subdev_init(isp);
1036 dev_err(isp->dev, "ISP subdev initialization failed\n");
1037 goto error_isp_subdev;
1045 atomisp_tpg_cleanup(isp);
1047 atomisp_file_input_cleanup(isp);
1049 atomisp_mipi_csi2_cleanup(isp);
1053 static void atomisp_uninitialize_modules(struct atomisp_device *isp)
1055 atomisp_tpg_cleanup(isp);
1056 atomisp_file_input_cleanup(isp);
1057 atomisp_mipi_csi2_cleanup(isp);
1060 const struct firmware *
1061 atomisp_load_firmware(struct atomisp_device *isp)
1063 const struct firmware *fw;
1065 char *fw_path = NULL;
1070 if (isp->media_dev.hw_revision ==
1071 ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT)
1072 | ATOMISP_HW_STEPPING_A0))
1073 fw_path = "shisp_2401a0_v21.bin";
1075 if (isp->media_dev.hw_revision ==
1076 ((ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT)
1077 | ATOMISP_HW_STEPPING_A0))
1078 fw_path = "shisp_2401a0_legacy_v21.bin";
1080 if (isp->media_dev.hw_revision ==
1081 ((ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT)
1082 | ATOMISP_HW_STEPPING_B0))
1083 fw_path = "shisp_2400b0_v21.bin";
1086 dev_err(isp->dev, "Unsupported hw_revision 0x%x\n",
1087 isp->media_dev.hw_revision);
1091 rc = request_firmware(&fw, fw_path, isp->dev);
1094 "atomisp: Error %d while requesting firmware %s\n",
1103 * Check for flags the driver was compiled with against the PCI
1104 * device. Always returns true on other than ISP 2400.
1106 static bool is_valid_device(struct pci_dev *dev,
1107 const struct pci_device_id *id)
1109 unsigned int a0_max_id;
1111 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1112 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1113 a0_max_id = ATOMISP_PCI_REV_MRFLD_A0_MAX;
1115 case ATOMISP_PCI_DEVICE_SOC_BYT:
1116 a0_max_id = ATOMISP_PCI_REV_BYT_A0_MAX;
1122 return dev->revision > a0_max_id;
1125 static int init_atomisp_wdts(struct atomisp_device *isp)
1129 atomic_set(&isp->wdt_work_queued, 0);
1130 isp->wdt_work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1);
1131 if (isp->wdt_work_queue == NULL) {
1132 dev_err(isp->dev, "Failed to initialize wdt work queue\n");
1136 INIT_WORK(&isp->wdt_work, atomisp_wdt_work);
1138 for (i = 0; i < isp->num_of_streams; i++) {
1139 struct atomisp_sub_device *asd = &isp->asd[i];
1141 timer_setup(&asd->wdt, atomisp_wdt, 0);
1143 timer_setup(&asd->video_out_capture.wdt, atomisp_wdt, 0);
1144 timer_setup(&asd->video_out_preview.wdt, atomisp_wdt, 0);
1145 timer_setup(&asd->video_out_vf.wdt, atomisp_wdt, 0);
1146 timer_setup(&asd->video_out_video_capture.wdt, atomisp_wdt, 0);
1154 #define ATOM_ISP_PCI_BAR 0
1156 static int atomisp_pci_probe(struct pci_dev *dev,
1157 const struct pci_device_id *id)
1159 const struct atomisp_platform_data *pdata;
1160 struct atomisp_device *isp;
1167 dev_err(&dev->dev, "atomisp: error device ptr\n");
1171 if (!is_valid_device(dev, id))
1173 /* Pointer to struct device. */
1174 atomisp_dev = &dev->dev;
1176 pdata = atomisp_get_platform_data();
1178 dev_warn(&dev->dev, "no platform data available\n");
1180 err = pcim_enable_device(dev);
1182 dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n",
1187 start = pci_resource_start(dev, ATOM_ISP_PCI_BAR);
1188 dev_dbg(&dev->dev, "start: 0x%x\n", start);
1190 err = pcim_iomap_regions(dev, 1 << ATOM_ISP_PCI_BAR, pci_name(dev));
1192 dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n",
1197 base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR];
1198 dev_dbg(&dev->dev, "base: %p\n", base);
1200 atomisp_io_base = base;
1202 dev_dbg(&dev->dev, "atomisp_io_base: %p\n", atomisp_io_base);
1204 isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL);
1206 dev_err(&dev->dev, "Failed to alloc CI ISP structure\n");
1210 isp->dev = &dev->dev;
1211 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
1212 isp->saved_regs.ispmmadr = start;
1214 rt_mutex_init(&isp->mutex);
1215 mutex_init(&isp->streamoff_mutex);
1216 spin_lock_init(&isp->lock);
1218 /* This is not a true PCI device on SoC, so the delay is not needed. */
1219 isp->pdev->d3_delay = 0;
1221 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1222 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1223 isp->media_dev.hw_revision =
1224 (ATOMISP_HW_REVISION_ISP2400
1225 << ATOMISP_HW_REVISION_SHIFT) |
1226 ATOMISP_HW_STEPPING_B0;
1228 switch (id->device) {
1229 case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179:
1230 isp->dfs = &dfs_config_merr_1179;
1232 case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A:
1233 isp->dfs = &dfs_config_merr_117a;
1236 isp->dfs = &dfs_config_merr;
1239 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1241 case ATOMISP_PCI_DEVICE_SOC_BYT:
1242 isp->media_dev.hw_revision =
1243 (ATOMISP_HW_REVISION_ISP2400
1244 << ATOMISP_HW_REVISION_SHIFT) |
1245 ATOMISP_HW_STEPPING_B0;
1247 if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) ||
1248 INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) {
1249 isp->dfs = &dfs_config_byt_cr;
1250 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1254 isp->dfs = &dfs_config_byt;
1255 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1257 /* HPLL frequency is known to be device-specific, but we don't
1258 * have specs yet for exactly how it varies. Default to
1259 * BYT-CR but let provisioning set it via EFI variable */
1260 isp->hpll_freq = gmin_get_var_int(&dev->dev, "HpllFreq",
1264 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1265 * in power off. Set d3cold_delay to 0 since default 100ms is not
1268 isp->pdev->d3cold_delay = 0;
1270 case ATOMISP_PCI_DEVICE_SOC_ANN:
1271 isp->media_dev.hw_revision = (
1272 #ifdef ISP2401_NEW_INPUT_SYSTEM
1273 ATOMISP_HW_REVISION_ISP2401
1275 ATOMISP_HW_REVISION_ISP2401_LEGACY
1277 << ATOMISP_HW_REVISION_SHIFT);
1278 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1279 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1280 isp->dfs = &dfs_config_merr;
1281 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1283 case ATOMISP_PCI_DEVICE_SOC_CHT:
1284 isp->media_dev.hw_revision = (
1285 #ifdef ISP2401_NEW_INPUT_SYSTEM
1286 ATOMISP_HW_REVISION_ISP2401
1288 ATOMISP_HW_REVISION_ISP2401_LEGACY
1290 << ATOMISP_HW_REVISION_SHIFT);
1291 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1292 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1294 isp->dfs = &dfs_config_cht;
1295 isp->pdev->d3cold_delay = 0;
1297 iosf_mbi_read(CCK_PORT, MBI_REG_READ, CCK_FUSE_REG_0, &val);
1298 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
1300 isp->hpll_freq = HPLL_FREQ_800MHZ;
1303 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1306 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1309 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1311 "read HPLL from cck failed.default 1600MHz.\n");
1315 dev_err(&dev->dev, "un-supported IUNIT device\n");
1319 dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n",
1322 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
1324 /* Load isp firmware from user space */
1325 if (!defer_fw_load) {
1326 isp->firmware = atomisp_load_firmware(isp);
1327 if (!isp->firmware) {
1332 err = atomisp_css_check_firmware_version(isp);
1334 dev_dbg(&dev->dev, "Firmware version check failed\n");
1335 goto fw_validation_fail;
1339 pci_set_master(dev);
1340 pci_set_drvdata(dev, isp);
1342 err = pci_enable_msi(dev);
1344 dev_err(&dev->dev, "Failed to enable msi (%d)\n", err);
1345 goto enable_msi_fail;
1348 atomisp_msi_irq_init(isp, dev);
1350 pm_qos_add_request(&isp->pm_qos, PM_QOS_CPU_DMA_LATENCY,
1351 PM_QOS_DEFAULT_VALUE);
1354 * for MRFLD, Software/firmware needs to write a 1 to bit 0 of
1355 * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI
1356 * backend write 0 will enable Arasan CSI backend, which has
1357 * bugs(like sighting:4567697 and 4567699) and will be removed
1360 atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
1362 if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
1363 ATOMISP_PCI_DEVICE_SOC_MRFLD) {
1367 * Workaround for imbalance data eye issue which is observed
1370 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1372 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1373 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1374 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1375 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1376 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1377 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
1378 csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM <<
1379 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1380 (MRFLD_PCI_CSI2_HSRXCLKTRIM <<
1381 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1382 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
1383 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1384 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1388 err = atomisp_initialize_modules(isp);
1390 dev_err(&dev->dev, "atomisp_initialize_modules (%d)\n", err);
1391 goto initialize_modules_fail;
1394 err = atomisp_register_entities(isp);
1396 dev_err(&dev->dev, "atomisp_register_entities failed (%d)\n",
1398 goto register_entities_fail;
1400 err = atomisp_create_pads_links(isp);
1402 goto register_entities_fail;
1403 /* init atomisp wdts */
1404 if (init_atomisp_wdts(isp) != 0)
1405 goto wdt_work_queue_fail;
1407 /* save the iunit context only once after all the values are init'ed. */
1408 atomisp_save_iunit_reg(isp);
1410 pm_runtime_put_noidle(&dev->dev);
1411 pm_runtime_allow(&dev->dev);
1413 hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);
1414 err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);
1416 dev_err(&dev->dev, "Failed to register reserved memory pool.\n");
1420 /* Init ISP memory management */
1423 err = devm_request_threaded_irq(&dev->dev, dev->irq,
1424 atomisp_isr, atomisp_isr_thread,
1425 IRQF_SHARED, "isp_irq", isp);
1427 dev_err(&dev->dev, "Failed to request irq (%d)\n", err);
1428 goto request_irq_fail;
1431 /* Load firmware into ISP memory */
1432 if (!defer_fw_load) {
1433 err = atomisp_css_load_firmware(isp);
1435 dev_err(&dev->dev, "Failed to init css.\n");
1439 dev_dbg(&dev->dev, "Skip css init.\n");
1441 /* Clear FW image from memory */
1442 release_firmware(isp->firmware);
1443 isp->firmware = NULL;
1444 isp->css_env.isp_css_fw.data = NULL;
1446 atomisp_drvfs_init(&dev->driver->driver, isp);
1451 devm_free_irq(&dev->dev, dev->irq, isp);
1454 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1456 destroy_workqueue(isp->wdt_work_queue);
1457 wdt_work_queue_fail:
1458 atomisp_acc_cleanup(isp);
1459 atomisp_unregister_entities(isp);
1460 register_entities_fail:
1461 atomisp_uninitialize_modules(isp);
1462 initialize_modules_fail:
1463 pm_qos_remove_request(&isp->pm_qos);
1464 atomisp_msi_irq_uninit(isp, dev);
1467 release_firmware(isp->firmware);
1470 * Switch off ISP, as keeping it powered on would prevent
1471 * reaching S0ix states.
1473 * The following lines have been copied from atomisp suspend path
1476 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1477 irq = irq & 1 << INTR_IIR;
1478 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1480 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1481 irq &= ~(1 << INTR_IER);
1482 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1484 atomisp_msi_irq_uninit(isp, dev);
1486 atomisp_ospm_dphy_down(isp);
1488 /* Address later when we worry about the ...field chips */
1489 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1490 dev_err(&dev->dev, "Failed to switch off ISP\n");
1494 static void atomisp_pci_remove(struct pci_dev *dev)
1496 struct atomisp_device *isp = (struct atomisp_device *)
1497 pci_get_drvdata(dev);
1499 atomisp_drvfs_exit();
1501 atomisp_acc_cleanup(isp);
1503 atomisp_css_unload_firmware(isp);
1506 pm_runtime_forbid(&dev->dev);
1507 pm_runtime_get_noresume(&dev->dev);
1508 pm_qos_remove_request(&isp->pm_qos);
1510 atomisp_msi_irq_uninit(isp, dev);
1511 atomisp_unregister_entities(isp);
1513 destroy_workqueue(isp->wdt_work_queue);
1514 atomisp_file_input_cleanup(isp);
1516 release_firmware(isp->firmware);
1518 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1521 static const struct pci_device_id atomisp_pci_tbl[] = {
1522 #if defined(ISP2400) || defined(ISP2400B0)
1524 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1178)},
1525 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1179)},
1526 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x117a)},
1528 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0f38)},
1529 #elif defined(ISP2401)
1530 /* Anniedale (Merrifield+ / Moorefield) */
1531 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1478)},
1533 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x22b8)},
1538 MODULE_DEVICE_TABLE(pci, atomisp_pci_tbl);
1540 static const struct dev_pm_ops atomisp_pm_ops = {
1541 .runtime_suspend = atomisp_runtime_suspend,
1542 .runtime_resume = atomisp_runtime_resume,
1543 .suspend = atomisp_suspend,
1544 .resume = atomisp_resume,
1547 static struct pci_driver atomisp_pci_driver = {
1549 .pm = &atomisp_pm_ops,
1551 .name = "atomisp-isp2",
1552 .id_table = atomisp_pci_tbl,
1553 .probe = atomisp_pci_probe,
1554 .remove = atomisp_pci_remove,
1557 static int __init atomisp_init(void)
1559 return pci_register_driver(&atomisp_pci_driver);
1562 static void __exit atomisp_exit(void)
1564 pci_unregister_driver(&atomisp_pci_driver);
1567 module_init(atomisp_init);
1568 module_exit(atomisp_exit);
1570 MODULE_AUTHOR("Wen Wang <wen.w.wang@intel.com>");
1571 MODULE_AUTHOR("Xiaolin Zhang <xiaolin.zhang@intel.com>");
1572 MODULE_LICENSE("GPL");
1573 MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver");