staging: fsl-dpaa2/eth: Fix SGT allocation
[linux-2.6-microblaze.git] / drivers / staging / fsl-dpaa2 / ethernet / dpaa2-eth.c
1 /* Copyright 2014-2016 Freescale Semiconductor Inc.
2  * Copyright 2016-2017 NXP
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
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7  *       notice, this list of conditions and the following disclaimer.
8  *     * Redistributions in binary form must reproduce the above copyright
9  *       notice, this list of conditions and the following disclaimer in the
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17  * GNU General Public License ("GPL") as published by the Free Software
18  * Foundation, either version 2 of that License or (at your option) any
19  * later version.
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30  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 #include <linux/init.h>
33 #include <linux/module.h>
34 #include <linux/platform_device.h>
35 #include <linux/etherdevice.h>
36 #include <linux/of_net.h>
37 #include <linux/interrupt.h>
38 #include <linux/msi.h>
39 #include <linux/kthread.h>
40 #include <linux/iommu.h>
41
42 #include <linux/fsl/mc.h>
43 #include "dpaa2-eth.h"
44
45 /* CREATE_TRACE_POINTS only needs to be defined once. Other dpa files
46  * using trace events only need to #include <trace/events/sched.h>
47  */
48 #define CREATE_TRACE_POINTS
49 #include "dpaa2-eth-trace.h"
50
51 MODULE_LICENSE("Dual BSD/GPL");
52 MODULE_AUTHOR("Freescale Semiconductor, Inc");
53 MODULE_DESCRIPTION("Freescale DPAA2 Ethernet Driver");
54
55 const char dpaa2_eth_drv_version[] = "0.1";
56
57 static void *dpaa2_iova_to_virt(struct iommu_domain *domain,
58                                 dma_addr_t iova_addr)
59 {
60         phys_addr_t phys_addr;
61
62         phys_addr = domain ? iommu_iova_to_phys(domain, iova_addr) : iova_addr;
63
64         return phys_to_virt(phys_addr);
65 }
66
67 static void validate_rx_csum(struct dpaa2_eth_priv *priv,
68                              u32 fd_status,
69                              struct sk_buff *skb)
70 {
71         skb_checksum_none_assert(skb);
72
73         /* HW checksum validation is disabled, nothing to do here */
74         if (!(priv->net_dev->features & NETIF_F_RXCSUM))
75                 return;
76
77         /* Read checksum validation bits */
78         if (!((fd_status & DPAA2_FAS_L3CV) &&
79               (fd_status & DPAA2_FAS_L4CV)))
80                 return;
81
82         /* Inform the stack there's no need to compute L3/L4 csum anymore */
83         skb->ip_summed = CHECKSUM_UNNECESSARY;
84 }
85
86 /* Free a received FD.
87  * Not to be used for Tx conf FDs or on any other paths.
88  */
89 static void free_rx_fd(struct dpaa2_eth_priv *priv,
90                        const struct dpaa2_fd *fd,
91                        void *vaddr)
92 {
93         struct device *dev = priv->net_dev->dev.parent;
94         dma_addr_t addr = dpaa2_fd_get_addr(fd);
95         u8 fd_format = dpaa2_fd_get_format(fd);
96         struct dpaa2_sg_entry *sgt;
97         void *sg_vaddr;
98         int i;
99
100         /* If single buffer frame, just free the data buffer */
101         if (fd_format == dpaa2_fd_single)
102                 goto free_buf;
103         else if (fd_format != dpaa2_fd_sg)
104                 /* We don't support any other format */
105                 return;
106
107         /* For S/G frames, we first need to free all SG entries
108          * except the first one, which was taken care of already
109          */
110         sgt = vaddr + dpaa2_fd_get_offset(fd);
111         for (i = 1; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
112                 addr = dpaa2_sg_get_addr(&sgt[i]);
113                 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
114                 dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE,
115                                  DMA_FROM_DEVICE);
116
117                 skb_free_frag(sg_vaddr);
118                 if (dpaa2_sg_is_final(&sgt[i]))
119                         break;
120         }
121
122 free_buf:
123         skb_free_frag(vaddr);
124 }
125
126 /* Build a linear skb based on a single-buffer frame descriptor */
127 static struct sk_buff *build_linear_skb(struct dpaa2_eth_priv *priv,
128                                         struct dpaa2_eth_channel *ch,
129                                         const struct dpaa2_fd *fd,
130                                         void *fd_vaddr)
131 {
132         struct sk_buff *skb = NULL;
133         u16 fd_offset = dpaa2_fd_get_offset(fd);
134         u32 fd_length = dpaa2_fd_get_len(fd);
135
136         ch->buf_count--;
137
138         skb = build_skb(fd_vaddr, DPAA2_ETH_SKB_SIZE);
139         if (unlikely(!skb))
140                 return NULL;
141
142         skb_reserve(skb, fd_offset);
143         skb_put(skb, fd_length);
144
145         return skb;
146 }
147
148 /* Build a non linear (fragmented) skb based on a S/G table */
149 static struct sk_buff *build_frag_skb(struct dpaa2_eth_priv *priv,
150                                       struct dpaa2_eth_channel *ch,
151                                       struct dpaa2_sg_entry *sgt)
152 {
153         struct sk_buff *skb = NULL;
154         struct device *dev = priv->net_dev->dev.parent;
155         void *sg_vaddr;
156         dma_addr_t sg_addr;
157         u16 sg_offset;
158         u32 sg_length;
159         struct page *page, *head_page;
160         int page_offset;
161         int i;
162
163         for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
164                 struct dpaa2_sg_entry *sge = &sgt[i];
165
166                 /* NOTE: We only support SG entries in dpaa2_sg_single format,
167                  * but this is the only format we may receive from HW anyway
168                  */
169
170                 /* Get the address and length from the S/G entry */
171                 sg_addr = dpaa2_sg_get_addr(sge);
172                 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, sg_addr);
173                 dma_unmap_single(dev, sg_addr, DPAA2_ETH_RX_BUF_SIZE,
174                                  DMA_FROM_DEVICE);
175
176                 sg_length = dpaa2_sg_get_len(sge);
177
178                 if (i == 0) {
179                         /* We build the skb around the first data buffer */
180                         skb = build_skb(sg_vaddr, DPAA2_ETH_SKB_SIZE);
181                         if (unlikely(!skb)) {
182                                 /* Free the first SG entry now, since we already
183                                  * unmapped it and obtained the virtual address
184                                  */
185                                 skb_free_frag(sg_vaddr);
186
187                                 /* We still need to subtract the buffers used
188                                  * by this FD from our software counter
189                                  */
190                                 while (!dpaa2_sg_is_final(&sgt[i]) &&
191                                        i < DPAA2_ETH_MAX_SG_ENTRIES)
192                                         i++;
193                                 break;
194                         }
195
196                         sg_offset = dpaa2_sg_get_offset(sge);
197                         skb_reserve(skb, sg_offset);
198                         skb_put(skb, sg_length);
199                 } else {
200                         /* Rest of the data buffers are stored as skb frags */
201                         page = virt_to_page(sg_vaddr);
202                         head_page = virt_to_head_page(sg_vaddr);
203
204                         /* Offset in page (which may be compound).
205                          * Data in subsequent SG entries is stored from the
206                          * beginning of the buffer, so we don't need to add the
207                          * sg_offset.
208                          */
209                         page_offset = ((unsigned long)sg_vaddr &
210                                 (PAGE_SIZE - 1)) +
211                                 (page_address(page) - page_address(head_page));
212
213                         skb_add_rx_frag(skb, i - 1, head_page, page_offset,
214                                         sg_length, DPAA2_ETH_RX_BUF_SIZE);
215                 }
216
217                 if (dpaa2_sg_is_final(sge))
218                         break;
219         }
220
221         WARN_ONCE(i == DPAA2_ETH_MAX_SG_ENTRIES, "Final bit not set in SGT");
222
223         /* Count all data buffers + SG table buffer */
224         ch->buf_count -= i + 2;
225
226         return skb;
227 }
228
229 /* Main Rx frame processing routine */
230 static void dpaa2_eth_rx(struct dpaa2_eth_priv *priv,
231                          struct dpaa2_eth_channel *ch,
232                          const struct dpaa2_fd *fd,
233                          struct napi_struct *napi,
234                          u16 queue_id)
235 {
236         dma_addr_t addr = dpaa2_fd_get_addr(fd);
237         u8 fd_format = dpaa2_fd_get_format(fd);
238         void *vaddr;
239         struct sk_buff *skb;
240         struct rtnl_link_stats64 *percpu_stats;
241         struct dpaa2_eth_drv_stats *percpu_extras;
242         struct device *dev = priv->net_dev->dev.parent;
243         struct dpaa2_fas *fas;
244         void *buf_data;
245         u32 status = 0;
246
247         /* Tracing point */
248         trace_dpaa2_rx_fd(priv->net_dev, fd);
249
250         vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
251         dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE, DMA_FROM_DEVICE);
252
253         fas = dpaa2_get_fas(vaddr, false);
254         prefetch(fas);
255         buf_data = vaddr + dpaa2_fd_get_offset(fd);
256         prefetch(buf_data);
257
258         percpu_stats = this_cpu_ptr(priv->percpu_stats);
259         percpu_extras = this_cpu_ptr(priv->percpu_extras);
260
261         if (fd_format == dpaa2_fd_single) {
262                 skb = build_linear_skb(priv, ch, fd, vaddr);
263         } else if (fd_format == dpaa2_fd_sg) {
264                 skb = build_frag_skb(priv, ch, buf_data);
265                 skb_free_frag(vaddr);
266                 percpu_extras->rx_sg_frames++;
267                 percpu_extras->rx_sg_bytes += dpaa2_fd_get_len(fd);
268         } else {
269                 /* We don't support any other format */
270                 goto err_frame_format;
271         }
272
273         if (unlikely(!skb))
274                 goto err_build_skb;
275
276         prefetch(skb->data);
277
278         /* Check if we need to validate the L4 csum */
279         if (likely(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV)) {
280                 status = le32_to_cpu(fas->status);
281                 validate_rx_csum(priv, status, skb);
282         }
283
284         skb->protocol = eth_type_trans(skb, priv->net_dev);
285         skb_record_rx_queue(skb, queue_id);
286
287         percpu_stats->rx_packets++;
288         percpu_stats->rx_bytes += dpaa2_fd_get_len(fd);
289
290         napi_gro_receive(napi, skb);
291
292         return;
293
294 err_build_skb:
295         free_rx_fd(priv, fd, vaddr);
296 err_frame_format:
297         percpu_stats->rx_dropped++;
298 }
299
300 /* Consume all frames pull-dequeued into the store. This is the simplest way to
301  * make sure we don't accidentally issue another volatile dequeue which would
302  * overwrite (leak) frames already in the store.
303  *
304  * Observance of NAPI budget is not our concern, leaving that to the caller.
305  */
306 static int consume_frames(struct dpaa2_eth_channel *ch)
307 {
308         struct dpaa2_eth_priv *priv = ch->priv;
309         struct dpaa2_eth_fq *fq;
310         struct dpaa2_dq *dq;
311         const struct dpaa2_fd *fd;
312         int cleaned = 0;
313         int is_last;
314
315         do {
316                 dq = dpaa2_io_store_next(ch->store, &is_last);
317                 if (unlikely(!dq)) {
318                         /* If we're here, we *must* have placed a
319                          * volatile dequeue comnmand, so keep reading through
320                          * the store until we get some sort of valid response
321                          * token (either a valid frame or an "empty dequeue")
322                          */
323                         continue;
324                 }
325
326                 fd = dpaa2_dq_fd(dq);
327                 fq = (struct dpaa2_eth_fq *)(uintptr_t)dpaa2_dq_fqd_ctx(dq);
328                 fq->stats.frames++;
329
330                 fq->consume(priv, ch, fd, &ch->napi, fq->flowid);
331                 cleaned++;
332         } while (!is_last);
333
334         return cleaned;
335 }
336
337 /* Create a frame descriptor based on a fragmented skb */
338 static int build_sg_fd(struct dpaa2_eth_priv *priv,
339                        struct sk_buff *skb,
340                        struct dpaa2_fd *fd)
341 {
342         struct device *dev = priv->net_dev->dev.parent;
343         void *sgt_buf = NULL;
344         dma_addr_t addr;
345         int nr_frags = skb_shinfo(skb)->nr_frags;
346         struct dpaa2_sg_entry *sgt;
347         int i, err;
348         int sgt_buf_size;
349         struct scatterlist *scl, *crt_scl;
350         int num_sg;
351         int num_dma_bufs;
352         struct dpaa2_eth_swa *swa;
353
354         /* Create and map scatterlist.
355          * We don't advertise NETIF_F_FRAGLIST, so skb_to_sgvec() will not have
356          * to go beyond nr_frags+1.
357          * Note: We don't support chained scatterlists
358          */
359         if (unlikely(PAGE_SIZE / sizeof(struct scatterlist) < nr_frags + 1))
360                 return -EINVAL;
361
362         scl = kcalloc(nr_frags + 1, sizeof(struct scatterlist), GFP_ATOMIC);
363         if (unlikely(!scl))
364                 return -ENOMEM;
365
366         sg_init_table(scl, nr_frags + 1);
367         num_sg = skb_to_sgvec(skb, scl, 0, skb->len);
368         num_dma_bufs = dma_map_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
369         if (unlikely(!num_dma_bufs)) {
370                 err = -ENOMEM;
371                 goto dma_map_sg_failed;
372         }
373
374         /* Prepare the HW SGT structure */
375         sgt_buf_size = priv->tx_data_offset +
376                        sizeof(struct dpaa2_sg_entry) *  num_dma_bufs;
377         sgt_buf = netdev_alloc_frag(sgt_buf_size + DPAA2_ETH_TX_BUF_ALIGN);
378         if (unlikely(!sgt_buf)) {
379                 err = -ENOMEM;
380                 goto sgt_buf_alloc_failed;
381         }
382         sgt_buf = PTR_ALIGN(sgt_buf, DPAA2_ETH_TX_BUF_ALIGN);
383         memset(sgt_buf, 0, sgt_buf_size);
384
385         sgt = (struct dpaa2_sg_entry *)(sgt_buf + priv->tx_data_offset);
386
387         /* Fill in the HW SGT structure.
388          *
389          * sgt_buf is zeroed out, so the following fields are implicit
390          * in all sgt entries:
391          *   - offset is 0
392          *   - format is 'dpaa2_sg_single'
393          */
394         for_each_sg(scl, crt_scl, num_dma_bufs, i) {
395                 dpaa2_sg_set_addr(&sgt[i], sg_dma_address(crt_scl));
396                 dpaa2_sg_set_len(&sgt[i], sg_dma_len(crt_scl));
397         }
398         dpaa2_sg_set_final(&sgt[i - 1], true);
399
400         /* Store the skb backpointer in the SGT buffer.
401          * Fit the scatterlist and the number of buffers alongside the
402          * skb backpointer in the software annotation area. We'll need
403          * all of them on Tx Conf.
404          */
405         swa = (struct dpaa2_eth_swa *)sgt_buf;
406         swa->skb = skb;
407         swa->scl = scl;
408         swa->num_sg = num_sg;
409         swa->sgt_size = sgt_buf_size;
410
411         /* Separately map the SGT buffer */
412         addr = dma_map_single(dev, sgt_buf, sgt_buf_size, DMA_BIDIRECTIONAL);
413         if (unlikely(dma_mapping_error(dev, addr))) {
414                 err = -ENOMEM;
415                 goto dma_map_single_failed;
416         }
417         dpaa2_fd_set_offset(fd, priv->tx_data_offset);
418         dpaa2_fd_set_format(fd, dpaa2_fd_sg);
419         dpaa2_fd_set_addr(fd, addr);
420         dpaa2_fd_set_len(fd, skb->len);
421         dpaa2_fd_set_ctrl(fd, DPAA2_FD_CTRL_PTA | DPAA2_FD_CTRL_PTV1);
422
423         return 0;
424
425 dma_map_single_failed:
426         skb_free_frag(sgt_buf);
427 sgt_buf_alloc_failed:
428         dma_unmap_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
429 dma_map_sg_failed:
430         kfree(scl);
431         return err;
432 }
433
434 /* Create a frame descriptor based on a linear skb */
435 static int build_single_fd(struct dpaa2_eth_priv *priv,
436                            struct sk_buff *skb,
437                            struct dpaa2_fd *fd)
438 {
439         struct device *dev = priv->net_dev->dev.parent;
440         u8 *buffer_start, *aligned_start;
441         struct sk_buff **skbh;
442         dma_addr_t addr;
443
444         buffer_start = skb->data - dpaa2_eth_needed_headroom(priv, skb);
445
446         /* If there's enough room to align the FD address, do it.
447          * It will help hardware optimize accesses.
448          */
449         aligned_start = PTR_ALIGN(buffer_start - DPAA2_ETH_TX_BUF_ALIGN,
450                                   DPAA2_ETH_TX_BUF_ALIGN);
451         if (aligned_start >= skb->head)
452                 buffer_start = aligned_start;
453
454         /* Store a backpointer to the skb at the beginning of the buffer
455          * (in the private data area) such that we can release it
456          * on Tx confirm
457          */
458         skbh = (struct sk_buff **)buffer_start;
459         *skbh = skb;
460
461         addr = dma_map_single(dev, buffer_start,
462                               skb_tail_pointer(skb) - buffer_start,
463                               DMA_BIDIRECTIONAL);
464         if (unlikely(dma_mapping_error(dev, addr)))
465                 return -ENOMEM;
466
467         dpaa2_fd_set_addr(fd, addr);
468         dpaa2_fd_set_offset(fd, (u16)(skb->data - buffer_start));
469         dpaa2_fd_set_len(fd, skb->len);
470         dpaa2_fd_set_format(fd, dpaa2_fd_single);
471         dpaa2_fd_set_ctrl(fd, DPAA2_FD_CTRL_PTA | DPAA2_FD_CTRL_PTV1);
472
473         return 0;
474 }
475
476 /* FD freeing routine on the Tx path
477  *
478  * DMA-unmap and free FD and possibly SGT buffer allocated on Tx. The skb
479  * back-pointed to is also freed.
480  * This can be called either from dpaa2_eth_tx_conf() or on the error path of
481  * dpaa2_eth_tx().
482  * Optionally, return the frame annotation status word (FAS), which needs
483  * to be checked if we're on the confirmation path.
484  */
485 static void free_tx_fd(const struct dpaa2_eth_priv *priv,
486                        const struct dpaa2_fd *fd)
487 {
488         struct device *dev = priv->net_dev->dev.parent;
489         dma_addr_t fd_addr;
490         struct sk_buff **skbh, *skb;
491         unsigned char *buffer_start;
492         struct dpaa2_eth_swa *swa;
493         u8 fd_format = dpaa2_fd_get_format(fd);
494
495         fd_addr = dpaa2_fd_get_addr(fd);
496         skbh = dpaa2_iova_to_virt(priv->iommu_domain, fd_addr);
497
498         if (fd_format == dpaa2_fd_single) {
499                 skb = *skbh;
500                 buffer_start = (unsigned char *)skbh;
501                 /* Accessing the skb buffer is safe before dma unmap, because
502                  * we didn't map the actual skb shell.
503                  */
504                 dma_unmap_single(dev, fd_addr,
505                                  skb_tail_pointer(skb) - buffer_start,
506                                  DMA_BIDIRECTIONAL);
507         } else if (fd_format == dpaa2_fd_sg) {
508                 swa = (struct dpaa2_eth_swa *)skbh;
509                 skb = swa->skb;
510
511                 /* Unmap the scatterlist */
512                 dma_unmap_sg(dev, swa->scl, swa->num_sg, DMA_BIDIRECTIONAL);
513                 kfree(swa->scl);
514
515                 /* Unmap the SGT buffer */
516                 dma_unmap_single(dev, fd_addr, swa->sgt_size,
517                                  DMA_BIDIRECTIONAL);
518         } else {
519                 netdev_dbg(priv->net_dev, "Invalid FD format\n");
520                 return;
521         }
522
523         /* Free SGT buffer allocated on tx */
524         if (fd_format != dpaa2_fd_single)
525                 skb_free_frag(skbh);
526
527         /* Move on with skb release */
528         dev_kfree_skb(skb);
529 }
530
531 static netdev_tx_t dpaa2_eth_tx(struct sk_buff *skb, struct net_device *net_dev)
532 {
533         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
534         struct dpaa2_fd fd;
535         struct rtnl_link_stats64 *percpu_stats;
536         struct dpaa2_eth_drv_stats *percpu_extras;
537         struct dpaa2_eth_fq *fq;
538         u16 queue_mapping;
539         unsigned int needed_headroom;
540         int err, i;
541
542         percpu_stats = this_cpu_ptr(priv->percpu_stats);
543         percpu_extras = this_cpu_ptr(priv->percpu_extras);
544
545         needed_headroom = dpaa2_eth_needed_headroom(priv, skb);
546         if (skb_headroom(skb) < needed_headroom) {
547                 struct sk_buff *ns;
548
549                 ns = skb_realloc_headroom(skb, needed_headroom);
550                 if (unlikely(!ns)) {
551                         percpu_stats->tx_dropped++;
552                         goto err_alloc_headroom;
553                 }
554                 percpu_extras->tx_reallocs++;
555                 dev_kfree_skb(skb);
556                 skb = ns;
557         }
558
559         /* We'll be holding a back-reference to the skb until Tx Confirmation;
560          * we don't want that overwritten by a concurrent Tx with a cloned skb.
561          */
562         skb = skb_unshare(skb, GFP_ATOMIC);
563         if (unlikely(!skb)) {
564                 /* skb_unshare() has already freed the skb */
565                 percpu_stats->tx_dropped++;
566                 return NETDEV_TX_OK;
567         }
568
569         /* Setup the FD fields */
570         memset(&fd, 0, sizeof(fd));
571
572         if (skb_is_nonlinear(skb)) {
573                 err = build_sg_fd(priv, skb, &fd);
574                 percpu_extras->tx_sg_frames++;
575                 percpu_extras->tx_sg_bytes += skb->len;
576         } else {
577                 err = build_single_fd(priv, skb, &fd);
578         }
579
580         if (unlikely(err)) {
581                 percpu_stats->tx_dropped++;
582                 goto err_build_fd;
583         }
584
585         /* Tracing point */
586         trace_dpaa2_tx_fd(net_dev, &fd);
587
588         /* TxConf FQ selection relies on queue id from the stack.
589          * In case of a forwarded frame from another DPNI interface, we choose
590          * a queue affined to the same core that processed the Rx frame
591          */
592         queue_mapping = skb_get_queue_mapping(skb);
593         fq = &priv->fq[queue_mapping];
594         for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) {
595                 err = dpaa2_io_service_enqueue_qd(fq->channel->dpio,
596                                                   priv->tx_qdid, 0,
597                                                   fq->tx_qdbin, &fd);
598                 if (err != -EBUSY)
599                         break;
600         }
601         percpu_extras->tx_portal_busy += i;
602         if (unlikely(err < 0)) {
603                 percpu_stats->tx_errors++;
604                 /* Clean up everything, including freeing the skb */
605                 free_tx_fd(priv, &fd);
606         } else {
607                 percpu_stats->tx_packets++;
608                 percpu_stats->tx_bytes += dpaa2_fd_get_len(&fd);
609         }
610
611         return NETDEV_TX_OK;
612
613 err_build_fd:
614 err_alloc_headroom:
615         dev_kfree_skb(skb);
616
617         return NETDEV_TX_OK;
618 }
619
620 /* Tx confirmation frame processing routine */
621 static void dpaa2_eth_tx_conf(struct dpaa2_eth_priv *priv,
622                               struct dpaa2_eth_channel *ch,
623                               const struct dpaa2_fd *fd,
624                               struct napi_struct *napi __always_unused,
625                               u16 queue_id __always_unused)
626 {
627         struct rtnl_link_stats64 *percpu_stats;
628         struct dpaa2_eth_drv_stats *percpu_extras;
629         u32 fd_errors;
630
631         /* Tracing point */
632         trace_dpaa2_tx_conf_fd(priv->net_dev, fd);
633
634         percpu_extras = this_cpu_ptr(priv->percpu_extras);
635         percpu_extras->tx_conf_frames++;
636         percpu_extras->tx_conf_bytes += dpaa2_fd_get_len(fd);
637
638         /* Check frame errors in the FD field */
639         fd_errors = dpaa2_fd_get_ctrl(fd) & DPAA2_FD_TX_ERR_MASK;
640         free_tx_fd(priv, fd);
641
642         if (likely(!fd_errors))
643                 return;
644
645         if (net_ratelimit())
646                 netdev_dbg(priv->net_dev, "TX frame FD error: 0x%08x\n",
647                            fd_errors);
648
649         percpu_stats = this_cpu_ptr(priv->percpu_stats);
650         /* Tx-conf logically pertains to the egress path. */
651         percpu_stats->tx_errors++;
652 }
653
654 static int set_rx_csum(struct dpaa2_eth_priv *priv, bool enable)
655 {
656         int err;
657
658         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
659                                DPNI_OFF_RX_L3_CSUM, enable);
660         if (err) {
661                 netdev_err(priv->net_dev,
662                            "dpni_set_offload(RX_L3_CSUM) failed\n");
663                 return err;
664         }
665
666         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
667                                DPNI_OFF_RX_L4_CSUM, enable);
668         if (err) {
669                 netdev_err(priv->net_dev,
670                            "dpni_set_offload(RX_L4_CSUM) failed\n");
671                 return err;
672         }
673
674         return 0;
675 }
676
677 static int set_tx_csum(struct dpaa2_eth_priv *priv, bool enable)
678 {
679         int err;
680
681         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
682                                DPNI_OFF_TX_L3_CSUM, enable);
683         if (err) {
684                 netdev_err(priv->net_dev, "dpni_set_offload(TX_L3_CSUM) failed\n");
685                 return err;
686         }
687
688         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
689                                DPNI_OFF_TX_L4_CSUM, enable);
690         if (err) {
691                 netdev_err(priv->net_dev, "dpni_set_offload(TX_L4_CSUM) failed\n");
692                 return err;
693         }
694
695         return 0;
696 }
697
698 /* Free buffers acquired from the buffer pool or which were meant to
699  * be released in the pool
700  */
701 static void free_bufs(struct dpaa2_eth_priv *priv, u64 *buf_array, int count)
702 {
703         struct device *dev = priv->net_dev->dev.parent;
704         void *vaddr;
705         int i;
706
707         for (i = 0; i < count; i++) {
708                 vaddr = dpaa2_iova_to_virt(priv->iommu_domain, buf_array[i]);
709                 dma_unmap_single(dev, buf_array[i], DPAA2_ETH_RX_BUF_SIZE,
710                                  DMA_BIDIRECTIONAL);
711                 skb_free_frag(vaddr);
712         }
713 }
714
715 /* Perform a single release command to add buffers
716  * to the specified buffer pool
717  */
718 static int add_bufs(struct dpaa2_eth_priv *priv,
719                     struct dpaa2_eth_channel *ch, u16 bpid)
720 {
721         struct device *dev = priv->net_dev->dev.parent;
722         u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
723         void *buf;
724         dma_addr_t addr;
725         int i, err;
726
727         for (i = 0; i < DPAA2_ETH_BUFS_PER_CMD; i++) {
728                 /* Allocate buffer visible to WRIOP + skb shared info +
729                  * alignment padding
730                  */
731                 buf = napi_alloc_frag(dpaa2_eth_buf_raw_size(priv));
732                 if (unlikely(!buf))
733                         goto err_alloc;
734
735                 buf = PTR_ALIGN(buf, priv->rx_buf_align);
736
737                 addr = dma_map_single(dev, buf, DPAA2_ETH_RX_BUF_SIZE,
738                                       DMA_FROM_DEVICE);
739                 if (unlikely(dma_mapping_error(dev, addr)))
740                         goto err_map;
741
742                 buf_array[i] = addr;
743
744                 /* tracing point */
745                 trace_dpaa2_eth_buf_seed(priv->net_dev,
746                                          buf, dpaa2_eth_buf_raw_size(priv),
747                                          addr, DPAA2_ETH_RX_BUF_SIZE,
748                                          bpid);
749         }
750
751 release_bufs:
752         /* In case the portal is busy, retry until successful */
753         while ((err = dpaa2_io_service_release(ch->dpio, bpid,
754                                                buf_array, i)) == -EBUSY)
755                 cpu_relax();
756
757         /* If release command failed, clean up and bail out;
758          * not much else we can do about it
759          */
760         if (err) {
761                 free_bufs(priv, buf_array, i);
762                 return 0;
763         }
764
765         return i;
766
767 err_map:
768         skb_free_frag(buf);
769 err_alloc:
770         /* If we managed to allocate at least some buffers,
771          * release them to hardware
772          */
773         if (i)
774                 goto release_bufs;
775
776         return 0;
777 }
778
779 static int seed_pool(struct dpaa2_eth_priv *priv, u16 bpid)
780 {
781         int i, j;
782         int new_count;
783
784         /* This is the lazy seeding of Rx buffer pools.
785          * dpaa2_add_bufs() is also used on the Rx hotpath and calls
786          * napi_alloc_frag(). The trouble with that is that it in turn ends up
787          * calling this_cpu_ptr(), which mandates execution in atomic context.
788          * Rather than splitting up the code, do a one-off preempt disable.
789          */
790         preempt_disable();
791         for (j = 0; j < priv->num_channels; j++) {
792                 for (i = 0; i < DPAA2_ETH_NUM_BUFS;
793                      i += DPAA2_ETH_BUFS_PER_CMD) {
794                         new_count = add_bufs(priv, priv->channel[j], bpid);
795                         priv->channel[j]->buf_count += new_count;
796
797                         if (new_count < DPAA2_ETH_BUFS_PER_CMD) {
798                                 preempt_enable();
799                                 return -ENOMEM;
800                         }
801                 }
802         }
803         preempt_enable();
804
805         return 0;
806 }
807
808 /**
809  * Drain the specified number of buffers from the DPNI's private buffer pool.
810  * @count must not exceeed DPAA2_ETH_BUFS_PER_CMD
811  */
812 static void drain_bufs(struct dpaa2_eth_priv *priv, int count)
813 {
814         u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
815         int ret;
816
817         do {
818                 ret = dpaa2_io_service_acquire(NULL, priv->bpid,
819                                                buf_array, count);
820                 if (ret < 0) {
821                         netdev_err(priv->net_dev, "dpaa2_io_service_acquire() failed\n");
822                         return;
823                 }
824                 free_bufs(priv, buf_array, ret);
825         } while (ret);
826 }
827
828 static void drain_pool(struct dpaa2_eth_priv *priv)
829 {
830         int i;
831
832         drain_bufs(priv, DPAA2_ETH_BUFS_PER_CMD);
833         drain_bufs(priv, 1);
834
835         for (i = 0; i < priv->num_channels; i++)
836                 priv->channel[i]->buf_count = 0;
837 }
838
839 /* Function is called from softirq context only, so we don't need to guard
840  * the access to percpu count
841  */
842 static int refill_pool(struct dpaa2_eth_priv *priv,
843                        struct dpaa2_eth_channel *ch,
844                        u16 bpid)
845 {
846         int new_count;
847
848         if (likely(ch->buf_count >= DPAA2_ETH_REFILL_THRESH))
849                 return 0;
850
851         do {
852                 new_count = add_bufs(priv, ch, bpid);
853                 if (unlikely(!new_count)) {
854                         /* Out of memory; abort for now, we'll try later on */
855                         break;
856                 }
857                 ch->buf_count += new_count;
858         } while (ch->buf_count < DPAA2_ETH_NUM_BUFS);
859
860         if (unlikely(ch->buf_count < DPAA2_ETH_NUM_BUFS))
861                 return -ENOMEM;
862
863         return 0;
864 }
865
866 static int pull_channel(struct dpaa2_eth_channel *ch)
867 {
868         int err;
869         int dequeues = -1;
870
871         /* Retry while portal is busy */
872         do {
873                 err = dpaa2_io_service_pull_channel(ch->dpio, ch->ch_id,
874                                                     ch->store);
875                 dequeues++;
876                 cpu_relax();
877         } while (err == -EBUSY);
878
879         ch->stats.dequeue_portal_busy += dequeues;
880         if (unlikely(err))
881                 ch->stats.pull_err++;
882
883         return err;
884 }
885
886 /* NAPI poll routine
887  *
888  * Frames are dequeued from the QMan channel associated with this NAPI context.
889  * Rx, Tx confirmation and (if configured) Rx error frames all count
890  * towards the NAPI budget.
891  */
892 static int dpaa2_eth_poll(struct napi_struct *napi, int budget)
893 {
894         struct dpaa2_eth_channel *ch;
895         int cleaned = 0, store_cleaned;
896         struct dpaa2_eth_priv *priv;
897         int err;
898
899         ch = container_of(napi, struct dpaa2_eth_channel, napi);
900         priv = ch->priv;
901
902         while (cleaned < budget) {
903                 err = pull_channel(ch);
904                 if (unlikely(err))
905                         break;
906
907                 /* Refill pool if appropriate */
908                 refill_pool(priv, ch, priv->bpid);
909
910                 store_cleaned = consume_frames(ch);
911                 cleaned += store_cleaned;
912
913                 /* If we have enough budget left for a full store,
914                  * try a new pull dequeue, otherwise we're done here
915                  */
916                 if (store_cleaned == 0 ||
917                     cleaned > budget - DPAA2_ETH_STORE_SIZE)
918                         break;
919         }
920
921         if (cleaned < budget && napi_complete_done(napi, cleaned)) {
922                 /* Re-enable data available notifications */
923                 do {
924                         err = dpaa2_io_service_rearm(ch->dpio, &ch->nctx);
925                         cpu_relax();
926                 } while (err == -EBUSY);
927                 WARN_ONCE(err, "CDAN notifications rearm failed on core %d",
928                           ch->nctx.desired_cpu);
929         }
930
931         ch->stats.frames += cleaned;
932
933         return cleaned;
934 }
935
936 static void enable_ch_napi(struct dpaa2_eth_priv *priv)
937 {
938         struct dpaa2_eth_channel *ch;
939         int i;
940
941         for (i = 0; i < priv->num_channels; i++) {
942                 ch = priv->channel[i];
943                 napi_enable(&ch->napi);
944         }
945 }
946
947 static void disable_ch_napi(struct dpaa2_eth_priv *priv)
948 {
949         struct dpaa2_eth_channel *ch;
950         int i;
951
952         for (i = 0; i < priv->num_channels; i++) {
953                 ch = priv->channel[i];
954                 napi_disable(&ch->napi);
955         }
956 }
957
958 static int link_state_update(struct dpaa2_eth_priv *priv)
959 {
960         struct dpni_link_state state;
961         int err;
962
963         err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
964         if (unlikely(err)) {
965                 netdev_err(priv->net_dev,
966                            "dpni_get_link_state() failed\n");
967                 return err;
968         }
969
970         /* Chech link state; speed / duplex changes are not treated yet */
971         if (priv->link_state.up == state.up)
972                 return 0;
973
974         priv->link_state = state;
975         if (state.up) {
976                 netif_carrier_on(priv->net_dev);
977                 netif_tx_start_all_queues(priv->net_dev);
978         } else {
979                 netif_tx_stop_all_queues(priv->net_dev);
980                 netif_carrier_off(priv->net_dev);
981         }
982
983         netdev_info(priv->net_dev, "Link Event: state %s\n",
984                     state.up ? "up" : "down");
985
986         return 0;
987 }
988
989 static int dpaa2_eth_open(struct net_device *net_dev)
990 {
991         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
992         int err;
993
994         err = seed_pool(priv, priv->bpid);
995         if (err) {
996                 /* Not much to do; the buffer pool, though not filled up,
997                  * may still contain some buffers which would enable us
998                  * to limp on.
999                  */
1000                 netdev_err(net_dev, "Buffer seeding failed for DPBP %d (bpid=%d)\n",
1001                            priv->dpbp_dev->obj_desc.id, priv->bpid);
1002         }
1003
1004         /* We'll only start the txqs when the link is actually ready; make sure
1005          * we don't race against the link up notification, which may come
1006          * immediately after dpni_enable();
1007          */
1008         netif_tx_stop_all_queues(net_dev);
1009         enable_ch_napi(priv);
1010         /* Also, explicitly set carrier off, otherwise netif_carrier_ok() will
1011          * return true and cause 'ip link show' to report the LOWER_UP flag,
1012          * even though the link notification wasn't even received.
1013          */
1014         netif_carrier_off(net_dev);
1015
1016         err = dpni_enable(priv->mc_io, 0, priv->mc_token);
1017         if (err < 0) {
1018                 netdev_err(net_dev, "dpni_enable() failed\n");
1019                 goto enable_err;
1020         }
1021
1022         /* If the DPMAC object has already processed the link up interrupt,
1023          * we have to learn the link state ourselves.
1024          */
1025         err = link_state_update(priv);
1026         if (err < 0) {
1027                 netdev_err(net_dev, "Can't update link state\n");
1028                 goto link_state_err;
1029         }
1030
1031         return 0;
1032
1033 link_state_err:
1034 enable_err:
1035         disable_ch_napi(priv);
1036         drain_pool(priv);
1037         return err;
1038 }
1039
1040 /* The DPIO store must be empty when we call this,
1041  * at the end of every NAPI cycle.
1042  */
1043 static u32 drain_channel(struct dpaa2_eth_priv *priv,
1044                          struct dpaa2_eth_channel *ch)
1045 {
1046         u32 drained = 0, total = 0;
1047
1048         do {
1049                 pull_channel(ch);
1050                 drained = consume_frames(ch);
1051                 total += drained;
1052         } while (drained);
1053
1054         return total;
1055 }
1056
1057 static u32 drain_ingress_frames(struct dpaa2_eth_priv *priv)
1058 {
1059         struct dpaa2_eth_channel *ch;
1060         int i;
1061         u32 drained = 0;
1062
1063         for (i = 0; i < priv->num_channels; i++) {
1064                 ch = priv->channel[i];
1065                 drained += drain_channel(priv, ch);
1066         }
1067
1068         return drained;
1069 }
1070
1071 static int dpaa2_eth_stop(struct net_device *net_dev)
1072 {
1073         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1074         int dpni_enabled;
1075         int retries = 10;
1076         u32 drained;
1077
1078         netif_tx_stop_all_queues(net_dev);
1079         netif_carrier_off(net_dev);
1080
1081         /* Loop while dpni_disable() attempts to drain the egress FQs
1082          * and confirm them back to us.
1083          */
1084         do {
1085                 dpni_disable(priv->mc_io, 0, priv->mc_token);
1086                 dpni_is_enabled(priv->mc_io, 0, priv->mc_token, &dpni_enabled);
1087                 if (dpni_enabled)
1088                         /* Allow the hardware some slack */
1089                         msleep(100);
1090         } while (dpni_enabled && --retries);
1091         if (!retries) {
1092                 netdev_warn(net_dev, "Retry count exceeded disabling DPNI\n");
1093                 /* Must go on and disable NAPI nonetheless, so we don't crash at
1094                  * the next "ifconfig up"
1095                  */
1096         }
1097
1098         /* Wait for NAPI to complete on every core and disable it.
1099          * In particular, this will also prevent NAPI from being rescheduled if
1100          * a new CDAN is serviced, effectively discarding the CDAN. We therefore
1101          * don't even need to disarm the channels, except perhaps for the case
1102          * of a huge coalescing value.
1103          */
1104         disable_ch_napi(priv);
1105
1106          /* Manually drain the Rx and TxConf queues */
1107         drained = drain_ingress_frames(priv);
1108         if (drained)
1109                 netdev_dbg(net_dev, "Drained %d frames.\n", drained);
1110
1111         /* Empty the buffer pool */
1112         drain_pool(priv);
1113
1114         return 0;
1115 }
1116
1117 static int dpaa2_eth_init(struct net_device *net_dev)
1118 {
1119         u64 supported = 0;
1120         u64 not_supported = 0;
1121         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1122         u32 options = priv->dpni_attrs.options;
1123
1124         /* Capabilities listing */
1125         supported |= IFF_LIVE_ADDR_CHANGE;
1126
1127         if (options & DPNI_OPT_NO_MAC_FILTER)
1128                 not_supported |= IFF_UNICAST_FLT;
1129         else
1130                 supported |= IFF_UNICAST_FLT;
1131
1132         net_dev->priv_flags |= supported;
1133         net_dev->priv_flags &= ~not_supported;
1134
1135         /* Features */
1136         net_dev->features = NETIF_F_RXCSUM |
1137                             NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1138                             NETIF_F_SG | NETIF_F_HIGHDMA |
1139                             NETIF_F_LLTX;
1140         net_dev->hw_features = net_dev->features;
1141
1142         return 0;
1143 }
1144
1145 static int dpaa2_eth_set_addr(struct net_device *net_dev, void *addr)
1146 {
1147         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1148         struct device *dev = net_dev->dev.parent;
1149         int err;
1150
1151         err = eth_mac_addr(net_dev, addr);
1152         if (err < 0) {
1153                 dev_err(dev, "eth_mac_addr() failed (%d)\n", err);
1154                 return err;
1155         }
1156
1157         err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
1158                                         net_dev->dev_addr);
1159         if (err) {
1160                 dev_err(dev, "dpni_set_primary_mac_addr() failed (%d)\n", err);
1161                 return err;
1162         }
1163
1164         return 0;
1165 }
1166
1167 /** Fill in counters maintained by the GPP driver. These may be different from
1168  * the hardware counters obtained by ethtool.
1169  */
1170 static void dpaa2_eth_get_stats(struct net_device *net_dev,
1171                                 struct rtnl_link_stats64 *stats)
1172 {
1173         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1174         struct rtnl_link_stats64 *percpu_stats;
1175         u64 *cpustats;
1176         u64 *netstats = (u64 *)stats;
1177         int i, j;
1178         int num = sizeof(struct rtnl_link_stats64) / sizeof(u64);
1179
1180         for_each_possible_cpu(i) {
1181                 percpu_stats = per_cpu_ptr(priv->percpu_stats, i);
1182                 cpustats = (u64 *)percpu_stats;
1183                 for (j = 0; j < num; j++)
1184                         netstats[j] += cpustats[j];
1185         }
1186 }
1187
1188 static int dpaa2_eth_change_mtu(struct net_device *net_dev, int mtu)
1189 {
1190         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1191         int err;
1192
1193         /* Set the maximum Rx frame length to match the transmit side;
1194          * account for L2 headers when computing the MFL
1195          */
1196         err = dpni_set_max_frame_length(priv->mc_io, 0, priv->mc_token,
1197                                         (u16)DPAA2_ETH_L2_MAX_FRM(mtu));
1198         if (err) {
1199                 netdev_err(net_dev, "dpni_set_max_frame_length() failed\n");
1200                 return err;
1201         }
1202
1203         net_dev->mtu = mtu;
1204         return 0;
1205 }
1206
1207 /* Copy mac unicast addresses from @net_dev to @priv.
1208  * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1209  */
1210 static void add_uc_hw_addr(const struct net_device *net_dev,
1211                            struct dpaa2_eth_priv *priv)
1212 {
1213         struct netdev_hw_addr *ha;
1214         int err;
1215
1216         netdev_for_each_uc_addr(ha, net_dev) {
1217                 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1218                                         ha->addr);
1219                 if (err)
1220                         netdev_warn(priv->net_dev,
1221                                     "Could not add ucast MAC %pM to the filtering table (err %d)\n",
1222                                     ha->addr, err);
1223         }
1224 }
1225
1226 /* Copy mac multicast addresses from @net_dev to @priv
1227  * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1228  */
1229 static void add_mc_hw_addr(const struct net_device *net_dev,
1230                            struct dpaa2_eth_priv *priv)
1231 {
1232         struct netdev_hw_addr *ha;
1233         int err;
1234
1235         netdev_for_each_mc_addr(ha, net_dev) {
1236                 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1237                                         ha->addr);
1238                 if (err)
1239                         netdev_warn(priv->net_dev,
1240                                     "Could not add mcast MAC %pM to the filtering table (err %d)\n",
1241                                     ha->addr, err);
1242         }
1243 }
1244
1245 static void dpaa2_eth_set_rx_mode(struct net_device *net_dev)
1246 {
1247         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1248         int uc_count = netdev_uc_count(net_dev);
1249         int mc_count = netdev_mc_count(net_dev);
1250         u8 max_mac = priv->dpni_attrs.mac_filter_entries;
1251         u32 options = priv->dpni_attrs.options;
1252         u16 mc_token = priv->mc_token;
1253         struct fsl_mc_io *mc_io = priv->mc_io;
1254         int err;
1255
1256         /* Basic sanity checks; these probably indicate a misconfiguration */
1257         if (options & DPNI_OPT_NO_MAC_FILTER && max_mac != 0)
1258                 netdev_info(net_dev,
1259                             "mac_filter_entries=%d, DPNI_OPT_NO_MAC_FILTER option must be disabled\n",
1260                             max_mac);
1261
1262         /* Force promiscuous if the uc or mc counts exceed our capabilities. */
1263         if (uc_count > max_mac) {
1264                 netdev_info(net_dev,
1265                             "Unicast addr count reached %d, max allowed is %d; forcing promisc\n",
1266                             uc_count, max_mac);
1267                 goto force_promisc;
1268         }
1269         if (mc_count + uc_count > max_mac) {
1270                 netdev_info(net_dev,
1271                             "Unicast + multicast addr count reached %d, max allowed is %d; forcing promisc\n",
1272                             uc_count + mc_count, max_mac);
1273                 goto force_mc_promisc;
1274         }
1275
1276         /* Adjust promisc settings due to flag combinations */
1277         if (net_dev->flags & IFF_PROMISC)
1278                 goto force_promisc;
1279         if (net_dev->flags & IFF_ALLMULTI) {
1280                 /* First, rebuild unicast filtering table. This should be done
1281                  * in promisc mode, in order to avoid frame loss while we
1282                  * progressively add entries to the table.
1283                  * We don't know whether we had been in promisc already, and
1284                  * making an MC call to find out is expensive; so set uc promisc
1285                  * nonetheless.
1286                  */
1287                 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1288                 if (err)
1289                         netdev_warn(net_dev, "Can't set uc promisc\n");
1290
1291                 /* Actual uc table reconstruction. */
1292                 err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 0);
1293                 if (err)
1294                         netdev_warn(net_dev, "Can't clear uc filters\n");
1295                 add_uc_hw_addr(net_dev, priv);
1296
1297                 /* Finally, clear uc promisc and set mc promisc as requested. */
1298                 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1299                 if (err)
1300                         netdev_warn(net_dev, "Can't clear uc promisc\n");
1301                 goto force_mc_promisc;
1302         }
1303
1304         /* Neither unicast, nor multicast promisc will be on... eventually.
1305          * For now, rebuild mac filtering tables while forcing both of them on.
1306          */
1307         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1308         if (err)
1309                 netdev_warn(net_dev, "Can't set uc promisc (%d)\n", err);
1310         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1311         if (err)
1312                 netdev_warn(net_dev, "Can't set mc promisc (%d)\n", err);
1313
1314         /* Actual mac filtering tables reconstruction */
1315         err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 1);
1316         if (err)
1317                 netdev_warn(net_dev, "Can't clear mac filters\n");
1318         add_mc_hw_addr(net_dev, priv);
1319         add_uc_hw_addr(net_dev, priv);
1320
1321         /* Now we can clear both ucast and mcast promisc, without risking
1322          * to drop legitimate frames anymore.
1323          */
1324         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1325         if (err)
1326                 netdev_warn(net_dev, "Can't clear ucast promisc\n");
1327         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 0);
1328         if (err)
1329                 netdev_warn(net_dev, "Can't clear mcast promisc\n");
1330
1331         return;
1332
1333 force_promisc:
1334         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1335         if (err)
1336                 netdev_warn(net_dev, "Can't set ucast promisc\n");
1337 force_mc_promisc:
1338         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1339         if (err)
1340                 netdev_warn(net_dev, "Can't set mcast promisc\n");
1341 }
1342
1343 static int dpaa2_eth_set_features(struct net_device *net_dev,
1344                                   netdev_features_t features)
1345 {
1346         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1347         netdev_features_t changed = features ^ net_dev->features;
1348         bool enable;
1349         int err;
1350
1351         if (changed & NETIF_F_RXCSUM) {
1352                 enable = !!(features & NETIF_F_RXCSUM);
1353                 err = set_rx_csum(priv, enable);
1354                 if (err)
1355                         return err;
1356         }
1357
1358         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) {
1359                 enable = !!(features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
1360                 err = set_tx_csum(priv, enable);
1361                 if (err)
1362                         return err;
1363         }
1364
1365         return 0;
1366 }
1367
1368 static const struct net_device_ops dpaa2_eth_ops = {
1369         .ndo_open = dpaa2_eth_open,
1370         .ndo_start_xmit = dpaa2_eth_tx,
1371         .ndo_stop = dpaa2_eth_stop,
1372         .ndo_init = dpaa2_eth_init,
1373         .ndo_set_mac_address = dpaa2_eth_set_addr,
1374         .ndo_get_stats64 = dpaa2_eth_get_stats,
1375         .ndo_change_mtu = dpaa2_eth_change_mtu,
1376         .ndo_set_rx_mode = dpaa2_eth_set_rx_mode,
1377         .ndo_set_features = dpaa2_eth_set_features,
1378 };
1379
1380 static void cdan_cb(struct dpaa2_io_notification_ctx *ctx)
1381 {
1382         struct dpaa2_eth_channel *ch;
1383
1384         ch = container_of(ctx, struct dpaa2_eth_channel, nctx);
1385
1386         /* Update NAPI statistics */
1387         ch->stats.cdan++;
1388
1389         napi_schedule_irqoff(&ch->napi);
1390 }
1391
1392 /* Allocate and configure a DPCON object */
1393 static struct fsl_mc_device *setup_dpcon(struct dpaa2_eth_priv *priv)
1394 {
1395         struct fsl_mc_device *dpcon;
1396         struct device *dev = priv->net_dev->dev.parent;
1397         struct dpcon_attr attrs;
1398         int err;
1399
1400         err = fsl_mc_object_allocate(to_fsl_mc_device(dev),
1401                                      FSL_MC_POOL_DPCON, &dpcon);
1402         if (err) {
1403                 dev_info(dev, "Not enough DPCONs, will go on as-is\n");
1404                 return NULL;
1405         }
1406
1407         err = dpcon_open(priv->mc_io, 0, dpcon->obj_desc.id, &dpcon->mc_handle);
1408         if (err) {
1409                 dev_err(dev, "dpcon_open() failed\n");
1410                 goto free;
1411         }
1412
1413         err = dpcon_reset(priv->mc_io, 0, dpcon->mc_handle);
1414         if (err) {
1415                 dev_err(dev, "dpcon_reset() failed\n");
1416                 goto close;
1417         }
1418
1419         err = dpcon_get_attributes(priv->mc_io, 0, dpcon->mc_handle, &attrs);
1420         if (err) {
1421                 dev_err(dev, "dpcon_get_attributes() failed\n");
1422                 goto close;
1423         }
1424
1425         err = dpcon_enable(priv->mc_io, 0, dpcon->mc_handle);
1426         if (err) {
1427                 dev_err(dev, "dpcon_enable() failed\n");
1428                 goto close;
1429         }
1430
1431         return dpcon;
1432
1433 close:
1434         dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
1435 free:
1436         fsl_mc_object_free(dpcon);
1437
1438         return NULL;
1439 }
1440
1441 static void free_dpcon(struct dpaa2_eth_priv *priv,
1442                        struct fsl_mc_device *dpcon)
1443 {
1444         dpcon_disable(priv->mc_io, 0, dpcon->mc_handle);
1445         dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
1446         fsl_mc_object_free(dpcon);
1447 }
1448
1449 static struct dpaa2_eth_channel *
1450 alloc_channel(struct dpaa2_eth_priv *priv)
1451 {
1452         struct dpaa2_eth_channel *channel;
1453         struct dpcon_attr attr;
1454         struct device *dev = priv->net_dev->dev.parent;
1455         int err;
1456
1457         channel = kzalloc(sizeof(*channel), GFP_KERNEL);
1458         if (!channel)
1459                 return NULL;
1460
1461         channel->dpcon = setup_dpcon(priv);
1462         if (!channel->dpcon)
1463                 goto err_setup;
1464
1465         err = dpcon_get_attributes(priv->mc_io, 0, channel->dpcon->mc_handle,
1466                                    &attr);
1467         if (err) {
1468                 dev_err(dev, "dpcon_get_attributes() failed\n");
1469                 goto err_get_attr;
1470         }
1471
1472         channel->dpcon_id = attr.id;
1473         channel->ch_id = attr.qbman_ch_id;
1474         channel->priv = priv;
1475
1476         return channel;
1477
1478 err_get_attr:
1479         free_dpcon(priv, channel->dpcon);
1480 err_setup:
1481         kfree(channel);
1482         return NULL;
1483 }
1484
1485 static void free_channel(struct dpaa2_eth_priv *priv,
1486                          struct dpaa2_eth_channel *channel)
1487 {
1488         free_dpcon(priv, channel->dpcon);
1489         kfree(channel);
1490 }
1491
1492 /* DPIO setup: allocate and configure QBMan channels, setup core affinity
1493  * and register data availability notifications
1494  */
1495 static int setup_dpio(struct dpaa2_eth_priv *priv)
1496 {
1497         struct dpaa2_io_notification_ctx *nctx;
1498         struct dpaa2_eth_channel *channel;
1499         struct dpcon_notification_cfg dpcon_notif_cfg;
1500         struct device *dev = priv->net_dev->dev.parent;
1501         int i, err;
1502
1503         /* We want the ability to spread ingress traffic (RX, TX conf) to as
1504          * many cores as possible, so we need one channel for each core
1505          * (unless there's fewer queues than cores, in which case the extra
1506          * channels would be wasted).
1507          * Allocate one channel per core and register it to the core's
1508          * affine DPIO. If not enough channels are available for all cores
1509          * or if some cores don't have an affine DPIO, there will be no
1510          * ingress frame processing on those cores.
1511          */
1512         cpumask_clear(&priv->dpio_cpumask);
1513         for_each_online_cpu(i) {
1514                 /* Try to allocate a channel */
1515                 channel = alloc_channel(priv);
1516                 if (!channel) {
1517                         dev_info(dev,
1518                                  "No affine channel for cpu %d and above\n", i);
1519                         err = -ENODEV;
1520                         goto err_alloc_ch;
1521                 }
1522
1523                 priv->channel[priv->num_channels] = channel;
1524
1525                 nctx = &channel->nctx;
1526                 nctx->is_cdan = 1;
1527                 nctx->cb = cdan_cb;
1528                 nctx->id = channel->ch_id;
1529                 nctx->desired_cpu = i;
1530
1531                 /* Register the new context */
1532                 channel->dpio = dpaa2_io_service_select(i);
1533                 err = dpaa2_io_service_register(channel->dpio, nctx);
1534                 if (err) {
1535                         dev_dbg(dev, "No affine DPIO for cpu %d\n", i);
1536                         /* If no affine DPIO for this core, there's probably
1537                          * none available for next cores either. Signal we want
1538                          * to retry later, in case the DPIO devices weren't
1539                          * probed yet.
1540                          */
1541                         err = -EPROBE_DEFER;
1542                         goto err_service_reg;
1543                 }
1544
1545                 /* Register DPCON notification with MC */
1546                 dpcon_notif_cfg.dpio_id = nctx->dpio_id;
1547                 dpcon_notif_cfg.priority = 0;
1548                 dpcon_notif_cfg.user_ctx = nctx->qman64;
1549                 err = dpcon_set_notification(priv->mc_io, 0,
1550                                              channel->dpcon->mc_handle,
1551                                              &dpcon_notif_cfg);
1552                 if (err) {
1553                         dev_err(dev, "dpcon_set_notification failed()\n");
1554                         goto err_set_cdan;
1555                 }
1556
1557                 /* If we managed to allocate a channel and also found an affine
1558                  * DPIO for this core, add it to the final mask
1559                  */
1560                 cpumask_set_cpu(i, &priv->dpio_cpumask);
1561                 priv->num_channels++;
1562
1563                 /* Stop if we already have enough channels to accommodate all
1564                  * RX and TX conf queues
1565                  */
1566                 if (priv->num_channels == dpaa2_eth_queue_count(priv))
1567                         break;
1568         }
1569
1570         return 0;
1571
1572 err_set_cdan:
1573         dpaa2_io_service_deregister(channel->dpio, nctx);
1574 err_service_reg:
1575         free_channel(priv, channel);
1576 err_alloc_ch:
1577         if (cpumask_empty(&priv->dpio_cpumask)) {
1578                 dev_err(dev, "No cpu with an affine DPIO/DPCON\n");
1579                 return err;
1580         }
1581
1582         dev_info(dev, "Cores %*pbl available for processing ingress traffic\n",
1583                  cpumask_pr_args(&priv->dpio_cpumask));
1584
1585         return 0;
1586 }
1587
1588 static void free_dpio(struct dpaa2_eth_priv *priv)
1589 {
1590         int i;
1591         struct dpaa2_eth_channel *ch;
1592
1593         /* deregister CDAN notifications and free channels */
1594         for (i = 0; i < priv->num_channels; i++) {
1595                 ch = priv->channel[i];
1596                 dpaa2_io_service_deregister(ch->dpio, &ch->nctx);
1597                 free_channel(priv, ch);
1598         }
1599 }
1600
1601 static struct dpaa2_eth_channel *get_affine_channel(struct dpaa2_eth_priv *priv,
1602                                                     int cpu)
1603 {
1604         struct device *dev = priv->net_dev->dev.parent;
1605         int i;
1606
1607         for (i = 0; i < priv->num_channels; i++)
1608                 if (priv->channel[i]->nctx.desired_cpu == cpu)
1609                         return priv->channel[i];
1610
1611         /* We should never get here. Issue a warning and return
1612          * the first channel, because it's still better than nothing
1613          */
1614         dev_warn(dev, "No affine channel found for cpu %d\n", cpu);
1615
1616         return priv->channel[0];
1617 }
1618
1619 static void set_fq_affinity(struct dpaa2_eth_priv *priv)
1620 {
1621         struct device *dev = priv->net_dev->dev.parent;
1622         struct cpumask xps_mask;
1623         struct dpaa2_eth_fq *fq;
1624         int rx_cpu, txc_cpu;
1625         int i, err;
1626
1627         /* For each FQ, pick one channel/CPU to deliver frames to.
1628          * This may well change at runtime, either through irqbalance or
1629          * through direct user intervention.
1630          */
1631         rx_cpu = txc_cpu = cpumask_first(&priv->dpio_cpumask);
1632
1633         for (i = 0; i < priv->num_fqs; i++) {
1634                 fq = &priv->fq[i];
1635                 switch (fq->type) {
1636                 case DPAA2_RX_FQ:
1637                         fq->target_cpu = rx_cpu;
1638                         rx_cpu = cpumask_next(rx_cpu, &priv->dpio_cpumask);
1639                         if (rx_cpu >= nr_cpu_ids)
1640                                 rx_cpu = cpumask_first(&priv->dpio_cpumask);
1641                         break;
1642                 case DPAA2_TX_CONF_FQ:
1643                         fq->target_cpu = txc_cpu;
1644
1645                         /* Tell the stack to affine to txc_cpu the Tx queue
1646                          * associated with the confirmation one
1647                          */
1648                         cpumask_clear(&xps_mask);
1649                         cpumask_set_cpu(txc_cpu, &xps_mask);
1650                         err = netif_set_xps_queue(priv->net_dev, &xps_mask,
1651                                                   fq->flowid);
1652                         if (err)
1653                                 dev_err(dev, "Error setting XPS queue\n");
1654
1655                         txc_cpu = cpumask_next(txc_cpu, &priv->dpio_cpumask);
1656                         if (txc_cpu >= nr_cpu_ids)
1657                                 txc_cpu = cpumask_first(&priv->dpio_cpumask);
1658                         break;
1659                 default:
1660                         dev_err(dev, "Unknown FQ type: %d\n", fq->type);
1661                 }
1662                 fq->channel = get_affine_channel(priv, fq->target_cpu);
1663         }
1664 }
1665
1666 static void setup_fqs(struct dpaa2_eth_priv *priv)
1667 {
1668         int i;
1669
1670         /* We have one TxConf FQ per Tx flow.
1671          * The number of Tx and Rx queues is the same.
1672          * Tx queues come first in the fq array.
1673          */
1674         for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
1675                 priv->fq[priv->num_fqs].type = DPAA2_TX_CONF_FQ;
1676                 priv->fq[priv->num_fqs].consume = dpaa2_eth_tx_conf;
1677                 priv->fq[priv->num_fqs++].flowid = (u16)i;
1678         }
1679
1680         for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
1681                 priv->fq[priv->num_fqs].type = DPAA2_RX_FQ;
1682                 priv->fq[priv->num_fqs].consume = dpaa2_eth_rx;
1683                 priv->fq[priv->num_fqs++].flowid = (u16)i;
1684         }
1685
1686         /* For each FQ, decide on which core to process incoming frames */
1687         set_fq_affinity(priv);
1688 }
1689
1690 /* Allocate and configure one buffer pool for each interface */
1691 static int setup_dpbp(struct dpaa2_eth_priv *priv)
1692 {
1693         int err;
1694         struct fsl_mc_device *dpbp_dev;
1695         struct device *dev = priv->net_dev->dev.parent;
1696         struct dpbp_attr dpbp_attrs;
1697
1698         err = fsl_mc_object_allocate(to_fsl_mc_device(dev), FSL_MC_POOL_DPBP,
1699                                      &dpbp_dev);
1700         if (err) {
1701                 dev_err(dev, "DPBP device allocation failed\n");
1702                 return err;
1703         }
1704
1705         priv->dpbp_dev = dpbp_dev;
1706
1707         err = dpbp_open(priv->mc_io, 0, priv->dpbp_dev->obj_desc.id,
1708                         &dpbp_dev->mc_handle);
1709         if (err) {
1710                 dev_err(dev, "dpbp_open() failed\n");
1711                 goto err_open;
1712         }
1713
1714         err = dpbp_reset(priv->mc_io, 0, dpbp_dev->mc_handle);
1715         if (err) {
1716                 dev_err(dev, "dpbp_reset() failed\n");
1717                 goto err_reset;
1718         }
1719
1720         err = dpbp_enable(priv->mc_io, 0, dpbp_dev->mc_handle);
1721         if (err) {
1722                 dev_err(dev, "dpbp_enable() failed\n");
1723                 goto err_enable;
1724         }
1725
1726         err = dpbp_get_attributes(priv->mc_io, 0, dpbp_dev->mc_handle,
1727                                   &dpbp_attrs);
1728         if (err) {
1729                 dev_err(dev, "dpbp_get_attributes() failed\n");
1730                 goto err_get_attr;
1731         }
1732         priv->bpid = dpbp_attrs.bpid;
1733
1734         return 0;
1735
1736 err_get_attr:
1737         dpbp_disable(priv->mc_io, 0, dpbp_dev->mc_handle);
1738 err_enable:
1739 err_reset:
1740         dpbp_close(priv->mc_io, 0, dpbp_dev->mc_handle);
1741 err_open:
1742         fsl_mc_object_free(dpbp_dev);
1743
1744         return err;
1745 }
1746
1747 static void free_dpbp(struct dpaa2_eth_priv *priv)
1748 {
1749         drain_pool(priv);
1750         dpbp_disable(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
1751         dpbp_close(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
1752         fsl_mc_object_free(priv->dpbp_dev);
1753 }
1754
1755 static int set_buffer_layout(struct dpaa2_eth_priv *priv)
1756 {
1757         struct device *dev = priv->net_dev->dev.parent;
1758         struct dpni_buffer_layout buf_layout = {0};
1759         int err;
1760
1761         /* We need to check for WRIOP version 1.0.0, but depending on the MC
1762          * version, this number is not always provided correctly on rev1.
1763          * We need to check for both alternatives in this situation.
1764          */
1765         if (priv->dpni_attrs.wriop_version == DPAA2_WRIOP_VERSION(0, 0, 0) ||
1766             priv->dpni_attrs.wriop_version == DPAA2_WRIOP_VERSION(1, 0, 0))
1767                 priv->rx_buf_align = DPAA2_ETH_RX_BUF_ALIGN_REV1;
1768         else
1769                 priv->rx_buf_align = DPAA2_ETH_RX_BUF_ALIGN;
1770
1771         /* tx buffer */
1772         buf_layout.private_data_size = DPAA2_ETH_SWA_SIZE;
1773         buf_layout.options = DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE;
1774         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
1775                                      DPNI_QUEUE_TX, &buf_layout);
1776         if (err) {
1777                 dev_err(dev, "dpni_set_buffer_layout(TX) failed\n");
1778                 return err;
1779         }
1780
1781         /* tx-confirm buffer */
1782         buf_layout.options = 0;
1783         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
1784                                      DPNI_QUEUE_TX_CONFIRM, &buf_layout);
1785         if (err) {
1786                 dev_err(dev, "dpni_set_buffer_layout(TX_CONF) failed\n");
1787                 return err;
1788         }
1789
1790         /* Now that we've set our tx buffer layout, retrieve the minimum
1791          * required tx data offset.
1792          */
1793         err = dpni_get_tx_data_offset(priv->mc_io, 0, priv->mc_token,
1794                                       &priv->tx_data_offset);
1795         if (err) {
1796                 dev_err(dev, "dpni_get_tx_data_offset() failed\n");
1797                 return err;
1798         }
1799
1800         if ((priv->tx_data_offset % 64) != 0)
1801                 dev_warn(dev, "Tx data offset (%d) not a multiple of 64B\n",
1802                          priv->tx_data_offset);
1803
1804         /* rx buffer */
1805         buf_layout.pass_frame_status = true;
1806         buf_layout.pass_parser_result = true;
1807         buf_layout.data_align = priv->rx_buf_align;
1808         buf_layout.data_head_room = dpaa2_eth_rx_head_room(priv);
1809         buf_layout.private_data_size = 0;
1810         buf_layout.options = DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
1811                              DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
1812                              DPNI_BUF_LAYOUT_OPT_DATA_ALIGN |
1813                              DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM;
1814         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
1815                                      DPNI_QUEUE_RX, &buf_layout);
1816         if (err) {
1817                 dev_err(dev, "dpni_set_buffer_layout(RX) failed\n");
1818                 return err;
1819         }
1820
1821         return 0;
1822 }
1823
1824 /* Configure the DPNI object this interface is associated with */
1825 static int setup_dpni(struct fsl_mc_device *ls_dev)
1826 {
1827         struct device *dev = &ls_dev->dev;
1828         struct dpaa2_eth_priv *priv;
1829         struct net_device *net_dev;
1830         int err;
1831
1832         net_dev = dev_get_drvdata(dev);
1833         priv = netdev_priv(net_dev);
1834
1835         /* get a handle for the DPNI object */
1836         err = dpni_open(priv->mc_io, 0, ls_dev->obj_desc.id, &priv->mc_token);
1837         if (err) {
1838                 dev_err(dev, "dpni_open() failed\n");
1839                 return err;
1840         }
1841
1842         /* Check if we can work with this DPNI object */
1843         err = dpni_get_api_version(priv->mc_io, 0, &priv->dpni_ver_major,
1844                                    &priv->dpni_ver_minor);
1845         if (err) {
1846                 dev_err(dev, "dpni_get_api_version() failed\n");
1847                 goto close;
1848         }
1849         if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_VER_MAJOR, DPNI_VER_MINOR) < 0) {
1850                 dev_err(dev, "DPNI version %u.%u not supported, need >= %u.%u\n",
1851                         priv->dpni_ver_major, priv->dpni_ver_minor,
1852                         DPNI_VER_MAJOR, DPNI_VER_MINOR);
1853                 err = -ENOTSUPP;
1854                 goto close;
1855         }
1856
1857         ls_dev->mc_io = priv->mc_io;
1858         ls_dev->mc_handle = priv->mc_token;
1859
1860         err = dpni_reset(priv->mc_io, 0, priv->mc_token);
1861         if (err) {
1862                 dev_err(dev, "dpni_reset() failed\n");
1863                 goto close;
1864         }
1865
1866         err = dpni_get_attributes(priv->mc_io, 0, priv->mc_token,
1867                                   &priv->dpni_attrs);
1868         if (err) {
1869                 dev_err(dev, "dpni_get_attributes() failed (err=%d)\n", err);
1870                 goto close;
1871         }
1872
1873         err = set_buffer_layout(priv);
1874         if (err)
1875                 goto close;
1876
1877         return 0;
1878
1879 close:
1880         dpni_close(priv->mc_io, 0, priv->mc_token);
1881
1882         return err;
1883 }
1884
1885 static void free_dpni(struct dpaa2_eth_priv *priv)
1886 {
1887         int err;
1888
1889         err = dpni_reset(priv->mc_io, 0, priv->mc_token);
1890         if (err)
1891                 netdev_warn(priv->net_dev, "dpni_reset() failed (err %d)\n",
1892                             err);
1893
1894         dpni_close(priv->mc_io, 0, priv->mc_token);
1895 }
1896
1897 static int setup_rx_flow(struct dpaa2_eth_priv *priv,
1898                          struct dpaa2_eth_fq *fq)
1899 {
1900         struct device *dev = priv->net_dev->dev.parent;
1901         struct dpni_queue queue;
1902         struct dpni_queue_id qid;
1903         struct dpni_taildrop td;
1904         int err;
1905
1906         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
1907                              DPNI_QUEUE_RX, 0, fq->flowid, &queue, &qid);
1908         if (err) {
1909                 dev_err(dev, "dpni_get_queue(RX) failed\n");
1910                 return err;
1911         }
1912
1913         fq->fqid = qid.fqid;
1914
1915         queue.destination.id = fq->channel->dpcon_id;
1916         queue.destination.type = DPNI_DEST_DPCON;
1917         queue.destination.priority = 1;
1918         queue.user_context = (u64)(uintptr_t)fq;
1919         err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
1920                              DPNI_QUEUE_RX, 0, fq->flowid,
1921                              DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
1922                              &queue);
1923         if (err) {
1924                 dev_err(dev, "dpni_set_queue(RX) failed\n");
1925                 return err;
1926         }
1927
1928         td.enable = 1;
1929         td.threshold = DPAA2_ETH_TAILDROP_THRESH;
1930         err = dpni_set_taildrop(priv->mc_io, 0, priv->mc_token, DPNI_CP_QUEUE,
1931                                 DPNI_QUEUE_RX, 0, fq->flowid, &td);
1932         if (err) {
1933                 dev_err(dev, "dpni_set_threshold() failed\n");
1934                 return err;
1935         }
1936
1937         return 0;
1938 }
1939
1940 static int setup_tx_flow(struct dpaa2_eth_priv *priv,
1941                          struct dpaa2_eth_fq *fq)
1942 {
1943         struct device *dev = priv->net_dev->dev.parent;
1944         struct dpni_queue queue;
1945         struct dpni_queue_id qid;
1946         int err;
1947
1948         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
1949                              DPNI_QUEUE_TX, 0, fq->flowid, &queue, &qid);
1950         if (err) {
1951                 dev_err(dev, "dpni_get_queue(TX) failed\n");
1952                 return err;
1953         }
1954
1955         fq->tx_qdbin = qid.qdbin;
1956
1957         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
1958                              DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
1959                              &queue, &qid);
1960         if (err) {
1961                 dev_err(dev, "dpni_get_queue(TX_CONF) failed\n");
1962                 return err;
1963         }
1964
1965         fq->fqid = qid.fqid;
1966
1967         queue.destination.id = fq->channel->dpcon_id;
1968         queue.destination.type = DPNI_DEST_DPCON;
1969         queue.destination.priority = 0;
1970         queue.user_context = (u64)(uintptr_t)fq;
1971         err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
1972                              DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
1973                              DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
1974                              &queue);
1975         if (err) {
1976                 dev_err(dev, "dpni_set_queue(TX_CONF) failed\n");
1977                 return err;
1978         }
1979
1980         return 0;
1981 }
1982
1983 /* Hash key is a 5-tuple: IPsrc, IPdst, IPnextproto, L4src, L4dst */
1984 static const struct dpaa2_eth_hash_fields hash_fields[] = {
1985         {
1986                 /* IP header */
1987                 .rxnfc_field = RXH_IP_SRC,
1988                 .cls_prot = NET_PROT_IP,
1989                 .cls_field = NH_FLD_IP_SRC,
1990                 .size = 4,
1991         }, {
1992                 .rxnfc_field = RXH_IP_DST,
1993                 .cls_prot = NET_PROT_IP,
1994                 .cls_field = NH_FLD_IP_DST,
1995                 .size = 4,
1996         }, {
1997                 .rxnfc_field = RXH_L3_PROTO,
1998                 .cls_prot = NET_PROT_IP,
1999                 .cls_field = NH_FLD_IP_PROTO,
2000                 .size = 1,
2001         }, {
2002                 /* Using UDP ports, this is functionally equivalent to raw
2003                  * byte pairs from L4 header.
2004                  */
2005                 .rxnfc_field = RXH_L4_B_0_1,
2006                 .cls_prot = NET_PROT_UDP,
2007                 .cls_field = NH_FLD_UDP_PORT_SRC,
2008                 .size = 2,
2009         }, {
2010                 .rxnfc_field = RXH_L4_B_2_3,
2011                 .cls_prot = NET_PROT_UDP,
2012                 .cls_field = NH_FLD_UDP_PORT_DST,
2013                 .size = 2,
2014         },
2015 };
2016
2017 /* Set RX hash options
2018  * flags is a combination of RXH_ bits
2019  */
2020 static int dpaa2_eth_set_hash(struct net_device *net_dev, u64 flags)
2021 {
2022         struct device *dev = net_dev->dev.parent;
2023         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2024         struct dpkg_profile_cfg cls_cfg;
2025         struct dpni_rx_tc_dist_cfg dist_cfg;
2026         u8 *dma_mem;
2027         int i;
2028         int err = 0;
2029
2030         if (!dpaa2_eth_hash_enabled(priv)) {
2031                 dev_dbg(dev, "Hashing support is not enabled\n");
2032                 return 0;
2033         }
2034
2035         memset(&cls_cfg, 0, sizeof(cls_cfg));
2036
2037         for (i = 0; i < ARRAY_SIZE(hash_fields); i++) {
2038                 struct dpkg_extract *key =
2039                         &cls_cfg.extracts[cls_cfg.num_extracts];
2040
2041                 if (!(flags & hash_fields[i].rxnfc_field))
2042                         continue;
2043
2044                 if (cls_cfg.num_extracts >= DPKG_MAX_NUM_OF_EXTRACTS) {
2045                         dev_err(dev, "error adding key extraction rule, too many rules?\n");
2046                         return -E2BIG;
2047                 }
2048
2049                 key->type = DPKG_EXTRACT_FROM_HDR;
2050                 key->extract.from_hdr.prot = hash_fields[i].cls_prot;
2051                 key->extract.from_hdr.type = DPKG_FULL_FIELD;
2052                 key->extract.from_hdr.field = hash_fields[i].cls_field;
2053                 cls_cfg.num_extracts++;
2054
2055                 priv->rx_hash_fields |= hash_fields[i].rxnfc_field;
2056         }
2057
2058         dma_mem = kzalloc(DPAA2_CLASSIFIER_DMA_SIZE, GFP_KERNEL);
2059         if (!dma_mem)
2060                 return -ENOMEM;
2061
2062         err = dpni_prepare_key_cfg(&cls_cfg, dma_mem);
2063         if (err) {
2064                 dev_err(dev, "dpni_prepare_key_cfg error %d\n", err);
2065                 goto err_prep_key;
2066         }
2067
2068         memset(&dist_cfg, 0, sizeof(dist_cfg));
2069
2070         /* Prepare for setting the rx dist */
2071         dist_cfg.key_cfg_iova = dma_map_single(dev, dma_mem,
2072                                                DPAA2_CLASSIFIER_DMA_SIZE,
2073                                                DMA_TO_DEVICE);
2074         if (dma_mapping_error(dev, dist_cfg.key_cfg_iova)) {
2075                 dev_err(dev, "DMA mapping failed\n");
2076                 err = -ENOMEM;
2077                 goto err_dma_map;
2078         }
2079
2080         dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
2081         dist_cfg.dist_mode = DPNI_DIST_MODE_HASH;
2082
2083         err = dpni_set_rx_tc_dist(priv->mc_io, 0, priv->mc_token, 0, &dist_cfg);
2084         dma_unmap_single(dev, dist_cfg.key_cfg_iova,
2085                          DPAA2_CLASSIFIER_DMA_SIZE, DMA_TO_DEVICE);
2086         if (err)
2087                 dev_err(dev, "dpni_set_rx_tc_dist() error %d\n", err);
2088
2089 err_dma_map:
2090 err_prep_key:
2091         kfree(dma_mem);
2092         return err;
2093 }
2094
2095 /* Bind the DPNI to its needed objects and resources: buffer pool, DPIOs,
2096  * frame queues and channels
2097  */
2098 static int bind_dpni(struct dpaa2_eth_priv *priv)
2099 {
2100         struct net_device *net_dev = priv->net_dev;
2101         struct device *dev = net_dev->dev.parent;
2102         struct dpni_pools_cfg pools_params;
2103         struct dpni_error_cfg err_cfg;
2104         int err = 0;
2105         int i;
2106
2107         pools_params.num_dpbp = 1;
2108         pools_params.pools[0].dpbp_id = priv->dpbp_dev->obj_desc.id;
2109         pools_params.pools[0].backup_pool = 0;
2110         pools_params.pools[0].buffer_size = DPAA2_ETH_RX_BUF_SIZE;
2111         err = dpni_set_pools(priv->mc_io, 0, priv->mc_token, &pools_params);
2112         if (err) {
2113                 dev_err(dev, "dpni_set_pools() failed\n");
2114                 return err;
2115         }
2116
2117         /* have the interface implicitly distribute traffic based on supported
2118          * header fields
2119          */
2120         err = dpaa2_eth_set_hash(net_dev, DPAA2_RXH_SUPPORTED);
2121         if (err)
2122                 dev_err(dev, "Failed to configure hashing\n");
2123
2124         /* Configure handling of error frames */
2125         err_cfg.errors = DPAA2_FAS_RX_ERR_MASK;
2126         err_cfg.set_frame_annotation = 1;
2127         err_cfg.error_action = DPNI_ERROR_ACTION_DISCARD;
2128         err = dpni_set_errors_behavior(priv->mc_io, 0, priv->mc_token,
2129                                        &err_cfg);
2130         if (err) {
2131                 dev_err(dev, "dpni_set_errors_behavior failed\n");
2132                 return err;
2133         }
2134
2135         /* Configure Rx and Tx conf queues to generate CDANs */
2136         for (i = 0; i < priv->num_fqs; i++) {
2137                 switch (priv->fq[i].type) {
2138                 case DPAA2_RX_FQ:
2139                         err = setup_rx_flow(priv, &priv->fq[i]);
2140                         break;
2141                 case DPAA2_TX_CONF_FQ:
2142                         err = setup_tx_flow(priv, &priv->fq[i]);
2143                         break;
2144                 default:
2145                         dev_err(dev, "Invalid FQ type %d\n", priv->fq[i].type);
2146                         return -EINVAL;
2147                 }
2148                 if (err)
2149                         return err;
2150         }
2151
2152         err = dpni_get_qdid(priv->mc_io, 0, priv->mc_token,
2153                             DPNI_QUEUE_TX, &priv->tx_qdid);
2154         if (err) {
2155                 dev_err(dev, "dpni_get_qdid() failed\n");
2156                 return err;
2157         }
2158
2159         return 0;
2160 }
2161
2162 /* Allocate rings for storing incoming frame descriptors */
2163 static int alloc_rings(struct dpaa2_eth_priv *priv)
2164 {
2165         struct net_device *net_dev = priv->net_dev;
2166         struct device *dev = net_dev->dev.parent;
2167         int i;
2168
2169         for (i = 0; i < priv->num_channels; i++) {
2170                 priv->channel[i]->store =
2171                         dpaa2_io_store_create(DPAA2_ETH_STORE_SIZE, dev);
2172                 if (!priv->channel[i]->store) {
2173                         netdev_err(net_dev, "dpaa2_io_store_create() failed\n");
2174                         goto err_ring;
2175                 }
2176         }
2177
2178         return 0;
2179
2180 err_ring:
2181         for (i = 0; i < priv->num_channels; i++) {
2182                 if (!priv->channel[i]->store)
2183                         break;
2184                 dpaa2_io_store_destroy(priv->channel[i]->store);
2185         }
2186
2187         return -ENOMEM;
2188 }
2189
2190 static void free_rings(struct dpaa2_eth_priv *priv)
2191 {
2192         int i;
2193
2194         for (i = 0; i < priv->num_channels; i++)
2195                 dpaa2_io_store_destroy(priv->channel[i]->store);
2196 }
2197
2198 static int set_mac_addr(struct dpaa2_eth_priv *priv)
2199 {
2200         struct net_device *net_dev = priv->net_dev;
2201         struct device *dev = net_dev->dev.parent;
2202         u8 mac_addr[ETH_ALEN], dpni_mac_addr[ETH_ALEN];
2203         int err;
2204
2205         /* Get firmware address, if any */
2206         err = dpni_get_port_mac_addr(priv->mc_io, 0, priv->mc_token, mac_addr);
2207         if (err) {
2208                 dev_err(dev, "dpni_get_port_mac_addr() failed\n");
2209                 return err;
2210         }
2211
2212         /* Get DPNI attributes address, if any */
2213         err = dpni_get_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
2214                                         dpni_mac_addr);
2215         if (err) {
2216                 dev_err(dev, "dpni_get_primary_mac_addr() failed\n");
2217                 return err;
2218         }
2219
2220         /* First check if firmware has any address configured by bootloader */
2221         if (!is_zero_ether_addr(mac_addr)) {
2222                 /* If the DPMAC addr != DPNI addr, update it */
2223                 if (!ether_addr_equal(mac_addr, dpni_mac_addr)) {
2224                         err = dpni_set_primary_mac_addr(priv->mc_io, 0,
2225                                                         priv->mc_token,
2226                                                         mac_addr);
2227                         if (err) {
2228                                 dev_err(dev, "dpni_set_primary_mac_addr() failed\n");
2229                                 return err;
2230                         }
2231                 }
2232                 memcpy(net_dev->dev_addr, mac_addr, net_dev->addr_len);
2233         } else if (is_zero_ether_addr(dpni_mac_addr)) {
2234                 /* No MAC address configured, fill in net_dev->dev_addr
2235                  * with a random one
2236                  */
2237                 eth_hw_addr_random(net_dev);
2238                 dev_dbg_once(dev, "device(s) have all-zero hwaddr, replaced with random\n");
2239
2240                 err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
2241                                                 net_dev->dev_addr);
2242                 if (err) {
2243                         dev_err(dev, "dpni_set_primary_mac_addr() failed\n");
2244                         return err;
2245                 }
2246
2247                 /* Override NET_ADDR_RANDOM set by eth_hw_addr_random(); for all
2248                  * practical purposes, this will be our "permanent" mac address,
2249                  * at least until the next reboot. This move will also permit
2250                  * register_netdevice() to properly fill up net_dev->perm_addr.
2251                  */
2252                 net_dev->addr_assign_type = NET_ADDR_PERM;
2253         } else {
2254                 /* NET_ADDR_PERM is default, all we have to do is
2255                  * fill in the device addr.
2256                  */
2257                 memcpy(net_dev->dev_addr, dpni_mac_addr, net_dev->addr_len);
2258         }
2259
2260         return 0;
2261 }
2262
2263 static int netdev_init(struct net_device *net_dev)
2264 {
2265         struct device *dev = net_dev->dev.parent;
2266         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2267         u8 bcast_addr[ETH_ALEN];
2268         u8 num_queues;
2269         int err;
2270
2271         net_dev->netdev_ops = &dpaa2_eth_ops;
2272
2273         err = set_mac_addr(priv);
2274         if (err)
2275                 return err;
2276
2277         /* Explicitly add the broadcast address to the MAC filtering table */
2278         eth_broadcast_addr(bcast_addr);
2279         err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token, bcast_addr);
2280         if (err) {
2281                 dev_err(dev, "dpni_add_mac_addr() failed\n");
2282                 return err;
2283         }
2284
2285         /* Set MTU limits */
2286         net_dev->min_mtu = 68;
2287         net_dev->max_mtu = DPAA2_ETH_MAX_MTU;
2288
2289         /* Set actual number of queues in the net device */
2290         num_queues = dpaa2_eth_queue_count(priv);
2291         err = netif_set_real_num_tx_queues(net_dev, num_queues);
2292         if (err) {
2293                 dev_err(dev, "netif_set_real_num_tx_queues() failed\n");
2294                 return err;
2295         }
2296         err = netif_set_real_num_rx_queues(net_dev, num_queues);
2297         if (err) {
2298                 dev_err(dev, "netif_set_real_num_rx_queues() failed\n");
2299                 return err;
2300         }
2301
2302         /* Our .ndo_init will be called herein */
2303         err = register_netdev(net_dev);
2304         if (err < 0) {
2305                 dev_err(dev, "register_netdev() failed\n");
2306                 return err;
2307         }
2308
2309         return 0;
2310 }
2311
2312 static int poll_link_state(void *arg)
2313 {
2314         struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)arg;
2315         int err;
2316
2317         while (!kthread_should_stop()) {
2318                 err = link_state_update(priv);
2319                 if (unlikely(err))
2320                         return err;
2321
2322                 msleep(DPAA2_ETH_LINK_STATE_REFRESH);
2323         }
2324
2325         return 0;
2326 }
2327
2328 static irqreturn_t dpni_irq0_handler_thread(int irq_num, void *arg)
2329 {
2330         u32 status = ~0;
2331         struct device *dev = (struct device *)arg;
2332         struct fsl_mc_device *dpni_dev = to_fsl_mc_device(dev);
2333         struct net_device *net_dev = dev_get_drvdata(dev);
2334         int err;
2335
2336         err = dpni_get_irq_status(dpni_dev->mc_io, 0, dpni_dev->mc_handle,
2337                                   DPNI_IRQ_INDEX, &status);
2338         if (unlikely(err)) {
2339                 netdev_err(net_dev, "Can't get irq status (err %d)\n", err);
2340                 return IRQ_HANDLED;
2341         }
2342
2343         if (status & DPNI_IRQ_EVENT_LINK_CHANGED)
2344                 link_state_update(netdev_priv(net_dev));
2345
2346         return IRQ_HANDLED;
2347 }
2348
2349 static int setup_irqs(struct fsl_mc_device *ls_dev)
2350 {
2351         int err = 0;
2352         struct fsl_mc_device_irq *irq;
2353
2354         err = fsl_mc_allocate_irqs(ls_dev);
2355         if (err) {
2356                 dev_err(&ls_dev->dev, "MC irqs allocation failed\n");
2357                 return err;
2358         }
2359
2360         irq = ls_dev->irqs[0];
2361         err = devm_request_threaded_irq(&ls_dev->dev, irq->msi_desc->irq,
2362                                         NULL, dpni_irq0_handler_thread,
2363                                         IRQF_NO_SUSPEND | IRQF_ONESHOT,
2364                                         dev_name(&ls_dev->dev), &ls_dev->dev);
2365         if (err < 0) {
2366                 dev_err(&ls_dev->dev, "devm_request_threaded_irq(): %d\n", err);
2367                 goto free_mc_irq;
2368         }
2369
2370         err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle,
2371                                 DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED);
2372         if (err < 0) {
2373                 dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d\n", err);
2374                 goto free_irq;
2375         }
2376
2377         err = dpni_set_irq_enable(ls_dev->mc_io, 0, ls_dev->mc_handle,
2378                                   DPNI_IRQ_INDEX, 1);
2379         if (err < 0) {
2380                 dev_err(&ls_dev->dev, "dpni_set_irq_enable(): %d\n", err);
2381                 goto free_irq;
2382         }
2383
2384         return 0;
2385
2386 free_irq:
2387         devm_free_irq(&ls_dev->dev, irq->msi_desc->irq, &ls_dev->dev);
2388 free_mc_irq:
2389         fsl_mc_free_irqs(ls_dev);
2390
2391         return err;
2392 }
2393
2394 static void add_ch_napi(struct dpaa2_eth_priv *priv)
2395 {
2396         int i;
2397         struct dpaa2_eth_channel *ch;
2398
2399         for (i = 0; i < priv->num_channels; i++) {
2400                 ch = priv->channel[i];
2401                 /* NAPI weight *MUST* be a multiple of DPAA2_ETH_STORE_SIZE */
2402                 netif_napi_add(priv->net_dev, &ch->napi, dpaa2_eth_poll,
2403                                NAPI_POLL_WEIGHT);
2404         }
2405 }
2406
2407 static void del_ch_napi(struct dpaa2_eth_priv *priv)
2408 {
2409         int i;
2410         struct dpaa2_eth_channel *ch;
2411
2412         for (i = 0; i < priv->num_channels; i++) {
2413                 ch = priv->channel[i];
2414                 netif_napi_del(&ch->napi);
2415         }
2416 }
2417
2418 static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)
2419 {
2420         struct device *dev;
2421         struct net_device *net_dev = NULL;
2422         struct dpaa2_eth_priv *priv = NULL;
2423         int err = 0;
2424
2425         dev = &dpni_dev->dev;
2426
2427         /* Net device */
2428         net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA2_ETH_MAX_TX_QUEUES);
2429         if (!net_dev) {
2430                 dev_err(dev, "alloc_etherdev_mq() failed\n");
2431                 return -ENOMEM;
2432         }
2433
2434         SET_NETDEV_DEV(net_dev, dev);
2435         dev_set_drvdata(dev, net_dev);
2436
2437         priv = netdev_priv(net_dev);
2438         priv->net_dev = net_dev;
2439
2440         priv->iommu_domain = iommu_get_domain_for_dev(dev);
2441
2442         /* Obtain a MC portal */
2443         err = fsl_mc_portal_allocate(dpni_dev, FSL_MC_IO_ATOMIC_CONTEXT_PORTAL,
2444                                      &priv->mc_io);
2445         if (err) {
2446                 if (err == -ENXIO)
2447                         err = -EPROBE_DEFER;
2448                 else
2449                         dev_err(dev, "MC portal allocation failed\n");
2450                 goto err_portal_alloc;
2451         }
2452
2453         /* MC objects initialization and configuration */
2454         err = setup_dpni(dpni_dev);
2455         if (err)
2456                 goto err_dpni_setup;
2457
2458         err = setup_dpio(priv);
2459         if (err)
2460                 goto err_dpio_setup;
2461
2462         setup_fqs(priv);
2463
2464         err = setup_dpbp(priv);
2465         if (err)
2466                 goto err_dpbp_setup;
2467
2468         err = bind_dpni(priv);
2469         if (err)
2470                 goto err_bind;
2471
2472         /* Add a NAPI context for each channel */
2473         add_ch_napi(priv);
2474
2475         /* Percpu statistics */
2476         priv->percpu_stats = alloc_percpu(*priv->percpu_stats);
2477         if (!priv->percpu_stats) {
2478                 dev_err(dev, "alloc_percpu(percpu_stats) failed\n");
2479                 err = -ENOMEM;
2480                 goto err_alloc_percpu_stats;
2481         }
2482         priv->percpu_extras = alloc_percpu(*priv->percpu_extras);
2483         if (!priv->percpu_extras) {
2484                 dev_err(dev, "alloc_percpu(percpu_extras) failed\n");
2485                 err = -ENOMEM;
2486                 goto err_alloc_percpu_extras;
2487         }
2488
2489         err = netdev_init(net_dev);
2490         if (err)
2491                 goto err_netdev_init;
2492
2493         /* Configure checksum offload based on current interface flags */
2494         err = set_rx_csum(priv, !!(net_dev->features & NETIF_F_RXCSUM));
2495         if (err)
2496                 goto err_csum;
2497
2498         err = set_tx_csum(priv, !!(net_dev->features &
2499                                    (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)));
2500         if (err)
2501                 goto err_csum;
2502
2503         err = alloc_rings(priv);
2504         if (err)
2505                 goto err_alloc_rings;
2506
2507         net_dev->ethtool_ops = &dpaa2_ethtool_ops;
2508
2509         err = setup_irqs(dpni_dev);
2510         if (err) {
2511                 netdev_warn(net_dev, "Failed to set link interrupt, fall back to polling\n");
2512                 priv->poll_thread = kthread_run(poll_link_state, priv,
2513                                                 "%s_poll_link", net_dev->name);
2514                 if (IS_ERR(priv->poll_thread)) {
2515                         netdev_err(net_dev, "Error starting polling thread\n");
2516                         goto err_poll_thread;
2517                 }
2518                 priv->do_link_poll = true;
2519         }
2520
2521         dev_info(dev, "Probed interface %s\n", net_dev->name);
2522         return 0;
2523
2524 err_poll_thread:
2525         free_rings(priv);
2526 err_alloc_rings:
2527 err_csum:
2528         unregister_netdev(net_dev);
2529 err_netdev_init:
2530         free_percpu(priv->percpu_extras);
2531 err_alloc_percpu_extras:
2532         free_percpu(priv->percpu_stats);
2533 err_alloc_percpu_stats:
2534         del_ch_napi(priv);
2535 err_bind:
2536         free_dpbp(priv);
2537 err_dpbp_setup:
2538         free_dpio(priv);
2539 err_dpio_setup:
2540         free_dpni(priv);
2541 err_dpni_setup:
2542         fsl_mc_portal_free(priv->mc_io);
2543 err_portal_alloc:
2544         dev_set_drvdata(dev, NULL);
2545         free_netdev(net_dev);
2546
2547         return err;
2548 }
2549
2550 static int dpaa2_eth_remove(struct fsl_mc_device *ls_dev)
2551 {
2552         struct device *dev;
2553         struct net_device *net_dev;
2554         struct dpaa2_eth_priv *priv;
2555
2556         dev = &ls_dev->dev;
2557         net_dev = dev_get_drvdata(dev);
2558         priv = netdev_priv(net_dev);
2559
2560         unregister_netdev(net_dev);
2561
2562         if (priv->do_link_poll)
2563                 kthread_stop(priv->poll_thread);
2564         else
2565                 fsl_mc_free_irqs(ls_dev);
2566
2567         free_rings(priv);
2568         free_percpu(priv->percpu_stats);
2569         free_percpu(priv->percpu_extras);
2570
2571         del_ch_napi(priv);
2572         free_dpbp(priv);
2573         free_dpio(priv);
2574         free_dpni(priv);
2575
2576         fsl_mc_portal_free(priv->mc_io);
2577
2578         dev_set_drvdata(dev, NULL);
2579         free_netdev(net_dev);
2580
2581         dev_info(net_dev->dev.parent, "Removed interface %s\n", net_dev->name);
2582
2583         return 0;
2584 }
2585
2586 static const struct fsl_mc_device_id dpaa2_eth_match_id_table[] = {
2587         {
2588                 .vendor = FSL_MC_VENDOR_FREESCALE,
2589                 .obj_type = "dpni",
2590         },
2591         { .vendor = 0x0 }
2592 };
2593 MODULE_DEVICE_TABLE(fslmc, dpaa2_eth_match_id_table);
2594
2595 static struct fsl_mc_driver dpaa2_eth_driver = {
2596         .driver = {
2597                 .name = KBUILD_MODNAME,
2598                 .owner = THIS_MODULE,
2599         },
2600         .probe = dpaa2_eth_probe,
2601         .remove = dpaa2_eth_remove,
2602         .match_id_table = dpaa2_eth_match_id_table
2603 };
2604
2605 module_fsl_mc_driver(dpaa2_eth_driver);