2 * FB driver for the ILI9325 LCD Controller
4 * Copyright (C) 2013 Noralf Tronnes
6 * Based on ili9325.c by Jeroen Domburg
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/gpio.h>
23 #include <linux/delay.h>
27 #define DRVNAME "fb_ili9325"
32 #define DEFAULT_GAMMA "0F 00 7 2 0 0 6 5 4 1\n" \
33 "04 16 2 7 6 3 2 1 7 7"
35 static unsigned int bt = 6; /* VGL=Vci*4 , VGH=Vci*4 */
36 module_param(bt, uint, 0000);
37 MODULE_PARM_DESC(bt, "Sets the factor used in the step-up circuits");
39 static unsigned int vc = 0x03; /* Vci1=Vci*0.80 */
40 module_param(vc, uint, 0000);
41 MODULE_PARM_DESC(vc, "Sets the ratio factor of Vci to generate the reference voltages Vci1");
43 static unsigned int vrh = 0x0d; /* VREG1OUT=Vci*1.85 */
44 module_param(vrh, uint, 0000);
45 MODULE_PARM_DESC(vrh, "Set the amplifying rate (1.6 ~ 1.9) of Vci applied to output the VREG1OUT");
47 static unsigned int vdv = 0x12; /* VCOMH amplitude=VREG1OUT*0.98 */
48 module_param(vdv, uint, 0000);
49 MODULE_PARM_DESC(vdv, "Select the factor of VREG1OUT to set the amplitude of Vcom");
51 static unsigned int vcm = 0x0a; /* VCOMH=VREG1OUT*0.735 */
52 module_param(vcm, uint, 0000);
53 MODULE_PARM_DESC(vcm, "Set the internal VcomH voltage");
56 * Verify that this configuration is within the Voltage limits
58 * Display module configuration: Vcc = IOVcc = Vci = 3.3V
63 * Vci1 = Vci * 0.80 = 2.64
64 * DDVDH = Vci1 * 2 = 5.28
66 * VREG1OUT = Vci * 1.85 = 4.88
67 * VCOMH = VREG1OUT * 0.735 = 3.59
68 * VCOM amplitude = VREG1OUT * 0.98 = 4.79
69 * VGH = Vci * 4 = 13.2
70 * VGL = -Vci * 4 = -13.2
75 * 1.65 < IOVcc < 3.30 => 1.65 < 3.3 < 3.30
76 * 2.40 < Vcc < 3.30 => 2.40 < 3.3 < 3.30
77 * 2.50 < Vci < 3.30 => 2.50 < 3.3 < 3.30
79 * Source/VCOM power supply voltage
80 * 4.50 < DDVDH < 6.0 => 4.50 < 5.28 < 6.0
81 * -3.0 < VCL < -2.0 => -3.0 < -2.64 < -2.0
82 * VCI - VCL < 6.0 => 5.94 < 6.0
84 * Gate driver output voltage
85 * 10 < VGH < 20 => 10 < 13.2 < 20
86 * -15 < VGL < -5 => -15 < -13.2 < -5
87 * VGH - VGL < 32 => 26.4 < 32
89 * VCOM driver output voltage
90 * VCOMH - VCOML < 6.0 => 4.79 < 6.0
93 static int init_display(struct fbtft_par *par)
95 par->fbtftops.reset(par);
97 if (par->gpio.cs != -1)
98 gpio_set_value(par->gpio.cs, 0); /* Activate chip */
106 /* Initialization sequence from ILI9325 Application Notes */
108 /* ----------- Start Initial Sequence ----------- */
109 write_reg(par, 0x00E3, 0x3008); /* Set internal timing */
110 write_reg(par, 0x00E7, 0x0012); /* Set internal timing */
111 write_reg(par, 0x00EF, 0x1231); /* Set internal timing */
112 write_reg(par, 0x0001, 0x0100); /* set SS and SM bit */
113 write_reg(par, 0x0002, 0x0700); /* set 1 line inversion */
114 write_reg(par, 0x0004, 0x0000); /* Resize register */
115 write_reg(par, 0x0008, 0x0207); /* set the back porch and front porch */
116 write_reg(par, 0x0009, 0x0000); /* set non-display area refresh cycle */
117 write_reg(par, 0x000A, 0x0000); /* FMARK function */
118 write_reg(par, 0x000C, 0x0000); /* RGB interface setting */
119 write_reg(par, 0x000D, 0x0000); /* Frame marker Position */
120 write_reg(par, 0x000F, 0x0000); /* RGB interface polarity */
122 /* ----------- Power On sequence ----------- */
123 write_reg(par, 0x0010, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
124 write_reg(par, 0x0011, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */
125 write_reg(par, 0x0012, 0x0000); /* VREG1OUT voltage */
126 write_reg(par, 0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */
127 mdelay(200); /* Dis-charge capacitor power voltage */
128 write_reg(par, 0x0010, /* SAP, BT[3:0], AP, DSTB, SLP, STB */
129 BIT(12) | (bt << 8) | BIT(7) | BIT(4));
130 write_reg(par, 0x0011, 0x220 | vc); /* DC1[2:0], DC0[2:0], VC[2:0] */
131 mdelay(50); /* Delay 50ms */
132 write_reg(par, 0x0012, vrh); /* Internal reference voltage= Vci; */
133 mdelay(50); /* Delay 50ms */
134 write_reg(par, 0x0013, vdv << 8); /* Set VDV[4:0] for VCOM amplitude */
135 write_reg(par, 0x0029, vcm); /* Set VCM[5:0] for VCOMH */
136 write_reg(par, 0x002B, 0x000C); /* Set Frame Rate */
137 mdelay(50); /* Delay 50ms */
138 write_reg(par, 0x0020, 0x0000); /* GRAM horizontal Address */
139 write_reg(par, 0x0021, 0x0000); /* GRAM Vertical Address */
141 /*------------------ Set GRAM area --------------- */
142 write_reg(par, 0x0050, 0x0000); /* Horizontal GRAM Start Address */
143 write_reg(par, 0x0051, 0x00EF); /* Horizontal GRAM End Address */
144 write_reg(par, 0x0052, 0x0000); /* Vertical GRAM Start Address */
145 write_reg(par, 0x0053, 0x013F); /* Vertical GRAM Start Address */
146 write_reg(par, 0x0060, 0xA700); /* Gate Scan Line */
147 write_reg(par, 0x0061, 0x0001); /* NDL,VLE, REV */
148 write_reg(par, 0x006A, 0x0000); /* set scrolling line */
150 /*-------------- Partial Display Control --------- */
151 write_reg(par, 0x0080, 0x0000);
152 write_reg(par, 0x0081, 0x0000);
153 write_reg(par, 0x0082, 0x0000);
154 write_reg(par, 0x0083, 0x0000);
155 write_reg(par, 0x0084, 0x0000);
156 write_reg(par, 0x0085, 0x0000);
158 /*-------------- Panel Control ------------------- */
159 write_reg(par, 0x0090, 0x0010);
160 write_reg(par, 0x0092, 0x0600);
161 write_reg(par, 0x0007, 0x0133); /* 262K color and display ON */
166 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
168 switch (par->info->var.rotate) {
169 /* R20h = Horizontal GRAM Start Address */
170 /* R21h = Vertical GRAM Start Address */
172 write_reg(par, 0x0020, xs);
173 write_reg(par, 0x0021, ys);
176 write_reg(par, 0x0020, WIDTH - 1 - xs);
177 write_reg(par, 0x0021, HEIGHT - 1 - ys);
180 write_reg(par, 0x0020, WIDTH - 1 - ys);
181 write_reg(par, 0x0021, xs);
184 write_reg(par, 0x0020, ys);
185 write_reg(par, 0x0021, HEIGHT - 1 - xs);
188 write_reg(par, 0x0022); /* Write Data to GRAM */
191 static int set_var(struct fbtft_par *par)
193 switch (par->info->var.rotate) {
194 /* AM: GRAM update direction */
196 write_reg(par, 0x03, 0x0030 | (par->bgr << 12));
199 write_reg(par, 0x03, 0x0000 | (par->bgr << 12));
202 write_reg(par, 0x03, 0x0028 | (par->bgr << 12));
205 write_reg(par, 0x03, 0x0018 | (par->bgr << 12));
213 * Gamma string format:
214 * VRP0 VRP1 RP0 RP1 KP0 KP1 KP2 KP3 KP4 KP5
215 * VRN0 VRN1 RN0 RN1 KN0 KN1 KN2 KN3 KN4 KN5
217 #define CURVE(num, idx) curves[num * par->gamma.num_values + idx]
218 static int set_gamma(struct fbtft_par *par, u32 *curves)
220 unsigned long mask[] = {
221 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
222 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
227 for (i = 0; i < 2; i++)
228 for (j = 0; j < 10; j++)
229 CURVE(i, j) &= mask[i * par->gamma.num_values + j];
231 write_reg(par, 0x0030, CURVE(0, 5) << 8 | CURVE(0, 4));
232 write_reg(par, 0x0031, CURVE(0, 7) << 8 | CURVE(0, 6));
233 write_reg(par, 0x0032, CURVE(0, 9) << 8 | CURVE(0, 8));
234 write_reg(par, 0x0035, CURVE(0, 3) << 8 | CURVE(0, 2));
235 write_reg(par, 0x0036, CURVE(0, 1) << 8 | CURVE(0, 0));
237 write_reg(par, 0x0037, CURVE(1, 5) << 8 | CURVE(1, 4));
238 write_reg(par, 0x0038, CURVE(1, 7) << 8 | CURVE(1, 6));
239 write_reg(par, 0x0039, CURVE(1, 9) << 8 | CURVE(1, 8));
240 write_reg(par, 0x003C, CURVE(1, 3) << 8 | CURVE(1, 2));
241 write_reg(par, 0x003D, CURVE(1, 1) << 8 | CURVE(1, 0));
248 static struct fbtft_display display = {
256 .gamma = DEFAULT_GAMMA,
258 .init_display = init_display,
259 .set_addr_win = set_addr_win,
261 .set_gamma = set_gamma,
265 FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9325", &display);
267 MODULE_ALIAS("spi:" DRVNAME);
268 MODULE_ALIAS("platform:" DRVNAME);
269 MODULE_ALIAS("spi:ili9325");
270 MODULE_ALIAS("platform:ili9325");
272 MODULE_DESCRIPTION("FB driver for the ILI9325 LCD Controller");
273 MODULE_AUTHOR("Noralf Tronnes");
274 MODULE_LICENSE("GPL");