1 // SPDX-License-Identifier: GPL-2.0
3 * comedi/drivers/adv_pci_dio.c
5 * Author: Michal Dobes <dobes@tesnet.cz>
7 * Hardware driver for Advantech PCI DIO cards.
12 * Description: Advantech Digital I/O Cards
13 * Devices: [Advantech] PCI-1730 (adv_pci_dio), PCI-1733,
14 * PCI-1734, PCI-1735U, PCI-1736UP, PCI-1739U, PCI-1750,
15 * PCI-1751, PCI-1752, PCI-1753, PCI-1753+PCI-1753E,
16 * PCI-1754, PCI-1756, PCI-1761, PCI-1762
17 * Author: Michal Dobes <dobes@tesnet.cz>
18 * Updated: Fri, 25 Aug 2017 07:23:06 +0300
21 * Configuration Options: not applicable, uses PCI auto config
24 #include <linux/module.h>
25 #include <linux/delay.h>
27 #include "../comedi_pci.h"
30 #include "comedi_8254.h"
33 * Register offset definitions
36 /* PCI-1730, PCI-1733, PCI-1736 interrupt control registers */
37 #define PCI173X_INT_EN_REG 0x08 /* R/W: enable/disable */
38 #define PCI173X_INT_RF_REG 0x0c /* R/W: falling/rising edge */
39 #define PCI173X_INT_CLR_REG 0x10 /* R/W: clear */
41 /* PCI-1739U, PCI-1750, PCI1751 interrupt control registers */
42 #define PCI1750_INT_REG 0x20 /* R/W: status/control */
44 /* PCI-1753, PCI-1753E interrupt control registers */
45 #define PCI1753_INT_REG(x) (0x10 + (x)) /* R/W: control group 0 to 3 */
46 #define PCI1753E_INT_REG(x) (0x30 + (x)) /* R/W: control group 0 to 3 */
48 /* PCI-1754, PCI-1756 interrupt control registers */
49 #define PCI1754_INT_REG(x) (0x08 + (x) * 2) /* R/W: control group 0 to 3 */
51 /* PCI-1752, PCI-1756 special registers */
52 #define PCI1752_CFC_REG 0x12 /* R/W: channel freeze function */
54 /* PCI-1761 interrupt control registers */
55 #define PCI1761_INT_EN_REG 0x03 /* R/W: enable/disable interrupts */
56 #define PCI1761_INT_RF_REG 0x04 /* R/W: falling/rising edge */
57 #define PCI1761_INT_CLR_REG 0x05 /* R/W: clear interrupts */
59 /* PCI-1762 interrupt control registers */
60 #define PCI1762_INT_REG 0x06 /* R/W: status/control */
62 /* maximum number of subdevice descriptions in the boardinfo */
63 #define PCI_DIO_MAX_DI_SUBDEVS 2 /* 2 x 8/16/32 input channels max */
64 #define PCI_DIO_MAX_DO_SUBDEVS 2 /* 2 x 8/16/32 output channels max */
65 #define PCI_DIO_MAX_DIO_SUBDEVG 2 /* 2 x any number of 8255 devices max */
67 enum pci_dio_boardid {
86 int chans; /* num of chans or 8255 devices */
87 unsigned long addr; /* PCI address ofset */
90 struct dio_boardtype {
91 const char *name; /* board name */
93 struct diosubd_data sdi[PCI_DIO_MAX_DI_SUBDEVS];
94 struct diosubd_data sdo[PCI_DIO_MAX_DO_SUBDEVS];
95 struct diosubd_data sdio[PCI_DIO_MAX_DIO_SUBDEVG];
97 unsigned long timer_regbase;
98 unsigned int is_16bit:1;
101 static const struct dio_boardtype boardtypes[] = {
105 .sdi[0] = { 16, 0x02, }, /* DI 0-15 */
106 .sdi[1] = { 16, 0x00, }, /* ISO DI 0-15 */
107 .sdo[0] = { 16, 0x02, }, /* DO 0-15 */
108 .sdo[1] = { 16, 0x00, }, /* ISO DO 0-15 */
114 .sdi[1] = { 32, 0x00, }, /* ISO DI 0-31 */
120 .sdo[1] = { 32, 0x00, }, /* ISO DO 0-31 */
126 .sdi[0] = { 32, 0x00, }, /* DI 0-31 */
127 .sdo[0] = { 32, 0x00, }, /* DO 0-31 */
129 .timer_regbase = 0x04,
134 .sdi[1] = { 16, 0x00, }, /* ISO DI 0-15 */
135 .sdo[1] = { 16, 0x00, }, /* ISO DO 0-15 */
141 .sdio[0] = { 2, 0x00, }, /* 8255 DIO */
147 .sdi[1] = { 16, 0x00, }, /* ISO DI 0-15 */
148 .sdo[1] = { 16, 0x00, }, /* ISO DO 0-15 */
153 .sdio[0] = { 2, 0x00, }, /* 8255 DIO */
154 .timer_regbase = 0x18,
159 .sdo[0] = { 32, 0x00, }, /* DO 0-31 */
160 .sdo[1] = { 32, 0x04, }, /* DO 32-63 */
167 .sdio[0] = { 4, 0x00, }, /* 8255 DIO */
172 .sdio[0] = { 4, 0x00, }, /* 8255 DIO */
173 .sdio[1] = { 4, 0x20, }, /* 8255 DIO */
178 .sdi[0] = { 32, 0x00, }, /* DI 0-31 */
179 .sdi[1] = { 32, 0x04, }, /* DI 32-63 */
186 .sdi[1] = { 32, 0x00, }, /* DI 0-31 */
187 .sdo[1] = { 32, 0x04, }, /* DO 0-31 */
194 .sdi[1] = { 8, 0x01 }, /* ISO DI 0-7 */
195 .sdo[1] = { 8, 0x00 }, /* RELAY DO 0-7 */
201 .sdi[1] = { 16, 0x02, }, /* ISO DI 0-15 */
202 .sdo[1] = { 16, 0x00, }, /* ISO DO 0-15 */
208 static int pci_dio_insn_bits_di_b(struct comedi_device *dev,
209 struct comedi_subdevice *s,
210 struct comedi_insn *insn,
213 unsigned long reg = (unsigned long)s->private;
214 unsigned long iobase = dev->iobase + reg;
216 data[1] = inb(iobase);
218 data[1] |= (inb(iobase + 1) << 8);
220 data[1] |= (inb(iobase + 2) << 16);
222 data[1] |= (inb(iobase + 3) << 24);
227 static int pci_dio_insn_bits_di_w(struct comedi_device *dev,
228 struct comedi_subdevice *s,
229 struct comedi_insn *insn,
232 unsigned long reg = (unsigned long)s->private;
233 unsigned long iobase = dev->iobase + reg;
235 data[1] = inw(iobase);
237 data[1] |= (inw(iobase + 2) << 16);
242 static int pci_dio_insn_bits_do_b(struct comedi_device *dev,
243 struct comedi_subdevice *s,
244 struct comedi_insn *insn,
247 unsigned long reg = (unsigned long)s->private;
248 unsigned long iobase = dev->iobase + reg;
250 if (comedi_dio_update_state(s, data)) {
251 outb(s->state & 0xff, iobase);
253 outb((s->state >> 8) & 0xff, iobase + 1);
255 outb((s->state >> 16) & 0xff, iobase + 2);
257 outb((s->state >> 24) & 0xff, iobase + 3);
265 static int pci_dio_insn_bits_do_w(struct comedi_device *dev,
266 struct comedi_subdevice *s,
267 struct comedi_insn *insn,
270 unsigned long reg = (unsigned long)s->private;
271 unsigned long iobase = dev->iobase + reg;
273 if (comedi_dio_update_state(s, data)) {
274 outw(s->state & 0xffff, iobase);
276 outw((s->state >> 16) & 0xffff, iobase + 2);
284 static int pci_dio_reset(struct comedi_device *dev, unsigned long cardtype)
286 /* disable channel freeze function on the PCI-1752/1756 boards */
287 if (cardtype == TYPE_PCI1752 || cardtype == TYPE_PCI1756)
288 outw(0, dev->iobase + PCI1752_CFC_REG);
290 /* disable and clear interrupts */
295 outb(0, dev->iobase + PCI173X_INT_EN_REG);
296 outb(0x0f, dev->iobase + PCI173X_INT_CLR_REG);
297 outb(0, dev->iobase + PCI173X_INT_RF_REG);
302 outb(0x88, dev->iobase + PCI1750_INT_REG);
306 outb(0x88, dev->iobase + PCI1753_INT_REG(0));
307 outb(0x80, dev->iobase + PCI1753_INT_REG(1));
308 outb(0x80, dev->iobase + PCI1753_INT_REG(2));
309 outb(0x80, dev->iobase + PCI1753_INT_REG(3));
310 if (cardtype == TYPE_PCI1753E) {
311 outb(0x88, dev->iobase + PCI1753E_INT_REG(0));
312 outb(0x80, dev->iobase + PCI1753E_INT_REG(1));
313 outb(0x80, dev->iobase + PCI1753E_INT_REG(2));
314 outb(0x80, dev->iobase + PCI1753E_INT_REG(3));
319 outw(0x08, dev->iobase + PCI1754_INT_REG(0));
320 outw(0x08, dev->iobase + PCI1754_INT_REG(1));
321 if (cardtype == TYPE_PCI1754) {
322 outw(0x08, dev->iobase + PCI1754_INT_REG(2));
323 outw(0x08, dev->iobase + PCI1754_INT_REG(3));
327 /* disable interrupts */
328 outb(0, dev->iobase + PCI1761_INT_EN_REG);
329 /* clear interrupts */
330 outb(0xff, dev->iobase + PCI1761_INT_CLR_REG);
331 /* set rising edge trigger */
332 outb(0, dev->iobase + PCI1761_INT_RF_REG);
335 outw(0x0101, dev->iobase + PCI1762_INT_REG);
344 static int pci_dio_auto_attach(struct comedi_device *dev,
345 unsigned long context)
347 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
348 const struct dio_boardtype *board = NULL;
349 const struct diosubd_data *d;
350 struct comedi_subdevice *s;
351 int ret, subdev, i, j;
353 if (context < ARRAY_SIZE(boardtypes))
354 board = &boardtypes[context];
357 dev->board_ptr = board;
358 dev->board_name = board->name;
360 ret = comedi_pci_enable(dev);
363 if (context == TYPE_PCI1736)
364 dev->iobase = pci_resource_start(pcidev, 0);
366 dev->iobase = pci_resource_start(pcidev, 2);
368 pci_dio_reset(dev, context);
370 ret = comedi_alloc_subdevices(dev, board->nsubdevs);
375 for (i = 0; i < PCI_DIO_MAX_DI_SUBDEVS; i++) {
378 s = &dev->subdevices[subdev++];
379 s->type = COMEDI_SUBD_DI;
380 s->subdev_flags = SDF_READABLE;
381 s->n_chan = d->chans;
383 s->range_table = &range_digital;
384 s->insn_bits = board->is_16bit
385 ? pci_dio_insn_bits_di_w
386 : pci_dio_insn_bits_di_b;
387 s->private = (void *)d->addr;
391 for (i = 0; i < PCI_DIO_MAX_DO_SUBDEVS; i++) {
394 s = &dev->subdevices[subdev++];
395 s->type = COMEDI_SUBD_DO;
396 s->subdev_flags = SDF_WRITABLE;
397 s->n_chan = d->chans;
399 s->range_table = &range_digital;
400 s->insn_bits = board->is_16bit
401 ? pci_dio_insn_bits_do_w
402 : pci_dio_insn_bits_do_b;
403 s->private = (void *)d->addr;
405 /* reset all outputs to 0 */
406 if (board->is_16bit) {
407 outw(0, dev->iobase + d->addr);
409 outw(0, dev->iobase + d->addr + 2);
411 outb(0, dev->iobase + d->addr);
413 outb(0, dev->iobase + d->addr + 1);
415 outb(0, dev->iobase + d->addr + 2);
417 outb(0, dev->iobase + d->addr + 3);
422 for (i = 0; i < PCI_DIO_MAX_DIO_SUBDEVG; i++) {
424 for (j = 0; j < d->chans; j++) {
425 s = &dev->subdevices[subdev++];
426 ret = subdev_8255_init(dev, s, NULL,
427 d->addr + j * I8255_SIZE);
434 s = &dev->subdevices[subdev++];
435 s->type = COMEDI_SUBD_DI;
436 s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
439 s->range_table = &range_digital;
440 s->insn_bits = board->is_16bit ? pci_dio_insn_bits_di_w
441 : pci_dio_insn_bits_di_b;
442 s->private = (void *)board->id_reg;
445 if (board->timer_regbase) {
446 s = &dev->subdevices[subdev++];
448 dev->pacer = comedi_8254_init(dev->iobase +
449 board->timer_regbase,
454 comedi_8254_subdevice_init(s, dev->pacer);
460 static struct comedi_driver adv_pci_dio_driver = {
461 .driver_name = "adv_pci_dio",
462 .module = THIS_MODULE,
463 .auto_attach = pci_dio_auto_attach,
464 .detach = comedi_pci_detach,
467 static unsigned long pci_dio_override_cardtype(struct pci_dev *pcidev,
468 unsigned long cardtype)
471 * Change cardtype from TYPE_PCI1753 to TYPE_PCI1753E if expansion
472 * board available. Need to enable PCI device and request the main
473 * registers PCI BAR temporarily to perform the test.
475 if (cardtype != TYPE_PCI1753)
477 if (pci_enable_device(pcidev) < 0)
479 if (pci_request_region(pcidev, 2, "adv_pci_dio") == 0) {
481 * This test is based on Advantech's "advdaq" driver source
482 * (which declares its module licence as "GPL" although the
483 * driver source does not include a "COPYING" file).
485 unsigned long reg = pci_resource_start(pcidev, 2) + 53;
488 if ((inb(reg) & 0x07) == 0x02) {
490 if ((inb(reg) & 0x07) == 0x05)
491 cardtype = TYPE_PCI1753E;
493 pci_release_region(pcidev, 2);
495 pci_disable_device(pcidev);
499 static int adv_pci_dio_pci_probe(struct pci_dev *dev,
500 const struct pci_device_id *id)
502 unsigned long cardtype;
504 cardtype = pci_dio_override_cardtype(dev, id->driver_data);
505 return comedi_pci_auto_config(dev, &adv_pci_dio_driver, cardtype);
508 static const struct pci_device_id adv_pci_dio_pci_table[] = {
509 { PCI_VDEVICE(ADVANTECH, 0x1730), TYPE_PCI1730 },
510 { PCI_VDEVICE(ADVANTECH, 0x1733), TYPE_PCI1733 },
511 { PCI_VDEVICE(ADVANTECH, 0x1734), TYPE_PCI1734 },
512 { PCI_VDEVICE(ADVANTECH, 0x1735), TYPE_PCI1735 },
513 { PCI_VDEVICE(ADVANTECH, 0x1736), TYPE_PCI1736 },
514 { PCI_VDEVICE(ADVANTECH, 0x1739), TYPE_PCI1739 },
515 { PCI_VDEVICE(ADVANTECH, 0x1750), TYPE_PCI1750 },
516 { PCI_VDEVICE(ADVANTECH, 0x1751), TYPE_PCI1751 },
517 { PCI_VDEVICE(ADVANTECH, 0x1752), TYPE_PCI1752 },
518 { PCI_VDEVICE(ADVANTECH, 0x1753), TYPE_PCI1753 },
519 { PCI_VDEVICE(ADVANTECH, 0x1754), TYPE_PCI1754 },
520 { PCI_VDEVICE(ADVANTECH, 0x1756), TYPE_PCI1756 },
521 { PCI_VDEVICE(ADVANTECH, 0x1761), TYPE_PCI1761 },
522 { PCI_VDEVICE(ADVANTECH, 0x1762), TYPE_PCI1762 },
525 MODULE_DEVICE_TABLE(pci, adv_pci_dio_pci_table);
527 static struct pci_driver adv_pci_dio_pci_driver = {
528 .name = "adv_pci_dio",
529 .id_table = adv_pci_dio_pci_table,
530 .probe = adv_pci_dio_pci_probe,
531 .remove = comedi_pci_auto_unconfig,
533 module_comedi_pci_driver(adv_pci_dio_driver, adv_pci_dio_pci_driver);
535 MODULE_AUTHOR("Comedi http://www.comedi.org");
536 MODULE_DESCRIPTION("Comedi driver for Advantech Digital I/O Cards");
537 MODULE_LICENSE("GPL");