1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * polling/bitbanging SPI master controller driver utilities
6 #include <linux/spinlock.h>
7 #include <linux/workqueue.h>
8 #include <linux/interrupt.h>
9 #include <linux/module.h>
10 #include <linux/delay.h>
11 #include <linux/errno.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/spi_bitbang.h>
18 #define SPI_BITBANG_CS_DELAY 100
21 /*----------------------------------------------------------------------*/
24 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
25 * Use this for GPIO or shift-register level hardware APIs.
27 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
28 * to glue code. These bitbang setup() and cleanup() routines are always
29 * used, though maybe they're called from controller-aware code.
31 * chipselect() and friends may use spi_device->controller_data and
32 * controller registers as appropriate.
35 * NOTE: SPI controller pins can often be used as GPIO pins instead,
36 * which means you could use a bitbang driver either to get hardware
37 * working quickly, or testing for differences that aren't speed related.
40 struct spi_bitbang_cs {
41 unsigned nsecs; /* (clock cycle time)/2 */
42 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
43 u32 word, u8 bits, unsigned flags);
44 unsigned (*txrx_bufs)(struct spi_device *,
46 struct spi_device *spi,
50 unsigned, struct spi_transfer *,
54 static unsigned bitbang_txrx_8(
55 struct spi_device *spi,
56 u32 (*txrx_word)(struct spi_device *spi,
61 struct spi_transfer *t,
65 unsigned bits = t->bits_per_word;
66 unsigned count = t->len;
67 const u8 *tx = t->tx_buf;
70 while (likely(count > 0)) {
75 word = txrx_word(spi, ns, word, bits, flags);
80 return t->len - count;
83 static unsigned bitbang_txrx_16(
84 struct spi_device *spi,
85 u32 (*txrx_word)(struct spi_device *spi,
90 struct spi_transfer *t,
94 unsigned bits = t->bits_per_word;
95 unsigned count = t->len;
96 const u16 *tx = t->tx_buf;
99 while (likely(count > 1)) {
104 word = txrx_word(spi, ns, word, bits, flags);
109 return t->len - count;
112 static unsigned bitbang_txrx_32(
113 struct spi_device *spi,
114 u32 (*txrx_word)(struct spi_device *spi,
119 struct spi_transfer *t,
123 unsigned bits = t->bits_per_word;
124 unsigned count = t->len;
125 const u32 *tx = t->tx_buf;
128 while (likely(count > 3)) {
133 word = txrx_word(spi, ns, word, bits, flags);
138 return t->len - count;
141 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
143 struct spi_bitbang_cs *cs = spi->controller_state;
148 bits_per_word = t->bits_per_word;
155 /* spi_transfer level calls that work per-word */
157 bits_per_word = spi->bits_per_word;
158 if (bits_per_word <= 8)
159 cs->txrx_bufs = bitbang_txrx_8;
160 else if (bits_per_word <= 16)
161 cs->txrx_bufs = bitbang_txrx_16;
162 else if (bits_per_word <= 32)
163 cs->txrx_bufs = bitbang_txrx_32;
167 /* nsecs = (clock period)/2 */
169 hz = spi->max_speed_hz;
171 cs->nsecs = (1000000000/2) / hz;
172 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
178 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
181 * spi_bitbang_setup - default setup for per-word I/O loops
183 int spi_bitbang_setup(struct spi_device *spi)
185 struct spi_bitbang_cs *cs = spi->controller_state;
186 struct spi_bitbang *bitbang;
188 bitbang = spi_master_get_devdata(spi->master);
191 cs = kzalloc(sizeof(*cs), GFP_KERNEL);
194 spi->controller_state = cs;
197 /* per-word shift register access, in hardware or bitbanging */
198 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
202 if (bitbang->setup_transfer) {
203 int retval = bitbang->setup_transfer(spi, NULL);
208 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
212 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
215 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
217 void spi_bitbang_cleanup(struct spi_device *spi)
219 kfree(spi->controller_state);
221 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
223 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
225 struct spi_bitbang_cs *cs = spi->controller_state;
226 unsigned nsecs = cs->nsecs;
227 struct spi_bitbang *bitbang;
229 bitbang = spi_master_get_devdata(spi->master);
230 if (bitbang->set_line_direction) {
233 err = bitbang->set_line_direction(spi, !!(t->tx_buf));
238 if (spi->mode & SPI_3WIRE) {
241 flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX;
242 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags);
244 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
247 /*----------------------------------------------------------------------*/
250 * SECOND PART ... simple transfer queue runner.
252 * This costs a task context per controller, running the queue by
253 * performing each transfer in sequence. Smarter hardware can queue
254 * several DMA transfers at once, and process several controller queues
255 * in parallel; this driver doesn't match such hardware very well.
257 * Drivers can provide word-at-a-time i/o primitives, or provide
258 * transfer-at-a-time ones to leverage dma or fifo hardware.
261 static int spi_bitbang_prepare_hardware(struct spi_master *spi)
263 struct spi_bitbang *bitbang;
265 bitbang = spi_master_get_devdata(spi);
267 mutex_lock(&bitbang->lock);
269 mutex_unlock(&bitbang->lock);
274 static int spi_bitbang_transfer_one(struct spi_master *master,
275 struct spi_device *spi,
276 struct spi_transfer *transfer)
278 struct spi_bitbang *bitbang = spi_master_get_devdata(master);
281 if (bitbang->setup_transfer) {
282 status = bitbang->setup_transfer(spi, transfer);
288 status = bitbang->txrx_bufs(spi, transfer);
290 if (status == transfer->len)
292 else if (status >= 0)
296 spi_finalize_current_transfer(master);
301 static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
303 struct spi_bitbang *bitbang;
305 bitbang = spi_master_get_devdata(spi);
307 mutex_lock(&bitbang->lock);
309 mutex_unlock(&bitbang->lock);
314 static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
316 struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
318 /* SPI core provides CS high / low, but bitbang driver
320 * spi device driver takes care of handling SPI_CS_HIGH
322 enable = (!!(spi->mode & SPI_CS_HIGH) == enable);
324 ndelay(SPI_BITBANG_CS_DELAY);
325 bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
326 BITBANG_CS_INACTIVE);
327 ndelay(SPI_BITBANG_CS_DELAY);
330 /*----------------------------------------------------------------------*/
332 int spi_bitbang_init(struct spi_bitbang *bitbang)
334 struct spi_master *master = bitbang->master;
340 * We only need the chipselect callback if we are actually using it.
341 * If we just use GPIO descriptors, it is surplus. If the
342 * SPI_MASTER_GPIO_SS flag is set, we always need to call the
343 * driver-specific chipselect routine.
345 custom_cs = (!master->use_gpio_descriptors ||
346 (master->flags & SPI_MASTER_GPIO_SS));
348 if (custom_cs && !bitbang->chipselect)
351 mutex_init(&bitbang->lock);
353 if (!master->mode_bits)
354 master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
356 if (master->transfer || master->transfer_one_message)
359 master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
360 master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
361 master->transfer_one = spi_bitbang_transfer_one;
363 * When using GPIO descriptors, the ->set_cs() callback doesn't even
364 * get called unless SPI_MASTER_GPIO_SS is set.
367 master->set_cs = spi_bitbang_set_cs;
369 if (!bitbang->txrx_bufs) {
370 bitbang->use_dma = 0;
371 bitbang->txrx_bufs = spi_bitbang_bufs;
372 if (!master->setup) {
373 if (!bitbang->setup_transfer)
374 bitbang->setup_transfer =
375 spi_bitbang_setup_transfer;
376 master->setup = spi_bitbang_setup;
377 master->cleanup = spi_bitbang_cleanup;
383 EXPORT_SYMBOL_GPL(spi_bitbang_init);
386 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
387 * @bitbang: driver handle
389 * Caller should have zero-initialized all parts of the structure, and then
390 * provided callbacks for chip selection and I/O loops. If the master has
391 * a transfer method, its final step should call spi_bitbang_transfer; or,
392 * that's the default if the transfer routine is not initialized. It should
393 * also set up the bus number and number of chipselects.
395 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
396 * hardware that basically exposes a shift register) or per-spi_transfer
397 * (which takes better advantage of hardware like fifos or DMA engines).
399 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
400 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
401 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
402 * routine isn't initialized.
404 * This routine registers the spi_master, which will process requests in a
405 * dedicated task, keeping IRQs unblocked most of the time. To stop
406 * processing those requests, call spi_bitbang_stop().
408 * On success, this routine will take a reference to master. The caller is
409 * responsible for calling spi_bitbang_stop() to decrement the reference and
410 * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
413 int spi_bitbang_start(struct spi_bitbang *bitbang)
415 struct spi_master *master = bitbang->master;
418 ret = spi_bitbang_init(bitbang);
422 /* driver may get busy before register() returns, especially
423 * if someone registered boardinfo for devices
425 ret = spi_register_master(spi_master_get(master));
427 spi_master_put(master);
431 EXPORT_SYMBOL_GPL(spi_bitbang_start);
434 * spi_bitbang_stop - stops the task providing spi communication
436 void spi_bitbang_stop(struct spi_bitbang *bitbang)
438 spi_unregister_master(bitbang->master);
440 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
442 MODULE_LICENSE("GPL");