2 * Allwinner SoCs SRAM Controller Driver
4 * Copyright (C) 2015 Maxime Ripard
6 * Author: Maxime Ripard <maxime.ripard@free-electrons.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/debugfs.h>
15 #include <linux/module.h>
17 #include <linux/of_address.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/regmap.h>
22 #include <linux/soc/sunxi/sunxi_sram.h>
24 struct sunxi_sram_func {
30 struct sunxi_sram_data {
35 struct sunxi_sram_func *func;
36 struct list_head list;
39 struct sunxi_sram_desc {
40 struct sunxi_sram_data data;
44 #define SUNXI_SRAM_MAP(_reg_val, _val, _func) \
48 .reg_val = _reg_val, \
51 #define SUNXI_SRAM_DATA(_name, _reg, _off, _width, ...) \
57 .func = (struct sunxi_sram_func[]){ \
61 static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = {
62 .data = SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2,
63 SUNXI_SRAM_MAP(0, 0, "cpu"),
64 SUNXI_SRAM_MAP(1, 1, "emac")),
67 static struct sunxi_sram_desc sun4i_a10_sram_c1 = {
68 .data = SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31,
69 SUNXI_SRAM_MAP(0, 0, "cpu"),
70 SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")),
73 static struct sunxi_sram_desc sun4i_a10_sram_d = {
74 .data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1,
75 SUNXI_SRAM_MAP(0, 0, "cpu"),
76 SUNXI_SRAM_MAP(1, 1, "usb-otg")),
79 static struct sunxi_sram_desc sun50i_a64_sram_c = {
80 .data = SUNXI_SRAM_DATA("C", 0x4, 24, 1,
81 SUNXI_SRAM_MAP(0, 1, "cpu"),
82 SUNXI_SRAM_MAP(1, 0, "de2")),
85 static const struct of_device_id sunxi_sram_dt_ids[] = {
87 .compatible = "allwinner,sun4i-a10-sram-a3-a4",
88 .data = &sun4i_a10_sram_a3_a4.data,
91 .compatible = "allwinner,sun4i-a10-sram-c1",
92 .data = &sun4i_a10_sram_c1.data,
95 .compatible = "allwinner,sun4i-a10-sram-d",
96 .data = &sun4i_a10_sram_d.data,
99 .compatible = "allwinner,sun50i-a64-sram-c",
100 .data = &sun50i_a64_sram_c.data,
105 static struct device *sram_dev;
106 static LIST_HEAD(claimed_sram);
107 static DEFINE_SPINLOCK(sram_lock);
108 static void __iomem *base;
110 static int sunxi_sram_show(struct seq_file *s, void *data)
112 struct device_node *sram_node, *section_node;
113 const struct sunxi_sram_data *sram_data;
114 const struct of_device_id *match;
115 struct sunxi_sram_func *func;
116 const __be32 *sram_addr_p, *section_addr_p;
119 seq_puts(s, "Allwinner sunXi SRAM\n");
120 seq_puts(s, "--------------------\n\n");
122 for_each_child_of_node(sram_dev->of_node, sram_node) {
123 sram_addr_p = of_get_address(sram_node, 0, NULL, NULL);
125 seq_printf(s, "sram@%08x\n",
126 be32_to_cpu(*sram_addr_p));
128 for_each_child_of_node(sram_node, section_node) {
129 match = of_match_node(sunxi_sram_dt_ids, section_node);
132 sram_data = match->data;
134 section_addr_p = of_get_address(section_node, 0,
137 seq_printf(s, "\tsection@%04x\t(%s)\n",
138 be32_to_cpu(*section_addr_p),
141 val = readl(base + sram_data->reg);
142 val >>= sram_data->offset;
143 val &= GENMASK(sram_data->width - 1, 0);
145 for (func = sram_data->func; func->func; func++) {
146 seq_printf(s, "\t\t%s%c\n", func->func,
147 func->reg_val == val ?
158 DEFINE_SHOW_ATTRIBUTE(sunxi_sram);
160 static inline struct sunxi_sram_desc *to_sram_desc(const struct sunxi_sram_data *data)
162 return container_of(data, struct sunxi_sram_desc, data);
165 static const struct sunxi_sram_data *sunxi_sram_of_parse(struct device_node *node,
166 unsigned int *reg_value)
168 const struct of_device_id *match;
169 const struct sunxi_sram_data *data;
170 struct sunxi_sram_func *func;
171 struct of_phandle_args args;
175 ret = of_parse_phandle_with_fixed_args(node, "allwinner,sram", 1, 0,
180 if (!of_device_is_available(args.np)) {
187 match = of_match_node(sunxi_sram_dt_ids, args.np);
199 for (func = data->func; func->func; func++) {
200 if (val == func->val) {
202 *reg_value = func->reg_val;
213 of_node_put(args.np);
217 of_node_put(args.np);
221 int sunxi_sram_claim(struct device *dev)
223 const struct sunxi_sram_data *sram_data;
224 struct sunxi_sram_desc *sram_desc;
229 return PTR_ERR(base);
232 return -EPROBE_DEFER;
234 if (!dev || !dev->of_node)
237 sram_data = sunxi_sram_of_parse(dev->of_node, &device);
238 if (IS_ERR(sram_data))
239 return PTR_ERR(sram_data);
241 sram_desc = to_sram_desc(sram_data);
243 spin_lock(&sram_lock);
245 if (sram_desc->claimed) {
246 spin_unlock(&sram_lock);
250 mask = GENMASK(sram_data->offset + sram_data->width - 1,
252 val = readl(base + sram_data->reg);
254 writel(val | ((device << sram_data->offset) & mask),
255 base + sram_data->reg);
257 spin_unlock(&sram_lock);
261 EXPORT_SYMBOL(sunxi_sram_claim);
263 int sunxi_sram_release(struct device *dev)
265 const struct sunxi_sram_data *sram_data;
266 struct sunxi_sram_desc *sram_desc;
268 if (!dev || !dev->of_node)
271 sram_data = sunxi_sram_of_parse(dev->of_node, NULL);
272 if (IS_ERR(sram_data))
275 sram_desc = to_sram_desc(sram_data);
277 spin_lock(&sram_lock);
278 sram_desc->claimed = false;
279 spin_unlock(&sram_lock);
283 EXPORT_SYMBOL(sunxi_sram_release);
285 struct sunxi_sramc_variant {
289 static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = {
290 /* Nothing special */
293 static const struct sunxi_sramc_variant sun8i_h3_sramc_variant = {
294 .num_emac_clocks = 1,
297 static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = {
298 .num_emac_clocks = 1,
301 static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = {
302 .num_emac_clocks = 2,
305 #define SUNXI_SRAM_EMAC_CLOCK_REG 0x30
306 static bool sunxi_sram_regmap_accessible_reg(struct device *dev,
309 const struct sunxi_sramc_variant *variant;
311 variant = of_device_get_match_data(dev);
313 if (reg < SUNXI_SRAM_EMAC_CLOCK_REG)
315 if (reg > SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4)
321 static struct regmap_config sunxi_sram_emac_clock_regmap = {
325 /* last defined register */
326 .max_register = SUNXI_SRAM_EMAC_CLOCK_REG + 4,
327 /* other devices have no business accessing other registers */
328 .readable_reg = sunxi_sram_regmap_accessible_reg,
329 .writeable_reg = sunxi_sram_regmap_accessible_reg,
332 static int sunxi_sram_probe(struct platform_device *pdev)
335 struct regmap *emac_clock;
336 const struct sunxi_sramc_variant *variant;
338 sram_dev = &pdev->dev;
340 variant = of_device_get_match_data(&pdev->dev);
344 base = devm_platform_ioremap_resource(pdev, 0);
346 return PTR_ERR(base);
348 of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
350 d = debugfs_create_file("sram", S_IRUGO, NULL, NULL,
355 if (variant->num_emac_clocks > 0) {
356 emac_clock = devm_regmap_init_mmio(&pdev->dev, base,
357 &sunxi_sram_emac_clock_regmap);
359 if (IS_ERR(emac_clock))
360 return PTR_ERR(emac_clock);
366 static const struct of_device_id sunxi_sram_dt_match[] = {
368 .compatible = "allwinner,sun4i-a10-sram-controller",
369 .data = &sun4i_a10_sramc_variant,
372 .compatible = "allwinner,sun4i-a10-system-control",
373 .data = &sun4i_a10_sramc_variant,
376 .compatible = "allwinner,sun5i-a13-system-control",
377 .data = &sun4i_a10_sramc_variant,
380 .compatible = "allwinner,sun8i-a23-system-control",
381 .data = &sun4i_a10_sramc_variant,
384 .compatible = "allwinner,sun8i-h3-system-control",
385 .data = &sun8i_h3_sramc_variant,
388 .compatible = "allwinner,sun50i-a64-sram-controller",
389 .data = &sun50i_a64_sramc_variant,
392 .compatible = "allwinner,sun50i-a64-system-control",
393 .data = &sun50i_a64_sramc_variant,
396 .compatible = "allwinner,sun50i-h5-system-control",
397 .data = &sun50i_a64_sramc_variant,
400 .compatible = "allwinner,sun50i-h616-system-control",
401 .data = &sun50i_h616_sramc_variant,
405 MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match);
407 static struct platform_driver sunxi_sram_driver = {
409 .name = "sunxi-sram",
410 .of_match_table = sunxi_sram_dt_match,
412 .probe = sunxi_sram_probe,
414 module_platform_driver(sunxi_sram_driver);
416 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
417 MODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver");
418 MODULE_LICENSE("GPL");