drivers/soc/qcom/socinfo.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
   4  * Copyright (c) 2017-2019, Linaro Ltd.
   5  */
   6
   7 #include <linux/debugfs.h>
   8 #include <linux/err.h>
   9 #include <linux/module.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/random.h>
  12 #include <linux/slab.h>
  13 #include <linux/soc/qcom/smem.h>
  14 #include <linux/string.h>
  15 #include <linux/sys_soc.h>
  16 #include <linux/types.h>
  17
  18 #include <asm/unaligned.h>
  19
  20 /*
  21  * SoC version type with major number in the upper 16 bits and minor
  22  * number in the lower 16 bits.
  23  */
  24 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
  25 #define SOCINFO_MINOR(ver) ((ver) & 0xffff)
  26 #define SOCINFO_VERSION(maj, min)  ((((maj) & 0xffff) << 16)|((min) & 0xffff))
  27
  28 #define SMEM_SOCINFO_BUILD_ID_LENGTH           32
  29 #define SMEM_SOCINFO_CHIP_ID_LENGTH            32
  30
  31 /*
  32  * SMEM item id, used to acquire handles to respective
  33  * SMEM region.
  34  */
  35 #define SMEM_HW_SW_BUILD_ID            137
  36
  37 #ifdef CONFIG_DEBUG_FS
  38 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT        32
  39 #define SMEM_IMAGE_VERSION_SIZE                4096
  40 #define SMEM_IMAGE_VERSION_NAME_SIZE           75
  41 #define SMEM_IMAGE_VERSION_VARIANT_SIZE        20
  42 #define SMEM_IMAGE_VERSION_OEM_SIZE            32
  43
  44 /*
  45  * SMEM Image table indices
  46  */
  47 #define SMEM_IMAGE_TABLE_BOOT_INDEX     0
  48 #define SMEM_IMAGE_TABLE_TZ_INDEX       1
  49 #define SMEM_IMAGE_TABLE_RPM_INDEX      3
  50 #define SMEM_IMAGE_TABLE_APPS_INDEX     10
  51 #define SMEM_IMAGE_TABLE_MPSS_INDEX     11
  52 #define SMEM_IMAGE_TABLE_ADSP_INDEX     12
  53 #define SMEM_IMAGE_TABLE_CNSS_INDEX     13
  54 #define SMEM_IMAGE_TABLE_VIDEO_INDEX    14
  55 #define SMEM_IMAGE_VERSION_TABLE       469
  56
  57 /*
  58  * SMEM Image table names
  59  */
  60 static const char *const socinfo_image_names[] = {
  61         [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
  62         [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
  63         [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
  64         [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
  65         [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
  66         [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
  67         [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
  68         [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
  69 };
  70
  71 static const char *const pmic_models[] = {
  72         [0]  = "Unknown PMIC model",
  73         [9]  = "PM8994",
  74         [11] = "PM8916",
  75         [13] = "PM8058",
  76         [14] = "PM8028",
  77         [15] = "PM8901",
  78         [16] = "PM8027",
  79         [17] = "ISL9519",
  80         [18] = "PM8921",
  81         [19] = "PM8018",
  82         [20] = "PM8015",
  83         [21] = "PM8014",
  84         [22] = "PM8821",
  85         [23] = "PM8038",
  86         [24] = "PM8922",
  87         [25] = "PM8917",
  88         [30] = "PM8150",
  89         [31] = "PM8150L",
  90         [32] = "PM8150B",
  91         [33] = "PMK8002",
  92         [36] = "PM8009",
  93 };
  94 #endif /* CONFIG_DEBUG_FS */
  95
  96 /* Socinfo SMEM item structure */
  97 struct socinfo {
  98         __le32 fmt;
  99         __le32 id;
 100         __le32 ver;
 101         char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
 102         /* Version 2 */
 103         __le32 raw_id;
 104         __le32 raw_ver;
 105         /* Version 3 */
 106         __le32 hw_plat;
 107         /* Version 4 */
 108         __le32 plat_ver;
 109         /* Version 5 */
 110         __le32 accessory_chip;
 111         /* Version 6 */
 112         __le32 hw_plat_subtype;
 113         /* Version 7 */
 114         __le32 pmic_model;
 115         __le32 pmic_die_rev;
 116         /* Version 8 */
 117         __le32 pmic_model_1;
 118         __le32 pmic_die_rev_1;
 119         __le32 pmic_model_2;
 120         __le32 pmic_die_rev_2;
 121         /* Version 9 */
 122         __le32 foundry_id;
 123         /* Version 10 */
 124         __le32 serial_num;
 125         /* Version 11 */
 126         __le32 num_pmics;
 127         __le32 pmic_array_offset;
 128         /* Version 12 */
 129         __le32 chip_family;
 130         __le32 raw_device_family;
 131         __le32 raw_device_num;
 132         /* Version 13 */
 133         __le32 nproduct_id;
 134         char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH];
 135         /* Version 14 */
 136         __le32 num_clusters;
 137         __le32 ncluster_array_offset;
 138         __le32 num_defective_parts;
 139         __le32 ndefective_parts_array_offset;
 140         /* Version 15 */
 141         __le32 nmodem_supported;
 142 };
 143
 144 #ifdef CONFIG_DEBUG_FS
 145 struct socinfo_params {
 146         u32 raw_device_family;
 147         u32 hw_plat_subtype;
 148         u32 accessory_chip;
 149         u32 raw_device_num;
 150         u32 chip_family;
 151         u32 foundry_id;
 152         u32 plat_ver;
 153         u32 raw_ver;
 154         u32 hw_plat;
 155         u32 fmt;
 156         u32 nproduct_id;
 157         u32 num_clusters;
 158         u32 ncluster_array_offset;
 159         u32 num_defective_parts;
 160         u32 ndefective_parts_array_offset;
 161         u32 nmodem_supported;
 162 };
 163
 164 struct smem_image_version {
 165         char name[SMEM_IMAGE_VERSION_NAME_SIZE];
 166         char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
 167         char pad;
 168         char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
 169 };
 170 #endif /* CONFIG_DEBUG_FS */
 171
 172 struct qcom_socinfo {
 173         struct soc_device *soc_dev;
 174         struct soc_device_attribute attr;
 175 #ifdef CONFIG_DEBUG_FS
 176         struct dentry *dbg_root;
 177         struct socinfo_params info;
 178 #endif /* CONFIG_DEBUG_FS */
 179 };
 180
 181 struct soc_id {
 182         unsigned int id;
 183         const char *name;
 184 };
 185
 186 static const struct soc_id soc_id[] = {
 187         { 87, "MSM8960" },
 188         { 109, "APQ8064" },
 189         { 122, "MSM8660A" },
 190         { 123, "MSM8260A" },
 191         { 124, "APQ8060A" },
 192         { 126, "MSM8974" },
 193         { 130, "MPQ8064" },
 194         { 138, "MSM8960AB" },
 195         { 139, "APQ8060AB" },
 196         { 140, "MSM8260AB" },
 197         { 141, "MSM8660AB" },
 198         { 178, "APQ8084" },
 199         { 184, "APQ8074" },
 200         { 185, "MSM8274" },
 201         { 186, "MSM8674" },
 202         { 194, "MSM8974PRO" },
 203         { 206, "MSM8916" },
 204         { 207, "MSM8994" },
 205         { 208, "APQ8074-AA" },
 206         { 209, "APQ8074-AB" },
 207         { 210, "APQ8074PRO" },
 208         { 211, "MSM8274-AA" },
 209         { 212, "MSM8274-AB" },
 210         { 213, "MSM8274PRO" },
 211         { 214, "MSM8674-AA" },
 212         { 215, "MSM8674-AB" },
 213         { 216, "MSM8674PRO" },
 214         { 217, "MSM8974-AA" },
 215         { 218, "MSM8974-AB" },
 216         { 233, "MSM8936" },
 217         { 239, "MSM8939" },
 218         { 240, "APQ8036" },
 219         { 241, "APQ8039" },
 220         { 246, "MSM8996" },
 221         { 247, "APQ8016" },
 222         { 248, "MSM8216" },
 223         { 249, "MSM8116" },
 224         { 250, "MSM8616" },
 225         { 251, "MSM8992" },
 226         { 253, "APQ8094" },
 227         { 291, "APQ8096" },
 228         { 293, "MSM8953" },
 229         { 304, "APQ8053" },
 230         { 305, "MSM8996SG" },
 231         { 310, "MSM8996AU" },
 232         { 311, "APQ8096AU" },
 233         { 312, "APQ8096SG" },
 234         { 318, "SDM630" },
 235         { 321, "SDM845" },
 236         { 338, "SDM450" },
 237         { 341, "SDA845" },
 238         { 349, "SDM632" },
 239         { 350, "SDA632" },
 240         { 351, "SDA450" },
 241         { 356, "SM8250" },
 242         { 402, "IPQ6018" },
 243         { 425, "SC7180" },
 244         { 455, "QRB5165" },
 245 };
 246
 247 static const char *socinfo_machine(struct device *dev, unsigned int id)
 248 {
 249         int idx;
 250
 251         for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
 252                 if (soc_id[idx].id == id)
 253                         return soc_id[idx].name;
 254         }
 255
 256         return NULL;
 257 }
 258
 259 #ifdef CONFIG_DEBUG_FS
 260
 261 #define QCOM_OPEN(name, _func)                                          \
 262 static int qcom_open_##name(struct inode *inode, struct file *file)     \
 263 {                                                                       \
 264         return single_open(file, _func, inode->i_private);              \
 265 }                                                                       \
 266                                                                         \
 267 static const struct file_operations qcom_ ##name## _ops = {             \
 268         .open = qcom_open_##name,                                       \
 269         .read = seq_read,                                               \
 270         .llseek = seq_lseek,                                            \
 271         .release = single_release,                                      \
 272 }
 273
 274 #define DEBUGFS_ADD(info, name)                                         \
 275         debugfs_create_file(__stringify(name), 0400,                    \
 276                             qcom_socinfo->dbg_root,                     \
 277                             info, &qcom_ ##name## _ops)
 278
 279
 280 static int qcom_show_build_id(struct seq_file *seq, void *p)
 281 {
 282         struct socinfo *socinfo = seq->private;
 283
 284         seq_printf(seq, "%s\n", socinfo->build_id);
 285
 286         return 0;
 287 }
 288
 289 static int qcom_show_pmic_model(struct seq_file *seq, void *p)
 290 {
 291         struct socinfo *socinfo = seq->private;
 292         int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
 293
 294         if (model < 0)
 295                 return -EINVAL;
 296
 297         if (model <= ARRAY_SIZE(pmic_models) && pmic_models[model])
 298                 seq_printf(seq, "%s\n", pmic_models[model]);
 299         else
 300                 seq_printf(seq, "unknown (%d)\n", model);
 301
 302         return 0;
 303 }
 304
 305 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p)
 306 {
 307         struct socinfo *socinfo = seq->private;
 308         unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics);
 309         unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset);
 310         int i;
 311         void *ptr = socinfo;
 312
 313         ptr += pmic_array_offset;
 314
 315         /* No need for bounds checking, it happened at socinfo_debugfs_init */
 316         for (i = 0; i < num_pmics; i++) {
 317                 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32)));
 318                 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32));
 319
 320                 if (model <= ARRAY_SIZE(pmic_models) && pmic_models[model])
 321                         seq_printf(seq, "%s %u.%u\n", pmic_models[model],
 322                                    SOCINFO_MAJOR(le32_to_cpu(die_rev)),
 323                                    SOCINFO_MINOR(le32_to_cpu(die_rev)));
 324                 else
 325                         seq_printf(seq, "unknown (%d)\n", model);
 326         }
 327
 328         return 0;
 329 }
 330
 331 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
 332 {
 333         struct socinfo *socinfo = seq->private;
 334
 335         seq_printf(seq, "%u.%u\n",
 336                    SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
 337                    SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
 338
 339         return 0;
 340 }
 341
 342 static int qcom_show_chip_id(struct seq_file *seq, void *p)
 343 {
 344         struct socinfo *socinfo = seq->private;
 345
 346         seq_printf(seq, "%s\n", socinfo->chip_id);
 347
 348         return 0;
 349 }
 350
 351 QCOM_OPEN(build_id, qcom_show_build_id);
 352 QCOM_OPEN(pmic_model, qcom_show_pmic_model);
 353 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array);
 354 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
 355 QCOM_OPEN(chip_id, qcom_show_chip_id);
 356
 357 #define DEFINE_IMAGE_OPS(type)                                  \
 358 static int show_image_##type(struct seq_file *seq, void *p)               \
 359 {                                                                 \
 360         struct smem_image_version *image_version = seq->private;  \
 361         seq_puts(seq, image_version->type);                       \
 362         seq_putc(seq, '\n');                                      \
 363         return 0;                                                 \
 364 }                                                                 \
 365 static int open_image_##type(struct inode *inode, struct file *file)      \
 366 {                                                                         \
 367         return single_open(file, show_image_##type, inode->i_private); \
 368 }                                                                         \
 369                                                                           \
 370 static const struct file_operations qcom_image_##type##_ops = {   \
 371         .open = open_image_##type,                                        \
 372         .read = seq_read,                                                 \
 373         .llseek = seq_lseek,                                              \
 374         .release = single_release,                                        \
 375 }
 376
 377 DEFINE_IMAGE_OPS(name);
 378 DEFINE_IMAGE_OPS(variant);
 379 DEFINE_IMAGE_OPS(oem);
 380
 381 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
 382                                  struct socinfo *info, size_t info_size)
 383 {
 384         struct smem_image_version *versions;
 385         struct dentry *dentry;
 386         size_t size;
 387         int i;
 388         unsigned int num_pmics;
 389         unsigned int pmic_array_offset;
 390
 391         qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
 392
 393         qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
 394
 395         debugfs_create_x32("info_fmt", 0400, qcom_socinfo->dbg_root,
 396                            &qcom_socinfo->info.fmt);
 397
 398         switch (qcom_socinfo->info.fmt) {
 399         case SOCINFO_VERSION(0, 15):
 400                 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported);
 401
 402                 debugfs_create_u32("nmodem_supported", 0400, qcom_socinfo->dbg_root,
 403                                    &qcom_socinfo->info.nmodem_supported);
 404                 fallthrough;
 405         case SOCINFO_VERSION(0, 14):
 406                 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters);
 407                 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset);
 408                 qcom_socinfo->info.num_defective_parts = __le32_to_cpu(info->num_defective_parts);
 409                 qcom_socinfo->info.ndefective_parts_array_offset = __le32_to_cpu(info->ndefective_parts_array_offset);
 410
 411                 debugfs_create_u32("num_clusters", 0400, qcom_socinfo->dbg_root,
 412                                    &qcom_socinfo->info.num_clusters);
 413                 debugfs_create_u32("ncluster_array_offset", 0400, qcom_socinfo->dbg_root,
 414                                    &qcom_socinfo->info.ncluster_array_offset);
 415                 debugfs_create_u32("num_defective_parts", 0400, qcom_socinfo->dbg_root,
 416                                    &qcom_socinfo->info.num_defective_parts);
 417                 debugfs_create_u32("ndefective_parts_array_offset", 0400, qcom_socinfo->dbg_root,
 418                                    &qcom_socinfo->info.ndefective_parts_array_offset);
 419                 fallthrough;
 420         case SOCINFO_VERSION(0, 13):
 421                 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id);
 422
 423                 debugfs_create_u32("nproduct_id", 0400, qcom_socinfo->dbg_root,
 424                                    &qcom_socinfo->info.nproduct_id);
 425                 DEBUGFS_ADD(info, chip_id);
 426                 fallthrough;
 427         case SOCINFO_VERSION(0, 12):
 428                 qcom_socinfo->info.chip_family =
 429                         __le32_to_cpu(info->chip_family);
 430                 qcom_socinfo->info.raw_device_family =
 431                         __le32_to_cpu(info->raw_device_family);
 432                 qcom_socinfo->info.raw_device_num =
 433                         __le32_to_cpu(info->raw_device_num);
 434
 435                 debugfs_create_x32("chip_family", 0400, qcom_socinfo->dbg_root,
 436                                    &qcom_socinfo->info.chip_family);
 437                 debugfs_create_x32("raw_device_family", 0400,
 438                                    qcom_socinfo->dbg_root,
 439                                    &qcom_socinfo->info.raw_device_family);
 440                 debugfs_create_x32("raw_device_number", 0400,
 441                                    qcom_socinfo->dbg_root,
 442                                    &qcom_socinfo->info.raw_device_num);
 443                 fallthrough;
 444         case SOCINFO_VERSION(0, 11):
 445                 num_pmics = le32_to_cpu(info->num_pmics);
 446                 pmic_array_offset = le32_to_cpu(info->pmic_array_offset);
 447                 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size)
 448                         DEBUGFS_ADD(info, pmic_model_array);
 449                 fallthrough;
 450         case SOCINFO_VERSION(0, 10):
 451         case SOCINFO_VERSION(0, 9):
 452                 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
 453
 454                 debugfs_create_u32("foundry_id", 0400, qcom_socinfo->dbg_root,
 455                                    &qcom_socinfo->info.foundry_id);
 456                 fallthrough;
 457         case SOCINFO_VERSION(0, 8):
 458         case SOCINFO_VERSION(0, 7):
 459                 DEBUGFS_ADD(info, pmic_model);
 460                 DEBUGFS_ADD(info, pmic_die_rev);
 461                 fallthrough;
 462         case SOCINFO_VERSION(0, 6):
 463                 qcom_socinfo->info.hw_plat_subtype =
 464                         __le32_to_cpu(info->hw_plat_subtype);
 465
 466                 debugfs_create_u32("hardware_platform_subtype", 0400,
 467                                    qcom_socinfo->dbg_root,
 468                                    &qcom_socinfo->info.hw_plat_subtype);
 469                 fallthrough;
 470         case SOCINFO_VERSION(0, 5):
 471                 qcom_socinfo->info.accessory_chip =
 472                         __le32_to_cpu(info->accessory_chip);
 473
 474                 debugfs_create_u32("accessory_chip", 0400,
 475                                    qcom_socinfo->dbg_root,
 476                                    &qcom_socinfo->info.accessory_chip);
 477                 fallthrough;
 478         case SOCINFO_VERSION(0, 4):
 479                 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
 480
 481                 debugfs_create_u32("platform_version", 0400,
 482                                    qcom_socinfo->dbg_root,
 483                                    &qcom_socinfo->info.plat_ver);
 484                 fallthrough;
 485         case SOCINFO_VERSION(0, 3):
 486                 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
 487
 488                 debugfs_create_u32("hardware_platform", 0400,
 489                                    qcom_socinfo->dbg_root,
 490                                    &qcom_socinfo->info.hw_plat);
 491                 fallthrough;
 492         case SOCINFO_VERSION(0, 2):
 493                 qcom_socinfo->info.raw_ver  = __le32_to_cpu(info->raw_ver);
 494
 495                 debugfs_create_u32("raw_version", 0400, qcom_socinfo->dbg_root,
 496                                    &qcom_socinfo->info.raw_ver);
 497                 fallthrough;
 498         case SOCINFO_VERSION(0, 1):
 499                 DEBUGFS_ADD(info, build_id);
 500                 break;
 501         }
 502
 503         versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE,
 504                                  &size);
 505
 506         for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) {
 507                 if (!socinfo_image_names[i])
 508                         continue;
 509
 510                 dentry = debugfs_create_dir(socinfo_image_names[i],
 511                                             qcom_socinfo->dbg_root);
 512                 debugfs_create_file("name", 0400, dentry, &versions[i],
 513                                     &qcom_image_name_ops);
 514                 debugfs_create_file("variant", 0400, dentry, &versions[i],
 515                                     &qcom_image_variant_ops);
 516                 debugfs_create_file("oem", 0400, dentry, &versions[i],
 517                                     &qcom_image_oem_ops);
 518         }
 519 }
 520
 521 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
 522 {
 523         debugfs_remove_recursive(qcom_socinfo->dbg_root);
 524 }
 525 #else
 526 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
 527                                  struct socinfo *info, size_t info_size)
 528 {
 529 }
 530 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) {  }
 531 #endif /* CONFIG_DEBUG_FS */
 532
 533 static int qcom_socinfo_probe(struct platform_device *pdev)
 534 {
 535         struct qcom_socinfo *qs;
 536         struct socinfo *info;
 537         size_t item_size;
 538
 539         info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
 540                               &item_size);
 541         if (IS_ERR(info)) {
 542                 dev_err(&pdev->dev, "Couldn't find socinfo\n");
 543                 return PTR_ERR(info);
 544         }
 545
 546         qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
 547         if (!qs)
 548                 return -ENOMEM;
 549
 550         qs->attr.family = "Snapdragon";
 551         qs->attr.machine = socinfo_machine(&pdev->dev,
 552                                            le32_to_cpu(info->id));
 553         qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u",
 554                                          le32_to_cpu(info->id));
 555         qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
 556                                            SOCINFO_MAJOR(le32_to_cpu(info->ver)),
 557                                            SOCINFO_MINOR(le32_to_cpu(info->ver)));
 558         if (offsetof(struct socinfo, serial_num) <= item_size)
 559                 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
 560                                                         "%u",
 561                                                         le32_to_cpu(info->serial_num));
 562
 563         qs->soc_dev = soc_device_register(&qs->attr);
 564         if (IS_ERR(qs->soc_dev))
 565                 return PTR_ERR(qs->soc_dev);
 566
 567         socinfo_debugfs_init(qs, info, item_size);
 568
 569         /* Feed the soc specific unique data into entropy pool */
 570         add_device_randomness(info, item_size);
 571
 572         platform_set_drvdata(pdev, qs->soc_dev);
 573
 574         return 0;
 575 }
 576
 577 static int qcom_socinfo_remove(struct platform_device *pdev)
 578 {
 579         struct qcom_socinfo *qs = platform_get_drvdata(pdev);
 580
 581         soc_device_unregister(qs->soc_dev);
 582
 583         socinfo_debugfs_exit(qs);
 584
 585         return 0;
 586 }
 587
 588 static struct platform_driver qcom_socinfo_driver = {
 589         .probe = qcom_socinfo_probe,
 590         .remove = qcom_socinfo_remove,
 591         .driver  = {
 592                 .name = "qcom-socinfo",
 593         },
 594 };
 595
 596 module_platform_driver(qcom_socinfo_driver);
 597
 598 MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
 599 MODULE_LICENSE("GPL v2");
 600 MODULE_ALIAS("platform:qcom-socinfo");