1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/init.h>
8 #include <linux/of_address.h>
9 #include <linux/slab.h>
10 #include <linux/sys_soc.h>
11 #include <linux/platform_device.h>
12 #include <linux/arm-smccc.h>
17 #define IMX8MQ_SW_INFO_B1 0x40
18 #define IMX8MQ_SW_MAGIC_B1 0xff0055aa
20 #define IMX_SIP_GET_SOC_INFO 0xc2000006
22 #define OCOTP_UID_LOW 0x410
23 #define OCOTP_UID_HIGH 0x420
25 /* Same as ANADIG_DIGPROG_IMX7D */
26 #define ANADIG_DIGPROG_IMX8MM 0x800
28 struct imx8_soc_data {
30 u32 (*soc_revision)(void);
35 #ifdef CONFIG_HAVE_ARM_SMCCC
36 static u32 imx8mq_soc_revision_from_atf(void)
38 struct arm_smccc_res res;
40 arm_smccc_smc(IMX_SIP_GET_SOC_INFO, 0, 0, 0, 0, 0, 0, 0, &res);
42 if (res.a0 == SMCCC_RET_NOT_SUPPORTED)
48 static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; };
51 static u32 __init imx8mq_soc_revision(void)
53 struct device_node *np;
54 void __iomem *ocotp_base;
58 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");
62 ocotp_base = of_iomap(np, 0);
66 * SOC revision on older imx8mq is not available in fuses so query
67 * the value from ATF instead.
69 rev = imx8mq_soc_revision_from_atf();
71 magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
72 if (magic == IMX8MQ_SW_MAGIC_B1)
76 soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
78 soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
87 static void __init imx8mm_soc_uid(void)
89 void __iomem *ocotp_base;
90 struct device_node *np;
92 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp");
96 ocotp_base = of_iomap(np, 0);
99 soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
101 soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
107 static u32 __init imx8mm_soc_revision(void)
109 struct device_node *np;
110 void __iomem *anatop_base;
113 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop");
117 anatop_base = of_iomap(np, 0);
118 WARN_ON(!anatop_base);
120 rev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM);
122 iounmap(anatop_base);
130 static const struct imx8_soc_data imx8mq_soc_data = {
132 .soc_revision = imx8mq_soc_revision,
135 static const struct imx8_soc_data imx8mm_soc_data = {
137 .soc_revision = imx8mm_soc_revision,
140 static const struct imx8_soc_data imx8mn_soc_data = {
142 .soc_revision = imx8mm_soc_revision,
145 static const struct imx8_soc_data imx8mp_soc_data = {
147 .soc_revision = imx8mm_soc_revision,
150 static const struct of_device_id imx8_soc_match[] = {
151 { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, },
152 { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, },
153 { .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, },
154 { .compatible = "fsl,imx8mp", .data = &imx8mp_soc_data, },
158 #define imx8_revision(soc_rev) \
160 kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \
163 static int __init imx8_soc_init(void)
165 struct soc_device_attribute *soc_dev_attr;
166 struct soc_device *soc_dev;
167 const struct of_device_id *id;
169 const struct imx8_soc_data *data;
172 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
176 soc_dev_attr->family = "Freescale i.MX";
178 ret = of_property_read_string(of_root, "model", &soc_dev_attr->machine);
182 id = of_match_node(imx8_soc_match, of_root);
190 soc_dev_attr->soc_id = data->name;
191 if (data->soc_revision)
192 soc_rev = data->soc_revision();
195 soc_dev_attr->revision = imx8_revision(soc_rev);
196 if (!soc_dev_attr->revision) {
201 soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
202 if (!soc_dev_attr->serial_number) {
207 soc_dev = soc_device_register(soc_dev_attr);
208 if (IS_ERR(soc_dev)) {
209 ret = PTR_ERR(soc_dev);
210 goto free_serial_number;
213 pr_info("SoC: %s revision %s\n", soc_dev_attr->soc_id,
214 soc_dev_attr->revision);
216 if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
217 platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
222 kfree(soc_dev_attr->serial_number);
224 if (strcmp(soc_dev_attr->revision, "unknown"))
225 kfree(soc_dev_attr->revision);
230 device_initcall(imx8_soc_init);