1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (c) 2023 Hisilicon Limited. */
4 #ifndef __KUNPENG_HCCS_H__
5 #define __KUNPENG_HCCS_H__
8 * |--------------- Chip0 ---------------|---------------- ChipN -------------|
9 * |--------Die0-------|--------DieN-------|--------Die0-------|-------DieN-------|
10 * | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 |P0 | P1 | P2 | P3 |
14 * This value cannot be 255, otherwise the loop of the multi-BD communication
17 #define HCCS_DIE_MAX_PORT_ID 254
19 struct hccs_port_info {
23 bool enable; /* if the port is enabled */
26 struct hccs_die_info *die; /* point to the die the port is located */
29 struct hccs_die_info {
34 struct hccs_port_info *ports;
37 struct hccs_chip_info *chip; /* point to the chip the die is located */
40 struct hccs_chip_info {
43 struct hccs_die_info *dies;
45 struct hccs_dev *hdev;
48 struct hccs_mbox_client_info {
49 struct mbox_client client;
50 struct mbox_chan *mbox_chan;
51 struct pcc_mbox_chan *pcc_chan;
53 void __iomem *pcc_comm_addr;
58 struct acpi_device *acpi_dev;
61 struct hccs_chip_info *chips;
64 struct hccs_mbox_client_info cl_info;
67 #define HCCS_SERDES_MODULE_CODE 0x32
68 enum hccs_subcmd_type {
69 HCCS_GET_CHIP_NUM = 0x1,
72 HCCS_GET_DIE_PORT_INFO,
74 HCCS_GET_PORT_LINK_STATUS,
75 HCCS_GET_PORT_CRC_ERR_CNT,
76 HCCS_GET_DIE_PORTS_LANE_STA,
77 HCCS_GET_DIE_PORTS_LINK_STA,
78 HCCS_GET_DIE_PORTS_CRC_ERR_CNT,
79 HCCS_SUB_CMD_MAX = 255,
82 struct hccs_die_num_req_param {
86 struct hccs_die_info_req_param {
91 struct hccs_die_info_rsp_data {
98 struct hccs_port_attr {
102 u8 enable : 1; /* if the port is enabled */
107 * The common command request for getting the information of all HCCS port on
110 struct hccs_die_comm_req_param {
112 u8 die_id; /* id in hardware */
115 /* The common command request for getting the information of a specific port */
116 struct hccs_port_comm_req_param {
122 #define HCCS_PORT_RESET 1
123 #define HCCS_PORT_SETUP 2
124 #define HCCS_PORT_CONFIG 3
125 #define HCCS_PORT_READY 4
126 struct hccs_link_status {
127 u8 lane_mask; /* indicate which lanes are used. */
128 u8 link_fsm : 3; /* link fsm, 1: reset 2: setup 3: config 4: link-up */
129 u8 lane_num : 5; /* current lane number */
132 struct hccs_req_head {
133 u8 module_code; /* set to 0x32 for serdes */
138 struct hccs_rsp_head {
144 struct hccs_fw_inner_head {
145 u8 retStatus; /* 0: success, other: failure */
149 #define HCCS_PCC_SHARE_MEM_BYTES 64
150 #define HCCS_FW_INNER_HEAD_BYTES 8
151 #define HCCS_RSP_HEAD_BYTES 4
153 #define HCCS_MAX_RSP_DATA_BYTES (HCCS_PCC_SHARE_MEM_BYTES - \
154 HCCS_FW_INNER_HEAD_BYTES - \
156 #define HCCS_MAX_RSP_DATA_SIZE_MAX (HCCS_MAX_RSP_DATA_BYTES / 4)
159 * Note: Actual available size of data field also depands on the PCC header
160 * bytes of the specific type. Driver needs to copy the response data in the
161 * communication space based on the real length.
163 struct hccs_rsp_desc {
164 struct hccs_fw_inner_head fw_inner_head; /* 8 Bytes */
165 struct hccs_rsp_head rsp_head; /* 4 Bytes */
166 u32 data[HCCS_MAX_RSP_DATA_SIZE_MAX];
169 #define HCCS_REQ_HEAD_BYTES 4
170 #define HCCS_MAX_REQ_DATA_BYTES (HCCS_PCC_SHARE_MEM_BYTES - \
172 #define HCCS_MAX_REQ_DATA_SIZE_MAX (HCCS_MAX_REQ_DATA_BYTES / 4)
175 * Note: Actual available size of data field also depands on the PCC header
176 * bytes of the specific type. Driver needs to copy the request data to the
177 * communication space based on the real length.
179 struct hccs_req_desc {
180 struct hccs_req_head req_head; /* 4 Bytes */
181 u32 data[HCCS_MAX_REQ_DATA_SIZE_MAX];
186 struct hccs_req_desc req;
187 struct hccs_rsp_desc rsp;
191 #endif /* __KUNPENG_HCCS_H__ */