1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/powerpc/sysdev/qe_lib/qe_io.c
5 * QE Parallel I/O ports configuration routines
7 * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
9 * Author: Li Yang <LeoLi@freescale.com>
10 * Based on code from Shlomi Gridish <gridish@freescale.com>
13 #include <linux/stddef.h>
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/ioport.h>
20 #include <soc/fsl/qe/qe.h>
22 #include <sysdev/fsl_soc.h>
26 static struct qe_pio_regs __iomem *par_io;
27 static int num_par_io_ports = 0;
29 int par_io_init(struct device_node *np)
35 /* Map Parallel I/O ports registers */
36 ret = of_address_to_resource(np, 0, &res);
39 par_io = ioremap(res.start, resource_size(&res));
41 num_ports = of_get_property(np, "num-ports", NULL);
43 num_par_io_ports = *num_ports;
48 void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, int dir,
49 int open_drain, int assignment, int has_irq)
56 /* calculate pin location for single and 2 bits information */
57 pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1)));
59 /* Set open drain, if required */
60 tmp_val = qe_ioread32be(&par_io->cpodr);
62 qe_iowrite32be(pin_mask1bit | tmp_val, &par_io->cpodr);
64 qe_iowrite32be(~pin_mask1bit & tmp_val, &par_io->cpodr);
66 /* define direction */
67 tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
68 qe_ioread32be(&par_io->cpdir2) :
69 qe_ioread32be(&par_io->cpdir1);
71 /* get all bits mask for 2 bit per port */
72 pin_mask2bits = (u32) (0x3 << (QE_PIO_PINS -
73 (pin % (QE_PIO_PINS / 2) + 1) * 2));
75 /* Get the final mask we need for the right definition */
76 new_mask2bits = (u32) (dir << (QE_PIO_PINS -
77 (pin % (QE_PIO_PINS / 2) + 1) * 2));
79 /* clear and set 2 bits mask */
80 if (pin > (QE_PIO_PINS / 2) - 1) {
81 qe_iowrite32be(~pin_mask2bits & tmp_val, &par_io->cpdir2);
82 tmp_val &= ~pin_mask2bits;
83 qe_iowrite32be(new_mask2bits | tmp_val, &par_io->cpdir2);
85 qe_iowrite32be(~pin_mask2bits & tmp_val, &par_io->cpdir1);
86 tmp_val &= ~pin_mask2bits;
87 qe_iowrite32be(new_mask2bits | tmp_val, &par_io->cpdir1);
89 /* define pin assignment */
90 tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
91 qe_ioread32be(&par_io->cppar2) :
92 qe_ioread32be(&par_io->cppar1);
94 new_mask2bits = (u32) (assignment << (QE_PIO_PINS -
95 (pin % (QE_PIO_PINS / 2) + 1) * 2));
96 /* clear and set 2 bits mask */
97 if (pin > (QE_PIO_PINS / 2) - 1) {
98 qe_iowrite32be(~pin_mask2bits & tmp_val, &par_io->cppar2);
99 tmp_val &= ~pin_mask2bits;
100 qe_iowrite32be(new_mask2bits | tmp_val, &par_io->cppar2);
102 qe_iowrite32be(~pin_mask2bits & tmp_val, &par_io->cppar1);
103 tmp_val &= ~pin_mask2bits;
104 qe_iowrite32be(new_mask2bits | tmp_val, &par_io->cppar1);
107 EXPORT_SYMBOL(__par_io_config_pin);
109 int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
110 int assignment, int has_irq)
112 if (!par_io || port >= num_par_io_ports)
115 __par_io_config_pin(&par_io[port], pin, dir, open_drain, assignment,
119 EXPORT_SYMBOL(par_io_config_pin);
121 int par_io_data_set(u8 port, u8 pin, u8 val)
123 u32 pin_mask, tmp_val;
125 if (port >= num_par_io_ports)
127 if (pin >= QE_PIO_PINS)
129 /* calculate pin location */
130 pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin));
132 tmp_val = qe_ioread32be(&par_io[port].cpdata);
134 if (val == 0) /* clear */
135 qe_iowrite32be(~pin_mask & tmp_val, &par_io[port].cpdata);
137 qe_iowrite32be(pin_mask | tmp_val, &par_io[port].cpdata);
141 EXPORT_SYMBOL(par_io_data_set);
143 int par_io_of_config(struct device_node *np)
145 struct device_node *pio;
148 const unsigned int *pio_map;
150 if (par_io == NULL) {
151 printk(KERN_ERR "par_io not initialized\n");
155 ph = of_get_property(np, "pio-handle", NULL);
157 printk(KERN_ERR "pio-handle not available\n");
161 pio = of_find_node_by_phandle(*ph);
163 pio_map = of_get_property(pio, "pio-map", &pio_map_len);
164 if (pio_map == NULL) {
165 printk(KERN_ERR "pio-map is not set!\n");
168 pio_map_len /= sizeof(unsigned int);
169 if ((pio_map_len % 6) != 0) {
170 printk(KERN_ERR "pio-map format wrong!\n");
174 while (pio_map_len > 0) {
175 par_io_config_pin((u8) pio_map[0], (u8) pio_map[1],
176 (int) pio_map[2], (int) pio_map[3],
177 (int) pio_map[4], (int) pio_map[5]);
184 EXPORT_SYMBOL(par_io_of_config);