1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Universal Flash Storage Host controller driver Core
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
12 #include <linux/async.h>
13 #include <linux/devfreq.h>
14 #include <linux/nls.h>
16 #include <linux/bitfield.h>
17 #include <linux/blk-pm.h>
18 #include <linux/blkdev.h>
19 #include <scsi/scsi_driver.h>
21 #include "ufs_quirks.h"
23 #include "ufs-sysfs.h"
24 #include "ufs-debugfs.h"
25 #include "ufs-fault-injection.h"
27 #include "ufshcd-crypto.h"
29 #include <asm/unaligned.h>
31 #define CREATE_TRACE_POINTS
32 #include <trace/events/ufs.h>
34 #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
37 /* UIC command timeout, unit: ms */
38 #define UIC_CMD_TIMEOUT 500
40 /* NOP OUT retries waiting for NOP IN response */
41 #define NOP_OUT_RETRIES 10
42 /* Timeout after 50 msecs if NOP OUT hangs without response */
43 #define NOP_OUT_TIMEOUT 50 /* msecs */
45 /* Query request retries */
46 #define QUERY_REQ_RETRIES 3
47 /* Query request timeout */
48 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
50 /* Task management command timeout */
51 #define TM_CMD_TIMEOUT 100 /* msecs */
53 /* maximum number of retries for a general UIC command */
54 #define UFS_UIC_COMMAND_RETRIES 3
56 /* maximum number of link-startup retries */
57 #define DME_LINKSTARTUP_RETRIES 3
59 /* Maximum retries for Hibern8 enter */
60 #define UIC_HIBERN8_ENTER_RETRIES 3
62 /* maximum number of reset retries before giving up */
63 #define MAX_HOST_RESET_RETRIES 5
65 /* Expose the flag value from utp_upiu_query.value */
66 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
68 /* Interrupt aggregation default timeout, unit: 40us */
69 #define INT_AGGR_DEF_TO 0x02
71 /* default delay of autosuspend: 2000 ms */
72 #define RPM_AUTOSUSPEND_DELAY_MS 2000
74 /* Default delay of RPM device flush delayed work */
75 #define RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS 5000
77 /* Default value of wait time before gating device ref clock */
78 #define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
80 /* Polling time to wait for fDeviceInit */
81 #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */
83 #define wlun_dev_to_hba(dv) shost_priv(to_scsi_device(dv)->host)
85 #define ufshcd_toggle_vreg(_dev, _vreg, _on) \
89 _ret = ufshcd_enable_vreg(_dev, _vreg); \
91 _ret = ufshcd_disable_vreg(_dev, _vreg); \
95 #define ufshcd_hex_dump(prefix_str, buf, len) do { \
96 size_t __len = (len); \
97 print_hex_dump(KERN_ERR, prefix_str, \
98 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
99 16, 4, buf, __len, false); \
102 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
108 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
111 regs = kzalloc(len, GFP_ATOMIC);
115 for (pos = 0; pos < len; pos += 4)
116 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
118 ufshcd_hex_dump(prefix, regs, len);
123 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
126 UFSHCD_MAX_CHANNEL = 0,
128 UFSHCD_CMD_PER_LUN = 32,
129 UFSHCD_CAN_QUEUE = 32,
132 /* UFSHCD error handling flags */
134 UFSHCD_EH_IN_PROGRESS = (1 << 0),
137 /* UFSHCD UIC layer error flags */
139 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
140 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
141 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
142 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
143 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
144 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
145 UFSHCD_UIC_PA_GENERIC_ERROR = (1 << 6), /* Generic PA error */
148 #define ufshcd_set_eh_in_progress(h) \
149 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
150 #define ufshcd_eh_in_progress(h) \
151 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
152 #define ufshcd_clear_eh_in_progress(h) \
153 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
155 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
156 [UFS_PM_LVL_0] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
157 [UFS_PM_LVL_1] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
158 [UFS_PM_LVL_2] = {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
159 [UFS_PM_LVL_3] = {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
160 [UFS_PM_LVL_4] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
161 [UFS_PM_LVL_5] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
163 * For DeepSleep, the link is first put in hibern8 and then off.
164 * Leaving the link in hibern8 is not supported.
166 [UFS_PM_LVL_6] = {UFS_DEEPSLEEP_PWR_MODE, UIC_LINK_OFF_STATE},
169 static inline enum ufs_dev_pwr_mode
170 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
172 return ufs_pm_lvl_states[lvl].dev_state;
175 static inline enum uic_link_state
176 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
178 return ufs_pm_lvl_states[lvl].link_state;
181 static inline enum ufs_pm_level
182 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
183 enum uic_link_state link_state)
185 enum ufs_pm_level lvl;
187 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
188 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
189 (ufs_pm_lvl_states[lvl].link_state == link_state))
193 /* if no match found, return the level 0 */
197 static struct ufs_dev_fix ufs_fixups[] = {
198 /* UFS cards deviations table */
199 UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
200 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
201 UFS_DEVICE_QUIRK_SWAP_L2P_ENTRY_FOR_HPB_READ),
202 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
203 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
204 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE |
205 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
206 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
207 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
208 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
209 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
210 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
211 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
212 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
213 UFS_DEVICE_QUIRK_PA_TACTIVATE),
214 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
215 UFS_DEVICE_QUIRK_PA_TACTIVATE),
219 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
220 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
221 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
222 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
223 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
224 static void ufshcd_hba_exit(struct ufs_hba *hba);
225 static int ufshcd_clear_ua_wluns(struct ufs_hba *hba);
226 static int ufshcd_probe_hba(struct ufs_hba *hba, bool async);
227 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
228 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
229 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
230 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
231 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
232 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
233 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
234 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
235 static irqreturn_t ufshcd_intr(int irq, void *__hba);
236 static int ufshcd_change_power_mode(struct ufs_hba *hba,
237 struct ufs_pa_layer_attr *pwr_mode);
238 static void ufshcd_schedule_eh_work(struct ufs_hba *hba);
239 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on);
240 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on);
241 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
242 struct ufs_vreg *vreg);
243 static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag);
244 static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
245 static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
246 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
247 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
249 static inline void ufshcd_enable_irq(struct ufs_hba *hba)
251 if (!hba->is_irq_enabled) {
252 enable_irq(hba->irq);
253 hba->is_irq_enabled = true;
257 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
259 if (hba->is_irq_enabled) {
260 disable_irq(hba->irq);
261 hba->is_irq_enabled = false;
265 static inline void ufshcd_wb_config(struct ufs_hba *hba)
267 if (!ufshcd_is_wb_allowed(hba))
270 ufshcd_wb_toggle(hba, true);
272 ufshcd_wb_toggle_flush_during_h8(hba, true);
273 if (!(hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL))
274 ufshcd_wb_toggle_flush(hba, true);
277 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
279 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
280 scsi_unblock_requests(hba->host);
283 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
285 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
286 scsi_block_requests(hba->host);
289 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
290 enum ufs_trace_str_t str_t)
292 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
293 struct utp_upiu_header *header;
295 if (!trace_ufshcd_upiu_enabled())
298 if (str_t == UFS_CMD_SEND)
299 header = &rq->header;
301 header = &hba->lrb[tag].ucd_rsp_ptr->header;
303 trace_ufshcd_upiu(dev_name(hba->dev), str_t, header, &rq->sc.cdb,
307 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba,
308 enum ufs_trace_str_t str_t,
309 struct utp_upiu_req *rq_rsp)
311 if (!trace_ufshcd_upiu_enabled())
314 trace_ufshcd_upiu(dev_name(hba->dev), str_t, &rq_rsp->header,
315 &rq_rsp->qr, UFS_TSF_OSF);
318 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
319 enum ufs_trace_str_t str_t)
321 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[tag];
323 if (!trace_ufshcd_upiu_enabled())
326 if (str_t == UFS_TM_SEND)
327 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
328 &descp->upiu_req.req_header,
329 &descp->upiu_req.input_param1,
332 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
333 &descp->upiu_rsp.rsp_header,
334 &descp->upiu_rsp.output_param1,
338 static void ufshcd_add_uic_command_trace(struct ufs_hba *hba,
339 struct uic_command *ucmd,
340 enum ufs_trace_str_t str_t)
344 if (!trace_ufshcd_uic_command_enabled())
347 if (str_t == UFS_CMD_SEND)
350 cmd = ufshcd_readl(hba, REG_UIC_COMMAND);
352 trace_ufshcd_uic_command(dev_name(hba->dev), str_t, cmd,
353 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_1),
354 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2),
355 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3));
358 static void ufshcd_add_command_trace(struct ufs_hba *hba, unsigned int tag,
359 enum ufs_trace_str_t str_t)
362 u8 opcode = 0, group_id = 0;
364 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
365 struct scsi_cmnd *cmd = lrbp->cmd;
366 struct request *rq = scsi_cmd_to_rq(cmd);
367 int transfer_len = -1;
372 /* trace UPIU also */
373 ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
374 if (!trace_ufshcd_command_enabled())
377 opcode = cmd->cmnd[0];
378 lba = scsi_get_lba(cmd);
380 if (opcode == READ_10 || opcode == WRITE_10) {
382 * Currently we only fully trace read(10) and write(10) commands
385 be32_to_cpu(lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
386 if (opcode == WRITE_10)
387 group_id = lrbp->cmd->cmnd[6];
388 } else if (opcode == UNMAP) {
390 * The number of Bytes to be unmapped beginning with the lba.
392 transfer_len = blk_rq_bytes(rq);
395 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
396 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
397 trace_ufshcd_command(dev_name(hba->dev), str_t, tag,
398 doorbell, transfer_len, intr, lba, opcode, group_id);
401 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
403 struct ufs_clk_info *clki;
404 struct list_head *head = &hba->clk_list_head;
406 if (list_empty(head))
409 list_for_each_entry(clki, head, list) {
410 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
412 dev_err(hba->dev, "clk: %s, rate: %u\n",
413 clki->name, clki->curr_freq);
417 static void ufshcd_print_evt(struct ufs_hba *hba, u32 id,
422 struct ufs_event_hist *e;
424 if (id >= UFS_EVT_CNT)
427 e = &hba->ufs_stats.event[id];
429 for (i = 0; i < UFS_EVENT_HIST_LENGTH; i++) {
430 int p = (i + e->pos) % UFS_EVENT_HIST_LENGTH;
432 if (e->tstamp[p] == 0)
434 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
435 e->val[p], ktime_to_us(e->tstamp[p]));
440 dev_err(hba->dev, "No record of %s\n", err_name);
442 dev_err(hba->dev, "%s: total cnt=%llu\n", err_name, e->cnt);
445 static void ufshcd_print_evt_hist(struct ufs_hba *hba)
447 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
449 ufshcd_print_evt(hba, UFS_EVT_PA_ERR, "pa_err");
450 ufshcd_print_evt(hba, UFS_EVT_DL_ERR, "dl_err");
451 ufshcd_print_evt(hba, UFS_EVT_NL_ERR, "nl_err");
452 ufshcd_print_evt(hba, UFS_EVT_TL_ERR, "tl_err");
453 ufshcd_print_evt(hba, UFS_EVT_DME_ERR, "dme_err");
454 ufshcd_print_evt(hba, UFS_EVT_AUTO_HIBERN8_ERR,
456 ufshcd_print_evt(hba, UFS_EVT_FATAL_ERR, "fatal_err");
457 ufshcd_print_evt(hba, UFS_EVT_LINK_STARTUP_FAIL,
458 "link_startup_fail");
459 ufshcd_print_evt(hba, UFS_EVT_RESUME_ERR, "resume_fail");
460 ufshcd_print_evt(hba, UFS_EVT_SUSPEND_ERR,
462 ufshcd_print_evt(hba, UFS_EVT_DEV_RESET, "dev_reset");
463 ufshcd_print_evt(hba, UFS_EVT_HOST_RESET, "host_reset");
464 ufshcd_print_evt(hba, UFS_EVT_ABORT, "task_abort");
466 ufshcd_vops_dbg_register_dump(hba);
470 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
472 struct ufshcd_lrb *lrbp;
476 for_each_set_bit(tag, &bitmap, hba->nutrs) {
477 lrbp = &hba->lrb[tag];
479 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
480 tag, ktime_to_us(lrbp->issue_time_stamp));
481 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
482 tag, ktime_to_us(lrbp->compl_time_stamp));
484 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
485 tag, (u64)lrbp->utrd_dma_addr);
487 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
488 sizeof(struct utp_transfer_req_desc));
489 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
490 (u64)lrbp->ucd_req_dma_addr);
491 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
492 sizeof(struct utp_upiu_req));
493 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
494 (u64)lrbp->ucd_rsp_dma_addr);
495 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
496 sizeof(struct utp_upiu_rsp));
498 prdt_length = le16_to_cpu(
499 lrbp->utr_descriptor_ptr->prd_table_length);
500 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
501 prdt_length /= sizeof(struct ufshcd_sg_entry);
504 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
506 (u64)lrbp->ucd_prdt_dma_addr);
509 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
510 sizeof(struct ufshcd_sg_entry) * prdt_length);
514 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
518 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
519 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
521 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
522 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
526 static void ufshcd_print_host_state(struct ufs_hba *hba)
528 struct scsi_device *sdev_ufs = hba->sdev_ufs_device;
530 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
531 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
532 hba->outstanding_reqs, hba->outstanding_tasks);
533 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
534 hba->saved_err, hba->saved_uic_err);
535 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
536 hba->curr_dev_pwr_mode, hba->uic_link_state);
537 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
538 hba->pm_op_in_progress, hba->is_sys_suspended);
539 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
540 hba->auto_bkops_enabled, hba->host->host_self_blocked);
541 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
543 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt=%d\n",
544 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
545 hba->ufs_stats.hibern8_exit_cnt);
546 dev_err(hba->dev, "last intr at %lld us, last intr status=0x%x\n",
547 ktime_to_us(hba->ufs_stats.last_intr_ts),
548 hba->ufs_stats.last_intr_status);
549 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
550 hba->eh_flags, hba->req_abort_count);
551 dev_err(hba->dev, "hba->ufs_version=0x%x, Host capabilities=0x%x, caps=0x%x\n",
552 hba->ufs_version, hba->capabilities, hba->caps);
553 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
556 dev_err(hba->dev, "UFS dev info: %.8s %.16s rev %.4s\n",
557 sdev_ufs->vendor, sdev_ufs->model, sdev_ufs->rev);
559 ufshcd_print_clk_freqs(hba);
563 * ufshcd_print_pwr_info - print power params as saved in hba
565 * @hba: per-adapter instance
567 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
569 static const char * const names[] = {
579 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
581 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
582 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
583 names[hba->pwr_info.pwr_rx],
584 names[hba->pwr_info.pwr_tx],
585 hba->pwr_info.hs_rate);
588 static void ufshcd_device_reset(struct ufs_hba *hba)
592 err = ufshcd_vops_device_reset(hba);
595 ufshcd_set_ufs_dev_active(hba);
596 if (ufshcd_is_wb_allowed(hba)) {
597 hba->dev_info.wb_enabled = false;
598 hba->dev_info.wb_buf_flush_enabled = false;
601 if (err != -EOPNOTSUPP)
602 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, err);
605 void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
613 usleep_range(us, us + tolerance);
615 EXPORT_SYMBOL_GPL(ufshcd_delay_us);
618 * ufshcd_wait_for_register - wait for register value to change
619 * @hba: per-adapter interface
620 * @reg: mmio register offset
621 * @mask: mask to apply to the read register value
622 * @val: value to wait for
623 * @interval_us: polling interval in microseconds
624 * @timeout_ms: timeout in milliseconds
627 * -ETIMEDOUT on error, zero on success.
629 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
630 u32 val, unsigned long interval_us,
631 unsigned long timeout_ms)
634 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
636 /* ignore bits that we don't intend to wait on */
639 while ((ufshcd_readl(hba, reg) & mask) != val) {
640 usleep_range(interval_us, interval_us + 50);
641 if (time_after(jiffies, timeout)) {
642 if ((ufshcd_readl(hba, reg) & mask) != val)
652 * ufshcd_get_intr_mask - Get the interrupt bit mask
653 * @hba: Pointer to adapter instance
655 * Returns interrupt bit mask per version
657 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
659 if (hba->ufs_version == ufshci_version(1, 0))
660 return INTERRUPT_MASK_ALL_VER_10;
661 if (hba->ufs_version <= ufshci_version(2, 0))
662 return INTERRUPT_MASK_ALL_VER_11;
664 return INTERRUPT_MASK_ALL_VER_21;
668 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
669 * @hba: Pointer to adapter instance
671 * Returns UFSHCI version supported by the controller
673 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
677 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
678 ufshci_ver = ufshcd_vops_get_ufs_hci_version(hba);
680 ufshci_ver = ufshcd_readl(hba, REG_UFS_VERSION);
683 * UFSHCI v1.x uses a different version scheme, in order
684 * to allow the use of comparisons with the ufshci_version
685 * function, we convert it to the same scheme as ufs 2.0+.
687 if (ufshci_ver & 0x00010000)
688 return ufshci_version(1, ufshci_ver & 0x00000100);
694 * ufshcd_is_device_present - Check if any device connected to
695 * the host controller
696 * @hba: pointer to adapter instance
698 * Returns true if device present, false if no device detected
700 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
702 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
703 DEVICE_PRESENT) ? true : false;
707 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
708 * @lrbp: pointer to local command reference block
710 * This function is used to get the OCS field from UTRD
711 * Returns the OCS field in the UTRD
713 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
715 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
719 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
720 * @hba: per adapter instance
721 * @pos: position of the bit to be cleared
723 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
725 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
726 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
728 ufshcd_writel(hba, ~(1 << pos),
729 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
733 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
734 * @hba: per adapter instance
735 * @pos: position of the bit to be cleared
737 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
739 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
740 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
742 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
746 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
747 * @reg: Register value of host controller status
749 * Returns integer, 0 on Success and positive value if failed
751 static inline int ufshcd_get_lists_status(u32 reg)
753 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
757 * ufshcd_get_uic_cmd_result - Get the UIC command result
758 * @hba: Pointer to adapter instance
760 * This function gets the result of UIC command completion
761 * Returns 0 on success, non zero value on error
763 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
765 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
766 MASK_UIC_COMMAND_RESULT;
770 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
771 * @hba: Pointer to adapter instance
773 * This function gets UIC command argument3
774 * Returns 0 on success, non zero value on error
776 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
778 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
782 * ufshcd_get_req_rsp - returns the TR response transaction type
783 * @ucd_rsp_ptr: pointer to response UPIU
786 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
788 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
792 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
793 * @ucd_rsp_ptr: pointer to response UPIU
795 * This function gets the response status and scsi_status from response UPIU
796 * Returns the response result code.
799 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
801 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
805 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
807 * @ucd_rsp_ptr: pointer to response UPIU
809 * Return the data segment length.
811 static inline unsigned int
812 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
814 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
815 MASK_RSP_UPIU_DATA_SEG_LEN;
819 * ufshcd_is_exception_event - Check if the device raised an exception event
820 * @ucd_rsp_ptr: pointer to response UPIU
822 * The function checks if the device raised an exception event indicated in
823 * the Device Information field of response UPIU.
825 * Returns true if exception is raised, false otherwise.
827 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
829 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
830 MASK_RSP_EXCEPTION_EVENT ? true : false;
834 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
835 * @hba: per adapter instance
838 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
840 ufshcd_writel(hba, INT_AGGR_ENABLE |
841 INT_AGGR_COUNTER_AND_TIMER_RESET,
842 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
846 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
847 * @hba: per adapter instance
848 * @cnt: Interrupt aggregation counter threshold
849 * @tmout: Interrupt aggregation timeout value
852 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
854 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
855 INT_AGGR_COUNTER_THLD_VAL(cnt) |
856 INT_AGGR_TIMEOUT_VAL(tmout),
857 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
861 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
862 * @hba: per adapter instance
864 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
866 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
870 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
871 * When run-stop registers are set to 1, it indicates the
872 * host controller that it can process the requests
873 * @hba: per adapter instance
875 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
877 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
878 REG_UTP_TASK_REQ_LIST_RUN_STOP);
879 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
880 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
884 * ufshcd_hba_start - Start controller initialization sequence
885 * @hba: per adapter instance
887 static inline void ufshcd_hba_start(struct ufs_hba *hba)
889 u32 val = CONTROLLER_ENABLE;
891 if (ufshcd_crypto_enable(hba))
892 val |= CRYPTO_GENERAL_ENABLE;
894 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
898 * ufshcd_is_hba_active - Get controller state
899 * @hba: per adapter instance
901 * Returns false if controller is active, true otherwise
903 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
905 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
909 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
911 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
912 if (hba->ufs_version <= ufshci_version(1, 1))
913 return UFS_UNIPRO_VER_1_41;
915 return UFS_UNIPRO_VER_1_6;
917 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
919 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
922 * If both host and device support UniPro ver1.6 or later, PA layer
923 * parameters tuning happens during link startup itself.
925 * We can manually tune PA layer parameters if either host or device
926 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
927 * logic simple, we will only do manual tuning if local unipro version
928 * doesn't support ver1.6 or later.
930 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
937 * ufshcd_set_clk_freq - set UFS controller clock frequencies
938 * @hba: per adapter instance
939 * @scale_up: If True, set max possible frequency othewise set low frequency
941 * Returns 0 if successful
942 * Returns < 0 for any other errors
944 static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
947 struct ufs_clk_info *clki;
948 struct list_head *head = &hba->clk_list_head;
950 if (list_empty(head))
953 list_for_each_entry(clki, head, list) {
954 if (!IS_ERR_OR_NULL(clki->clk)) {
955 if (scale_up && clki->max_freq) {
956 if (clki->curr_freq == clki->max_freq)
959 ret = clk_set_rate(clki->clk, clki->max_freq);
961 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
962 __func__, clki->name,
963 clki->max_freq, ret);
966 trace_ufshcd_clk_scaling(dev_name(hba->dev),
967 "scaled up", clki->name,
971 clki->curr_freq = clki->max_freq;
973 } else if (!scale_up && clki->min_freq) {
974 if (clki->curr_freq == clki->min_freq)
977 ret = clk_set_rate(clki->clk, clki->min_freq);
979 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
980 __func__, clki->name,
981 clki->min_freq, ret);
984 trace_ufshcd_clk_scaling(dev_name(hba->dev),
985 "scaled down", clki->name,
988 clki->curr_freq = clki->min_freq;
991 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
992 clki->name, clk_get_rate(clki->clk));
1000 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1001 * @hba: per adapter instance
1002 * @scale_up: True if scaling up and false if scaling down
1004 * Returns 0 if successful
1005 * Returns < 0 for any other errors
1007 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1010 ktime_t start = ktime_get();
1012 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1016 ret = ufshcd_set_clk_freq(hba, scale_up);
1020 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1022 ufshcd_set_clk_freq(hba, !scale_up);
1025 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1026 (scale_up ? "up" : "down"),
1027 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1032 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
1033 * @hba: per adapter instance
1034 * @scale_up: True if scaling up and false if scaling down
1036 * Returns true if scaling is required, false otherwise.
1038 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
1041 struct ufs_clk_info *clki;
1042 struct list_head *head = &hba->clk_list_head;
1044 if (list_empty(head))
1047 list_for_each_entry(clki, head, list) {
1048 if (!IS_ERR_OR_NULL(clki->clk)) {
1049 if (scale_up && clki->max_freq) {
1050 if (clki->curr_freq == clki->max_freq)
1053 } else if (!scale_up && clki->min_freq) {
1054 if (clki->curr_freq == clki->min_freq)
1064 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1065 u64 wait_timeout_us)
1067 unsigned long flags;
1071 bool timeout = false, do_last_check = false;
1074 ufshcd_hold(hba, false);
1075 spin_lock_irqsave(hba->host->host_lock, flags);
1077 * Wait for all the outstanding tasks/transfer requests.
1078 * Verify by checking the doorbell registers are clear.
1080 start = ktime_get();
1082 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1087 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1088 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1089 if (!tm_doorbell && !tr_doorbell) {
1092 } else if (do_last_check) {
1096 spin_unlock_irqrestore(hba->host->host_lock, flags);
1098 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1102 * We might have scheduled out for long time so make
1103 * sure to check if doorbells are cleared by this time
1106 do_last_check = true;
1108 spin_lock_irqsave(hba->host->host_lock, flags);
1109 } while (tm_doorbell || tr_doorbell);
1113 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1114 __func__, tm_doorbell, tr_doorbell);
1118 spin_unlock_irqrestore(hba->host->host_lock, flags);
1119 ufshcd_release(hba);
1124 * ufshcd_scale_gear - scale up/down UFS gear
1125 * @hba: per adapter instance
1126 * @scale_up: True for scaling up gear and false for scaling down
1128 * Returns 0 for success,
1129 * Returns -EBUSY if scaling can't happen at this time
1130 * Returns non-zero for any other errors
1132 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1135 struct ufs_pa_layer_attr new_pwr_info;
1138 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1139 sizeof(struct ufs_pa_layer_attr));
1141 memcpy(&new_pwr_info, &hba->pwr_info,
1142 sizeof(struct ufs_pa_layer_attr));
1144 if (hba->pwr_info.gear_tx > hba->clk_scaling.min_gear ||
1145 hba->pwr_info.gear_rx > hba->clk_scaling.min_gear) {
1146 /* save the current power mode */
1147 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1149 sizeof(struct ufs_pa_layer_attr));
1151 /* scale down gear */
1152 new_pwr_info.gear_tx = hba->clk_scaling.min_gear;
1153 new_pwr_info.gear_rx = hba->clk_scaling.min_gear;
1157 /* check if the power mode needs to be changed or not? */
1158 ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
1160 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1162 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1163 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1168 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1170 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1173 * make sure that there are no outstanding requests when
1174 * clock scaling is in progress
1176 ufshcd_scsi_block_requests(hba);
1177 down_write(&hba->clk_scaling_lock);
1179 if (!hba->clk_scaling.is_allowed ||
1180 ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1182 up_write(&hba->clk_scaling_lock);
1183 ufshcd_scsi_unblock_requests(hba);
1187 /* let's not get into low power until clock scaling is completed */
1188 ufshcd_hold(hba, false);
1194 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, bool writelock)
1197 up_write(&hba->clk_scaling_lock);
1199 up_read(&hba->clk_scaling_lock);
1200 ufshcd_scsi_unblock_requests(hba);
1201 ufshcd_release(hba);
1205 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1206 * @hba: per adapter instance
1207 * @scale_up: True for scaling up and false for scalin down
1209 * Returns 0 for success,
1210 * Returns -EBUSY if scaling can't happen at this time
1211 * Returns non-zero for any other errors
1213 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1216 bool is_writelock = true;
1218 ret = ufshcd_clock_scaling_prepare(hba);
1222 /* scale down the gear before scaling down clocks */
1224 ret = ufshcd_scale_gear(hba, false);
1229 ret = ufshcd_scale_clks(hba, scale_up);
1232 ufshcd_scale_gear(hba, true);
1236 /* scale up the gear after scaling up clocks */
1238 ret = ufshcd_scale_gear(hba, true);
1240 ufshcd_scale_clks(hba, false);
1245 /* Enable Write Booster if we have scaled up else disable it */
1246 downgrade_write(&hba->clk_scaling_lock);
1247 is_writelock = false;
1248 ufshcd_wb_toggle(hba, scale_up);
1251 ufshcd_clock_scaling_unprepare(hba, is_writelock);
1255 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1257 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1258 clk_scaling.suspend_work);
1259 unsigned long irq_flags;
1261 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1262 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1263 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1266 hba->clk_scaling.is_suspended = true;
1267 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1269 __ufshcd_suspend_clkscaling(hba);
1272 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1274 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1275 clk_scaling.resume_work);
1276 unsigned long irq_flags;
1278 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1279 if (!hba->clk_scaling.is_suspended) {
1280 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1283 hba->clk_scaling.is_suspended = false;
1284 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1286 devfreq_resume_device(hba->devfreq);
1289 static int ufshcd_devfreq_target(struct device *dev,
1290 unsigned long *freq, u32 flags)
1293 struct ufs_hba *hba = dev_get_drvdata(dev);
1295 bool scale_up, sched_clk_scaling_suspend_work = false;
1296 struct list_head *clk_list = &hba->clk_list_head;
1297 struct ufs_clk_info *clki;
1298 unsigned long irq_flags;
1300 if (!ufshcd_is_clkscaling_supported(hba))
1303 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1304 /* Override with the closest supported frequency */
1305 *freq = (unsigned long) clk_round_rate(clki->clk, *freq);
1306 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1307 if (ufshcd_eh_in_progress(hba)) {
1308 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1312 if (!hba->clk_scaling.active_reqs)
1313 sched_clk_scaling_suspend_work = true;
1315 if (list_empty(clk_list)) {
1316 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1320 /* Decide based on the rounded-off frequency and update */
1321 scale_up = (*freq == clki->max_freq) ? true : false;
1323 *freq = clki->min_freq;
1324 /* Update the frequency */
1325 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1326 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1328 goto out; /* no state change required */
1330 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1332 start = ktime_get();
1333 ret = ufshcd_devfreq_scale(hba, scale_up);
1335 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1336 (scale_up ? "up" : "down"),
1337 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1340 if (sched_clk_scaling_suspend_work)
1341 queue_work(hba->clk_scaling.workq,
1342 &hba->clk_scaling.suspend_work);
1347 static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1351 WARN_ON_ONCE(reserved);
1356 /* Whether or not any tag is in use by a request that is in progress. */
1357 static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1359 struct request_queue *q = hba->cmd_queue;
1362 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1366 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1367 struct devfreq_dev_status *stat)
1369 struct ufs_hba *hba = dev_get_drvdata(dev);
1370 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1371 unsigned long flags;
1372 struct list_head *clk_list = &hba->clk_list_head;
1373 struct ufs_clk_info *clki;
1376 if (!ufshcd_is_clkscaling_supported(hba))
1379 memset(stat, 0, sizeof(*stat));
1381 spin_lock_irqsave(hba->host->host_lock, flags);
1382 curr_t = ktime_get();
1383 if (!scaling->window_start_t)
1386 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1388 * If current frequency is 0, then the ondemand governor considers
1389 * there's no initial frequency set. And it always requests to set
1390 * to max. frequency.
1392 stat->current_frequency = clki->curr_freq;
1393 if (scaling->is_busy_started)
1394 scaling->tot_busy_t += ktime_us_delta(curr_t,
1395 scaling->busy_start_t);
1397 stat->total_time = ktime_us_delta(curr_t, scaling->window_start_t);
1398 stat->busy_time = scaling->tot_busy_t;
1400 scaling->window_start_t = curr_t;
1401 scaling->tot_busy_t = 0;
1403 if (hba->outstanding_reqs) {
1404 scaling->busy_start_t = curr_t;
1405 scaling->is_busy_started = true;
1407 scaling->busy_start_t = 0;
1408 scaling->is_busy_started = false;
1410 spin_unlock_irqrestore(hba->host->host_lock, flags);
1414 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1416 struct list_head *clk_list = &hba->clk_list_head;
1417 struct ufs_clk_info *clki;
1418 struct devfreq *devfreq;
1421 /* Skip devfreq if we don't have any clocks in the list */
1422 if (list_empty(clk_list))
1425 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1426 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1427 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1429 ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
1430 &hba->vps->ondemand_data);
1431 devfreq = devfreq_add_device(hba->dev,
1432 &hba->vps->devfreq_profile,
1433 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1434 &hba->vps->ondemand_data);
1435 if (IS_ERR(devfreq)) {
1436 ret = PTR_ERR(devfreq);
1437 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1439 dev_pm_opp_remove(hba->dev, clki->min_freq);
1440 dev_pm_opp_remove(hba->dev, clki->max_freq);
1444 hba->devfreq = devfreq;
1449 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1451 struct list_head *clk_list = &hba->clk_list_head;
1452 struct ufs_clk_info *clki;
1457 devfreq_remove_device(hba->devfreq);
1458 hba->devfreq = NULL;
1460 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1461 dev_pm_opp_remove(hba->dev, clki->min_freq);
1462 dev_pm_opp_remove(hba->dev, clki->max_freq);
1465 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1467 unsigned long flags;
1469 devfreq_suspend_device(hba->devfreq);
1470 spin_lock_irqsave(hba->host->host_lock, flags);
1471 hba->clk_scaling.window_start_t = 0;
1472 spin_unlock_irqrestore(hba->host->host_lock, flags);
1475 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1477 unsigned long flags;
1478 bool suspend = false;
1480 cancel_work_sync(&hba->clk_scaling.suspend_work);
1481 cancel_work_sync(&hba->clk_scaling.resume_work);
1483 spin_lock_irqsave(hba->host->host_lock, flags);
1484 if (!hba->clk_scaling.is_suspended) {
1486 hba->clk_scaling.is_suspended = true;
1488 spin_unlock_irqrestore(hba->host->host_lock, flags);
1491 __ufshcd_suspend_clkscaling(hba);
1494 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1496 unsigned long flags;
1497 bool resume = false;
1499 spin_lock_irqsave(hba->host->host_lock, flags);
1500 if (hba->clk_scaling.is_suspended) {
1502 hba->clk_scaling.is_suspended = false;
1504 spin_unlock_irqrestore(hba->host->host_lock, flags);
1507 devfreq_resume_device(hba->devfreq);
1510 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1511 struct device_attribute *attr, char *buf)
1513 struct ufs_hba *hba = dev_get_drvdata(dev);
1515 return sysfs_emit(buf, "%d\n", hba->clk_scaling.is_enabled);
1518 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1519 struct device_attribute *attr, const char *buf, size_t count)
1521 struct ufs_hba *hba = dev_get_drvdata(dev);
1525 if (kstrtou32(buf, 0, &value))
1528 down(&hba->host_sem);
1529 if (!ufshcd_is_user_access_allowed(hba)) {
1535 if (value == hba->clk_scaling.is_enabled)
1538 ufshcd_rpm_get_sync(hba);
1539 ufshcd_hold(hba, false);
1541 hba->clk_scaling.is_enabled = value;
1544 ufshcd_resume_clkscaling(hba);
1546 ufshcd_suspend_clkscaling(hba);
1547 err = ufshcd_devfreq_scale(hba, true);
1549 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1553 ufshcd_release(hba);
1554 ufshcd_rpm_put_sync(hba);
1557 return err ? err : count;
1560 static void ufshcd_init_clk_scaling_sysfs(struct ufs_hba *hba)
1562 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1563 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1564 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1565 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1566 hba->clk_scaling.enable_attr.attr.mode = 0644;
1567 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1568 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1571 static void ufshcd_remove_clk_scaling_sysfs(struct ufs_hba *hba)
1573 if (hba->clk_scaling.enable_attr.attr.name)
1574 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
1577 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1579 char wq_name[sizeof("ufs_clkscaling_00")];
1581 if (!ufshcd_is_clkscaling_supported(hba))
1584 if (!hba->clk_scaling.min_gear)
1585 hba->clk_scaling.min_gear = UFS_HS_G1;
1587 INIT_WORK(&hba->clk_scaling.suspend_work,
1588 ufshcd_clk_scaling_suspend_work);
1589 INIT_WORK(&hba->clk_scaling.resume_work,
1590 ufshcd_clk_scaling_resume_work);
1592 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1593 hba->host->host_no);
1594 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1596 hba->clk_scaling.is_initialized = true;
1599 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1601 if (!hba->clk_scaling.is_initialized)
1604 ufshcd_remove_clk_scaling_sysfs(hba);
1605 destroy_workqueue(hba->clk_scaling.workq);
1606 ufshcd_devfreq_remove(hba);
1607 hba->clk_scaling.is_initialized = false;
1610 static void ufshcd_ungate_work(struct work_struct *work)
1613 unsigned long flags;
1614 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1615 clk_gating.ungate_work);
1617 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1619 spin_lock_irqsave(hba->host->host_lock, flags);
1620 if (hba->clk_gating.state == CLKS_ON) {
1621 spin_unlock_irqrestore(hba->host->host_lock, flags);
1625 spin_unlock_irqrestore(hba->host->host_lock, flags);
1626 ufshcd_hba_vreg_set_hpm(hba);
1627 ufshcd_setup_clocks(hba, true);
1629 ufshcd_enable_irq(hba);
1631 /* Exit from hibern8 */
1632 if (ufshcd_can_hibern8_during_gating(hba)) {
1633 /* Prevent gating in this path */
1634 hba->clk_gating.is_suspended = true;
1635 if (ufshcd_is_link_hibern8(hba)) {
1636 ret = ufshcd_uic_hibern8_exit(hba);
1638 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1641 ufshcd_set_link_active(hba);
1643 hba->clk_gating.is_suspended = false;
1646 ufshcd_scsi_unblock_requests(hba);
1650 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1651 * Also, exit from hibern8 mode and set the link as active.
1652 * @hba: per adapter instance
1653 * @async: This indicates whether caller should ungate clocks asynchronously.
1655 int ufshcd_hold(struct ufs_hba *hba, bool async)
1659 unsigned long flags;
1661 if (!ufshcd_is_clkgating_allowed(hba))
1663 spin_lock_irqsave(hba->host->host_lock, flags);
1664 hba->clk_gating.active_reqs++;
1667 switch (hba->clk_gating.state) {
1670 * Wait for the ungate work to complete if in progress.
1671 * Though the clocks may be in ON state, the link could
1672 * still be in hibner8 state if hibern8 is allowed
1673 * during clock gating.
1674 * Make sure we exit hibern8 state also in addition to
1677 if (ufshcd_can_hibern8_during_gating(hba) &&
1678 ufshcd_is_link_hibern8(hba)) {
1681 hba->clk_gating.active_reqs--;
1684 spin_unlock_irqrestore(hba->host->host_lock, flags);
1685 flush_result = flush_work(&hba->clk_gating.ungate_work);
1686 if (hba->clk_gating.is_suspended && !flush_result)
1688 spin_lock_irqsave(hba->host->host_lock, flags);
1693 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1694 hba->clk_gating.state = CLKS_ON;
1695 trace_ufshcd_clk_gating(dev_name(hba->dev),
1696 hba->clk_gating.state);
1700 * If we are here, it means gating work is either done or
1701 * currently running. Hence, fall through to cancel gating
1702 * work and to enable clocks.
1706 hba->clk_gating.state = REQ_CLKS_ON;
1707 trace_ufshcd_clk_gating(dev_name(hba->dev),
1708 hba->clk_gating.state);
1709 if (queue_work(hba->clk_gating.clk_gating_workq,
1710 &hba->clk_gating.ungate_work))
1711 ufshcd_scsi_block_requests(hba);
1713 * fall through to check if we should wait for this
1714 * work to be done or not.
1720 hba->clk_gating.active_reqs--;
1724 spin_unlock_irqrestore(hba->host->host_lock, flags);
1725 flush_work(&hba->clk_gating.ungate_work);
1726 /* Make sure state is CLKS_ON before returning */
1727 spin_lock_irqsave(hba->host->host_lock, flags);
1730 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1731 __func__, hba->clk_gating.state);
1734 spin_unlock_irqrestore(hba->host->host_lock, flags);
1738 EXPORT_SYMBOL_GPL(ufshcd_hold);
1740 static void ufshcd_gate_work(struct work_struct *work)
1742 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1743 clk_gating.gate_work.work);
1744 unsigned long flags;
1747 spin_lock_irqsave(hba->host->host_lock, flags);
1749 * In case you are here to cancel this work the gating state
1750 * would be marked as REQ_CLKS_ON. In this case save time by
1751 * skipping the gating work and exit after changing the clock
1754 if (hba->clk_gating.is_suspended ||
1755 (hba->clk_gating.state != REQ_CLKS_OFF)) {
1756 hba->clk_gating.state = CLKS_ON;
1757 trace_ufshcd_clk_gating(dev_name(hba->dev),
1758 hba->clk_gating.state);
1762 if (hba->clk_gating.active_reqs
1763 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1764 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1765 || hba->active_uic_cmd || hba->uic_async_done)
1768 spin_unlock_irqrestore(hba->host->host_lock, flags);
1770 /* put the link into hibern8 mode before turning off clocks */
1771 if (ufshcd_can_hibern8_during_gating(hba)) {
1772 ret = ufshcd_uic_hibern8_enter(hba);
1774 hba->clk_gating.state = CLKS_ON;
1775 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
1777 trace_ufshcd_clk_gating(dev_name(hba->dev),
1778 hba->clk_gating.state);
1781 ufshcd_set_link_hibern8(hba);
1784 ufshcd_disable_irq(hba);
1786 ufshcd_setup_clocks(hba, false);
1788 /* Put the host controller in low power mode if possible */
1789 ufshcd_hba_vreg_set_lpm(hba);
1791 * In case you are here to cancel this work the gating state
1792 * would be marked as REQ_CLKS_ON. In this case keep the state
1793 * as REQ_CLKS_ON which would anyway imply that clocks are off
1794 * and a request to turn them on is pending. By doing this way,
1795 * we keep the state machine in tact and this would ultimately
1796 * prevent from doing cancel work multiple times when there are
1797 * new requests arriving before the current cancel work is done.
1799 spin_lock_irqsave(hba->host->host_lock, flags);
1800 if (hba->clk_gating.state == REQ_CLKS_OFF) {
1801 hba->clk_gating.state = CLKS_OFF;
1802 trace_ufshcd_clk_gating(dev_name(hba->dev),
1803 hba->clk_gating.state);
1806 spin_unlock_irqrestore(hba->host->host_lock, flags);
1811 /* host lock must be held before calling this variant */
1812 static void __ufshcd_release(struct ufs_hba *hba)
1814 if (!ufshcd_is_clkgating_allowed(hba))
1817 hba->clk_gating.active_reqs--;
1819 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended ||
1820 hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL ||
1821 hba->outstanding_tasks ||
1822 hba->active_uic_cmd || hba->uic_async_done ||
1823 hba->clk_gating.state == CLKS_OFF)
1826 hba->clk_gating.state = REQ_CLKS_OFF;
1827 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1828 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1829 &hba->clk_gating.gate_work,
1830 msecs_to_jiffies(hba->clk_gating.delay_ms));
1833 void ufshcd_release(struct ufs_hba *hba)
1835 unsigned long flags;
1837 spin_lock_irqsave(hba->host->host_lock, flags);
1838 __ufshcd_release(hba);
1839 spin_unlock_irqrestore(hba->host->host_lock, flags);
1841 EXPORT_SYMBOL_GPL(ufshcd_release);
1843 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1844 struct device_attribute *attr, char *buf)
1846 struct ufs_hba *hba = dev_get_drvdata(dev);
1848 return sysfs_emit(buf, "%lu\n", hba->clk_gating.delay_ms);
1851 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1852 struct device_attribute *attr, const char *buf, size_t count)
1854 struct ufs_hba *hba = dev_get_drvdata(dev);
1855 unsigned long flags, value;
1857 if (kstrtoul(buf, 0, &value))
1860 spin_lock_irqsave(hba->host->host_lock, flags);
1861 hba->clk_gating.delay_ms = value;
1862 spin_unlock_irqrestore(hba->host->host_lock, flags);
1866 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1867 struct device_attribute *attr, char *buf)
1869 struct ufs_hba *hba = dev_get_drvdata(dev);
1871 return sysfs_emit(buf, "%d\n", hba->clk_gating.is_enabled);
1874 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1875 struct device_attribute *attr, const char *buf, size_t count)
1877 struct ufs_hba *hba = dev_get_drvdata(dev);
1878 unsigned long flags;
1881 if (kstrtou32(buf, 0, &value))
1886 spin_lock_irqsave(hba->host->host_lock, flags);
1887 if (value == hba->clk_gating.is_enabled)
1891 __ufshcd_release(hba);
1893 hba->clk_gating.active_reqs++;
1895 hba->clk_gating.is_enabled = value;
1897 spin_unlock_irqrestore(hba->host->host_lock, flags);
1901 static void ufshcd_init_clk_gating_sysfs(struct ufs_hba *hba)
1903 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1904 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1905 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1906 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1907 hba->clk_gating.delay_attr.attr.mode = 0644;
1908 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1909 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1911 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1912 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1913 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1914 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1915 hba->clk_gating.enable_attr.attr.mode = 0644;
1916 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1917 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1920 static void ufshcd_remove_clk_gating_sysfs(struct ufs_hba *hba)
1922 if (hba->clk_gating.delay_attr.attr.name)
1923 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1924 if (hba->clk_gating.enable_attr.attr.name)
1925 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1928 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1930 char wq_name[sizeof("ufs_clk_gating_00")];
1932 if (!ufshcd_is_clkgating_allowed(hba))
1935 hba->clk_gating.state = CLKS_ON;
1937 hba->clk_gating.delay_ms = 150;
1938 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1939 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1941 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1942 hba->host->host_no);
1943 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1944 WQ_MEM_RECLAIM | WQ_HIGHPRI);
1946 ufshcd_init_clk_gating_sysfs(hba);
1948 hba->clk_gating.is_enabled = true;
1949 hba->clk_gating.is_initialized = true;
1952 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1954 if (!hba->clk_gating.is_initialized)
1956 ufshcd_remove_clk_gating_sysfs(hba);
1957 cancel_work_sync(&hba->clk_gating.ungate_work);
1958 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1959 destroy_workqueue(hba->clk_gating.clk_gating_workq);
1960 hba->clk_gating.is_initialized = false;
1963 /* Must be called with host lock acquired */
1964 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1966 bool queue_resume_work = false;
1967 ktime_t curr_t = ktime_get();
1968 unsigned long flags;
1970 if (!ufshcd_is_clkscaling_supported(hba))
1973 spin_lock_irqsave(hba->host->host_lock, flags);
1974 if (!hba->clk_scaling.active_reqs++)
1975 queue_resume_work = true;
1977 if (!hba->clk_scaling.is_enabled || hba->pm_op_in_progress) {
1978 spin_unlock_irqrestore(hba->host->host_lock, flags);
1982 if (queue_resume_work)
1983 queue_work(hba->clk_scaling.workq,
1984 &hba->clk_scaling.resume_work);
1986 if (!hba->clk_scaling.window_start_t) {
1987 hba->clk_scaling.window_start_t = curr_t;
1988 hba->clk_scaling.tot_busy_t = 0;
1989 hba->clk_scaling.is_busy_started = false;
1992 if (!hba->clk_scaling.is_busy_started) {
1993 hba->clk_scaling.busy_start_t = curr_t;
1994 hba->clk_scaling.is_busy_started = true;
1996 spin_unlock_irqrestore(hba->host->host_lock, flags);
1999 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
2001 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
2002 unsigned long flags;
2004 if (!ufshcd_is_clkscaling_supported(hba))
2007 spin_lock_irqsave(hba->host->host_lock, flags);
2008 hba->clk_scaling.active_reqs--;
2009 if (!hba->outstanding_reqs && scaling->is_busy_started) {
2010 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
2011 scaling->busy_start_t));
2012 scaling->busy_start_t = 0;
2013 scaling->is_busy_started = false;
2015 spin_unlock_irqrestore(hba->host->host_lock, flags);
2018 static inline int ufshcd_monitor_opcode2dir(u8 opcode)
2020 if (opcode == READ_6 || opcode == READ_10 || opcode == READ_16)
2022 else if (opcode == WRITE_6 || opcode == WRITE_10 || opcode == WRITE_16)
2028 static inline bool ufshcd_should_inform_monitor(struct ufs_hba *hba,
2029 struct ufshcd_lrb *lrbp)
2031 struct ufs_hba_monitor *m = &hba->monitor;
2033 return (m->enabled && lrbp && lrbp->cmd &&
2034 (!m->chunk_size || m->chunk_size == lrbp->cmd->sdb.length) &&
2035 ktime_before(hba->monitor.enabled_ts, lrbp->issue_time_stamp));
2038 static void ufshcd_start_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2040 int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
2041 unsigned long flags;
2043 spin_lock_irqsave(hba->host->host_lock, flags);
2044 if (dir >= 0 && hba->monitor.nr_queued[dir]++ == 0)
2045 hba->monitor.busy_start_ts[dir] = ktime_get();
2046 spin_unlock_irqrestore(hba->host->host_lock, flags);
2049 static void ufshcd_update_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2051 int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
2052 unsigned long flags;
2054 spin_lock_irqsave(hba->host->host_lock, flags);
2055 if (dir >= 0 && hba->monitor.nr_queued[dir] > 0) {
2056 struct request *req = scsi_cmd_to_rq(lrbp->cmd);
2057 struct ufs_hba_monitor *m = &hba->monitor;
2058 ktime_t now, inc, lat;
2060 now = lrbp->compl_time_stamp;
2061 inc = ktime_sub(now, m->busy_start_ts[dir]);
2062 m->total_busy[dir] = ktime_add(m->total_busy[dir], inc);
2063 m->nr_sec_rw[dir] += blk_rq_sectors(req);
2065 /* Update latencies */
2067 lat = ktime_sub(now, lrbp->issue_time_stamp);
2068 m->lat_sum[dir] += lat;
2069 if (m->lat_max[dir] < lat || !m->lat_max[dir])
2070 m->lat_max[dir] = lat;
2071 if (m->lat_min[dir] > lat || !m->lat_min[dir])
2072 m->lat_min[dir] = lat;
2074 m->nr_queued[dir]--;
2075 /* Push forward the busy start of monitor */
2076 m->busy_start_ts[dir] = now;
2078 spin_unlock_irqrestore(hba->host->host_lock, flags);
2082 * ufshcd_send_command - Send SCSI or device management commands
2083 * @hba: per adapter instance
2084 * @task_tag: Task tag of the command
2087 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
2089 struct ufshcd_lrb *lrbp = &hba->lrb[task_tag];
2090 unsigned long flags;
2092 lrbp->issue_time_stamp = ktime_get();
2093 lrbp->compl_time_stamp = ktime_set(0, 0);
2094 ufshcd_add_command_trace(hba, task_tag, UFS_CMD_SEND);
2095 ufshcd_clk_scaling_start_busy(hba);
2096 if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
2097 ufshcd_start_monitor(hba, lrbp);
2099 spin_lock_irqsave(&hba->outstanding_lock, flags);
2100 if (hba->vops && hba->vops->setup_xfer_req)
2101 hba->vops->setup_xfer_req(hba, task_tag, !!lrbp->cmd);
2102 __set_bit(task_tag, &hba->outstanding_reqs);
2103 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
2104 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
2106 /* Make sure that doorbell is committed immediately */
2111 * ufshcd_copy_sense_data - Copy sense data in case of check condition
2112 * @lrbp: pointer to local reference block
2114 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2117 if (lrbp->sense_buffer &&
2118 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
2121 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
2122 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
2124 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
2130 * ufshcd_copy_query_response() - Copy the Query Response and the data
2132 * @hba: per adapter instance
2133 * @lrbp: pointer to local reference block
2136 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2138 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2140 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
2142 /* Get the descriptor */
2143 if (hba->dev_cmd.query.descriptor &&
2144 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
2145 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
2146 GENERAL_UPIU_REQUEST_SIZE;
2150 /* data segment length */
2151 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
2152 MASK_QUERY_DATA_SEG_LEN;
2153 buf_len = be16_to_cpu(
2154 hba->dev_cmd.query.request.upiu_req.length);
2155 if (likely(buf_len >= resp_len)) {
2156 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2159 "%s: rsp size %d is bigger than buffer size %d",
2160 __func__, resp_len, buf_len);
2169 * ufshcd_hba_capabilities - Read controller capabilities
2170 * @hba: per adapter instance
2172 * Return: 0 on success, negative on error.
2174 static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
2178 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
2180 /* nutrs and nutmrs are 0 based values */
2181 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2183 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2185 /* Read crypto capabilities */
2186 err = ufshcd_hba_init_crypto_capabilities(hba);
2188 dev_err(hba->dev, "crypto setup failed\n");
2194 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2195 * to accept UIC commands
2196 * @hba: per adapter instance
2197 * Return true on success, else false
2199 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2201 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2208 * ufshcd_get_upmcrs - Get the power mode change request status
2209 * @hba: Pointer to adapter instance
2211 * This function gets the UPMCRS field of HCS register
2212 * Returns value of UPMCRS field
2214 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2216 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2220 * ufshcd_dispatch_uic_cmd - Dispatch an UIC command to the Unipro layer
2221 * @hba: per adapter instance
2222 * @uic_cmd: UIC command
2225 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2227 lockdep_assert_held(&hba->uic_cmd_mutex);
2229 WARN_ON(hba->active_uic_cmd);
2231 hba->active_uic_cmd = uic_cmd;
2234 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2235 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2236 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2238 ufshcd_add_uic_command_trace(hba, uic_cmd, UFS_CMD_SEND);
2241 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2246 * ufshcd_wait_for_uic_cmd - Wait for completion of an UIC command
2247 * @hba: per adapter instance
2248 * @uic_cmd: UIC command
2250 * Returns 0 only if success.
2253 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2256 unsigned long flags;
2258 lockdep_assert_held(&hba->uic_cmd_mutex);
2260 if (wait_for_completion_timeout(&uic_cmd->done,
2261 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
2262 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2266 "uic cmd 0x%x with arg3 0x%x completion timeout\n",
2267 uic_cmd->command, uic_cmd->argument3);
2269 if (!uic_cmd->cmd_active) {
2270 dev_err(hba->dev, "%s: UIC cmd has been completed, return the result\n",
2272 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2276 spin_lock_irqsave(hba->host->host_lock, flags);
2277 hba->active_uic_cmd = NULL;
2278 spin_unlock_irqrestore(hba->host->host_lock, flags);
2284 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2285 * @hba: per adapter instance
2286 * @uic_cmd: UIC command
2287 * @completion: initialize the completion only if this is set to true
2289 * Returns 0 only if success.
2292 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2295 lockdep_assert_held(&hba->uic_cmd_mutex);
2296 lockdep_assert_held(hba->host->host_lock);
2298 if (!ufshcd_ready_for_uic_cmd(hba)) {
2300 "Controller not ready to accept UIC commands\n");
2305 init_completion(&uic_cmd->done);
2307 uic_cmd->cmd_active = 1;
2308 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2314 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2315 * @hba: per adapter instance
2316 * @uic_cmd: UIC command
2318 * Returns 0 only if success.
2320 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2323 unsigned long flags;
2325 ufshcd_hold(hba, false);
2326 mutex_lock(&hba->uic_cmd_mutex);
2327 ufshcd_add_delay_before_dme_cmd(hba);
2329 spin_lock_irqsave(hba->host->host_lock, flags);
2330 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2331 spin_unlock_irqrestore(hba->host->host_lock, flags);
2333 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2335 mutex_unlock(&hba->uic_cmd_mutex);
2337 ufshcd_release(hba);
2342 * ufshcd_map_sg - Map scatter-gather list to prdt
2343 * @hba: per adapter instance
2344 * @lrbp: pointer to local reference block
2346 * Returns 0 in case of success, non-zero value in case of failure
2348 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2350 struct ufshcd_sg_entry *prd_table;
2351 struct scatterlist *sg;
2352 struct scsi_cmnd *cmd;
2357 sg_segments = scsi_dma_map(cmd);
2358 if (sg_segments < 0)
2363 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2364 lrbp->utr_descriptor_ptr->prd_table_length =
2365 cpu_to_le16((sg_segments *
2366 sizeof(struct ufshcd_sg_entry)));
2368 lrbp->utr_descriptor_ptr->prd_table_length =
2369 cpu_to_le16((u16) (sg_segments));
2371 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2373 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2375 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2376 prd_table[i].base_addr =
2377 cpu_to_le32(lower_32_bits(sg->dma_address));
2378 prd_table[i].upper_addr =
2379 cpu_to_le32(upper_32_bits(sg->dma_address));
2380 prd_table[i].reserved = 0;
2383 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2390 * ufshcd_enable_intr - enable interrupts
2391 * @hba: per adapter instance
2392 * @intrs: interrupt bits
2394 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2396 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2398 if (hba->ufs_version == ufshci_version(1, 0)) {
2400 rw = set & INTERRUPT_MASK_RW_VER_10;
2401 set = rw | ((set ^ intrs) & intrs);
2406 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2410 * ufshcd_disable_intr - disable interrupts
2411 * @hba: per adapter instance
2412 * @intrs: interrupt bits
2414 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2416 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2418 if (hba->ufs_version == ufshci_version(1, 0)) {
2420 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2421 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2422 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2428 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2432 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2433 * descriptor according to request
2434 * @lrbp: pointer to local reference block
2435 * @upiu_flags: flags required in the header
2436 * @cmd_dir: requests data direction
2438 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2439 u8 *upiu_flags, enum dma_data_direction cmd_dir)
2441 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2447 if (cmd_dir == DMA_FROM_DEVICE) {
2448 data_direction = UTP_DEVICE_TO_HOST;
2449 *upiu_flags = UPIU_CMD_FLAGS_READ;
2450 } else if (cmd_dir == DMA_TO_DEVICE) {
2451 data_direction = UTP_HOST_TO_DEVICE;
2452 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2454 data_direction = UTP_NO_DATA_TRANSFER;
2455 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2458 dword_0 = data_direction | (lrbp->command_type
2459 << UPIU_COMMAND_TYPE_OFFSET);
2461 dword_0 |= UTP_REQ_DESC_INT_CMD;
2463 /* Prepare crypto related dwords */
2464 ufshcd_prepare_req_desc_hdr_crypto(lrbp, &dword_0, &dword_1, &dword_3);
2466 /* Transfer request descriptor header fields */
2467 req_desc->header.dword_0 = cpu_to_le32(dword_0);
2468 req_desc->header.dword_1 = cpu_to_le32(dword_1);
2470 * assigning invalid value for command status. Controller
2471 * updates OCS on command completion, with the command
2474 req_desc->header.dword_2 =
2475 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2476 req_desc->header.dword_3 = cpu_to_le32(dword_3);
2478 req_desc->prd_table_length = 0;
2482 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2484 * @lrbp: local reference block pointer
2485 * @upiu_flags: flags
2488 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u8 upiu_flags)
2490 struct scsi_cmnd *cmd = lrbp->cmd;
2491 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2492 unsigned short cdb_len;
2494 /* command descriptor fields */
2495 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2496 UPIU_TRANSACTION_COMMAND, upiu_flags,
2497 lrbp->lun, lrbp->task_tag);
2498 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2499 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2501 /* Total EHS length and Data segment length will be zero */
2502 ucd_req_ptr->header.dword_2 = 0;
2504 ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
2506 cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
2507 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2508 memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
2510 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2514 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2517 * @lrbp: local reference block pointer
2518 * @upiu_flags: flags
2520 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2521 struct ufshcd_lrb *lrbp, u8 upiu_flags)
2523 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2524 struct ufs_query *query = &hba->dev_cmd.query;
2525 u16 len = be16_to_cpu(query->request.upiu_req.length);
2527 /* Query request header */
2528 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2529 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2530 lrbp->lun, lrbp->task_tag);
2531 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2532 0, query->request.query_func, 0, 0);
2534 /* Data segment length only need for WRITE_DESC */
2535 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2536 ucd_req_ptr->header.dword_2 =
2537 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2539 ucd_req_ptr->header.dword_2 = 0;
2541 /* Copy the Query Request buffer as is */
2542 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2545 /* Copy the Descriptor */
2546 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2547 memcpy(ucd_req_ptr + 1, query->descriptor, len);
2549 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2552 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2554 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2556 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2558 /* command descriptor fields */
2559 ucd_req_ptr->header.dword_0 =
2561 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2562 /* clear rest of the fields of basic header */
2563 ucd_req_ptr->header.dword_1 = 0;
2564 ucd_req_ptr->header.dword_2 = 0;
2566 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2570 * ufshcd_compose_devman_upiu - UFS Protocol Information Unit(UPIU)
2571 * for Device Management Purposes
2572 * @hba: per adapter instance
2573 * @lrbp: pointer to local reference block
2575 static int ufshcd_compose_devman_upiu(struct ufs_hba *hba,
2576 struct ufshcd_lrb *lrbp)
2581 if (hba->ufs_version <= ufshci_version(1, 1))
2582 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2584 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2586 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2587 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2588 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2589 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2590 ufshcd_prepare_utp_nop_upiu(lrbp);
2598 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2600 * @hba: per adapter instance
2601 * @lrbp: pointer to local reference block
2603 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2608 if (hba->ufs_version <= ufshci_version(1, 1))
2609 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2611 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2613 if (likely(lrbp->cmd)) {
2614 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2615 lrbp->cmd->sc_data_direction);
2616 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2625 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2626 * @upiu_wlun_id: UPIU W-LUN id
2628 * Returns SCSI W-LUN id
2630 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2632 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2635 static inline bool is_rpmb_wlun(struct scsi_device *sdev)
2637 return sdev->lun == ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN);
2640 static inline bool is_device_wlun(struct scsi_device *sdev)
2643 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN);
2646 static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
2648 struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
2649 struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
2650 dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
2651 i * sizeof(struct utp_transfer_cmd_desc);
2652 u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
2654 u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
2656 lrb->utr_descriptor_ptr = utrdlp + i;
2657 lrb->utrd_dma_addr = hba->utrdl_dma_addr +
2658 i * sizeof(struct utp_transfer_req_desc);
2659 lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
2660 lrb->ucd_req_dma_addr = cmd_desc_element_addr;
2661 lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2662 lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
2663 lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2664 lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
2668 * ufshcd_queuecommand - main entry point for SCSI requests
2669 * @host: SCSI host pointer
2670 * @cmd: command from SCSI Midlayer
2672 * Returns 0 for success, non-zero in case of failure
2674 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2676 struct ufs_hba *hba = shost_priv(host);
2677 int tag = scsi_cmd_to_rq(cmd)->tag;
2678 struct ufshcd_lrb *lrbp;
2681 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
2683 if (!down_read_trylock(&hba->clk_scaling_lock))
2684 return SCSI_MLQUEUE_HOST_BUSY;
2686 switch (hba->ufshcd_state) {
2687 case UFSHCD_STATE_OPERATIONAL:
2688 case UFSHCD_STATE_EH_SCHEDULED_NON_FATAL:
2690 case UFSHCD_STATE_EH_SCHEDULED_FATAL:
2692 * pm_runtime_get_sync() is used at error handling preparation
2693 * stage. If a scsi cmd, e.g. the SSU cmd, is sent from hba's
2694 * PM ops, it can never be finished if we let SCSI layer keep
2695 * retrying it, which gets err handler stuck forever. Neither
2696 * can we let the scsi cmd pass through, because UFS is in bad
2697 * state, the scsi cmd may eventually time out, which will get
2698 * err handler blocked for too long. So, just fail the scsi cmd
2699 * sent from PM ops, err handler can recover PM error anyways.
2701 if (hba->pm_op_in_progress) {
2702 hba->force_reset = true;
2703 set_host_byte(cmd, DID_BAD_TARGET);
2704 cmd->scsi_done(cmd);
2708 case UFSHCD_STATE_RESET:
2709 err = SCSI_MLQUEUE_HOST_BUSY;
2711 case UFSHCD_STATE_ERROR:
2712 set_host_byte(cmd, DID_ERROR);
2713 cmd->scsi_done(cmd);
2717 hba->req_abort_count = 0;
2719 err = ufshcd_hold(hba, true);
2721 err = SCSI_MLQUEUE_HOST_BUSY;
2724 WARN_ON(ufshcd_is_clkgating_allowed(hba) &&
2725 (hba->clk_gating.state != CLKS_ON));
2727 lrbp = &hba->lrb[tag];
2730 lrbp->sense_bufflen = UFS_SENSE_SIZE;
2731 lrbp->sense_buffer = cmd->sense_buffer;
2732 lrbp->task_tag = tag;
2733 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2734 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2736 ufshcd_prepare_lrbp_crypto(scsi_cmd_to_rq(cmd), lrbp);
2738 lrbp->req_abort_skip = false;
2740 ufshpb_prep(hba, lrbp);
2742 ufshcd_comp_scsi_upiu(hba, lrbp);
2744 err = ufshcd_map_sg(hba, lrbp);
2747 ufshcd_release(hba);
2751 ufshcd_send_command(hba, tag);
2753 up_read(&hba->clk_scaling_lock);
2755 if (ufs_trigger_eh()) {
2756 unsigned long flags;
2758 spin_lock_irqsave(hba->host->host_lock, flags);
2759 ufshcd_schedule_eh_work(hba);
2760 spin_unlock_irqrestore(hba->host->host_lock, flags);
2766 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2767 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2770 lrbp->sense_bufflen = 0;
2771 lrbp->sense_buffer = NULL;
2772 lrbp->task_tag = tag;
2773 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2774 lrbp->intr_cmd = true; /* No interrupt aggregation */
2775 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
2776 hba->dev_cmd.type = cmd_type;
2778 return ufshcd_compose_devman_upiu(hba, lrbp);
2782 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2785 unsigned long flags;
2786 u32 mask = 1 << tag;
2788 /* clear outstanding transaction before retry */
2789 spin_lock_irqsave(hba->host->host_lock, flags);
2790 ufshcd_utrl_clear(hba, tag);
2791 spin_unlock_irqrestore(hba->host->host_lock, flags);
2794 * wait for h/w to clear corresponding bit in door-bell.
2795 * max. wait is 1 sec.
2797 err = ufshcd_wait_for_register(hba,
2798 REG_UTP_TRANSFER_REQ_DOOR_BELL,
2799 mask, ~mask, 1000, 1000);
2805 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2807 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2809 /* Get the UPIU response */
2810 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2811 UPIU_RSP_CODE_OFFSET;
2812 return query_res->response;
2816 * ufshcd_dev_cmd_completion() - handles device management command responses
2817 * @hba: per adapter instance
2818 * @lrbp: pointer to local reference block
2821 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2826 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2827 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2830 case UPIU_TRANSACTION_NOP_IN:
2831 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2833 dev_err(hba->dev, "%s: unexpected response %x\n",
2837 case UPIU_TRANSACTION_QUERY_RSP:
2838 err = ufshcd_check_query_response(hba, lrbp);
2840 err = ufshcd_copy_query_response(hba, lrbp);
2842 case UPIU_TRANSACTION_REJECT_UPIU:
2843 /* TODO: handle Reject UPIU Response */
2845 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2850 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2858 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2859 struct ufshcd_lrb *lrbp, int max_timeout)
2862 unsigned long time_left;
2863 unsigned long flags;
2865 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2866 msecs_to_jiffies(max_timeout));
2868 spin_lock_irqsave(hba->host->host_lock, flags);
2869 hba->dev_cmd.complete = NULL;
2870 if (likely(time_left)) {
2871 err = ufshcd_get_tr_ocs(lrbp);
2873 err = ufshcd_dev_cmd_completion(hba, lrbp);
2875 spin_unlock_irqrestore(hba->host->host_lock, flags);
2879 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2880 __func__, lrbp->task_tag);
2881 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2882 /* successfully cleared the command, retry if needed */
2885 * in case of an error, after clearing the doorbell,
2886 * we also need to clear the outstanding_request
2889 spin_lock_irqsave(&hba->outstanding_lock, flags);
2890 __clear_bit(lrbp->task_tag, &hba->outstanding_reqs);
2891 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
2898 * ufshcd_exec_dev_cmd - API for sending device management requests
2900 * @cmd_type: specifies the type (NOP, Query...)
2901 * @timeout: timeout in milliseconds
2903 * NOTE: Since there is only one available tag for device management commands,
2904 * it is expected you hold the hba->dev_cmd.lock mutex.
2906 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2907 enum dev_cmd_type cmd_type, int timeout)
2909 struct request_queue *q = hba->cmd_queue;
2910 DECLARE_COMPLETION_ONSTACK(wait);
2911 struct request *req;
2912 struct ufshcd_lrb *lrbp;
2916 down_read(&hba->clk_scaling_lock);
2919 * Get free slot, sleep if slots are unavailable.
2920 * Even though we use wait_event() which sleeps indefinitely,
2921 * the maximum wait time is bounded by SCSI request timeout.
2923 req = blk_mq_alloc_request(q, REQ_OP_DRV_OUT, 0);
2929 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
2930 /* Set the timeout such that the SCSI error handler is not activated. */
2931 req->timeout = msecs_to_jiffies(2 * timeout);
2932 blk_mq_start_request(req);
2934 lrbp = &hba->lrb[tag];
2936 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2940 hba->dev_cmd.complete = &wait;
2942 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
2944 ufshcd_send_command(hba, tag);
2945 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2946 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
2947 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
2950 blk_mq_free_request(req);
2952 up_read(&hba->clk_scaling_lock);
2957 * ufshcd_init_query() - init the query response and request parameters
2958 * @hba: per-adapter instance
2959 * @request: address of the request pointer to be initialized
2960 * @response: address of the response pointer to be initialized
2961 * @opcode: operation to perform
2962 * @idn: flag idn to access
2963 * @index: LU number to access
2964 * @selector: query/flag/descriptor further identification
2966 static inline void ufshcd_init_query(struct ufs_hba *hba,
2967 struct ufs_query_req **request, struct ufs_query_res **response,
2968 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2970 *request = &hba->dev_cmd.query.request;
2971 *response = &hba->dev_cmd.query.response;
2972 memset(*request, 0, sizeof(struct ufs_query_req));
2973 memset(*response, 0, sizeof(struct ufs_query_res));
2974 (*request)->upiu_req.opcode = opcode;
2975 (*request)->upiu_req.idn = idn;
2976 (*request)->upiu_req.index = index;
2977 (*request)->upiu_req.selector = selector;
2980 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2981 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
2986 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2987 ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
2990 "%s: failed with error %d, retries %d\n",
2991 __func__, ret, retries);
2998 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2999 __func__, opcode, idn, ret, retries);
3004 * ufshcd_query_flag() - API function for sending flag query requests
3005 * @hba: per-adapter instance
3006 * @opcode: flag query to perform
3007 * @idn: flag idn to access
3008 * @index: flag index to access
3009 * @flag_res: the flag value after the query request completes
3011 * Returns 0 for success, non-zero in case of failure
3013 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
3014 enum flag_idn idn, u8 index, bool *flag_res)
3016 struct ufs_query_req *request = NULL;
3017 struct ufs_query_res *response = NULL;
3018 int err, selector = 0;
3019 int timeout = QUERY_REQ_TIMEOUT;
3023 ufshcd_hold(hba, false);
3024 mutex_lock(&hba->dev_cmd.lock);
3025 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3029 case UPIU_QUERY_OPCODE_SET_FLAG:
3030 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
3031 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
3032 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3034 case UPIU_QUERY_OPCODE_READ_FLAG:
3035 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3037 /* No dummy reads */
3038 dev_err(hba->dev, "%s: Invalid argument for read request\n",
3046 "%s: Expected query flag opcode but got = %d\n",
3052 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
3056 "%s: Sending flag query for idn %d failed, err = %d\n",
3057 __func__, idn, err);
3062 *flag_res = (be32_to_cpu(response->upiu_res.value) &
3063 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3066 mutex_unlock(&hba->dev_cmd.lock);
3067 ufshcd_release(hba);
3072 * ufshcd_query_attr - API function for sending attribute requests
3073 * @hba: per-adapter instance
3074 * @opcode: attribute opcode
3075 * @idn: attribute idn to access
3076 * @index: index field
3077 * @selector: selector field
3078 * @attr_val: the attribute value after the query request completes
3080 * Returns 0 for success, non-zero in case of failure
3082 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
3083 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
3085 struct ufs_query_req *request = NULL;
3086 struct ufs_query_res *response = NULL;
3092 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3097 ufshcd_hold(hba, false);
3099 mutex_lock(&hba->dev_cmd.lock);
3100 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3104 case UPIU_QUERY_OPCODE_WRITE_ATTR:
3105 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3106 request->upiu_req.value = cpu_to_be32(*attr_val);
3108 case UPIU_QUERY_OPCODE_READ_ATTR:
3109 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3112 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3118 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3121 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3122 __func__, opcode, idn, index, err);
3126 *attr_val = be32_to_cpu(response->upiu_res.value);
3129 mutex_unlock(&hba->dev_cmd.lock);
3130 ufshcd_release(hba);
3135 * ufshcd_query_attr_retry() - API function for sending query
3136 * attribute with retries
3137 * @hba: per-adapter instance
3138 * @opcode: attribute opcode
3139 * @idn: attribute idn to access
3140 * @index: index field
3141 * @selector: selector field
3142 * @attr_val: the attribute value after the query request
3145 * Returns 0 for success, non-zero in case of failure
3147 int ufshcd_query_attr_retry(struct ufs_hba *hba,
3148 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3154 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3155 ret = ufshcd_query_attr(hba, opcode, idn, index,
3156 selector, attr_val);
3158 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3159 __func__, ret, retries);
3166 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
3167 __func__, idn, ret, QUERY_REQ_RETRIES);
3171 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
3172 enum query_opcode opcode, enum desc_idn idn, u8 index,
3173 u8 selector, u8 *desc_buf, int *buf_len)
3175 struct ufs_query_req *request = NULL;
3176 struct ufs_query_res *response = NULL;
3182 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3187 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
3188 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3189 __func__, *buf_len);
3193 ufshcd_hold(hba, false);
3195 mutex_lock(&hba->dev_cmd.lock);
3196 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3198 hba->dev_cmd.query.descriptor = desc_buf;
3199 request->upiu_req.length = cpu_to_be16(*buf_len);
3202 case UPIU_QUERY_OPCODE_WRITE_DESC:
3203 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3205 case UPIU_QUERY_OPCODE_READ_DESC:
3206 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3210 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3216 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3219 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3220 __func__, opcode, idn, index, err);
3224 *buf_len = be16_to_cpu(response->upiu_res.length);
3227 hba->dev_cmd.query.descriptor = NULL;
3228 mutex_unlock(&hba->dev_cmd.lock);
3229 ufshcd_release(hba);
3234 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3235 * @hba: per-adapter instance
3236 * @opcode: attribute opcode
3237 * @idn: attribute idn to access
3238 * @index: index field
3239 * @selector: selector field
3240 * @desc_buf: the buffer that contains the descriptor
3241 * @buf_len: length parameter passed to the device
3243 * Returns 0 for success, non-zero in case of failure.
3244 * The buf_len parameter will contain, on return, the length parameter
3245 * received on the response.
3247 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3248 enum query_opcode opcode,
3249 enum desc_idn idn, u8 index,
3251 u8 *desc_buf, int *buf_len)
3256 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3257 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3258 selector, desc_buf, buf_len);
3259 if (!err || err == -EINVAL)
3267 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3268 * @hba: Pointer to adapter instance
3269 * @desc_id: descriptor idn value
3270 * @desc_len: mapped desc length (out)
3272 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
3275 if (desc_id >= QUERY_DESC_IDN_MAX || desc_id == QUERY_DESC_IDN_RFU_0 ||
3276 desc_id == QUERY_DESC_IDN_RFU_1)
3279 *desc_len = hba->desc_size[desc_id];
3281 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3283 static void ufshcd_update_desc_length(struct ufs_hba *hba,
3284 enum desc_idn desc_id, int desc_index,
3285 unsigned char desc_len)
3287 if (hba->desc_size[desc_id] == QUERY_DESC_MAX_SIZE &&
3288 desc_id != QUERY_DESC_IDN_STRING && desc_index != UFS_RPMB_UNIT)
3289 /* For UFS 3.1, the normal unit descriptor is 10 bytes larger
3290 * than the RPMB unit, however, both descriptors share the same
3291 * desc_idn, to cover both unit descriptors with one length, we
3292 * choose the normal unit descriptor length by desc_index.
3294 hba->desc_size[desc_id] = desc_len;
3298 * ufshcd_read_desc_param - read the specified descriptor parameter
3299 * @hba: Pointer to adapter instance
3300 * @desc_id: descriptor idn value
3301 * @desc_index: descriptor index
3302 * @param_offset: offset of the parameter to read
3303 * @param_read_buf: pointer to buffer where parameter would be read
3304 * @param_size: sizeof(param_read_buf)
3306 * Return 0 in case of success, non-zero otherwise
3308 int ufshcd_read_desc_param(struct ufs_hba *hba,
3309 enum desc_idn desc_id,
3318 bool is_kmalloc = true;
3321 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3324 /* Get the length of descriptor */
3325 ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3327 dev_err(hba->dev, "%s: Failed to get desc length\n", __func__);
3331 if (param_offset >= buff_len) {
3332 dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n",
3333 __func__, param_offset, desc_id, buff_len);
3337 /* Check whether we need temp memory */
3338 if (param_offset != 0 || param_size < buff_len) {
3339 desc_buf = kzalloc(buff_len, GFP_KERNEL);
3343 desc_buf = param_read_buf;
3347 /* Request for full descriptor */
3348 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3349 desc_id, desc_index, 0,
3350 desc_buf, &buff_len);
3353 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
3354 __func__, desc_id, desc_index, param_offset, ret);
3359 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3360 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
3361 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3366 /* Update descriptor length */
3367 buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];
3368 ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);
3371 /* Make sure we don't copy more data than available */
3372 if (param_offset >= buff_len)
3375 memcpy(param_read_buf, &desc_buf[param_offset],
3376 min_t(u32, param_size, buff_len - param_offset));
3385 * struct uc_string_id - unicode string
3387 * @len: size of this descriptor inclusive
3388 * @type: descriptor type
3389 * @uc: unicode string character
3391 struct uc_string_id {
3397 /* replace non-printable or non-ASCII characters with spaces */
3398 static inline char ufshcd_remove_non_printable(u8 ch)
3400 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3404 * ufshcd_read_string_desc - read string descriptor
3405 * @hba: pointer to adapter instance
3406 * @desc_index: descriptor index
3407 * @buf: pointer to buffer where descriptor would be read,
3408 * the caller should free the memory.
3409 * @ascii: if true convert from unicode to ascii characters
3410 * null terminated string.
3413 * * string size on success.
3414 * * -ENOMEM: on allocation failure
3415 * * -EINVAL: on a wrong parameter
3417 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3418 u8 **buf, bool ascii)
3420 struct uc_string_id *uc_str;
3427 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3431 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_STRING, desc_index, 0,
3432 (u8 *)uc_str, QUERY_DESC_MAX_SIZE);
3434 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3435 QUERY_REQ_RETRIES, ret);
3440 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3441 dev_dbg(hba->dev, "String Desc is of zero length\n");
3450 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3451 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3452 str = kzalloc(ascii_len, GFP_KERNEL);
3459 * the descriptor contains string in UTF16 format
3460 * we need to convert to utf-8 so it can be displayed
3462 ret = utf16s_to_utf8s(uc_str->uc,
3463 uc_str->len - QUERY_DESC_HDR_SIZE,
3464 UTF16_BIG_ENDIAN, str, ascii_len);
3466 /* replace non-printable or non-ASCII characters with spaces */
3467 for (i = 0; i < ret; i++)
3468 str[i] = ufshcd_remove_non_printable(str[i]);
3473 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
3487 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3488 * @hba: Pointer to adapter instance
3490 * @param_offset: offset of the parameter to read
3491 * @param_read_buf: pointer to buffer where parameter would be read
3492 * @param_size: sizeof(param_read_buf)
3494 * Return 0 in case of success, non-zero otherwise
3496 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3498 enum unit_desc_param param_offset,
3503 * Unit descriptors are only available for general purpose LUs (LUN id
3504 * from 0 to 7) and RPMB Well known LU.
3506 if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun, param_offset))
3509 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3510 param_offset, param_read_buf, param_size);
3513 static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
3516 u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3518 if (hba->dev_info.wspecversion >= 0x300) {
3519 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3520 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
3523 dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
3526 if (gating_wait == 0) {
3527 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3528 dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
3532 hba->dev_info.clk_gating_wait_us = gating_wait;
3539 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3540 * @hba: per adapter instance
3542 * 1. Allocate DMA memory for Command Descriptor array
3543 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3544 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3545 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3547 * 4. Allocate memory for local reference block(lrb).
3549 * Returns 0 for success, non-zero in case of failure
3551 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3553 size_t utmrdl_size, utrdl_size, ucdl_size;
3555 /* Allocate memory for UTP command descriptors */
3556 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3557 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3559 &hba->ucdl_dma_addr,
3563 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3564 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3565 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3566 * be aligned to 128 bytes as well
3568 if (!hba->ucdl_base_addr ||
3569 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3571 "Command Descriptor Memory allocation failed\n");
3576 * Allocate memory for UTP Transfer descriptors
3577 * UFSHCI requires 1024 byte alignment of UTRD
3579 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3580 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3582 &hba->utrdl_dma_addr,
3584 if (!hba->utrdl_base_addr ||
3585 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3587 "Transfer Descriptor Memory allocation failed\n");
3592 * Allocate memory for UTP Task Management descriptors
3593 * UFSHCI requires 1024 byte alignment of UTMRD
3595 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3596 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3598 &hba->utmrdl_dma_addr,
3600 if (!hba->utmrdl_base_addr ||
3601 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3603 "Task Management Descriptor Memory allocation failed\n");
3607 /* Allocate memory for local reference block */
3608 hba->lrb = devm_kcalloc(hba->dev,
3609 hba->nutrs, sizeof(struct ufshcd_lrb),
3612 dev_err(hba->dev, "LRB Memory allocation failed\n");
3621 * ufshcd_host_memory_configure - configure local reference block with
3623 * @hba: per adapter instance
3625 * Configure Host memory space
3626 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3628 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3630 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3631 * into local reference block.
3633 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3635 struct utp_transfer_req_desc *utrdlp;
3636 dma_addr_t cmd_desc_dma_addr;
3637 dma_addr_t cmd_desc_element_addr;
3638 u16 response_offset;
3643 utrdlp = hba->utrdl_base_addr;
3646 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3648 offsetof(struct utp_transfer_cmd_desc, prd_table);
3650 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3651 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3653 for (i = 0; i < hba->nutrs; i++) {
3654 /* Configure UTRD with command descriptor base address */
3655 cmd_desc_element_addr =
3656 (cmd_desc_dma_addr + (cmd_desc_size * i));
3657 utrdlp[i].command_desc_base_addr_lo =
3658 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3659 utrdlp[i].command_desc_base_addr_hi =
3660 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3662 /* Response upiu and prdt offset should be in double words */
3663 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3664 utrdlp[i].response_upiu_offset =
3665 cpu_to_le16(response_offset);
3666 utrdlp[i].prd_table_offset =
3667 cpu_to_le16(prdt_offset);
3668 utrdlp[i].response_upiu_length =
3669 cpu_to_le16(ALIGNED_UPIU_SIZE);
3671 utrdlp[i].response_upiu_offset =
3672 cpu_to_le16(response_offset >> 2);
3673 utrdlp[i].prd_table_offset =
3674 cpu_to_le16(prdt_offset >> 2);
3675 utrdlp[i].response_upiu_length =
3676 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3679 ufshcd_init_lrb(hba, &hba->lrb[i], i);
3684 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3685 * @hba: per adapter instance
3687 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3688 * in order to initialize the Unipro link startup procedure.
3689 * Once the Unipro links are up, the device connected to the controller
3692 * Returns 0 on success, non-zero value on failure
3694 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3696 struct uic_command uic_cmd = {0};
3699 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3701 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3704 "dme-link-startup: error code %d\n", ret);
3708 * ufshcd_dme_reset - UIC command for DME_RESET
3709 * @hba: per adapter instance
3711 * DME_RESET command is issued in order to reset UniPro stack.
3712 * This function now deals with cold reset.
3714 * Returns 0 on success, non-zero value on failure
3716 static int ufshcd_dme_reset(struct ufs_hba *hba)
3718 struct uic_command uic_cmd = {0};
3721 uic_cmd.command = UIC_CMD_DME_RESET;
3723 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3726 "dme-reset: error code %d\n", ret);
3731 int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
3737 if (agreed_gear != UFS_HS_G4)
3738 adapt_val = PA_NO_ADAPT;
3740 ret = ufshcd_dme_set(hba,
3741 UIC_ARG_MIB(PA_TXHSADAPTTYPE),
3745 EXPORT_SYMBOL_GPL(ufshcd_dme_configure_adapt);
3748 * ufshcd_dme_enable - UIC command for DME_ENABLE
3749 * @hba: per adapter instance
3751 * DME_ENABLE command is issued in order to enable UniPro stack.
3753 * Returns 0 on success, non-zero value on failure
3755 static int ufshcd_dme_enable(struct ufs_hba *hba)
3757 struct uic_command uic_cmd = {0};
3760 uic_cmd.command = UIC_CMD_DME_ENABLE;
3762 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3765 "dme-enable: error code %d\n", ret);
3770 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3772 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3773 unsigned long min_sleep_time_us;
3775 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3779 * last_dme_cmd_tstamp will be 0 only for 1st call to
3782 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3783 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3785 unsigned long delta =
3786 (unsigned long) ktime_to_us(
3787 ktime_sub(ktime_get(),
3788 hba->last_dme_cmd_tstamp));
3790 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3792 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3794 return; /* no more delay required */
3797 /* allow sleep for extra 50us if needed */
3798 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3802 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3803 * @hba: per adapter instance
3804 * @attr_sel: uic command argument1
3805 * @attr_set: attribute set type as uic command argument2
3806 * @mib_val: setting value as uic command argument3
3807 * @peer: indicate whether peer or local
3809 * Returns 0 on success, non-zero value on failure
3811 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3812 u8 attr_set, u32 mib_val, u8 peer)
3814 struct uic_command uic_cmd = {0};
3815 static const char *const action[] = {
3819 const char *set = action[!!peer];
3821 int retries = UFS_UIC_COMMAND_RETRIES;
3823 uic_cmd.command = peer ?
3824 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3825 uic_cmd.argument1 = attr_sel;
3826 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3827 uic_cmd.argument3 = mib_val;
3830 /* for peer attributes we retry upon failure */
3831 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3833 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3834 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3835 } while (ret && peer && --retries);
3838 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3839 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3840 UFS_UIC_COMMAND_RETRIES - retries);
3844 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3847 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3848 * @hba: per adapter instance
3849 * @attr_sel: uic command argument1
3850 * @mib_val: the value of the attribute as returned by the UIC command
3851 * @peer: indicate whether peer or local
3853 * Returns 0 on success, non-zero value on failure
3855 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3856 u32 *mib_val, u8 peer)
3858 struct uic_command uic_cmd = {0};
3859 static const char *const action[] = {
3863 const char *get = action[!!peer];
3865 int retries = UFS_UIC_COMMAND_RETRIES;
3866 struct ufs_pa_layer_attr orig_pwr_info;
3867 struct ufs_pa_layer_attr temp_pwr_info;
3868 bool pwr_mode_change = false;
3870 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3871 orig_pwr_info = hba->pwr_info;
3872 temp_pwr_info = orig_pwr_info;
3874 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3875 orig_pwr_info.pwr_rx == FAST_MODE) {
3876 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3877 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3878 pwr_mode_change = true;
3879 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3880 orig_pwr_info.pwr_rx == SLOW_MODE) {
3881 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3882 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3883 pwr_mode_change = true;
3885 if (pwr_mode_change) {
3886 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3892 uic_cmd.command = peer ?
3893 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3894 uic_cmd.argument1 = attr_sel;
3897 /* for peer attributes we retry upon failure */
3898 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3900 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3901 get, UIC_GET_ATTR_ID(attr_sel), ret);
3902 } while (ret && peer && --retries);
3905 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3906 get, UIC_GET_ATTR_ID(attr_sel),
3907 UFS_UIC_COMMAND_RETRIES - retries);
3909 if (mib_val && !ret)
3910 *mib_val = uic_cmd.argument3;
3912 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3914 ufshcd_change_power_mode(hba, &orig_pwr_info);
3918 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3921 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3922 * state) and waits for it to take effect.
3924 * @hba: per adapter instance
3925 * @cmd: UIC command to execute
3927 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3928 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3929 * and device UniPro link and hence it's final completion would be indicated by
3930 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3931 * addition to normal UIC command completion Status (UCCS). This function only
3932 * returns after the relevant status bits indicate the completion.
3934 * Returns 0 on success, non-zero value on failure
3936 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3938 DECLARE_COMPLETION_ONSTACK(uic_async_done);
3939 unsigned long flags;
3942 bool reenable_intr = false;
3944 mutex_lock(&hba->uic_cmd_mutex);
3945 ufshcd_add_delay_before_dme_cmd(hba);
3947 spin_lock_irqsave(hba->host->host_lock, flags);
3948 if (ufshcd_is_link_broken(hba)) {
3952 hba->uic_async_done = &uic_async_done;
3953 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3954 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3956 * Make sure UIC command completion interrupt is disabled before
3957 * issuing UIC command.
3960 reenable_intr = true;
3962 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3963 spin_unlock_irqrestore(hba->host->host_lock, flags);
3966 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3967 cmd->command, cmd->argument3, ret);
3971 if (!wait_for_completion_timeout(hba->uic_async_done,
3972 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3974 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3975 cmd->command, cmd->argument3);
3977 if (!cmd->cmd_active) {
3978 dev_err(hba->dev, "%s: Power Mode Change operation has been completed, go check UPMCRS\n",
3988 status = ufshcd_get_upmcrs(hba);
3989 if (status != PWR_LOCAL) {
3991 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3992 cmd->command, status);
3993 ret = (status != PWR_OK) ? status : -1;
3997 ufshcd_print_host_state(hba);
3998 ufshcd_print_pwr_info(hba);
3999 ufshcd_print_evt_hist(hba);
4002 spin_lock_irqsave(hba->host->host_lock, flags);
4003 hba->active_uic_cmd = NULL;
4004 hba->uic_async_done = NULL;
4006 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
4008 ufshcd_set_link_broken(hba);
4009 ufshcd_schedule_eh_work(hba);
4012 spin_unlock_irqrestore(hba->host->host_lock, flags);
4013 mutex_unlock(&hba->uic_cmd_mutex);
4019 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
4020 * using DME_SET primitives.
4021 * @hba: per adapter instance
4022 * @mode: powr mode value
4024 * Returns 0 on success, non-zero value on failure
4026 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
4028 struct uic_command uic_cmd = {0};
4031 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
4032 ret = ufshcd_dme_set(hba,
4033 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
4035 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
4041 uic_cmd.command = UIC_CMD_DME_SET;
4042 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
4043 uic_cmd.argument3 = mode;
4044 ufshcd_hold(hba, false);
4045 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4046 ufshcd_release(hba);
4052 int ufshcd_link_recovery(struct ufs_hba *hba)
4055 unsigned long flags;
4057 spin_lock_irqsave(hba->host->host_lock, flags);
4058 hba->ufshcd_state = UFSHCD_STATE_RESET;
4059 ufshcd_set_eh_in_progress(hba);
4060 spin_unlock_irqrestore(hba->host->host_lock, flags);
4062 /* Reset the attached device */
4063 ufshcd_device_reset(hba);
4065 ret = ufshcd_host_reset_and_restore(hba);
4067 spin_lock_irqsave(hba->host->host_lock, flags);
4069 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4070 ufshcd_clear_eh_in_progress(hba);
4071 spin_unlock_irqrestore(hba->host->host_lock, flags);
4074 dev_err(hba->dev, "%s: link recovery failed, err %d",
4077 ufshcd_clear_ua_wluns(hba);
4081 EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
4083 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
4086 struct uic_command uic_cmd = {0};
4087 ktime_t start = ktime_get();
4089 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
4091 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
4092 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4093 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4094 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4097 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
4100 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
4106 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
4108 struct uic_command uic_cmd = {0};
4110 ktime_t start = ktime_get();
4112 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
4114 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4115 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4116 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4117 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4120 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
4123 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
4125 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4126 hba->ufs_stats.hibern8_exit_cnt++;
4131 EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
4133 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
4135 unsigned long flags;
4136 bool update = false;
4138 if (!ufshcd_is_auto_hibern8_supported(hba))
4141 spin_lock_irqsave(hba->host->host_lock, flags);
4142 if (hba->ahit != ahit) {
4146 spin_unlock_irqrestore(hba->host->host_lock, flags);
4149 !pm_runtime_suspended(&hba->sdev_ufs_device->sdev_gendev)) {
4150 ufshcd_rpm_get_sync(hba);
4151 ufshcd_hold(hba, false);
4152 ufshcd_auto_hibern8_enable(hba);
4153 ufshcd_release(hba);
4154 ufshcd_rpm_put_sync(hba);
4157 EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
4159 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
4161 unsigned long flags;
4163 if (!ufshcd_is_auto_hibern8_supported(hba))
4166 spin_lock_irqsave(hba->host->host_lock, flags);
4167 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
4168 spin_unlock_irqrestore(hba->host->host_lock, flags);
4172 * ufshcd_init_pwr_info - setting the POR (power on reset)
4173 * values in hba power info
4174 * @hba: per-adapter instance
4176 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4178 hba->pwr_info.gear_rx = UFS_PWM_G1;
4179 hba->pwr_info.gear_tx = UFS_PWM_G1;
4180 hba->pwr_info.lane_rx = 1;
4181 hba->pwr_info.lane_tx = 1;
4182 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4183 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4184 hba->pwr_info.hs_rate = 0;
4188 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4189 * @hba: per-adapter instance
4191 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
4193 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4195 if (hba->max_pwr_info.is_valid)
4198 pwr_info->pwr_tx = FAST_MODE;
4199 pwr_info->pwr_rx = FAST_MODE;
4200 pwr_info->hs_rate = PA_HS_MODE_B;
4202 /* Get the connected lane count */
4203 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4204 &pwr_info->lane_rx);
4205 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4206 &pwr_info->lane_tx);
4208 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4209 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4217 * First, get the maximum gears of HS speed.
4218 * If a zero value, it means there is no HSGEAR capability.
4219 * Then, get the maximum gears of PWM speed.
4221 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4222 if (!pwr_info->gear_rx) {
4223 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4224 &pwr_info->gear_rx);
4225 if (!pwr_info->gear_rx) {
4226 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4227 __func__, pwr_info->gear_rx);
4230 pwr_info->pwr_rx = SLOW_MODE;
4233 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4234 &pwr_info->gear_tx);
4235 if (!pwr_info->gear_tx) {
4236 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4237 &pwr_info->gear_tx);
4238 if (!pwr_info->gear_tx) {
4239 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4240 __func__, pwr_info->gear_tx);
4243 pwr_info->pwr_tx = SLOW_MODE;
4246 hba->max_pwr_info.is_valid = true;
4250 static int ufshcd_change_power_mode(struct ufs_hba *hba,
4251 struct ufs_pa_layer_attr *pwr_mode)
4255 /* if already configured to the requested pwr_mode */
4256 if (!hba->force_pmc &&
4257 pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4258 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4259 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4260 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4261 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4262 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4263 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4264 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4269 * Configure attributes for power mode change with below.
4270 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4271 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4274 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4275 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4277 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4278 pwr_mode->pwr_rx == FAST_MODE)
4279 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4281 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4283 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4284 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4286 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4287 pwr_mode->pwr_tx == FAST_MODE)
4288 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4290 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4292 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4293 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4294 pwr_mode->pwr_rx == FAST_MODE ||
4295 pwr_mode->pwr_tx == FAST_MODE)
4296 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4299 if (!(hba->quirks & UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING)) {
4300 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4301 DL_FC0ProtectionTimeOutVal_Default);
4302 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4303 DL_TC0ReplayTimeOutVal_Default);
4304 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4305 DL_AFC0ReqTimeOutVal_Default);
4306 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4307 DL_FC1ProtectionTimeOutVal_Default);
4308 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4309 DL_TC1ReplayTimeOutVal_Default);
4310 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4311 DL_AFC1ReqTimeOutVal_Default);
4313 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4314 DL_FC0ProtectionTimeOutVal_Default);
4315 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4316 DL_TC0ReplayTimeOutVal_Default);
4317 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4318 DL_AFC0ReqTimeOutVal_Default);
4321 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4322 | pwr_mode->pwr_tx);
4326 "%s: power mode change failed %d\n", __func__, ret);
4328 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4331 memcpy(&hba->pwr_info, pwr_mode,
4332 sizeof(struct ufs_pa_layer_attr));
4339 * ufshcd_config_pwr_mode - configure a new power mode
4340 * @hba: per-adapter instance
4341 * @desired_pwr_mode: desired power configuration
4343 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4344 struct ufs_pa_layer_attr *desired_pwr_mode)
4346 struct ufs_pa_layer_attr final_params = { 0 };
4349 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4350 desired_pwr_mode, &final_params);
4353 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4355 ret = ufshcd_change_power_mode(hba, &final_params);
4359 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4362 * ufshcd_complete_dev_init() - checks device readiness
4363 * @hba: per-adapter instance
4365 * Set fDeviceInit flag and poll until device toggles it.
4367 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4370 bool flag_res = true;
4373 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4374 QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
4377 "%s setting fDeviceInit flag failed with error %d\n",
4382 /* Poll fDeviceInit flag to be cleared */
4383 timeout = ktime_add_ms(ktime_get(), FDEVICEINIT_COMPL_TIMEOUT);
4385 err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4386 QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
4389 usleep_range(5000, 10000);
4390 } while (ktime_before(ktime_get(), timeout));
4394 "%s reading fDeviceInit flag failed with error %d\n",
4396 } else if (flag_res) {
4398 "%s fDeviceInit was not cleared by the device\n",
4407 * ufshcd_make_hba_operational - Make UFS controller operational
4408 * @hba: per adapter instance
4410 * To bring UFS host controller to operational state,
4411 * 1. Enable required interrupts
4412 * 2. Configure interrupt aggregation
4413 * 3. Program UTRL and UTMRL base address
4414 * 4. Configure run-stop-registers
4416 * Returns 0 on success, non-zero value on failure
4418 int ufshcd_make_hba_operational(struct ufs_hba *hba)
4423 /* Enable required interrupts */
4424 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4426 /* Configure interrupt aggregation */
4427 if (ufshcd_is_intr_aggr_allowed(hba))
4428 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4430 ufshcd_disable_intr_aggr(hba);
4432 /* Configure UTRL and UTMRL base address registers */
4433 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4434 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4435 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4436 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4437 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4438 REG_UTP_TASK_REQ_LIST_BASE_L);
4439 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4440 REG_UTP_TASK_REQ_LIST_BASE_H);
4443 * Make sure base address and interrupt setup are updated before
4444 * enabling the run/stop registers below.
4449 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4451 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4452 if (!(ufshcd_get_lists_status(reg))) {
4453 ufshcd_enable_run_stop_reg(hba);
4456 "Host controller not ready to process requests");
4462 EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
4465 * ufshcd_hba_stop - Send controller to reset state
4466 * @hba: per adapter instance
4468 void ufshcd_hba_stop(struct ufs_hba *hba)
4470 unsigned long flags;
4474 * Obtain the host lock to prevent that the controller is disabled
4475 * while the UFS interrupt handler is active on another CPU.
4477 spin_lock_irqsave(hba->host->host_lock, flags);
4478 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4479 spin_unlock_irqrestore(hba->host->host_lock, flags);
4481 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4482 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4485 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4487 EXPORT_SYMBOL_GPL(ufshcd_hba_stop);
4490 * ufshcd_hba_execute_hce - initialize the controller
4491 * @hba: per adapter instance
4493 * The controller resets itself and controller firmware initialization
4494 * sequence kicks off. When controller is ready it will set
4495 * the Host Controller Enable bit to 1.
4497 * Returns 0 on success, non-zero value on failure
4499 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4501 int retry_outer = 3;
4505 if (!ufshcd_is_hba_active(hba))
4506 /* change controller state to "reset state" */
4507 ufshcd_hba_stop(hba);
4509 /* UniPro link is disabled at this point */
4510 ufshcd_set_link_off(hba);
4512 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4514 /* start controller initialization sequence */
4515 ufshcd_hba_start(hba);
4518 * To initialize a UFS host controller HCE bit must be set to 1.
4519 * During initialization the HCE bit value changes from 1->0->1.
4520 * When the host controller completes initialization sequence
4521 * it sets the value of HCE bit to 1. The same HCE bit is read back
4522 * to check if the controller has completed initialization sequence.
4523 * So without this delay the value HCE = 1, set in the previous
4524 * instruction might be read back.
4525 * This delay can be changed based on the controller.
4527 ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
4529 /* wait for the host controller to complete initialization */
4531 while (ufshcd_is_hba_active(hba)) {
4536 "Controller enable failed\n");
4543 usleep_range(1000, 1100);
4546 /* enable UIC related interrupts */
4547 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4549 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4554 int ufshcd_hba_enable(struct ufs_hba *hba)
4558 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4559 ufshcd_set_link_off(hba);
4560 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4562 /* enable UIC related interrupts */
4563 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4564 ret = ufshcd_dme_reset(hba);
4566 ret = ufshcd_dme_enable(hba);
4568 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4571 "Host controller enable failed with non-hce\n");
4574 ret = ufshcd_hba_execute_hce(hba);
4579 EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4581 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4583 int tx_lanes = 0, i, err = 0;
4586 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4589 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4591 for (i = 0; i < tx_lanes; i++) {
4593 err = ufshcd_dme_set(hba,
4594 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4595 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4598 err = ufshcd_dme_peer_set(hba,
4599 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4600 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4603 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4604 __func__, peer, i, err);
4612 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4614 return ufshcd_disable_tx_lcc(hba, true);
4617 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val)
4619 struct ufs_event_hist *e;
4621 if (id >= UFS_EVT_CNT)
4624 e = &hba->ufs_stats.event[id];
4625 e->val[e->pos] = val;
4626 e->tstamp[e->pos] = ktime_get();
4628 e->pos = (e->pos + 1) % UFS_EVENT_HIST_LENGTH;
4630 ufshcd_vops_event_notify(hba, id, &val);
4632 EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist);
4635 * ufshcd_link_startup - Initialize unipro link startup
4636 * @hba: per adapter instance
4638 * Returns 0 for success, non-zero in case of failure
4640 static int ufshcd_link_startup(struct ufs_hba *hba)
4643 int retries = DME_LINKSTARTUP_RETRIES;
4644 bool link_startup_again = false;
4647 * If UFS device isn't active then we will have to issue link startup
4648 * 2 times to make sure the device state move to active.
4650 if (!ufshcd_is_ufs_dev_active(hba))
4651 link_startup_again = true;
4655 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4657 ret = ufshcd_dme_link_startup(hba);
4659 /* check if device is detected by inter-connect layer */
4660 if (!ret && !ufshcd_is_device_present(hba)) {
4661 ufshcd_update_evt_hist(hba,
4662 UFS_EVT_LINK_STARTUP_FAIL,
4664 dev_err(hba->dev, "%s: Device not present\n", __func__);
4670 * DME link lost indication is only received when link is up,
4671 * but we can't be sure if the link is up until link startup
4672 * succeeds. So reset the local Uni-Pro and try again.
4674 if (ret && ufshcd_hba_enable(hba)) {
4675 ufshcd_update_evt_hist(hba,
4676 UFS_EVT_LINK_STARTUP_FAIL,
4680 } while (ret && retries--);
4683 /* failed to get the link up... retire */
4684 ufshcd_update_evt_hist(hba,
4685 UFS_EVT_LINK_STARTUP_FAIL,
4690 if (link_startup_again) {
4691 link_startup_again = false;
4692 retries = DME_LINKSTARTUP_RETRIES;
4696 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4697 ufshcd_init_pwr_info(hba);
4698 ufshcd_print_pwr_info(hba);
4700 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4701 ret = ufshcd_disable_device_tx_lcc(hba);
4706 /* Include any host controller configuration via UIC commands */
4707 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4711 /* Clear UECPA once due to LINERESET has happened during LINK_STARTUP */
4712 ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
4713 ret = ufshcd_make_hba_operational(hba);
4716 dev_err(hba->dev, "link startup failed %d\n", ret);
4717 ufshcd_print_host_state(hba);
4718 ufshcd_print_pwr_info(hba);
4719 ufshcd_print_evt_hist(hba);
4725 * ufshcd_verify_dev_init() - Verify device initialization
4726 * @hba: per-adapter instance
4728 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4729 * device Transport Protocol (UTP) layer is ready after a reset.
4730 * If the UTP layer at the device side is not initialized, it may
4731 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4732 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4734 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4739 ufshcd_hold(hba, false);
4740 mutex_lock(&hba->dev_cmd.lock);
4741 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4742 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4743 hba->nop_out_timeout);
4745 if (!err || err == -ETIMEDOUT)
4748 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4750 mutex_unlock(&hba->dev_cmd.lock);
4751 ufshcd_release(hba);
4754 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4759 * ufshcd_set_queue_depth - set lun queue depth
4760 * @sdev: pointer to SCSI device
4762 * Read bLUQueueDepth value and activate scsi tagged command
4763 * queueing. For WLUN, queue depth is set to 1. For best-effort
4764 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4765 * value that host can queue.
4767 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4771 struct ufs_hba *hba;
4773 hba = shost_priv(sdev->host);
4775 lun_qdepth = hba->nutrs;
4776 ret = ufshcd_read_unit_desc_param(hba,
4777 ufshcd_scsi_to_upiu_lun(sdev->lun),
4778 UNIT_DESC_PARAM_LU_Q_DEPTH,
4780 sizeof(lun_qdepth));
4782 /* Some WLUN doesn't support unit descriptor */
4783 if (ret == -EOPNOTSUPP)
4785 else if (!lun_qdepth)
4786 /* eventually, we can figure out the real queue depth */
4787 lun_qdepth = hba->nutrs;
4789 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4791 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4792 __func__, lun_qdepth);
4793 scsi_change_queue_depth(sdev, lun_qdepth);
4797 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4798 * @hba: per-adapter instance
4799 * @lun: UFS device lun id
4800 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4802 * Returns 0 in case of success and b_lu_write_protect status would be returned
4803 * @b_lu_write_protect parameter.
4804 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4805 * Returns -EINVAL in case of invalid parameters passed to this function.
4807 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4809 u8 *b_lu_write_protect)
4813 if (!b_lu_write_protect)
4816 * According to UFS device spec, RPMB LU can't be write
4817 * protected so skip reading bLUWriteProtect parameter for
4818 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4820 else if (lun >= hba->dev_info.max_lu_supported)
4823 ret = ufshcd_read_unit_desc_param(hba,
4825 UNIT_DESC_PARAM_LU_WR_PROTECT,
4827 sizeof(*b_lu_write_protect));
4832 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4834 * @hba: per-adapter instance
4835 * @sdev: pointer to SCSI device
4838 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4839 struct scsi_device *sdev)
4841 if (hba->dev_info.f_power_on_wp_en &&
4842 !hba->dev_info.is_lu_power_on_wp) {
4843 u8 b_lu_write_protect;
4845 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4846 &b_lu_write_protect) &&
4847 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4848 hba->dev_info.is_lu_power_on_wp = true;
4853 * ufshcd_setup_links - associate link b/w device wlun and other luns
4854 * @sdev: pointer to SCSI device
4855 * @hba: pointer to ufs hba
4857 static void ufshcd_setup_links(struct ufs_hba *hba, struct scsi_device *sdev)
4859 struct device_link *link;
4862 * Device wlun is the supplier & rest of the luns are consumers.
4863 * This ensures that device wlun suspends after all other luns.
4865 if (hba->sdev_ufs_device) {
4866 link = device_link_add(&sdev->sdev_gendev,
4867 &hba->sdev_ufs_device->sdev_gendev,
4868 DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
4870 dev_err(&sdev->sdev_gendev, "Failed establishing link - %s\n",
4871 dev_name(&hba->sdev_ufs_device->sdev_gendev));
4875 /* Ignore REPORT_LUN wlun probing */
4876 if (hba->luns_avail == 1) {
4877 ufshcd_rpm_put(hba);
4882 * Device wlun is probed. The assumption is that WLUNs are
4883 * scanned before other LUNs.
4890 * ufshcd_slave_alloc - handle initial SCSI device configurations
4891 * @sdev: pointer to SCSI device
4895 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4897 struct ufs_hba *hba;
4899 hba = shost_priv(sdev->host);
4901 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4902 sdev->use_10_for_ms = 1;
4904 /* DBD field should be set to 1 in mode sense(10) */
4905 sdev->set_dbd_for_ms = 1;
4907 /* allow SCSI layer to restart the device in case of errors */
4908 sdev->allow_restart = 1;
4910 /* REPORT SUPPORTED OPERATION CODES is not supported */
4911 sdev->no_report_opcodes = 1;
4913 /* WRITE_SAME command is not supported */
4914 sdev->no_write_same = 1;
4916 ufshcd_set_queue_depth(sdev);
4918 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4920 ufshcd_setup_links(hba, sdev);
4926 * ufshcd_change_queue_depth - change queue depth
4927 * @sdev: pointer to SCSI device
4928 * @depth: required depth to set
4930 * Change queue depth and make sure the max. limits are not crossed.
4932 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4934 struct ufs_hba *hba = shost_priv(sdev->host);
4936 if (depth > hba->nutrs)
4938 return scsi_change_queue_depth(sdev, depth);
4941 static void ufshcd_hpb_destroy(struct ufs_hba *hba, struct scsi_device *sdev)
4943 /* skip well-known LU */
4944 if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
4945 !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
4948 ufshpb_destroy_lu(hba, sdev);
4951 static void ufshcd_hpb_configure(struct ufs_hba *hba, struct scsi_device *sdev)
4953 /* skip well-known LU */
4954 if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
4955 !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
4958 ufshpb_init_hpb_lu(hba, sdev);
4962 * ufshcd_slave_configure - adjust SCSI device configurations
4963 * @sdev: pointer to SCSI device
4965 static int ufshcd_slave_configure(struct scsi_device *sdev)
4967 struct ufs_hba *hba = shost_priv(sdev->host);
4968 struct request_queue *q = sdev->request_queue;
4970 ufshcd_hpb_configure(hba, sdev);
4972 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4973 if (hba->quirks & UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE)
4974 blk_queue_update_dma_alignment(q, PAGE_SIZE - 1);
4976 * Block runtime-pm until all consumers are added.
4977 * Refer ufshcd_setup_links().
4979 if (is_device_wlun(sdev))
4980 pm_runtime_get_noresume(&sdev->sdev_gendev);
4981 else if (ufshcd_is_rpm_autosuspend_allowed(hba))
4982 sdev->rpm_autosuspend = 1;
4984 ufshcd_crypto_register(hba, q);
4990 * ufshcd_slave_destroy - remove SCSI device configurations
4991 * @sdev: pointer to SCSI device
4993 static void ufshcd_slave_destroy(struct scsi_device *sdev)
4995 struct ufs_hba *hba;
4996 unsigned long flags;
4998 hba = shost_priv(sdev->host);
5000 ufshcd_hpb_destroy(hba, sdev);
5002 /* Drop the reference as it won't be needed anymore */
5003 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
5004 spin_lock_irqsave(hba->host->host_lock, flags);
5005 hba->sdev_ufs_device = NULL;
5006 spin_unlock_irqrestore(hba->host->host_lock, flags);
5007 } else if (hba->sdev_ufs_device) {
5008 struct device *supplier = NULL;
5010 /* Ensure UFS Device WLUN exists and does not disappear */
5011 spin_lock_irqsave(hba->host->host_lock, flags);
5012 if (hba->sdev_ufs_device) {
5013 supplier = &hba->sdev_ufs_device->sdev_gendev;
5014 get_device(supplier);
5016 spin_unlock_irqrestore(hba->host->host_lock, flags);
5020 * If a LUN fails to probe (e.g. absent BOOT WLUN), the
5021 * device will not have been registered but can still
5022 * have a device link holding a reference to the device.
5024 device_link_remove(&sdev->sdev_gendev, supplier);
5025 put_device(supplier);
5031 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
5032 * @lrbp: pointer to local reference block of completed command
5033 * @scsi_status: SCSI command status
5035 * Returns value base on SCSI command status
5038 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
5042 switch (scsi_status) {
5043 case SAM_STAT_CHECK_CONDITION:
5044 ufshcd_copy_sense_data(lrbp);
5047 result |= DID_OK << 16 | scsi_status;
5049 case SAM_STAT_TASK_SET_FULL:
5051 case SAM_STAT_TASK_ABORTED:
5052 ufshcd_copy_sense_data(lrbp);
5053 result |= scsi_status;
5056 result |= DID_ERROR << 16;
5058 } /* end of switch */
5064 * ufshcd_transfer_rsp_status - Get overall status of the response
5065 * @hba: per adapter instance
5066 * @lrbp: pointer to local reference block of completed command
5068 * Returns result of the command to notify SCSI midlayer
5071 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
5077 /* overall command status of utrd */
5078 ocs = ufshcd_get_tr_ocs(lrbp);
5080 if (hba->quirks & UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR) {
5081 if (be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_1) &
5082 MASK_RSP_UPIU_RESULT)
5088 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
5089 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
5091 case UPIU_TRANSACTION_RESPONSE:
5093 * get the response UPIU result to extract
5094 * the SCSI command status
5096 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
5099 * get the result based on SCSI status response
5100 * to notify the SCSI midlayer of the command status
5102 scsi_status = result & MASK_SCSI_STATUS;
5103 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
5106 * Currently we are only supporting BKOPs exception
5107 * events hence we can ignore BKOPs exception event
5108 * during power management callbacks. BKOPs exception
5109 * event is not expected to be raised in runtime suspend
5110 * callback as it allows the urgent bkops.
5111 * During system suspend, we are anyway forcefully
5112 * disabling the bkops and if urgent bkops is needed
5113 * it will be enabled on system resume. Long term
5114 * solution could be to abort the system suspend if
5115 * UFS device needs urgent BKOPs.
5117 if (!hba->pm_op_in_progress &&
5118 !ufshcd_eh_in_progress(hba) &&
5119 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
5120 /* Flushed in suspend */
5121 schedule_work(&hba->eeh_work);
5123 if (scsi_status == SAM_STAT_GOOD)
5124 ufshpb_rsp_upiu(hba, lrbp);
5126 case UPIU_TRANSACTION_REJECT_UPIU:
5127 /* TODO: handle Reject UPIU Response */
5128 result = DID_ERROR << 16;
5130 "Reject UPIU not fully implemented\n");
5134 "Unexpected request response code = %x\n",
5136 result = DID_ERROR << 16;
5141 result |= DID_ABORT << 16;
5143 case OCS_INVALID_COMMAND_STATUS:
5144 result |= DID_REQUEUE << 16;
5146 case OCS_INVALID_CMD_TABLE_ATTR:
5147 case OCS_INVALID_PRDT_ATTR:
5148 case OCS_MISMATCH_DATA_BUF_SIZE:
5149 case OCS_MISMATCH_RESP_UPIU_SIZE:
5150 case OCS_PEER_COMM_FAILURE:
5151 case OCS_FATAL_ERROR:
5152 case OCS_DEVICE_FATAL_ERROR:
5153 case OCS_INVALID_CRYPTO_CONFIG:
5154 case OCS_GENERAL_CRYPTO_ERROR:
5156 result |= DID_ERROR << 16;
5158 "OCS error from controller = %x for tag %d\n",
5159 ocs, lrbp->task_tag);
5160 ufshcd_print_evt_hist(hba);
5161 ufshcd_print_host_state(hba);
5163 } /* end of switch */
5165 if ((host_byte(result) != DID_OK) &&
5166 (host_byte(result) != DID_REQUEUE) && !hba->silence_err_logs)
5167 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
5171 static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5174 if (!ufshcd_is_auto_hibern8_supported(hba) ||
5175 !ufshcd_is_auto_hibern8_enabled(hba))
5178 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5181 if (hba->active_uic_cmd &&
5182 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5183 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5190 * ufshcd_uic_cmd_compl - handle completion of uic command
5191 * @hba: per adapter instance
5192 * @intr_status: interrupt status generated by the controller
5195 * IRQ_HANDLED - If interrupt is valid
5196 * IRQ_NONE - If invalid interrupt
5198 static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
5200 irqreturn_t retval = IRQ_NONE;
5202 spin_lock(hba->host->host_lock);
5203 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5204 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5206 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
5207 hba->active_uic_cmd->argument2 |=
5208 ufshcd_get_uic_cmd_result(hba);
5209 hba->active_uic_cmd->argument3 =
5210 ufshcd_get_dme_attr_val(hba);
5211 if (!hba->uic_async_done)
5212 hba->active_uic_cmd->cmd_active = 0;
5213 complete(&hba->active_uic_cmd->done);
5214 retval = IRQ_HANDLED;
5217 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
5218 hba->active_uic_cmd->cmd_active = 0;
5219 complete(hba->uic_async_done);
5220 retval = IRQ_HANDLED;
5223 if (retval == IRQ_HANDLED)
5224 ufshcd_add_uic_command_trace(hba, hba->active_uic_cmd,
5226 spin_unlock(hba->host->host_lock);
5231 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
5232 * @hba: per adapter instance
5233 * @completed_reqs: bitmask that indicates which requests to complete
5234 * @retry_requests: whether to ask the SCSI core to retry completed requests
5236 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
5237 unsigned long completed_reqs,
5238 bool retry_requests)
5240 struct ufshcd_lrb *lrbp;
5241 struct scsi_cmnd *cmd;
5244 bool update_scaling = false;
5246 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5247 lrbp = &hba->lrb[index];
5248 lrbp->compl_time_stamp = ktime_get();
5251 if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
5252 ufshcd_update_monitor(hba, lrbp);
5253 ufshcd_add_command_trace(hba, index, UFS_CMD_COMP);
5254 result = retry_requests ? DID_BUS_BUSY << 16 :
5255 ufshcd_transfer_rsp_status(hba, lrbp);
5256 scsi_dma_unmap(cmd);
5257 cmd->result = result;
5258 /* Mark completed command as NULL in LRB */
5260 /* Do not touch lrbp after scsi done */
5261 cmd->scsi_done(cmd);
5262 ufshcd_release(hba);
5263 update_scaling = true;
5264 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
5265 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
5266 if (hba->dev_cmd.complete) {
5267 ufshcd_add_command_trace(hba, index,
5269 complete(hba->dev_cmd.complete);
5270 update_scaling = true;
5274 ufshcd_clk_scaling_update_busy(hba);
5279 * ufshcd_transfer_req_compl - handle SCSI and query command completion
5280 * @hba: per adapter instance
5281 * @retry_requests: whether or not to ask to retry requests
5284 * IRQ_HANDLED - If interrupt is valid
5285 * IRQ_NONE - If invalid interrupt
5287 static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba,
5288 bool retry_requests)
5290 unsigned long completed_reqs, flags;
5293 /* Resetting interrupt aggregation counters first and reading the
5294 * DOOR_BELL afterward allows us to handle all the completed requests.
5295 * In order to prevent other interrupts starvation the DB is read once
5296 * after reset. The down side of this solution is the possibility of
5297 * false interrupt if device completes another request after resetting
5298 * aggregation and before reading the DB.
5300 if (ufshcd_is_intr_aggr_allowed(hba) &&
5301 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
5302 ufshcd_reset_intr_aggr(hba);
5304 if (ufs_fail_completion())
5307 spin_lock_irqsave(&hba->outstanding_lock, flags);
5308 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5309 completed_reqs = ~tr_doorbell & hba->outstanding_reqs;
5310 WARN_ONCE(completed_reqs & ~hba->outstanding_reqs,
5311 "completed: %#lx; outstanding: %#lx\n", completed_reqs,
5312 hba->outstanding_reqs);
5313 hba->outstanding_reqs &= ~completed_reqs;
5314 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
5316 if (completed_reqs) {
5317 __ufshcd_transfer_req_compl(hba, completed_reqs,
5325 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask)
5327 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
5328 QUERY_ATTR_IDN_EE_CONTROL, 0, 0,
5332 int ufshcd_write_ee_control(struct ufs_hba *hba)
5336 mutex_lock(&hba->ee_ctrl_mutex);
5337 err = __ufshcd_write_ee_control(hba, hba->ee_ctrl_mask);
5338 mutex_unlock(&hba->ee_ctrl_mutex);
5340 dev_err(hba->dev, "%s: failed to write ee control %d\n",
5345 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
5348 u16 new_mask, ee_ctrl_mask;
5351 mutex_lock(&hba->ee_ctrl_mutex);
5352 new_mask = (*mask & ~clr) | set;
5353 ee_ctrl_mask = new_mask | *other_mask;
5354 if (ee_ctrl_mask != hba->ee_ctrl_mask)
5355 err = __ufshcd_write_ee_control(hba, ee_ctrl_mask);
5356 /* Still need to update 'mask' even if 'ee_ctrl_mask' was unchanged */
5358 hba->ee_ctrl_mask = ee_ctrl_mask;
5361 mutex_unlock(&hba->ee_ctrl_mutex);
5366 * ufshcd_disable_ee - disable exception event
5367 * @hba: per-adapter instance
5368 * @mask: exception event to disable
5370 * Disables exception event in the device so that the EVENT_ALERT
5373 * Returns zero on success, non-zero error value on failure.
5375 static inline int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
5377 return ufshcd_update_ee_drv_mask(hba, 0, mask);
5381 * ufshcd_enable_ee - enable exception event
5382 * @hba: per-adapter instance
5383 * @mask: exception event to enable
5385 * Enable corresponding exception event in the device to allow
5386 * device to alert host in critical scenarios.
5388 * Returns zero on success, non-zero error value on failure.
5390 static inline int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
5392 return ufshcd_update_ee_drv_mask(hba, mask, 0);
5396 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5397 * @hba: per-adapter instance
5399 * Allow device to manage background operations on its own. Enabling
5400 * this might lead to inconsistent latencies during normal data transfers
5401 * as the device is allowed to manage its own way of handling background
5404 * Returns zero on success, non-zero on failure.
5406 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5410 if (hba->auto_bkops_enabled)
5413 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
5414 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5416 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5421 hba->auto_bkops_enabled = true;
5422 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
5424 /* No need of URGENT_BKOPS exception from the device */
5425 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5427 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5434 * ufshcd_disable_auto_bkops - block device in doing background operations
5435 * @hba: per-adapter instance
5437 * Disabling background operations improves command response latency but
5438 * has drawback of device moving into critical state where the device is
5439 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5440 * host is idle so that BKOPS are managed effectively without any negative
5443 * Returns zero on success, non-zero on failure.
5445 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5449 if (!hba->auto_bkops_enabled)
5453 * If host assisted BKOPs is to be enabled, make sure
5454 * urgent bkops exception is allowed.
5456 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5458 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5463 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5464 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5466 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5468 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5472 hba->auto_bkops_enabled = false;
5473 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
5474 hba->is_urgent_bkops_lvl_checked = false;
5480 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
5481 * @hba: per adapter instance
5483 * After a device reset the device may toggle the BKOPS_EN flag
5484 * to default value. The s/w tracking variables should be updated
5485 * as well. This function would change the auto-bkops state based on
5486 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
5488 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
5490 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5491 hba->auto_bkops_enabled = false;
5492 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5493 ufshcd_enable_auto_bkops(hba);
5495 hba->auto_bkops_enabled = true;
5496 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5497 ufshcd_disable_auto_bkops(hba);
5499 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
5500 hba->is_urgent_bkops_lvl_checked = false;
5503 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5505 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5506 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5510 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5511 * @hba: per-adapter instance
5512 * @status: bkops_status value
5514 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5515 * flag in the device to permit background operations if the device
5516 * bkops_status is greater than or equal to "status" argument passed to
5517 * this function, disable otherwise.
5519 * Returns 0 for success, non-zero in case of failure.
5521 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5522 * to know whether auto bkops is enabled or disabled after this function
5523 * returns control to it.
5525 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5526 enum bkops_status status)
5529 u32 curr_status = 0;
5531 err = ufshcd_get_bkops_status(hba, &curr_status);
5533 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5536 } else if (curr_status > BKOPS_STATUS_MAX) {
5537 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5538 __func__, curr_status);
5543 if (curr_status >= status)
5544 err = ufshcd_enable_auto_bkops(hba);
5546 err = ufshcd_disable_auto_bkops(hba);
5552 * ufshcd_urgent_bkops - handle urgent bkops exception event
5553 * @hba: per-adapter instance
5555 * Enable fBackgroundOpsEn flag in the device to permit background
5558 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5559 * and negative error value for any other failure.
5561 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5563 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5566 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5568 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5569 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5572 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5575 u32 curr_status = 0;
5577 if (hba->is_urgent_bkops_lvl_checked)
5578 goto enable_auto_bkops;
5580 err = ufshcd_get_bkops_status(hba, &curr_status);
5582 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5588 * We are seeing that some devices are raising the urgent bkops
5589 * exception events even when BKOPS status doesn't indicate performace
5590 * impacted or critical. Handle these device by determining their urgent
5591 * bkops status at runtime.
5593 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5594 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5595 __func__, curr_status);
5596 /* update the current status as the urgent bkops level */
5597 hba->urgent_bkops_lvl = curr_status;
5598 hba->is_urgent_bkops_lvl_checked = true;
5602 err = ufshcd_enable_auto_bkops(hba);
5605 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5609 static int __ufshcd_wb_toggle(struct ufs_hba *hba, bool set, enum flag_idn idn)
5612 enum query_opcode opcode = set ? UPIU_QUERY_OPCODE_SET_FLAG :
5613 UPIU_QUERY_OPCODE_CLEAR_FLAG;
5615 index = ufshcd_wb_get_query_index(hba);
5616 return ufshcd_query_flag_retry(hba, opcode, idn, index, NULL);
5619 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable)
5623 if (!ufshcd_is_wb_allowed(hba))
5626 if (!(enable ^ hba->dev_info.wb_enabled))
5629 ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_EN);
5631 dev_err(hba->dev, "%s Write Booster %s failed %d\n",
5632 __func__, enable ? "enable" : "disable", ret);
5636 hba->dev_info.wb_enabled = enable;
5637 dev_info(hba->dev, "%s Write Booster %s\n",
5638 __func__, enable ? "enabled" : "disabled");
5643 static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
5647 ret = __ufshcd_wb_toggle(hba, set,
5648 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8);
5650 dev_err(hba->dev, "%s: WB-Buf Flush during H8 %s failed: %d\n",
5651 __func__, set ? "enable" : "disable", ret);
5654 dev_dbg(hba->dev, "%s WB-Buf Flush during H8 %s\n",
5655 __func__, set ? "enabled" : "disabled");
5658 static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
5662 if (!ufshcd_is_wb_allowed(hba) ||
5663 hba->dev_info.wb_buf_flush_enabled == enable)
5666 ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN);
5668 dev_err(hba->dev, "%s WB-Buf Flush %s failed %d\n", __func__,
5669 enable ? "enable" : "disable", ret);
5673 hba->dev_info.wb_buf_flush_enabled = enable;
5675 dev_dbg(hba->dev, "%s WB-Buf Flush %s\n",
5676 __func__, enable ? "enabled" : "disabled");
5679 static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
5686 index = ufshcd_wb_get_query_index(hba);
5687 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5688 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
5689 index, 0, &cur_buf);
5691 dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
5697 dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
5701 /* Let it continue to flush when available buffer exceeds threshold */
5702 if (avail_buf < hba->vps->wb_flush_threshold)
5708 static bool ufshcd_wb_need_flush(struct ufs_hba *hba)
5714 if (!ufshcd_is_wb_allowed(hba))
5717 * The ufs device needs the vcc to be ON to flush.
5718 * With user-space reduction enabled, it's enough to enable flush
5719 * by checking only the available buffer. The threshold
5720 * defined here is > 90% full.
5721 * With user-space preserved enabled, the current-buffer
5722 * should be checked too because the wb buffer size can reduce
5723 * when disk tends to be full. This info is provided by current
5724 * buffer (dCurrentWriteBoosterBufferSize). There's no point in
5725 * keeping vcc on when current buffer is empty.
5727 index = ufshcd_wb_get_query_index(hba);
5728 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5729 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
5730 index, 0, &avail_buf);
5732 dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
5737 if (!hba->dev_info.b_presrv_uspc_en) {
5738 if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
5743 return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
5746 static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
5748 struct ufs_hba *hba = container_of(to_delayed_work(work),
5750 rpm_dev_flush_recheck_work);
5752 * To prevent unnecessary VCC power drain after device finishes
5753 * WriteBooster buffer flush or Auto BKOPs, force runtime resume
5754 * after a certain delay to recheck the threshold by next runtime
5757 ufshcd_rpm_get_sync(hba);
5758 ufshcd_rpm_put_sync(hba);
5762 * ufshcd_exception_event_handler - handle exceptions raised by device
5763 * @work: pointer to work data
5765 * Read bExceptionEventStatus attribute from the device and handle the
5766 * exception event accordingly.
5768 static void ufshcd_exception_event_handler(struct work_struct *work)
5770 struct ufs_hba *hba;
5773 hba = container_of(work, struct ufs_hba, eeh_work);
5775 ufshcd_scsi_block_requests(hba);
5776 err = ufshcd_get_ee_status(hba, &status);
5778 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5783 trace_ufshcd_exception_event(dev_name(hba->dev), status);
5785 if (status & hba->ee_drv_mask & MASK_EE_URGENT_BKOPS)
5786 ufshcd_bkops_exception_event_handler(hba);
5788 ufs_debugfs_exception_event(hba, status);
5790 ufshcd_scsi_unblock_requests(hba);
5794 /* Complete requests that have door-bell cleared */
5795 static void ufshcd_complete_requests(struct ufs_hba *hba)
5797 ufshcd_transfer_req_compl(hba, /*retry_requests=*/false);
5798 ufshcd_tmc_handler(hba);
5801 static void ufshcd_retry_aborted_requests(struct ufs_hba *hba)
5803 ufshcd_transfer_req_compl(hba, /*retry_requests=*/true);
5804 ufshcd_tmc_handler(hba);
5808 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5809 * to recover from the DL NAC errors or not.
5810 * @hba: per-adapter instance
5812 * Returns true if error handling is required, false otherwise
5814 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5816 unsigned long flags;
5817 bool err_handling = true;
5819 spin_lock_irqsave(hba->host->host_lock, flags);
5821 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5822 * device fatal error and/or DL NAC & REPLAY timeout errors.
5824 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5827 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5828 ((hba->saved_err & UIC_ERROR) &&
5829 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5832 if ((hba->saved_err & UIC_ERROR) &&
5833 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5836 * wait for 50ms to see if we can get any other errors or not.
5838 spin_unlock_irqrestore(hba->host->host_lock, flags);
5840 spin_lock_irqsave(hba->host->host_lock, flags);
5843 * now check if we have got any other severe errors other than
5846 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5847 ((hba->saved_err & UIC_ERROR) &&
5848 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5852 * As DL NAC is the only error received so far, send out NOP
5853 * command to confirm if link is still active or not.
5854 * - If we don't get any response then do error recovery.
5855 * - If we get response then clear the DL NAC error bit.
5858 spin_unlock_irqrestore(hba->host->host_lock, flags);
5859 err = ufshcd_verify_dev_init(hba);
5860 spin_lock_irqsave(hba->host->host_lock, flags);
5865 /* Link seems to be alive hence ignore the DL NAC errors */
5866 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5867 hba->saved_err &= ~UIC_ERROR;
5868 /* clear NAC error */
5869 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5870 if (!hba->saved_uic_err)
5871 err_handling = false;
5874 spin_unlock_irqrestore(hba->host->host_lock, flags);
5875 return err_handling;
5878 /* host lock must be held before calling this func */
5879 static inline bool ufshcd_is_saved_err_fatal(struct ufs_hba *hba)
5881 return (hba->saved_uic_err & UFSHCD_UIC_DL_PA_INIT_ERROR) ||
5882 (hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK));
5885 /* host lock must be held before calling this func */
5886 static inline void ufshcd_schedule_eh_work(struct ufs_hba *hba)
5888 /* handle fatal errors only when link is not in error state */
5889 if (hba->ufshcd_state != UFSHCD_STATE_ERROR) {
5890 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
5891 ufshcd_is_saved_err_fatal(hba))
5892 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_FATAL;
5894 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_NON_FATAL;
5895 queue_work(hba->eh_wq, &hba->eh_work);
5899 static void ufshcd_clk_scaling_allow(struct ufs_hba *hba, bool allow)
5901 down_write(&hba->clk_scaling_lock);
5902 hba->clk_scaling.is_allowed = allow;
5903 up_write(&hba->clk_scaling_lock);
5906 static void ufshcd_clk_scaling_suspend(struct ufs_hba *hba, bool suspend)
5909 if (hba->clk_scaling.is_enabled)
5910 ufshcd_suspend_clkscaling(hba);
5911 ufshcd_clk_scaling_allow(hba, false);
5913 ufshcd_clk_scaling_allow(hba, true);
5914 if (hba->clk_scaling.is_enabled)
5915 ufshcd_resume_clkscaling(hba);
5919 static void ufshcd_err_handling_prepare(struct ufs_hba *hba)
5921 ufshcd_rpm_get_sync(hba);
5922 if (pm_runtime_status_suspended(&hba->sdev_ufs_device->sdev_gendev) ||
5923 hba->is_sys_suspended) {
5924 enum ufs_pm_op pm_op;
5927 * Don't assume anything of resume, if
5928 * resume fails, irq and clocks can be OFF, and powers
5929 * can be OFF or in LPM.
5931 ufshcd_setup_hba_vreg(hba, true);
5932 ufshcd_enable_irq(hba);
5933 ufshcd_setup_vreg(hba, true);
5934 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
5935 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
5936 ufshcd_hold(hba, false);
5937 if (!ufshcd_is_clkgating_allowed(hba))
5938 ufshcd_setup_clocks(hba, true);
5939 ufshcd_release(hba);
5940 pm_op = hba->is_sys_suspended ? UFS_SYSTEM_PM : UFS_RUNTIME_PM;
5941 ufshcd_vops_resume(hba, pm_op);
5943 ufshcd_hold(hba, false);
5944 if (ufshcd_is_clkscaling_supported(hba) &&
5945 hba->clk_scaling.is_enabled)
5946 ufshcd_suspend_clkscaling(hba);
5947 ufshcd_clk_scaling_allow(hba, false);
5949 ufshcd_scsi_block_requests(hba);
5950 /* Drain ufshcd_queuecommand() */
5951 down_write(&hba->clk_scaling_lock);
5952 up_write(&hba->clk_scaling_lock);
5953 cancel_work_sync(&hba->eeh_work);
5956 static void ufshcd_err_handling_unprepare(struct ufs_hba *hba)
5958 ufshcd_scsi_unblock_requests(hba);
5959 ufshcd_release(hba);
5960 if (ufshcd_is_clkscaling_supported(hba))
5961 ufshcd_clk_scaling_suspend(hba, false);
5962 ufshcd_clear_ua_wluns(hba);
5963 ufshcd_rpm_put(hba);
5966 static inline bool ufshcd_err_handling_should_stop(struct ufs_hba *hba)
5968 return (!hba->is_powered || hba->shutting_down ||
5969 !hba->sdev_ufs_device ||
5970 hba->ufshcd_state == UFSHCD_STATE_ERROR ||
5971 (!(hba->saved_err || hba->saved_uic_err || hba->force_reset ||
5972 ufshcd_is_link_broken(hba))));
5976 static void ufshcd_recover_pm_error(struct ufs_hba *hba)
5978 struct Scsi_Host *shost = hba->host;
5979 struct scsi_device *sdev;
5980 struct request_queue *q;
5983 hba->is_sys_suspended = false;
5985 * Set RPM status of wlun device to RPM_ACTIVE,
5986 * this also clears its runtime error.
5988 ret = pm_runtime_set_active(&hba->sdev_ufs_device->sdev_gendev);
5990 /* hba device might have a runtime error otherwise */
5992 ret = pm_runtime_set_active(hba->dev);
5994 * If wlun device had runtime error, we also need to resume those
5995 * consumer scsi devices in case any of them has failed to be
5996 * resumed due to supplier runtime resume failure. This is to unblock
5997 * blk_queue_enter in case there are bios waiting inside it.
6000 shost_for_each_device(sdev, shost) {
6001 q = sdev->request_queue;
6002 if (q->dev && (q->rpm_status == RPM_SUSPENDED ||
6003 q->rpm_status == RPM_SUSPENDING))
6004 pm_request_resume(q->dev);
6009 static inline void ufshcd_recover_pm_error(struct ufs_hba *hba)
6014 static bool ufshcd_is_pwr_mode_restore_needed(struct ufs_hba *hba)
6016 struct ufs_pa_layer_attr *pwr_info = &hba->pwr_info;
6019 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
6021 if (pwr_info->pwr_rx != ((mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK))
6024 if (pwr_info->pwr_tx != (mode & PWRMODE_MASK))
6031 * ufshcd_err_handler - handle UFS errors that require s/w attention
6032 * @work: pointer to work structure
6034 static void ufshcd_err_handler(struct work_struct *work)
6036 struct ufs_hba *hba;
6037 unsigned long flags;
6038 bool err_xfer = false;
6039 bool err_tm = false;
6040 int err = 0, pmc_err;
6042 bool needs_reset = false, needs_restore = false;
6044 hba = container_of(work, struct ufs_hba, eh_work);
6046 down(&hba->host_sem);
6047 spin_lock_irqsave(hba->host->host_lock, flags);
6048 if (ufshcd_err_handling_should_stop(hba)) {
6049 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6050 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6051 spin_unlock_irqrestore(hba->host->host_lock, flags);
6055 ufshcd_set_eh_in_progress(hba);
6056 spin_unlock_irqrestore(hba->host->host_lock, flags);
6057 ufshcd_err_handling_prepare(hba);
6058 /* Complete requests that have door-bell cleared by h/w */
6059 ufshcd_complete_requests(hba);
6060 spin_lock_irqsave(hba->host->host_lock, flags);
6061 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6062 hba->ufshcd_state = UFSHCD_STATE_RESET;
6064 * A full reset and restore might have happened after preparation
6065 * is finished, double check whether we should stop.
6067 if (ufshcd_err_handling_should_stop(hba))
6068 goto skip_err_handling;
6070 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6073 spin_unlock_irqrestore(hba->host->host_lock, flags);
6074 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
6075 ret = ufshcd_quirk_dl_nac_errors(hba);
6076 spin_lock_irqsave(hba->host->host_lock, flags);
6077 if (!ret && ufshcd_err_handling_should_stop(hba))
6078 goto skip_err_handling;
6081 if ((hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6082 (hba->saved_uic_err &&
6083 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
6084 bool pr_prdt = !!(hba->saved_err & SYSTEM_BUS_FATAL_ERROR);
6086 spin_unlock_irqrestore(hba->host->host_lock, flags);
6087 ufshcd_print_host_state(hba);
6088 ufshcd_print_pwr_info(hba);
6089 ufshcd_print_evt_hist(hba);
6090 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
6091 ufshcd_print_trs(hba, hba->outstanding_reqs, pr_prdt);
6092 spin_lock_irqsave(hba->host->host_lock, flags);
6096 * if host reset is required then skip clearing the pending
6097 * transfers forcefully because they will get cleared during
6098 * host reset and restore
6100 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
6101 ufshcd_is_saved_err_fatal(hba) ||
6102 ((hba->saved_err & UIC_ERROR) &&
6103 (hba->saved_uic_err & (UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
6104 UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))) {
6110 * If LINERESET was caught, UFS might have been put to PWM mode,
6111 * check if power mode restore is needed.
6113 if (hba->saved_uic_err & UFSHCD_UIC_PA_GENERIC_ERROR) {
6114 hba->saved_uic_err &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6115 if (!hba->saved_uic_err)
6116 hba->saved_err &= ~UIC_ERROR;
6117 spin_unlock_irqrestore(hba->host->host_lock, flags);
6118 if (ufshcd_is_pwr_mode_restore_needed(hba))
6119 needs_restore = true;
6120 spin_lock_irqsave(hba->host->host_lock, flags);
6121 if (!hba->saved_err && !needs_restore)
6122 goto skip_err_handling;
6125 hba->silence_err_logs = true;
6126 /* release lock as clear command might sleep */
6127 spin_unlock_irqrestore(hba->host->host_lock, flags);
6128 /* Clear pending transfer requests */
6129 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
6130 if (ufshcd_try_to_abort_task(hba, tag)) {
6132 goto lock_skip_pending_xfer_clear;
6136 /* Clear pending task management requests */
6137 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
6138 if (ufshcd_clear_tm_cmd(hba, tag)) {
6140 goto lock_skip_pending_xfer_clear;
6144 lock_skip_pending_xfer_clear:
6145 ufshcd_retry_aborted_requests(hba);
6147 spin_lock_irqsave(hba->host->host_lock, flags);
6148 hba->silence_err_logs = false;
6149 if (err_xfer || err_tm) {
6155 * After all reqs and tasks are cleared from doorbell,
6156 * now it is safe to retore power mode.
6158 if (needs_restore) {
6159 spin_unlock_irqrestore(hba->host->host_lock, flags);
6161 * Hold the scaling lock just in case dev cmds
6162 * are sent via bsg and/or sysfs.
6164 down_write(&hba->clk_scaling_lock);
6165 hba->force_pmc = true;
6166 pmc_err = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));
6169 dev_err(hba->dev, "%s: Failed to restore power mode, err = %d\n",
6172 hba->force_pmc = false;
6173 ufshcd_print_pwr_info(hba);
6174 up_write(&hba->clk_scaling_lock);
6175 spin_lock_irqsave(hba->host->host_lock, flags);
6179 /* Fatal errors need reset */
6181 hba->force_reset = false;
6182 spin_unlock_irqrestore(hba->host->host_lock, flags);
6183 err = ufshcd_reset_and_restore(hba);
6185 dev_err(hba->dev, "%s: reset and restore failed with err %d\n",
6188 ufshcd_recover_pm_error(hba);
6189 spin_lock_irqsave(hba->host->host_lock, flags);
6194 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
6195 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6196 if (hba->saved_err || hba->saved_uic_err)
6197 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
6198 __func__, hba->saved_err, hba->saved_uic_err);
6200 ufshcd_clear_eh_in_progress(hba);
6201 spin_unlock_irqrestore(hba->host->host_lock, flags);
6202 ufshcd_err_handling_unprepare(hba);
6207 * ufshcd_update_uic_error - check and set fatal UIC error flags.
6208 * @hba: per-adapter instance
6211 * IRQ_HANDLED - If interrupt is valid
6212 * IRQ_NONE - If invalid interrupt
6214 static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
6217 irqreturn_t retval = IRQ_NONE;
6219 /* PHY layer error */
6220 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
6221 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
6222 (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) {
6223 ufshcd_update_evt_hist(hba, UFS_EVT_PA_ERR, reg);
6225 * To know whether this error is fatal or not, DB timeout
6226 * must be checked but this error is handled separately.
6228 if (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)
6229 dev_dbg(hba->dev, "%s: UIC Lane error reported\n",
6232 /* Got a LINERESET indication. */
6233 if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) {
6234 struct uic_command *cmd = NULL;
6236 hba->uic_error |= UFSHCD_UIC_PA_GENERIC_ERROR;
6237 if (hba->uic_async_done && hba->active_uic_cmd)
6238 cmd = hba->active_uic_cmd;
6240 * Ignore the LINERESET during power mode change
6241 * operation via DME_SET command.
6243 if (cmd && (cmd->command == UIC_CMD_DME_SET))
6244 hba->uic_error &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6246 retval |= IRQ_HANDLED;
6249 /* PA_INIT_ERROR is fatal and needs UIC reset */
6250 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
6251 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
6252 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
6253 ufshcd_update_evt_hist(hba, UFS_EVT_DL_ERR, reg);
6255 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
6256 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
6257 else if (hba->dev_quirks &
6258 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6259 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
6261 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
6262 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
6263 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
6265 retval |= IRQ_HANDLED;
6268 /* UIC NL/TL/DME errors needs software retry */
6269 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
6270 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
6271 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
6272 ufshcd_update_evt_hist(hba, UFS_EVT_NL_ERR, reg);
6273 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
6274 retval |= IRQ_HANDLED;
6277 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
6278 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
6279 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
6280 ufshcd_update_evt_hist(hba, UFS_EVT_TL_ERR, reg);
6281 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
6282 retval |= IRQ_HANDLED;
6285 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
6286 if ((reg & UIC_DME_ERROR) &&
6287 (reg & UIC_DME_ERROR_CODE_MASK)) {
6288 ufshcd_update_evt_hist(hba, UFS_EVT_DME_ERR, reg);
6289 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
6290 retval |= IRQ_HANDLED;
6293 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
6294 __func__, hba->uic_error);
6299 * ufshcd_check_errors - Check for errors that need s/w attention
6300 * @hba: per-adapter instance
6301 * @intr_status: interrupt status generated by the controller
6304 * IRQ_HANDLED - If interrupt is valid
6305 * IRQ_NONE - If invalid interrupt
6307 static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba, u32 intr_status)
6309 bool queue_eh_work = false;
6310 irqreturn_t retval = IRQ_NONE;
6312 spin_lock(hba->host->host_lock);
6313 hba->errors |= UFSHCD_ERROR_MASK & intr_status;
6315 if (hba->errors & INT_FATAL_ERRORS) {
6316 ufshcd_update_evt_hist(hba, UFS_EVT_FATAL_ERR,
6318 queue_eh_work = true;
6321 if (hba->errors & UIC_ERROR) {
6323 retval = ufshcd_update_uic_error(hba);
6325 queue_eh_work = true;
6328 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
6330 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
6331 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
6333 hba->errors, ufshcd_get_upmcrs(hba));
6334 ufshcd_update_evt_hist(hba, UFS_EVT_AUTO_HIBERN8_ERR,
6336 ufshcd_set_link_broken(hba);
6337 queue_eh_work = true;
6340 if (queue_eh_work) {
6342 * update the transfer error masks to sticky bits, let's do this
6343 * irrespective of current ufshcd_state.
6345 hba->saved_err |= hba->errors;
6346 hba->saved_uic_err |= hba->uic_error;
6348 /* dump controller state before resetting */
6349 if ((hba->saved_err &
6350 (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6351 (hba->saved_uic_err &&
6352 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
6353 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
6354 __func__, hba->saved_err,
6355 hba->saved_uic_err);
6356 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE,
6358 ufshcd_print_pwr_info(hba);
6360 ufshcd_schedule_eh_work(hba);
6361 retval |= IRQ_HANDLED;
6364 * if (!queue_eh_work) -
6365 * Other errors are either non-fatal where host recovers
6366 * itself without s/w intervention or errors that will be
6367 * handled by the SCSI core layer.
6371 spin_unlock(hba->host->host_lock);
6376 * ufshcd_tmc_handler - handle task management function completion
6377 * @hba: per adapter instance
6380 * IRQ_HANDLED - If interrupt is valid
6381 * IRQ_NONE - If invalid interrupt
6383 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
6385 unsigned long flags, pending, issued;
6386 irqreturn_t ret = IRQ_NONE;
6389 pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
6391 spin_lock_irqsave(hba->host->host_lock, flags);
6392 issued = hba->outstanding_tasks & ~pending;
6393 for_each_set_bit(tag, &issued, hba->nutmrs) {
6394 struct request *req = hba->tmf_rqs[tag];
6395 struct completion *c = req->end_io_data;
6400 spin_unlock_irqrestore(hba->host->host_lock, flags);
6406 * ufshcd_sl_intr - Interrupt service routine
6407 * @hba: per adapter instance
6408 * @intr_status: contains interrupts generated by the controller
6411 * IRQ_HANDLED - If interrupt is valid
6412 * IRQ_NONE - If invalid interrupt
6414 static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
6416 irqreturn_t retval = IRQ_NONE;
6418 if (intr_status & UFSHCD_UIC_MASK)
6419 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
6421 if (intr_status & UFSHCD_ERROR_MASK || hba->errors)
6422 retval |= ufshcd_check_errors(hba, intr_status);
6424 if (intr_status & UTP_TASK_REQ_COMPL)
6425 retval |= ufshcd_tmc_handler(hba);
6427 if (intr_status & UTP_TRANSFER_REQ_COMPL)
6428 retval |= ufshcd_transfer_req_compl(hba, /*retry_requests=*/false);
6434 * ufshcd_intr - Main interrupt service routine
6436 * @__hba: pointer to adapter instance
6439 * IRQ_HANDLED - If interrupt is valid
6440 * IRQ_NONE - If invalid interrupt
6442 static irqreturn_t ufshcd_intr(int irq, void *__hba)
6444 u32 intr_status, enabled_intr_status = 0;
6445 irqreturn_t retval = IRQ_NONE;
6446 struct ufs_hba *hba = __hba;
6447 int retries = hba->nutrs;
6449 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
6450 hba->ufs_stats.last_intr_status = intr_status;
6451 hba->ufs_stats.last_intr_ts = ktime_get();
6454 * There could be max of hba->nutrs reqs in flight and in worst case
6455 * if the reqs get finished 1 by 1 after the interrupt status is
6456 * read, make sure we handle them by checking the interrupt status
6457 * again in a loop until we process all of the reqs before returning.
6459 while (intr_status && retries--) {
6460 enabled_intr_status =
6461 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
6462 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
6463 if (enabled_intr_status)
6464 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
6466 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
6469 if (enabled_intr_status && retval == IRQ_NONE &&
6470 (!(enabled_intr_status & UTP_TRANSFER_REQ_COMPL) ||
6471 hba->outstanding_reqs) && !ufshcd_eh_in_progress(hba)) {
6472 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x (0x%08x, 0x%08x)\n",
6475 hba->ufs_stats.last_intr_status,
6476 enabled_intr_status);
6477 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
6483 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
6486 u32 mask = 1 << tag;
6487 unsigned long flags;
6489 if (!test_bit(tag, &hba->outstanding_tasks))
6492 spin_lock_irqsave(hba->host->host_lock, flags);
6493 ufshcd_utmrl_clear(hba, tag);
6494 spin_unlock_irqrestore(hba->host->host_lock, flags);
6496 /* poll for max. 1 sec to clear door bell register by h/w */
6497 err = ufshcd_wait_for_register(hba,
6498 REG_UTP_TASK_REQ_DOOR_BELL,
6499 mask, 0, 1000, 1000);
6504 static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
6505 struct utp_task_req_desc *treq, u8 tm_function)
6507 struct request_queue *q = hba->tmf_queue;
6508 struct Scsi_Host *host = hba->host;
6509 DECLARE_COMPLETION_ONSTACK(wait);
6510 struct request *req;
6511 unsigned long flags;
6515 * blk_mq_alloc_request() is used here only to get a free tag.
6517 req = blk_mq_alloc_request(q, REQ_OP_DRV_OUT, 0);
6519 return PTR_ERR(req);
6521 req->end_io_data = &wait;
6522 ufshcd_hold(hba, false);
6524 spin_lock_irqsave(host->host_lock, flags);
6526 task_tag = req->tag;
6527 hba->tmf_rqs[req->tag] = req;
6528 treq->upiu_req.req_header.dword_0 |= cpu_to_be32(task_tag);
6530 memcpy(hba->utmrdl_base_addr + task_tag, treq, sizeof(*treq));
6531 ufshcd_vops_setup_task_mgmt(hba, task_tag, tm_function);
6533 /* send command to the controller */
6534 __set_bit(task_tag, &hba->outstanding_tasks);
6536 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TASK_REQ_DOOR_BELL);
6537 /* Make sure that doorbell is committed immediately */
6540 spin_unlock_irqrestore(host->host_lock, flags);
6542 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_SEND);
6544 /* wait until the task management command is completed */
6545 err = wait_for_completion_io_timeout(&wait,
6546 msecs_to_jiffies(TM_CMD_TIMEOUT));
6549 * Make sure that ufshcd_compl_tm() does not trigger a
6552 req->end_io_data = NULL;
6553 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_ERR);
6554 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
6555 __func__, tm_function);
6556 if (ufshcd_clear_tm_cmd(hba, task_tag))
6557 dev_WARN(hba->dev, "%s: unable to clear tm cmd (slot %d) after timeout\n",
6558 __func__, task_tag);
6562 memcpy(treq, hba->utmrdl_base_addr + task_tag, sizeof(*treq));
6564 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_COMP);
6567 spin_lock_irqsave(hba->host->host_lock, flags);
6568 hba->tmf_rqs[req->tag] = NULL;
6569 __clear_bit(task_tag, &hba->outstanding_tasks);
6570 spin_unlock_irqrestore(hba->host->host_lock, flags);
6572 ufshcd_release(hba);
6573 blk_mq_free_request(req);
6579 * ufshcd_issue_tm_cmd - issues task management commands to controller
6580 * @hba: per adapter instance
6581 * @lun_id: LUN ID to which TM command is sent
6582 * @task_id: task ID to which the TM command is applicable
6583 * @tm_function: task management function opcode
6584 * @tm_response: task management service response return value
6586 * Returns non-zero value on error, zero on success.
6588 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6589 u8 tm_function, u8 *tm_response)
6591 struct utp_task_req_desc treq = { { 0 }, };
6594 /* Configure task request descriptor */
6595 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6596 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6598 /* Configure task request UPIU */
6599 treq.upiu_req.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
6600 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
6601 treq.upiu_req.req_header.dword_1 = cpu_to_be32(tm_function << 16);
6604 * The host shall provide the same value for LUN field in the basic
6605 * header and for Input Parameter.
6607 treq.upiu_req.input_param1 = cpu_to_be32(lun_id);
6608 treq.upiu_req.input_param2 = cpu_to_be32(task_id);
6610 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
6611 if (err == -ETIMEDOUT)
6614 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6615 if (ocs_value != OCS_SUCCESS)
6616 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
6617 __func__, ocs_value);
6618 else if (tm_response)
6619 *tm_response = be32_to_cpu(treq.upiu_rsp.output_param1) &
6620 MASK_TM_SERVICE_RESP;
6625 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
6626 * @hba: per-adapter instance
6627 * @req_upiu: upiu request
6628 * @rsp_upiu: upiu reply
6629 * @desc_buff: pointer to descriptor buffer, NULL if NA
6630 * @buff_len: descriptor size, 0 if NA
6631 * @cmd_type: specifies the type (NOP, Query...)
6632 * @desc_op: descriptor operation
6634 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
6635 * Therefore, it "rides" the device management infrastructure: uses its tag and
6636 * tasks work queues.
6638 * Since there is only one available tag for device management commands,
6639 * the caller is expected to hold the hba->dev_cmd.lock mutex.
6641 static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
6642 struct utp_upiu_req *req_upiu,
6643 struct utp_upiu_req *rsp_upiu,
6644 u8 *desc_buff, int *buff_len,
6645 enum dev_cmd_type cmd_type,
6646 enum query_opcode desc_op)
6648 struct request_queue *q = hba->cmd_queue;
6649 DECLARE_COMPLETION_ONSTACK(wait);
6650 struct request *req;
6651 struct ufshcd_lrb *lrbp;
6656 down_read(&hba->clk_scaling_lock);
6658 req = blk_mq_alloc_request(q, REQ_OP_DRV_OUT, 0);
6664 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
6666 if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
6671 lrbp = &hba->lrb[tag];
6674 lrbp->sense_bufflen = 0;
6675 lrbp->sense_buffer = NULL;
6676 lrbp->task_tag = tag;
6678 lrbp->intr_cmd = true;
6679 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
6680 hba->dev_cmd.type = cmd_type;
6682 if (hba->ufs_version <= ufshci_version(1, 1))
6683 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
6685 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
6687 /* update the task tag in the request upiu */
6688 req_upiu->header.dword_0 |= cpu_to_be32(tag);
6690 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
6692 /* just copy the upiu request as it is */
6693 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
6694 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
6695 /* The Data Segment Area is optional depending upon the query
6696 * function value. for WRITE DESCRIPTOR, the data segment
6697 * follows right after the tsf.
6699 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
6703 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
6705 hba->dev_cmd.complete = &wait;
6707 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
6709 ufshcd_send_command(hba, tag);
6711 * ignore the returning value here - ufshcd_check_query_response is
6712 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
6713 * read the response directly ignoring all errors.
6715 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
6717 /* just copy the upiu response as it is */
6718 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
6719 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
6720 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
6721 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
6722 MASK_QUERY_DATA_SEG_LEN;
6724 if (*buff_len >= resp_len) {
6725 memcpy(desc_buff, descp, resp_len);
6726 *buff_len = resp_len;
6729 "%s: rsp size %d is bigger than buffer size %d",
6730 __func__, resp_len, *buff_len);
6735 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
6736 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
6739 blk_mq_free_request(req);
6741 up_read(&hba->clk_scaling_lock);
6746 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
6747 * @hba: per-adapter instance
6748 * @req_upiu: upiu request
6749 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
6750 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
6751 * @desc_buff: pointer to descriptor buffer, NULL if NA
6752 * @buff_len: descriptor size, 0 if NA
6753 * @desc_op: descriptor operation
6755 * Supports UTP Transfer requests (nop and query), and UTP Task
6756 * Management requests.
6757 * It is up to the caller to fill the upiu conent properly, as it will
6758 * be copied without any further input validations.
6760 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
6761 struct utp_upiu_req *req_upiu,
6762 struct utp_upiu_req *rsp_upiu,
6764 u8 *desc_buff, int *buff_len,
6765 enum query_opcode desc_op)
6768 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
6769 struct utp_task_req_desc treq = { { 0 }, };
6771 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
6774 case UPIU_TRANSACTION_NOP_OUT:
6775 cmd_type = DEV_CMD_TYPE_NOP;
6777 case UPIU_TRANSACTION_QUERY_REQ:
6778 ufshcd_hold(hba, false);
6779 mutex_lock(&hba->dev_cmd.lock);
6780 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6781 desc_buff, buff_len,
6783 mutex_unlock(&hba->dev_cmd.lock);
6784 ufshcd_release(hba);
6787 case UPIU_TRANSACTION_TASK_REQ:
6788 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6789 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6791 memcpy(&treq.upiu_req, req_upiu, sizeof(*req_upiu));
6793 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6794 if (err == -ETIMEDOUT)
6797 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6798 if (ocs_value != OCS_SUCCESS) {
6799 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6804 memcpy(rsp_upiu, &treq.upiu_rsp, sizeof(*rsp_upiu));
6817 * ufshcd_eh_device_reset_handler - device reset handler registered to
6819 * @cmd: SCSI command pointer
6821 * Returns SUCCESS/FAILED
6823 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
6825 struct Scsi_Host *host;
6826 struct ufs_hba *hba;
6831 host = cmd->device->host;
6832 hba = shost_priv(host);
6834 lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
6835 err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp);
6836 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6842 /* clear the commands that were pending for corresponding LUN */
6843 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6844 if (hba->lrb[pos].lun == lun) {
6845 err = ufshcd_clear_cmd(hba, pos);
6848 __ufshcd_transfer_req_compl(hba, 1U << pos, false);
6853 hba->req_abort_count = 0;
6854 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, (u32)err);
6858 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6864 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6866 struct ufshcd_lrb *lrbp;
6869 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6870 lrbp = &hba->lrb[tag];
6871 lrbp->req_abort_skip = true;
6876 * ufshcd_try_to_abort_task - abort a specific task
6877 * @hba: Pointer to adapter instance
6878 * @tag: Task tag/index to be aborted
6880 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6881 * command, and in host controller by clearing the door-bell register. There can
6882 * be race between controller sending the command to the device while abort is
6883 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6884 * really issued and then try to abort it.
6886 * Returns zero on success, non-zero on failure
6888 static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag)
6890 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
6896 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6897 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6898 UFS_QUERY_TASK, &resp);
6899 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6900 /* cmd pending in the device */
6901 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6904 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6906 * cmd not pending in the device, check if it is
6909 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6911 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6912 if (reg & (1 << tag)) {
6913 /* sleep for max. 200us to stabilize */
6914 usleep_range(100, 200);
6917 /* command completed already */
6918 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6923 "%s: no response from device. tag = %d, err %d\n",
6924 __func__, tag, err);
6926 err = resp; /* service response error */
6936 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6937 UFS_ABORT_TASK, &resp);
6938 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6940 err = resp; /* service response error */
6941 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6942 __func__, tag, err);
6947 err = ufshcd_clear_cmd(hba, tag);
6949 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6950 __func__, tag, err);
6957 * ufshcd_abort - scsi host template eh_abort_handler callback
6958 * @cmd: SCSI command pointer
6960 * Returns SUCCESS/FAILED
6962 static int ufshcd_abort(struct scsi_cmnd *cmd)
6964 struct Scsi_Host *host = cmd->device->host;
6965 struct ufs_hba *hba = shost_priv(host);
6966 int tag = scsi_cmd_to_rq(cmd)->tag;
6967 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
6968 unsigned long flags;
6972 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
6974 ufshcd_hold(hba, false);
6975 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6976 /* If command is already aborted/completed, return FAILED. */
6977 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6979 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6980 __func__, tag, hba->outstanding_reqs, reg);
6984 /* Print Transfer Request of aborted task */
6985 dev_info(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
6988 * Print detailed info about aborted request.
6989 * As more than one request might get aborted at the same time,
6990 * print full information only for the first aborted request in order
6991 * to reduce repeated printouts. For other aborted requests only print
6994 scsi_print_command(cmd);
6995 if (!hba->req_abort_count) {
6996 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, tag);
6997 ufshcd_print_evt_hist(hba);
6998 ufshcd_print_host_state(hba);
6999 ufshcd_print_pwr_info(hba);
7000 ufshcd_print_trs(hba, 1 << tag, true);
7002 ufshcd_print_trs(hba, 1 << tag, false);
7004 hba->req_abort_count++;
7006 if (!(reg & (1 << tag))) {
7008 "%s: cmd was completed, but without a notifying intr, tag = %d",
7010 __ufshcd_transfer_req_compl(hba, 1UL << tag, /*retry_requests=*/false);
7015 * Task abort to the device W-LUN is illegal. When this command
7016 * will fail, due to spec violation, scsi err handling next step
7017 * will be to send LU reset which, again, is a spec violation.
7018 * To avoid these unnecessary/illegal steps, first we clean up
7019 * the lrb taken by this cmd and re-set it in outstanding_reqs,
7020 * then queue the eh_work and bail.
7022 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN) {
7023 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, lrbp->lun);
7025 spin_lock_irqsave(host->host_lock, flags);
7026 hba->force_reset = true;
7027 ufshcd_schedule_eh_work(hba);
7028 spin_unlock_irqrestore(host->host_lock, flags);
7032 /* Skip task abort in case previous aborts failed and report failure */
7033 if (lrbp->req_abort_skip) {
7034 dev_err(hba->dev, "%s: skipping abort\n", __func__);
7035 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
7039 err = ufshcd_try_to_abort_task(hba, tag);
7041 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
7042 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
7050 /* Matches the ufshcd_hold() call at the start of this function. */
7051 ufshcd_release(hba);
7056 * ufshcd_host_reset_and_restore - reset and restore host controller
7057 * @hba: per-adapter instance
7059 * Note that host controller reset may issue DME_RESET to
7060 * local and remote (device) Uni-Pro stack and the attributes
7061 * are reset to default state.
7063 * Returns zero on success, non-zero on failure
7065 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
7070 * Stop the host controller and complete the requests
7073 ufshpb_reset_host(hba);
7074 ufshcd_hba_stop(hba);
7075 hba->silence_err_logs = true;
7076 ufshcd_retry_aborted_requests(hba);
7077 hba->silence_err_logs = false;
7079 /* scale up clocks to max frequency before full reinitialization */
7080 ufshcd_set_clk_freq(hba, true);
7082 err = ufshcd_hba_enable(hba);
7084 /* Establish the link again and restore the device */
7086 err = ufshcd_probe_hba(hba, false);
7089 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
7090 ufshcd_update_evt_hist(hba, UFS_EVT_HOST_RESET, (u32)err);
7095 * ufshcd_reset_and_restore - reset and re-initialize host/device
7096 * @hba: per-adapter instance
7098 * Reset and recover device, host and re-establish link. This
7099 * is helpful to recover the communication in fatal error conditions.
7101 * Returns zero on success, non-zero on failure
7103 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
7108 unsigned long flags;
7109 int retries = MAX_HOST_RESET_RETRIES;
7112 * This is a fresh start, cache and clear saved error first,
7113 * in case new error generated during reset and restore.
7115 spin_lock_irqsave(hba->host->host_lock, flags);
7116 saved_err = hba->saved_err;
7117 saved_uic_err = hba->saved_uic_err;
7119 hba->saved_uic_err = 0;
7120 spin_unlock_irqrestore(hba->host->host_lock, flags);
7123 /* Reset the attached device */
7124 ufshcd_device_reset(hba);
7126 err = ufshcd_host_reset_and_restore(hba);
7127 } while (err && --retries);
7129 spin_lock_irqsave(hba->host->host_lock, flags);
7131 * Inform scsi mid-layer that we did reset and allow to handle
7132 * Unit Attention properly.
7134 scsi_report_bus_reset(hba->host, 0);
7136 hba->ufshcd_state = UFSHCD_STATE_ERROR;
7137 hba->saved_err |= saved_err;
7138 hba->saved_uic_err |= saved_uic_err;
7140 spin_unlock_irqrestore(hba->host->host_lock, flags);
7146 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
7147 * @cmd: SCSI command pointer
7149 * Returns SUCCESS/FAILED
7151 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
7154 unsigned long flags;
7155 struct ufs_hba *hba;
7157 hba = shost_priv(cmd->device->host);
7159 spin_lock_irqsave(hba->host->host_lock, flags);
7160 hba->force_reset = true;
7161 ufshcd_schedule_eh_work(hba);
7162 dev_err(hba->dev, "%s: reset in progress - 1\n", __func__);
7163 spin_unlock_irqrestore(hba->host->host_lock, flags);
7165 flush_work(&hba->eh_work);
7167 spin_lock_irqsave(hba->host->host_lock, flags);
7168 if (hba->ufshcd_state == UFSHCD_STATE_ERROR)
7170 spin_unlock_irqrestore(hba->host->host_lock, flags);
7176 * ufshcd_get_max_icc_level - calculate the ICC level
7177 * @sup_curr_uA: max. current supported by the regulator
7178 * @start_scan: row at the desc table to start scan from
7179 * @buff: power descriptor buffer
7181 * Returns calculated max ICC level for specific regulator
7183 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
7190 for (i = start_scan; i >= 0; i--) {
7191 data = be16_to_cpup((__be16 *)&buff[2 * i]);
7192 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
7193 ATTR_ICC_LVL_UNIT_OFFSET;
7194 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
7196 case UFSHCD_NANO_AMP:
7197 curr_uA = curr_uA / 1000;
7199 case UFSHCD_MILI_AMP:
7200 curr_uA = curr_uA * 1000;
7203 curr_uA = curr_uA * 1000 * 1000;
7205 case UFSHCD_MICRO_AMP:
7209 if (sup_curr_uA >= curr_uA)
7214 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
7221 * ufshcd_find_max_sup_active_icc_level - calculate the max ICC level
7222 * In case regulators are not initialized we'll return 0
7223 * @hba: per-adapter instance
7224 * @desc_buf: power descriptor buffer to extract ICC levels from.
7225 * @len: length of desc_buff
7227 * Returns calculated ICC level
7229 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
7230 u8 *desc_buf, int len)
7234 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
7235 !hba->vreg_info.vccq2) {
7237 "%s: Regulator capability was not set, actvIccLevel=%d",
7238 __func__, icc_level);
7242 if (hba->vreg_info.vcc->max_uA)
7243 icc_level = ufshcd_get_max_icc_level(
7244 hba->vreg_info.vcc->max_uA,
7245 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
7246 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
7248 if (hba->vreg_info.vccq->max_uA)
7249 icc_level = ufshcd_get_max_icc_level(
7250 hba->vreg_info.vccq->max_uA,
7252 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
7254 if (hba->vreg_info.vccq2->max_uA)
7255 icc_level = ufshcd_get_max_icc_level(
7256 hba->vreg_info.vccq2->max_uA,
7258 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
7263 static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
7266 int buff_len = hba->desc_size[QUERY_DESC_IDN_POWER];
7270 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7274 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_POWER, 0, 0,
7275 desc_buf, buff_len);
7278 "%s: Failed reading power descriptor.len = %d ret = %d",
7279 __func__, buff_len, ret);
7283 icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
7285 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
7287 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7288 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
7292 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
7293 __func__, icc_level, ret);
7299 static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
7301 scsi_autopm_get_device(sdev);
7302 blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
7303 if (sdev->rpm_autosuspend)
7304 pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
7305 RPM_AUTOSUSPEND_DELAY_MS);
7306 scsi_autopm_put_device(sdev);
7310 * ufshcd_scsi_add_wlus - Adds required W-LUs
7311 * @hba: per-adapter instance
7313 * UFS device specification requires the UFS devices to support 4 well known
7315 * "REPORT_LUNS" (address: 01h)
7316 * "UFS Device" (address: 50h)
7317 * "RPMB" (address: 44h)
7318 * "BOOT" (address: 30h)
7319 * UFS device's power management needs to be controlled by "POWER CONDITION"
7320 * field of SSU (START STOP UNIT) command. But this "power condition" field
7321 * will take effect only when its sent to "UFS device" well known logical unit
7322 * hence we require the scsi_device instance to represent this logical unit in
7323 * order for the UFS host driver to send the SSU command for power management.
7325 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
7326 * Block) LU so user space process can control this LU. User space may also
7327 * want to have access to BOOT LU.
7329 * This function adds scsi device instances for each of all well known LUs
7330 * (except "REPORT LUNS" LU).
7332 * Returns zero on success (all required W-LUs are added successfully),
7333 * non-zero error value on failure (if failed to add any of the required W-LU).
7335 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
7338 struct scsi_device *sdev_boot;
7340 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
7341 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
7342 if (IS_ERR(hba->sdev_ufs_device)) {
7343 ret = PTR_ERR(hba->sdev_ufs_device);
7344 hba->sdev_ufs_device = NULL;
7347 scsi_device_put(hba->sdev_ufs_device);
7349 hba->sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
7350 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
7351 if (IS_ERR(hba->sdev_rpmb)) {
7352 ret = PTR_ERR(hba->sdev_rpmb);
7353 goto remove_sdev_ufs_device;
7355 ufshcd_blk_pm_runtime_init(hba->sdev_rpmb);
7356 scsi_device_put(hba->sdev_rpmb);
7358 sdev_boot = __scsi_add_device(hba->host, 0, 0,
7359 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
7360 if (IS_ERR(sdev_boot)) {
7361 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
7363 ufshcd_blk_pm_runtime_init(sdev_boot);
7364 scsi_device_put(sdev_boot);
7368 remove_sdev_ufs_device:
7369 scsi_remove_device(hba->sdev_ufs_device);
7374 static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
7376 struct ufs_dev_info *dev_info = &hba->dev_info;
7378 u32 d_lu_wb_buf_alloc;
7379 u32 ext_ufs_feature;
7381 if (!ufshcd_is_wb_allowed(hba))
7384 * Probe WB only for UFS-2.2 and UFS-3.1 (and later) devices or
7385 * UFS devices with quirk UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES
7388 if (!(dev_info->wspecversion >= 0x310 ||
7389 dev_info->wspecversion == 0x220 ||
7390 (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES)))
7393 if (hba->desc_size[QUERY_DESC_IDN_DEVICE] <
7394 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
7397 ext_ufs_feature = get_unaligned_be32(desc_buf +
7398 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
7400 if (!(ext_ufs_feature & UFS_DEV_WRITE_BOOSTER_SUP))
7404 * WB may be supported but not configured while provisioning. The spec
7405 * says, in dedicated wb buffer mode, a max of 1 lun would have wb
7406 * buffer configured.
7408 dev_info->wb_buffer_type = desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
7410 dev_info->b_presrv_uspc_en =
7411 desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
7413 if (dev_info->wb_buffer_type == WB_BUF_MODE_SHARED) {
7414 if (!get_unaligned_be32(desc_buf +
7415 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS))
7418 for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
7419 d_lu_wb_buf_alloc = 0;
7420 ufshcd_read_unit_desc_param(hba,
7422 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
7423 (u8 *)&d_lu_wb_buf_alloc,
7424 sizeof(d_lu_wb_buf_alloc));
7425 if (d_lu_wb_buf_alloc) {
7426 dev_info->wb_dedicated_lu = lun;
7431 if (!d_lu_wb_buf_alloc)
7437 hba->caps &= ~UFSHCD_CAP_WB_EN;
7440 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
7442 struct ufs_dev_fix *f;
7443 struct ufs_dev_info *dev_info = &hba->dev_info;
7448 for (f = fixups; f->quirk; f++) {
7449 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
7450 f->wmanufacturerid == UFS_ANY_VENDOR) &&
7451 ((dev_info->model &&
7452 STR_PRFX_EQUAL(f->model, dev_info->model)) ||
7453 !strcmp(f->model, UFS_ANY_MODEL)))
7454 hba->dev_quirks |= f->quirk;
7457 EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
7459 static void ufs_fixup_device_setup(struct ufs_hba *hba)
7461 /* fix by general quirk table */
7462 ufshcd_fixup_dev_quirks(hba, ufs_fixups);
7464 /* allow vendors to fix quirks */
7465 ufshcd_vops_fixup_dev_quirks(hba);
7468 static int ufs_get_device_desc(struct ufs_hba *hba)
7472 u8 b_ufs_feature_sup;
7474 struct ufs_dev_info *dev_info = &hba->dev_info;
7476 desc_buf = kmalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
7482 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_DEVICE, 0, 0, desc_buf,
7483 hba->desc_size[QUERY_DESC_IDN_DEVICE]);
7485 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
7491 * getting vendor (manufacturerID) and Bank Index in big endian
7494 dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
7495 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
7497 /* getting Specification Version in big endian format */
7498 dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
7499 desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
7500 b_ufs_feature_sup = desc_buf[DEVICE_DESC_PARAM_UFS_FEAT];
7502 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
7504 if (dev_info->wspecversion >= UFS_DEV_HPB_SUPPORT_VERSION &&
7505 (b_ufs_feature_sup & UFS_DEV_HPB_SUPPORT)) {
7506 bool hpb_en = false;
7508 ufshpb_get_dev_info(hba, desc_buf);
7510 if (!ufshpb_is_legacy(hba))
7511 err = ufshcd_query_flag_retry(hba,
7512 UPIU_QUERY_OPCODE_READ_FLAG,
7513 QUERY_FLAG_IDN_HPB_EN, 0,
7516 if (ufshpb_is_legacy(hba) || (!err && hpb_en))
7517 dev_info->hpb_enabled = true;
7520 err = ufshcd_read_string_desc(hba, model_index,
7521 &dev_info->model, SD_ASCII_STD);
7523 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
7528 hba->luns_avail = desc_buf[DEVICE_DESC_PARAM_NUM_LU] +
7529 desc_buf[DEVICE_DESC_PARAM_NUM_WLU];
7531 ufs_fixup_device_setup(hba);
7533 ufshcd_wb_probe(hba, desc_buf);
7536 * ufshcd_read_string_desc returns size of the string
7537 * reset the error value
7546 static void ufs_put_device_desc(struct ufs_hba *hba)
7548 struct ufs_dev_info *dev_info = &hba->dev_info;
7550 kfree(dev_info->model);
7551 dev_info->model = NULL;
7555 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
7556 * @hba: per-adapter instance
7558 * PA_TActivate parameter can be tuned manually if UniPro version is less than
7559 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
7560 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
7561 * the hibern8 exit latency.
7563 * Returns zero on success, non-zero error value on failure.
7565 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
7568 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
7570 ret = ufshcd_dme_peer_get(hba,
7572 RX_MIN_ACTIVATETIME_CAPABILITY,
7573 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7574 &peer_rx_min_activatetime);
7578 /* make sure proper unit conversion is applied */
7579 tuned_pa_tactivate =
7580 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
7581 / PA_TACTIVATE_TIME_UNIT_US);
7582 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7583 tuned_pa_tactivate);
7590 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
7591 * @hba: per-adapter instance
7593 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7594 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7595 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7596 * This optimal value can help reduce the hibern8 exit latency.
7598 * Returns zero on success, non-zero error value on failure.
7600 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7603 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7604 u32 max_hibern8_time, tuned_pa_hibern8time;
7606 ret = ufshcd_dme_get(hba,
7607 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7608 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7609 &local_tx_hibern8_time_cap);
7613 ret = ufshcd_dme_peer_get(hba,
7614 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7615 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7616 &peer_rx_hibern8_time_cap);
7620 max_hibern8_time = max(local_tx_hibern8_time_cap,
7621 peer_rx_hibern8_time_cap);
7622 /* make sure proper unit conversion is applied */
7623 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7624 / PA_HIBERN8_TIME_UNIT_US);
7625 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7626 tuned_pa_hibern8time);
7632 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7633 * less than device PA_TACTIVATE time.
7634 * @hba: per-adapter instance
7636 * Some UFS devices require host PA_TACTIVATE to be lower than device
7637 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7640 * Returns zero on success, non-zero error value on failure.
7642 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7645 u32 granularity, peer_granularity;
7646 u32 pa_tactivate, peer_pa_tactivate;
7647 u32 pa_tactivate_us, peer_pa_tactivate_us;
7648 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7650 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7655 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7660 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7661 (granularity > PA_GRANULARITY_MAX_VAL)) {
7662 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7663 __func__, granularity);
7667 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7668 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7669 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7670 __func__, peer_granularity);
7674 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7678 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7679 &peer_pa_tactivate);
7683 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7684 peer_pa_tactivate_us = peer_pa_tactivate *
7685 gran_to_us_table[peer_granularity - 1];
7687 if (pa_tactivate_us > peer_pa_tactivate_us) {
7688 u32 new_peer_pa_tactivate;
7690 new_peer_pa_tactivate = pa_tactivate_us /
7691 gran_to_us_table[peer_granularity - 1];
7692 new_peer_pa_tactivate++;
7693 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7694 new_peer_pa_tactivate);
7701 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
7703 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7704 ufshcd_tune_pa_tactivate(hba);
7705 ufshcd_tune_pa_hibern8time(hba);
7708 ufshcd_vops_apply_dev_quirks(hba);
7710 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
7711 /* set 1ms timeout for PA_TACTIVATE */
7712 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
7714 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
7715 ufshcd_quirk_tune_host_pa_tactivate(hba);
7718 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7720 hba->ufs_stats.hibern8_exit_cnt = 0;
7721 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
7722 hba->req_abort_count = 0;
7725 static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
7731 buff_len = hba->desc_size[QUERY_DESC_IDN_GEOMETRY];
7732 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7738 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_GEOMETRY, 0, 0,
7739 desc_buf, buff_len);
7741 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
7746 if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
7747 hba->dev_info.max_lu_supported = 32;
7748 else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
7749 hba->dev_info.max_lu_supported = 8;
7751 if (hba->desc_size[QUERY_DESC_IDN_GEOMETRY] >=
7752 GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS)
7753 ufshpb_get_geo_info(hba, desc_buf);
7760 static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
7761 {19200000, REF_CLK_FREQ_19_2_MHZ},
7762 {26000000, REF_CLK_FREQ_26_MHZ},
7763 {38400000, REF_CLK_FREQ_38_4_MHZ},
7764 {52000000, REF_CLK_FREQ_52_MHZ},
7765 {0, REF_CLK_FREQ_INVAL},
7768 static enum ufs_ref_clk_freq
7769 ufs_get_bref_clk_from_hz(unsigned long freq)
7773 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
7774 if (ufs_ref_clk_freqs[i].freq_hz == freq)
7775 return ufs_ref_clk_freqs[i].val;
7777 return REF_CLK_FREQ_INVAL;
7780 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
7784 freq = clk_get_rate(refclk);
7786 hba->dev_ref_clk_freq =
7787 ufs_get_bref_clk_from_hz(freq);
7789 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
7791 "invalid ref_clk setting = %ld\n", freq);
7794 static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7798 u32 freq = hba->dev_ref_clk_freq;
7800 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7801 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7804 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
7809 if (ref_clk == freq)
7810 goto out; /* nothing to update */
7812 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7813 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
7816 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
7817 ufs_ref_clk_freqs[freq].freq_hz);
7821 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
7822 ufs_ref_clk_freqs[freq].freq_hz);
7828 static int ufshcd_device_params_init(struct ufs_hba *hba)
7833 /* Init device descriptor sizes */
7834 for (i = 0; i < QUERY_DESC_IDN_MAX; i++)
7835 hba->desc_size[i] = QUERY_DESC_MAX_SIZE;
7837 /* Init UFS geometry descriptor related parameters */
7838 ret = ufshcd_device_geo_params_init(hba);
7842 /* Check and apply UFS device quirks */
7843 ret = ufs_get_device_desc(hba);
7845 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
7850 ufshcd_get_ref_clk_gating_wait(hba);
7852 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7853 QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
7854 hba->dev_info.f_power_on_wp_en = flag;
7856 /* Probe maximum power mode co-supported by both UFS host and device */
7857 if (ufshcd_get_max_pwr_mode(hba))
7859 "%s: Failed getting max supported power mode\n",
7866 * ufshcd_add_lus - probe and add UFS logical units
7867 * @hba: per-adapter instance
7869 static int ufshcd_add_lus(struct ufs_hba *hba)
7873 /* Add required well known logical units to scsi mid layer */
7874 ret = ufshcd_scsi_add_wlus(hba);
7878 ufshcd_clear_ua_wluns(hba);
7880 /* Initialize devfreq after UFS device is detected */
7881 if (ufshcd_is_clkscaling_supported(hba)) {
7882 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7884 sizeof(struct ufs_pa_layer_attr));
7885 hba->clk_scaling.saved_pwr_info.is_valid = true;
7886 hba->clk_scaling.is_allowed = true;
7888 ret = ufshcd_devfreq_init(hba);
7892 hba->clk_scaling.is_enabled = true;
7893 ufshcd_init_clk_scaling_sysfs(hba);
7898 scsi_scan_host(hba->host);
7899 pm_runtime_put_sync(hba->dev);
7905 static void ufshcd_request_sense_done(struct request *rq, blk_status_t error)
7907 if (error != BLK_STS_OK)
7908 pr_err("%s: REQUEST SENSE failed (%d)\n", __func__, error);
7909 kfree(rq->end_io_data);
7910 blk_mq_free_request(rq);
7914 ufshcd_request_sense_async(struct ufs_hba *hba, struct scsi_device *sdev)
7917 * Some UFS devices clear unit attention condition only if the sense
7918 * size used (UFS_SENSE_SIZE in this case) is non-zero.
7920 static const u8 cmd[6] = {REQUEST_SENSE, 0, 0, 0, UFS_SENSE_SIZE, 0};
7921 struct scsi_request *rq;
7922 struct request *req;
7926 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
7930 req = blk_mq_alloc_request(sdev->request_queue, REQ_OP_DRV_IN,
7931 /*flags=*/BLK_MQ_REQ_PM);
7937 ret = blk_rq_map_kern(sdev->request_queue, req,
7938 buffer, UFS_SENSE_SIZE, GFP_NOIO);
7943 rq->cmd_len = ARRAY_SIZE(cmd);
7944 memcpy(rq->cmd, cmd, rq->cmd_len);
7946 req->timeout = 1 * HZ;
7947 req->rq_flags |= RQF_PM | RQF_QUIET;
7948 req->end_io_data = buffer;
7950 blk_execute_rq_nowait(/*bd_disk=*/NULL, req, /*at_head=*/true,
7951 ufshcd_request_sense_done);
7955 blk_mq_free_request(req);
7961 static int ufshcd_clear_ua_wlun(struct ufs_hba *hba, u8 wlun)
7963 struct scsi_device *sdp;
7964 unsigned long flags;
7967 spin_lock_irqsave(hba->host->host_lock, flags);
7968 if (wlun == UFS_UPIU_UFS_DEVICE_WLUN)
7969 sdp = hba->sdev_ufs_device;
7970 else if (wlun == UFS_UPIU_RPMB_WLUN)
7971 sdp = hba->sdev_rpmb;
7975 ret = scsi_device_get(sdp);
7976 if (!ret && !scsi_device_online(sdp)) {
7978 scsi_device_put(sdp);
7983 spin_unlock_irqrestore(hba->host->host_lock, flags);
7987 ret = ufshcd_request_sense_async(hba, sdp);
7988 scsi_device_put(sdp);
7991 dev_err(hba->dev, "%s: UAC clear LU=%x ret = %d\n",
7992 __func__, wlun, ret);
7996 static int ufshcd_clear_ua_wluns(struct ufs_hba *hba)
8000 if (!hba->wlun_dev_clr_ua)
8003 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
8005 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
8007 hba->wlun_dev_clr_ua = false;
8010 dev_err(hba->dev, "%s: Failed to clear UAC WLUNS ret = %d\n",
8016 * ufshcd_probe_hba - probe hba to detect device and initialize it
8017 * @hba: per-adapter instance
8018 * @init_dev_params: whether or not to call ufshcd_device_params_init().
8020 * Execute link-startup and verify device initialization
8022 static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params)
8025 unsigned long flags;
8026 ktime_t start = ktime_get();
8028 hba->ufshcd_state = UFSHCD_STATE_RESET;
8030 ret = ufshcd_link_startup(hba);
8034 /* Debug counters initialization */
8035 ufshcd_clear_dbg_ufs_stats(hba);
8037 /* UniPro link is active now */
8038 ufshcd_set_link_active(hba);
8040 /* Verify device initialization by sending NOP OUT UPIU */
8041 ret = ufshcd_verify_dev_init(hba);
8045 /* Initiate UFS initialization, and waiting until completion */
8046 ret = ufshcd_complete_dev_init(hba);
8051 * Initialize UFS device parameters used by driver, these
8052 * parameters are associated with UFS descriptors.
8054 if (init_dev_params) {
8055 ret = ufshcd_device_params_init(hba);
8060 ufshcd_tune_unipro_params(hba);
8062 /* UFS device is also active now */
8063 ufshcd_set_ufs_dev_active(hba);
8064 ufshcd_force_reset_auto_bkops(hba);
8065 hba->wlun_dev_clr_ua = true;
8066 hba->wlun_rpmb_clr_ua = true;
8068 /* Gear up to HS gear if supported */
8069 if (hba->max_pwr_info.is_valid) {
8071 * Set the right value to bRefClkFreq before attempting to
8072 * switch to HS gears.
8074 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
8075 ufshcd_set_dev_ref_clk(hba);
8076 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
8078 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
8082 ufshcd_print_pwr_info(hba);
8086 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
8087 * and for removable UFS card as well, hence always set the parameter.
8088 * Note: Error handler may issue the device reset hence resetting
8089 * bActiveICCLevel as well so it is always safe to set this here.
8091 ufshcd_set_active_icc_lvl(hba);
8093 ufshcd_wb_config(hba);
8094 if (hba->ee_usr_mask)
8095 ufshcd_write_ee_control(hba);
8096 /* Enable Auto-Hibernate if configured */
8097 ufshcd_auto_hibern8_enable(hba);
8101 spin_lock_irqsave(hba->host->host_lock, flags);
8103 hba->ufshcd_state = UFSHCD_STATE_ERROR;
8104 else if (hba->ufshcd_state == UFSHCD_STATE_RESET)
8105 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
8106 spin_unlock_irqrestore(hba->host->host_lock, flags);
8108 trace_ufshcd_init(dev_name(hba->dev), ret,
8109 ktime_to_us(ktime_sub(ktime_get(), start)),
8110 hba->curr_dev_pwr_mode, hba->uic_link_state);
8115 * ufshcd_async_scan - asynchronous execution for probing hba
8116 * @data: data pointer to pass to this function
8117 * @cookie: cookie data
8119 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
8121 struct ufs_hba *hba = (struct ufs_hba *)data;
8124 down(&hba->host_sem);
8125 /* Initialize hba, detect and initialize UFS device */
8126 ret = ufshcd_probe_hba(hba, true);
8131 /* Probe and add UFS logical units */
8132 ret = ufshcd_add_lus(hba);
8135 * If we failed to initialize the device or the device is not
8136 * present, turn off the power/clocks etc.
8139 pm_runtime_put_sync(hba->dev);
8140 ufshcd_hba_exit(hba);
8144 static const struct attribute_group *ufshcd_driver_groups[] = {
8145 &ufs_sysfs_unit_descriptor_group,
8146 &ufs_sysfs_lun_attributes_group,
8147 #ifdef CONFIG_SCSI_UFS_HPB
8148 &ufs_sysfs_hpb_stat_group,
8149 &ufs_sysfs_hpb_param_group,
8154 static struct ufs_hba_variant_params ufs_hba_vps = {
8155 .hba_enable_delay_us = 1000,
8156 .wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(40),
8157 .devfreq_profile.polling_ms = 100,
8158 .devfreq_profile.target = ufshcd_devfreq_target,
8159 .devfreq_profile.get_dev_status = ufshcd_devfreq_get_dev_status,
8160 .ondemand_data.upthreshold = 70,
8161 .ondemand_data.downdifferential = 5,
8164 static struct scsi_host_template ufshcd_driver_template = {
8165 .module = THIS_MODULE,
8167 .proc_name = UFSHCD,
8168 .queuecommand = ufshcd_queuecommand,
8169 .slave_alloc = ufshcd_slave_alloc,
8170 .slave_configure = ufshcd_slave_configure,
8171 .slave_destroy = ufshcd_slave_destroy,
8172 .change_queue_depth = ufshcd_change_queue_depth,
8173 .eh_abort_handler = ufshcd_abort,
8174 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
8175 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
8177 .sg_tablesize = SG_ALL,
8178 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
8179 .can_queue = UFSHCD_CAN_QUEUE,
8180 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
8181 .max_host_blocked = 1,
8182 .track_queue_depth = 1,
8183 .sdev_groups = ufshcd_driver_groups,
8184 .dma_boundary = PAGE_SIZE - 1,
8185 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
8188 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
8197 * "set_load" operation shall be required on those regulators
8198 * which specifically configured current limitation. Otherwise
8199 * zero max_uA may cause unexpected behavior when regulator is
8200 * enabled or set as high power mode.
8205 ret = regulator_set_load(vreg->reg, ua);
8207 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
8208 __func__, vreg->name, ua, ret);
8214 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
8215 struct ufs_vreg *vreg)
8217 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
8220 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
8221 struct ufs_vreg *vreg)
8226 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
8229 static int ufshcd_config_vreg(struct device *dev,
8230 struct ufs_vreg *vreg, bool on)
8233 struct regulator *reg;
8235 int min_uV, uA_load;
8242 if (regulator_count_voltages(reg) > 0) {
8243 uA_load = on ? vreg->max_uA : 0;
8244 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
8248 if (vreg->min_uV && vreg->max_uV) {
8249 min_uV = on ? vreg->min_uV : 0;
8250 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
8253 "%s: %s set voltage failed, err=%d\n",
8254 __func__, name, ret);
8261 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
8265 if (!vreg || vreg->enabled)
8268 ret = ufshcd_config_vreg(dev, vreg, true);
8270 ret = regulator_enable(vreg->reg);
8273 vreg->enabled = true;
8275 dev_err(dev, "%s: %s enable failed, err=%d\n",
8276 __func__, vreg->name, ret);
8281 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
8285 if (!vreg || !vreg->enabled || vreg->always_on)
8288 ret = regulator_disable(vreg->reg);
8291 /* ignore errors on applying disable config */
8292 ufshcd_config_vreg(dev, vreg, false);
8293 vreg->enabled = false;
8295 dev_err(dev, "%s: %s disable failed, err=%d\n",
8296 __func__, vreg->name, ret);
8302 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
8305 struct device *dev = hba->dev;
8306 struct ufs_vreg_info *info = &hba->vreg_info;
8308 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
8312 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
8316 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
8320 ufshcd_toggle_vreg(dev, info->vccq2, false);
8321 ufshcd_toggle_vreg(dev, info->vccq, false);
8322 ufshcd_toggle_vreg(dev, info->vcc, false);
8327 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
8329 struct ufs_vreg_info *info = &hba->vreg_info;
8331 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
8334 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
8341 vreg->reg = devm_regulator_get(dev, vreg->name);
8342 if (IS_ERR(vreg->reg)) {
8343 ret = PTR_ERR(vreg->reg);
8344 dev_err(dev, "%s: %s get failed, err=%d\n",
8345 __func__, vreg->name, ret);
8351 static int ufshcd_init_vreg(struct ufs_hba *hba)
8354 struct device *dev = hba->dev;
8355 struct ufs_vreg_info *info = &hba->vreg_info;
8357 ret = ufshcd_get_vreg(dev, info->vcc);
8361 ret = ufshcd_get_vreg(dev, info->vccq);
8363 ret = ufshcd_get_vreg(dev, info->vccq2);
8368 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
8370 struct ufs_vreg_info *info = &hba->vreg_info;
8373 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
8378 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
8381 struct ufs_clk_info *clki;
8382 struct list_head *head = &hba->clk_list_head;
8383 unsigned long flags;
8384 ktime_t start = ktime_get();
8385 bool clk_state_changed = false;
8387 if (list_empty(head))
8390 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
8394 list_for_each_entry(clki, head, list) {
8395 if (!IS_ERR_OR_NULL(clki->clk)) {
8397 * Don't disable clocks which are needed
8398 * to keep the link active.
8400 if (ufshcd_is_link_active(hba) &&
8401 clki->keep_link_active)
8404 clk_state_changed = on ^ clki->enabled;
8405 if (on && !clki->enabled) {
8406 ret = clk_prepare_enable(clki->clk);
8408 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
8409 __func__, clki->name, ret);
8412 } else if (!on && clki->enabled) {
8413 clk_disable_unprepare(clki->clk);
8416 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
8417 clki->name, on ? "en" : "dis");
8421 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
8427 list_for_each_entry(clki, head, list) {
8428 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
8429 clk_disable_unprepare(clki->clk);
8431 } else if (!ret && on) {
8432 spin_lock_irqsave(hba->host->host_lock, flags);
8433 hba->clk_gating.state = CLKS_ON;
8434 trace_ufshcd_clk_gating(dev_name(hba->dev),
8435 hba->clk_gating.state);
8436 spin_unlock_irqrestore(hba->host->host_lock, flags);
8439 if (clk_state_changed)
8440 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
8441 (on ? "on" : "off"),
8442 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
8446 static int ufshcd_init_clocks(struct ufs_hba *hba)
8449 struct ufs_clk_info *clki;
8450 struct device *dev = hba->dev;
8451 struct list_head *head = &hba->clk_list_head;
8453 if (list_empty(head))
8456 list_for_each_entry(clki, head, list) {
8460 clki->clk = devm_clk_get(dev, clki->name);
8461 if (IS_ERR(clki->clk)) {
8462 ret = PTR_ERR(clki->clk);
8463 dev_err(dev, "%s: %s clk get failed, %d\n",
8464 __func__, clki->name, ret);
8469 * Parse device ref clk freq as per device tree "ref_clk".
8470 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
8471 * in ufshcd_alloc_host().
8473 if (!strcmp(clki->name, "ref_clk"))
8474 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
8476 if (clki->max_freq) {
8477 ret = clk_set_rate(clki->clk, clki->max_freq);
8479 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
8480 __func__, clki->name,
8481 clki->max_freq, ret);
8484 clki->curr_freq = clki->max_freq;
8486 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
8487 clki->name, clk_get_rate(clki->clk));
8493 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
8500 err = ufshcd_vops_init(hba);
8502 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
8503 __func__, ufshcd_get_var_name(hba), err);
8508 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
8513 ufshcd_vops_exit(hba);
8516 static int ufshcd_hba_init(struct ufs_hba *hba)
8521 * Handle host controller power separately from the UFS device power
8522 * rails as it will help controlling the UFS host controller power
8523 * collapse easily which is different than UFS device power collapse.
8524 * Also, enable the host controller power before we go ahead with rest
8525 * of the initialization here.
8527 err = ufshcd_init_hba_vreg(hba);
8531 err = ufshcd_setup_hba_vreg(hba, true);
8535 err = ufshcd_init_clocks(hba);
8537 goto out_disable_hba_vreg;
8539 err = ufshcd_setup_clocks(hba, true);
8541 goto out_disable_hba_vreg;
8543 err = ufshcd_init_vreg(hba);
8545 goto out_disable_clks;
8547 err = ufshcd_setup_vreg(hba, true);
8549 goto out_disable_clks;
8551 err = ufshcd_variant_hba_init(hba);
8553 goto out_disable_vreg;
8555 ufs_debugfs_hba_init(hba);
8557 hba->is_powered = true;
8561 ufshcd_setup_vreg(hba, false);
8563 ufshcd_setup_clocks(hba, false);
8564 out_disable_hba_vreg:
8565 ufshcd_setup_hba_vreg(hba, false);
8570 static void ufshcd_hba_exit(struct ufs_hba *hba)
8572 if (hba->is_powered) {
8573 ufshcd_exit_clk_scaling(hba);
8574 ufshcd_exit_clk_gating(hba);
8576 destroy_workqueue(hba->eh_wq);
8577 ufs_debugfs_hba_exit(hba);
8578 ufshcd_variant_hba_exit(hba);
8579 ufshcd_setup_vreg(hba, false);
8580 ufshcd_setup_clocks(hba, false);
8581 ufshcd_setup_hba_vreg(hba, false);
8582 hba->is_powered = false;
8583 ufs_put_device_desc(hba);
8588 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
8590 * @hba: per adapter instance
8591 * @pwr_mode: device power mode to set
8593 * Returns 0 if requested power mode is set successfully
8594 * Returns non-zero if failed to set the requested power mode
8596 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
8597 enum ufs_dev_pwr_mode pwr_mode)
8599 unsigned char cmd[6] = { START_STOP };
8600 struct scsi_sense_hdr sshdr;
8601 struct scsi_device *sdp;
8602 unsigned long flags;
8605 spin_lock_irqsave(hba->host->host_lock, flags);
8606 sdp = hba->sdev_ufs_device;
8608 ret = scsi_device_get(sdp);
8609 if (!ret && !scsi_device_online(sdp)) {
8611 scsi_device_put(sdp);
8616 spin_unlock_irqrestore(hba->host->host_lock, flags);
8622 * If scsi commands fail, the scsi mid-layer schedules scsi error-
8623 * handling, which would wait for host to be resumed. Since we know
8624 * we are functional while we are here, skip host resume in error
8627 hba->host->eh_noresume = 1;
8628 if (hba->wlun_dev_clr_ua)
8629 ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
8631 cmd[4] = pwr_mode << 4;
8634 * Current function would be generally called from the power management
8635 * callbacks hence set the RQF_PM flag so that it doesn't resume the
8636 * already suspended childs.
8638 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
8639 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
8641 sdev_printk(KERN_WARNING, sdp,
8642 "START_STOP failed for power mode: %d, result %x\n",
8644 if (ret > 0 && scsi_sense_valid(&sshdr))
8645 scsi_print_sense_hdr(sdp, NULL, &sshdr);
8649 hba->curr_dev_pwr_mode = pwr_mode;
8651 scsi_device_put(sdp);
8652 hba->host->eh_noresume = 0;
8656 static int ufshcd_link_state_transition(struct ufs_hba *hba,
8657 enum uic_link_state req_link_state,
8658 int check_for_bkops)
8662 if (req_link_state == hba->uic_link_state)
8665 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
8666 ret = ufshcd_uic_hibern8_enter(hba);
8668 ufshcd_set_link_hibern8(hba);
8670 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8676 * If autobkops is enabled, link can't be turned off because
8677 * turning off the link would also turn off the device, except in the
8678 * case of DeepSleep where the device is expected to remain powered.
8680 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
8681 (!check_for_bkops || !hba->auto_bkops_enabled)) {
8683 * Let's make sure that link is in low power mode, we are doing
8684 * this currently by putting the link in Hibern8. Otherway to
8685 * put the link in low power mode is to send the DME end point
8686 * to device and then send the DME reset command to local
8687 * unipro. But putting the link in hibern8 is much faster.
8689 * Note also that putting the link in Hibern8 is a requirement
8690 * for entering DeepSleep.
8692 ret = ufshcd_uic_hibern8_enter(hba);
8694 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8699 * Change controller state to "reset state" which
8700 * should also put the link in off/reset state
8702 ufshcd_hba_stop(hba);
8704 * TODO: Check if we need any delay to make sure that
8705 * controller is reset
8707 ufshcd_set_link_off(hba);
8714 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
8716 bool vcc_off = false;
8719 * It seems some UFS devices may keep drawing more than sleep current
8720 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
8721 * To avoid this situation, add 2ms delay before putting these UFS
8722 * rails in LPM mode.
8724 if (!ufshcd_is_link_active(hba) &&
8725 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
8726 usleep_range(2000, 2100);
8729 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
8732 * If UFS device and link is in OFF state, all power supplies (VCC,
8733 * VCCQ, VCCQ2) can be turned off if power on write protect is not
8734 * required. If UFS link is inactive (Hibern8 or OFF state) and device
8735 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
8737 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
8738 * in low power state which would save some power.
8740 * If Write Booster is enabled and the device needs to flush the WB
8741 * buffer OR if bkops status is urgent for WB, keep Vcc on.
8743 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8744 !hba->dev_info.is_lu_power_on_wp) {
8745 ufshcd_setup_vreg(hba, false);
8747 } else if (!ufshcd_is_ufs_dev_active(hba)) {
8748 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8750 if (ufshcd_is_link_hibern8(hba) || ufshcd_is_link_off(hba)) {
8751 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8752 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
8757 * Some UFS devices require delay after VCC power rail is turned-off.
8759 if (vcc_off && hba->vreg_info.vcc &&
8760 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)
8761 usleep_range(5000, 5100);
8765 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
8769 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8770 !hba->dev_info.is_lu_power_on_wp) {
8771 ret = ufshcd_setup_vreg(hba, true);
8772 } else if (!ufshcd_is_ufs_dev_active(hba)) {
8773 if (!ufshcd_is_link_active(hba)) {
8774 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
8777 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
8781 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
8786 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8788 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8792 #endif /* CONFIG_PM */
8794 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
8796 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
8797 ufshcd_setup_hba_vreg(hba, false);
8800 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
8802 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
8803 ufshcd_setup_hba_vreg(hba, true);
8806 static int __ufshcd_wl_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8809 int check_for_bkops;
8810 enum ufs_pm_level pm_lvl;
8811 enum ufs_dev_pwr_mode req_dev_pwr_mode;
8812 enum uic_link_state req_link_state;
8814 hba->pm_op_in_progress = true;
8815 if (pm_op != UFS_SHUTDOWN_PM) {
8816 pm_lvl = pm_op == UFS_RUNTIME_PM ?
8817 hba->rpm_lvl : hba->spm_lvl;
8818 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8819 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8821 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8822 req_link_state = UIC_LINK_OFF_STATE;
8825 ufshpb_suspend(hba);
8828 * If we can't transition into any of the low power modes
8829 * just gate the clocks.
8831 ufshcd_hold(hba, false);
8832 hba->clk_gating.is_suspended = true;
8834 if (ufshcd_is_clkscaling_supported(hba))
8835 ufshcd_clk_scaling_suspend(hba, true);
8837 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8838 req_link_state == UIC_LINK_ACTIVE_STATE) {
8842 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8843 (req_link_state == hba->uic_link_state))
8844 goto enable_scaling;
8846 /* UFS device & link must be active before we enter in this function */
8847 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8849 goto enable_scaling;
8852 if (pm_op == UFS_RUNTIME_PM) {
8853 if (ufshcd_can_autobkops_during_suspend(hba)) {
8855 * The device is idle with no requests in the queue,
8856 * allow background operations if bkops status shows
8857 * that performance might be impacted.
8859 ret = ufshcd_urgent_bkops(hba);
8861 goto enable_scaling;
8863 /* make sure that auto bkops is disabled */
8864 ufshcd_disable_auto_bkops(hba);
8867 * If device needs to do BKOP or WB buffer flush during
8868 * Hibern8, keep device power mode as "active power mode"
8871 hba->dev_info.b_rpm_dev_flush_capable =
8872 hba->auto_bkops_enabled ||
8873 (((req_link_state == UIC_LINK_HIBERN8_STATE) ||
8874 ((req_link_state == UIC_LINK_ACTIVE_STATE) &&
8875 ufshcd_is_auto_hibern8_enabled(hba))) &&
8876 ufshcd_wb_need_flush(hba));
8879 flush_work(&hba->eeh_work);
8881 if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
8882 if (pm_op != UFS_RUNTIME_PM)
8883 /* ensure that bkops is disabled */
8884 ufshcd_disable_auto_bkops(hba);
8886 if (!hba->dev_info.b_rpm_dev_flush_capable) {
8887 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8889 goto enable_scaling;
8894 * In the case of DeepSleep, the device is expected to remain powered
8895 * with the link off, so do not check for bkops.
8897 check_for_bkops = !ufshcd_is_ufs_dev_deepsleep(hba);
8898 ret = ufshcd_link_state_transition(hba, req_link_state, check_for_bkops);
8900 goto set_dev_active;
8904 * Call vendor specific suspend callback. As these callbacks may access
8905 * vendor specific host controller register space call them before the
8906 * host clocks are ON.
8908 ret = ufshcd_vops_suspend(hba, pm_op);
8910 goto set_link_active;
8915 * Device hardware reset is required to exit DeepSleep. Also, for
8916 * DeepSleep, the link is off so host reset and restore will be done
8919 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
8920 ufshcd_device_reset(hba);
8921 WARN_ON(!ufshcd_is_link_off(hba));
8923 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
8924 ufshcd_set_link_active(hba);
8925 else if (ufshcd_is_link_off(hba))
8926 ufshcd_host_reset_and_restore(hba);
8928 /* Can also get here needing to exit DeepSleep */
8929 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
8930 ufshcd_device_reset(hba);
8931 ufshcd_host_reset_and_restore(hba);
8933 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8934 ufshcd_disable_auto_bkops(hba);
8936 if (ufshcd_is_clkscaling_supported(hba))
8937 ufshcd_clk_scaling_suspend(hba, false);
8939 hba->dev_info.b_rpm_dev_flush_capable = false;
8941 if (hba->dev_info.b_rpm_dev_flush_capable) {
8942 schedule_delayed_work(&hba->rpm_dev_flush_recheck_work,
8943 msecs_to_jiffies(RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS));
8947 ufshcd_update_evt_hist(hba, UFS_EVT_WL_SUSP_ERR, (u32)ret);
8948 hba->clk_gating.is_suspended = false;
8949 ufshcd_release(hba);
8952 hba->pm_op_in_progress = false;
8957 static int __ufshcd_wl_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8960 enum uic_link_state old_link_state = hba->uic_link_state;
8962 hba->pm_op_in_progress = true;
8965 * Call vendor specific resume callback. As these callbacks may access
8966 * vendor specific host controller register space call them when the
8967 * host clocks are ON.
8969 ret = ufshcd_vops_resume(hba, pm_op);
8973 /* For DeepSleep, the only supported option is to have the link off */
8974 WARN_ON(ufshcd_is_ufs_dev_deepsleep(hba) && !ufshcd_is_link_off(hba));
8976 if (ufshcd_is_link_hibern8(hba)) {
8977 ret = ufshcd_uic_hibern8_exit(hba);
8979 ufshcd_set_link_active(hba);
8981 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
8983 goto vendor_suspend;
8985 } else if (ufshcd_is_link_off(hba)) {
8987 * A full initialization of the host and the device is
8988 * required since the link was put to off during suspend.
8989 * Note, in the case of DeepSleep, the device will exit
8990 * DeepSleep due to device reset.
8992 ret = ufshcd_reset_and_restore(hba);
8994 * ufshcd_reset_and_restore() should have already
8995 * set the link state as active
8997 if (ret || !ufshcd_is_link_active(hba))
8998 goto vendor_suspend;
9001 if (!ufshcd_is_ufs_dev_active(hba)) {
9002 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
9004 goto set_old_link_state;
9007 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
9008 ufshcd_enable_auto_bkops(hba);
9011 * If BKOPs operations are urgently needed at this moment then
9012 * keep auto-bkops enabled or else disable it.
9014 ufshcd_urgent_bkops(hba);
9016 if (hba->ee_usr_mask)
9017 ufshcd_write_ee_control(hba);
9019 if (ufshcd_is_clkscaling_supported(hba))
9020 ufshcd_clk_scaling_suspend(hba, false);
9022 if (hba->dev_info.b_rpm_dev_flush_capable) {
9023 hba->dev_info.b_rpm_dev_flush_capable = false;
9024 cancel_delayed_work(&hba->rpm_dev_flush_recheck_work);
9027 /* Enable Auto-Hibernate if configured */
9028 ufshcd_auto_hibern8_enable(hba);
9034 ufshcd_link_state_transition(hba, old_link_state, 0);
9036 ufshcd_vops_suspend(hba, pm_op);
9039 ufshcd_update_evt_hist(hba, UFS_EVT_WL_RES_ERR, (u32)ret);
9040 hba->clk_gating.is_suspended = false;
9041 ufshcd_release(hba);
9042 hba->pm_op_in_progress = false;
9046 static int ufshcd_wl_runtime_suspend(struct device *dev)
9048 struct scsi_device *sdev = to_scsi_device(dev);
9049 struct ufs_hba *hba;
9051 ktime_t start = ktime_get();
9053 hba = shost_priv(sdev->host);
9055 ret = __ufshcd_wl_suspend(hba, UFS_RUNTIME_PM);
9057 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9059 trace_ufshcd_wl_runtime_suspend(dev_name(dev), ret,
9060 ktime_to_us(ktime_sub(ktime_get(), start)),
9061 hba->curr_dev_pwr_mode, hba->uic_link_state);
9066 static int ufshcd_wl_runtime_resume(struct device *dev)
9068 struct scsi_device *sdev = to_scsi_device(dev);
9069 struct ufs_hba *hba;
9071 ktime_t start = ktime_get();
9073 hba = shost_priv(sdev->host);
9075 ret = __ufshcd_wl_resume(hba, UFS_RUNTIME_PM);
9077 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9079 trace_ufshcd_wl_runtime_resume(dev_name(dev), ret,
9080 ktime_to_us(ktime_sub(ktime_get(), start)),
9081 hba->curr_dev_pwr_mode, hba->uic_link_state);
9087 #ifdef CONFIG_PM_SLEEP
9088 static int ufshcd_wl_suspend(struct device *dev)
9090 struct scsi_device *sdev = to_scsi_device(dev);
9091 struct ufs_hba *hba;
9093 ktime_t start = ktime_get();
9095 hba = shost_priv(sdev->host);
9096 down(&hba->host_sem);
9098 if (pm_runtime_suspended(dev))
9101 ret = __ufshcd_wl_suspend(hba, UFS_SYSTEM_PM);
9103 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9109 hba->is_sys_suspended = true;
9110 trace_ufshcd_wl_suspend(dev_name(dev), ret,
9111 ktime_to_us(ktime_sub(ktime_get(), start)),
9112 hba->curr_dev_pwr_mode, hba->uic_link_state);
9117 static int ufshcd_wl_resume(struct device *dev)
9119 struct scsi_device *sdev = to_scsi_device(dev);
9120 struct ufs_hba *hba;
9122 ktime_t start = ktime_get();
9124 hba = shost_priv(sdev->host);
9126 if (pm_runtime_suspended(dev))
9129 ret = __ufshcd_wl_resume(hba, UFS_SYSTEM_PM);
9131 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9133 trace_ufshcd_wl_resume(dev_name(dev), ret,
9134 ktime_to_us(ktime_sub(ktime_get(), start)),
9135 hba->curr_dev_pwr_mode, hba->uic_link_state);
9137 hba->is_sys_suspended = false;
9143 static void ufshcd_wl_shutdown(struct device *dev)
9145 struct scsi_device *sdev = to_scsi_device(dev);
9146 struct ufs_hba *hba;
9148 hba = shost_priv(sdev->host);
9150 down(&hba->host_sem);
9151 hba->shutting_down = true;
9154 /* Turn on everything while shutting down */
9155 ufshcd_rpm_get_sync(hba);
9156 scsi_device_quiesce(sdev);
9157 shost_for_each_device(sdev, hba->host) {
9158 if (sdev == hba->sdev_ufs_device)
9160 scsi_device_quiesce(sdev);
9162 __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9166 * ufshcd_suspend - helper function for suspend operations
9167 * @hba: per adapter instance
9169 * This function will put disable irqs, turn off clocks
9170 * and set vreg and hba-vreg in lpm mode.
9172 static int ufshcd_suspend(struct ufs_hba *hba)
9176 if (!hba->is_powered)
9179 * Disable the host irq as host controller as there won't be any
9180 * host controller transaction expected till resume.
9182 ufshcd_disable_irq(hba);
9183 ret = ufshcd_setup_clocks(hba, false);
9185 ufshcd_enable_irq(hba);
9188 if (ufshcd_is_clkgating_allowed(hba)) {
9189 hba->clk_gating.state = CLKS_OFF;
9190 trace_ufshcd_clk_gating(dev_name(hba->dev),
9191 hba->clk_gating.state);
9194 ufshcd_vreg_set_lpm(hba);
9195 /* Put the host controller in low power mode if possible */
9196 ufshcd_hba_vreg_set_lpm(hba);
9202 * ufshcd_resume - helper function for resume operations
9203 * @hba: per adapter instance
9205 * This function basically turns on the regulators, clocks and
9208 * Returns 0 for success and non-zero for failure
9210 static int ufshcd_resume(struct ufs_hba *hba)
9214 if (!hba->is_powered)
9217 ufshcd_hba_vreg_set_hpm(hba);
9218 ret = ufshcd_vreg_set_hpm(hba);
9222 /* Make sure clocks are enabled before accessing controller */
9223 ret = ufshcd_setup_clocks(hba, true);
9227 /* enable the host irq as host controller would be active soon */
9228 ufshcd_enable_irq(hba);
9232 ufshcd_vreg_set_lpm(hba);
9235 ufshcd_update_evt_hist(hba, UFS_EVT_RESUME_ERR, (u32)ret);
9238 #endif /* CONFIG_PM */
9240 #ifdef CONFIG_PM_SLEEP
9242 * ufshcd_system_suspend - system suspend callback
9243 * @dev: Device associated with the UFS controller.
9245 * Executed before putting the system into a sleep state in which the contents
9246 * of main memory are preserved.
9248 * Returns 0 for success and non-zero for failure
9250 int ufshcd_system_suspend(struct device *dev)
9252 struct ufs_hba *hba = dev_get_drvdata(dev);
9254 ktime_t start = ktime_get();
9256 if (pm_runtime_suspended(hba->dev))
9259 ret = ufshcd_suspend(hba);
9261 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
9262 ktime_to_us(ktime_sub(ktime_get(), start)),
9263 hba->curr_dev_pwr_mode, hba->uic_link_state);
9266 EXPORT_SYMBOL(ufshcd_system_suspend);
9269 * ufshcd_system_resume - system resume callback
9270 * @dev: Device associated with the UFS controller.
9272 * Executed after waking the system up from a sleep state in which the contents
9273 * of main memory were preserved.
9275 * Returns 0 for success and non-zero for failure
9277 int ufshcd_system_resume(struct device *dev)
9279 struct ufs_hba *hba = dev_get_drvdata(dev);
9280 ktime_t start = ktime_get();
9283 if (pm_runtime_suspended(hba->dev))
9286 ret = ufshcd_resume(hba);
9289 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
9290 ktime_to_us(ktime_sub(ktime_get(), start)),
9291 hba->curr_dev_pwr_mode, hba->uic_link_state);
9295 EXPORT_SYMBOL(ufshcd_system_resume);
9296 #endif /* CONFIG_PM_SLEEP */
9300 * ufshcd_runtime_suspend - runtime suspend callback
9301 * @dev: Device associated with the UFS controller.
9303 * Check the description of ufshcd_suspend() function for more details.
9305 * Returns 0 for success and non-zero for failure
9307 int ufshcd_runtime_suspend(struct device *dev)
9309 struct ufs_hba *hba = dev_get_drvdata(dev);
9311 ktime_t start = ktime_get();
9313 ret = ufshcd_suspend(hba);
9315 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
9316 ktime_to_us(ktime_sub(ktime_get(), start)),
9317 hba->curr_dev_pwr_mode, hba->uic_link_state);
9320 EXPORT_SYMBOL(ufshcd_runtime_suspend);
9323 * ufshcd_runtime_resume - runtime resume routine
9324 * @dev: Device associated with the UFS controller.
9326 * This function basically brings controller
9327 * to active state. Following operations are done in this function:
9329 * 1. Turn on all the controller related clocks
9330 * 2. Turn ON VCC rail
9332 int ufshcd_runtime_resume(struct device *dev)
9334 struct ufs_hba *hba = dev_get_drvdata(dev);
9336 ktime_t start = ktime_get();
9338 ret = ufshcd_resume(hba);
9340 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
9341 ktime_to_us(ktime_sub(ktime_get(), start)),
9342 hba->curr_dev_pwr_mode, hba->uic_link_state);
9345 EXPORT_SYMBOL(ufshcd_runtime_resume);
9346 #endif /* CONFIG_PM */
9349 * ufshcd_shutdown - shutdown routine
9350 * @hba: per adapter instance
9352 * This function would turn off both UFS device and UFS hba
9353 * regulators. It would also disable clocks.
9355 * Returns 0 always to allow force shutdown even in case of errors.
9357 int ufshcd_shutdown(struct ufs_hba *hba)
9359 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
9362 pm_runtime_get_sync(hba->dev);
9364 ufshcd_suspend(hba);
9366 hba->is_powered = false;
9367 /* allow force shutdown even in case of errors */
9370 EXPORT_SYMBOL(ufshcd_shutdown);
9373 * ufshcd_remove - de-allocate SCSI host and host memory space
9374 * data structure memory
9375 * @hba: per adapter instance
9377 void ufshcd_remove(struct ufs_hba *hba)
9379 if (hba->sdev_ufs_device)
9380 ufshcd_rpm_get_sync(hba);
9381 ufs_bsg_remove(hba);
9383 ufs_sysfs_remove_nodes(hba->dev);
9384 blk_cleanup_queue(hba->tmf_queue);
9385 blk_mq_free_tag_set(&hba->tmf_tag_set);
9386 blk_cleanup_queue(hba->cmd_queue);
9387 scsi_remove_host(hba->host);
9388 /* disable interrupts */
9389 ufshcd_disable_intr(hba, hba->intr_mask);
9390 ufshcd_hba_stop(hba);
9391 ufshcd_hba_exit(hba);
9393 EXPORT_SYMBOL_GPL(ufshcd_remove);
9396 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
9397 * @hba: pointer to Host Bus Adapter (HBA)
9399 void ufshcd_dealloc_host(struct ufs_hba *hba)
9401 scsi_host_put(hba->host);
9403 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
9406 * ufshcd_set_dma_mask - Set dma mask based on the controller
9407 * addressing capability
9408 * @hba: per adapter instance
9410 * Returns 0 for success, non-zero for failure
9412 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
9414 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
9415 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
9418 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
9422 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
9423 * @dev: pointer to device handle
9424 * @hba_handle: driver private handle
9425 * Returns 0 on success, non-zero value on failure
9427 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
9429 struct Scsi_Host *host;
9430 struct ufs_hba *hba;
9435 "Invalid memory reference for dev is NULL\n");
9440 host = scsi_host_alloc(&ufshcd_driver_template,
9441 sizeof(struct ufs_hba));
9443 dev_err(dev, "scsi_host_alloc failed\n");
9447 hba = shost_priv(host);
9450 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
9451 hba->nop_out_timeout = NOP_OUT_TIMEOUT;
9452 INIT_LIST_HEAD(&hba->clk_list_head);
9453 spin_lock_init(&hba->outstanding_lock);
9460 EXPORT_SYMBOL(ufshcd_alloc_host);
9462 /* This function exists because blk_mq_alloc_tag_set() requires this. */
9463 static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
9464 const struct blk_mq_queue_data *qd)
9467 return BLK_STS_NOTSUPP;
9470 static const struct blk_mq_ops ufshcd_tmf_ops = {
9471 .queue_rq = ufshcd_queue_tmf,
9475 * ufshcd_init - Driver initialization routine
9476 * @hba: per-adapter instance
9477 * @mmio_base: base register address
9478 * @irq: Interrupt line of device
9479 * Returns 0 on success, non-zero value on failure
9481 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
9484 struct Scsi_Host *host = hba->host;
9485 struct device *dev = hba->dev;
9486 char eh_wq_name[sizeof("ufs_eh_wq_00")];
9490 "Invalid memory reference for mmio_base is NULL\n");
9495 hba->mmio_base = mmio_base;
9497 hba->vps = &ufs_hba_vps;
9499 err = ufshcd_hba_init(hba);
9503 /* Read capabilities registers */
9504 err = ufshcd_hba_capabilities(hba);
9508 /* Get UFS version supported by the controller */
9509 hba->ufs_version = ufshcd_get_ufs_version(hba);
9511 /* Get Interrupt bit mask per version */
9512 hba->intr_mask = ufshcd_get_intr_mask(hba);
9514 err = ufshcd_set_dma_mask(hba);
9516 dev_err(hba->dev, "set dma mask failed\n");
9520 /* Allocate memory for host memory space */
9521 err = ufshcd_memory_alloc(hba);
9523 dev_err(hba->dev, "Memory allocation failed\n");
9528 ufshcd_host_memory_configure(hba);
9530 host->can_queue = hba->nutrs;
9531 host->cmd_per_lun = hba->nutrs;
9532 host->max_id = UFSHCD_MAX_ID;
9533 host->max_lun = UFS_MAX_LUNS;
9534 host->max_channel = UFSHCD_MAX_CHANNEL;
9535 host->unique_id = host->host_no;
9536 host->max_cmd_len = UFS_CDB_SIZE;
9538 hba->max_pwr_info.is_valid = false;
9540 /* Initialize work queues */
9541 snprintf(eh_wq_name, sizeof(eh_wq_name), "ufs_eh_wq_%d",
9542 hba->host->host_no);
9543 hba->eh_wq = create_singlethread_workqueue(eh_wq_name);
9545 dev_err(hba->dev, "%s: failed to create eh workqueue\n",
9550 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
9551 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
9553 sema_init(&hba->host_sem, 1);
9555 /* Initialize UIC command mutex */
9556 mutex_init(&hba->uic_cmd_mutex);
9558 /* Initialize mutex for device management commands */
9559 mutex_init(&hba->dev_cmd.lock);
9561 /* Initialize mutex for exception event control */
9562 mutex_init(&hba->ee_ctrl_mutex);
9564 init_rwsem(&hba->clk_scaling_lock);
9566 ufshcd_init_clk_gating(hba);
9568 ufshcd_init_clk_scaling(hba);
9571 * In order to avoid any spurious interrupt immediately after
9572 * registering UFS controller interrupt handler, clear any pending UFS
9573 * interrupt status and disable all the UFS interrupts.
9575 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
9576 REG_INTERRUPT_STATUS);
9577 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
9579 * Make sure that UFS interrupts are disabled and any pending interrupt
9580 * status is cleared before registering UFS interrupt handler.
9584 /* IRQ registration */
9585 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
9587 dev_err(hba->dev, "request irq failed\n");
9590 hba->is_irq_enabled = true;
9593 err = scsi_add_host(host, hba->dev);
9595 dev_err(hba->dev, "scsi_add_host failed\n");
9599 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
9600 if (IS_ERR(hba->cmd_queue)) {
9601 err = PTR_ERR(hba->cmd_queue);
9602 goto out_remove_scsi_host;
9605 hba->tmf_tag_set = (struct blk_mq_tag_set) {
9607 .queue_depth = hba->nutmrs,
9608 .ops = &ufshcd_tmf_ops,
9609 .flags = BLK_MQ_F_NO_SCHED,
9611 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
9613 goto free_cmd_queue;
9614 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
9615 if (IS_ERR(hba->tmf_queue)) {
9616 err = PTR_ERR(hba->tmf_queue);
9617 goto free_tmf_tag_set;
9619 hba->tmf_rqs = devm_kcalloc(hba->dev, hba->nutmrs,
9620 sizeof(*hba->tmf_rqs), GFP_KERNEL);
9621 if (!hba->tmf_rqs) {
9623 goto free_tmf_queue;
9626 /* Reset the attached device */
9627 ufshcd_device_reset(hba);
9629 ufshcd_init_crypto(hba);
9631 /* Host controller enable */
9632 err = ufshcd_hba_enable(hba);
9634 dev_err(hba->dev, "Host controller enable failed\n");
9635 ufshcd_print_evt_hist(hba);
9636 ufshcd_print_host_state(hba);
9637 goto free_tmf_queue;
9641 * Set the default power management level for runtime and system PM.
9642 * Default power saving mode is to keep UFS link in Hibern8 state
9643 * and UFS device in sleep state.
9645 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9647 UIC_LINK_HIBERN8_STATE);
9648 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9650 UIC_LINK_HIBERN8_STATE);
9652 INIT_DELAYED_WORK(&hba->rpm_dev_flush_recheck_work,
9653 ufshcd_rpm_dev_flush_recheck_work);
9655 /* Set the default auto-hiberate idle timer value to 150 ms */
9656 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
9657 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
9658 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
9661 /* Hold auto suspend until async scan completes */
9662 pm_runtime_get_sync(dev);
9663 atomic_set(&hba->scsi_block_reqs_cnt, 0);
9665 * We are assuming that device wasn't put in sleep/power-down
9666 * state exclusively during the boot stage before kernel.
9667 * This assumption helps avoid doing link startup twice during
9668 * ufshcd_probe_hba().
9670 ufshcd_set_ufs_dev_active(hba);
9672 async_schedule(ufshcd_async_scan, hba);
9673 ufs_sysfs_add_nodes(hba->dev);
9675 device_enable_async_suspend(dev);
9679 blk_cleanup_queue(hba->tmf_queue);
9681 blk_mq_free_tag_set(&hba->tmf_tag_set);
9683 blk_cleanup_queue(hba->cmd_queue);
9684 out_remove_scsi_host:
9685 scsi_remove_host(hba->host);
9687 hba->is_irq_enabled = false;
9688 ufshcd_hba_exit(hba);
9692 EXPORT_SYMBOL_GPL(ufshcd_init);
9694 void ufshcd_resume_complete(struct device *dev)
9696 struct ufs_hba *hba = dev_get_drvdata(dev);
9698 if (hba->complete_put) {
9699 ufshcd_rpm_put(hba);
9700 hba->complete_put = false;
9702 if (hba->rpmb_complete_put) {
9703 ufshcd_rpmb_rpm_put(hba);
9704 hba->rpmb_complete_put = false;
9707 EXPORT_SYMBOL_GPL(ufshcd_resume_complete);
9709 int ufshcd_suspend_prepare(struct device *dev)
9711 struct ufs_hba *hba = dev_get_drvdata(dev);
9715 * SCSI assumes that runtime-pm and system-pm for scsi drivers
9716 * are same. And it doesn't wake up the device for system-suspend
9717 * if it's runtime suspended. But ufs doesn't follow that.
9718 * Refer ufshcd_resume_complete()
9720 if (hba->sdev_ufs_device) {
9721 ret = ufshcd_rpm_get_sync(hba);
9722 if (ret < 0 && ret != -EACCES) {
9723 ufshcd_rpm_put(hba);
9726 hba->complete_put = true;
9728 if (hba->sdev_rpmb) {
9729 ufshcd_rpmb_rpm_get_sync(hba);
9730 hba->rpmb_complete_put = true;
9734 EXPORT_SYMBOL_GPL(ufshcd_suspend_prepare);
9736 #ifdef CONFIG_PM_SLEEP
9737 static int ufshcd_wl_poweroff(struct device *dev)
9739 struct scsi_device *sdev = to_scsi_device(dev);
9740 struct ufs_hba *hba = shost_priv(sdev->host);
9742 __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9747 static int ufshcd_wl_probe(struct device *dev)
9749 struct scsi_device *sdev = to_scsi_device(dev);
9751 if (!is_device_wlun(sdev))
9754 blk_pm_runtime_init(sdev->request_queue, dev);
9755 pm_runtime_set_autosuspend_delay(dev, 0);
9756 pm_runtime_allow(dev);
9761 static int ufshcd_wl_remove(struct device *dev)
9763 pm_runtime_forbid(dev);
9767 static const struct dev_pm_ops ufshcd_wl_pm_ops = {
9768 #ifdef CONFIG_PM_SLEEP
9769 .suspend = ufshcd_wl_suspend,
9770 .resume = ufshcd_wl_resume,
9771 .freeze = ufshcd_wl_suspend,
9772 .thaw = ufshcd_wl_resume,
9773 .poweroff = ufshcd_wl_poweroff,
9774 .restore = ufshcd_wl_resume,
9776 SET_RUNTIME_PM_OPS(ufshcd_wl_runtime_suspend, ufshcd_wl_runtime_resume, NULL)
9780 * ufs_dev_wlun_template - describes ufs device wlun
9781 * ufs-device wlun - used to send pm commands
9782 * All luns are consumers of ufs-device wlun.
9784 * Currently, no sd driver is present for wluns.
9785 * Hence the no specific pm operations are performed.
9786 * With ufs design, SSU should be sent to ufs-device wlun.
9787 * Hence register a scsi driver for ufs wluns only.
9789 static struct scsi_driver ufs_dev_wlun_template = {
9791 .name = "ufs_device_wlun",
9792 .owner = THIS_MODULE,
9793 .probe = ufshcd_wl_probe,
9794 .remove = ufshcd_wl_remove,
9795 .pm = &ufshcd_wl_pm_ops,
9796 .shutdown = ufshcd_wl_shutdown,
9800 static int ufshcd_rpmb_probe(struct device *dev)
9802 return is_rpmb_wlun(to_scsi_device(dev)) ? 0 : -ENODEV;
9805 static inline int ufshcd_clear_rpmb_uac(struct ufs_hba *hba)
9809 if (!hba->wlun_rpmb_clr_ua)
9811 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
9813 hba->wlun_rpmb_clr_ua = 0;
9818 static int ufshcd_rpmb_resume(struct device *dev)
9820 struct ufs_hba *hba = wlun_dev_to_hba(dev);
9823 ufshcd_clear_rpmb_uac(hba);
9828 static const struct dev_pm_ops ufs_rpmb_pm_ops = {
9829 SET_RUNTIME_PM_OPS(NULL, ufshcd_rpmb_resume, NULL)
9830 SET_SYSTEM_SLEEP_PM_OPS(NULL, ufshcd_rpmb_resume)
9833 /* ufs_rpmb_wlun_template - Describes UFS RPMB WLUN. Used only to send UAC. */
9834 static struct scsi_driver ufs_rpmb_wlun_template = {
9836 .name = "ufs_rpmb_wlun",
9837 .owner = THIS_MODULE,
9838 .probe = ufshcd_rpmb_probe,
9839 .pm = &ufs_rpmb_pm_ops,
9843 static int __init ufshcd_core_init(void)
9849 ret = scsi_register_driver(&ufs_dev_wlun_template.gendrv);
9853 ret = scsi_register_driver(&ufs_rpmb_wlun_template.gendrv);
9859 scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
9865 static void __exit ufshcd_core_exit(void)
9868 scsi_unregister_driver(&ufs_rpmb_wlun_template.gendrv);
9869 scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
9872 module_init(ufshcd_core_init);
9873 module_exit(ufshcd_core_exit);
9875 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
9876 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
9877 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
9878 MODULE_LICENSE("GPL");
9879 MODULE_VERSION(UFSHCD_DRIVER_VERSION);