drivers/scsi/ufs/ufshcd.c

   1 /*
   2  * Universal Flash Storage Host controller driver Core
   3  *
   4  * This code is based on drivers/scsi/ufs/ufshcd.c
   5  * Copyright (C) 2011-2013 Samsung India Software Operations
   6  * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
   7  *
   8  * Authors:
   9  *      Santosh Yaraganavi <santosh.sy@samsung.com>
  10  *      Vinayak Holikatti <h.vinayak@samsung.com>
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  * See the COPYING file in the top-level directory or visit
  17  * <http://www.gnu.org/licenses/gpl-2.0.html>
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * This program is provided "AS IS" and "WITH ALL FAULTS" and
  25  * without warranty of any kind. You are solely responsible for
  26  * determining the appropriateness of using and distributing
  27  * the program and assume all risks associated with your exercise
  28  * of rights with respect to the program, including but not limited
  29  * to infringement of third party rights, the risks and costs of
  30  * program errors, damage to or loss of data, programs or equipment,
  31  * and unavailability or interruption of operations. Under no
  32  * circumstances will the contributor of this Program be liable for
  33  * any damages of any kind arising from your use or distribution of
  34  * this program.
  35  *
  36  * The Linux Foundation chooses to take subject only to the GPLv2
  37  * license terms, and distributes only under these terms.
  38  */
  39
  40 #include <linux/async.h>
  41 #include <linux/devfreq.h>
  42 #include <linux/nls.h>
  43 #include <linux/of.h>
  44 #include <linux/bitfield.h>
  45 #include "ufshcd.h"
  46 #include "ufs_quirks.h"
  47 #include "unipro.h"
  48 #include "ufs-sysfs.h"
  49
  50 #define CREATE_TRACE_POINTS
  51 #include <trace/events/ufs.h>
  52
  53 #define UFSHCD_REQ_SENSE_SIZE   18
  54
  55 #define UFSHCD_ENABLE_INTRS     (UTP_TRANSFER_REQ_COMPL |\
  56                                  UTP_TASK_REQ_COMPL |\
  57                                  UFSHCD_ERROR_MASK)
  58 /* UIC command timeout, unit: ms */
  59 #define UIC_CMD_TIMEOUT 500
  60
  61 /* NOP OUT retries waiting for NOP IN response */
  62 #define NOP_OUT_RETRIES    10
  63 /* Timeout after 30 msecs if NOP OUT hangs without response */
  64 #define NOP_OUT_TIMEOUT    30 /* msecs */
  65
  66 /* Query request retries */
  67 #define QUERY_REQ_RETRIES 3
  68 /* Query request timeout */
  69 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
  70
  71 /* Task management command timeout */
  72 #define TM_CMD_TIMEOUT  100 /* msecs */
  73
  74 /* maximum number of retries for a general UIC command  */
  75 #define UFS_UIC_COMMAND_RETRIES 3
  76
  77 /* maximum number of link-startup retries */
  78 #define DME_LINKSTARTUP_RETRIES 3
  79
  80 /* Maximum retries for Hibern8 enter */
  81 #define UIC_HIBERN8_ENTER_RETRIES 3
  82
  83 /* maximum number of reset retries before giving up */
  84 #define MAX_HOST_RESET_RETRIES 5
  85
  86 /* Expose the flag value from utp_upiu_query.value */
  87 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  88
  89 /* Interrupt aggregation default timeout, unit: 40us */
  90 #define INT_AGGR_DEF_TO 0x02
  91
  92 #define ufshcd_toggle_vreg(_dev, _vreg, _on)                            \
  93         ({                                                              \
  94                 int _ret;                                               \
  95                 if (_on)                                                \
  96                         _ret = ufshcd_enable_vreg(_dev, _vreg);         \
  97                 else                                                    \
  98                         _ret = ufshcd_disable_vreg(_dev, _vreg);        \
  99                 _ret;                                                   \
 100         })
 101
 102 #define ufshcd_hex_dump(prefix_str, buf, len) \
 103 print_hex_dump(KERN_ERR, prefix_str, DUMP_PREFIX_OFFSET, 16, 4, buf, len, false)
 104
 105 enum {
 106         UFSHCD_MAX_CHANNEL      = 0,
 107         UFSHCD_MAX_ID           = 1,
 108         UFSHCD_CMD_PER_LUN      = 32,
 109         UFSHCD_CAN_QUEUE        = 32,
 110 };
 111
 112 /* UFSHCD states */
 113 enum {
 114         UFSHCD_STATE_RESET,
 115         UFSHCD_STATE_ERROR,
 116         UFSHCD_STATE_OPERATIONAL,
 117         UFSHCD_STATE_EH_SCHEDULED,
 118 };
 119
 120 /* UFSHCD error handling flags */
 121 enum {
 122         UFSHCD_EH_IN_PROGRESS = (1 << 0),
 123 };
 124
 125 /* UFSHCD UIC layer error flags */
 126 enum {
 127         UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
 128         UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
 129         UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
 130         UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
 131         UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
 132         UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
 133 };
 134
 135 #define ufshcd_set_eh_in_progress(h) \
 136         ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
 137 #define ufshcd_eh_in_progress(h) \
 138         ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
 139 #define ufshcd_clear_eh_in_progress(h) \
 140         ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
 141
 142 #define ufshcd_set_ufs_dev_active(h) \
 143         ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
 144 #define ufshcd_set_ufs_dev_sleep(h) \
 145         ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
 146 #define ufshcd_set_ufs_dev_poweroff(h) \
 147         ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
 148 #define ufshcd_is_ufs_dev_active(h) \
 149         ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
 150 #define ufshcd_is_ufs_dev_sleep(h) \
 151         ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
 152 #define ufshcd_is_ufs_dev_poweroff(h) \
 153         ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
 154
 155 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
 156         {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 157         {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 158         {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 159         {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 160         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 161         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
 162 };
 163
 164 static inline enum ufs_dev_pwr_mode
 165 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
 166 {
 167         return ufs_pm_lvl_states[lvl].dev_state;
 168 }
 169
 170 static inline enum uic_link_state
 171 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
 172 {
 173         return ufs_pm_lvl_states[lvl].link_state;
 174 }
 175
 176 static inline enum ufs_pm_level
 177 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
 178                                         enum uic_link_state link_state)
 179 {
 180         enum ufs_pm_level lvl;
 181
 182         for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
 183                 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
 184                         (ufs_pm_lvl_states[lvl].link_state == link_state))
 185                         return lvl;
 186         }
 187
 188         /* if no match found, return the level 0 */
 189         return UFS_PM_LVL_0;
 190 }
 191
 192 static struct ufs_dev_fix ufs_fixups[] = {
 193         /* UFS cards deviations table */
 194         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 195                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 196         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
 197         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 198                 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
 199         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 200                 UFS_DEVICE_NO_FASTAUTO),
 201         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 202                 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
 203         UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
 204                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 205         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
 206                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 207         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
 208                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 209         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
 210         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
 211                 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
 212
 213         END_FIX
 214 };
 215
 216 static void ufshcd_tmc_handler(struct ufs_hba *hba);
 217 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
 218 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
 219 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
 220 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
 221 static void ufshcd_hba_exit(struct ufs_hba *hba);
 222 static int ufshcd_probe_hba(struct ufs_hba *hba);
 223 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
 224                                  bool skip_ref_clk);
 225 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
 226 static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
 227 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
 228 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
 229 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
 230 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
 231 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
 232 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 233 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 234 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
 235 static irqreturn_t ufshcd_intr(int irq, void *__hba);
 236 static int ufshcd_change_power_mode(struct ufs_hba *hba,
 237                              struct ufs_pa_layer_attr *pwr_mode);
 238 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
 239 {
 240         return tag >= 0 && tag < hba->nutrs;
 241 }
 242
 243 static inline int ufshcd_enable_irq(struct ufs_hba *hba)
 244 {
 245         int ret = 0;
 246
 247         if (!hba->is_irq_enabled) {
 248                 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
 249                                 hba);
 250                 if (ret)
 251                         dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
 252                                 __func__, ret);
 253                 hba->is_irq_enabled = true;
 254         }
 255
 256         return ret;
 257 }
 258
 259 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
 260 {
 261         if (hba->is_irq_enabled) {
 262                 free_irq(hba->irq, hba);
 263                 hba->is_irq_enabled = false;
 264         }
 265 }
 266
 267 /* replace non-printable or non-ASCII characters with spaces */
 268 static inline void ufshcd_remove_non_printable(char *val)
 269 {
 270         if (!val)
 271                 return;
 272
 273         if (*val < 0x20 || *val > 0x7e)
 274                 *val = ' ';
 275 }
 276
 277 static void ufshcd_add_command_trace(struct ufs_hba *hba,
 278                 unsigned int tag, const char *str)
 279 {
 280         sector_t lba = -1;
 281         u8 opcode = 0;
 282         u32 intr, doorbell;
 283         struct ufshcd_lrb *lrbp;
 284         int transfer_len = -1;
 285
 286         if (!trace_ufshcd_command_enabled())
 287                 return;
 288
 289         lrbp = &hba->lrb[tag];
 290
 291         if (lrbp->cmd) { /* data phase exists */
 292                 opcode = (u8)(*lrbp->cmd->cmnd);
 293                 if ((opcode == READ_10) || (opcode == WRITE_10)) {
 294                         /*
 295                          * Currently we only fully trace read(10) and write(10)
 296                          * commands
 297                          */
 298                         if (lrbp->cmd->request && lrbp->cmd->request->bio)
 299                                 lba =
 300                                   lrbp->cmd->request->bio->bi_iter.bi_sector;
 301                         transfer_len = be32_to_cpu(
 302                                 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
 303                 }
 304         }
 305
 306         intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
 307         doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
 308         trace_ufshcd_command(dev_name(hba->dev), str, tag,
 309                                 doorbell, transfer_len, intr, lba, opcode);
 310 }
 311
 312 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
 313 {
 314         struct ufs_clk_info *clki;
 315         struct list_head *head = &hba->clk_list_head;
 316
 317         if (list_empty(head))
 318                 return;
 319
 320         list_for_each_entry(clki, head, list) {
 321                 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
 322                                 clki->max_freq)
 323                         dev_err(hba->dev, "clk: %s, rate: %u\n",
 324                                         clki->name, clki->curr_freq);
 325         }
 326 }
 327
 328 static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
 329                 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
 330 {
 331         int i;
 332
 333         for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
 334                 int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH;
 335
 336                 if (err_hist->reg[p] == 0)
 337                         continue;
 338                 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i,
 339                         err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
 340         }
 341 }
 342
 343 static void ufshcd_print_host_regs(struct ufs_hba *hba)
 344 {
 345         /*
 346          * hex_dump reads its data without the readl macro. This might
 347          * cause inconsistency issues on some platform, as the printed
 348          * values may be from cache and not the most recent value.
 349          * To know whether you are looking at an un-cached version verify
 350          * that IORESOURCE_MEM flag is on when xxx_get_resource() is invoked
 351          * during platform/pci probe function.
 352          */
 353         ufshcd_hex_dump("host regs: ", hba->mmio_base, UFSHCI_REG_SPACE_SIZE);
 354         dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
 355                 hba->ufs_version, hba->capabilities);
 356         dev_err(hba->dev,
 357                 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
 358                 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
 359         dev_err(hba->dev,
 360                 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
 361                 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
 362                 hba->ufs_stats.hibern8_exit_cnt);
 363
 364         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
 365         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
 366         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
 367         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
 368         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
 369
 370         ufshcd_print_clk_freqs(hba);
 371
 372         if (hba->vops && hba->vops->dbg_register_dump)
 373                 hba->vops->dbg_register_dump(hba);
 374 }
 375
 376 static
 377 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
 378 {
 379         struct ufshcd_lrb *lrbp;
 380         int prdt_length;
 381         int tag;
 382
 383         for_each_set_bit(tag, &bitmap, hba->nutrs) {
 384                 lrbp = &hba->lrb[tag];
 385
 386                 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
 387                                 tag, ktime_to_us(lrbp->issue_time_stamp));
 388                 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
 389                                 tag, ktime_to_us(lrbp->compl_time_stamp));
 390                 dev_err(hba->dev,
 391                         "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
 392                         tag, (u64)lrbp->utrd_dma_addr);
 393
 394                 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
 395                                 sizeof(struct utp_transfer_req_desc));
 396                 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
 397                         (u64)lrbp->ucd_req_dma_addr);
 398                 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
 399                                 sizeof(struct utp_upiu_req));
 400                 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
 401                         (u64)lrbp->ucd_rsp_dma_addr);
 402                 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
 403                                 sizeof(struct utp_upiu_rsp));
 404
 405                 prdt_length = le16_to_cpu(
 406                         lrbp->utr_descriptor_ptr->prd_table_length);
 407                 dev_err(hba->dev,
 408                         "UPIU[%d] - PRDT - %d entries  phys@0x%llx\n",
 409                         tag, prdt_length,
 410                         (u64)lrbp->ucd_prdt_dma_addr);
 411
 412                 if (pr_prdt)
 413                         ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
 414                                 sizeof(struct ufshcd_sg_entry) * prdt_length);
 415         }
 416 }
 417
 418 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
 419 {
 420         struct utp_task_req_desc *tmrdp;
 421         int tag;
 422
 423         for_each_set_bit(tag, &bitmap, hba->nutmrs) {
 424                 tmrdp = &hba->utmrdl_base_addr[tag];
 425                 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
 426                 ufshcd_hex_dump("TM TRD: ", &tmrdp->header,
 427                                 sizeof(struct request_desc_header));
 428                 dev_err(hba->dev, "TM[%d] - Task Management Request UPIU\n",
 429                                 tag);
 430                 ufshcd_hex_dump("TM REQ: ", tmrdp->task_req_upiu,
 431                                 sizeof(struct utp_upiu_req));
 432                 dev_err(hba->dev, "TM[%d] - Task Management Response UPIU\n",
 433                                 tag);
 434                 ufshcd_hex_dump("TM RSP: ", tmrdp->task_rsp_upiu,
 435                                 sizeof(struct utp_task_req_desc));
 436         }
 437 }
 438
 439 static void ufshcd_print_host_state(struct ufs_hba *hba)
 440 {
 441         dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
 442         dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
 443                 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
 444         dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
 445                 hba->saved_err, hba->saved_uic_err);
 446         dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
 447                 hba->curr_dev_pwr_mode, hba->uic_link_state);
 448         dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
 449                 hba->pm_op_in_progress, hba->is_sys_suspended);
 450         dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
 451                 hba->auto_bkops_enabled, hba->host->host_self_blocked);
 452         dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
 453         dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
 454                 hba->eh_flags, hba->req_abort_count);
 455         dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
 456                 hba->capabilities, hba->caps);
 457         dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
 458                 hba->dev_quirks);
 459 }
 460
 461 /**
 462  * ufshcd_print_pwr_info - print power params as saved in hba
 463  * power info
 464  * @hba: per-adapter instance
 465  */
 466 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
 467 {
 468         static const char * const names[] = {
 469                 "INVALID MODE",
 470                 "FAST MODE",
 471                 "SLOW_MODE",
 472                 "INVALID MODE",
 473                 "FASTAUTO_MODE",
 474                 "SLOWAUTO_MODE",
 475                 "INVALID MODE",
 476         };
 477
 478         dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
 479                  __func__,
 480                  hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
 481                  hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
 482                  names[hba->pwr_info.pwr_rx],
 483                  names[hba->pwr_info.pwr_tx],
 484                  hba->pwr_info.hs_rate);
 485 }
 486
 487 /*
 488  * ufshcd_wait_for_register - wait for register value to change
 489  * @hba - per-adapter interface
 490  * @reg - mmio register offset
 491  * @mask - mask to apply to read register value
 492  * @val - wait condition
 493  * @interval_us - polling interval in microsecs
 494  * @timeout_ms - timeout in millisecs
 495  * @can_sleep - perform sleep or just spin
 496  *
 497  * Returns -ETIMEDOUT on error, zero on success
 498  */
 499 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
 500                                 u32 val, unsigned long interval_us,
 501                                 unsigned long timeout_ms, bool can_sleep)
 502 {
 503         int err = 0;
 504         unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
 505
 506         /* ignore bits that we don't intend to wait on */
 507         val = val & mask;
 508
 509         while ((ufshcd_readl(hba, reg) & mask) != val) {
 510                 if (can_sleep)
 511                         usleep_range(interval_us, interval_us + 50);
 512                 else
 513                         udelay(interval_us);
 514                 if (time_after(jiffies, timeout)) {
 515                         if ((ufshcd_readl(hba, reg) & mask) != val)
 516                                 err = -ETIMEDOUT;
 517                         break;
 518                 }
 519         }
 520
 521         return err;
 522 }
 523
 524 /**
 525  * ufshcd_get_intr_mask - Get the interrupt bit mask
 526  * @hba: Pointer to adapter instance
 527  *
 528  * Returns interrupt bit mask per version
 529  */
 530 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
 531 {
 532         u32 intr_mask = 0;
 533
 534         switch (hba->ufs_version) {
 535         case UFSHCI_VERSION_10:
 536                 intr_mask = INTERRUPT_MASK_ALL_VER_10;
 537                 break;
 538         case UFSHCI_VERSION_11:
 539         case UFSHCI_VERSION_20:
 540                 intr_mask = INTERRUPT_MASK_ALL_VER_11;
 541                 break;
 542         case UFSHCI_VERSION_21:
 543         default:
 544                 intr_mask = INTERRUPT_MASK_ALL_VER_21;
 545                 break;
 546         }
 547
 548         return intr_mask;
 549 }
 550
 551 /**
 552  * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
 553  * @hba: Pointer to adapter instance
 554  *
 555  * Returns UFSHCI version supported by the controller
 556  */
 557 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
 558 {
 559         if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
 560                 return ufshcd_vops_get_ufs_hci_version(hba);
 561
 562         return ufshcd_readl(hba, REG_UFS_VERSION);
 563 }
 564
 565 /**
 566  * ufshcd_is_device_present - Check if any device connected to
 567  *                            the host controller
 568  * @hba: pointer to adapter instance
 569  *
 570  * Returns true if device present, false if no device detected
 571  */
 572 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
 573 {
 574         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
 575                                                 DEVICE_PRESENT) ? true : false;
 576 }
 577
 578 /**
 579  * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
 580  * @lrbp: pointer to local command reference block
 581  *
 582  * This function is used to get the OCS field from UTRD
 583  * Returns the OCS field in the UTRD
 584  */
 585 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
 586 {
 587         return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
 588 }
 589
 590 /**
 591  * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
 592  * @task_req_descp: pointer to utp_task_req_desc structure
 593  *
 594  * This function is used to get the OCS field from UTMRD
 595  * Returns the OCS field in the UTMRD
 596  */
 597 static inline int
 598 ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
 599 {
 600         return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
 601 }
 602
 603 /**
 604  * ufshcd_get_tm_free_slot - get a free slot for task management request
 605  * @hba: per adapter instance
 606  * @free_slot: pointer to variable with available slot value
 607  *
 608  * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
 609  * Returns 0 if free slot is not available, else return 1 with tag value
 610  * in @free_slot.
 611  */
 612 static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
 613 {
 614         int tag;
 615         bool ret = false;
 616
 617         if (!free_slot)
 618                 goto out;
 619
 620         do {
 621                 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
 622                 if (tag >= hba->nutmrs)
 623                         goto out;
 624         } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
 625
 626         *free_slot = tag;
 627         ret = true;
 628 out:
 629         return ret;
 630 }
 631
 632 static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
 633 {
 634         clear_bit_unlock(slot, &hba->tm_slots_in_use);
 635 }
 636
 637 /**
 638  * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 639  * @hba: per adapter instance
 640  * @pos: position of the bit to be cleared
 641  */
 642 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
 643 {
 644         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 645                 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 646         else
 647                 ufshcd_writel(hba, ~(1 << pos),
 648                                 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 649 }
 650
 651 /**
 652  * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
 653  * @hba: per adapter instance
 654  * @pos: position of the bit to be cleared
 655  */
 656 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
 657 {
 658         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 659                 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 660         else
 661                 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 662 }
 663
 664 /**
 665  * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
 666  * @hba: per adapter instance
 667  * @tag: position of the bit to be cleared
 668  */
 669 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
 670 {
 671         __clear_bit(tag, &hba->outstanding_reqs);
 672 }
 673
 674 /**
 675  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 676  * @reg: Register value of host controller status
 677  *
 678  * Returns integer, 0 on Success and positive value if failed
 679  */
 680 static inline int ufshcd_get_lists_status(u32 reg)
 681 {
 682         return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
 683 }
 684
 685 /**
 686  * ufshcd_get_uic_cmd_result - Get the UIC command result
 687  * @hba: Pointer to adapter instance
 688  *
 689  * This function gets the result of UIC command completion
 690  * Returns 0 on success, non zero value on error
 691  */
 692 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
 693 {
 694         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
 695                MASK_UIC_COMMAND_RESULT;
 696 }
 697
 698 /**
 699  * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 700  * @hba: Pointer to adapter instance
 701  *
 702  * This function gets UIC command argument3
 703  * Returns 0 on success, non zero value on error
 704  */
 705 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
 706 {
 707         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
 708 }
 709
 710 /**
 711  * ufshcd_get_req_rsp - returns the TR response transaction type
 712  * @ucd_rsp_ptr: pointer to response UPIU
 713  */
 714 static inline int
 715 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
 716 {
 717         return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
 718 }
 719
 720 /**
 721  * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 722  * @ucd_rsp_ptr: pointer to response UPIU
 723  *
 724  * This function gets the response status and scsi_status from response UPIU
 725  * Returns the response result code.
 726  */
 727 static inline int
 728 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
 729 {
 730         return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
 731 }
 732
 733 /*
 734  * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 735  *                              from response UPIU
 736  * @ucd_rsp_ptr: pointer to response UPIU
 737  *
 738  * Return the data segment length.
 739  */
 740 static inline unsigned int
 741 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
 742 {
 743         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 744                 MASK_RSP_UPIU_DATA_SEG_LEN;
 745 }
 746
 747 /**
 748  * ufshcd_is_exception_event - Check if the device raised an exception event
 749  * @ucd_rsp_ptr: pointer to response UPIU
 750  *
 751  * The function checks if the device raised an exception event indicated in
 752  * the Device Information field of response UPIU.
 753  *
 754  * Returns true if exception is raised, false otherwise.
 755  */
 756 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
 757 {
 758         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 759                         MASK_RSP_EXCEPTION_EVENT ? true : false;
 760 }
 761
 762 /**
 763  * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
 764  * @hba: per adapter instance
 765  */
 766 static inline void
 767 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
 768 {
 769         ufshcd_writel(hba, INT_AGGR_ENABLE |
 770                       INT_AGGR_COUNTER_AND_TIMER_RESET,
 771                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 772 }
 773
 774 /**
 775  * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 776  * @hba: per adapter instance
 777  * @cnt: Interrupt aggregation counter threshold
 778  * @tmout: Interrupt aggregation timeout value
 779  */
 780 static inline void
 781 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
 782 {
 783         ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
 784                       INT_AGGR_COUNTER_THLD_VAL(cnt) |
 785                       INT_AGGR_TIMEOUT_VAL(tmout),
 786                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 787 }
 788
 789 /**
 790  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 791  * @hba: per adapter instance
 792  */
 793 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
 794 {
 795         ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 796 }
 797
 798 /**
 799  * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 800  *                      When run-stop registers are set to 1, it indicates the
 801  *                      host controller that it can process the requests
 802  * @hba: per adapter instance
 803  */
 804 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
 805 {
 806         ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
 807                       REG_UTP_TASK_REQ_LIST_RUN_STOP);
 808         ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
 809                       REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
 810 }
 811
 812 /**
 813  * ufshcd_hba_start - Start controller initialization sequence
 814  * @hba: per adapter instance
 815  */
 816 static inline void ufshcd_hba_start(struct ufs_hba *hba)
 817 {
 818         ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
 819 }
 820
 821 /**
 822  * ufshcd_is_hba_active - Get controller state
 823  * @hba: per adapter instance
 824  *
 825  * Returns false if controller is active, true otherwise
 826  */
 827 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
 828 {
 829         return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
 830                 ? false : true;
 831 }
 832
 833 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
 834 {
 835         /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
 836         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
 837             (hba->ufs_version == UFSHCI_VERSION_11))
 838                 return UFS_UNIPRO_VER_1_41;
 839         else
 840                 return UFS_UNIPRO_VER_1_6;
 841 }
 842 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
 843
 844 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
 845 {
 846         /*
 847          * If both host and device support UniPro ver1.6 or later, PA layer
 848          * parameters tuning happens during link startup itself.
 849          *
 850          * We can manually tune PA layer parameters if either host or device
 851          * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
 852          * logic simple, we will only do manual tuning if local unipro version
 853          * doesn't support ver1.6 or later.
 854          */
 855         if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
 856                 return true;
 857         else
 858                 return false;
 859 }
 860
 861 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
 862 {
 863         int ret = 0;
 864         struct ufs_clk_info *clki;
 865         struct list_head *head = &hba->clk_list_head;
 866         ktime_t start = ktime_get();
 867         bool clk_state_changed = false;
 868
 869         if (list_empty(head))
 870                 goto out;
 871
 872         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
 873         if (ret)
 874                 return ret;
 875
 876         list_for_each_entry(clki, head, list) {
 877                 if (!IS_ERR_OR_NULL(clki->clk)) {
 878                         if (scale_up && clki->max_freq) {
 879                                 if (clki->curr_freq == clki->max_freq)
 880                                         continue;
 881
 882                                 clk_state_changed = true;
 883                                 ret = clk_set_rate(clki->clk, clki->max_freq);
 884                                 if (ret) {
 885                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 886                                                 __func__, clki->name,
 887                                                 clki->max_freq, ret);
 888                                         break;
 889                                 }
 890                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 891                                                 "scaled up", clki->name,
 892                                                 clki->curr_freq,
 893                                                 clki->max_freq);
 894
 895                                 clki->curr_freq = clki->max_freq;
 896
 897                         } else if (!scale_up && clki->min_freq) {
 898                                 if (clki->curr_freq == clki->min_freq)
 899                                         continue;
 900
 901                                 clk_state_changed = true;
 902                                 ret = clk_set_rate(clki->clk, clki->min_freq);
 903                                 if (ret) {
 904                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 905                                                 __func__, clki->name,
 906                                                 clki->min_freq, ret);
 907                                         break;
 908                                 }
 909                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 910                                                 "scaled down", clki->name,
 911                                                 clki->curr_freq,
 912                                                 clki->min_freq);
 913                                 clki->curr_freq = clki->min_freq;
 914                         }
 915                 }
 916                 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
 917                                 clki->name, clk_get_rate(clki->clk));
 918         }
 919
 920         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
 921
 922 out:
 923         if (clk_state_changed)
 924                 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
 925                         (scale_up ? "up" : "down"),
 926                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
 927         return ret;
 928 }
 929
 930 /**
 931  * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
 932  * @hba: per adapter instance
 933  * @scale_up: True if scaling up and false if scaling down
 934  *
 935  * Returns true if scaling is required, false otherwise.
 936  */
 937 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
 938                                                bool scale_up)
 939 {
 940         struct ufs_clk_info *clki;
 941         struct list_head *head = &hba->clk_list_head;
 942
 943         if (list_empty(head))
 944                 return false;
 945
 946         list_for_each_entry(clki, head, list) {
 947                 if (!IS_ERR_OR_NULL(clki->clk)) {
 948                         if (scale_up && clki->max_freq) {
 949                                 if (clki->curr_freq == clki->max_freq)
 950                                         continue;
 951                                 return true;
 952                         } else if (!scale_up && clki->min_freq) {
 953                                 if (clki->curr_freq == clki->min_freq)
 954                                         continue;
 955                                 return true;
 956                         }
 957                 }
 958         }
 959
 960         return false;
 961 }
 962
 963 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
 964                                         u64 wait_timeout_us)
 965 {
 966         unsigned long flags;
 967         int ret = 0;
 968         u32 tm_doorbell;
 969         u32 tr_doorbell;
 970         bool timeout = false, do_last_check = false;
 971         ktime_t start;
 972
 973         ufshcd_hold(hba, false);
 974         spin_lock_irqsave(hba->host->host_lock, flags);
 975         /*
 976          * Wait for all the outstanding tasks/transfer requests.
 977          * Verify by checking the doorbell registers are clear.
 978          */
 979         start = ktime_get();
 980         do {
 981                 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
 982                         ret = -EBUSY;
 983                         goto out;
 984                 }
 985
 986                 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
 987                 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
 988                 if (!tm_doorbell && !tr_doorbell) {
 989                         timeout = false;
 990                         break;
 991                 } else if (do_last_check) {
 992                         break;
 993                 }
 994
 995                 spin_unlock_irqrestore(hba->host->host_lock, flags);
 996                 schedule();
 997                 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
 998                     wait_timeout_us) {
 999                         timeout = true;
1000                         /*
1001                          * We might have scheduled out for long time so make
1002                          * sure to check if doorbells are cleared by this time
1003                          * or not.
1004                          */
1005                         do_last_check = true;
1006                 }
1007                 spin_lock_irqsave(hba->host->host_lock, flags);
1008         } while (tm_doorbell || tr_doorbell);
1009
1010         if (timeout) {
1011                 dev_err(hba->dev,
1012                         "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1013                         __func__, tm_doorbell, tr_doorbell);
1014                 ret = -EBUSY;
1015         }
1016 out:
1017         spin_unlock_irqrestore(hba->host->host_lock, flags);
1018         ufshcd_release(hba);
1019         return ret;
1020 }
1021
1022 /**
1023  * ufshcd_scale_gear - scale up/down UFS gear
1024  * @hba: per adapter instance
1025  * @scale_up: True for scaling up gear and false for scaling down
1026  *
1027  * Returns 0 for success,
1028  * Returns -EBUSY if scaling can't happen at this time
1029  * Returns non-zero for any other errors
1030  */
1031 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1032 {
1033         #define UFS_MIN_GEAR_TO_SCALE_DOWN      UFS_HS_G1
1034         int ret = 0;
1035         struct ufs_pa_layer_attr new_pwr_info;
1036
1037         if (scale_up) {
1038                 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1039                        sizeof(struct ufs_pa_layer_attr));
1040         } else {
1041                 memcpy(&new_pwr_info, &hba->pwr_info,
1042                        sizeof(struct ufs_pa_layer_attr));
1043
1044                 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1045                     || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1046                         /* save the current power mode */
1047                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
1048                                 &hba->pwr_info,
1049                                 sizeof(struct ufs_pa_layer_attr));
1050
1051                         /* scale down gear */
1052                         new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1053                         new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1054                 }
1055         }
1056
1057         /* check if the power mode needs to be changed or not? */
1058         ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1059
1060         if (ret)
1061                 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1062                         __func__, ret,
1063                         hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1064                         new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1065
1066         return ret;
1067 }
1068
1069 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1070 {
1071         #define DOORBELL_CLR_TOUT_US            (1000 * 1000) /* 1 sec */
1072         int ret = 0;
1073         /*
1074          * make sure that there are no outstanding requests when
1075          * clock scaling is in progress
1076          */
1077         scsi_block_requests(hba->host);
1078         down_write(&hba->clk_scaling_lock);
1079         if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1080                 ret = -EBUSY;
1081                 up_write(&hba->clk_scaling_lock);
1082                 scsi_unblock_requests(hba->host);
1083         }
1084
1085         return ret;
1086 }
1087
1088 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1089 {
1090         up_write(&hba->clk_scaling_lock);
1091         scsi_unblock_requests(hba->host);
1092 }
1093
1094 /**
1095  * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1096  * @hba: per adapter instance
1097  * @scale_up: True for scaling up and false for scalin down
1098  *
1099  * Returns 0 for success,
1100  * Returns -EBUSY if scaling can't happen at this time
1101  * Returns non-zero for any other errors
1102  */
1103 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1104 {
1105         int ret = 0;
1106
1107         /* let's not get into low power until clock scaling is completed */
1108         ufshcd_hold(hba, false);
1109
1110         ret = ufshcd_clock_scaling_prepare(hba);
1111         if (ret)
1112                 return ret;
1113
1114         /* scale down the gear before scaling down clocks */
1115         if (!scale_up) {
1116                 ret = ufshcd_scale_gear(hba, false);
1117                 if (ret)
1118                         goto out;
1119         }
1120
1121         ret = ufshcd_scale_clks(hba, scale_up);
1122         if (ret) {
1123                 if (!scale_up)
1124                         ufshcd_scale_gear(hba, true);
1125                 goto out;
1126         }
1127
1128         /* scale up the gear after scaling up clocks */
1129         if (scale_up) {
1130                 ret = ufshcd_scale_gear(hba, true);
1131                 if (ret) {
1132                         ufshcd_scale_clks(hba, false);
1133                         goto out;
1134                 }
1135         }
1136
1137         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1138
1139 out:
1140         ufshcd_clock_scaling_unprepare(hba);
1141         ufshcd_release(hba);
1142         return ret;
1143 }
1144
1145 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1146 {
1147         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1148                                            clk_scaling.suspend_work);
1149         unsigned long irq_flags;
1150
1151         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1152         if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1153                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1154                 return;
1155         }
1156         hba->clk_scaling.is_suspended = true;
1157         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1158
1159         __ufshcd_suspend_clkscaling(hba);
1160 }
1161
1162 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1163 {
1164         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1165                                            clk_scaling.resume_work);
1166         unsigned long irq_flags;
1167
1168         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1169         if (!hba->clk_scaling.is_suspended) {
1170                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1171                 return;
1172         }
1173         hba->clk_scaling.is_suspended = false;
1174         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1175
1176         devfreq_resume_device(hba->devfreq);
1177 }
1178
1179 static int ufshcd_devfreq_target(struct device *dev,
1180                                 unsigned long *freq, u32 flags)
1181 {
1182         int ret = 0;
1183         struct ufs_hba *hba = dev_get_drvdata(dev);
1184         ktime_t start;
1185         bool scale_up, sched_clk_scaling_suspend_work = false;
1186         struct list_head *clk_list = &hba->clk_list_head;
1187         struct ufs_clk_info *clki;
1188         unsigned long irq_flags;
1189
1190         if (!ufshcd_is_clkscaling_supported(hba))
1191                 return -EINVAL;
1192
1193         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1194         if (ufshcd_eh_in_progress(hba)) {
1195                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1196                 return 0;
1197         }
1198
1199         if (!hba->clk_scaling.active_reqs)
1200                 sched_clk_scaling_suspend_work = true;
1201
1202         if (list_empty(clk_list)) {
1203                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1204                 goto out;
1205         }
1206
1207         clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1208         scale_up = (*freq == clki->max_freq) ? true : false;
1209         if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1210                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1211                 ret = 0;
1212                 goto out; /* no state change required */
1213         }
1214         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1215
1216         start = ktime_get();
1217         ret = ufshcd_devfreq_scale(hba, scale_up);
1218
1219         trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1220                 (scale_up ? "up" : "down"),
1221                 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1222
1223 out:
1224         if (sched_clk_scaling_suspend_work)
1225                 queue_work(hba->clk_scaling.workq,
1226                            &hba->clk_scaling.suspend_work);
1227
1228         return ret;
1229 }
1230
1231
1232 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1233                 struct devfreq_dev_status *stat)
1234 {
1235         struct ufs_hba *hba = dev_get_drvdata(dev);
1236         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1237         unsigned long flags;
1238
1239         if (!ufshcd_is_clkscaling_supported(hba))
1240                 return -EINVAL;
1241
1242         memset(stat, 0, sizeof(*stat));
1243
1244         spin_lock_irqsave(hba->host->host_lock, flags);
1245         if (!scaling->window_start_t)
1246                 goto start_window;
1247
1248         if (scaling->is_busy_started)
1249                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1250                                         scaling->busy_start_t));
1251
1252         stat->total_time = jiffies_to_usecs((long)jiffies -
1253                                 (long)scaling->window_start_t);
1254         stat->busy_time = scaling->tot_busy_t;
1255 start_window:
1256         scaling->window_start_t = jiffies;
1257         scaling->tot_busy_t = 0;
1258
1259         if (hba->outstanding_reqs) {
1260                 scaling->busy_start_t = ktime_get();
1261                 scaling->is_busy_started = true;
1262         } else {
1263                 scaling->busy_start_t = 0;
1264                 scaling->is_busy_started = false;
1265         }
1266         spin_unlock_irqrestore(hba->host->host_lock, flags);
1267         return 0;
1268 }
1269
1270 static struct devfreq_dev_profile ufs_devfreq_profile = {
1271         .polling_ms     = 100,
1272         .target         = ufshcd_devfreq_target,
1273         .get_dev_status = ufshcd_devfreq_get_dev_status,
1274 };
1275
1276 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1277 {
1278         struct list_head *clk_list = &hba->clk_list_head;
1279         struct ufs_clk_info *clki;
1280         struct devfreq *devfreq;
1281         int ret;
1282
1283         /* Skip devfreq if we don't have any clocks in the list */
1284         if (list_empty(clk_list))
1285                 return 0;
1286
1287         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1288         dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1289         dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1290
1291         devfreq = devfreq_add_device(hba->dev,
1292                         &ufs_devfreq_profile,
1293                         DEVFREQ_GOV_SIMPLE_ONDEMAND,
1294                         NULL);
1295         if (IS_ERR(devfreq)) {
1296                 ret = PTR_ERR(devfreq);
1297                 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1298
1299                 dev_pm_opp_remove(hba->dev, clki->min_freq);
1300                 dev_pm_opp_remove(hba->dev, clki->max_freq);
1301                 return ret;
1302         }
1303
1304         hba->devfreq = devfreq;
1305
1306         return 0;
1307 }
1308
1309 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1310 {
1311         struct list_head *clk_list = &hba->clk_list_head;
1312         struct ufs_clk_info *clki;
1313
1314         if (!hba->devfreq)
1315                 return;
1316
1317         devfreq_remove_device(hba->devfreq);
1318         hba->devfreq = NULL;
1319
1320         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1321         dev_pm_opp_remove(hba->dev, clki->min_freq);
1322         dev_pm_opp_remove(hba->dev, clki->max_freq);
1323 }
1324
1325 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1326 {
1327         unsigned long flags;
1328
1329         devfreq_suspend_device(hba->devfreq);
1330         spin_lock_irqsave(hba->host->host_lock, flags);
1331         hba->clk_scaling.window_start_t = 0;
1332         spin_unlock_irqrestore(hba->host->host_lock, flags);
1333 }
1334
1335 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1336 {
1337         unsigned long flags;
1338         bool suspend = false;
1339
1340         if (!ufshcd_is_clkscaling_supported(hba))
1341                 return;
1342
1343         spin_lock_irqsave(hba->host->host_lock, flags);
1344         if (!hba->clk_scaling.is_suspended) {
1345                 suspend = true;
1346                 hba->clk_scaling.is_suspended = true;
1347         }
1348         spin_unlock_irqrestore(hba->host->host_lock, flags);
1349
1350         if (suspend)
1351                 __ufshcd_suspend_clkscaling(hba);
1352 }
1353
1354 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1355 {
1356         unsigned long flags;
1357         bool resume = false;
1358
1359         if (!ufshcd_is_clkscaling_supported(hba))
1360                 return;
1361
1362         spin_lock_irqsave(hba->host->host_lock, flags);
1363         if (hba->clk_scaling.is_suspended) {
1364                 resume = true;
1365                 hba->clk_scaling.is_suspended = false;
1366         }
1367         spin_unlock_irqrestore(hba->host->host_lock, flags);
1368
1369         if (resume)
1370                 devfreq_resume_device(hba->devfreq);
1371 }
1372
1373 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1374                 struct device_attribute *attr, char *buf)
1375 {
1376         struct ufs_hba *hba = dev_get_drvdata(dev);
1377
1378         return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1379 }
1380
1381 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1382                 struct device_attribute *attr, const char *buf, size_t count)
1383 {
1384         struct ufs_hba *hba = dev_get_drvdata(dev);
1385         u32 value;
1386         int err;
1387
1388         if (kstrtou32(buf, 0, &value))
1389                 return -EINVAL;
1390
1391         value = !!value;
1392         if (value == hba->clk_scaling.is_allowed)
1393                 goto out;
1394
1395         pm_runtime_get_sync(hba->dev);
1396         ufshcd_hold(hba, false);
1397
1398         cancel_work_sync(&hba->clk_scaling.suspend_work);
1399         cancel_work_sync(&hba->clk_scaling.resume_work);
1400
1401         hba->clk_scaling.is_allowed = value;
1402
1403         if (value) {
1404                 ufshcd_resume_clkscaling(hba);
1405         } else {
1406                 ufshcd_suspend_clkscaling(hba);
1407                 err = ufshcd_devfreq_scale(hba, true);
1408                 if (err)
1409                         dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1410                                         __func__, err);
1411         }
1412
1413         ufshcd_release(hba);
1414         pm_runtime_put_sync(hba->dev);
1415 out:
1416         return count;
1417 }
1418
1419 static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1420 {
1421         hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1422         hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1423         sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1424         hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1425         hba->clk_scaling.enable_attr.attr.mode = 0644;
1426         if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1427                 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1428 }
1429
1430 static void ufshcd_ungate_work(struct work_struct *work)
1431 {
1432         int ret;
1433         unsigned long flags;
1434         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1435                         clk_gating.ungate_work);
1436
1437         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1438
1439         spin_lock_irqsave(hba->host->host_lock, flags);
1440         if (hba->clk_gating.state == CLKS_ON) {
1441                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1442                 goto unblock_reqs;
1443         }
1444
1445         spin_unlock_irqrestore(hba->host->host_lock, flags);
1446         ufshcd_setup_clocks(hba, true);
1447
1448         /* Exit from hibern8 */
1449         if (ufshcd_can_hibern8_during_gating(hba)) {
1450                 /* Prevent gating in this path */
1451                 hba->clk_gating.is_suspended = true;
1452                 if (ufshcd_is_link_hibern8(hba)) {
1453                         ret = ufshcd_uic_hibern8_exit(hba);
1454                         if (ret)
1455                                 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1456                                         __func__, ret);
1457                         else
1458                                 ufshcd_set_link_active(hba);
1459                 }
1460                 hba->clk_gating.is_suspended = false;
1461         }
1462 unblock_reqs:
1463         scsi_unblock_requests(hba->host);
1464 }
1465
1466 /**
1467  * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1468  * Also, exit from hibern8 mode and set the link as active.
1469  * @hba: per adapter instance
1470  * @async: This indicates whether caller should ungate clocks asynchronously.
1471  */
1472 int ufshcd_hold(struct ufs_hba *hba, bool async)
1473 {
1474         int rc = 0;
1475         unsigned long flags;
1476
1477         if (!ufshcd_is_clkgating_allowed(hba))
1478                 goto out;
1479         spin_lock_irqsave(hba->host->host_lock, flags);
1480         hba->clk_gating.active_reqs++;
1481
1482         if (ufshcd_eh_in_progress(hba)) {
1483                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1484                 return 0;
1485         }
1486
1487 start:
1488         switch (hba->clk_gating.state) {
1489         case CLKS_ON:
1490                 /*
1491                  * Wait for the ungate work to complete if in progress.
1492                  * Though the clocks may be in ON state, the link could
1493                  * still be in hibner8 state if hibern8 is allowed
1494                  * during clock gating.
1495                  * Make sure we exit hibern8 state also in addition to
1496                  * clocks being ON.
1497                  */
1498                 if (ufshcd_can_hibern8_during_gating(hba) &&
1499                     ufshcd_is_link_hibern8(hba)) {
1500                         spin_unlock_irqrestore(hba->host->host_lock, flags);
1501                         flush_work(&hba->clk_gating.ungate_work);
1502                         spin_lock_irqsave(hba->host->host_lock, flags);
1503                         goto start;
1504                 }
1505                 break;
1506         case REQ_CLKS_OFF:
1507                 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1508                         hba->clk_gating.state = CLKS_ON;
1509                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1510                                                 hba->clk_gating.state);
1511                         break;
1512                 }
1513                 /*
1514                  * If we are here, it means gating work is either done or
1515                  * currently running. Hence, fall through to cancel gating
1516                  * work and to enable clocks.
1517                  */
1518         case CLKS_OFF:
1519                 scsi_block_requests(hba->host);
1520                 hba->clk_gating.state = REQ_CLKS_ON;
1521                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1522                                         hba->clk_gating.state);
1523                 schedule_work(&hba->clk_gating.ungate_work);
1524                 /*
1525                  * fall through to check if we should wait for this
1526                  * work to be done or not.
1527                  */
1528         case REQ_CLKS_ON:
1529                 if (async) {
1530                         rc = -EAGAIN;
1531                         hba->clk_gating.active_reqs--;
1532                         break;
1533                 }
1534
1535                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1536                 flush_work(&hba->clk_gating.ungate_work);
1537                 /* Make sure state is CLKS_ON before returning */
1538                 spin_lock_irqsave(hba->host->host_lock, flags);
1539                 goto start;
1540         default:
1541                 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1542                                 __func__, hba->clk_gating.state);
1543                 break;
1544         }
1545         spin_unlock_irqrestore(hba->host->host_lock, flags);
1546 out:
1547         return rc;
1548 }
1549 EXPORT_SYMBOL_GPL(ufshcd_hold);
1550
1551 static void ufshcd_gate_work(struct work_struct *work)
1552 {
1553         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1554                         clk_gating.gate_work.work);
1555         unsigned long flags;
1556
1557         spin_lock_irqsave(hba->host->host_lock, flags);
1558         /*
1559          * In case you are here to cancel this work the gating state
1560          * would be marked as REQ_CLKS_ON. In this case save time by
1561          * skipping the gating work and exit after changing the clock
1562          * state to CLKS_ON.
1563          */
1564         if (hba->clk_gating.is_suspended ||
1565                 (hba->clk_gating.state == REQ_CLKS_ON)) {
1566                 hba->clk_gating.state = CLKS_ON;
1567                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1568                                         hba->clk_gating.state);
1569                 goto rel_lock;
1570         }
1571
1572         if (hba->clk_gating.active_reqs
1573                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1574                 || hba->lrb_in_use || hba->outstanding_tasks
1575                 || hba->active_uic_cmd || hba->uic_async_done)
1576                 goto rel_lock;
1577
1578         spin_unlock_irqrestore(hba->host->host_lock, flags);
1579
1580         /* put the link into hibern8 mode before turning off clocks */
1581         if (ufshcd_can_hibern8_during_gating(hba)) {
1582                 if (ufshcd_uic_hibern8_enter(hba)) {
1583                         hba->clk_gating.state = CLKS_ON;
1584                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1585                                                 hba->clk_gating.state);
1586                         goto out;
1587                 }
1588                 ufshcd_set_link_hibern8(hba);
1589         }
1590
1591         if (!ufshcd_is_link_active(hba))
1592                 ufshcd_setup_clocks(hba, false);
1593         else
1594                 /* If link is active, device ref_clk can't be switched off */
1595                 __ufshcd_setup_clocks(hba, false, true);
1596
1597         /*
1598          * In case you are here to cancel this work the gating state
1599          * would be marked as REQ_CLKS_ON. In this case keep the state
1600          * as REQ_CLKS_ON which would anyway imply that clocks are off
1601          * and a request to turn them on is pending. By doing this way,
1602          * we keep the state machine in tact and this would ultimately
1603          * prevent from doing cancel work multiple times when there are
1604          * new requests arriving before the current cancel work is done.
1605          */
1606         spin_lock_irqsave(hba->host->host_lock, flags);
1607         if (hba->clk_gating.state == REQ_CLKS_OFF) {
1608                 hba->clk_gating.state = CLKS_OFF;
1609                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1610                                         hba->clk_gating.state);
1611         }
1612 rel_lock:
1613         spin_unlock_irqrestore(hba->host->host_lock, flags);
1614 out:
1615         return;
1616 }
1617
1618 /* host lock must be held before calling this variant */
1619 static void __ufshcd_release(struct ufs_hba *hba)
1620 {
1621         if (!ufshcd_is_clkgating_allowed(hba))
1622                 return;
1623
1624         hba->clk_gating.active_reqs--;
1625
1626         if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1627                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1628                 || hba->lrb_in_use || hba->outstanding_tasks
1629                 || hba->active_uic_cmd || hba->uic_async_done
1630                 || ufshcd_eh_in_progress(hba))
1631                 return;
1632
1633         hba->clk_gating.state = REQ_CLKS_OFF;
1634         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1635         schedule_delayed_work(&hba->clk_gating.gate_work,
1636                         msecs_to_jiffies(hba->clk_gating.delay_ms));
1637 }
1638
1639 void ufshcd_release(struct ufs_hba *hba)
1640 {
1641         unsigned long flags;
1642
1643         spin_lock_irqsave(hba->host->host_lock, flags);
1644         __ufshcd_release(hba);
1645         spin_unlock_irqrestore(hba->host->host_lock, flags);
1646 }
1647 EXPORT_SYMBOL_GPL(ufshcd_release);
1648
1649 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1650                 struct device_attribute *attr, char *buf)
1651 {
1652         struct ufs_hba *hba = dev_get_drvdata(dev);
1653
1654         return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1655 }
1656
1657 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1658                 struct device_attribute *attr, const char *buf, size_t count)
1659 {
1660         struct ufs_hba *hba = dev_get_drvdata(dev);
1661         unsigned long flags, value;
1662
1663         if (kstrtoul(buf, 0, &value))
1664                 return -EINVAL;
1665
1666         spin_lock_irqsave(hba->host->host_lock, flags);
1667         hba->clk_gating.delay_ms = value;
1668         spin_unlock_irqrestore(hba->host->host_lock, flags);
1669         return count;
1670 }
1671
1672 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1673                 struct device_attribute *attr, char *buf)
1674 {
1675         struct ufs_hba *hba = dev_get_drvdata(dev);
1676
1677         return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1678 }
1679
1680 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1681                 struct device_attribute *attr, const char *buf, size_t count)
1682 {
1683         struct ufs_hba *hba = dev_get_drvdata(dev);
1684         unsigned long flags;
1685         u32 value;
1686
1687         if (kstrtou32(buf, 0, &value))
1688                 return -EINVAL;
1689
1690         value = !!value;
1691         if (value == hba->clk_gating.is_enabled)
1692                 goto out;
1693
1694         if (value) {
1695                 ufshcd_release(hba);
1696         } else {
1697                 spin_lock_irqsave(hba->host->host_lock, flags);
1698                 hba->clk_gating.active_reqs++;
1699                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1700         }
1701
1702         hba->clk_gating.is_enabled = value;
1703 out:
1704         return count;
1705 }
1706
1707 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1708 {
1709         if (!ufshcd_is_clkgating_allowed(hba))
1710                 return;
1711
1712         hba->clk_gating.delay_ms = 150;
1713         INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1714         INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1715
1716         hba->clk_gating.is_enabled = true;
1717
1718         hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1719         hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1720         sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1721         hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1722         hba->clk_gating.delay_attr.attr.mode = 0644;
1723         if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1724                 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1725
1726         hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1727         hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1728         sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1729         hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1730         hba->clk_gating.enable_attr.attr.mode = 0644;
1731         if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1732                 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1733 }
1734
1735 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1736 {
1737         if (!ufshcd_is_clkgating_allowed(hba))
1738                 return;
1739         device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1740         device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1741         cancel_work_sync(&hba->clk_gating.ungate_work);
1742         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1743 }
1744
1745 /* Must be called with host lock acquired */
1746 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1747 {
1748         bool queue_resume_work = false;
1749
1750         if (!ufshcd_is_clkscaling_supported(hba))
1751                 return;
1752
1753         if (!hba->clk_scaling.active_reqs++)
1754                 queue_resume_work = true;
1755
1756         if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1757                 return;
1758
1759         if (queue_resume_work)
1760                 queue_work(hba->clk_scaling.workq,
1761                            &hba->clk_scaling.resume_work);
1762
1763         if (!hba->clk_scaling.window_start_t) {
1764                 hba->clk_scaling.window_start_t = jiffies;
1765                 hba->clk_scaling.tot_busy_t = 0;
1766                 hba->clk_scaling.is_busy_started = false;
1767         }
1768
1769         if (!hba->clk_scaling.is_busy_started) {
1770                 hba->clk_scaling.busy_start_t = ktime_get();
1771                 hba->clk_scaling.is_busy_started = true;
1772         }
1773 }
1774
1775 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1776 {
1777         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1778
1779         if (!ufshcd_is_clkscaling_supported(hba))
1780                 return;
1781
1782         if (!hba->outstanding_reqs && scaling->is_busy_started) {
1783                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1784                                         scaling->busy_start_t));
1785                 scaling->busy_start_t = 0;
1786                 scaling->is_busy_started = false;
1787         }
1788 }
1789 /**
1790  * ufshcd_send_command - Send SCSI or device management commands
1791  * @hba: per adapter instance
1792  * @task_tag: Task tag of the command
1793  */
1794 static inline
1795 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1796 {
1797         hba->lrb[task_tag].issue_time_stamp = ktime_get();
1798         hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
1799         ufshcd_clk_scaling_start_busy(hba);
1800         __set_bit(task_tag, &hba->outstanding_reqs);
1801         ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1802         /* Make sure that doorbell is committed immediately */
1803         wmb();
1804         ufshcd_add_command_trace(hba, task_tag, "send");
1805 }
1806
1807 /**
1808  * ufshcd_copy_sense_data - Copy sense data in case of check condition
1809  * @lrbp: pointer to local reference block
1810  */
1811 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1812 {
1813         int len;
1814         if (lrbp->sense_buffer &&
1815             ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
1816                 int len_to_copy;
1817
1818                 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
1819                 len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len);
1820
1821                 memcpy(lrbp->sense_buffer,
1822                         lrbp->ucd_rsp_ptr->sr.sense_data,
1823                         min_t(int, len_to_copy, UFSHCD_REQ_SENSE_SIZE));
1824         }
1825 }
1826
1827 /**
1828  * ufshcd_copy_query_response() - Copy the Query Response and the data
1829  * descriptor
1830  * @hba: per adapter instance
1831  * @lrbp: pointer to local reference block
1832  */
1833 static
1834 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1835 {
1836         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1837
1838         memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
1839
1840         /* Get the descriptor */
1841         if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
1842                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
1843                                 GENERAL_UPIU_REQUEST_SIZE;
1844                 u16 resp_len;
1845                 u16 buf_len;
1846
1847                 /* data segment length */
1848                 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
1849                                                 MASK_QUERY_DATA_SEG_LEN;
1850                 buf_len = be16_to_cpu(
1851                                 hba->dev_cmd.query.request.upiu_req.length);
1852                 if (likely(buf_len >= resp_len)) {
1853                         memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1854                 } else {
1855                         dev_warn(hba->dev,
1856                                 "%s: Response size is bigger than buffer",
1857                                 __func__);
1858                         return -EINVAL;
1859                 }
1860         }
1861
1862         return 0;
1863 }
1864
1865 /**
1866  * ufshcd_hba_capabilities - Read controller capabilities
1867  * @hba: per adapter instance
1868  */
1869 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1870 {
1871         hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
1872
1873         /* nutrs and nutmrs are 0 based values */
1874         hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1875         hba->nutmrs =
1876         ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1877 }
1878
1879 /**
1880  * ufshcd_ready_for_uic_cmd - Check if controller is ready
1881  *                            to accept UIC commands
1882  * @hba: per adapter instance
1883  * Return true on success, else false
1884  */
1885 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1886 {
1887         if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1888                 return true;
1889         else
1890                 return false;
1891 }
1892
1893 /**
1894  * ufshcd_get_upmcrs - Get the power mode change request status
1895  * @hba: Pointer to adapter instance
1896  *
1897  * This function gets the UPMCRS field of HCS register
1898  * Returns value of UPMCRS field
1899  */
1900 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1901 {
1902         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1903 }
1904
1905 /**
1906  * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1907  * @hba: per adapter instance
1908  * @uic_cmd: UIC command
1909  *
1910  * Mutex must be held.
1911  */
1912 static inline void
1913 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1914 {
1915         WARN_ON(hba->active_uic_cmd);
1916
1917         hba->active_uic_cmd = uic_cmd;
1918
1919         /* Write Args */
1920         ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1921         ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1922         ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
1923
1924         /* Write UIC Cmd */
1925         ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
1926                       REG_UIC_COMMAND);
1927 }
1928
1929 /**
1930  * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
1931  * @hba: per adapter instance
1932  * @uic_cmd: UIC command
1933  *
1934  * Must be called with mutex held.
1935  * Returns 0 only if success.
1936  */
1937 static int
1938 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1939 {
1940         int ret;
1941         unsigned long flags;
1942
1943         if (wait_for_completion_timeout(&uic_cmd->done,
1944                                         msecs_to_jiffies(UIC_CMD_TIMEOUT)))
1945                 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
1946         else
1947                 ret = -ETIMEDOUT;
1948
1949         spin_lock_irqsave(hba->host->host_lock, flags);
1950         hba->active_uic_cmd = NULL;
1951         spin_unlock_irqrestore(hba->host->host_lock, flags);
1952
1953         return ret;
1954 }
1955
1956 /**
1957  * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
1958  * @hba: per adapter instance
1959  * @uic_cmd: UIC command
1960  * @completion: initialize the completion only if this is set to true
1961  *
1962  * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
1963  * with mutex held and host_lock locked.
1964  * Returns 0 only if success.
1965  */
1966 static int
1967 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
1968                       bool completion)
1969 {
1970         if (!ufshcd_ready_for_uic_cmd(hba)) {
1971                 dev_err(hba->dev,
1972                         "Controller not ready to accept UIC commands\n");
1973                 return -EIO;
1974         }
1975
1976         if (completion)
1977                 init_completion(&uic_cmd->done);
1978
1979         ufshcd_dispatch_uic_cmd(hba, uic_cmd);
1980
1981         return 0;
1982 }
1983
1984 /**
1985  * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
1986  * @hba: per adapter instance
1987  * @uic_cmd: UIC command
1988  *
1989  * Returns 0 only if success.
1990  */
1991 static int
1992 ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1993 {
1994         int ret;
1995         unsigned long flags;
1996
1997         ufshcd_hold(hba, false);
1998         mutex_lock(&hba->uic_cmd_mutex);
1999         ufshcd_add_delay_before_dme_cmd(hba);
2000
2001         spin_lock_irqsave(hba->host->host_lock, flags);
2002         ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2003         spin_unlock_irqrestore(hba->host->host_lock, flags);
2004         if (!ret)
2005                 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2006
2007         mutex_unlock(&hba->uic_cmd_mutex);
2008
2009         ufshcd_release(hba);
2010         return ret;
2011 }
2012
2013 /**
2014  * ufshcd_map_sg - Map scatter-gather list to prdt
2015  * @hba: per adapter instance
2016  * @lrbp: pointer to local reference block
2017  *
2018  * Returns 0 in case of success, non-zero value in case of failure
2019  */
2020 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2021 {
2022         struct ufshcd_sg_entry *prd_table;
2023         struct scatterlist *sg;
2024         struct scsi_cmnd *cmd;
2025         int sg_segments;
2026         int i;
2027
2028         cmd = lrbp->cmd;
2029         sg_segments = scsi_dma_map(cmd);
2030         if (sg_segments < 0)
2031                 return sg_segments;
2032
2033         if (sg_segments) {
2034                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2035                         lrbp->utr_descriptor_ptr->prd_table_length =
2036                                 cpu_to_le16((u16)(sg_segments *
2037                                         sizeof(struct ufshcd_sg_entry)));
2038                 else
2039                         lrbp->utr_descriptor_ptr->prd_table_length =
2040                                 cpu_to_le16((u16) (sg_segments));
2041
2042                 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2043
2044                 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2045                         prd_table[i].size  =
2046                                 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2047                         prd_table[i].base_addr =
2048                                 cpu_to_le32(lower_32_bits(sg->dma_address));
2049                         prd_table[i].upper_addr =
2050                                 cpu_to_le32(upper_32_bits(sg->dma_address));
2051                         prd_table[i].reserved = 0;
2052                 }
2053         } else {
2054                 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2055         }
2056
2057         return 0;
2058 }
2059
2060 /**
2061  * ufshcd_enable_intr - enable interrupts
2062  * @hba: per adapter instance
2063  * @intrs: interrupt bits
2064  */
2065 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2066 {
2067         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2068
2069         if (hba->ufs_version == UFSHCI_VERSION_10) {
2070                 u32 rw;
2071                 rw = set & INTERRUPT_MASK_RW_VER_10;
2072                 set = rw | ((set ^ intrs) & intrs);
2073         } else {
2074                 set |= intrs;
2075         }
2076
2077         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2078 }
2079
2080 /**
2081  * ufshcd_disable_intr - disable interrupts
2082  * @hba: per adapter instance
2083  * @intrs: interrupt bits
2084  */
2085 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2086 {
2087         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2088
2089         if (hba->ufs_version == UFSHCI_VERSION_10) {
2090                 u32 rw;
2091                 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2092                         ~(intrs & INTERRUPT_MASK_RW_VER_10);
2093                 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2094
2095         } else {
2096                 set &= ~intrs;
2097         }
2098
2099         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2100 }
2101
2102 /**
2103  * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2104  * descriptor according to request
2105  * @lrbp: pointer to local reference block
2106  * @upiu_flags: flags required in the header
2107  * @cmd_dir: requests data direction
2108  */
2109 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2110                         u32 *upiu_flags, enum dma_data_direction cmd_dir)
2111 {
2112         struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2113         u32 data_direction;
2114         u32 dword_0;
2115
2116         if (cmd_dir == DMA_FROM_DEVICE) {
2117                 data_direction = UTP_DEVICE_TO_HOST;
2118                 *upiu_flags = UPIU_CMD_FLAGS_READ;
2119         } else if (cmd_dir == DMA_TO_DEVICE) {
2120                 data_direction = UTP_HOST_TO_DEVICE;
2121                 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2122         } else {
2123                 data_direction = UTP_NO_DATA_TRANSFER;
2124                 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2125         }
2126
2127         dword_0 = data_direction | (lrbp->command_type
2128                                 << UPIU_COMMAND_TYPE_OFFSET);
2129         if (lrbp->intr_cmd)
2130                 dword_0 |= UTP_REQ_DESC_INT_CMD;
2131
2132         /* Transfer request descriptor header fields */
2133         req_desc->header.dword_0 = cpu_to_le32(dword_0);
2134         /* dword_1 is reserved, hence it is set to 0 */
2135         req_desc->header.dword_1 = 0;
2136         /*
2137          * assigning invalid value for command status. Controller
2138          * updates OCS on command completion, with the command
2139          * status
2140          */
2141         req_desc->header.dword_2 =
2142                 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2143         /* dword_3 is reserved, hence it is set to 0 */
2144         req_desc->header.dword_3 = 0;
2145
2146         req_desc->prd_table_length = 0;
2147 }
2148
2149 /**
2150  * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2151  * for scsi commands
2152  * @lrbp: local reference block pointer
2153  * @upiu_flags: flags
2154  */
2155 static
2156 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2157 {
2158         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2159         unsigned short cdb_len;
2160
2161         /* command descriptor fields */
2162         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2163                                 UPIU_TRANSACTION_COMMAND, upiu_flags,
2164                                 lrbp->lun, lrbp->task_tag);
2165         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2166                                 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2167
2168         /* Total EHS length and Data segment length will be zero */
2169         ucd_req_ptr->header.dword_2 = 0;
2170
2171         ucd_req_ptr->sc.exp_data_transfer_len =
2172                 cpu_to_be32(lrbp->cmd->sdb.length);
2173
2174         cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE);
2175         memset(ucd_req_ptr->sc.cdb, 0, MAX_CDB_SIZE);
2176         memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2177
2178         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2179 }
2180
2181 /**
2182  * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2183  * for query requsts
2184  * @hba: UFS hba
2185  * @lrbp: local reference block pointer
2186  * @upiu_flags: flags
2187  */
2188 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2189                                 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2190 {
2191         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2192         struct ufs_query *query = &hba->dev_cmd.query;
2193         u16 len = be16_to_cpu(query->request.upiu_req.length);
2194         u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
2195
2196         /* Query request header */
2197         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2198                         UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2199                         lrbp->lun, lrbp->task_tag);
2200         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2201                         0, query->request.query_func, 0, 0);
2202
2203         /* Data segment length only need for WRITE_DESC */
2204         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2205                 ucd_req_ptr->header.dword_2 =
2206                         UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2207         else
2208                 ucd_req_ptr->header.dword_2 = 0;
2209
2210         /* Copy the Query Request buffer as is */
2211         memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2212                         QUERY_OSF_SIZE);
2213
2214         /* Copy the Descriptor */
2215         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2216                 memcpy(descp, query->descriptor, len);
2217
2218         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2219 }
2220
2221 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2222 {
2223         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2224
2225         memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2226
2227         /* command descriptor fields */
2228         ucd_req_ptr->header.dword_0 =
2229                 UPIU_HEADER_DWORD(
2230                         UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2231         /* clear rest of the fields of basic header */
2232         ucd_req_ptr->header.dword_1 = 0;
2233         ucd_req_ptr->header.dword_2 = 0;
2234
2235         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2236 }
2237
2238 /**
2239  * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2240  *                           for Device Management Purposes
2241  * @hba: per adapter instance
2242  * @lrbp: pointer to local reference block
2243  */
2244 static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2245 {
2246         u32 upiu_flags;
2247         int ret = 0;
2248
2249         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2250             (hba->ufs_version == UFSHCI_VERSION_11))
2251                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2252         else
2253                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2254
2255         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2256         if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2257                 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2258         else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2259                 ufshcd_prepare_utp_nop_upiu(lrbp);
2260         else
2261                 ret = -EINVAL;
2262
2263         return ret;
2264 }
2265
2266 /**
2267  * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2268  *                         for SCSI Purposes
2269  * @hba: per adapter instance
2270  * @lrbp: pointer to local reference block
2271  */
2272 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2273 {
2274         u32 upiu_flags;
2275         int ret = 0;
2276
2277         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2278             (hba->ufs_version == UFSHCI_VERSION_11))
2279                 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2280         else
2281                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2282
2283         if (likely(lrbp->cmd)) {
2284                 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2285                                                 lrbp->cmd->sc_data_direction);
2286                 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2287         } else {
2288                 ret = -EINVAL;
2289         }
2290
2291         return ret;
2292 }
2293
2294 /**
2295  * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2296  * @upiu_wlun_id: UPIU W-LUN id
2297  *
2298  * Returns SCSI W-LUN id
2299  */
2300 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2301 {
2302         return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2303 }
2304
2305 /**
2306  * ufshcd_queuecommand - main entry point for SCSI requests
2307  * @host: SCSI host pointer
2308  * @cmd: command from SCSI Midlayer
2309  *
2310  * Returns 0 for success, non-zero in case of failure
2311  */
2312 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2313 {
2314         struct ufshcd_lrb *lrbp;
2315         struct ufs_hba *hba;
2316         unsigned long flags;
2317         int tag;
2318         int err = 0;
2319
2320         hba = shost_priv(host);
2321
2322         tag = cmd->request->tag;
2323         if (!ufshcd_valid_tag(hba, tag)) {
2324                 dev_err(hba->dev,
2325                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2326                         __func__, tag, cmd, cmd->request);
2327                 BUG();
2328         }
2329
2330         if (!down_read_trylock(&hba->clk_scaling_lock))
2331                 return SCSI_MLQUEUE_HOST_BUSY;
2332
2333         spin_lock_irqsave(hba->host->host_lock, flags);
2334         switch (hba->ufshcd_state) {
2335         case UFSHCD_STATE_OPERATIONAL:
2336                 break;
2337         case UFSHCD_STATE_EH_SCHEDULED:
2338         case UFSHCD_STATE_RESET:
2339                 err = SCSI_MLQUEUE_HOST_BUSY;
2340                 goto out_unlock;
2341         case UFSHCD_STATE_ERROR:
2342                 set_host_byte(cmd, DID_ERROR);
2343                 cmd->scsi_done(cmd);
2344                 goto out_unlock;
2345         default:
2346                 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2347                                 __func__, hba->ufshcd_state);
2348                 set_host_byte(cmd, DID_BAD_TARGET);
2349                 cmd->scsi_done(cmd);
2350                 goto out_unlock;
2351         }
2352
2353         /* if error handling is in progress, don't issue commands */
2354         if (ufshcd_eh_in_progress(hba)) {
2355                 set_host_byte(cmd, DID_ERROR);
2356                 cmd->scsi_done(cmd);
2357                 goto out_unlock;
2358         }
2359         spin_unlock_irqrestore(hba->host->host_lock, flags);
2360
2361         hba->req_abort_count = 0;
2362
2363         /* acquire the tag to make sure device cmds don't use it */
2364         if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2365                 /*
2366                  * Dev manage command in progress, requeue the command.
2367                  * Requeuing the command helps in cases where the request *may*
2368                  * find different tag instead of waiting for dev manage command
2369                  * completion.
2370                  */
2371                 err = SCSI_MLQUEUE_HOST_BUSY;
2372                 goto out;
2373         }
2374
2375         err = ufshcd_hold(hba, true);
2376         if (err) {
2377                 err = SCSI_MLQUEUE_HOST_BUSY;
2378                 clear_bit_unlock(tag, &hba->lrb_in_use);
2379                 goto out;
2380         }
2381         WARN_ON(hba->clk_gating.state != CLKS_ON);
2382
2383         lrbp = &hba->lrb[tag];
2384
2385         WARN_ON(lrbp->cmd);
2386         lrbp->cmd = cmd;
2387         lrbp->sense_bufflen = UFSHCD_REQ_SENSE_SIZE;
2388         lrbp->sense_buffer = cmd->sense_buffer;
2389         lrbp->task_tag = tag;
2390         lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2391         lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2392         lrbp->req_abort_skip = false;
2393
2394         ufshcd_comp_scsi_upiu(hba, lrbp);
2395
2396         err = ufshcd_map_sg(hba, lrbp);
2397         if (err) {
2398                 lrbp->cmd = NULL;
2399                 clear_bit_unlock(tag, &hba->lrb_in_use);
2400                 goto out;
2401         }
2402         /* Make sure descriptors are ready before ringing the doorbell */
2403         wmb();
2404
2405         /* issue command to the controller */
2406         spin_lock_irqsave(hba->host->host_lock, flags);
2407         ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2408         ufshcd_send_command(hba, tag);
2409 out_unlock:
2410         spin_unlock_irqrestore(hba->host->host_lock, flags);
2411 out:
2412         up_read(&hba->clk_scaling_lock);
2413         return err;
2414 }
2415
2416 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2417                 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2418 {
2419         lrbp->cmd = NULL;
2420         lrbp->sense_bufflen = 0;
2421         lrbp->sense_buffer = NULL;
2422         lrbp->task_tag = tag;
2423         lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2424         lrbp->intr_cmd = true; /* No interrupt aggregation */
2425         hba->dev_cmd.type = cmd_type;
2426
2427         return ufshcd_comp_devman_upiu(hba, lrbp);
2428 }
2429
2430 static int
2431 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2432 {
2433         int err = 0;
2434         unsigned long flags;
2435         u32 mask = 1 << tag;
2436
2437         /* clear outstanding transaction before retry */
2438         spin_lock_irqsave(hba->host->host_lock, flags);
2439         ufshcd_utrl_clear(hba, tag);
2440         spin_unlock_irqrestore(hba->host->host_lock, flags);
2441
2442         /*
2443          * wait for for h/w to clear corresponding bit in door-bell.
2444          * max. wait is 1 sec.
2445          */
2446         err = ufshcd_wait_for_register(hba,
2447                         REG_UTP_TRANSFER_REQ_DOOR_BELL,
2448                         mask, ~mask, 1000, 1000, true);
2449
2450         return err;
2451 }
2452
2453 static int
2454 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2455 {
2456         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2457
2458         /* Get the UPIU response */
2459         query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2460                                 UPIU_RSP_CODE_OFFSET;
2461         return query_res->response;
2462 }
2463
2464 /**
2465  * ufshcd_dev_cmd_completion() - handles device management command responses
2466  * @hba: per adapter instance
2467  * @lrbp: pointer to local reference block
2468  */
2469 static int
2470 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2471 {
2472         int resp;
2473         int err = 0;
2474
2475         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2476         resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2477
2478         switch (resp) {
2479         case UPIU_TRANSACTION_NOP_IN:
2480                 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2481                         err = -EINVAL;
2482                         dev_err(hba->dev, "%s: unexpected response %x\n",
2483                                         __func__, resp);
2484                 }
2485                 break;
2486         case UPIU_TRANSACTION_QUERY_RSP:
2487                 err = ufshcd_check_query_response(hba, lrbp);
2488                 if (!err)
2489                         err = ufshcd_copy_query_response(hba, lrbp);
2490                 break;
2491         case UPIU_TRANSACTION_REJECT_UPIU:
2492                 /* TODO: handle Reject UPIU Response */
2493                 err = -EPERM;
2494                 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2495                                 __func__);
2496                 break;
2497         default:
2498                 err = -EINVAL;
2499                 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2500                                 __func__, resp);
2501                 break;
2502         }
2503
2504         return err;
2505 }
2506
2507 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2508                 struct ufshcd_lrb *lrbp, int max_timeout)
2509 {
2510         int err = 0;
2511         unsigned long time_left;
2512         unsigned long flags;
2513
2514         time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2515                         msecs_to_jiffies(max_timeout));
2516
2517         /* Make sure descriptors are ready before ringing the doorbell */
2518         wmb();
2519         spin_lock_irqsave(hba->host->host_lock, flags);
2520         hba->dev_cmd.complete = NULL;
2521         if (likely(time_left)) {
2522                 err = ufshcd_get_tr_ocs(lrbp);
2523                 if (!err)
2524                         err = ufshcd_dev_cmd_completion(hba, lrbp);
2525         }
2526         spin_unlock_irqrestore(hba->host->host_lock, flags);
2527
2528         if (!time_left) {
2529                 err = -ETIMEDOUT;
2530                 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2531                         __func__, lrbp->task_tag);
2532                 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2533                         /* successfully cleared the command, retry if needed */
2534                         err = -EAGAIN;
2535                 /*
2536                  * in case of an error, after clearing the doorbell,
2537                  * we also need to clear the outstanding_request
2538                  * field in hba
2539                  */
2540                 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2541         }
2542
2543         return err;
2544 }
2545
2546 /**
2547  * ufshcd_get_dev_cmd_tag - Get device management command tag
2548  * @hba: per-adapter instance
2549  * @tag_out: pointer to variable with available slot value
2550  *
2551  * Get a free slot and lock it until device management command
2552  * completes.
2553  *
2554  * Returns false if free slot is unavailable for locking, else
2555  * return true with tag value in @tag.
2556  */
2557 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2558 {
2559         int tag;
2560         bool ret = false;
2561         unsigned long tmp;
2562
2563         if (!tag_out)
2564                 goto out;
2565
2566         do {
2567                 tmp = ~hba->lrb_in_use;
2568                 tag = find_last_bit(&tmp, hba->nutrs);
2569                 if (tag >= hba->nutrs)
2570                         goto out;
2571         } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2572
2573         *tag_out = tag;
2574         ret = true;
2575 out:
2576         return ret;
2577 }
2578
2579 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2580 {
2581         clear_bit_unlock(tag, &hba->lrb_in_use);
2582 }
2583
2584 /**
2585  * ufshcd_exec_dev_cmd - API for sending device management requests
2586  * @hba: UFS hba
2587  * @cmd_type: specifies the type (NOP, Query...)
2588  * @timeout: time in seconds
2589  *
2590  * NOTE: Since there is only one available tag for device management commands,
2591  * it is expected you hold the hba->dev_cmd.lock mutex.
2592  */
2593 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2594                 enum dev_cmd_type cmd_type, int timeout)
2595 {
2596         struct ufshcd_lrb *lrbp;
2597         int err;
2598         int tag;
2599         struct completion wait;
2600         unsigned long flags;
2601
2602         down_read(&hba->clk_scaling_lock);
2603
2604         /*
2605          * Get free slot, sleep if slots are unavailable.
2606          * Even though we use wait_event() which sleeps indefinitely,
2607          * the maximum wait time is bounded by SCSI request timeout.
2608          */
2609         wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2610
2611         init_completion(&wait);
2612         lrbp = &hba->lrb[tag];
2613         WARN_ON(lrbp->cmd);
2614         err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2615         if (unlikely(err))
2616                 goto out_put_tag;
2617
2618         hba->dev_cmd.complete = &wait;
2619
2620         /* Make sure descriptors are ready before ringing the doorbell */
2621         wmb();
2622         spin_lock_irqsave(hba->host->host_lock, flags);
2623         ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2624         ufshcd_send_command(hba, tag);
2625         spin_unlock_irqrestore(hba->host->host_lock, flags);
2626
2627         err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2628
2629 out_put_tag:
2630         ufshcd_put_dev_cmd_tag(hba, tag);
2631         wake_up(&hba->dev_cmd.tag_wq);
2632         up_read(&hba->clk_scaling_lock);
2633         return err;
2634 }
2635
2636 /**
2637  * ufshcd_init_query() - init the query response and request parameters
2638  * @hba: per-adapter instance
2639  * @request: address of the request pointer to be initialized
2640  * @response: address of the response pointer to be initialized
2641  * @opcode: operation to perform
2642  * @idn: flag idn to access
2643  * @index: LU number to access
2644  * @selector: query/flag/descriptor further identification
2645  */
2646 static inline void ufshcd_init_query(struct ufs_hba *hba,
2647                 struct ufs_query_req **request, struct ufs_query_res **response,
2648                 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2649 {
2650         *request = &hba->dev_cmd.query.request;
2651         *response = &hba->dev_cmd.query.response;
2652         memset(*request, 0, sizeof(struct ufs_query_req));
2653         memset(*response, 0, sizeof(struct ufs_query_res));
2654         (*request)->upiu_req.opcode = opcode;
2655         (*request)->upiu_req.idn = idn;
2656         (*request)->upiu_req.index = index;
2657         (*request)->upiu_req.selector = selector;
2658 }
2659
2660 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2661         enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2662 {
2663         int ret;
2664         int retries;
2665
2666         for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2667                 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2668                 if (ret)
2669                         dev_dbg(hba->dev,
2670                                 "%s: failed with error %d, retries %d\n",
2671                                 __func__, ret, retries);
2672                 else
2673                         break;
2674         }
2675
2676         if (ret)
2677                 dev_err(hba->dev,
2678                         "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2679                         __func__, opcode, idn, ret, retries);
2680         return ret;
2681 }
2682
2683 /**
2684  * ufshcd_query_flag() - API function for sending flag query requests
2685  * @hba: per-adapter instance
2686  * @opcode: flag query to perform
2687  * @idn: flag idn to access
2688  * @flag_res: the flag value after the query request completes
2689  *
2690  * Returns 0 for success, non-zero in case of failure
2691  */
2692 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
2693                         enum flag_idn idn, bool *flag_res)
2694 {
2695         struct ufs_query_req *request = NULL;
2696         struct ufs_query_res *response = NULL;
2697         int err, index = 0, selector = 0;
2698         int timeout = QUERY_REQ_TIMEOUT;
2699
2700         BUG_ON(!hba);
2701
2702         ufshcd_hold(hba, false);
2703         mutex_lock(&hba->dev_cmd.lock);
2704         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2705                         selector);
2706
2707         switch (opcode) {
2708         case UPIU_QUERY_OPCODE_SET_FLAG:
2709         case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2710         case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2711                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2712                 break;
2713         case UPIU_QUERY_OPCODE_READ_FLAG:
2714                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2715                 if (!flag_res) {
2716                         /* No dummy reads */
2717                         dev_err(hba->dev, "%s: Invalid argument for read request\n",
2718                                         __func__);
2719                         err = -EINVAL;
2720                         goto out_unlock;
2721                 }
2722                 break;
2723         default:
2724                 dev_err(hba->dev,
2725                         "%s: Expected query flag opcode but got = %d\n",
2726                         __func__, opcode);
2727                 err = -EINVAL;
2728                 goto out_unlock;
2729         }
2730
2731         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
2732
2733         if (err) {
2734                 dev_err(hba->dev,
2735                         "%s: Sending flag query for idn %d failed, err = %d\n",
2736                         __func__, idn, err);
2737                 goto out_unlock;
2738         }
2739
2740         if (flag_res)
2741                 *flag_res = (be32_to_cpu(response->upiu_res.value) &
2742                                 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2743
2744 out_unlock:
2745         mutex_unlock(&hba->dev_cmd.lock);
2746         ufshcd_release(hba);
2747         return err;
2748 }
2749
2750 /**
2751  * ufshcd_query_attr - API function for sending attribute requests
2752  * @hba: per-adapter instance
2753  * @opcode: attribute opcode
2754  * @idn: attribute idn to access
2755  * @index: index field
2756  * @selector: selector field
2757  * @attr_val: the attribute value after the query request completes
2758  *
2759  * Returns 0 for success, non-zero in case of failure
2760 */
2761 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2762                       enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2763 {
2764         struct ufs_query_req *request = NULL;
2765         struct ufs_query_res *response = NULL;
2766         int err;
2767
2768         BUG_ON(!hba);
2769
2770         ufshcd_hold(hba, false);
2771         if (!attr_val) {
2772                 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2773                                 __func__, opcode);
2774                 err = -EINVAL;
2775                 goto out;
2776         }
2777
2778         mutex_lock(&hba->dev_cmd.lock);
2779         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2780                         selector);
2781
2782         switch (opcode) {
2783         case UPIU_QUERY_OPCODE_WRITE_ATTR:
2784                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2785                 request->upiu_req.value = cpu_to_be32(*attr_val);
2786                 break;
2787         case UPIU_QUERY_OPCODE_READ_ATTR:
2788                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2789                 break;
2790         default:
2791                 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2792                                 __func__, opcode);
2793                 err = -EINVAL;
2794                 goto out_unlock;
2795         }
2796
2797         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2798
2799         if (err) {
2800                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2801                                 __func__, opcode, idn, index, err);
2802                 goto out_unlock;
2803         }
2804
2805         *attr_val = be32_to_cpu(response->upiu_res.value);
2806
2807 out_unlock:
2808         mutex_unlock(&hba->dev_cmd.lock);
2809 out:
2810         ufshcd_release(hba);
2811         return err;
2812 }
2813
2814 /**
2815  * ufshcd_query_attr_retry() - API function for sending query
2816  * attribute with retries
2817  * @hba: per-adapter instance
2818  * @opcode: attribute opcode
2819  * @idn: attribute idn to access
2820  * @index: index field
2821  * @selector: selector field
2822  * @attr_val: the attribute value after the query request
2823  * completes
2824  *
2825  * Returns 0 for success, non-zero in case of failure
2826 */
2827 static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2828         enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2829         u32 *attr_val)
2830 {
2831         int ret = 0;
2832         u32 retries;
2833
2834          for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2835                 ret = ufshcd_query_attr(hba, opcode, idn, index,
2836                                                 selector, attr_val);
2837                 if (ret)
2838                         dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2839                                 __func__, ret, retries);
2840                 else
2841                         break;
2842         }
2843
2844         if (ret)
2845                 dev_err(hba->dev,
2846                         "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2847                         __func__, idn, ret, QUERY_REQ_RETRIES);
2848         return ret;
2849 }
2850
2851 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
2852                         enum query_opcode opcode, enum desc_idn idn, u8 index,
2853                         u8 selector, u8 *desc_buf, int *buf_len)
2854 {
2855         struct ufs_query_req *request = NULL;
2856         struct ufs_query_res *response = NULL;
2857         int err;
2858
2859         BUG_ON(!hba);
2860
2861         ufshcd_hold(hba, false);
2862         if (!desc_buf) {
2863                 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2864                                 __func__, opcode);
2865                 err = -EINVAL;
2866                 goto out;
2867         }
2868
2869         if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
2870                 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2871                                 __func__, *buf_len);
2872                 err = -EINVAL;
2873                 goto out;
2874         }
2875
2876         mutex_lock(&hba->dev_cmd.lock);
2877         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2878                         selector);
2879         hba->dev_cmd.query.descriptor = desc_buf;
2880         request->upiu_req.length = cpu_to_be16(*buf_len);
2881
2882         switch (opcode) {
2883         case UPIU_QUERY_OPCODE_WRITE_DESC:
2884                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2885                 break;
2886         case UPIU_QUERY_OPCODE_READ_DESC:
2887                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2888                 break;
2889         default:
2890                 dev_err(hba->dev,
2891                                 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2892                                 __func__, opcode);
2893                 err = -EINVAL;
2894                 goto out_unlock;
2895         }
2896
2897         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2898
2899         if (err) {
2900                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2901                                 __func__, opcode, idn, index, err);
2902                 goto out_unlock;
2903         }
2904
2905         hba->dev_cmd.query.descriptor = NULL;
2906         *buf_len = be16_to_cpu(response->upiu_res.length);
2907
2908 out_unlock:
2909         mutex_unlock(&hba->dev_cmd.lock);
2910 out:
2911         ufshcd_release(hba);
2912         return err;
2913 }
2914
2915 /**
2916  * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2917  * @hba: per-adapter instance
2918  * @opcode: attribute opcode
2919  * @idn: attribute idn to access
2920  * @index: index field
2921  * @selector: selector field
2922  * @desc_buf: the buffer that contains the descriptor
2923  * @buf_len: length parameter passed to the device
2924  *
2925  * Returns 0 for success, non-zero in case of failure.
2926  * The buf_len parameter will contain, on return, the length parameter
2927  * received on the response.
2928  */
2929 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
2930                                   enum query_opcode opcode,
2931                                   enum desc_idn idn, u8 index,
2932                                   u8 selector,
2933                                   u8 *desc_buf, int *buf_len)
2934 {
2935         int err;
2936         int retries;
2937
2938         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2939                 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
2940                                                 selector, desc_buf, buf_len);
2941                 if (!err || err == -EINVAL)
2942                         break;
2943         }
2944
2945         return err;
2946 }
2947
2948 /**
2949  * ufshcd_read_desc_length - read the specified descriptor length from header
2950  * @hba: Pointer to adapter instance
2951  * @desc_id: descriptor idn value
2952  * @desc_index: descriptor index
2953  * @desc_length: pointer to variable to read the length of descriptor
2954  *
2955  * Return 0 in case of success, non-zero otherwise
2956  */
2957 static int ufshcd_read_desc_length(struct ufs_hba *hba,
2958         enum desc_idn desc_id,
2959         int desc_index,
2960         int *desc_length)
2961 {
2962         int ret;
2963         u8 header[QUERY_DESC_HDR_SIZE];
2964         int header_len = QUERY_DESC_HDR_SIZE;
2965
2966         if (desc_id >= QUERY_DESC_IDN_MAX)
2967                 return -EINVAL;
2968
2969         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2970                                         desc_id, desc_index, 0, header,
2971                                         &header_len);
2972
2973         if (ret) {
2974                 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
2975                         __func__, desc_id);
2976                 return ret;
2977         } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
2978                 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
2979                         __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
2980                         desc_id);
2981                 ret = -EINVAL;
2982         }
2983
2984         *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
2985         return ret;
2986
2987 }
2988
2989 /**
2990  * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
2991  * @hba: Pointer to adapter instance
2992  * @desc_id: descriptor idn value
2993  * @desc_len: mapped desc length (out)
2994  *
2995  * Return 0 in case of success, non-zero otherwise
2996  */
2997 int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
2998         enum desc_idn desc_id, int *desc_len)
2999 {
3000         switch (desc_id) {
3001         case QUERY_DESC_IDN_DEVICE:
3002                 *desc_len = hba->desc_size.dev_desc;
3003                 break;
3004         case QUERY_DESC_IDN_POWER:
3005                 *desc_len = hba->desc_size.pwr_desc;
3006                 break;
3007         case QUERY_DESC_IDN_GEOMETRY:
3008                 *desc_len = hba->desc_size.geom_desc;
3009                 break;
3010         case QUERY_DESC_IDN_CONFIGURATION:
3011                 *desc_len = hba->desc_size.conf_desc;
3012                 break;
3013         case QUERY_DESC_IDN_UNIT:
3014                 *desc_len = hba->desc_size.unit_desc;
3015                 break;
3016         case QUERY_DESC_IDN_INTERCONNECT:
3017                 *desc_len = hba->desc_size.interc_desc;
3018                 break;
3019         case QUERY_DESC_IDN_STRING:
3020                 *desc_len = QUERY_DESC_MAX_SIZE;
3021                 break;
3022         case QUERY_DESC_IDN_HEALTH:
3023                 *desc_len = hba->desc_size.hlth_desc;
3024                 break;
3025         case QUERY_DESC_IDN_RFU_0:
3026         case QUERY_DESC_IDN_RFU_1:
3027                 *desc_len = 0;
3028                 break;
3029         default:
3030                 *desc_len = 0;
3031                 return -EINVAL;
3032         }
3033         return 0;
3034 }
3035 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3036
3037 /**
3038  * ufshcd_read_desc_param - read the specified descriptor parameter
3039  * @hba: Pointer to adapter instance
3040  * @desc_id: descriptor idn value
3041  * @desc_index: descriptor index
3042  * @param_offset: offset of the parameter to read
3043  * @param_read_buf: pointer to buffer where parameter would be read
3044  * @param_size: sizeof(param_read_buf)
3045  *
3046  * Return 0 in case of success, non-zero otherwise
3047  */
3048 int ufshcd_read_desc_param(struct ufs_hba *hba,
3049                            enum desc_idn desc_id,
3050                            int desc_index,
3051                            u8 param_offset,
3052                            u8 *param_read_buf,
3053                            u8 param_size)
3054 {
3055         int ret;
3056         u8 *desc_buf;
3057         int buff_len;
3058         bool is_kmalloc = true;
3059
3060         /* Safety check */
3061         if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3062                 return -EINVAL;
3063
3064         /* Get the max length of descriptor from structure filled up at probe
3065          * time.
3066          */
3067         ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3068
3069         /* Sanity checks */
3070         if (ret || !buff_len) {
3071                 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3072                         __func__);
3073                 return ret;
3074         }
3075
3076         /* Check whether we need temp memory */
3077         if (param_offset != 0 || param_size < buff_len) {
3078                 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3079                 if (!desc_buf)
3080                         return -ENOMEM;
3081         } else {
3082                 desc_buf = param_read_buf;
3083                 is_kmalloc = false;
3084         }
3085
3086         /* Request for full descriptor */
3087         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3088                                         desc_id, desc_index, 0,
3089                                         desc_buf, &buff_len);
3090
3091         if (ret) {
3092                 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3093                         __func__, desc_id, desc_index, param_offset, ret);
3094                 goto out;
3095         }
3096
3097         /* Sanity check */
3098         if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3099                 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3100                         __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3101                 ret = -EINVAL;
3102                 goto out;
3103         }
3104
3105         /* Check wherher we will not copy more data, than available */
3106         if (is_kmalloc && param_size > buff_len)
3107                 param_size = buff_len;
3108
3109         if (is_kmalloc)
3110                 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3111 out:
3112         if (is_kmalloc)
3113                 kfree(desc_buf);
3114         return ret;
3115 }
3116
3117 static inline int ufshcd_read_desc(struct ufs_hba *hba,
3118                                    enum desc_idn desc_id,
3119                                    int desc_index,
3120                                    u8 *buf,
3121                                    u32 size)
3122 {
3123         return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3124 }
3125
3126 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3127                                          u8 *buf,
3128                                          u32 size)
3129 {
3130         return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3131 }
3132
3133 static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3134 {
3135         return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3136 }
3137
3138 /**
3139  * ufshcd_read_string_desc - read string descriptor
3140  * @hba: pointer to adapter instance
3141  * @desc_index: descriptor index
3142  * @buf: pointer to buffer where descriptor would be read
3143  * @size: size of buf
3144  * @ascii: if true convert from unicode to ascii characters
3145  *
3146  * Return 0 in case of success, non-zero otherwise
3147  */
3148 int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
3149                             u8 *buf, u32 size, bool ascii)
3150 {
3151         int err = 0;
3152
3153         err = ufshcd_read_desc(hba,
3154                                 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3155
3156         if (err) {
3157                 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3158                         __func__, QUERY_REQ_RETRIES, err);
3159                 goto out;
3160         }
3161
3162         if (ascii) {
3163                 int desc_len;
3164                 int ascii_len;
3165                 int i;
3166                 char *buff_ascii;
3167
3168                 desc_len = buf[0];
3169                 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3170                 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3171                 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3172                         dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3173                                         __func__);
3174                         err = -ENOMEM;
3175                         goto out;
3176                 }
3177
3178                 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3179                 if (!buff_ascii) {
3180                         err = -ENOMEM;
3181                         goto out;
3182                 }
3183
3184                 /*
3185                  * the descriptor contains string in UTF16 format
3186                  * we need to convert to utf-8 so it can be displayed
3187                  */
3188                 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3189                                 desc_len - QUERY_DESC_HDR_SIZE,
3190                                 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3191
3192                 /* replace non-printable or non-ASCII characters with spaces */
3193                 for (i = 0; i < ascii_len; i++)
3194                         ufshcd_remove_non_printable(&buff_ascii[i]);
3195
3196                 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3197                                 size - QUERY_DESC_HDR_SIZE);
3198                 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3199                 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
3200                 kfree(buff_ascii);
3201         }
3202 out:
3203         return err;
3204 }
3205
3206 /**
3207  * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3208  * @hba: Pointer to adapter instance
3209  * @lun: lun id
3210  * @param_offset: offset of the parameter to read
3211  * @param_read_buf: pointer to buffer where parameter would be read
3212  * @param_size: sizeof(param_read_buf)
3213  *
3214  * Return 0 in case of success, non-zero otherwise
3215  */
3216 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3217                                               int lun,
3218                                               enum unit_desc_param param_offset,
3219                                               u8 *param_read_buf,
3220                                               u32 param_size)
3221 {
3222         /*
3223          * Unit descriptors are only available for general purpose LUs (LUN id
3224          * from 0 to 7) and RPMB Well known LU.
3225          */
3226         if (!ufs_is_valid_unit_desc_lun(lun))
3227                 return -EOPNOTSUPP;
3228
3229         return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3230                                       param_offset, param_read_buf, param_size);
3231 }
3232
3233 /**
3234  * ufshcd_memory_alloc - allocate memory for host memory space data structures
3235  * @hba: per adapter instance
3236  *
3237  * 1. Allocate DMA memory for Command Descriptor array
3238  *      Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3239  * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3240  * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3241  *      (UTMRDL)
3242  * 4. Allocate memory for local reference block(lrb).
3243  *
3244  * Returns 0 for success, non-zero in case of failure
3245  */
3246 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3247 {
3248         size_t utmrdl_size, utrdl_size, ucdl_size;
3249
3250         /* Allocate memory for UTP command descriptors */
3251         ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3252         hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3253                                                   ucdl_size,
3254                                                   &hba->ucdl_dma_addr,
3255                                                   GFP_KERNEL);
3256
3257         /*
3258          * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3259          * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3260          * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3261          * be aligned to 128 bytes as well
3262          */
3263         if (!hba->ucdl_base_addr ||
3264             WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3265                 dev_err(hba->dev,
3266                         "Command Descriptor Memory allocation failed\n");
3267                 goto out;
3268         }
3269
3270         /*
3271          * Allocate memory for UTP Transfer descriptors
3272          * UFSHCI requires 1024 byte alignment of UTRD
3273          */
3274         utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3275         hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3276                                                    utrdl_size,
3277                                                    &hba->utrdl_dma_addr,
3278                                                    GFP_KERNEL);
3279         if (!hba->utrdl_base_addr ||
3280             WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3281                 dev_err(hba->dev,
3282                         "Transfer Descriptor Memory allocation failed\n");
3283                 goto out;
3284         }
3285
3286         /*
3287          * Allocate memory for UTP Task Management descriptors
3288          * UFSHCI requires 1024 byte alignment of UTMRD
3289          */
3290         utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3291         hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3292                                                     utmrdl_size,
3293                                                     &hba->utmrdl_dma_addr,
3294                                                     GFP_KERNEL);
3295         if (!hba->utmrdl_base_addr ||
3296             WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3297                 dev_err(hba->dev,
3298                 "Task Management Descriptor Memory allocation failed\n");
3299                 goto out;
3300         }
3301
3302         /* Allocate memory for local reference block */
3303         hba->lrb = devm_kzalloc(hba->dev,
3304                                 hba->nutrs * sizeof(struct ufshcd_lrb),
3305                                 GFP_KERNEL);
3306         if (!hba->lrb) {
3307                 dev_err(hba->dev, "LRB Memory allocation failed\n");
3308                 goto out;
3309         }
3310         return 0;
3311 out:
3312         return -ENOMEM;
3313 }
3314
3315 /**
3316  * ufshcd_host_memory_configure - configure local reference block with
3317  *                              memory offsets
3318  * @hba: per adapter instance
3319  *
3320  * Configure Host memory space
3321  * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3322  * address.
3323  * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3324  * and PRDT offset.
3325  * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3326  * into local reference block.
3327  */
3328 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3329 {
3330         struct utp_transfer_cmd_desc *cmd_descp;
3331         struct utp_transfer_req_desc *utrdlp;
3332         dma_addr_t cmd_desc_dma_addr;
3333         dma_addr_t cmd_desc_element_addr;
3334         u16 response_offset;
3335         u16 prdt_offset;
3336         int cmd_desc_size;
3337         int i;
3338
3339         utrdlp = hba->utrdl_base_addr;
3340         cmd_descp = hba->ucdl_base_addr;
3341
3342         response_offset =
3343                 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3344         prdt_offset =
3345                 offsetof(struct utp_transfer_cmd_desc, prd_table);
3346
3347         cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3348         cmd_desc_dma_addr = hba->ucdl_dma_addr;
3349
3350         for (i = 0; i < hba->nutrs; i++) {
3351                 /* Configure UTRD with command descriptor base address */
3352                 cmd_desc_element_addr =
3353                                 (cmd_desc_dma_addr + (cmd_desc_size * i));
3354                 utrdlp[i].command_desc_base_addr_lo =
3355                                 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3356                 utrdlp[i].command_desc_base_addr_hi =
3357                                 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3358
3359                 /* Response upiu and prdt offset should be in double words */
3360                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3361                         utrdlp[i].response_upiu_offset =
3362                                 cpu_to_le16(response_offset);
3363                         utrdlp[i].prd_table_offset =
3364                                 cpu_to_le16(prdt_offset);
3365                         utrdlp[i].response_upiu_length =
3366                                 cpu_to_le16(ALIGNED_UPIU_SIZE);
3367                 } else {
3368                         utrdlp[i].response_upiu_offset =
3369                                 cpu_to_le16((response_offset >> 2));
3370                         utrdlp[i].prd_table_offset =
3371                                 cpu_to_le16((prdt_offset >> 2));
3372                         utrdlp[i].response_upiu_length =
3373                                 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3374                 }
3375
3376                 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
3377                 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3378                                 (i * sizeof(struct utp_transfer_req_desc));
3379                 hba->lrb[i].ucd_req_ptr =
3380                         (struct utp_upiu_req *)(cmd_descp + i);
3381                 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
3382                 hba->lrb[i].ucd_rsp_ptr =
3383                         (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
3384                 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3385                                 response_offset;
3386                 hba->lrb[i].ucd_prdt_ptr =
3387                         (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
3388                 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3389                                 prdt_offset;
3390         }
3391 }
3392
3393 /**
3394  * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3395  * @hba: per adapter instance
3396  *
3397  * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3398  * in order to initialize the Unipro link startup procedure.
3399  * Once the Unipro links are up, the device connected to the controller
3400  * is detected.
3401  *
3402  * Returns 0 on success, non-zero value on failure
3403  */
3404 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3405 {
3406         struct uic_command uic_cmd = {0};
3407         int ret;
3408
3409         uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3410
3411         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3412         if (ret)
3413                 dev_dbg(hba->dev,
3414                         "dme-link-startup: error code %d\n", ret);
3415         return ret;
3416 }
3417 /**
3418  * ufshcd_dme_reset - UIC command for DME_RESET
3419  * @hba: per adapter instance
3420  *
3421  * DME_RESET command is issued in order to reset UniPro stack.
3422  * This function now deal with cold reset.
3423  *
3424  * Returns 0 on success, non-zero value on failure
3425  */
3426 static int ufshcd_dme_reset(struct ufs_hba *hba)
3427 {
3428         struct uic_command uic_cmd = {0};
3429         int ret;
3430
3431         uic_cmd.command = UIC_CMD_DME_RESET;
3432
3433         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3434         if (ret)
3435                 dev_err(hba->dev,
3436                         "dme-reset: error code %d\n", ret);
3437
3438         return ret;
3439 }
3440
3441 /**
3442  * ufshcd_dme_enable - UIC command for DME_ENABLE
3443  * @hba: per adapter instance
3444  *
3445  * DME_ENABLE command is issued in order to enable UniPro stack.
3446  *
3447  * Returns 0 on success, non-zero value on failure
3448  */
3449 static int ufshcd_dme_enable(struct ufs_hba *hba)
3450 {
3451         struct uic_command uic_cmd = {0};
3452         int ret;
3453
3454         uic_cmd.command = UIC_CMD_DME_ENABLE;
3455
3456         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3457         if (ret)
3458                 dev_err(hba->dev,
3459                         "dme-reset: error code %d\n", ret);
3460
3461         return ret;
3462 }
3463
3464 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3465 {
3466         #define MIN_DELAY_BEFORE_DME_CMDS_US    1000
3467         unsigned long min_sleep_time_us;
3468
3469         if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3470                 return;
3471
3472         /*
3473          * last_dme_cmd_tstamp will be 0 only for 1st call to
3474          * this function
3475          */
3476         if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3477                 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3478         } else {
3479                 unsigned long delta =
3480                         (unsigned long) ktime_to_us(
3481                                 ktime_sub(ktime_get(),
3482                                 hba->last_dme_cmd_tstamp));
3483
3484                 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3485                         min_sleep_time_us =
3486                                 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3487                 else
3488                         return; /* no more delay required */
3489         }
3490
3491         /* allow sleep for extra 50us if needed */
3492         usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3493 }
3494
3495 /**
3496  * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3497  * @hba: per adapter instance
3498  * @attr_sel: uic command argument1
3499  * @attr_set: attribute set type as uic command argument2
3500  * @mib_val: setting value as uic command argument3
3501  * @peer: indicate whether peer or local
3502  *
3503  * Returns 0 on success, non-zero value on failure
3504  */
3505 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3506                         u8 attr_set, u32 mib_val, u8 peer)
3507 {
3508         struct uic_command uic_cmd = {0};
3509         static const char *const action[] = {
3510                 "dme-set",
3511                 "dme-peer-set"
3512         };
3513         const char *set = action[!!peer];
3514         int ret;
3515         int retries = UFS_UIC_COMMAND_RETRIES;
3516
3517         uic_cmd.command = peer ?
3518                 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3519         uic_cmd.argument1 = attr_sel;
3520         uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3521         uic_cmd.argument3 = mib_val;
3522
3523         do {
3524                 /* for peer attributes we retry upon failure */
3525                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3526                 if (ret)
3527                         dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3528                                 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3529         } while (ret && peer && --retries);
3530
3531         if (ret)
3532                 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3533                         set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3534                         UFS_UIC_COMMAND_RETRIES - retries);
3535
3536         return ret;
3537 }
3538 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3539
3540 /**
3541  * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3542  * @hba: per adapter instance
3543  * @attr_sel: uic command argument1
3544  * @mib_val: the value of the attribute as returned by the UIC command
3545  * @peer: indicate whether peer or local
3546  *
3547  * Returns 0 on success, non-zero value on failure
3548  */
3549 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3550                         u32 *mib_val, u8 peer)
3551 {
3552         struct uic_command uic_cmd = {0};
3553         static const char *const action[] = {
3554                 "dme-get",
3555                 "dme-peer-get"
3556         };
3557         const char *get = action[!!peer];
3558         int ret;
3559         int retries = UFS_UIC_COMMAND_RETRIES;
3560         struct ufs_pa_layer_attr orig_pwr_info;
3561         struct ufs_pa_layer_attr temp_pwr_info;
3562         bool pwr_mode_change = false;
3563
3564         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3565                 orig_pwr_info = hba->pwr_info;
3566                 temp_pwr_info = orig_pwr_info;
3567
3568                 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3569                     orig_pwr_info.pwr_rx == FAST_MODE) {
3570                         temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3571                         temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3572                         pwr_mode_change = true;
3573                 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3574                     orig_pwr_info.pwr_rx == SLOW_MODE) {
3575                         temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3576                         temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3577                         pwr_mode_change = true;
3578                 }
3579                 if (pwr_mode_change) {
3580                         ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3581                         if (ret)
3582                                 goto out;
3583                 }
3584         }
3585
3586         uic_cmd.command = peer ?
3587                 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3588         uic_cmd.argument1 = attr_sel;
3589
3590         do {
3591                 /* for peer attributes we retry upon failure */
3592                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3593                 if (ret)
3594                         dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3595                                 get, UIC_GET_ATTR_ID(attr_sel), ret);
3596         } while (ret && peer && --retries);
3597
3598         if (ret)
3599                 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3600                         get, UIC_GET_ATTR_ID(attr_sel),
3601                         UFS_UIC_COMMAND_RETRIES - retries);
3602
3603         if (mib_val && !ret)
3604                 *mib_val = uic_cmd.argument3;
3605
3606         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3607             && pwr_mode_change)
3608                 ufshcd_change_power_mode(hba, &orig_pwr_info);
3609 out:
3610         return ret;
3611 }
3612 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3613
3614 /**
3615  * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3616  * state) and waits for it to take effect.
3617  *
3618  * @hba: per adapter instance
3619  * @cmd: UIC command to execute
3620  *
3621  * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3622  * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3623  * and device UniPro link and hence it's final completion would be indicated by
3624  * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3625  * addition to normal UIC command completion Status (UCCS). This function only
3626  * returns after the relevant status bits indicate the completion.
3627  *
3628  * Returns 0 on success, non-zero value on failure
3629  */
3630 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3631 {
3632         struct completion uic_async_done;
3633         unsigned long flags;
3634         u8 status;
3635         int ret;
3636         bool reenable_intr = false;
3637
3638         mutex_lock(&hba->uic_cmd_mutex);
3639         init_completion(&uic_async_done);
3640         ufshcd_add_delay_before_dme_cmd(hba);
3641
3642         spin_lock_irqsave(hba->host->host_lock, flags);
3643         hba->uic_async_done = &uic_async_done;
3644         if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3645                 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3646                 /*
3647                  * Make sure UIC command completion interrupt is disabled before
3648                  * issuing UIC command.
3649                  */
3650                 wmb();
3651                 reenable_intr = true;
3652         }
3653         ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3654         spin_unlock_irqrestore(hba->host->host_lock, flags);
3655         if (ret) {
3656                 dev_err(hba->dev,
3657                         "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3658                         cmd->command, cmd->argument3, ret);
3659                 goto out;
3660         }
3661
3662         if (!wait_for_completion_timeout(hba->uic_async_done,
3663                                          msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3664                 dev_err(hba->dev,
3665                         "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3666                         cmd->command, cmd->argument3);
3667                 ret = -ETIMEDOUT;
3668                 goto out;
3669         }
3670
3671         status = ufshcd_get_upmcrs(hba);
3672         if (status != PWR_LOCAL) {
3673                 dev_err(hba->dev,
3674                         "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3675                         cmd->command, status);
3676                 ret = (status != PWR_OK) ? status : -1;
3677         }
3678 out:
3679         if (ret) {
3680                 ufshcd_print_host_state(hba);
3681                 ufshcd_print_pwr_info(hba);
3682                 ufshcd_print_host_regs(hba);
3683         }
3684
3685         spin_lock_irqsave(hba->host->host_lock, flags);
3686         hba->active_uic_cmd = NULL;
3687         hba->uic_async_done = NULL;
3688         if (reenable_intr)
3689                 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
3690         spin_unlock_irqrestore(hba->host->host_lock, flags);
3691         mutex_unlock(&hba->uic_cmd_mutex);
3692
3693         return ret;
3694 }
3695
3696 /**
3697  * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3698  *                              using DME_SET primitives.
3699  * @hba: per adapter instance
3700  * @mode: powr mode value
3701  *
3702  * Returns 0 on success, non-zero value on failure
3703  */
3704 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
3705 {
3706         struct uic_command uic_cmd = {0};
3707         int ret;
3708
3709         if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3710                 ret = ufshcd_dme_set(hba,
3711                                 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3712                 if (ret) {
3713                         dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3714                                                 __func__, ret);
3715                         goto out;
3716                 }
3717         }
3718
3719         uic_cmd.command = UIC_CMD_DME_SET;
3720         uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3721         uic_cmd.argument3 = mode;
3722         ufshcd_hold(hba, false);
3723         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3724         ufshcd_release(hba);
3725
3726 out:
3727         return ret;
3728 }
3729
3730 static int ufshcd_link_recovery(struct ufs_hba *hba)
3731 {
3732         int ret;
3733         unsigned long flags;
3734
3735         spin_lock_irqsave(hba->host->host_lock, flags);
3736         hba->ufshcd_state = UFSHCD_STATE_RESET;
3737         ufshcd_set_eh_in_progress(hba);
3738         spin_unlock_irqrestore(hba->host->host_lock, flags);
3739
3740         ret = ufshcd_host_reset_and_restore(hba);
3741
3742         spin_lock_irqsave(hba->host->host_lock, flags);
3743         if (ret)
3744                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3745         ufshcd_clear_eh_in_progress(hba);
3746         spin_unlock_irqrestore(hba->host->host_lock, flags);
3747
3748         if (ret)
3749                 dev_err(hba->dev, "%s: link recovery failed, err %d",
3750                         __func__, ret);
3751
3752         return ret;
3753 }
3754
3755 static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3756 {
3757         int ret;
3758         struct uic_command uic_cmd = {0};
3759         ktime_t start = ktime_get();
3760
3761         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3762
3763         uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
3764         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3765         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3766                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3767
3768         if (ret) {
3769                 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3770                         __func__, ret);
3771
3772                 /*
3773                  * If link recovery fails then return error so that caller
3774                  * don't retry the hibern8 enter again.
3775                  */
3776                 if (ufshcd_link_recovery(hba))
3777                         ret = -ENOLINK;
3778         } else
3779                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3780                                                                 POST_CHANGE);
3781
3782         return ret;
3783 }
3784
3785 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3786 {
3787         int ret = 0, retries;
3788
3789         for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3790                 ret = __ufshcd_uic_hibern8_enter(hba);
3791                 if (!ret || ret == -ENOLINK)
3792                         goto out;
3793         }
3794 out:
3795         return ret;
3796 }
3797
3798 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3799 {
3800         struct uic_command uic_cmd = {0};
3801         int ret;
3802         ktime_t start = ktime_get();
3803
3804         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3805
3806         uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3807         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3808         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3809                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3810
3811         if (ret) {
3812                 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3813                         __func__, ret);
3814                 ret = ufshcd_link_recovery(hba);
3815         } else {
3816                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3817                                                                 POST_CHANGE);
3818                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3819                 hba->ufs_stats.hibern8_exit_cnt++;
3820         }
3821
3822         return ret;
3823 }
3824
3825 static void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3826 {
3827         unsigned long flags;
3828
3829         if (!(hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) || !hba->ahit)
3830                 return;
3831
3832         spin_lock_irqsave(hba->host->host_lock, flags);
3833         ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3834         spin_unlock_irqrestore(hba->host->host_lock, flags);
3835 }
3836
3837  /**
3838  * ufshcd_init_pwr_info - setting the POR (power on reset)
3839  * values in hba power info
3840  * @hba: per-adapter instance
3841  */
3842 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3843 {
3844         hba->pwr_info.gear_rx = UFS_PWM_G1;
3845         hba->pwr_info.gear_tx = UFS_PWM_G1;
3846         hba->pwr_info.lane_rx = 1;
3847         hba->pwr_info.lane_tx = 1;
3848         hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3849         hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3850         hba->pwr_info.hs_rate = 0;
3851 }
3852
3853 /**
3854  * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3855  * @hba: per-adapter instance
3856  */
3857 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
3858 {
3859         struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3860
3861         if (hba->max_pwr_info.is_valid)
3862                 return 0;
3863
3864         pwr_info->pwr_tx = FAST_MODE;
3865         pwr_info->pwr_rx = FAST_MODE;
3866         pwr_info->hs_rate = PA_HS_MODE_B;
3867
3868         /* Get the connected lane count */
3869         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3870                         &pwr_info->lane_rx);
3871         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3872                         &pwr_info->lane_tx);
3873
3874         if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3875                 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3876                                 __func__,
3877                                 pwr_info->lane_rx,
3878                                 pwr_info->lane_tx);
3879                 return -EINVAL;
3880         }
3881
3882         /*
3883          * First, get the maximum gears of HS speed.
3884          * If a zero value, it means there is no HSGEAR capability.
3885          * Then, get the maximum gears of PWM speed.
3886          */
3887         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3888         if (!pwr_info->gear_rx) {
3889                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3890                                 &pwr_info->gear_rx);
3891                 if (!pwr_info->gear_rx) {
3892                         dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3893                                 __func__, pwr_info->gear_rx);
3894                         return -EINVAL;
3895                 }
3896                 pwr_info->pwr_rx = SLOW_MODE;
3897         }
3898
3899         ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3900                         &pwr_info->gear_tx);
3901         if (!pwr_info->gear_tx) {
3902                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3903                                 &pwr_info->gear_tx);
3904                 if (!pwr_info->gear_tx) {
3905                         dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3906                                 __func__, pwr_info->gear_tx);
3907                         return -EINVAL;
3908                 }
3909                 pwr_info->pwr_tx = SLOW_MODE;
3910         }
3911
3912         hba->max_pwr_info.is_valid = true;
3913         return 0;
3914 }
3915
3916 static int ufshcd_change_power_mode(struct ufs_hba *hba,
3917                              struct ufs_pa_layer_attr *pwr_mode)
3918 {
3919         int ret;
3920
3921         /* if already configured to the requested pwr_mode */
3922         if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
3923             pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
3924             pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
3925             pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
3926             pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
3927             pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
3928             pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
3929                 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
3930                 return 0;
3931         }
3932
3933         /*
3934          * Configure attributes for power mode change with below.
3935          * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
3936          * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
3937          * - PA_HSSERIES
3938          */
3939         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
3940         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
3941                         pwr_mode->lane_rx);
3942         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
3943                         pwr_mode->pwr_rx == FAST_MODE)
3944                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
3945         else
3946                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
3947
3948         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
3949         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
3950                         pwr_mode->lane_tx);
3951         if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
3952                         pwr_mode->pwr_tx == FAST_MODE)
3953                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
3954         else
3955                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
3956
3957         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
3958             pwr_mode->pwr_tx == FASTAUTO_MODE ||
3959             pwr_mode->pwr_rx == FAST_MODE ||
3960             pwr_mode->pwr_tx == FAST_MODE)
3961                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
3962                                                 pwr_mode->hs_rate);
3963
3964         ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
3965                         | pwr_mode->pwr_tx);
3966
3967         if (ret) {
3968                 dev_err(hba->dev,
3969                         "%s: power mode change failed %d\n", __func__, ret);
3970         } else {
3971                 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
3972                                                                 pwr_mode);
3973
3974                 memcpy(&hba->pwr_info, pwr_mode,
3975                         sizeof(struct ufs_pa_layer_attr));
3976         }
3977
3978         return ret;
3979 }
3980
3981 /**
3982  * ufshcd_config_pwr_mode - configure a new power mode
3983  * @hba: per-adapter instance
3984  * @desired_pwr_mode: desired power configuration
3985  */
3986 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
3987                 struct ufs_pa_layer_attr *desired_pwr_mode)
3988 {
3989         struct ufs_pa_layer_attr final_params = { 0 };
3990         int ret;
3991
3992         ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
3993                                         desired_pwr_mode, &final_params);
3994
3995         if (ret)
3996                 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
3997
3998         ret = ufshcd_change_power_mode(hba, &final_params);
3999         if (!ret)
4000                 ufshcd_print_pwr_info(hba);
4001
4002         return ret;
4003 }
4004 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4005
4006 /**
4007  * ufshcd_complete_dev_init() - checks device readiness
4008  * @hba: per-adapter instance
4009  *
4010  * Set fDeviceInit flag and poll until device toggles it.
4011  */
4012 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4013 {
4014         int i;
4015         int err;
4016         bool flag_res = 1;
4017
4018         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4019                 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
4020         if (err) {
4021                 dev_err(hba->dev,
4022                         "%s setting fDeviceInit flag failed with error %d\n",
4023                         __func__, err);
4024                 goto out;
4025         }
4026
4027         /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4028         for (i = 0; i < 1000 && !err && flag_res; i++)
4029                 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4030                         QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4031
4032         if (err)
4033                 dev_err(hba->dev,
4034                         "%s reading fDeviceInit flag failed with error %d\n",
4035                         __func__, err);
4036         else if (flag_res)
4037                 dev_err(hba->dev,
4038                         "%s fDeviceInit was not cleared by the device\n",
4039                         __func__);
4040
4041 out:
4042         return err;
4043 }
4044
4045 /**
4046  * ufshcd_make_hba_operational - Make UFS controller operational
4047  * @hba: per adapter instance
4048  *
4049  * To bring UFS host controller to operational state,
4050  * 1. Enable required interrupts
4051  * 2. Configure interrupt aggregation
4052  * 3. Program UTRL and UTMRL base address
4053  * 4. Configure run-stop-registers
4054  *
4055  * Returns 0 on success, non-zero value on failure
4056  */
4057 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4058 {
4059         int err = 0;
4060         u32 reg;
4061
4062         /* Enable required interrupts */
4063         ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4064
4065         /* Configure interrupt aggregation */
4066         if (ufshcd_is_intr_aggr_allowed(hba))
4067                 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4068         else
4069                 ufshcd_disable_intr_aggr(hba);
4070
4071         /* Configure UTRL and UTMRL base address registers */
4072         ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4073                         REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4074         ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4075                         REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4076         ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4077                         REG_UTP_TASK_REQ_LIST_BASE_L);
4078         ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4079                         REG_UTP_TASK_REQ_LIST_BASE_H);
4080
4081         /*
4082          * Make sure base address and interrupt setup are updated before
4083          * enabling the run/stop registers below.
4084          */
4085         wmb();
4086
4087         /*
4088          * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4089          */
4090         reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4091         if (!(ufshcd_get_lists_status(reg))) {
4092                 ufshcd_enable_run_stop_reg(hba);
4093         } else {
4094                 dev_err(hba->dev,
4095                         "Host controller not ready to process requests");
4096                 err = -EIO;
4097                 goto out;
4098         }
4099
4100 out:
4101         return err;
4102 }
4103
4104 /**
4105  * ufshcd_hba_stop - Send controller to reset state
4106  * @hba: per adapter instance
4107  * @can_sleep: perform sleep or just spin
4108  */
4109 static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4110 {
4111         int err;
4112
4113         ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
4114         err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4115                                         CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4116                                         10, 1, can_sleep);
4117         if (err)
4118                 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4119 }
4120
4121 /**
4122  * ufshcd_hba_execute_hce - initialize the controller
4123  * @hba: per adapter instance
4124  *
4125  * The controller resets itself and controller firmware initialization
4126  * sequence kicks off. When controller is ready it will set
4127  * the Host Controller Enable bit to 1.
4128  *
4129  * Returns 0 on success, non-zero value on failure
4130  */
4131 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4132 {
4133         int retry;
4134
4135         /*
4136          * msleep of 1 and 5 used in this function might result in msleep(20),
4137          * but it was necessary to send the UFS FPGA to reset mode during
4138          * development and testing of this driver. msleep can be changed to
4139          * mdelay and retry count can be reduced based on the controller.
4140          */
4141         if (!ufshcd_is_hba_active(hba))
4142                 /* change controller state to "reset state" */
4143                 ufshcd_hba_stop(hba, true);
4144
4145         /* UniPro link is disabled at this point */
4146         ufshcd_set_link_off(hba);
4147
4148         ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4149
4150         /* start controller initialization sequence */
4151         ufshcd_hba_start(hba);
4152
4153         /*
4154          * To initialize a UFS host controller HCE bit must be set to 1.
4155          * During initialization the HCE bit value changes from 1->0->1.
4156          * When the host controller completes initialization sequence
4157          * it sets the value of HCE bit to 1. The same HCE bit is read back
4158          * to check if the controller has completed initialization sequence.
4159          * So without this delay the value HCE = 1, set in the previous
4160          * instruction might be read back.
4161          * This delay can be changed based on the controller.
4162          */
4163         msleep(1);
4164
4165         /* wait for the host controller to complete initialization */
4166         retry = 10;
4167         while (ufshcd_is_hba_active(hba)) {
4168                 if (retry) {
4169                         retry--;
4170                 } else {
4171                         dev_err(hba->dev,
4172                                 "Controller enable failed\n");
4173                         return -EIO;
4174                 }
4175                 msleep(5);
4176         }
4177
4178         /* enable UIC related interrupts */
4179         ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4180
4181         ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4182
4183         return 0;
4184 }
4185
4186 static int ufshcd_hba_enable(struct ufs_hba *hba)
4187 {
4188         int ret;
4189
4190         if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4191                 ufshcd_set_link_off(hba);
4192                 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4193
4194                 /* enable UIC related interrupts */
4195                 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4196                 ret = ufshcd_dme_reset(hba);
4197                 if (!ret) {
4198                         ret = ufshcd_dme_enable(hba);
4199                         if (!ret)
4200                                 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4201                         if (ret)
4202                                 dev_err(hba->dev,
4203                                         "Host controller enable failed with non-hce\n");
4204                 }
4205         } else {
4206                 ret = ufshcd_hba_execute_hce(hba);
4207         }
4208
4209         return ret;
4210 }
4211 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4212 {
4213         int tx_lanes, i, err = 0;
4214
4215         if (!peer)
4216                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4217                                &tx_lanes);
4218         else
4219                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4220                                     &tx_lanes);
4221         for (i = 0; i < tx_lanes; i++) {
4222                 if (!peer)
4223                         err = ufshcd_dme_set(hba,
4224                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4225                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4226                                         0);
4227                 else
4228                         err = ufshcd_dme_peer_set(hba,
4229                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4230                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4231                                         0);
4232                 if (err) {
4233                         dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4234                                 __func__, peer, i, err);
4235                         break;
4236                 }
4237         }
4238
4239         return err;
4240 }
4241
4242 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4243 {
4244         return ufshcd_disable_tx_lcc(hba, true);
4245 }
4246
4247 /**
4248  * ufshcd_link_startup - Initialize unipro link startup
4249  * @hba: per adapter instance
4250  *
4251  * Returns 0 for success, non-zero in case of failure
4252  */
4253 static int ufshcd_link_startup(struct ufs_hba *hba)
4254 {
4255         int ret;
4256         int retries = DME_LINKSTARTUP_RETRIES;
4257         bool link_startup_again = false;
4258
4259         /*
4260          * If UFS device isn't active then we will have to issue link startup
4261          * 2 times to make sure the device state move to active.
4262          */
4263         if (!ufshcd_is_ufs_dev_active(hba))
4264                 link_startup_again = true;
4265
4266 link_startup:
4267         do {
4268                 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4269
4270                 ret = ufshcd_dme_link_startup(hba);
4271
4272                 /* check if device is detected by inter-connect layer */
4273                 if (!ret && !ufshcd_is_device_present(hba)) {
4274                         dev_err(hba->dev, "%s: Device not present\n", __func__);
4275                         ret = -ENXIO;
4276                         goto out;
4277                 }
4278
4279                 /*
4280                  * DME link lost indication is only received when link is up,
4281                  * but we can't be sure if the link is up until link startup
4282                  * succeeds. So reset the local Uni-Pro and try again.
4283                  */
4284                 if (ret && ufshcd_hba_enable(hba))
4285                         goto out;
4286         } while (ret && retries--);
4287
4288         if (ret)
4289                 /* failed to get the link up... retire */
4290                 goto out;
4291
4292         if (link_startup_again) {
4293                 link_startup_again = false;
4294                 retries = DME_LINKSTARTUP_RETRIES;
4295                 goto link_startup;
4296         }
4297
4298         /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4299         ufshcd_init_pwr_info(hba);
4300         ufshcd_print_pwr_info(hba);
4301
4302         if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4303                 ret = ufshcd_disable_device_tx_lcc(hba);
4304                 if (ret)
4305                         goto out;
4306         }
4307
4308         /* Include any host controller configuration via UIC commands */
4309         ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4310         if (ret)
4311                 goto out;
4312
4313         ret = ufshcd_make_hba_operational(hba);
4314 out:
4315         if (ret) {
4316                 dev_err(hba->dev, "link startup failed %d\n", ret);
4317                 ufshcd_print_host_state(hba);
4318                 ufshcd_print_pwr_info(hba);
4319                 ufshcd_print_host_regs(hba);
4320         }
4321         return ret;
4322 }
4323
4324 /**
4325  * ufshcd_verify_dev_init() - Verify device initialization
4326  * @hba: per-adapter instance
4327  *
4328  * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4329  * device Transport Protocol (UTP) layer is ready after a reset.
4330  * If the UTP layer at the device side is not initialized, it may
4331  * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4332  * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4333  */
4334 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4335 {
4336         int err = 0;
4337         int retries;
4338
4339         ufshcd_hold(hba, false);
4340         mutex_lock(&hba->dev_cmd.lock);
4341         for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4342                 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4343                                                NOP_OUT_TIMEOUT);
4344
4345                 if (!err || err == -ETIMEDOUT)
4346                         break;
4347
4348                 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4349         }
4350         mutex_unlock(&hba->dev_cmd.lock);
4351         ufshcd_release(hba);
4352
4353         if (err)
4354                 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4355         return err;
4356 }
4357
4358 /**
4359  * ufshcd_set_queue_depth - set lun queue depth
4360  * @sdev: pointer to SCSI device
4361  *
4362  * Read bLUQueueDepth value and activate scsi tagged command
4363  * queueing. For WLUN, queue depth is set to 1. For best-effort
4364  * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4365  * value that host can queue.
4366  */
4367 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4368 {
4369         int ret = 0;
4370         u8 lun_qdepth;
4371         struct ufs_hba *hba;
4372
4373         hba = shost_priv(sdev->host);
4374
4375         lun_qdepth = hba->nutrs;
4376         ret = ufshcd_read_unit_desc_param(hba,
4377                                           ufshcd_scsi_to_upiu_lun(sdev->lun),
4378                                           UNIT_DESC_PARAM_LU_Q_DEPTH,
4379                                           &lun_qdepth,
4380                                           sizeof(lun_qdepth));
4381
4382         /* Some WLUN doesn't support unit descriptor */
4383         if (ret == -EOPNOTSUPP)
4384                 lun_qdepth = 1;
4385         else if (!lun_qdepth)
4386                 /* eventually, we can figure out the real queue depth */
4387                 lun_qdepth = hba->nutrs;
4388         else
4389                 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4390
4391         dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4392                         __func__, lun_qdepth);
4393         scsi_change_queue_depth(sdev, lun_qdepth);
4394 }
4395
4396 /*
4397  * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4398  * @hba: per-adapter instance
4399  * @lun: UFS device lun id
4400  * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4401  *
4402  * Returns 0 in case of success and b_lu_write_protect status would be returned
4403  * @b_lu_write_protect parameter.
4404  * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4405  * Returns -EINVAL in case of invalid parameters passed to this function.
4406  */
4407 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4408                             u8 lun,
4409                             u8 *b_lu_write_protect)
4410 {
4411         int ret;
4412
4413         if (!b_lu_write_protect)
4414                 ret = -EINVAL;
4415         /*
4416          * According to UFS device spec, RPMB LU can't be write
4417          * protected so skip reading bLUWriteProtect parameter for
4418          * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4419          */
4420         else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4421                 ret = -ENOTSUPP;
4422         else
4423                 ret = ufshcd_read_unit_desc_param(hba,
4424                                           lun,
4425                                           UNIT_DESC_PARAM_LU_WR_PROTECT,
4426                                           b_lu_write_protect,
4427                                           sizeof(*b_lu_write_protect));
4428         return ret;
4429 }
4430
4431 /**
4432  * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4433  * status
4434  * @hba: per-adapter instance
4435  * @sdev: pointer to SCSI device
4436  *
4437  */
4438 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4439                                                     struct scsi_device *sdev)
4440 {
4441         if (hba->dev_info.f_power_on_wp_en &&
4442             !hba->dev_info.is_lu_power_on_wp) {
4443                 u8 b_lu_write_protect;
4444
4445                 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4446                                       &b_lu_write_protect) &&
4447                     (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4448                         hba->dev_info.is_lu_power_on_wp = true;
4449         }
4450 }
4451
4452 /**
4453  * ufshcd_slave_alloc - handle initial SCSI device configurations
4454  * @sdev: pointer to SCSI device
4455  *
4456  * Returns success
4457  */
4458 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4459 {
4460         struct ufs_hba *hba;
4461
4462         hba = shost_priv(sdev->host);
4463
4464         /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4465         sdev->use_10_for_ms = 1;
4466
4467         /* allow SCSI layer to restart the device in case of errors */
4468         sdev->allow_restart = 1;
4469
4470         /* REPORT SUPPORTED OPERATION CODES is not supported */
4471         sdev->no_report_opcodes = 1;
4472
4473         /* WRITE_SAME command is not supported */
4474         sdev->no_write_same = 1;
4475
4476         ufshcd_set_queue_depth(sdev);
4477
4478         ufshcd_get_lu_power_on_wp_status(hba, sdev);
4479
4480         return 0;
4481 }
4482
4483 /**
4484  * ufshcd_change_queue_depth - change queue depth
4485  * @sdev: pointer to SCSI device
4486  * @depth: required depth to set
4487  *
4488  * Change queue depth and make sure the max. limits are not crossed.
4489  */
4490 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4491 {
4492         struct ufs_hba *hba = shost_priv(sdev->host);
4493
4494         if (depth > hba->nutrs)
4495                 depth = hba->nutrs;
4496         return scsi_change_queue_depth(sdev, depth);
4497 }
4498
4499 /**
4500  * ufshcd_slave_configure - adjust SCSI device configurations
4501  * @sdev: pointer to SCSI device
4502  */
4503 static int ufshcd_slave_configure(struct scsi_device *sdev)
4504 {
4505         struct request_queue *q = sdev->request_queue;
4506
4507         blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4508         blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4509
4510         return 0;
4511 }
4512
4513 /**
4514  * ufshcd_slave_destroy - remove SCSI device configurations
4515  * @sdev: pointer to SCSI device
4516  */
4517 static void ufshcd_slave_destroy(struct scsi_device *sdev)
4518 {
4519         struct ufs_hba *hba;
4520
4521         hba = shost_priv(sdev->host);
4522         /* Drop the reference as it won't be needed anymore */
4523         if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4524                 unsigned long flags;
4525
4526                 spin_lock_irqsave(hba->host->host_lock, flags);
4527                 hba->sdev_ufs_device = NULL;
4528                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4529         }
4530 }
4531
4532 /**
4533  * ufshcd_task_req_compl - handle task management request completion
4534  * @hba: per adapter instance
4535  * @index: index of the completed request
4536  * @resp: task management service response
4537  *
4538  * Returns non-zero value on error, zero on success
4539  */
4540 static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
4541 {
4542         struct utp_task_req_desc *task_req_descp;
4543         struct utp_upiu_task_rsp *task_rsp_upiup;
4544         unsigned long flags;
4545         int ocs_value;
4546         int task_result;
4547
4548         spin_lock_irqsave(hba->host->host_lock, flags);
4549
4550         /* Clear completed tasks from outstanding_tasks */
4551         __clear_bit(index, &hba->outstanding_tasks);
4552
4553         task_req_descp = hba->utmrdl_base_addr;
4554         ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
4555
4556         if (ocs_value == OCS_SUCCESS) {
4557                 task_rsp_upiup = (struct utp_upiu_task_rsp *)
4558                                 task_req_descp[index].task_rsp_upiu;
4559                 task_result = be32_to_cpu(task_rsp_upiup->output_param1);
4560                 task_result = task_result & MASK_TM_SERVICE_RESP;
4561                 if (resp)
4562                         *resp = (u8)task_result;
4563         } else {
4564                 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
4565                                 __func__, ocs_value);
4566         }
4567         spin_unlock_irqrestore(hba->host->host_lock, flags);
4568
4569         return ocs_value;
4570 }
4571
4572 /**
4573  * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4574  * @lrbp: pointer to local reference block of completed command
4575  * @scsi_status: SCSI command status
4576  *
4577  * Returns value base on SCSI command status
4578  */
4579 static inline int
4580 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4581 {
4582         int result = 0;
4583
4584         switch (scsi_status) {
4585         case SAM_STAT_CHECK_CONDITION:
4586                 ufshcd_copy_sense_data(lrbp);
4587         case SAM_STAT_GOOD:
4588                 result |= DID_OK << 16 |
4589                           COMMAND_COMPLETE << 8 |
4590                           scsi_status;
4591                 break;
4592         case SAM_STAT_TASK_SET_FULL:
4593         case SAM_STAT_BUSY:
4594         case SAM_STAT_TASK_ABORTED:
4595                 ufshcd_copy_sense_data(lrbp);
4596                 result |= scsi_status;
4597                 break;
4598         default:
4599                 result |= DID_ERROR << 16;
4600                 break;
4601         } /* end of switch */
4602
4603         return result;
4604 }
4605
4606 /**
4607  * ufshcd_transfer_rsp_status - Get overall status of the response
4608  * @hba: per adapter instance
4609  * @lrbp: pointer to local reference block of completed command
4610  *
4611  * Returns result of the command to notify SCSI midlayer
4612  */
4613 static inline int
4614 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4615 {
4616         int result = 0;
4617         int scsi_status;
4618         int ocs;
4619
4620         /* overall command status of utrd */
4621         ocs = ufshcd_get_tr_ocs(lrbp);
4622
4623         switch (ocs) {
4624         case OCS_SUCCESS:
4625                 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
4626                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
4627                 switch (result) {
4628                 case UPIU_TRANSACTION_RESPONSE:
4629                         /*
4630                          * get the response UPIU result to extract
4631                          * the SCSI command status
4632                          */
4633                         result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4634
4635                         /*
4636                          * get the result based on SCSI status response
4637                          * to notify the SCSI midlayer of the command status
4638                          */
4639                         scsi_status = result & MASK_SCSI_STATUS;
4640                         result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
4641
4642                         /*
4643                          * Currently we are only supporting BKOPs exception
4644                          * events hence we can ignore BKOPs exception event
4645                          * during power management callbacks. BKOPs exception
4646                          * event is not expected to be raised in runtime suspend
4647                          * callback as it allows the urgent bkops.
4648                          * During system suspend, we are anyway forcefully
4649                          * disabling the bkops and if urgent bkops is needed
4650                          * it will be enabled on system resume. Long term
4651                          * solution could be to abort the system suspend if
4652                          * UFS device needs urgent BKOPs.
4653                          */
4654                         if (!hba->pm_op_in_progress &&
4655                             ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
4656                                 schedule_work(&hba->eeh_work);
4657                         break;
4658                 case UPIU_TRANSACTION_REJECT_UPIU:
4659                         /* TODO: handle Reject UPIU Response */
4660                         result = DID_ERROR << 16;
4661                         dev_err(hba->dev,
4662                                 "Reject UPIU not fully implemented\n");
4663                         break;
4664                 default:
4665                         result = DID_ERROR << 16;
4666                         dev_err(hba->dev,
4667                                 "Unexpected request response code = %x\n",
4668                                 result);
4669                         break;
4670                 }
4671                 break;
4672         case OCS_ABORTED:
4673                 result |= DID_ABORT << 16;
4674                 break;
4675         case OCS_INVALID_COMMAND_STATUS:
4676                 result |= DID_REQUEUE << 16;
4677                 break;
4678         case OCS_INVALID_CMD_TABLE_ATTR:
4679         case OCS_INVALID_PRDT_ATTR:
4680         case OCS_MISMATCH_DATA_BUF_SIZE:
4681         case OCS_MISMATCH_RESP_UPIU_SIZE:
4682         case OCS_PEER_COMM_FAILURE:
4683         case OCS_FATAL_ERROR:
4684         default:
4685                 result |= DID_ERROR << 16;
4686                 dev_err(hba->dev,
4687                                 "OCS error from controller = %x for tag %d\n",
4688                                 ocs, lrbp->task_tag);
4689                 ufshcd_print_host_regs(hba);
4690                 ufshcd_print_host_state(hba);
4691                 break;
4692         } /* end of switch */
4693
4694         if (host_byte(result) != DID_OK)
4695                 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
4696         return result;
4697 }
4698
4699 /**
4700  * ufshcd_uic_cmd_compl - handle completion of uic command
4701  * @hba: per adapter instance
4702  * @intr_status: interrupt status generated by the controller
4703  */
4704 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
4705 {
4706         if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
4707                 hba->active_uic_cmd->argument2 |=
4708                         ufshcd_get_uic_cmd_result(hba);
4709                 hba->active_uic_cmd->argument3 =
4710                         ufshcd_get_dme_attr_val(hba);
4711                 complete(&hba->active_uic_cmd->done);
4712         }
4713
4714         if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4715                 complete(hba->uic_async_done);
4716 }
4717
4718 /**
4719  * __ufshcd_transfer_req_compl - handle SCSI and query command completion
4720  * @hba: per adapter instance
4721  * @completed_reqs: requests to complete
4722  */
4723 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4724                                         unsigned long completed_reqs)
4725 {
4726         struct ufshcd_lrb *lrbp;
4727         struct scsi_cmnd *cmd;
4728         int result;
4729         int index;
4730
4731         for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4732                 lrbp = &hba->lrb[index];
4733                 cmd = lrbp->cmd;
4734                 if (cmd) {
4735                         ufshcd_add_command_trace(hba, index, "complete");
4736                         result = ufshcd_transfer_rsp_status(hba, lrbp);
4737                         scsi_dma_unmap(cmd);
4738                         cmd->result = result;
4739                         /* Mark completed command as NULL in LRB */
4740                         lrbp->cmd = NULL;
4741                         clear_bit_unlock(index, &hba->lrb_in_use);
4742                         /* Do not touch lrbp after scsi done */
4743                         cmd->scsi_done(cmd);
4744                         __ufshcd_release(hba);
4745                 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4746                         lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
4747                         if (hba->dev_cmd.complete) {
4748                                 ufshcd_add_command_trace(hba, index,
4749                                                 "dev_complete");
4750                                 complete(hba->dev_cmd.complete);
4751                         }
4752                 }
4753                 if (ufshcd_is_clkscaling_supported(hba))
4754                         hba->clk_scaling.active_reqs--;
4755
4756                 lrbp->compl_time_stamp = ktime_get();
4757         }
4758
4759         /* clear corresponding bits of completed commands */
4760         hba->outstanding_reqs ^= completed_reqs;
4761
4762         ufshcd_clk_scaling_update_busy(hba);
4763
4764         /* we might have free'd some tags above */
4765         wake_up(&hba->dev_cmd.tag_wq);
4766 }
4767
4768 /**
4769  * ufshcd_transfer_req_compl - handle SCSI and query command completion
4770  * @hba: per adapter instance
4771  */
4772 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4773 {
4774         unsigned long completed_reqs;
4775         u32 tr_doorbell;
4776
4777         /* Resetting interrupt aggregation counters first and reading the
4778          * DOOR_BELL afterward allows us to handle all the completed requests.
4779          * In order to prevent other interrupts starvation the DB is read once
4780          * after reset. The down side of this solution is the possibility of
4781          * false interrupt if device completes another request after resetting
4782          * aggregation and before reading the DB.
4783          */
4784         if (ufshcd_is_intr_aggr_allowed(hba) &&
4785             !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
4786                 ufshcd_reset_intr_aggr(hba);
4787
4788         tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4789         completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4790
4791         __ufshcd_transfer_req_compl(hba, completed_reqs);
4792 }
4793
4794 /**
4795  * ufshcd_disable_ee - disable exception event
4796  * @hba: per-adapter instance
4797  * @mask: exception event to disable
4798  *
4799  * Disables exception event in the device so that the EVENT_ALERT
4800  * bit is not set.
4801  *
4802  * Returns zero on success, non-zero error value on failure.
4803  */
4804 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4805 {
4806         int err = 0;
4807         u32 val;
4808
4809         if (!(hba->ee_ctrl_mask & mask))
4810                 goto out;
4811
4812         val = hba->ee_ctrl_mask & ~mask;
4813         val &= MASK_EE_STATUS;
4814         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4815                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4816         if (!err)
4817                 hba->ee_ctrl_mask &= ~mask;
4818 out:
4819         return err;
4820 }
4821
4822 /**
4823  * ufshcd_enable_ee - enable exception event
4824  * @hba: per-adapter instance
4825  * @mask: exception event to enable
4826  *
4827  * Enable corresponding exception event in the device to allow
4828  * device to alert host in critical scenarios.
4829  *
4830  * Returns zero on success, non-zero error value on failure.
4831  */
4832 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4833 {
4834         int err = 0;
4835         u32 val;
4836
4837         if (hba->ee_ctrl_mask & mask)
4838                 goto out;
4839
4840         val = hba->ee_ctrl_mask | mask;
4841         val &= MASK_EE_STATUS;
4842         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4843                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4844         if (!err)
4845                 hba->ee_ctrl_mask |= mask;
4846 out:
4847         return err;
4848 }
4849
4850 /**
4851  * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4852  * @hba: per-adapter instance
4853  *
4854  * Allow device to manage background operations on its own. Enabling
4855  * this might lead to inconsistent latencies during normal data transfers
4856  * as the device is allowed to manage its own way of handling background
4857  * operations.
4858  *
4859  * Returns zero on success, non-zero on failure.
4860  */
4861 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4862 {
4863         int err = 0;
4864
4865         if (hba->auto_bkops_enabled)
4866                 goto out;
4867
4868         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4869                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
4870         if (err) {
4871                 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4872                                 __func__, err);
4873                 goto out;
4874         }
4875
4876         hba->auto_bkops_enabled = true;
4877         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
4878
4879         /* No need of URGENT_BKOPS exception from the device */
4880         err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4881         if (err)
4882                 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4883                                 __func__, err);
4884 out:
4885         return err;
4886 }
4887
4888 /**
4889  * ufshcd_disable_auto_bkops - block device in doing background operations
4890  * @hba: per-adapter instance
4891  *
4892  * Disabling background operations improves command response latency but
4893  * has drawback of device moving into critical state where the device is
4894  * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4895  * host is idle so that BKOPS are managed effectively without any negative
4896  * impacts.
4897  *
4898  * Returns zero on success, non-zero on failure.
4899  */
4900 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4901 {
4902         int err = 0;
4903
4904         if (!hba->auto_bkops_enabled)
4905                 goto out;
4906
4907         /*
4908          * If host assisted BKOPs is to be enabled, make sure
4909          * urgent bkops exception is allowed.
4910          */
4911         err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4912         if (err) {
4913                 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4914                                 __func__, err);
4915                 goto out;
4916         }
4917
4918         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
4919                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
4920         if (err) {
4921                 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
4922                                 __func__, err);
4923                 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4924                 goto out;
4925         }
4926
4927         hba->auto_bkops_enabled = false;
4928         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
4929 out:
4930         return err;
4931 }
4932
4933 /**
4934  * ufshcd_force_reset_auto_bkops - force reset auto bkops state
4935  * @hba: per adapter instance
4936  *
4937  * After a device reset the device may toggle the BKOPS_EN flag
4938  * to default value. The s/w tracking variables should be updated
4939  * as well. This function would change the auto-bkops state based on
4940  * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
4941  */
4942 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
4943 {
4944         if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
4945                 hba->auto_bkops_enabled = false;
4946                 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
4947                 ufshcd_enable_auto_bkops(hba);
4948         } else {
4949                 hba->auto_bkops_enabled = true;
4950                 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
4951                 ufshcd_disable_auto_bkops(hba);
4952         }
4953 }
4954
4955 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
4956 {
4957         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
4958                         QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
4959 }
4960
4961 /**
4962  * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
4963  * @hba: per-adapter instance
4964  * @status: bkops_status value
4965  *
4966  * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
4967  * flag in the device to permit background operations if the device
4968  * bkops_status is greater than or equal to "status" argument passed to
4969  * this function, disable otherwise.
4970  *
4971  * Returns 0 for success, non-zero in case of failure.
4972  *
4973  * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
4974  * to know whether auto bkops is enabled or disabled after this function
4975  * returns control to it.
4976  */
4977 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
4978                              enum bkops_status status)
4979 {
4980         int err;
4981         u32 curr_status = 0;
4982
4983         err = ufshcd_get_bkops_status(hba, &curr_status);
4984         if (err) {
4985                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
4986                                 __func__, err);
4987                 goto out;
4988         } else if (curr_status > BKOPS_STATUS_MAX) {
4989                 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
4990                                 __func__, curr_status);
4991                 err = -EINVAL;
4992                 goto out;
4993         }
4994
4995         if (curr_status >= status)
4996                 err = ufshcd_enable_auto_bkops(hba);
4997         else
4998                 err = ufshcd_disable_auto_bkops(hba);
4999 out:
5000         return err;
5001 }
5002
5003 /**
5004  * ufshcd_urgent_bkops - handle urgent bkops exception event
5005  * @hba: per-adapter instance
5006  *
5007  * Enable fBackgroundOpsEn flag in the device to permit background
5008  * operations.
5009  *
5010  * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5011  * and negative error value for any other failure.
5012  */
5013 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5014 {
5015         return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5016 }
5017
5018 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5019 {
5020         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5021                         QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5022 }
5023
5024 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5025 {
5026         int err;
5027         u32 curr_status = 0;
5028
5029         if (hba->is_urgent_bkops_lvl_checked)
5030                 goto enable_auto_bkops;
5031
5032         err = ufshcd_get_bkops_status(hba, &curr_status);
5033         if (err) {
5034                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5035                                 __func__, err);
5036                 goto out;
5037         }
5038
5039         /*
5040          * We are seeing that some devices are raising the urgent bkops
5041          * exception events even when BKOPS status doesn't indicate performace
5042          * impacted or critical. Handle these device by determining their urgent
5043          * bkops status at runtime.
5044          */
5045         if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5046                 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5047                                 __func__, curr_status);
5048                 /* update the current status as the urgent bkops level */
5049                 hba->urgent_bkops_lvl = curr_status;
5050                 hba->is_urgent_bkops_lvl_checked = true;
5051         }
5052
5053 enable_auto_bkops:
5054         err = ufshcd_enable_auto_bkops(hba);
5055 out:
5056         if (err < 0)
5057                 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5058                                 __func__, err);
5059 }
5060
5061 /**
5062  * ufshcd_exception_event_handler - handle exceptions raised by device
5063  * @work: pointer to work data
5064  *
5065  * Read bExceptionEventStatus attribute from the device and handle the
5066  * exception event accordingly.
5067  */
5068 static void ufshcd_exception_event_handler(struct work_struct *work)
5069 {
5070         struct ufs_hba *hba;
5071         int err;
5072         u32 status = 0;
5073         hba = container_of(work, struct ufs_hba, eeh_work);
5074
5075         pm_runtime_get_sync(hba->dev);
5076         scsi_block_requests(hba->host);
5077         err = ufshcd_get_ee_status(hba, &status);
5078         if (err) {
5079                 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5080                                 __func__, err);
5081                 goto out;
5082         }
5083
5084         status &= hba->ee_ctrl_mask;
5085
5086         if (status & MASK_EE_URGENT_BKOPS)
5087                 ufshcd_bkops_exception_event_handler(hba);
5088
5089 out:
5090         scsi_unblock_requests(hba->host);
5091         pm_runtime_put_sync(hba->dev);
5092         return;
5093 }
5094
5095 /* Complete requests that have door-bell cleared */
5096 static void ufshcd_complete_requests(struct ufs_hba *hba)
5097 {
5098         ufshcd_transfer_req_compl(hba);
5099         ufshcd_tmc_handler(hba);
5100 }
5101
5102 /**
5103  * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5104  *                              to recover from the DL NAC errors or not.
5105  * @hba: per-adapter instance
5106  *
5107  * Returns true if error handling is required, false otherwise
5108  */
5109 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5110 {
5111         unsigned long flags;
5112         bool err_handling = true;
5113
5114         spin_lock_irqsave(hba->host->host_lock, flags);
5115         /*
5116          * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5117          * device fatal error and/or DL NAC & REPLAY timeout errors.
5118          */
5119         if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5120                 goto out;
5121
5122         if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5123             ((hba->saved_err & UIC_ERROR) &&
5124              (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5125                 goto out;
5126
5127         if ((hba->saved_err & UIC_ERROR) &&
5128             (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5129                 int err;
5130                 /*
5131                  * wait for 50ms to see if we can get any other errors or not.
5132                  */
5133                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5134                 msleep(50);
5135                 spin_lock_irqsave(hba->host->host_lock, flags);
5136
5137                 /*
5138                  * now check if we have got any other severe errors other than
5139                  * DL NAC error?
5140                  */
5141                 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5142                     ((hba->saved_err & UIC_ERROR) &&
5143                     (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5144                         goto out;
5145
5146                 /*
5147                  * As DL NAC is the only error received so far, send out NOP
5148                  * command to confirm if link is still active or not.
5149                  *   - If we don't get any response then do error recovery.
5150                  *   - If we get response then clear the DL NAC error bit.
5151                  */
5152
5153                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5154                 err = ufshcd_verify_dev_init(hba);
5155                 spin_lock_irqsave(hba->host->host_lock, flags);
5156
5157                 if (err)
5158                         goto out;
5159
5160                 /* Link seems to be alive hence ignore the DL NAC errors */
5161                 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5162                         hba->saved_err &= ~UIC_ERROR;
5163                 /* clear NAC error */
5164                 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5165                 if (!hba->saved_uic_err) {
5166                         err_handling = false;
5167                         goto out;
5168                 }
5169         }
5170 out:
5171         spin_unlock_irqrestore(hba->host->host_lock, flags);
5172         return err_handling;
5173 }
5174
5175 /**
5176  * ufshcd_err_handler - handle UFS errors that require s/w attention
5177  * @work: pointer to work structure
5178  */
5179 static void ufshcd_err_handler(struct work_struct *work)
5180 {
5181         struct ufs_hba *hba;
5182         unsigned long flags;
5183         u32 err_xfer = 0;
5184         u32 err_tm = 0;
5185         int err = 0;
5186         int tag;
5187         bool needs_reset = false;
5188
5189         hba = container_of(work, struct ufs_hba, eh_work);
5190
5191         pm_runtime_get_sync(hba->dev);
5192         ufshcd_hold(hba, false);
5193
5194         spin_lock_irqsave(hba->host->host_lock, flags);
5195         if (hba->ufshcd_state == UFSHCD_STATE_RESET)
5196                 goto out;
5197
5198         hba->ufshcd_state = UFSHCD_STATE_RESET;
5199         ufshcd_set_eh_in_progress(hba);
5200
5201         /* Complete requests that have door-bell cleared by h/w */
5202         ufshcd_complete_requests(hba);
5203
5204         if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5205                 bool ret;
5206
5207                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5208                 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5209                 ret = ufshcd_quirk_dl_nac_errors(hba);
5210                 spin_lock_irqsave(hba->host->host_lock, flags);
5211                 if (!ret)
5212                         goto skip_err_handling;
5213         }
5214         if ((hba->saved_err & INT_FATAL_ERRORS) ||
5215             ((hba->saved_err & UIC_ERROR) &&
5216             (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5217                                    UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5218                                    UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5219                 needs_reset = true;
5220
5221         /*
5222          * if host reset is required then skip clearing the pending
5223          * transfers forcefully because they will automatically get
5224          * cleared after link startup.
5225          */
5226         if (needs_reset)
5227                 goto skip_pending_xfer_clear;
5228
5229         /* release lock as clear command might sleep */
5230         spin_unlock_irqrestore(hba->host->host_lock, flags);
5231         /* Clear pending transfer requests */
5232         for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5233                 if (ufshcd_clear_cmd(hba, tag)) {
5234                         err_xfer = true;
5235                         goto lock_skip_pending_xfer_clear;
5236                 }
5237         }
5238
5239         /* Clear pending task management requests */
5240         for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5241                 if (ufshcd_clear_tm_cmd(hba, tag)) {
5242                         err_tm = true;
5243                         goto lock_skip_pending_xfer_clear;
5244                 }
5245         }
5246
5247 lock_skip_pending_xfer_clear:
5248         spin_lock_irqsave(hba->host->host_lock, flags);
5249
5250         /* Complete the requests that are cleared by s/w */
5251         ufshcd_complete_requests(hba);
5252
5253         if (err_xfer || err_tm)
5254                 needs_reset = true;
5255
5256 skip_pending_xfer_clear:
5257         /* Fatal errors need reset */
5258         if (needs_reset) {
5259                 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5260
5261                 /*
5262                  * ufshcd_reset_and_restore() does the link reinitialization
5263                  * which will need atleast one empty doorbell slot to send the
5264                  * device management commands (NOP and query commands).
5265                  * If there is no slot empty at this moment then free up last
5266                  * slot forcefully.
5267                  */
5268                 if (hba->outstanding_reqs == max_doorbells)
5269                         __ufshcd_transfer_req_compl(hba,
5270                                                     (1UL << (hba->nutrs - 1)));
5271
5272                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5273                 err = ufshcd_reset_and_restore(hba);
5274                 spin_lock_irqsave(hba->host->host_lock, flags);
5275                 if (err) {
5276                         dev_err(hba->dev, "%s: reset and restore failed\n",
5277                                         __func__);
5278                         hba->ufshcd_state = UFSHCD_STATE_ERROR;
5279                 }
5280                 /*
5281                  * Inform scsi mid-layer that we did reset and allow to handle
5282                  * Unit Attention properly.
5283                  */
5284                 scsi_report_bus_reset(hba->host, 0);
5285                 hba->saved_err = 0;
5286                 hba->saved_uic_err = 0;
5287         }
5288
5289 skip_err_handling:
5290         if (!needs_reset) {
5291                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5292                 if (hba->saved_err || hba->saved_uic_err)
5293                         dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5294                             __func__, hba->saved_err, hba->saved_uic_err);
5295         }
5296
5297         ufshcd_clear_eh_in_progress(hba);
5298
5299 out:
5300         spin_unlock_irqrestore(hba->host->host_lock, flags);
5301         scsi_unblock_requests(hba->host);
5302         ufshcd_release(hba);
5303         pm_runtime_put_sync(hba->dev);
5304 }
5305
5306 static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5307                 u32 reg)
5308 {
5309         reg_hist->reg[reg_hist->pos] = reg;
5310         reg_hist->tstamp[reg_hist->pos] = ktime_get();
5311         reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5312 }
5313
5314 /**
5315  * ufshcd_update_uic_error - check and set fatal UIC error flags.
5316  * @hba: per-adapter instance
5317  */
5318 static void ufshcd_update_uic_error(struct ufs_hba *hba)
5319 {
5320         u32 reg;
5321
5322         /* PHY layer lane error */
5323         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5324         /* Ignore LINERESET indication, as this is not an error */
5325         if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5326                         (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5327                 /*
5328                  * To know whether this error is fatal or not, DB timeout
5329                  * must be checked but this error is handled separately.
5330                  */
5331                 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
5332                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5333         }
5334
5335         /* PA_INIT_ERROR is fatal and needs UIC reset */
5336         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
5337         if (reg)
5338                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5339
5340         if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5341                 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5342         else if (hba->dev_quirks &
5343                    UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5344                 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5345                         hba->uic_error |=
5346                                 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5347                 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5348                         hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5349         }
5350
5351         /* UIC NL/TL/DME errors needs software retry */
5352         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
5353         if (reg) {
5354                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
5355                 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
5356         }
5357
5358         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
5359         if (reg) {
5360                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
5361                 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
5362         }
5363
5364         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
5365         if (reg) {
5366                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
5367                 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
5368         }
5369
5370         dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5371                         __func__, hba->uic_error);
5372 }
5373
5374 /**
5375  * ufshcd_check_errors - Check for errors that need s/w attention
5376  * @hba: per-adapter instance
5377  */
5378 static void ufshcd_check_errors(struct ufs_hba *hba)
5379 {
5380         bool queue_eh_work = false;
5381
5382         if (hba->errors & INT_FATAL_ERRORS)
5383                 queue_eh_work = true;
5384
5385         if (hba->errors & UIC_ERROR) {
5386                 hba->uic_error = 0;
5387                 ufshcd_update_uic_error(hba);
5388                 if (hba->uic_error)
5389                         queue_eh_work = true;
5390         }
5391
5392         if (queue_eh_work) {
5393                 /*
5394                  * update the transfer error masks to sticky bits, let's do this
5395                  * irrespective of current ufshcd_state.
5396                  */
5397                 hba->saved_err |= hba->errors;
5398                 hba->saved_uic_err |= hba->uic_error;
5399
5400                 /* handle fatal errors only when link is functional */
5401                 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5402                         /* block commands from scsi mid-layer */
5403                         scsi_block_requests(hba->host);
5404
5405                         hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
5406
5407                         /* dump controller state before resetting */
5408                         if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5409                                 bool pr_prdt = !!(hba->saved_err &
5410                                                 SYSTEM_BUS_FATAL_ERROR);
5411
5412                                 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5413                                         __func__, hba->saved_err,
5414                                         hba->saved_uic_err);
5415
5416                                 ufshcd_print_host_regs(hba);
5417                                 ufshcd_print_pwr_info(hba);
5418                                 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5419                                 ufshcd_print_trs(hba, hba->outstanding_reqs,
5420                                                         pr_prdt);
5421                         }
5422                         schedule_work(&hba->eh_work);
5423                 }
5424         }
5425         /*
5426          * if (!queue_eh_work) -
5427          * Other errors are either non-fatal where host recovers
5428          * itself without s/w intervention or errors that will be
5429          * handled by the SCSI core layer.
5430          */
5431 }
5432
5433 /**
5434  * ufshcd_tmc_handler - handle task management function completion
5435  * @hba: per adapter instance
5436  */
5437 static void ufshcd_tmc_handler(struct ufs_hba *hba)
5438 {
5439         u32 tm_doorbell;
5440
5441         tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
5442         hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
5443         wake_up(&hba->tm_wq);
5444 }
5445
5446 /**
5447  * ufshcd_sl_intr - Interrupt service routine
5448  * @hba: per adapter instance
5449  * @intr_status: contains interrupts generated by the controller
5450  */
5451 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5452 {
5453         hba->errors = UFSHCD_ERROR_MASK & intr_status;
5454         if (hba->errors)
5455                 ufshcd_check_errors(hba);
5456
5457         if (intr_status & UFSHCD_UIC_MASK)
5458                 ufshcd_uic_cmd_compl(hba, intr_status);
5459
5460         if (intr_status & UTP_TASK_REQ_COMPL)
5461                 ufshcd_tmc_handler(hba);
5462
5463         if (intr_status & UTP_TRANSFER_REQ_COMPL)
5464                 ufshcd_transfer_req_compl(hba);
5465 }
5466
5467 /**
5468  * ufshcd_intr - Main interrupt service routine
5469  * @irq: irq number
5470  * @__hba: pointer to adapter instance
5471  *
5472  * Returns IRQ_HANDLED - If interrupt is valid
5473  *              IRQ_NONE - If invalid interrupt
5474  */
5475 static irqreturn_t ufshcd_intr(int irq, void *__hba)
5476 {
5477         u32 intr_status, enabled_intr_status;
5478         irqreturn_t retval = IRQ_NONE;
5479         struct ufs_hba *hba = __hba;
5480
5481         spin_lock(hba->host->host_lock);
5482         intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5483         enabled_intr_status =
5484                 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5485
5486         if (intr_status)
5487                 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5488
5489         if (enabled_intr_status) {
5490                 ufshcd_sl_intr(hba, enabled_intr_status);
5491                 retval = IRQ_HANDLED;
5492         }
5493         spin_unlock(hba->host->host_lock);
5494         return retval;
5495 }
5496
5497 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5498 {
5499         int err = 0;
5500         u32 mask = 1 << tag;
5501         unsigned long flags;
5502
5503         if (!test_bit(tag, &hba->outstanding_tasks))
5504                 goto out;
5505
5506         spin_lock_irqsave(hba->host->host_lock, flags);
5507         ufshcd_utmrl_clear(hba, tag);
5508         spin_unlock_irqrestore(hba->host->host_lock, flags);
5509
5510         /* poll for max. 1 sec to clear door bell register by h/w */
5511         err = ufshcd_wait_for_register(hba,
5512                         REG_UTP_TASK_REQ_DOOR_BELL,
5513                         mask, 0, 1000, 1000, true);
5514 out:
5515         return err;
5516 }
5517
5518 /**
5519  * ufshcd_issue_tm_cmd - issues task management commands to controller
5520  * @hba: per adapter instance
5521  * @lun_id: LUN ID to which TM command is sent
5522  * @task_id: task ID to which the TM command is applicable
5523  * @tm_function: task management function opcode
5524  * @tm_response: task management service response return value
5525  *
5526  * Returns non-zero value on error, zero on success.
5527  */
5528 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5529                 u8 tm_function, u8 *tm_response)
5530 {
5531         struct utp_task_req_desc *task_req_descp;
5532         struct utp_upiu_task_req *task_req_upiup;
5533         struct Scsi_Host *host;
5534         unsigned long flags;
5535         int free_slot;
5536         int err;
5537         int task_tag;
5538
5539         host = hba->host;
5540
5541         /*
5542          * Get free slot, sleep if slots are unavailable.
5543          * Even though we use wait_event() which sleeps indefinitely,
5544          * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5545          */
5546         wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
5547         ufshcd_hold(hba, false);
5548
5549         spin_lock_irqsave(host->host_lock, flags);
5550         task_req_descp = hba->utmrdl_base_addr;
5551         task_req_descp += free_slot;
5552
5553         /* Configure task request descriptor */
5554         task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5555         task_req_descp->header.dword_2 =
5556                         cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5557
5558         /* Configure task request UPIU */
5559         task_req_upiup =
5560                 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
5561         task_tag = hba->nutrs + free_slot;
5562         task_req_upiup->header.dword_0 =
5563                 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
5564                                               lun_id, task_tag);
5565         task_req_upiup->header.dword_1 =
5566                 UPIU_HEADER_DWORD(0, tm_function, 0, 0);
5567         /*
5568          * The host shall provide the same value for LUN field in the basic
5569          * header and for Input Parameter.
5570          */
5571         task_req_upiup->input_param1 = cpu_to_be32(lun_id);
5572         task_req_upiup->input_param2 = cpu_to_be32(task_id);
5573
5574         ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5575
5576         /* send command to the controller */
5577         __set_bit(free_slot, &hba->outstanding_tasks);
5578
5579         /* Make sure descriptors are ready before ringing the task doorbell */
5580         wmb();
5581
5582         ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
5583         /* Make sure that doorbell is committed immediately */
5584         wmb();
5585
5586         spin_unlock_irqrestore(host->host_lock, flags);
5587
5588         /* wait until the task management command is completed */
5589         err = wait_event_timeout(hba->tm_wq,
5590                         test_bit(free_slot, &hba->tm_condition),
5591                         msecs_to_jiffies(TM_CMD_TIMEOUT));
5592         if (!err) {
5593                 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5594                                 __func__, tm_function);
5595                 if (ufshcd_clear_tm_cmd(hba, free_slot))
5596                         dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5597                                         __func__, free_slot);
5598                 err = -ETIMEDOUT;
5599         } else {
5600                 err = ufshcd_task_req_compl(hba, free_slot, tm_response);
5601         }
5602
5603         clear_bit(free_slot, &hba->tm_condition);
5604         ufshcd_put_tm_slot(hba, free_slot);
5605         wake_up(&hba->tm_tag_wq);
5606
5607         ufshcd_release(hba);
5608         return err;
5609 }
5610
5611 /**
5612  * ufshcd_eh_device_reset_handler - device reset handler registered to
5613  *                                    scsi layer.
5614  * @cmd: SCSI command pointer
5615  *
5616  * Returns SUCCESS/FAILED
5617  */
5618 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
5619 {
5620         struct Scsi_Host *host;
5621         struct ufs_hba *hba;
5622         unsigned int tag;
5623         u32 pos;
5624         int err;
5625         u8 resp = 0xF;
5626         struct ufshcd_lrb *lrbp;
5627         unsigned long flags;
5628
5629         host = cmd->device->host;
5630         hba = shost_priv(host);
5631         tag = cmd->request->tag;
5632
5633         lrbp = &hba->lrb[tag];
5634         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5635         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5636                 if (!err)
5637                         err = resp;
5638                 goto out;
5639         }
5640
5641         /* clear the commands that were pending for corresponding LUN */
5642         for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5643                 if (hba->lrb[pos].lun == lrbp->lun) {
5644                         err = ufshcd_clear_cmd(hba, pos);
5645                         if (err)
5646                                 break;
5647                 }
5648         }
5649         spin_lock_irqsave(host->host_lock, flags);
5650         ufshcd_transfer_req_compl(hba);
5651         spin_unlock_irqrestore(host->host_lock, flags);
5652
5653 out:
5654         hba->req_abort_count = 0;
5655         if (!err) {
5656                 err = SUCCESS;
5657         } else {
5658                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5659                 err = FAILED;
5660         }
5661         return err;
5662 }
5663
5664 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
5665 {
5666         struct ufshcd_lrb *lrbp;
5667         int tag;
5668
5669         for_each_set_bit(tag, &bitmap, hba->nutrs) {
5670                 lrbp = &hba->lrb[tag];
5671                 lrbp->req_abort_skip = true;
5672         }
5673 }
5674
5675 /**
5676  * ufshcd_abort - abort a specific command
5677  * @cmd: SCSI command pointer
5678  *
5679  * Abort the pending command in device by sending UFS_ABORT_TASK task management
5680  * command, and in host controller by clearing the door-bell register. There can
5681  * be race between controller sending the command to the device while abort is
5682  * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
5683  * really issued and then try to abort it.
5684  *
5685  * Returns SUCCESS/FAILED
5686  */
5687 static int ufshcd_abort(struct scsi_cmnd *cmd)
5688 {
5689         struct Scsi_Host *host;
5690         struct ufs_hba *hba;
5691         unsigned long flags;
5692         unsigned int tag;
5693         int err = 0;
5694         int poll_cnt;
5695         u8 resp = 0xF;
5696         struct ufshcd_lrb *lrbp;
5697         u32 reg;
5698
5699         host = cmd->device->host;
5700         hba = shost_priv(host);
5701         tag = cmd->request->tag;
5702         lrbp = &hba->lrb[tag];
5703         if (!ufshcd_valid_tag(hba, tag)) {
5704                 dev_err(hba->dev,
5705                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
5706                         __func__, tag, cmd, cmd->request);
5707                 BUG();
5708         }
5709
5710         /*
5711          * Task abort to the device W-LUN is illegal. When this command
5712          * will fail, due to spec violation, scsi err handling next step
5713          * will be to send LU reset which, again, is a spec violation.
5714          * To avoid these unnecessary/illegal step we skip to the last error
5715          * handling stage: reset and restore.
5716          */
5717         if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
5718                 return ufshcd_eh_host_reset_handler(cmd);
5719
5720         ufshcd_hold(hba, false);
5721         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5722         /* If command is already aborted/completed, return SUCCESS */
5723         if (!(test_bit(tag, &hba->outstanding_reqs))) {
5724                 dev_err(hba->dev,
5725                         "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
5726                         __func__, tag, hba->outstanding_reqs, reg);
5727                 goto out;
5728         }
5729
5730         if (!(reg & (1 << tag))) {
5731                 dev_err(hba->dev,
5732                 "%s: cmd was completed, but without a notifying intr, tag = %d",
5733                 __func__, tag);
5734         }
5735
5736         /* Print Transfer Request of aborted task */
5737         dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
5738
5739         /*
5740          * Print detailed info about aborted request.
5741          * As more than one request might get aborted at the same time,
5742          * print full information only for the first aborted request in order
5743          * to reduce repeated printouts. For other aborted requests only print
5744          * basic details.
5745          */
5746         scsi_print_command(hba->lrb[tag].cmd);
5747         if (!hba->req_abort_count) {
5748                 ufshcd_print_host_regs(hba);
5749                 ufshcd_print_host_state(hba);
5750                 ufshcd_print_pwr_info(hba);
5751                 ufshcd_print_trs(hba, 1 << tag, true);
5752         } else {
5753                 ufshcd_print_trs(hba, 1 << tag, false);
5754         }
5755         hba->req_abort_count++;
5756
5757         /* Skip task abort in case previous aborts failed and report failure */
5758         if (lrbp->req_abort_skip) {
5759                 err = -EIO;
5760                 goto out;
5761         }
5762
5763         for (poll_cnt = 100; poll_cnt; poll_cnt--) {
5764                 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
5765                                 UFS_QUERY_TASK, &resp);
5766                 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
5767                         /* cmd pending in the device */
5768                         dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
5769                                 __func__, tag);
5770                         break;
5771                 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5772                         /*
5773                          * cmd not pending in the device, check if it is
5774                          * in transition.
5775                          */
5776                         dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
5777                                 __func__, tag);
5778                         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5779                         if (reg & (1 << tag)) {
5780                                 /* sleep for max. 200us to stabilize */
5781                                 usleep_range(100, 200);
5782                                 continue;
5783                         }
5784                         /* command completed already */
5785                         dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
5786                                 __func__, tag);
5787                         goto out;
5788                 } else {
5789                         dev_err(hba->dev,
5790                                 "%s: no response from device. tag = %d, err %d\n",
5791                                 __func__, tag, err);
5792                         if (!err)
5793                                 err = resp; /* service response error */
5794                         goto out;
5795                 }
5796         }
5797
5798         if (!poll_cnt) {
5799                 err = -EBUSY;
5800                 goto out;
5801         }
5802
5803         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
5804                         UFS_ABORT_TASK, &resp);
5805         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5806                 if (!err) {
5807                         err = resp; /* service response error */
5808                         dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
5809                                 __func__, tag, err);
5810                 }
5811                 goto out;
5812         }
5813
5814         err = ufshcd_clear_cmd(hba, tag);
5815         if (err) {
5816                 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
5817                         __func__, tag, err);
5818                 goto out;
5819         }
5820
5821         scsi_dma_unmap(cmd);
5822
5823         spin_lock_irqsave(host->host_lock, flags);
5824         ufshcd_outstanding_req_clear(hba, tag);
5825         hba->lrb[tag].cmd = NULL;
5826         spin_unlock_irqrestore(host->host_lock, flags);
5827
5828         clear_bit_unlock(tag, &hba->lrb_in_use);
5829         wake_up(&hba->dev_cmd.tag_wq);
5830
5831 out:
5832         if (!err) {
5833                 err = SUCCESS;
5834         } else {
5835                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5836                 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
5837                 err = FAILED;
5838         }
5839
5840         /*
5841          * This ufshcd_release() corresponds to the original scsi cmd that got
5842          * aborted here (as we won't get any IRQ for it).
5843          */
5844         ufshcd_release(hba);
5845         return err;
5846 }
5847
5848 /**
5849  * ufshcd_host_reset_and_restore - reset and restore host controller
5850  * @hba: per-adapter instance
5851  *
5852  * Note that host controller reset may issue DME_RESET to
5853  * local and remote (device) Uni-Pro stack and the attributes
5854  * are reset to default state.
5855  *
5856  * Returns zero on success, non-zero on failure
5857  */
5858 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
5859 {
5860         int err;
5861         unsigned long flags;
5862
5863         /* Reset the host controller */
5864         spin_lock_irqsave(hba->host->host_lock, flags);
5865         ufshcd_hba_stop(hba, false);
5866         spin_unlock_irqrestore(hba->host->host_lock, flags);
5867
5868         /* scale up clocks to max frequency before full reinitialization */
5869         ufshcd_scale_clks(hba, true);
5870
5871         err = ufshcd_hba_enable(hba);
5872         if (err)
5873                 goto out;
5874
5875         /* Establish the link again and restore the device */
5876         err = ufshcd_probe_hba(hba);
5877
5878         if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
5879                 err = -EIO;
5880 out:
5881         if (err)
5882                 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
5883
5884         return err;
5885 }
5886
5887 /**
5888  * ufshcd_reset_and_restore - reset and re-initialize host/device
5889  * @hba: per-adapter instance
5890  *
5891  * Reset and recover device, host and re-establish link. This
5892  * is helpful to recover the communication in fatal error conditions.
5893  *
5894  * Returns zero on success, non-zero on failure
5895  */
5896 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
5897 {
5898         int err = 0;
5899         unsigned long flags;
5900         int retries = MAX_HOST_RESET_RETRIES;
5901
5902         do {
5903                 err = ufshcd_host_reset_and_restore(hba);
5904         } while (err && --retries);
5905
5906         /*
5907          * After reset the door-bell might be cleared, complete
5908          * outstanding requests in s/w here.
5909          */
5910         spin_lock_irqsave(hba->host->host_lock, flags);
5911         ufshcd_transfer_req_compl(hba);
5912         ufshcd_tmc_handler(hba);
5913         spin_unlock_irqrestore(hba->host->host_lock, flags);
5914
5915         return err;
5916 }
5917
5918 /**
5919  * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
5920  * @cmd: SCSI command pointer
5921  *
5922  * Returns SUCCESS/FAILED
5923  */
5924 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
5925 {
5926         int err;
5927         unsigned long flags;
5928         struct ufs_hba *hba;
5929
5930         hba = shost_priv(cmd->device->host);
5931
5932         ufshcd_hold(hba, false);
5933         /*
5934          * Check if there is any race with fatal error handling.
5935          * If so, wait for it to complete. Even though fatal error
5936          * handling does reset and restore in some cases, don't assume
5937          * anything out of it. We are just avoiding race here.
5938          */
5939         do {
5940                 spin_lock_irqsave(hba->host->host_lock, flags);
5941                 if (!(work_pending(&hba->eh_work) ||
5942                             hba->ufshcd_state == UFSHCD_STATE_RESET ||
5943                             hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
5944                         break;
5945                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5946                 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
5947                 flush_work(&hba->eh_work);
5948         } while (1);
5949
5950         hba->ufshcd_state = UFSHCD_STATE_RESET;
5951         ufshcd_set_eh_in_progress(hba);
5952         spin_unlock_irqrestore(hba->host->host_lock, flags);
5953
5954         err = ufshcd_reset_and_restore(hba);
5955
5956         spin_lock_irqsave(hba->host->host_lock, flags);
5957         if (!err) {
5958                 err = SUCCESS;
5959                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5960         } else {
5961                 err = FAILED;
5962                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5963         }
5964         ufshcd_clear_eh_in_progress(hba);
5965         spin_unlock_irqrestore(hba->host->host_lock, flags);
5966
5967         ufshcd_release(hba);
5968         return err;
5969 }
5970
5971 /**
5972  * ufshcd_get_max_icc_level - calculate the ICC level
5973  * @sup_curr_uA: max. current supported by the regulator
5974  * @start_scan: row at the desc table to start scan from
5975  * @buff: power descriptor buffer
5976  *
5977  * Returns calculated max ICC level for specific regulator
5978  */
5979 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
5980 {
5981         int i;
5982         int curr_uA;
5983         u16 data;
5984         u16 unit;
5985
5986         for (i = start_scan; i >= 0; i--) {
5987                 data = be16_to_cpup((__be16 *)&buff[2 * i]);
5988                 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
5989                                                 ATTR_ICC_LVL_UNIT_OFFSET;
5990                 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
5991                 switch (unit) {
5992                 case UFSHCD_NANO_AMP:
5993                         curr_uA = curr_uA / 1000;
5994                         break;
5995                 case UFSHCD_MILI_AMP:
5996                         curr_uA = curr_uA * 1000;
5997                         break;
5998                 case UFSHCD_AMP:
5999                         curr_uA = curr_uA * 1000 * 1000;
6000                         break;
6001                 case UFSHCD_MICRO_AMP:
6002                 default:
6003                         break;
6004                 }
6005                 if (sup_curr_uA >= curr_uA)
6006                         break;
6007         }
6008         if (i < 0) {
6009                 i = 0;
6010                 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6011         }
6012
6013         return (u32)i;
6014 }
6015
6016 /**
6017  * ufshcd_calc_icc_level - calculate the max ICC level
6018  * In case regulators are not initialized we'll return 0
6019  * @hba: per-adapter instance
6020  * @desc_buf: power descriptor buffer to extract ICC levels from.
6021  * @len: length of desc_buff
6022  *
6023  * Returns calculated ICC level
6024  */
6025 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6026                                                         u8 *desc_buf, int len)
6027 {
6028         u32 icc_level = 0;
6029
6030         if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6031                                                 !hba->vreg_info.vccq2) {
6032                 dev_err(hba->dev,
6033                         "%s: Regulator capability was not set, actvIccLevel=%d",
6034                                                         __func__, icc_level);
6035                 goto out;
6036         }
6037
6038         if (hba->vreg_info.vcc)
6039                 icc_level = ufshcd_get_max_icc_level(
6040                                 hba->vreg_info.vcc->max_uA,
6041                                 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6042                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6043
6044         if (hba->vreg_info.vccq)
6045                 icc_level = ufshcd_get_max_icc_level(
6046                                 hba->vreg_info.vccq->max_uA,
6047                                 icc_level,
6048                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6049
6050         if (hba->vreg_info.vccq2)
6051                 icc_level = ufshcd_get_max_icc_level(
6052                                 hba->vreg_info.vccq2->max_uA,
6053                                 icc_level,
6054                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6055 out:
6056         return icc_level;
6057 }
6058
6059 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6060 {
6061         int ret;
6062         int buff_len = hba->desc_size.pwr_desc;
6063         u8 *desc_buf;
6064
6065         desc_buf = kmalloc(buff_len, GFP_KERNEL);
6066         if (!desc_buf)
6067                 return;
6068
6069         ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6070         if (ret) {
6071                 dev_err(hba->dev,
6072                         "%s: Failed reading power descriptor.len = %d ret = %d",
6073                         __func__, buff_len, ret);
6074                 goto out;
6075         }
6076
6077         hba->init_prefetch_data.icc_level =
6078                         ufshcd_find_max_sup_active_icc_level(hba,
6079                         desc_buf, buff_len);
6080         dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6081                         __func__, hba->init_prefetch_data.icc_level);
6082
6083         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6084                 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6085                 &hba->init_prefetch_data.icc_level);
6086
6087         if (ret)
6088                 dev_err(hba->dev,
6089                         "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6090                         __func__, hba->init_prefetch_data.icc_level , ret);
6091
6092 out:
6093         kfree(desc_buf);
6094 }
6095
6096 /**
6097  * ufshcd_scsi_add_wlus - Adds required W-LUs
6098  * @hba: per-adapter instance
6099  *
6100  * UFS device specification requires the UFS devices to support 4 well known
6101  * logical units:
6102  *      "REPORT_LUNS" (address: 01h)
6103  *      "UFS Device" (address: 50h)
6104  *      "RPMB" (address: 44h)
6105  *      "BOOT" (address: 30h)
6106  * UFS device's power management needs to be controlled by "POWER CONDITION"
6107  * field of SSU (START STOP UNIT) command. But this "power condition" field
6108  * will take effect only when its sent to "UFS device" well known logical unit
6109  * hence we require the scsi_device instance to represent this logical unit in
6110  * order for the UFS host driver to send the SSU command for power management.
6111  *
6112  * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6113  * Block) LU so user space process can control this LU. User space may also
6114  * want to have access to BOOT LU.
6115  *
6116  * This function adds scsi device instances for each of all well known LUs
6117  * (except "REPORT LUNS" LU).
6118  *
6119  * Returns zero on success (all required W-LUs are added successfully),
6120  * non-zero error value on failure (if failed to add any of the required W-LU).
6121  */
6122 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6123 {
6124         int ret = 0;
6125         struct scsi_device *sdev_rpmb;
6126         struct scsi_device *sdev_boot;
6127
6128         hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6129                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6130         if (IS_ERR(hba->sdev_ufs_device)) {
6131                 ret = PTR_ERR(hba->sdev_ufs_device);
6132                 hba->sdev_ufs_device = NULL;
6133                 goto out;
6134         }
6135         scsi_device_put(hba->sdev_ufs_device);
6136
6137         sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
6138                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
6139         if (IS_ERR(sdev_rpmb)) {
6140                 ret = PTR_ERR(sdev_rpmb);
6141                 goto remove_sdev_ufs_device;
6142         }
6143         scsi_device_put(sdev_rpmb);
6144
6145         sdev_boot = __scsi_add_device(hba->host, 0, 0,
6146                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6147         if (IS_ERR(sdev_boot))
6148                 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6149         else
6150                 scsi_device_put(sdev_boot);
6151         goto out;
6152
6153 remove_sdev_ufs_device:
6154         scsi_remove_device(hba->sdev_ufs_device);
6155 out:
6156         return ret;
6157 }
6158
6159 static int ufs_get_device_desc(struct ufs_hba *hba,
6160                                struct ufs_dev_desc *dev_desc)
6161 {
6162         int err;
6163         size_t buff_len;
6164         u8 model_index;
6165         u8 *desc_buf;
6166
6167         buff_len = max_t(size_t, hba->desc_size.dev_desc,
6168                          QUERY_DESC_MAX_SIZE + 1);
6169         desc_buf = kmalloc(buff_len, GFP_KERNEL);
6170         if (!desc_buf) {
6171                 err = -ENOMEM;
6172                 goto out;
6173         }
6174
6175         err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
6176         if (err) {
6177                 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6178                         __func__, err);
6179                 goto out;
6180         }
6181
6182         /*
6183          * getting vendor (manufacturerID) and Bank Index in big endian
6184          * format
6185          */
6186         dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
6187                                      desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6188
6189         model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6190
6191         /* Zero-pad entire buffer for string termination. */
6192         memset(desc_buf, 0, buff_len);
6193
6194         err = ufshcd_read_string_desc(hba, model_index, desc_buf,
6195                                       QUERY_DESC_MAX_SIZE, true/*ASCII*/);
6196         if (err) {
6197                 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6198                         __func__, err);
6199                 goto out;
6200         }
6201
6202         desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
6203         strlcpy(dev_desc->model, (desc_buf + QUERY_DESC_HDR_SIZE),
6204                 min_t(u8, desc_buf[QUERY_DESC_LENGTH_OFFSET],
6205                       MAX_MODEL_LEN));
6206
6207         /* Null terminate the model string */
6208         dev_desc->model[MAX_MODEL_LEN] = '\0';
6209
6210 out:
6211         kfree(desc_buf);
6212         return err;
6213 }
6214
6215 static void ufs_fixup_device_setup(struct ufs_hba *hba,
6216                                    struct ufs_dev_desc *dev_desc)
6217 {
6218         struct ufs_dev_fix *f;
6219
6220         for (f = ufs_fixups; f->quirk; f++) {
6221                 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6222                      f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6223                     (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
6224                      !strcmp(f->card.model, UFS_ANY_MODEL)))
6225                         hba->dev_quirks |= f->quirk;
6226         }
6227 }
6228
6229 /**
6230  * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6231  * @hba: per-adapter instance
6232  *
6233  * PA_TActivate parameter can be tuned manually if UniPro version is less than
6234  * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6235  * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6236  * the hibern8 exit latency.
6237  *
6238  * Returns zero on success, non-zero error value on failure.
6239  */
6240 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6241 {
6242         int ret = 0;
6243         u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6244
6245         ret = ufshcd_dme_peer_get(hba,
6246                                   UIC_ARG_MIB_SEL(
6247                                         RX_MIN_ACTIVATETIME_CAPABILITY,
6248                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6249                                   &peer_rx_min_activatetime);
6250         if (ret)
6251                 goto out;
6252
6253         /* make sure proper unit conversion is applied */
6254         tuned_pa_tactivate =
6255                 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6256                  / PA_TACTIVATE_TIME_UNIT_US);
6257         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6258                              tuned_pa_tactivate);
6259
6260 out:
6261         return ret;
6262 }
6263
6264 /**
6265  * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6266  * @hba: per-adapter instance
6267  *
6268  * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6269  * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6270  * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6271  * This optimal value can help reduce the hibern8 exit latency.
6272  *
6273  * Returns zero on success, non-zero error value on failure.
6274  */
6275 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6276 {
6277         int ret = 0;
6278         u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6279         u32 max_hibern8_time, tuned_pa_hibern8time;
6280
6281         ret = ufshcd_dme_get(hba,
6282                              UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6283                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6284                                   &local_tx_hibern8_time_cap);
6285         if (ret)
6286                 goto out;
6287
6288         ret = ufshcd_dme_peer_get(hba,
6289                                   UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6290                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6291                                   &peer_rx_hibern8_time_cap);
6292         if (ret)
6293                 goto out;
6294
6295         max_hibern8_time = max(local_tx_hibern8_time_cap,
6296                                peer_rx_hibern8_time_cap);
6297         /* make sure proper unit conversion is applied */
6298         tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6299                                 / PA_HIBERN8_TIME_UNIT_US);
6300         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6301                              tuned_pa_hibern8time);
6302 out:
6303         return ret;
6304 }
6305
6306 /**
6307  * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6308  * less than device PA_TACTIVATE time.
6309  * @hba: per-adapter instance
6310  *
6311  * Some UFS devices require host PA_TACTIVATE to be lower than device
6312  * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6313  * for such devices.
6314  *
6315  * Returns zero on success, non-zero error value on failure.
6316  */
6317 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6318 {
6319         int ret = 0;
6320         u32 granularity, peer_granularity;
6321         u32 pa_tactivate, peer_pa_tactivate;
6322         u32 pa_tactivate_us, peer_pa_tactivate_us;
6323         u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6324
6325         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6326                                   &granularity);
6327         if (ret)
6328                 goto out;
6329
6330         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6331                                   &peer_granularity);
6332         if (ret)
6333                 goto out;
6334
6335         if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6336             (granularity > PA_GRANULARITY_MAX_VAL)) {
6337                 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6338                         __func__, granularity);
6339                 return -EINVAL;
6340         }
6341
6342         if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6343             (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6344                 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6345                         __func__, peer_granularity);
6346                 return -EINVAL;
6347         }
6348
6349         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6350         if (ret)
6351                 goto out;
6352
6353         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6354                                   &peer_pa_tactivate);
6355         if (ret)
6356                 goto out;
6357
6358         pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6359         peer_pa_tactivate_us = peer_pa_tactivate *
6360                              gran_to_us_table[peer_granularity - 1];
6361
6362         if (pa_tactivate_us > peer_pa_tactivate_us) {
6363                 u32 new_peer_pa_tactivate;
6364
6365                 new_peer_pa_tactivate = pa_tactivate_us /
6366                                       gran_to_us_table[peer_granularity - 1];
6367                 new_peer_pa_tactivate++;
6368                 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6369                                           new_peer_pa_tactivate);
6370         }
6371
6372 out:
6373         return ret;
6374 }
6375
6376 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6377 {
6378         if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6379                 ufshcd_tune_pa_tactivate(hba);
6380                 ufshcd_tune_pa_hibern8time(hba);
6381         }
6382
6383         if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6384                 /* set 1ms timeout for PA_TACTIVATE */
6385                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
6386
6387         if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6388                 ufshcd_quirk_tune_host_pa_tactivate(hba);
6389
6390         ufshcd_vops_apply_dev_quirks(hba);
6391 }
6392
6393 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6394 {
6395         int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6396
6397         hba->ufs_stats.hibern8_exit_cnt = 0;
6398         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6399
6400         memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6401         memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6402         memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6403         memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6404         memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
6405
6406         hba->req_abort_count = 0;
6407 }
6408
6409 static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6410 {
6411         int err;
6412
6413         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6414                 &hba->desc_size.dev_desc);
6415         if (err)
6416                 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6417
6418         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6419                 &hba->desc_size.pwr_desc);
6420         if (err)
6421                 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6422
6423         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6424                 &hba->desc_size.interc_desc);
6425         if (err)
6426                 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6427
6428         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6429                 &hba->desc_size.conf_desc);
6430         if (err)
6431                 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6432
6433         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6434                 &hba->desc_size.unit_desc);
6435         if (err)
6436                 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6437
6438         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6439                 &hba->desc_size.geom_desc);
6440         if (err)
6441                 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6442         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6443                 &hba->desc_size.hlth_desc);
6444         if (err)
6445                 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6446 }
6447
6448 static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
6449 {
6450         hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6451         hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6452         hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6453         hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6454         hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6455         hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6456         hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6457 }
6458
6459 /**
6460  * ufshcd_probe_hba - probe hba to detect device and initialize
6461  * @hba: per-adapter instance
6462  *
6463  * Execute link-startup and verify device initialization
6464  */
6465 static int ufshcd_probe_hba(struct ufs_hba *hba)
6466 {
6467         struct ufs_dev_desc card = {0};
6468         int ret;
6469         ktime_t start = ktime_get();
6470
6471         ret = ufshcd_link_startup(hba);
6472         if (ret)
6473                 goto out;
6474
6475         /* set the default level for urgent bkops */
6476         hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6477         hba->is_urgent_bkops_lvl_checked = false;
6478
6479         /* Debug counters initialization */
6480         ufshcd_clear_dbg_ufs_stats(hba);
6481
6482         /* UniPro link is active now */
6483         ufshcd_set_link_active(hba);
6484
6485         /* Enable Auto-Hibernate if configured */
6486         ufshcd_auto_hibern8_enable(hba);
6487
6488         ret = ufshcd_verify_dev_init(hba);
6489         if (ret)
6490                 goto out;
6491
6492         ret = ufshcd_complete_dev_init(hba);
6493         if (ret)
6494                 goto out;
6495
6496         /* Init check for device descriptor sizes */
6497         ufshcd_init_desc_sizes(hba);
6498
6499         ret = ufs_get_device_desc(hba, &card);
6500         if (ret) {
6501                 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6502                         __func__, ret);
6503                 goto out;
6504         }
6505
6506         ufs_fixup_device_setup(hba, &card);
6507         ufshcd_tune_unipro_params(hba);
6508
6509         ret = ufshcd_set_vccq_rail_unused(hba,
6510                 (hba->dev_quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
6511         if (ret)
6512                 goto out;
6513
6514         /* UFS device is also active now */
6515         ufshcd_set_ufs_dev_active(hba);
6516         ufshcd_force_reset_auto_bkops(hba);
6517         hba->wlun_dev_clr_ua = true;
6518
6519         if (ufshcd_get_max_pwr_mode(hba)) {
6520                 dev_err(hba->dev,
6521                         "%s: Failed getting max supported power mode\n",
6522                         __func__);
6523         } else {
6524                 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
6525                 if (ret) {
6526                         dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6527                                         __func__, ret);
6528                         goto out;
6529                 }
6530         }
6531
6532         /* set the state as operational after switching to desired gear */
6533         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6534
6535         /*
6536          * If we are in error handling context or in power management callbacks
6537          * context, no need to scan the host
6538          */
6539         if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6540                 bool flag;
6541
6542                 /* clear any previous UFS device information */
6543                 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
6544                 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6545                                 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
6546                         hba->dev_info.f_power_on_wp_en = flag;
6547
6548                 if (!hba->is_init_prefetch)
6549                         ufshcd_init_icc_levels(hba);
6550
6551                 /* Add required well known logical units to scsi mid layer */
6552                 if (ufshcd_scsi_add_wlus(hba))
6553                         goto out;
6554
6555                 /* Initialize devfreq after UFS device is detected */
6556                 if (ufshcd_is_clkscaling_supported(hba)) {
6557                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
6558                                 &hba->pwr_info,
6559                                 sizeof(struct ufs_pa_layer_attr));
6560                         hba->clk_scaling.saved_pwr_info.is_valid = true;
6561                         if (!hba->devfreq) {
6562                                 ret = ufshcd_devfreq_init(hba);
6563                                 if (ret)
6564                                         goto out;
6565                         }
6566                         hba->clk_scaling.is_allowed = true;
6567                 }
6568
6569                 scsi_scan_host(hba->host);
6570                 pm_runtime_put_sync(hba->dev);
6571         }
6572
6573         if (!hba->is_init_prefetch)
6574                 hba->is_init_prefetch = true;
6575
6576 out:
6577         /*
6578          * If we failed to initialize the device or the device is not
6579          * present, turn off the power/clocks etc.
6580          */
6581         if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6582                 pm_runtime_put_sync(hba->dev);
6583                 ufshcd_hba_exit(hba);
6584         }
6585
6586         trace_ufshcd_init(dev_name(hba->dev), ret,
6587                 ktime_to_us(ktime_sub(ktime_get(), start)),
6588                 hba->curr_dev_pwr_mode, hba->uic_link_state);
6589         return ret;
6590 }
6591
6592 /**
6593  * ufshcd_async_scan - asynchronous execution for probing hba
6594  * @data: data pointer to pass to this function
6595  * @cookie: cookie data
6596  */
6597 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6598 {
6599         struct ufs_hba *hba = (struct ufs_hba *)data;
6600
6601         ufshcd_probe_hba(hba);
6602 }
6603
6604 static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
6605 {
6606         unsigned long flags;
6607         struct Scsi_Host *host;
6608         struct ufs_hba *hba;
6609         int index;
6610         bool found = false;
6611
6612         if (!scmd || !scmd->device || !scmd->device->host)
6613                 return BLK_EH_NOT_HANDLED;
6614
6615         host = scmd->device->host;
6616         hba = shost_priv(host);
6617         if (!hba)
6618                 return BLK_EH_NOT_HANDLED;
6619
6620         spin_lock_irqsave(host->host_lock, flags);
6621
6622         for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
6623                 if (hba->lrb[index].cmd == scmd) {
6624                         found = true;
6625                         break;
6626                 }
6627         }
6628
6629         spin_unlock_irqrestore(host->host_lock, flags);
6630
6631         /*
6632          * Bypass SCSI error handling and reset the block layer timer if this
6633          * SCSI command was not actually dispatched to UFS driver, otherwise
6634          * let SCSI layer handle the error as usual.
6635          */
6636         return found ? BLK_EH_NOT_HANDLED : BLK_EH_RESET_TIMER;
6637 }
6638
6639 static const struct attribute_group *ufshcd_driver_groups[] = {
6640         &ufs_sysfs_unit_descriptor_group,
6641         &ufs_sysfs_lun_attributes_group,
6642         NULL,
6643 };
6644
6645 static struct scsi_host_template ufshcd_driver_template = {
6646         .module                 = THIS_MODULE,
6647         .name                   = UFSHCD,
6648         .proc_name              = UFSHCD,
6649         .queuecommand           = ufshcd_queuecommand,
6650         .slave_alloc            = ufshcd_slave_alloc,
6651         .slave_configure        = ufshcd_slave_configure,
6652         .slave_destroy          = ufshcd_slave_destroy,
6653         .change_queue_depth     = ufshcd_change_queue_depth,
6654         .eh_abort_handler       = ufshcd_abort,
6655         .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
6656         .eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
6657         .eh_timed_out           = ufshcd_eh_timed_out,
6658         .this_id                = -1,
6659         .sg_tablesize           = SG_ALL,
6660         .cmd_per_lun            = UFSHCD_CMD_PER_LUN,
6661         .can_queue              = UFSHCD_CAN_QUEUE,
6662         .max_host_blocked       = 1,
6663         .track_queue_depth      = 1,
6664         .sdev_groups            = ufshcd_driver_groups,
6665 };
6666
6667 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
6668                                    int ua)
6669 {
6670         int ret;
6671
6672         if (!vreg)
6673                 return 0;
6674
6675         ret = regulator_set_load(vreg->reg, ua);
6676         if (ret < 0) {
6677                 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
6678                                 __func__, vreg->name, ua, ret);
6679         }
6680
6681         return ret;
6682 }
6683
6684 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
6685                                          struct ufs_vreg *vreg)
6686 {
6687         if (!vreg)
6688                 return 0;
6689         else if (vreg->unused)
6690                 return 0;
6691         else
6692                 return ufshcd_config_vreg_load(hba->dev, vreg,
6693                                                UFS_VREG_LPM_LOAD_UA);
6694 }
6695
6696 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
6697                                          struct ufs_vreg *vreg)
6698 {
6699         if (!vreg)
6700                 return 0;
6701         else if (vreg->unused)
6702                 return 0;
6703         else
6704                 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
6705 }
6706
6707 static int ufshcd_config_vreg(struct device *dev,
6708                 struct ufs_vreg *vreg, bool on)
6709 {
6710         int ret = 0;
6711         struct regulator *reg;
6712         const char *name;
6713         int min_uV, uA_load;
6714
6715         BUG_ON(!vreg);
6716
6717         reg = vreg->reg;
6718         name = vreg->name;
6719
6720         if (regulator_count_voltages(reg) > 0) {
6721                 min_uV = on ? vreg->min_uV : 0;
6722                 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
6723                 if (ret) {
6724                         dev_err(dev, "%s: %s set voltage failed, err=%d\n",
6725                                         __func__, name, ret);
6726                         goto out;
6727                 }
6728
6729                 uA_load = on ? vreg->max_uA : 0;
6730                 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
6731                 if (ret)
6732                         goto out;
6733         }
6734 out:
6735         return ret;
6736 }
6737
6738 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
6739 {
6740         int ret = 0;
6741
6742         if (!vreg)
6743                 goto out;
6744         else if (vreg->enabled || vreg->unused)
6745                 goto out;
6746
6747         ret = ufshcd_config_vreg(dev, vreg, true);
6748         if (!ret)
6749                 ret = regulator_enable(vreg->reg);
6750
6751         if (!ret)
6752                 vreg->enabled = true;
6753         else
6754                 dev_err(dev, "%s: %s enable failed, err=%d\n",
6755                                 __func__, vreg->name, ret);
6756 out:
6757         return ret;
6758 }
6759
6760 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
6761 {
6762         int ret = 0;
6763
6764         if (!vreg)
6765                 goto out;
6766         else if (!vreg->enabled || vreg->unused)
6767                 goto out;
6768
6769         ret = regulator_disable(vreg->reg);
6770
6771         if (!ret) {
6772                 /* ignore errors on applying disable config */
6773                 ufshcd_config_vreg(dev, vreg, false);
6774                 vreg->enabled = false;
6775         } else {
6776                 dev_err(dev, "%s: %s disable failed, err=%d\n",
6777                                 __func__, vreg->name, ret);
6778         }
6779 out:
6780         return ret;
6781 }
6782
6783 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
6784 {
6785         int ret = 0;
6786         struct device *dev = hba->dev;
6787         struct ufs_vreg_info *info = &hba->vreg_info;
6788
6789         if (!info)
6790                 goto out;
6791
6792         ret = ufshcd_toggle_vreg(dev, info->vcc, on);
6793         if (ret)
6794                 goto out;
6795
6796         ret = ufshcd_toggle_vreg(dev, info->vccq, on);
6797         if (ret)
6798                 goto out;
6799
6800         ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
6801         if (ret)
6802                 goto out;
6803
6804 out:
6805         if (ret) {
6806                 ufshcd_toggle_vreg(dev, info->vccq2, false);
6807                 ufshcd_toggle_vreg(dev, info->vccq, false);
6808                 ufshcd_toggle_vreg(dev, info->vcc, false);
6809         }
6810         return ret;
6811 }
6812
6813 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
6814 {
6815         struct ufs_vreg_info *info = &hba->vreg_info;
6816
6817         if (info)
6818                 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
6819
6820         return 0;
6821 }
6822
6823 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
6824 {
6825         int ret = 0;
6826
6827         if (!vreg)
6828                 goto out;
6829
6830         vreg->reg = devm_regulator_get(dev, vreg->name);
6831         if (IS_ERR(vreg->reg)) {
6832                 ret = PTR_ERR(vreg->reg);
6833                 dev_err(dev, "%s: %s get failed, err=%d\n",
6834                                 __func__, vreg->name, ret);
6835         }
6836 out:
6837         return ret;
6838 }
6839
6840 static int ufshcd_init_vreg(struct ufs_hba *hba)
6841 {
6842         int ret = 0;
6843         struct device *dev = hba->dev;
6844         struct ufs_vreg_info *info = &hba->vreg_info;
6845
6846         if (!info)
6847                 goto out;
6848
6849         ret = ufshcd_get_vreg(dev, info->vcc);
6850         if (ret)
6851                 goto out;
6852
6853         ret = ufshcd_get_vreg(dev, info->vccq);
6854         if (ret)
6855                 goto out;
6856
6857         ret = ufshcd_get_vreg(dev, info->vccq2);
6858 out:
6859         return ret;
6860 }
6861
6862 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
6863 {
6864         struct ufs_vreg_info *info = &hba->vreg_info;
6865
6866         if (info)
6867                 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
6868
6869         return 0;
6870 }
6871
6872 static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
6873 {
6874         int ret = 0;
6875         struct ufs_vreg_info *info = &hba->vreg_info;
6876
6877         if (!info)
6878                 goto out;
6879         else if (!info->vccq)
6880                 goto out;
6881
6882         if (unused) {
6883                 /* shut off the rail here */
6884                 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
6885                 /*
6886                  * Mark this rail as no longer used, so it doesn't get enabled
6887                  * later by mistake
6888                  */
6889                 if (!ret)
6890                         info->vccq->unused = true;
6891         } else {
6892                 /*
6893                  * rail should have been already enabled hence just make sure
6894                  * that unused flag is cleared.
6895                  */
6896                 info->vccq->unused = false;
6897         }
6898 out:
6899         return ret;
6900 }
6901
6902 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
6903                                         bool skip_ref_clk)
6904 {
6905         int ret = 0;
6906         struct ufs_clk_info *clki;
6907         struct list_head *head = &hba->clk_list_head;
6908         unsigned long flags;
6909         ktime_t start = ktime_get();
6910         bool clk_state_changed = false;
6911
6912         if (list_empty(head))
6913                 goto out;
6914
6915         ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
6916         if (ret)
6917                 return ret;
6918
6919         list_for_each_entry(clki, head, list) {
6920                 if (!IS_ERR_OR_NULL(clki->clk)) {
6921                         if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
6922                                 continue;
6923
6924                         clk_state_changed = on ^ clki->enabled;
6925                         if (on && !clki->enabled) {
6926                                 ret = clk_prepare_enable(clki->clk);
6927                                 if (ret) {
6928                                         dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
6929                                                 __func__, clki->name, ret);
6930                                         goto out;
6931                                 }
6932                         } else if (!on && clki->enabled) {
6933                                 clk_disable_unprepare(clki->clk);
6934                         }
6935                         clki->enabled = on;
6936                         dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
6937                                         clki->name, on ? "en" : "dis");
6938                 }
6939         }
6940
6941         ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
6942         if (ret)
6943                 return ret;
6944
6945 out:
6946         if (ret) {
6947                 list_for_each_entry(clki, head, list) {
6948                         if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
6949                                 clk_disable_unprepare(clki->clk);
6950                 }
6951         } else if (!ret && on) {
6952                 spin_lock_irqsave(hba->host->host_lock, flags);
6953                 hba->clk_gating.state = CLKS_ON;
6954                 trace_ufshcd_clk_gating(dev_name(hba->dev),
6955                                         hba->clk_gating.state);
6956                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6957         }
6958
6959         if (clk_state_changed)
6960                 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
6961                         (on ? "on" : "off"),
6962                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
6963         return ret;
6964 }
6965
6966 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
6967 {
6968         return  __ufshcd_setup_clocks(hba, on, false);
6969 }
6970
6971 static int ufshcd_init_clocks(struct ufs_hba *hba)
6972 {
6973         int ret = 0;
6974         struct ufs_clk_info *clki;
6975         struct device *dev = hba->dev;
6976         struct list_head *head = &hba->clk_list_head;
6977
6978         if (list_empty(head))
6979                 goto out;
6980
6981         list_for_each_entry(clki, head, list) {
6982                 if (!clki->name)
6983                         continue;
6984
6985                 clki->clk = devm_clk_get(dev, clki->name);
6986                 if (IS_ERR(clki->clk)) {
6987                         ret = PTR_ERR(clki->clk);
6988                         dev_err(dev, "%s: %s clk get failed, %d\n",
6989                                         __func__, clki->name, ret);
6990                         goto out;
6991                 }
6992
6993                 if (clki->max_freq) {
6994                         ret = clk_set_rate(clki->clk, clki->max_freq);
6995                         if (ret) {
6996                                 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
6997                                         __func__, clki->name,
6998                                         clki->max_freq, ret);
6999                                 goto out;
7000                         }
7001                         clki->curr_freq = clki->max_freq;
7002                 }
7003                 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7004                                 clki->name, clk_get_rate(clki->clk));
7005         }
7006 out:
7007         return ret;
7008 }
7009
7010 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7011 {
7012         int err = 0;
7013
7014         if (!hba->vops)
7015                 goto out;
7016
7017         err = ufshcd_vops_init(hba);
7018         if (err)
7019                 goto out;
7020
7021         err = ufshcd_vops_setup_regulators(hba, true);
7022         if (err)
7023                 goto out_exit;
7024
7025         goto out;
7026
7027 out_exit:
7028         ufshcd_vops_exit(hba);
7029 out:
7030         if (err)
7031                 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
7032                         __func__, ufshcd_get_var_name(hba), err);
7033         return err;
7034 }
7035
7036 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7037 {
7038         if (!hba->vops)
7039                 return;
7040
7041         ufshcd_vops_setup_regulators(hba, false);
7042
7043         ufshcd_vops_exit(hba);
7044 }
7045
7046 static int ufshcd_hba_init(struct ufs_hba *hba)
7047 {
7048         int err;
7049
7050         /*
7051          * Handle host controller power separately from the UFS device power
7052          * rails as it will help controlling the UFS host controller power
7053          * collapse easily which is different than UFS device power collapse.
7054          * Also, enable the host controller power before we go ahead with rest
7055          * of the initialization here.
7056          */
7057         err = ufshcd_init_hba_vreg(hba);
7058         if (err)
7059                 goto out;
7060
7061         err = ufshcd_setup_hba_vreg(hba, true);
7062         if (err)
7063                 goto out;
7064
7065         err = ufshcd_init_clocks(hba);
7066         if (err)
7067                 goto out_disable_hba_vreg;
7068
7069         err = ufshcd_setup_clocks(hba, true);
7070         if (err)
7071                 goto out_disable_hba_vreg;
7072
7073         err = ufshcd_init_vreg(hba);
7074         if (err)
7075                 goto out_disable_clks;
7076
7077         err = ufshcd_setup_vreg(hba, true);
7078         if (err)
7079                 goto out_disable_clks;
7080
7081         err = ufshcd_variant_hba_init(hba);
7082         if (err)
7083                 goto out_disable_vreg;
7084
7085         hba->is_powered = true;
7086         goto out;
7087
7088 out_disable_vreg:
7089         ufshcd_setup_vreg(hba, false);
7090 out_disable_clks:
7091         ufshcd_setup_clocks(hba, false);
7092 out_disable_hba_vreg:
7093         ufshcd_setup_hba_vreg(hba, false);
7094 out:
7095         return err;
7096 }
7097
7098 static void ufshcd_hba_exit(struct ufs_hba *hba)
7099 {
7100         if (hba->is_powered) {
7101                 ufshcd_variant_hba_exit(hba);
7102                 ufshcd_setup_vreg(hba, false);
7103                 ufshcd_suspend_clkscaling(hba);
7104                 if (ufshcd_is_clkscaling_supported(hba)) {
7105                         if (hba->devfreq)
7106                                 ufshcd_suspend_clkscaling(hba);
7107                         destroy_workqueue(hba->clk_scaling.workq);
7108                         ufshcd_devfreq_remove(hba);
7109                 }
7110                 ufshcd_setup_clocks(hba, false);
7111                 ufshcd_setup_hba_vreg(hba, false);
7112                 hba->is_powered = false;
7113         }
7114 }
7115
7116 static int
7117 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
7118 {
7119         unsigned char cmd[6] = {REQUEST_SENSE,
7120                                 0,
7121                                 0,
7122                                 0,
7123                                 UFSHCD_REQ_SENSE_SIZE,
7124                                 0};
7125         char *buffer;
7126         int ret;
7127
7128         buffer = kzalloc(UFSHCD_REQ_SENSE_SIZE, GFP_KERNEL);
7129         if (!buffer) {
7130                 ret = -ENOMEM;
7131                 goto out;
7132         }
7133
7134         ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7135                         UFSHCD_REQ_SENSE_SIZE, NULL, NULL,
7136                         msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
7137         if (ret)
7138                 pr_err("%s: failed with err %d\n", __func__, ret);
7139
7140         kfree(buffer);
7141 out:
7142         return ret;
7143 }
7144
7145 /**
7146  * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7147  *                           power mode
7148  * @hba: per adapter instance
7149  * @pwr_mode: device power mode to set
7150  *
7151  * Returns 0 if requested power mode is set successfully
7152  * Returns non-zero if failed to set the requested power mode
7153  */
7154 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7155                                      enum ufs_dev_pwr_mode pwr_mode)
7156 {
7157         unsigned char cmd[6] = { START_STOP };
7158         struct scsi_sense_hdr sshdr;
7159         struct scsi_device *sdp;
7160         unsigned long flags;
7161         int ret;
7162
7163         spin_lock_irqsave(hba->host->host_lock, flags);
7164         sdp = hba->sdev_ufs_device;
7165         if (sdp) {
7166                 ret = scsi_device_get(sdp);
7167                 if (!ret && !scsi_device_online(sdp)) {
7168                         ret = -ENODEV;
7169                         scsi_device_put(sdp);
7170                 }
7171         } else {
7172                 ret = -ENODEV;
7173         }
7174         spin_unlock_irqrestore(hba->host->host_lock, flags);
7175
7176         if (ret)
7177                 return ret;
7178
7179         /*
7180          * If scsi commands fail, the scsi mid-layer schedules scsi error-
7181          * handling, which would wait for host to be resumed. Since we know
7182          * we are functional while we are here, skip host resume in error
7183          * handling context.
7184          */
7185         hba->host->eh_noresume = 1;
7186         if (hba->wlun_dev_clr_ua) {
7187                 ret = ufshcd_send_request_sense(hba, sdp);
7188                 if (ret)
7189                         goto out;
7190                 /* Unit attention condition is cleared now */
7191                 hba->wlun_dev_clr_ua = false;
7192         }
7193
7194         cmd[4] = pwr_mode << 4;
7195
7196         /*
7197          * Current function would be generally called from the power management
7198          * callbacks hence set the RQF_PM flag so that it doesn't resume the
7199          * already suspended childs.
7200          */
7201         ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7202                         START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
7203         if (ret) {
7204                 sdev_printk(KERN_WARNING, sdp,
7205                             "START_STOP failed for power mode: %d, result %x\n",
7206                             pwr_mode, ret);
7207                 if (driver_byte(ret) & DRIVER_SENSE)
7208                         scsi_print_sense_hdr(sdp, NULL, &sshdr);
7209         }
7210
7211         if (!ret)
7212                 hba->curr_dev_pwr_mode = pwr_mode;
7213 out:
7214         scsi_device_put(sdp);
7215         hba->host->eh_noresume = 0;
7216         return ret;
7217 }
7218
7219 static int ufshcd_link_state_transition(struct ufs_hba *hba,
7220                                         enum uic_link_state req_link_state,
7221                                         int check_for_bkops)
7222 {
7223         int ret = 0;
7224
7225         if (req_link_state == hba->uic_link_state)
7226                 return 0;
7227
7228         if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7229                 ret = ufshcd_uic_hibern8_enter(hba);
7230                 if (!ret)
7231                         ufshcd_set_link_hibern8(hba);
7232                 else
7233                         goto out;
7234         }
7235         /*
7236          * If autobkops is enabled, link can't be turned off because
7237          * turning off the link would also turn off the device.
7238          */
7239         else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7240                    (!check_for_bkops || (check_for_bkops &&
7241                     !hba->auto_bkops_enabled))) {
7242                 /*
7243                  * Let's make sure that link is in low power mode, we are doing
7244                  * this currently by putting the link in Hibern8. Otherway to
7245                  * put the link in low power mode is to send the DME end point
7246                  * to device and then send the DME reset command to local
7247                  * unipro. But putting the link in hibern8 is much faster.
7248                  */
7249                 ret = ufshcd_uic_hibern8_enter(hba);
7250                 if (ret)
7251                         goto out;
7252                 /*
7253                  * Change controller state to "reset state" which
7254                  * should also put the link in off/reset state
7255                  */
7256                 ufshcd_hba_stop(hba, true);
7257                 /*
7258                  * TODO: Check if we need any delay to make sure that
7259                  * controller is reset
7260                  */
7261                 ufshcd_set_link_off(hba);
7262         }
7263
7264 out:
7265         return ret;
7266 }
7267
7268 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7269 {
7270         /*
7271          * It seems some UFS devices may keep drawing more than sleep current
7272          * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7273          * To avoid this situation, add 2ms delay before putting these UFS
7274          * rails in LPM mode.
7275          */
7276         if (!ufshcd_is_link_active(hba) &&
7277             hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7278                 usleep_range(2000, 2100);
7279
7280         /*
7281          * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7282          * power.
7283          *
7284          * If UFS device and link is in OFF state, all power supplies (VCC,
7285          * VCCQ, VCCQ2) can be turned off if power on write protect is not
7286          * required. If UFS link is inactive (Hibern8 or OFF state) and device
7287          * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7288          *
7289          * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7290          * in low power state which would save some power.
7291          */
7292         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7293             !hba->dev_info.is_lu_power_on_wp) {
7294                 ufshcd_setup_vreg(hba, false);
7295         } else if (!ufshcd_is_ufs_dev_active(hba)) {
7296                 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7297                 if (!ufshcd_is_link_active(hba)) {
7298                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7299                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7300                 }
7301         }
7302 }
7303
7304 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7305 {
7306         int ret = 0;
7307
7308         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7309             !hba->dev_info.is_lu_power_on_wp) {
7310                 ret = ufshcd_setup_vreg(hba, true);
7311         } else if (!ufshcd_is_ufs_dev_active(hba)) {
7312                 if (!ret && !ufshcd_is_link_active(hba)) {
7313                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7314                         if (ret)
7315                                 goto vcc_disable;
7316                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7317                         if (ret)
7318                                 goto vccq_lpm;
7319                 }
7320                 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
7321         }
7322         goto out;
7323
7324 vccq_lpm:
7325         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7326 vcc_disable:
7327         ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7328 out:
7329         return ret;
7330 }
7331
7332 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7333 {
7334         if (ufshcd_is_link_off(hba))
7335                 ufshcd_setup_hba_vreg(hba, false);
7336 }
7337
7338 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7339 {
7340         if (ufshcd_is_link_off(hba))
7341                 ufshcd_setup_hba_vreg(hba, true);
7342 }
7343
7344 /**
7345  * ufshcd_suspend - helper function for suspend operations
7346  * @hba: per adapter instance
7347  * @pm_op: desired low power operation type
7348  *
7349  * This function will try to put the UFS device and link into low power
7350  * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7351  * (System PM level).
7352  *
7353  * If this function is called during shutdown, it will make sure that
7354  * both UFS device and UFS link is powered off.
7355  *
7356  * NOTE: UFS device & link must be active before we enter in this function.
7357  *
7358  * Returns 0 for success and non-zero for failure
7359  */
7360 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7361 {
7362         int ret = 0;
7363         enum ufs_pm_level pm_lvl;
7364         enum ufs_dev_pwr_mode req_dev_pwr_mode;
7365         enum uic_link_state req_link_state;
7366
7367         hba->pm_op_in_progress = 1;
7368         if (!ufshcd_is_shutdown_pm(pm_op)) {
7369                 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7370                          hba->rpm_lvl : hba->spm_lvl;
7371                 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7372                 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7373         } else {
7374                 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7375                 req_link_state = UIC_LINK_OFF_STATE;
7376         }
7377
7378         /*
7379          * If we can't transition into any of the low power modes
7380          * just gate the clocks.
7381          */
7382         ufshcd_hold(hba, false);
7383         hba->clk_gating.is_suspended = true;
7384
7385         if (hba->clk_scaling.is_allowed) {
7386                 cancel_work_sync(&hba->clk_scaling.suspend_work);
7387                 cancel_work_sync(&hba->clk_scaling.resume_work);
7388                 ufshcd_suspend_clkscaling(hba);
7389         }
7390
7391         if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7392                         req_link_state == UIC_LINK_ACTIVE_STATE) {
7393                 goto disable_clks;
7394         }
7395
7396         if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7397             (req_link_state == hba->uic_link_state))
7398                 goto enable_gating;
7399
7400         /* UFS device & link must be active before we enter in this function */
7401         if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7402                 ret = -EINVAL;
7403                 goto enable_gating;
7404         }
7405
7406         if (ufshcd_is_runtime_pm(pm_op)) {
7407                 if (ufshcd_can_autobkops_during_suspend(hba)) {
7408                         /*
7409                          * The device is idle with no requests in the queue,
7410                          * allow background operations if bkops status shows
7411                          * that performance might be impacted.
7412                          */
7413                         ret = ufshcd_urgent_bkops(hba);
7414                         if (ret)
7415                                 goto enable_gating;
7416                 } else {
7417                         /* make sure that auto bkops is disabled */
7418                         ufshcd_disable_auto_bkops(hba);
7419                 }
7420         }
7421
7422         if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7423              ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7424                !ufshcd_is_runtime_pm(pm_op))) {
7425                 /* ensure that bkops is disabled */
7426                 ufshcd_disable_auto_bkops(hba);
7427                 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7428                 if (ret)
7429                         goto enable_gating;
7430         }
7431
7432         ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7433         if (ret)
7434                 goto set_dev_active;
7435
7436         ufshcd_vreg_set_lpm(hba);
7437
7438 disable_clks:
7439         /*
7440          * Call vendor specific suspend callback. As these callbacks may access
7441          * vendor specific host controller register space call them before the
7442          * host clocks are ON.
7443          */
7444         ret = ufshcd_vops_suspend(hba, pm_op);
7445         if (ret)
7446                 goto set_link_active;
7447
7448         if (!ufshcd_is_link_active(hba))
7449                 ufshcd_setup_clocks(hba, false);
7450         else
7451                 /* If link is active, device ref_clk can't be switched off */
7452                 __ufshcd_setup_clocks(hba, false, true);
7453
7454         hba->clk_gating.state = CLKS_OFF;
7455         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
7456         /*
7457          * Disable the host irq as host controller as there won't be any
7458          * host controller transaction expected till resume.
7459          */
7460         ufshcd_disable_irq(hba);
7461         /* Put the host controller in low power mode if possible */
7462         ufshcd_hba_vreg_set_lpm(hba);
7463         goto out;
7464
7465 set_link_active:
7466         if (hba->clk_scaling.is_allowed)
7467                 ufshcd_resume_clkscaling(hba);
7468         ufshcd_vreg_set_hpm(hba);
7469         if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7470                 ufshcd_set_link_active(hba);
7471         else if (ufshcd_is_link_off(hba))
7472                 ufshcd_host_reset_and_restore(hba);
7473 set_dev_active:
7474         if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7475                 ufshcd_disable_auto_bkops(hba);
7476 enable_gating:
7477         if (hba->clk_scaling.is_allowed)
7478                 ufshcd_resume_clkscaling(hba);
7479         hba->clk_gating.is_suspended = false;
7480         ufshcd_release(hba);
7481 out:
7482         hba->pm_op_in_progress = 0;
7483         return ret;
7484 }
7485
7486 /**
7487  * ufshcd_resume - helper function for resume operations
7488  * @hba: per adapter instance
7489  * @pm_op: runtime PM or system PM
7490  *
7491  * This function basically brings the UFS device, UniPro link and controller
7492  * to active state.
7493  *
7494  * Returns 0 for success and non-zero for failure
7495  */
7496 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7497 {
7498         int ret;
7499         enum uic_link_state old_link_state;
7500
7501         hba->pm_op_in_progress = 1;
7502         old_link_state = hba->uic_link_state;
7503
7504         ufshcd_hba_vreg_set_hpm(hba);
7505         /* Make sure clocks are enabled before accessing controller */
7506         ret = ufshcd_setup_clocks(hba, true);
7507         if (ret)
7508                 goto out;
7509
7510         /* enable the host irq as host controller would be active soon */
7511         ret = ufshcd_enable_irq(hba);
7512         if (ret)
7513                 goto disable_irq_and_vops_clks;
7514
7515         ret = ufshcd_vreg_set_hpm(hba);
7516         if (ret)
7517                 goto disable_irq_and_vops_clks;
7518
7519         /*
7520          * Call vendor specific resume callback. As these callbacks may access
7521          * vendor specific host controller register space call them when the
7522          * host clocks are ON.
7523          */
7524         ret = ufshcd_vops_resume(hba, pm_op);
7525         if (ret)
7526                 goto disable_vreg;
7527
7528         if (ufshcd_is_link_hibern8(hba)) {
7529                 ret = ufshcd_uic_hibern8_exit(hba);
7530                 if (!ret)
7531                         ufshcd_set_link_active(hba);
7532                 else
7533                         goto vendor_suspend;
7534         } else if (ufshcd_is_link_off(hba)) {
7535                 ret = ufshcd_host_reset_and_restore(hba);
7536                 /*
7537                  * ufshcd_host_reset_and_restore() should have already
7538                  * set the link state as active
7539                  */
7540                 if (ret || !ufshcd_is_link_active(hba))
7541                         goto vendor_suspend;
7542         }
7543
7544         if (!ufshcd_is_ufs_dev_active(hba)) {
7545                 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7546                 if (ret)
7547                         goto set_old_link_state;
7548         }
7549
7550         if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7551                 ufshcd_enable_auto_bkops(hba);
7552         else
7553                 /*
7554                  * If BKOPs operations are urgently needed at this moment then
7555                  * keep auto-bkops enabled or else disable it.
7556                  */
7557                 ufshcd_urgent_bkops(hba);
7558
7559         hba->clk_gating.is_suspended = false;
7560
7561         if (hba->clk_scaling.is_allowed)
7562                 ufshcd_resume_clkscaling(hba);
7563
7564         /* Schedule clock gating in case of no access to UFS device yet */
7565         ufshcd_release(hba);
7566
7567         /* Enable Auto-Hibernate if configured */
7568         ufshcd_auto_hibern8_enable(hba);
7569
7570         goto out;
7571
7572 set_old_link_state:
7573         ufshcd_link_state_transition(hba, old_link_state, 0);
7574 vendor_suspend:
7575         ufshcd_vops_suspend(hba, pm_op);
7576 disable_vreg:
7577         ufshcd_vreg_set_lpm(hba);
7578 disable_irq_and_vops_clks:
7579         ufshcd_disable_irq(hba);
7580         if (hba->clk_scaling.is_allowed)
7581                 ufshcd_suspend_clkscaling(hba);
7582         ufshcd_setup_clocks(hba, false);
7583 out:
7584         hba->pm_op_in_progress = 0;
7585         return ret;
7586 }
7587
7588 /**
7589  * ufshcd_system_suspend - system suspend routine
7590  * @hba: per adapter instance
7591  *
7592  * Check the description of ufshcd_suspend() function for more details.
7593  *
7594  * Returns 0 for success and non-zero for failure
7595  */
7596 int ufshcd_system_suspend(struct ufs_hba *hba)
7597 {
7598         int ret = 0;
7599         ktime_t start = ktime_get();
7600
7601         if (!hba || !hba->is_powered)
7602                 return 0;
7603
7604         if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7605              hba->curr_dev_pwr_mode) &&
7606             (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7607              hba->uic_link_state))
7608                 goto out;
7609
7610         if (pm_runtime_suspended(hba->dev)) {
7611                 /*
7612                  * UFS device and/or UFS link low power states during runtime
7613                  * suspend seems to be different than what is expected during
7614                  * system suspend. Hence runtime resume the devic & link and
7615                  * let the system suspend low power states to take effect.
7616                  * TODO: If resume takes longer time, we might have optimize
7617                  * it in future by not resuming everything if possible.
7618                  */
7619                 ret = ufshcd_runtime_resume(hba);
7620                 if (ret)
7621                         goto out;
7622         }
7623
7624         ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
7625 out:
7626         trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
7627                 ktime_to_us(ktime_sub(ktime_get(), start)),
7628                 hba->curr_dev_pwr_mode, hba->uic_link_state);
7629         if (!ret)
7630                 hba->is_sys_suspended = true;
7631         return ret;
7632 }
7633 EXPORT_SYMBOL(ufshcd_system_suspend);
7634
7635 /**
7636  * ufshcd_system_resume - system resume routine
7637  * @hba: per adapter instance
7638  *
7639  * Returns 0 for success and non-zero for failure
7640  */
7641
7642 int ufshcd_system_resume(struct ufs_hba *hba)
7643 {
7644         int ret = 0;
7645         ktime_t start = ktime_get();
7646
7647         if (!hba)
7648                 return -EINVAL;
7649
7650         if (!hba->is_powered || pm_runtime_suspended(hba->dev))
7651                 /*
7652                  * Let the runtime resume take care of resuming
7653                  * if runtime suspended.
7654                  */
7655                 goto out;
7656         else
7657                 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
7658 out:
7659         trace_ufshcd_system_resume(dev_name(hba->dev), ret,
7660                 ktime_to_us(ktime_sub(ktime_get(), start)),
7661                 hba->curr_dev_pwr_mode, hba->uic_link_state);
7662         return ret;
7663 }
7664 EXPORT_SYMBOL(ufshcd_system_resume);
7665
7666 /**
7667  * ufshcd_runtime_suspend - runtime suspend routine
7668  * @hba: per adapter instance
7669  *
7670  * Check the description of ufshcd_suspend() function for more details.
7671  *
7672  * Returns 0 for success and non-zero for failure
7673  */
7674 int ufshcd_runtime_suspend(struct ufs_hba *hba)
7675 {
7676         int ret = 0;
7677         ktime_t start = ktime_get();
7678
7679         if (!hba)
7680                 return -EINVAL;
7681
7682         if (!hba->is_powered)
7683                 goto out;
7684         else
7685                 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
7686 out:
7687         trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
7688                 ktime_to_us(ktime_sub(ktime_get(), start)),
7689                 hba->curr_dev_pwr_mode, hba->uic_link_state);
7690         return ret;
7691 }
7692 EXPORT_SYMBOL(ufshcd_runtime_suspend);
7693
7694 /**
7695  * ufshcd_runtime_resume - runtime resume routine
7696  * @hba: per adapter instance
7697  *
7698  * This function basically brings the UFS device, UniPro link and controller
7699  * to active state. Following operations are done in this function:
7700  *
7701  * 1. Turn on all the controller related clocks
7702  * 2. Bring the UniPro link out of Hibernate state
7703  * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
7704  *    to active state.
7705  * 4. If auto-bkops is enabled on the device, disable it.
7706  *
7707  * So following would be the possible power state after this function return
7708  * successfully:
7709  *      S1: UFS device in Active state with VCC rail ON
7710  *          UniPro link in Active state
7711  *          All the UFS/UniPro controller clocks are ON
7712  *
7713  * Returns 0 for success and non-zero for failure
7714  */
7715 int ufshcd_runtime_resume(struct ufs_hba *hba)
7716 {
7717         int ret = 0;
7718         ktime_t start = ktime_get();
7719
7720         if (!hba)
7721                 return -EINVAL;
7722
7723         if (!hba->is_powered)
7724                 goto out;
7725         else
7726                 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
7727 out:
7728         trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
7729                 ktime_to_us(ktime_sub(ktime_get(), start)),
7730                 hba->curr_dev_pwr_mode, hba->uic_link_state);
7731         return ret;
7732 }
7733 EXPORT_SYMBOL(ufshcd_runtime_resume);
7734
7735 int ufshcd_runtime_idle(struct ufs_hba *hba)
7736 {
7737         return 0;
7738 }
7739 EXPORT_SYMBOL(ufshcd_runtime_idle);
7740
7741 /**
7742  * ufshcd_shutdown - shutdown routine
7743  * @hba: per adapter instance
7744  *
7745  * This function would power off both UFS device and UFS link.
7746  *
7747  * Returns 0 always to allow force shutdown even in case of errors.
7748  */
7749 int ufshcd_shutdown(struct ufs_hba *hba)
7750 {
7751         int ret = 0;
7752
7753         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
7754                 goto out;
7755
7756         if (pm_runtime_suspended(hba->dev)) {
7757                 ret = ufshcd_runtime_resume(hba);
7758                 if (ret)
7759                         goto out;
7760         }
7761
7762         ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
7763 out:
7764         if (ret)
7765                 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
7766         /* allow force shutdown even in case of errors */
7767         return 0;
7768 }
7769 EXPORT_SYMBOL(ufshcd_shutdown);
7770
7771 /**
7772  * ufshcd_remove - de-allocate SCSI host and host memory space
7773  *              data structure memory
7774  * @hba: per adapter instance
7775  */
7776 void ufshcd_remove(struct ufs_hba *hba)
7777 {
7778         ufs_sysfs_remove_nodes(hba->dev);
7779         scsi_remove_host(hba->host);
7780         /* disable interrupts */
7781         ufshcd_disable_intr(hba, hba->intr_mask);
7782         ufshcd_hba_stop(hba, true);
7783
7784         ufshcd_exit_clk_gating(hba);
7785         if (ufshcd_is_clkscaling_supported(hba))
7786                 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
7787         ufshcd_hba_exit(hba);
7788 }
7789 EXPORT_SYMBOL_GPL(ufshcd_remove);
7790
7791 /**
7792  * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
7793  * @hba: pointer to Host Bus Adapter (HBA)
7794  */
7795 void ufshcd_dealloc_host(struct ufs_hba *hba)
7796 {
7797         scsi_host_put(hba->host);
7798 }
7799 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
7800
7801 /**
7802  * ufshcd_set_dma_mask - Set dma mask based on the controller
7803  *                       addressing capability
7804  * @hba: per adapter instance
7805  *
7806  * Returns 0 for success, non-zero for failure
7807  */
7808 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
7809 {
7810         if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
7811                 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
7812                         return 0;
7813         }
7814         return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
7815 }
7816
7817 /**
7818  * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
7819  * @dev: pointer to device handle
7820  * @hba_handle: driver private handle
7821  * Returns 0 on success, non-zero value on failure
7822  */
7823 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
7824 {
7825         struct Scsi_Host *host;
7826         struct ufs_hba *hba;
7827         int err = 0;
7828
7829         if (!dev) {
7830                 dev_err(dev,
7831                 "Invalid memory reference for dev is NULL\n");
7832                 err = -ENODEV;
7833                 goto out_error;
7834         }
7835
7836         host = scsi_host_alloc(&ufshcd_driver_template,
7837                                 sizeof(struct ufs_hba));
7838         if (!host) {
7839                 dev_err(dev, "scsi_host_alloc failed\n");
7840                 err = -ENOMEM;
7841                 goto out_error;
7842         }
7843         hba = shost_priv(host);
7844         hba->host = host;
7845         hba->dev = dev;
7846         *hba_handle = hba;
7847
7848         INIT_LIST_HEAD(&hba->clk_list_head);
7849
7850 out_error:
7851         return err;
7852 }
7853 EXPORT_SYMBOL(ufshcd_alloc_host);
7854
7855 /**
7856  * ufshcd_init - Driver initialization routine
7857  * @hba: per-adapter instance
7858  * @mmio_base: base register address
7859  * @irq: Interrupt line of device
7860  * Returns 0 on success, non-zero value on failure
7861  */
7862 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
7863 {
7864         int err;
7865         struct Scsi_Host *host = hba->host;
7866         struct device *dev = hba->dev;
7867
7868         if (!mmio_base) {
7869                 dev_err(hba->dev,
7870                 "Invalid memory reference for mmio_base is NULL\n");
7871                 err = -ENODEV;
7872                 goto out_error;
7873         }
7874
7875         hba->mmio_base = mmio_base;
7876         hba->irq = irq;
7877
7878         /* Set descriptor lengths to specification defaults */
7879         ufshcd_def_desc_sizes(hba);
7880
7881         err = ufshcd_hba_init(hba);
7882         if (err)
7883                 goto out_error;
7884
7885         /* Read capabilities registers */
7886         ufshcd_hba_capabilities(hba);
7887
7888         /* Get UFS version supported by the controller */
7889         hba->ufs_version = ufshcd_get_ufs_version(hba);
7890
7891         if ((hba->ufs_version != UFSHCI_VERSION_10) &&
7892             (hba->ufs_version != UFSHCI_VERSION_11) &&
7893             (hba->ufs_version != UFSHCI_VERSION_20) &&
7894             (hba->ufs_version != UFSHCI_VERSION_21))
7895                 dev_err(hba->dev, "invalid UFS version 0x%x\n",
7896                         hba->ufs_version);
7897
7898         /* Get Interrupt bit mask per version */
7899         hba->intr_mask = ufshcd_get_intr_mask(hba);
7900
7901         err = ufshcd_set_dma_mask(hba);
7902         if (err) {
7903                 dev_err(hba->dev, "set dma mask failed\n");
7904                 goto out_disable;
7905         }
7906
7907         /* Allocate memory for host memory space */
7908         err = ufshcd_memory_alloc(hba);
7909         if (err) {
7910                 dev_err(hba->dev, "Memory allocation failed\n");
7911                 goto out_disable;
7912         }
7913
7914         /* Configure LRB */
7915         ufshcd_host_memory_configure(hba);
7916
7917         host->can_queue = hba->nutrs;
7918         host->cmd_per_lun = hba->nutrs;
7919         host->max_id = UFSHCD_MAX_ID;
7920         host->max_lun = UFS_MAX_LUNS;
7921         host->max_channel = UFSHCD_MAX_CHANNEL;
7922         host->unique_id = host->host_no;
7923         host->max_cmd_len = MAX_CDB_SIZE;
7924
7925         hba->max_pwr_info.is_valid = false;
7926
7927         /* Initailize wait queue for task management */
7928         init_waitqueue_head(&hba->tm_wq);
7929         init_waitqueue_head(&hba->tm_tag_wq);
7930
7931         /* Initialize work queues */
7932         INIT_WORK(&hba->eh_work, ufshcd_err_handler);
7933         INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
7934
7935         /* Initialize UIC command mutex */
7936         mutex_init(&hba->uic_cmd_mutex);
7937
7938         /* Initialize mutex for device management commands */
7939         mutex_init(&hba->dev_cmd.lock);
7940
7941         init_rwsem(&hba->clk_scaling_lock);
7942
7943         /* Initialize device management tag acquire wait queue */
7944         init_waitqueue_head(&hba->dev_cmd.tag_wq);
7945
7946         ufshcd_init_clk_gating(hba);
7947
7948         /*
7949          * In order to avoid any spurious interrupt immediately after
7950          * registering UFS controller interrupt handler, clear any pending UFS
7951          * interrupt status and disable all the UFS interrupts.
7952          */
7953         ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
7954                       REG_INTERRUPT_STATUS);
7955         ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
7956         /*
7957          * Make sure that UFS interrupts are disabled and any pending interrupt
7958          * status is cleared before registering UFS interrupt handler.
7959          */
7960         mb();
7961
7962         /* IRQ registration */
7963         err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
7964         if (err) {
7965                 dev_err(hba->dev, "request irq failed\n");
7966                 goto exit_gating;
7967         } else {
7968                 hba->is_irq_enabled = true;
7969         }
7970
7971         err = scsi_add_host(host, hba->dev);
7972         if (err) {
7973                 dev_err(hba->dev, "scsi_add_host failed\n");
7974                 goto exit_gating;
7975         }
7976
7977         /* Host controller enable */
7978         err = ufshcd_hba_enable(hba);
7979         if (err) {
7980                 dev_err(hba->dev, "Host controller enable failed\n");
7981                 ufshcd_print_host_regs(hba);
7982                 ufshcd_print_host_state(hba);
7983                 goto out_remove_scsi_host;
7984         }
7985
7986         if (ufshcd_is_clkscaling_supported(hba)) {
7987                 char wq_name[sizeof("ufs_clkscaling_00")];
7988
7989                 INIT_WORK(&hba->clk_scaling.suspend_work,
7990                           ufshcd_clk_scaling_suspend_work);
7991                 INIT_WORK(&hba->clk_scaling.resume_work,
7992                           ufshcd_clk_scaling_resume_work);
7993
7994                 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
7995                          host->host_no);
7996                 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
7997
7998                 ufshcd_clkscaling_init_sysfs(hba);
7999         }
8000
8001         /*
8002          * Set the default power management level for runtime and system PM.
8003          * Default power saving mode is to keep UFS link in Hibern8 state
8004          * and UFS device in sleep state.
8005          */
8006         hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8007                                                 UFS_SLEEP_PWR_MODE,
8008                                                 UIC_LINK_HIBERN8_STATE);
8009         hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8010                                                 UFS_SLEEP_PWR_MODE,
8011                                                 UIC_LINK_HIBERN8_STATE);
8012
8013         /* Set the default auto-hiberate idle timer value to 150 ms */
8014         if (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) {
8015                 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8016                             FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8017         }
8018
8019         /* Hold auto suspend until async scan completes */
8020         pm_runtime_get_sync(dev);
8021
8022         /*
8023          * We are assuming that device wasn't put in sleep/power-down
8024          * state exclusively during the boot stage before kernel.
8025          * This assumption helps avoid doing link startup twice during
8026          * ufshcd_probe_hba().
8027          */
8028         ufshcd_set_ufs_dev_active(hba);
8029
8030         async_schedule(ufshcd_async_scan, hba);
8031         ufs_sysfs_add_nodes(hba->dev);
8032
8033         return 0;
8034
8035 out_remove_scsi_host:
8036         scsi_remove_host(hba->host);
8037 exit_gating:
8038         ufshcd_exit_clk_gating(hba);
8039 out_disable:
8040         hba->is_irq_enabled = false;
8041         ufshcd_hba_exit(hba);
8042 out_error:
8043         return err;
8044 }
8045 EXPORT_SYMBOL_GPL(ufshcd_init);
8046
8047 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8048 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
8049 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
8050 MODULE_LICENSE("GPL");
8051 MODULE_VERSION(UFSHCD_DRIVER_VERSION);