Merge tag 'spdx-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[linux-2.6-microblaze.git] / drivers / scsi / ufs / ufs.h
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Universal Flash Storage Host controller driver
4  * Copyright (C) 2011-2013 Samsung India Software Operations
5  *
6  * Authors:
7  *      Santosh Yaraganavi <santosh.sy@samsung.com>
8  *      Vinayak Holikatti <h.vinayak@samsung.com>
9  */
10
11 #ifndef _UFS_H
12 #define _UFS_H
13
14 #include <linux/mutex.h>
15 #include <linux/types.h>
16 #include <uapi/scsi/scsi_bsg_ufs.h>
17
18 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
19 #define QUERY_DESC_MAX_SIZE       255
20 #define QUERY_DESC_MIN_SIZE       2
21 #define QUERY_DESC_HDR_SIZE       2
22 #define QUERY_OSF_SIZE            (GENERAL_UPIU_REQUEST_SIZE - \
23                                         (sizeof(struct utp_upiu_header)))
24 #define UFS_SENSE_SIZE  18
25
26 #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\
27                         cpu_to_be32((byte3 << 24) | (byte2 << 16) |\
28                          (byte1 << 8) | (byte0))
29 /*
30  * UFS device may have standard LUs and LUN id could be from 0x00 to
31  * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
32  * UFS device may also have the Well Known LUs (also referred as W-LU)
33  * which again could be from 0x00 to 0x7F. For W-LUs, device only use
34  * the "Extended Addressing Format" which means the W-LUNs would be
35  * from 0xc100 (SCSI_W_LUN_BASE) onwards.
36  * This means max. LUN number reported from UFS device could be 0xC17F.
37  */
38 #define UFS_UPIU_MAX_UNIT_NUM_ID        0x7F
39 #define UFS_MAX_LUNS            (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
40 #define UFS_UPIU_WLUN_ID        (1 << 7)
41 #define UFS_RPMB_UNIT           0xC4
42
43 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
44 #define UFS_UPIU_MAX_WB_LUN_ID  8
45
46 /* Well known logical unit id in LUN field of UPIU */
47 enum {
48         UFS_UPIU_REPORT_LUNS_WLUN       = 0x81,
49         UFS_UPIU_UFS_DEVICE_WLUN        = 0xD0,
50         UFS_UPIU_BOOT_WLUN              = 0xB0,
51         UFS_UPIU_RPMB_WLUN              = 0xC4,
52 };
53
54 /*
55  * UFS Protocol Information Unit related definitions
56  */
57
58 /* Task management functions */
59 enum {
60         UFS_ABORT_TASK          = 0x01,
61         UFS_ABORT_TASK_SET      = 0x02,
62         UFS_CLEAR_TASK_SET      = 0x04,
63         UFS_LOGICAL_RESET       = 0x08,
64         UFS_QUERY_TASK          = 0x80,
65         UFS_QUERY_TASK_SET      = 0x81,
66 };
67
68 /* UTP UPIU Transaction Codes Initiator to Target */
69 enum {
70         UPIU_TRANSACTION_NOP_OUT        = 0x00,
71         UPIU_TRANSACTION_COMMAND        = 0x01,
72         UPIU_TRANSACTION_DATA_OUT       = 0x02,
73         UPIU_TRANSACTION_TASK_REQ       = 0x04,
74         UPIU_TRANSACTION_QUERY_REQ      = 0x16,
75 };
76
77 /* UTP UPIU Transaction Codes Target to Initiator */
78 enum {
79         UPIU_TRANSACTION_NOP_IN         = 0x20,
80         UPIU_TRANSACTION_RESPONSE       = 0x21,
81         UPIU_TRANSACTION_DATA_IN        = 0x22,
82         UPIU_TRANSACTION_TASK_RSP       = 0x24,
83         UPIU_TRANSACTION_READY_XFER     = 0x31,
84         UPIU_TRANSACTION_QUERY_RSP      = 0x36,
85         UPIU_TRANSACTION_REJECT_UPIU    = 0x3F,
86 };
87
88 /* UPIU Read/Write flags */
89 enum {
90         UPIU_CMD_FLAGS_NONE     = 0x00,
91         UPIU_CMD_FLAGS_WRITE    = 0x20,
92         UPIU_CMD_FLAGS_READ     = 0x40,
93 };
94
95 /* UPIU Task Attributes */
96 enum {
97         UPIU_TASK_ATTR_SIMPLE   = 0x00,
98         UPIU_TASK_ATTR_ORDERED  = 0x01,
99         UPIU_TASK_ATTR_HEADQ    = 0x02,
100         UPIU_TASK_ATTR_ACA      = 0x03,
101 };
102
103 /* UPIU Query request function */
104 enum {
105         UPIU_QUERY_FUNC_STANDARD_READ_REQUEST           = 0x01,
106         UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST          = 0x81,
107 };
108
109 /* Flag idn for Query Requests*/
110 enum flag_idn {
111         QUERY_FLAG_IDN_FDEVICEINIT                      = 0x01,
112         QUERY_FLAG_IDN_PERMANENT_WPE                    = 0x02,
113         QUERY_FLAG_IDN_PWR_ON_WPE                       = 0x03,
114         QUERY_FLAG_IDN_BKOPS_EN                         = 0x04,
115         QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE            = 0x05,
116         QUERY_FLAG_IDN_PURGE_ENABLE                     = 0x06,
117         QUERY_FLAG_IDN_RESERVED2                        = 0x07,
118         QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL              = 0x08,
119         QUERY_FLAG_IDN_BUSY_RTC                         = 0x09,
120         QUERY_FLAG_IDN_RESERVED3                        = 0x0A,
121         QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE    = 0x0B,
122         QUERY_FLAG_IDN_WB_EN                            = 0x0E,
123         QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN                 = 0x0F,
124         QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8     = 0x10,
125         QUERY_FLAG_IDN_HPB_RESET                        = 0x11,
126         QUERY_FLAG_IDN_HPB_EN                           = 0x12,
127 };
128
129 /* Attribute idn for Query requests */
130 enum attr_idn {
131         QUERY_ATTR_IDN_BOOT_LU_EN               = 0x00,
132         QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD       = 0x01,
133         QUERY_ATTR_IDN_POWER_MODE               = 0x02,
134         QUERY_ATTR_IDN_ACTIVE_ICC_LVL           = 0x03,
135         QUERY_ATTR_IDN_OOO_DATA_EN              = 0x04,
136         QUERY_ATTR_IDN_BKOPS_STATUS             = 0x05,
137         QUERY_ATTR_IDN_PURGE_STATUS             = 0x06,
138         QUERY_ATTR_IDN_MAX_DATA_IN              = 0x07,
139         QUERY_ATTR_IDN_MAX_DATA_OUT             = 0x08,
140         QUERY_ATTR_IDN_DYN_CAP_NEEDED           = 0x09,
141         QUERY_ATTR_IDN_REF_CLK_FREQ             = 0x0A,
142         QUERY_ATTR_IDN_CONF_DESC_LOCK           = 0x0B,
143         QUERY_ATTR_IDN_MAX_NUM_OF_RTT           = 0x0C,
144         QUERY_ATTR_IDN_EE_CONTROL               = 0x0D,
145         QUERY_ATTR_IDN_EE_STATUS                = 0x0E,
146         QUERY_ATTR_IDN_SECONDS_PASSED           = 0x0F,
147         QUERY_ATTR_IDN_CNTX_CONF                = 0x10,
148         QUERY_ATTR_IDN_CORR_PRG_BLK_NUM         = 0x11,
149         QUERY_ATTR_IDN_RESERVED2                = 0x12,
150         QUERY_ATTR_IDN_RESERVED3                = 0x13,
151         QUERY_ATTR_IDN_FFU_STATUS               = 0x14,
152         QUERY_ATTR_IDN_PSA_STATE                = 0x15,
153         QUERY_ATTR_IDN_PSA_DATA_SIZE            = 0x16,
154         QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
155         QUERY_ATTR_IDN_CASE_ROUGH_TEMP          = 0x18,
156         QUERY_ATTR_IDN_HIGH_TEMP_BOUND          = 0x19,
157         QUERY_ATTR_IDN_LOW_TEMP_BOUND           = 0x1A,
158         QUERY_ATTR_IDN_WB_FLUSH_STATUS          = 0x1C,
159         QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE       = 0x1D,
160         QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST    = 0x1E,
161         QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE        = 0x1F,
162 };
163
164 /* Descriptor idn for Query requests */
165 enum desc_idn {
166         QUERY_DESC_IDN_DEVICE           = 0x0,
167         QUERY_DESC_IDN_CONFIGURATION    = 0x1,
168         QUERY_DESC_IDN_UNIT             = 0x2,
169         QUERY_DESC_IDN_RFU_0            = 0x3,
170         QUERY_DESC_IDN_INTERCONNECT     = 0x4,
171         QUERY_DESC_IDN_STRING           = 0x5,
172         QUERY_DESC_IDN_RFU_1            = 0x6,
173         QUERY_DESC_IDN_GEOMETRY         = 0x7,
174         QUERY_DESC_IDN_POWER            = 0x8,
175         QUERY_DESC_IDN_HEALTH           = 0x9,
176         QUERY_DESC_IDN_MAX,
177 };
178
179 enum desc_header_offset {
180         QUERY_DESC_LENGTH_OFFSET        = 0x00,
181         QUERY_DESC_DESC_TYPE_OFFSET     = 0x01,
182 };
183
184 /* Unit descriptor parameters offsets in bytes*/
185 enum unit_desc_param {
186         UNIT_DESC_PARAM_LEN                     = 0x0,
187         UNIT_DESC_PARAM_TYPE                    = 0x1,
188         UNIT_DESC_PARAM_UNIT_INDEX              = 0x2,
189         UNIT_DESC_PARAM_LU_ENABLE               = 0x3,
190         UNIT_DESC_PARAM_BOOT_LUN_ID             = 0x4,
191         UNIT_DESC_PARAM_LU_WR_PROTECT           = 0x5,
192         UNIT_DESC_PARAM_LU_Q_DEPTH              = 0x6,
193         UNIT_DESC_PARAM_PSA_SENSITIVE           = 0x7,
194         UNIT_DESC_PARAM_MEM_TYPE                = 0x8,
195         UNIT_DESC_PARAM_DATA_RELIABILITY        = 0x9,
196         UNIT_DESC_PARAM_LOGICAL_BLK_SIZE        = 0xA,
197         UNIT_DESC_PARAM_LOGICAL_BLK_COUNT       = 0xB,
198         UNIT_DESC_PARAM_ERASE_BLK_SIZE          = 0x13,
199         UNIT_DESC_PARAM_PROVISIONING_TYPE       = 0x17,
200         UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT        = 0x18,
201         UNIT_DESC_PARAM_CTX_CAPABILITIES        = 0x20,
202         UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1      = 0x22,
203         UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS  = 0x23,
204         UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF   = 0x25,
205         UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS        = 0x27,
206         UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS      = 0x29,
207 };
208
209 /* Device descriptor parameters offsets in bytes*/
210 enum device_desc_param {
211         DEVICE_DESC_PARAM_LEN                   = 0x0,
212         DEVICE_DESC_PARAM_TYPE                  = 0x1,
213         DEVICE_DESC_PARAM_DEVICE_TYPE           = 0x2,
214         DEVICE_DESC_PARAM_DEVICE_CLASS          = 0x3,
215         DEVICE_DESC_PARAM_DEVICE_SUB_CLASS      = 0x4,
216         DEVICE_DESC_PARAM_PRTCL                 = 0x5,
217         DEVICE_DESC_PARAM_NUM_LU                = 0x6,
218         DEVICE_DESC_PARAM_NUM_WLU               = 0x7,
219         DEVICE_DESC_PARAM_BOOT_ENBL             = 0x8,
220         DEVICE_DESC_PARAM_DESC_ACCSS_ENBL       = 0x9,
221         DEVICE_DESC_PARAM_INIT_PWR_MODE         = 0xA,
222         DEVICE_DESC_PARAM_HIGH_PR_LUN           = 0xB,
223         DEVICE_DESC_PARAM_SEC_RMV_TYPE          = 0xC,
224         DEVICE_DESC_PARAM_SEC_LU                = 0xD,
225         DEVICE_DESC_PARAM_BKOP_TERM_LT          = 0xE,
226         DEVICE_DESC_PARAM_ACTVE_ICC_LVL         = 0xF,
227         DEVICE_DESC_PARAM_SPEC_VER              = 0x10,
228         DEVICE_DESC_PARAM_MANF_DATE             = 0x12,
229         DEVICE_DESC_PARAM_MANF_NAME             = 0x14,
230         DEVICE_DESC_PARAM_PRDCT_NAME            = 0x15,
231         DEVICE_DESC_PARAM_SN                    = 0x16,
232         DEVICE_DESC_PARAM_OEM_ID                = 0x17,
233         DEVICE_DESC_PARAM_MANF_ID               = 0x18,
234         DEVICE_DESC_PARAM_UD_OFFSET             = 0x1A,
235         DEVICE_DESC_PARAM_UD_LEN                = 0x1B,
236         DEVICE_DESC_PARAM_RTT_CAP               = 0x1C,
237         DEVICE_DESC_PARAM_FRQ_RTC               = 0x1D,
238         DEVICE_DESC_PARAM_UFS_FEAT              = 0x1F,
239         DEVICE_DESC_PARAM_FFU_TMT               = 0x20,
240         DEVICE_DESC_PARAM_Q_DPTH                = 0x21,
241         DEVICE_DESC_PARAM_DEV_VER               = 0x22,
242         DEVICE_DESC_PARAM_NUM_SEC_WPA           = 0x24,
243         DEVICE_DESC_PARAM_PSA_MAX_DATA          = 0x25,
244         DEVICE_DESC_PARAM_PSA_TMT               = 0x29,
245         DEVICE_DESC_PARAM_PRDCT_REV             = 0x2A,
246         DEVICE_DESC_PARAM_HPB_VER               = 0x40,
247         DEVICE_DESC_PARAM_HPB_CONTROL           = 0x42,
248         DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP   = 0x4F,
249         DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN   = 0x53,
250         DEVICE_DESC_PARAM_WB_TYPE               = 0x54,
251         DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
252 };
253
254 /* Interconnect descriptor parameters offsets in bytes*/
255 enum interconnect_desc_param {
256         INTERCONNECT_DESC_PARAM_LEN             = 0x0,
257         INTERCONNECT_DESC_PARAM_TYPE            = 0x1,
258         INTERCONNECT_DESC_PARAM_UNIPRO_VER      = 0x2,
259         INTERCONNECT_DESC_PARAM_MPHY_VER        = 0x4,
260 };
261
262 /* Geometry descriptor parameters offsets in bytes*/
263 enum geometry_desc_param {
264         GEOMETRY_DESC_PARAM_LEN                 = 0x0,
265         GEOMETRY_DESC_PARAM_TYPE                = 0x1,
266         GEOMETRY_DESC_PARAM_DEV_CAP             = 0x4,
267         GEOMETRY_DESC_PARAM_MAX_NUM_LUN         = 0xC,
268         GEOMETRY_DESC_PARAM_SEG_SIZE            = 0xD,
269         GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE     = 0x11,
270         GEOMETRY_DESC_PARAM_MIN_BLK_SIZE        = 0x12,
271         GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE     = 0x13,
272         GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE     = 0x14,
273         GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE     = 0x15,
274         GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE    = 0x16,
275         GEOMETRY_DESC_PARAM_RPMB_RW_SIZE        = 0x17,
276         GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC    = 0x18,
277         GEOMETRY_DESC_PARAM_DATA_ORDER          = 0x19,
278         GEOMETRY_DESC_PARAM_MAX_NUM_CTX         = 0x1A,
279         GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE       = 0x1B,
280         GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE       = 0x1C,
281         GEOMETRY_DESC_PARAM_SEC_RM_TYPES        = 0x1D,
282         GEOMETRY_DESC_PARAM_MEM_TYPES           = 0x1E,
283         GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS   = 0x20,
284         GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR    = 0x24,
285         GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS   = 0x26,
286         GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR    = 0x2A,
287         GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS  = 0x2C,
288         GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR   = 0x30,
289         GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS  = 0x32,
290         GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR   = 0x36,
291         GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS  = 0x38,
292         GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR   = 0x3C,
293         GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS  = 0x3E,
294         GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR   = 0x42,
295         GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE    = 0x44,
296         GEOMETRY_DESC_PARAM_HPB_REGION_SIZE     = 0x48,
297         GEOMETRY_DESC_PARAM_HPB_NUMBER_LU       = 0x49,
298         GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE  = 0x4A,
299         GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS = 0x4B,
300         GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS  = 0x4F,
301         GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS      = 0x53,
302         GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ     = 0x54,
303         GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE     = 0x55,
304         GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE      = 0x56,
305 };
306
307 /* Health descriptor parameters offsets in bytes*/
308 enum health_desc_param {
309         HEALTH_DESC_PARAM_LEN                   = 0x0,
310         HEALTH_DESC_PARAM_TYPE                  = 0x1,
311         HEALTH_DESC_PARAM_EOL_INFO              = 0x2,
312         HEALTH_DESC_PARAM_LIFE_TIME_EST_A       = 0x3,
313         HEALTH_DESC_PARAM_LIFE_TIME_EST_B       = 0x4,
314 };
315
316 /* WriteBooster buffer mode */
317 enum {
318         WB_BUF_MODE_LU_DEDICATED        = 0x0,
319         WB_BUF_MODE_SHARED              = 0x1,
320 };
321
322 /*
323  * Logical Unit Write Protect
324  * 00h: LU not write protected
325  * 01h: LU write protected when fPowerOnWPEn =1
326  * 02h: LU permanently write protected when fPermanentWPEn =1
327  */
328 enum ufs_lu_wp_type {
329         UFS_LU_NO_WP            = 0x00,
330         UFS_LU_POWER_ON_WP      = 0x01,
331         UFS_LU_PERM_WP          = 0x02,
332 };
333
334 /* bActiveICCLevel parameter current units */
335 enum {
336         UFSHCD_NANO_AMP         = 0,
337         UFSHCD_MICRO_AMP        = 1,
338         UFSHCD_MILI_AMP         = 2,
339         UFSHCD_AMP              = 3,
340 };
341
342 /* Possible values for dExtendedUFSFeaturesSupport */
343 enum {
344         UFS_DEV_LOW_TEMP_NOTIF          = BIT(4),
345         UFS_DEV_HIGH_TEMP_NOTIF         = BIT(5),
346         UFS_DEV_EXT_TEMP_NOTIF          = BIT(6),
347         UFS_DEV_HPB_SUPPORT             = BIT(7),
348         UFS_DEV_WRITE_BOOSTER_SUP       = BIT(8),
349 };
350 #define UFS_DEV_HPB_SUPPORT_VERSION             0x310
351
352 #define POWER_DESC_MAX_ACTV_ICC_LVLS            16
353
354 /* Attribute  bActiveICCLevel parameter bit masks definitions */
355 #define ATTR_ICC_LVL_UNIT_OFFSET        14
356 #define ATTR_ICC_LVL_UNIT_MASK          (0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
357 #define ATTR_ICC_LVL_VALUE_MASK         0x3FF
358
359 /* Power descriptor parameters offsets in bytes */
360 enum power_desc_param_offset {
361         PWR_DESC_LEN                    = 0x0,
362         PWR_DESC_TYPE                   = 0x1,
363         PWR_DESC_ACTIVE_LVLS_VCC_0      = 0x2,
364         PWR_DESC_ACTIVE_LVLS_VCCQ_0     = 0x22,
365         PWR_DESC_ACTIVE_LVLS_VCCQ2_0    = 0x42,
366 };
367
368 /* Exception event mask values */
369 enum {
370         MASK_EE_STATUS                  = 0xFFFF,
371         MASK_EE_DYNCAP_EVENT            = BIT(0),
372         MASK_EE_SYSPOOL_EVENT           = BIT(1),
373         MASK_EE_URGENT_BKOPS            = BIT(2),
374         MASK_EE_TOO_HIGH_TEMP           = BIT(3),
375         MASK_EE_TOO_LOW_TEMP            = BIT(4),
376         MASK_EE_WRITEBOOSTER_EVENT      = BIT(5),
377         MASK_EE_PERFORMANCE_THROTTLING  = BIT(6),
378 };
379 #define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
380
381 /* Background operation status */
382 enum bkops_status {
383         BKOPS_STATUS_NO_OP               = 0x0,
384         BKOPS_STATUS_NON_CRITICAL        = 0x1,
385         BKOPS_STATUS_PERF_IMPACT         = 0x2,
386         BKOPS_STATUS_CRITICAL            = 0x3,
387         BKOPS_STATUS_MAX                 = BKOPS_STATUS_CRITICAL,
388 };
389
390 /* UTP QUERY Transaction Specific Fields OpCode */
391 enum query_opcode {
392         UPIU_QUERY_OPCODE_NOP           = 0x0,
393         UPIU_QUERY_OPCODE_READ_DESC     = 0x1,
394         UPIU_QUERY_OPCODE_WRITE_DESC    = 0x2,
395         UPIU_QUERY_OPCODE_READ_ATTR     = 0x3,
396         UPIU_QUERY_OPCODE_WRITE_ATTR    = 0x4,
397         UPIU_QUERY_OPCODE_READ_FLAG     = 0x5,
398         UPIU_QUERY_OPCODE_SET_FLAG      = 0x6,
399         UPIU_QUERY_OPCODE_CLEAR_FLAG    = 0x7,
400         UPIU_QUERY_OPCODE_TOGGLE_FLAG   = 0x8,
401 };
402
403 /* bRefClkFreq attribute values */
404 enum ufs_ref_clk_freq {
405         REF_CLK_FREQ_19_2_MHZ   = 0,
406         REF_CLK_FREQ_26_MHZ     = 1,
407         REF_CLK_FREQ_38_4_MHZ   = 2,
408         REF_CLK_FREQ_52_MHZ     = 3,
409         REF_CLK_FREQ_INVAL      = -1,
410 };
411
412 struct ufs_ref_clk {
413         unsigned long freq_hz;
414         enum ufs_ref_clk_freq val;
415 };
416
417 /* Query response result code */
418 enum {
419         QUERY_RESULT_SUCCESS                    = 0x00,
420         QUERY_RESULT_NOT_READABLE               = 0xF6,
421         QUERY_RESULT_NOT_WRITEABLE              = 0xF7,
422         QUERY_RESULT_ALREADY_WRITTEN            = 0xF8,
423         QUERY_RESULT_INVALID_LENGTH             = 0xF9,
424         QUERY_RESULT_INVALID_VALUE              = 0xFA,
425         QUERY_RESULT_INVALID_SELECTOR           = 0xFB,
426         QUERY_RESULT_INVALID_INDEX              = 0xFC,
427         QUERY_RESULT_INVALID_IDN                = 0xFD,
428         QUERY_RESULT_INVALID_OPCODE             = 0xFE,
429         QUERY_RESULT_GENERAL_FAILURE            = 0xFF,
430 };
431
432 /* UTP Transfer Request Command Type (CT) */
433 enum {
434         UPIU_COMMAND_SET_TYPE_SCSI      = 0x0,
435         UPIU_COMMAND_SET_TYPE_UFS       = 0x1,
436         UPIU_COMMAND_SET_TYPE_QUERY     = 0x2,
437 };
438
439 /* UTP Transfer Request Command Offset */
440 #define UPIU_COMMAND_TYPE_OFFSET        28
441
442 /* Offset of the response code in the UPIU header */
443 #define UPIU_RSP_CODE_OFFSET            8
444
445 enum {
446         MASK_SCSI_STATUS                = 0xFF,
447         MASK_TASK_RESPONSE              = 0xFF00,
448         MASK_RSP_UPIU_RESULT            = 0xFFFF,
449         MASK_QUERY_DATA_SEG_LEN         = 0xFFFF,
450         MASK_RSP_UPIU_DATA_SEG_LEN      = 0xFFFF,
451         MASK_RSP_EXCEPTION_EVENT        = 0x10000,
452         MASK_TM_SERVICE_RESP            = 0xFF,
453         MASK_TM_FUNC                    = 0xFF,
454 };
455
456 /* Task management service response */
457 enum {
458         UPIU_TASK_MANAGEMENT_FUNC_COMPL         = 0x00,
459         UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
460         UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED     = 0x08,
461         UPIU_TASK_MANAGEMENT_FUNC_FAILED        = 0x05,
462         UPIU_INCORRECT_LOGICAL_UNIT_NO          = 0x09,
463 };
464
465 /* UFS device power modes */
466 enum ufs_dev_pwr_mode {
467         UFS_ACTIVE_PWR_MODE     = 1,
468         UFS_SLEEP_PWR_MODE      = 2,
469         UFS_POWERDOWN_PWR_MODE  = 3,
470         UFS_DEEPSLEEP_PWR_MODE  = 4,
471 };
472
473 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
474
475 /**
476  * struct utp_cmd_rsp - Response UPIU structure
477  * @residual_transfer_count: Residual transfer count DW-3
478  * @reserved: Reserved double words DW-4 to DW-7
479  * @sense_data_len: Sense data length DW-8 U16
480  * @sense_data: Sense data field DW-8 to DW-12
481  */
482 struct utp_cmd_rsp {
483         __be32 residual_transfer_count;
484         __be32 reserved[4];
485         __be16 sense_data_len;
486         u8 sense_data[UFS_SENSE_SIZE];
487 };
488
489 struct ufshpb_active_field {
490         __be16 active_rgn;
491         __be16 active_srgn;
492 };
493 #define HPB_ACT_FIELD_SIZE 4
494
495 /**
496  * struct utp_hpb_rsp - Response UPIU structure
497  * @residual_transfer_count: Residual transfer count DW-3
498  * @reserved1: Reserved double words DW-4 to DW-7
499  * @sense_data_len: Sense data length DW-8 U16
500  * @desc_type: Descriptor type of sense data
501  * @additional_len: Additional length of sense data
502  * @hpb_op: HPB operation type
503  * @lun: LUN of response UPIU
504  * @active_rgn_cnt: Active region count
505  * @inactive_rgn_cnt: Inactive region count
506  * @hpb_active_field: Recommended to read HPB region and subregion
507  * @hpb_inactive_field: To be inactivated HPB region and subregion
508  */
509 struct utp_hpb_rsp {
510         __be32 residual_transfer_count;
511         __be32 reserved1[4];
512         __be16 sense_data_len;
513         u8 desc_type;
514         u8 additional_len;
515         u8 hpb_op;
516         u8 lun;
517         u8 active_rgn_cnt;
518         u8 inactive_rgn_cnt;
519         struct ufshpb_active_field hpb_active_field[2];
520         __be16 hpb_inactive_field[2];
521 };
522 #define UTP_HPB_RSP_SIZE 40
523
524 /**
525  * struct utp_upiu_rsp - general upiu response structure
526  * @header: UPIU header structure DW-0 to DW-2
527  * @sr: fields structure for scsi command DW-3 to DW-12
528  * @qr: fields structure for query request DW-3 to DW-7
529  */
530 struct utp_upiu_rsp {
531         struct utp_upiu_header header;
532         union {
533                 struct utp_cmd_rsp sr;
534                 struct utp_hpb_rsp hr;
535                 struct utp_upiu_query qr;
536         };
537 };
538
539 /**
540  * struct ufs_query_req - parameters for building a query request
541  * @query_func: UPIU header query function
542  * @upiu_req: the query request data
543  */
544 struct ufs_query_req {
545         u8 query_func;
546         struct utp_upiu_query upiu_req;
547 };
548
549 /**
550  * struct ufs_query_resp - UPIU QUERY
551  * @response: device response code
552  * @upiu_res: query response data
553  */
554 struct ufs_query_res {
555         u8 response;
556         struct utp_upiu_query upiu_res;
557 };
558
559 #define UFS_VREG_VCC_MIN_UV        2700000 /* uV */
560 #define UFS_VREG_VCC_MAX_UV        3600000 /* uV */
561 #define UFS_VREG_VCC_1P8_MIN_UV    1700000 /* uV */
562 #define UFS_VREG_VCC_1P8_MAX_UV    1950000 /* uV */
563 #define UFS_VREG_VCCQ_MIN_UV       1140000 /* uV */
564 #define UFS_VREG_VCCQ_MAX_UV       1260000 /* uV */
565 #define UFS_VREG_VCCQ2_MIN_UV      1700000 /* uV */
566 #define UFS_VREG_VCCQ2_MAX_UV      1950000 /* uV */
567
568 /*
569  * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
570  * and link is in Hibern8 state.
571  */
572 #define UFS_VREG_LPM_LOAD_UA    1000 /* uA */
573
574 struct ufs_vreg {
575         struct regulator *reg;
576         const char *name;
577         bool always_on;
578         bool enabled;
579         int min_uV;
580         int max_uV;
581         int max_uA;
582 };
583
584 struct ufs_vreg_info {
585         struct ufs_vreg *vcc;
586         struct ufs_vreg *vccq;
587         struct ufs_vreg *vccq2;
588         struct ufs_vreg *vdd_hba;
589 };
590
591 struct ufs_dev_info {
592         bool    f_power_on_wp_en;
593         /* Keeps information if any of the LU is power on write protected */
594         bool    is_lu_power_on_wp;
595         /* Maximum number of general LU supported by the UFS device */
596         u8      max_lu_supported;
597         u16     wmanufacturerid;
598         /*UFS device Product Name */
599         u8      *model;
600         u16     wspecversion;
601         u32     clk_gating_wait_us;
602
603         /* UFS HPB related flag */
604         bool    hpb_enabled;
605
606         /* UFS WB related flags */
607         bool    wb_enabled;
608         bool    wb_buf_flush_enabled;
609         u8      wb_dedicated_lu;
610         u8      wb_buffer_type;
611
612         bool    b_rpm_dev_flush_capable;
613         u8      b_presrv_uspc_en;
614 };
615
616 /*
617  * This enum is used in string mapping in include/trace/events/ufs.h.
618  */
619 enum ufs_trace_str_t {
620         UFS_CMD_SEND, UFS_CMD_COMP, UFS_DEV_COMP,
621         UFS_QUERY_SEND, UFS_QUERY_COMP, UFS_QUERY_ERR,
622         UFS_TM_SEND, UFS_TM_COMP, UFS_TM_ERR
623 };
624
625 /*
626  * Transaction Specific Fields (TSF) type in the UPIU package, this enum is
627  * used in include/trace/events/ufs.h for UFS command trace.
628  */
629 enum ufs_trace_tsf_t {
630         UFS_TSF_CDB, UFS_TSF_OSF, UFS_TSF_TM_INPUT, UFS_TSF_TM_OUTPUT
631 };
632
633 /**
634  * ufs_is_valid_unit_desc_lun - checks if the given LUN has a unit descriptor
635  * @dev_info: pointer of instance of struct ufs_dev_info
636  * @lun: LU number to check
637  * @return: true if the lun has a matching unit descriptor, false otherwise
638  */
639 static inline bool ufs_is_valid_unit_desc_lun(struct ufs_dev_info *dev_info,
640                 u8 lun, u8 param_offset)
641 {
642         if (!dev_info || !dev_info->max_lu_supported) {
643                 pr_err("Max General LU supported by UFS isn't initialized\n");
644                 return false;
645         }
646         /* WB is available only for the logical unit from 0 to 7 */
647         if (param_offset == UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS)
648                 return lun < UFS_UPIU_MAX_WB_LUN_ID;
649         return lun == UFS_UPIU_RPMB_WLUN || (lun < dev_info->max_lu_supported);
650 }
651
652 #endif /* End of Header */