drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 int ql2xfulldump_on_mpifail;
  39 module_param(ql2xfulldump_on_mpifail, int, S_IRUGO | S_IWUSR);
  40 MODULE_PARM_DESC(ql2xfulldump_on_mpifail,
  41                  "Set this to take full dump on MPI hang.");
  42
  43 /*
  44  * CT6 CTX allocation cache
  45  */
  46 static struct kmem_cache *ctx_cachep;
  47 /*
  48  * error level for logging
  49  */
  50 uint ql_errlev = 0x8001;
  51
  52 static int ql2xenableclass2;
  53 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  54 MODULE_PARM_DESC(ql2xenableclass2,
  55                 "Specify if Class 2 operations are supported from the very "
  56                 "beginning. Default is 0 - class 2 not supported.");
  57
  58
  59 int ql2xlogintimeout = 20;
  60 module_param(ql2xlogintimeout, int, S_IRUGO);
  61 MODULE_PARM_DESC(ql2xlogintimeout,
  62                 "Login timeout value in seconds.");
  63
  64 int qlport_down_retry;
  65 module_param(qlport_down_retry, int, S_IRUGO);
  66 MODULE_PARM_DESC(qlport_down_retry,
  67                 "Maximum number of command retries to a port that returns "
  68                 "a PORT-DOWN status.");
  69
  70 int ql2xplogiabsentdevice;
  71 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  72 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  73                 "Option to enable PLOGI to devices that are not present after "
  74                 "a Fabric scan.  This is needed for several broken switches. "
  75                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  76
  77 int ql2xloginretrycount;
  78 module_param(ql2xloginretrycount, int, S_IRUGO);
  79 MODULE_PARM_DESC(ql2xloginretrycount,
  80                 "Specify an alternate value for the NVRAM login retry count.");
  81
  82 int ql2xallocfwdump = 1;
  83 module_param(ql2xallocfwdump, int, S_IRUGO);
  84 MODULE_PARM_DESC(ql2xallocfwdump,
  85                 "Option to enable allocation of memory for a firmware dump "
  86                 "during HBA initialization.  Memory allocation requirements "
  87                 "vary by ISP type.  Default is 1 - allocate memory.");
  88
  89 int ql2xextended_error_logging;
  90 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  91 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  92 MODULE_PARM_DESC(ql2xextended_error_logging,
  93                 "Option to enable extended error logging,\n"
  94                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  95                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  96                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  97                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  98                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  99                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
 100                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
 101                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
 102                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
 103                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
 104                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 105                 "\t\t0x1e400000 - Preferred value for capturing essential "
 106                 "debug information (equivalent to old "
 107                 "ql2xextended_error_logging=1).\n"
 108                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 109
 110 int ql2xshiftctondsd = 6;
 111 module_param(ql2xshiftctondsd, int, S_IRUGO);
 112 MODULE_PARM_DESC(ql2xshiftctondsd,
 113                 "Set to control shifting of command type processing "
 114                 "based on total number of SG elements.");
 115
 116 int ql2xfdmienable = 1;
 117 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 118 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xfdmienable,
 120                 "Enables FDMI registrations. "
 121                 "0 - no FDMI registrations. "
 122                 "1 - provide FDMI registrations (default).");
 123
 124 #define MAX_Q_DEPTH     64
 125 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 126 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 127 MODULE_PARM_DESC(ql2xmaxqdepth,
 128                 "Maximum queue depth to set for each LUN. "
 129                 "Default is 64.");
 130
 131 int ql2xenabledif = 2;
 132 module_param(ql2xenabledif, int, S_IRUGO);
 133 MODULE_PARM_DESC(ql2xenabledif,
 134                 " Enable T10-CRC-DIF:\n"
 135                 " Default is 2.\n"
 136                 "  0 -- No DIF Support\n"
 137                 "  1 -- Enable DIF for all types\n"
 138                 "  2 -- Enable DIF for all types, except Type 0.\n");
 139
 140 #if (IS_ENABLED(CONFIG_NVME_FC))
 141 int ql2xnvmeenable = 1;
 142 #else
 143 int ql2xnvmeenable;
 144 #endif
 145 module_param(ql2xnvmeenable, int, 0644);
 146 MODULE_PARM_DESC(ql2xnvmeenable,
 147     "Enables NVME support. "
 148     "0 - no NVMe.  Default is Y");
 149
 150 int ql2xenablehba_err_chk = 2;
 151 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 152 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 153                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 154                 " Default is 2.\n"
 155                 "  0 -- Error isolation disabled\n"
 156                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 157                 "  2 -- Error isolation enabled for all Types\n");
 158
 159 int ql2xiidmaenable = 1;
 160 module_param(ql2xiidmaenable, int, S_IRUGO);
 161 MODULE_PARM_DESC(ql2xiidmaenable,
 162                 "Enables iIDMA settings "
 163                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 164
 165 int ql2xmqsupport = 1;
 166 module_param(ql2xmqsupport, int, S_IRUGO);
 167 MODULE_PARM_DESC(ql2xmqsupport,
 168                 "Enable on demand multiple queue pairs support "
 169                 "Default is 1 for supported. "
 170                 "Set it to 0 to turn off mq qpair support.");
 171
 172 int ql2xfwloadbin;
 173 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 174 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xfwloadbin,
 176                 "Option to specify location from which to load ISP firmware:.\n"
 177                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 178                 "      interface.\n"
 179                 " 1 -- load firmware from flash.\n"
 180                 " 0 -- use default semantics.\n");
 181
 182 int ql2xetsenable;
 183 module_param(ql2xetsenable, int, S_IRUGO);
 184 MODULE_PARM_DESC(ql2xetsenable,
 185                 "Enables firmware ETS burst."
 186                 "Default is 0 - skip ETS enablement.");
 187
 188 int ql2xdbwr = 1;
 189 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 190 MODULE_PARM_DESC(ql2xdbwr,
 191                 "Option to specify scheme for request queue posting.\n"
 192                 " 0 -- Regular doorbell.\n"
 193                 " 1 -- CAMRAM doorbell (faster).\n");
 194
 195 int ql2xtargetreset = 1;
 196 module_param(ql2xtargetreset, int, S_IRUGO);
 197 MODULE_PARM_DESC(ql2xtargetreset,
 198                  "Enable target reset."
 199                  "Default is 1 - use hw defaults.");
 200
 201 int ql2xgffidenable;
 202 module_param(ql2xgffidenable, int, S_IRUGO);
 203 MODULE_PARM_DESC(ql2xgffidenable,
 204                 "Enables GFF_ID checks of port type. "
 205                 "Default is 0 - Do not use GFF_ID information.");
 206
 207 int ql2xasynctmfenable = 1;
 208 module_param(ql2xasynctmfenable, int, S_IRUGO);
 209 MODULE_PARM_DESC(ql2xasynctmfenable,
 210                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 211                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 212
 213 int ql2xdontresethba;
 214 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 215 MODULE_PARM_DESC(ql2xdontresethba,
 216                 "Option to specify reset behaviour.\n"
 217                 " 0 (Default) -- Reset on failure.\n"
 218                 " 1 -- Do not reset on failure.\n");
 219
 220 uint64_t ql2xmaxlun = MAX_LUNS;
 221 module_param(ql2xmaxlun, ullong, S_IRUGO);
 222 MODULE_PARM_DESC(ql2xmaxlun,
 223                 "Defines the maximum LU number to register with the SCSI "
 224                 "midlayer. Default is 65535.");
 225
 226 int ql2xmdcapmask = 0x1F;
 227 module_param(ql2xmdcapmask, int, S_IRUGO);
 228 MODULE_PARM_DESC(ql2xmdcapmask,
 229                 "Set the Minidump driver capture mask level. "
 230                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 231
 232 int ql2xmdenable = 1;
 233 module_param(ql2xmdenable, int, S_IRUGO);
 234 MODULE_PARM_DESC(ql2xmdenable,
 235                 "Enable/disable MiniDump. "
 236                 "0 - MiniDump disabled. "
 237                 "1 (Default) - MiniDump enabled.");
 238
 239 int ql2xexlogins;
 240 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 241 MODULE_PARM_DESC(ql2xexlogins,
 242                  "Number of extended Logins. "
 243                  "0 (Default)- Disabled.");
 244
 245 int ql2xexchoffld = 1024;
 246 module_param(ql2xexchoffld, uint, 0644);
 247 MODULE_PARM_DESC(ql2xexchoffld,
 248         "Number of target exchanges.");
 249
 250 int ql2xiniexchg = 1024;
 251 module_param(ql2xiniexchg, uint, 0644);
 252 MODULE_PARM_DESC(ql2xiniexchg,
 253         "Number of initiator exchanges.");
 254
 255 int ql2xfwholdabts;
 256 module_param(ql2xfwholdabts, int, S_IRUGO);
 257 MODULE_PARM_DESC(ql2xfwholdabts,
 258                 "Allow FW to hold status IOCB until ABTS rsp received. "
 259                 "0 (Default) Do not set fw option. "
 260                 "1 - Set fw option to hold ABTS.");
 261
 262 int ql2xmvasynctoatio = 1;
 263 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 264 MODULE_PARM_DESC(ql2xmvasynctoatio,
 265                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 266                 "0 (Default). Do not move IOCBs"
 267                 "1 - Move IOCBs.");
 268
 269 int ql2xautodetectsfp = 1;
 270 module_param(ql2xautodetectsfp, int, 0444);
 271 MODULE_PARM_DESC(ql2xautodetectsfp,
 272                  "Detect SFP range and set appropriate distance.\n"
 273                  "1 (Default): Enable\n");
 274
 275 int ql2xenablemsix = 1;
 276 module_param(ql2xenablemsix, int, 0444);
 277 MODULE_PARM_DESC(ql2xenablemsix,
 278                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 279                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 280                  " 0 -- enable traditional pin-based mechanism.\n"
 281                  " 1 -- enable MSI-X interrupt mechanism.\n"
 282                  " 2 -- enable MSI interrupt mechanism.\n");
 283
 284 int qla2xuseresexchforels;
 285 module_param(qla2xuseresexchforels, int, 0444);
 286 MODULE_PARM_DESC(qla2xuseresexchforels,
 287                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 288                  " 0 (default): disabled");
 289
 290 static int ql2xprotmask;
 291 module_param(ql2xprotmask, int, 0644);
 292 MODULE_PARM_DESC(ql2xprotmask,
 293                  "Override DIF/DIX protection capabilities mask\n"
 294                  "Default is 0 which sets protection mask based on "
 295                  "capabilities reported by HBA firmware.\n");
 296
 297 static int ql2xprotguard;
 298 module_param(ql2xprotguard, int, 0644);
 299 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 300                  "  0 -- Let HBA firmware decide\n"
 301                  "  1 -- Force T10 CRC\n"
 302                  "  2 -- Force IP checksum\n");
 303
 304 int ql2xdifbundlinginternalbuffers;
 305 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 306 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 307     "Force using internal buffers for DIF information\n"
 308     "0 (Default). Based on check.\n"
 309     "1 Force using internal buffers\n");
 310
 311 int ql2xsmartsan;
 312 module_param(ql2xsmartsan, int, 0444);
 313 module_param_named(smartsan, ql2xsmartsan, int, 0444);
 314 MODULE_PARM_DESC(ql2xsmartsan,
 315                 "Send SmartSAN Management Attributes for FDMI Registration."
 316                 " Default is 0 - No SmartSAN registration,"
 317                 " 1 - Register SmartSAN Management Attributes.");
 318
 319 int ql2xrdpenable;
 320 module_param(ql2xrdpenable, int, 0444);
 321 module_param_named(rdpenable, ql2xrdpenable, int, 0444);
 322 MODULE_PARM_DESC(ql2xrdpenable,
 323                 "Enables RDP responses. "
 324                 "0 - no RDP responses (default). "
 325                 "1 - provide RDP responses.");
 326
 327 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 328 static void qla2x00_free_device(scsi_qla_host_t *);
 329 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 330 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 331
 332
 333 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 334 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 335
 336 /* TODO Convert to inlines
 337  *
 338  * Timer routines
 339  */
 340
 341 __inline__ void
 342 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 343 {
 344         timer_setup(&vha->timer, qla2x00_timer, 0);
 345         vha->timer.expires = jiffies + interval * HZ;
 346         add_timer(&vha->timer);
 347         vha->timer_active = 1;
 348 }
 349
 350 static inline void
 351 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 352 {
 353         /* Currently used for 82XX only. */
 354         if (vha->device_flags & DFLG_DEV_FAILED) {
 355                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 356                     "Device in a failed state, returning.\n");
 357                 return;
 358         }
 359
 360         mod_timer(&vha->timer, jiffies + interval * HZ);
 361 }
 362
 363 static __inline__ void
 364 qla2x00_stop_timer(scsi_qla_host_t *vha)
 365 {
 366         del_timer_sync(&vha->timer);
 367         vha->timer_active = 0;
 368 }
 369
 370 static int qla2x00_do_dpc(void *data);
 371
 372 static void qla2x00_rst_aen(scsi_qla_host_t *);
 373
 374 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 375         struct req_que **, struct rsp_que **);
 376 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 377 static void qla2x00_mem_free(struct qla_hw_data *);
 378 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 379         struct qla_qpair *qpair);
 380
 381 /* -------------------------------------------------------------------------- */
 382 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 383     struct rsp_que *rsp)
 384 {
 385         struct qla_hw_data *ha = vha->hw;
 386
 387         rsp->qpair = ha->base_qpair;
 388         rsp->req = req;
 389         ha->base_qpair->hw = ha;
 390         ha->base_qpair->req = req;
 391         ha->base_qpair->rsp = rsp;
 392         ha->base_qpair->vha = vha;
 393         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 394         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 395         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 396         ha->base_qpair->srb_mempool = ha->srb_mempool;
 397         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 398         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 399         /* init qpair to this cpu. Will adjust at run time. */
 400         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 401         ha->base_qpair->pdev = ha->pdev;
 402
 403         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 404                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 405 }
 406
 407 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 408                                 struct rsp_que *rsp)
 409 {
 410         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 411
 412         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 413                                 GFP_KERNEL);
 414         if (!ha->req_q_map) {
 415                 ql_log(ql_log_fatal, vha, 0x003b,
 416                     "Unable to allocate memory for request queue ptrs.\n");
 417                 goto fail_req_map;
 418         }
 419
 420         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 421                                 GFP_KERNEL);
 422         if (!ha->rsp_q_map) {
 423                 ql_log(ql_log_fatal, vha, 0x003c,
 424                     "Unable to allocate memory for response queue ptrs.\n");
 425                 goto fail_rsp_map;
 426         }
 427
 428         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 429         if (ha->base_qpair == NULL) {
 430                 ql_log(ql_log_warn, vha, 0x00e0,
 431                     "Failed to allocate base queue pair memory.\n");
 432                 goto fail_base_qpair;
 433         }
 434
 435         qla_init_base_qpair(vha, req, rsp);
 436
 437         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 438                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 439                         GFP_KERNEL);
 440                 if (!ha->queue_pair_map) {
 441                         ql_log(ql_log_fatal, vha, 0x0180,
 442                             "Unable to allocate memory for queue pair ptrs.\n");
 443                         goto fail_qpair_map;
 444                 }
 445         }
 446
 447         /*
 448          * Make sure we record at least the request and response queue zero in
 449          * case we need to free them if part of the probe fails.
 450          */
 451         ha->rsp_q_map[0] = rsp;
 452         ha->req_q_map[0] = req;
 453         set_bit(0, ha->rsp_qid_map);
 454         set_bit(0, ha->req_qid_map);
 455         return 0;
 456
 457 fail_qpair_map:
 458         kfree(ha->base_qpair);
 459         ha->base_qpair = NULL;
 460 fail_base_qpair:
 461         kfree(ha->rsp_q_map);
 462         ha->rsp_q_map = NULL;
 463 fail_rsp_map:
 464         kfree(ha->req_q_map);
 465         ha->req_q_map = NULL;
 466 fail_req_map:
 467         return -ENOMEM;
 468 }
 469
 470 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 471 {
 472         if (IS_QLAFX00(ha)) {
 473                 if (req && req->ring_fx00)
 474                         dma_free_coherent(&ha->pdev->dev,
 475                             (req->length_fx00 + 1) * sizeof(request_t),
 476                             req->ring_fx00, req->dma_fx00);
 477         } else if (req && req->ring)
 478                 dma_free_coherent(&ha->pdev->dev,
 479                 (req->length + 1) * sizeof(request_t),
 480                 req->ring, req->dma);
 481
 482         if (req)
 483                 kfree(req->outstanding_cmds);
 484
 485         kfree(req);
 486 }
 487
 488 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 489 {
 490         if (IS_QLAFX00(ha)) {
 491                 if (rsp && rsp->ring_fx00)
 492                         dma_free_coherent(&ha->pdev->dev,
 493                             (rsp->length_fx00 + 1) * sizeof(request_t),
 494                             rsp->ring_fx00, rsp->dma_fx00);
 495         } else if (rsp && rsp->ring) {
 496                 dma_free_coherent(&ha->pdev->dev,
 497                 (rsp->length + 1) * sizeof(response_t),
 498                 rsp->ring, rsp->dma);
 499         }
 500         kfree(rsp);
 501 }
 502
 503 static void qla2x00_free_queues(struct qla_hw_data *ha)
 504 {
 505         struct req_que *req;
 506         struct rsp_que *rsp;
 507         int cnt;
 508         unsigned long flags;
 509
 510         if (ha->queue_pair_map) {
 511                 kfree(ha->queue_pair_map);
 512                 ha->queue_pair_map = NULL;
 513         }
 514         if (ha->base_qpair) {
 515                 kfree(ha->base_qpair);
 516                 ha->base_qpair = NULL;
 517         }
 518
 519         spin_lock_irqsave(&ha->hardware_lock, flags);
 520         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 521                 if (!test_bit(cnt, ha->req_qid_map))
 522                         continue;
 523
 524                 req = ha->req_q_map[cnt];
 525                 clear_bit(cnt, ha->req_qid_map);
 526                 ha->req_q_map[cnt] = NULL;
 527
 528                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 529                 qla2x00_free_req_que(ha, req);
 530                 spin_lock_irqsave(&ha->hardware_lock, flags);
 531         }
 532         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 533
 534         kfree(ha->req_q_map);
 535         ha->req_q_map = NULL;
 536
 537
 538         spin_lock_irqsave(&ha->hardware_lock, flags);
 539         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 540                 if (!test_bit(cnt, ha->rsp_qid_map))
 541                         continue;
 542
 543                 rsp = ha->rsp_q_map[cnt];
 544                 clear_bit(cnt, ha->rsp_qid_map);
 545                 ha->rsp_q_map[cnt] =  NULL;
 546                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 547                 qla2x00_free_rsp_que(ha, rsp);
 548                 spin_lock_irqsave(&ha->hardware_lock, flags);
 549         }
 550         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 551
 552         kfree(ha->rsp_q_map);
 553         ha->rsp_q_map = NULL;
 554 }
 555
 556 static char *
 557 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 558 {
 559         struct qla_hw_data *ha = vha->hw;
 560         static const char *const pci_bus_modes[] = {
 561                 "33", "66", "100", "133",
 562         };
 563         uint16_t pci_bus;
 564
 565         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 566         if (pci_bus) {
 567                 snprintf(str, str_len, "PCI-X (%s MHz)",
 568                          pci_bus_modes[pci_bus]);
 569         } else {
 570                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 571                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 572         }
 573
 574         return str;
 575 }
 576
 577 static char *
 578 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 579 {
 580         static const char *const pci_bus_modes[] = {
 581                 "33", "66", "100", "133",
 582         };
 583         struct qla_hw_data *ha = vha->hw;
 584         uint32_t pci_bus;
 585
 586         if (pci_is_pcie(ha->pdev)) {
 587                 uint32_t lstat, lspeed, lwidth;
 588                 const char *speed_str;
 589
 590                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 591                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 592                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 593
 594                 switch (lspeed) {
 595                 case 1:
 596                         speed_str = "2.5GT/s";
 597                         break;
 598                 case 2:
 599                         speed_str = "5.0GT/s";
 600                         break;
 601                 case 3:
 602                         speed_str = "8.0GT/s";
 603                         break;
 604                 case 4:
 605                         speed_str = "16.0GT/s";
 606                         break;
 607                 default:
 608                         speed_str = "<unknown>";
 609                         break;
 610                 }
 611                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 612
 613                 return str;
 614         }
 615
 616         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 617         if (pci_bus == 0 || pci_bus == 8)
 618                 snprintf(str, str_len, "PCI (%s MHz)",
 619                          pci_bus_modes[pci_bus >> 3]);
 620         else
 621                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 622                          pci_bus & 4 ? 2 : 1,
 623                          pci_bus_modes[pci_bus & 3]);
 624
 625         return str;
 626 }
 627
 628 static char *
 629 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 630 {
 631         char un_str[10];
 632         struct qla_hw_data *ha = vha->hw;
 633
 634         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 635             ha->fw_minor_version, ha->fw_subminor_version);
 636
 637         if (ha->fw_attributes & BIT_9) {
 638                 strcat(str, "FLX");
 639                 return (str);
 640         }
 641
 642         switch (ha->fw_attributes & 0xFF) {
 643         case 0x7:
 644                 strcat(str, "EF");
 645                 break;
 646         case 0x17:
 647                 strcat(str, "TP");
 648                 break;
 649         case 0x37:
 650                 strcat(str, "IP");
 651                 break;
 652         case 0x77:
 653                 strcat(str, "VI");
 654                 break;
 655         default:
 656                 sprintf(un_str, "(%x)", ha->fw_attributes);
 657                 strcat(str, un_str);
 658                 break;
 659         }
 660         if (ha->fw_attributes & 0x100)
 661                 strcat(str, "X");
 662
 663         return (str);
 664 }
 665
 666 static char *
 667 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 668 {
 669         struct qla_hw_data *ha = vha->hw;
 670
 671         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 672             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 673         return str;
 674 }
 675
 676 void qla2x00_sp_free_dma(srb_t *sp)
 677 {
 678         struct qla_hw_data *ha = sp->vha->hw;
 679         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 680
 681         if (sp->flags & SRB_DMA_VALID) {
 682                 scsi_dma_unmap(cmd);
 683                 sp->flags &= ~SRB_DMA_VALID;
 684         }
 685
 686         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 687                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 688                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 689                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 690         }
 691
 692         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 693                 /* List assured to be having elements */
 694                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 695                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 696         }
 697
 698         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 699                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 700
 701                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 702                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 703         }
 704
 705         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 706                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 707
 708                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 709                     ctx1->fcp_cmnd_dma);
 710                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 711                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 712                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 713                 mempool_free(ctx1, ha->ctx_mempool);
 714         }
 715 }
 716
 717 void qla2x00_sp_compl(srb_t *sp, int res)
 718 {
 719         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 720         struct completion *comp = sp->comp;
 721
 722         sp->free(sp);
 723         cmd->result = res;
 724         CMD_SP(cmd) = NULL;
 725         cmd->scsi_done(cmd);
 726         if (comp)
 727                 complete(comp);
 728 }
 729
 730 void qla2xxx_qpair_sp_free_dma(srb_t *sp)
 731 {
 732         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 733         struct qla_hw_data *ha = sp->fcport->vha->hw;
 734
 735         if (sp->flags & SRB_DMA_VALID) {
 736                 scsi_dma_unmap(cmd);
 737                 sp->flags &= ~SRB_DMA_VALID;
 738         }
 739
 740         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 741                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 742                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 743                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 744         }
 745
 746         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 747                 /* List assured to be having elements */
 748                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 749                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 750         }
 751
 752         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 753                 struct crc_context *difctx = sp->u.scmd.crc_ctx;
 754                 struct dsd_dma *dif_dsd, *nxt_dsd;
 755
 756                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 757                     &difctx->ldif_dma_hndl_list, list) {
 758                         list_del(&dif_dsd->list);
 759                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 760                             dif_dsd->dsd_list_dma);
 761                         kfree(dif_dsd);
 762                         difctx->no_dif_bundl--;
 763                 }
 764
 765                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 766                     &difctx->ldif_dsd_list, list) {
 767                         list_del(&dif_dsd->list);
 768                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 769                             dif_dsd->dsd_list_dma);
 770                         kfree(dif_dsd);
 771                         difctx->no_ldif_dsd--;
 772                 }
 773
 774                 if (difctx->no_ldif_dsd) {
 775                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 776                             "%s: difctx->no_ldif_dsd=%x\n",
 777                             __func__, difctx->no_ldif_dsd);
 778                 }
 779
 780                 if (difctx->no_dif_bundl) {
 781                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 782                             "%s: difctx->no_dif_bundl=%x\n",
 783                             __func__, difctx->no_dif_bundl);
 784                 }
 785                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 786         }
 787
 788         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 789                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 790
 791                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 792                     ctx1->fcp_cmnd_dma);
 793                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 794                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 795                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 796                 mempool_free(ctx1, ha->ctx_mempool);
 797                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 798         }
 799
 800         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 801                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 802
 803                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 804                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 805         }
 806 }
 807
 808 void qla2xxx_qpair_sp_compl(srb_t *sp, int res)
 809 {
 810         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 811         struct completion *comp = sp->comp;
 812
 813         sp->free(sp);
 814         cmd->result = res;
 815         CMD_SP(cmd) = NULL;
 816         cmd->scsi_done(cmd);
 817         if (comp)
 818                 complete(comp);
 819 }
 820
 821 static int
 822 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 823 {
 824         scsi_qla_host_t *vha = shost_priv(host);
 825         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 826         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 827         struct qla_hw_data *ha = vha->hw;
 828         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 829         srb_t *sp;
 830         int rval;
 831
 832         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 833             WARN_ON_ONCE(!rport)) {
 834                 cmd->result = DID_NO_CONNECT << 16;
 835                 goto qc24_fail_command;
 836         }
 837
 838         if (ha->mqenable) {
 839                 uint32_t tag;
 840                 uint16_t hwq;
 841                 struct qla_qpair *qpair = NULL;
 842
 843                 tag = blk_mq_unique_tag(cmd->request);
 844                 hwq = blk_mq_unique_tag_to_hwq(tag);
 845                 qpair = ha->queue_pair_map[hwq];
 846
 847                 if (qpair)
 848                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 849         }
 850
 851         if (ha->flags.eeh_busy) {
 852                 if (ha->flags.pci_channel_io_perm_failure) {
 853                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 854                             "PCI Channel IO permanent failure, exiting "
 855                             "cmd=%p.\n", cmd);
 856                         cmd->result = DID_NO_CONNECT << 16;
 857                 } else {
 858                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 859                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 860                         cmd->result = DID_REQUEUE << 16;
 861                 }
 862                 goto qc24_fail_command;
 863         }
 864
 865         rval = fc_remote_port_chkready(rport);
 866         if (rval) {
 867                 cmd->result = rval;
 868                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 869                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 870                     cmd, rval);
 871                 goto qc24_fail_command;
 872         }
 873
 874         if (!vha->flags.difdix_supported &&
 875                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 876                         ql_dbg(ql_dbg_io, vha, 0x3004,
 877                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 878                             cmd);
 879                         cmd->result = DID_NO_CONNECT << 16;
 880                         goto qc24_fail_command;
 881         }
 882
 883         if (!fcport) {
 884                 cmd->result = DID_NO_CONNECT << 16;
 885                 goto qc24_fail_command;
 886         }
 887
 888         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 889                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 890                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 891                         ql_dbg(ql_dbg_io, vha, 0x3005,
 892                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 893                             atomic_read(&fcport->state),
 894                             atomic_read(&base_vha->loop_state));
 895                         cmd->result = DID_NO_CONNECT << 16;
 896                         goto qc24_fail_command;
 897                 }
 898                 goto qc24_target_busy;
 899         }
 900
 901         /*
 902          * Return target busy if we've received a non-zero retry_delay_timer
 903          * in a FCP_RSP.
 904          */
 905         if (fcport->retry_delay_timestamp == 0) {
 906                 /* retry delay not set */
 907         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 908                 fcport->retry_delay_timestamp = 0;
 909         else
 910                 goto qc24_target_busy;
 911
 912         sp = scsi_cmd_priv(cmd);
 913         qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport);
 914
 915         sp->u.scmd.cmd = cmd;
 916         sp->type = SRB_SCSI_CMD;
 917
 918         CMD_SP(cmd) = (void *)sp;
 919         sp->free = qla2x00_sp_free_dma;
 920         sp->done = qla2x00_sp_compl;
 921
 922         rval = ha->isp_ops->start_scsi(sp);
 923         if (rval != QLA_SUCCESS) {
 924                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 925                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 926                 goto qc24_host_busy_free_sp;
 927         }
 928
 929         return 0;
 930
 931 qc24_host_busy_free_sp:
 932         sp->free(sp);
 933
 934 qc24_target_busy:
 935         return SCSI_MLQUEUE_TARGET_BUSY;
 936
 937 qc24_fail_command:
 938         cmd->scsi_done(cmd);
 939
 940         return 0;
 941 }
 942
 943 /* For MQ supported I/O */
 944 int
 945 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 946     struct qla_qpair *qpair)
 947 {
 948         scsi_qla_host_t *vha = shost_priv(host);
 949         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 950         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 951         struct qla_hw_data *ha = vha->hw;
 952         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 953         srb_t *sp;
 954         int rval;
 955
 956         rval = rport ? fc_remote_port_chkready(rport) : FC_PORTSTATE_OFFLINE;
 957         if (rval) {
 958                 cmd->result = rval;
 959                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 960                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 961                     cmd, rval);
 962                 goto qc24_fail_command;
 963         }
 964
 965         if (!fcport) {
 966                 cmd->result = DID_NO_CONNECT << 16;
 967                 goto qc24_fail_command;
 968         }
 969
 970         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 971                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 972                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 973                         ql_dbg(ql_dbg_io, vha, 0x3077,
 974                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 975                             atomic_read(&fcport->state),
 976                             atomic_read(&base_vha->loop_state));
 977                         cmd->result = DID_NO_CONNECT << 16;
 978                         goto qc24_fail_command;
 979                 }
 980                 goto qc24_target_busy;
 981         }
 982
 983         /*
 984          * Return target busy if we've received a non-zero retry_delay_timer
 985          * in a FCP_RSP.
 986          */
 987         if (fcport->retry_delay_timestamp == 0) {
 988                 /* retry delay not set */
 989         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 990                 fcport->retry_delay_timestamp = 0;
 991         else
 992                 goto qc24_target_busy;
 993
 994         sp = scsi_cmd_priv(cmd);
 995         qla2xxx_init_sp(sp, vha, qpair, fcport);
 996
 997         sp->u.scmd.cmd = cmd;
 998         sp->type = SRB_SCSI_CMD;
 999         CMD_SP(cmd) = (void *)sp;
1000         sp->free = qla2xxx_qpair_sp_free_dma;
1001         sp->done = qla2xxx_qpair_sp_compl;
1002
1003         rval = ha->isp_ops->start_scsi_mq(sp);
1004         if (rval != QLA_SUCCESS) {
1005                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1006                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1007                 if (rval == QLA_INTERFACE_ERROR)
1008                         goto qc24_free_sp_fail_command;
1009                 goto qc24_host_busy_free_sp;
1010         }
1011
1012         return 0;
1013
1014 qc24_host_busy_free_sp:
1015         sp->free(sp);
1016
1017 qc24_target_busy:
1018         return SCSI_MLQUEUE_TARGET_BUSY;
1019
1020 qc24_free_sp_fail_command:
1021         sp->free(sp);
1022         CMD_SP(cmd) = NULL;
1023         qla2xxx_rel_qpair_sp(sp->qpair, sp);
1024
1025 qc24_fail_command:
1026         cmd->scsi_done(cmd);
1027
1028         return 0;
1029 }
1030
1031 /*
1032  * qla2x00_eh_wait_on_command
1033  *    Waits for the command to be returned by the Firmware for some
1034  *    max time.
1035  *
1036  * Input:
1037  *    cmd = Scsi Command to wait on.
1038  *
1039  * Return:
1040  *    Completed in time : QLA_SUCCESS
1041  *    Did not complete in time : QLA_FUNCTION_FAILED
1042  */
1043 static int
1044 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1045 {
1046 #define ABORT_POLLING_PERIOD    1000
1047 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1048         unsigned long wait_iter = ABORT_WAIT_ITER;
1049         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1050         struct qla_hw_data *ha = vha->hw;
1051         int ret = QLA_SUCCESS;
1052
1053         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1054                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1055                     "Return:eh_wait.\n");
1056                 return ret;
1057         }
1058
1059         while (CMD_SP(cmd) && wait_iter--) {
1060                 msleep(ABORT_POLLING_PERIOD);
1061         }
1062         if (CMD_SP(cmd))
1063                 ret = QLA_FUNCTION_FAILED;
1064
1065         return ret;
1066 }
1067
1068 /*
1069  * qla2x00_wait_for_hba_online
1070  *    Wait till the HBA is online after going through
1071  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1072  *    finally HBA is disabled ie marked offline
1073  *
1074  * Input:
1075  *     ha - pointer to host adapter structure
1076  *
1077  * Note:
1078  *    Does context switching-Release SPIN_LOCK
1079  *    (if any) before calling this routine.
1080  *
1081  * Return:
1082  *    Success (Adapter is online) : 0
1083  *    Failed  (Adapter is offline/disabled) : 1
1084  */
1085 int
1086 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1087 {
1088         int             return_status;
1089         unsigned long   wait_online;
1090         struct qla_hw_data *ha = vha->hw;
1091         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1092
1093         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1094         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1095             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1096             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1097             ha->dpc_active) && time_before(jiffies, wait_online)) {
1098
1099                 msleep(1000);
1100         }
1101         if (base_vha->flags.online)
1102                 return_status = QLA_SUCCESS;
1103         else
1104                 return_status = QLA_FUNCTION_FAILED;
1105
1106         return (return_status);
1107 }
1108
1109 static inline int test_fcport_count(scsi_qla_host_t *vha)
1110 {
1111         struct qla_hw_data *ha = vha->hw;
1112         unsigned long flags;
1113         int res;
1114
1115         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1116         ql_dbg(ql_dbg_init, vha, 0x00ec,
1117             "tgt %p, fcport_count=%d\n",
1118             vha, vha->fcport_count);
1119         res = (vha->fcport_count == 0);
1120         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1121
1122         return res;
1123 }
1124
1125 /*
1126  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1127  * it has dependency on UNLOADING flag to stop device discovery
1128  */
1129 void
1130 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1131 {
1132         u8 i;
1133
1134         qla2x00_mark_all_devices_lost(vha);
1135
1136         for (i = 0; i < 10; i++) {
1137                 if (wait_event_timeout(vha->fcport_waitQ,
1138                     test_fcport_count(vha), HZ) > 0)
1139                         break;
1140         }
1141
1142         flush_workqueue(vha->hw->wq);
1143 }
1144
1145 /*
1146  * qla2x00_wait_for_hba_ready
1147  * Wait till the HBA is ready before doing driver unload
1148  *
1149  * Input:
1150  *     ha - pointer to host adapter structure
1151  *
1152  * Note:
1153  *    Does context switching-Release SPIN_LOCK
1154  *    (if any) before calling this routine.
1155  *
1156  */
1157 static void
1158 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1159 {
1160         struct qla_hw_data *ha = vha->hw;
1161         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1162
1163         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1164                 ha->flags.mbox_busy) ||
1165                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1166                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1167                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1168                         break;
1169                 msleep(1000);
1170         }
1171 }
1172
1173 int
1174 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1175 {
1176         int             return_status;
1177         unsigned long   wait_reset;
1178         struct qla_hw_data *ha = vha->hw;
1179         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1180
1181         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1182         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1183             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1184             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1185             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1186
1187                 msleep(1000);
1188
1189                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1190                     ha->flags.chip_reset_done)
1191                         break;
1192         }
1193         if (ha->flags.chip_reset_done)
1194                 return_status = QLA_SUCCESS;
1195         else
1196                 return_status = QLA_FUNCTION_FAILED;
1197
1198         return return_status;
1199 }
1200
1201 #define ISP_REG_DISCONNECT 0xffffffffU
1202 /**************************************************************************
1203 * qla2x00_isp_reg_stat
1204 *
1205 * Description:
1206 *       Read the host status register of ISP before aborting the command.
1207 *
1208 * Input:
1209 *       ha = pointer to host adapter structure.
1210 *
1211 *
1212 * Returns:
1213 *       Either true or false.
1214 *
1215 * Note: Return true if there is register disconnect.
1216 **************************************************************************/
1217 static inline
1218 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1219 {
1220         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1221         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1222
1223         if (IS_P3P_TYPE(ha))
1224                 return ((rd_reg_dword(&reg82->host_int)) == ISP_REG_DISCONNECT);
1225         else
1226                 return ((rd_reg_dword(&reg->host_status)) ==
1227                         ISP_REG_DISCONNECT);
1228 }
1229
1230 /**************************************************************************
1231 * qla2xxx_eh_abort
1232 *
1233 * Description:
1234 *    The abort function will abort the specified command.
1235 *
1236 * Input:
1237 *    cmd = Linux SCSI command packet to be aborted.
1238 *
1239 * Returns:
1240 *    Either SUCCESS or FAILED.
1241 *
1242 * Note:
1243 *    Only return FAILED if command not returned by firmware.
1244 **************************************************************************/
1245 static int
1246 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1247 {
1248         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1249         DECLARE_COMPLETION_ONSTACK(comp);
1250         srb_t *sp;
1251         int ret;
1252         unsigned int id;
1253         uint64_t lun;
1254         int rval;
1255         struct qla_hw_data *ha = vha->hw;
1256         uint32_t ratov_j;
1257         struct qla_qpair *qpair;
1258         unsigned long flags;
1259
1260         if (qla2x00_isp_reg_stat(ha)) {
1261                 ql_log(ql_log_info, vha, 0x8042,
1262                     "PCI/Register disconnect, exiting.\n");
1263                 return FAILED;
1264         }
1265
1266         ret = fc_block_scsi_eh(cmd);
1267         if (ret != 0)
1268                 return ret;
1269
1270         sp = scsi_cmd_priv(cmd);
1271         qpair = sp->qpair;
1272
1273         if ((sp->fcport && sp->fcport->deleted) || !qpair)
1274                 return SUCCESS;
1275
1276         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1277         sp->comp = &comp;
1278         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1279
1280
1281         id = cmd->device->id;
1282         lun = cmd->device->lun;
1283
1284         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1285             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1286             vha->host_no, id, lun, sp, cmd, sp->handle);
1287
1288         /*
1289          * Abort will release the original Command/sp from FW. Let the
1290          * original command call scsi_done. In return, he will wakeup
1291          * this sleeping thread.
1292          */
1293         rval = ha->isp_ops->abort_command(sp);
1294
1295         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1296                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1297
1298         /* Wait for the command completion. */
1299         ratov_j = ha->r_a_tov/10 * 4 * 1000;
1300         ratov_j = msecs_to_jiffies(ratov_j);
1301         switch (rval) {
1302         case QLA_SUCCESS:
1303                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1304                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1305                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1306                             __func__, ha->r_a_tov/10);
1307                         ret = FAILED;
1308                 } else {
1309                         ret = SUCCESS;
1310                 }
1311                 break;
1312         default:
1313                 ret = FAILED;
1314                 break;
1315         }
1316
1317         sp->comp = NULL;
1318
1319         ql_log(ql_log_info, vha, 0x801c,
1320             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1321             vha->host_no, id, lun, ret);
1322
1323         return ret;
1324 }
1325
1326 /*
1327  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1328  */
1329 int
1330 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1331         uint64_t l, enum nexus_wait_type type)
1332 {
1333         int cnt, match, status;
1334         unsigned long flags;
1335         struct qla_hw_data *ha = vha->hw;
1336         struct req_que *req;
1337         srb_t *sp;
1338         struct scsi_cmnd *cmd;
1339
1340         status = QLA_SUCCESS;
1341
1342         spin_lock_irqsave(&ha->hardware_lock, flags);
1343         req = vha->req;
1344         for (cnt = 1; status == QLA_SUCCESS &&
1345                 cnt < req->num_outstanding_cmds; cnt++) {
1346                 sp = req->outstanding_cmds[cnt];
1347                 if (!sp)
1348                         continue;
1349                 if (sp->type != SRB_SCSI_CMD)
1350                         continue;
1351                 if (vha->vp_idx != sp->vha->vp_idx)
1352                         continue;
1353                 match = 0;
1354                 cmd = GET_CMD_SP(sp);
1355                 switch (type) {
1356                 case WAIT_HOST:
1357                         match = 1;
1358                         break;
1359                 case WAIT_TARGET:
1360                         match = cmd->device->id == t;
1361                         break;
1362                 case WAIT_LUN:
1363                         match = (cmd->device->id == t &&
1364                                 cmd->device->lun == l);
1365                         break;
1366                 }
1367                 if (!match)
1368                         continue;
1369
1370                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1371                 status = qla2x00_eh_wait_on_command(cmd);
1372                 spin_lock_irqsave(&ha->hardware_lock, flags);
1373         }
1374         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1375
1376         return status;
1377 }
1378
1379 static char *reset_errors[] = {
1380         "HBA not online",
1381         "HBA not ready",
1382         "Task management failed",
1383         "Waiting for command completions",
1384 };
1385
1386 static int
1387 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1388     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1389 {
1390         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1391         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1392         int err;
1393
1394         if (!fcport) {
1395                 return FAILED;
1396         }
1397
1398         err = fc_block_scsi_eh(cmd);
1399         if (err != 0)
1400                 return err;
1401
1402         if (fcport->deleted)
1403                 return SUCCESS;
1404
1405         ql_log(ql_log_info, vha, 0x8009,
1406             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1407             cmd->device->id, cmd->device->lun, cmd);
1408
1409         err = 0;
1410         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1411                 ql_log(ql_log_warn, vha, 0x800a,
1412                     "Wait for hba online failed for cmd=%p.\n", cmd);
1413                 goto eh_reset_failed;
1414         }
1415         err = 2;
1416         if (do_reset(fcport, cmd->device->lun, 1)
1417                 != QLA_SUCCESS) {
1418                 ql_log(ql_log_warn, vha, 0x800c,
1419                     "do_reset failed for cmd=%p.\n", cmd);
1420                 goto eh_reset_failed;
1421         }
1422         err = 3;
1423         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1424             cmd->device->lun, type) != QLA_SUCCESS) {
1425                 ql_log(ql_log_warn, vha, 0x800d,
1426                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1427                 goto eh_reset_failed;
1428         }
1429
1430         ql_log(ql_log_info, vha, 0x800e,
1431             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1432             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1433
1434         return SUCCESS;
1435
1436 eh_reset_failed:
1437         ql_log(ql_log_info, vha, 0x800f,
1438             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1439             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1440             cmd);
1441         return FAILED;
1442 }
1443
1444 static int
1445 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1446 {
1447         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1448         struct qla_hw_data *ha = vha->hw;
1449
1450         if (qla2x00_isp_reg_stat(ha)) {
1451                 ql_log(ql_log_info, vha, 0x803e,
1452                     "PCI/Register disconnect, exiting.\n");
1453                 return FAILED;
1454         }
1455
1456         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1457             ha->isp_ops->lun_reset);
1458 }
1459
1460 static int
1461 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1462 {
1463         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1464         struct qla_hw_data *ha = vha->hw;
1465
1466         if (qla2x00_isp_reg_stat(ha)) {
1467                 ql_log(ql_log_info, vha, 0x803f,
1468                     "PCI/Register disconnect, exiting.\n");
1469                 return FAILED;
1470         }
1471
1472         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1473             ha->isp_ops->target_reset);
1474 }
1475
1476 /**************************************************************************
1477 * qla2xxx_eh_bus_reset
1478 *
1479 * Description:
1480 *    The bus reset function will reset the bus and abort any executing
1481 *    commands.
1482 *
1483 * Input:
1484 *    cmd = Linux SCSI command packet of the command that cause the
1485 *          bus reset.
1486 *
1487 * Returns:
1488 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1489 *
1490 **************************************************************************/
1491 static int
1492 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1493 {
1494         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1495         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1496         int ret = FAILED;
1497         unsigned int id;
1498         uint64_t lun;
1499         struct qla_hw_data *ha = vha->hw;
1500
1501         if (qla2x00_isp_reg_stat(ha)) {
1502                 ql_log(ql_log_info, vha, 0x8040,
1503                     "PCI/Register disconnect, exiting.\n");
1504                 return FAILED;
1505         }
1506
1507         id = cmd->device->id;
1508         lun = cmd->device->lun;
1509
1510         if (!fcport) {
1511                 return ret;
1512         }
1513
1514         ret = fc_block_scsi_eh(cmd);
1515         if (ret != 0)
1516                 return ret;
1517         ret = FAILED;
1518
1519         if (qla2x00_chip_is_down(vha))
1520                 return ret;
1521
1522         ql_log(ql_log_info, vha, 0x8012,
1523             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1524
1525         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1526                 ql_log(ql_log_fatal, vha, 0x8013,
1527                     "Wait for hba online failed board disabled.\n");
1528                 goto eh_bus_reset_done;
1529         }
1530
1531         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1532                 ret = SUCCESS;
1533
1534         if (ret == FAILED)
1535                 goto eh_bus_reset_done;
1536
1537         /* Flush outstanding commands. */
1538         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1539             QLA_SUCCESS) {
1540                 ql_log(ql_log_warn, vha, 0x8014,
1541                     "Wait for pending commands failed.\n");
1542                 ret = FAILED;
1543         }
1544
1545 eh_bus_reset_done:
1546         ql_log(ql_log_warn, vha, 0x802b,
1547             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1548             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1549
1550         return ret;
1551 }
1552
1553 /**************************************************************************
1554 * qla2xxx_eh_host_reset
1555 *
1556 * Description:
1557 *    The reset function will reset the Adapter.
1558 *
1559 * Input:
1560 *      cmd = Linux SCSI command packet of the command that cause the
1561 *            adapter reset.
1562 *
1563 * Returns:
1564 *      Either SUCCESS or FAILED.
1565 *
1566 * Note:
1567 **************************************************************************/
1568 static int
1569 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1570 {
1571         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1572         struct qla_hw_data *ha = vha->hw;
1573         int ret = FAILED;
1574         unsigned int id;
1575         uint64_t lun;
1576         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1577
1578         if (qla2x00_isp_reg_stat(ha)) {
1579                 ql_log(ql_log_info, vha, 0x8041,
1580                     "PCI/Register disconnect, exiting.\n");
1581                 schedule_work(&ha->board_disable);
1582                 return SUCCESS;
1583         }
1584
1585         id = cmd->device->id;
1586         lun = cmd->device->lun;
1587
1588         ql_log(ql_log_info, vha, 0x8018,
1589             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1590
1591         /*
1592          * No point in issuing another reset if one is active.  Also do not
1593          * attempt a reset if we are updating flash.
1594          */
1595         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1596                 goto eh_host_reset_lock;
1597
1598         if (vha != base_vha) {
1599                 if (qla2x00_vp_abort_isp(vha))
1600                         goto eh_host_reset_lock;
1601         } else {
1602                 if (IS_P3P_TYPE(vha->hw)) {
1603                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1604                                 /* Ctx reset success */
1605                                 ret = SUCCESS;
1606                                 goto eh_host_reset_lock;
1607                         }
1608                         /* fall thru if ctx reset failed */
1609                 }
1610                 if (ha->wq)
1611                         flush_workqueue(ha->wq);
1612
1613                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1614                 if (ha->isp_ops->abort_isp(base_vha)) {
1615                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1616                         /* failed. schedule dpc to try */
1617                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1618
1619                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1620                                 ql_log(ql_log_warn, vha, 0x802a,
1621                                     "wait for hba online failed.\n");
1622                                 goto eh_host_reset_lock;
1623                         }
1624                 }
1625                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1626         }
1627
1628         /* Waiting for command to be returned to OS.*/
1629         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1630                 QLA_SUCCESS)
1631                 ret = SUCCESS;
1632
1633 eh_host_reset_lock:
1634         ql_log(ql_log_info, vha, 0x8017,
1635             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1636             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1637
1638         return ret;
1639 }
1640
1641 /*
1642 * qla2x00_loop_reset
1643 *      Issue loop reset.
1644 *
1645 * Input:
1646 *      ha = adapter block pointer.
1647 *
1648 * Returns:
1649 *      0 = success
1650 */
1651 int
1652 qla2x00_loop_reset(scsi_qla_host_t *vha)
1653 {
1654         int ret;
1655         struct fc_port *fcport;
1656         struct qla_hw_data *ha = vha->hw;
1657
1658         if (IS_QLAFX00(ha)) {
1659                 return qlafx00_loop_reset(vha);
1660         }
1661
1662         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1663                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1664                         if (fcport->port_type != FCT_TARGET)
1665                                 continue;
1666
1667                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1668                         if (ret != QLA_SUCCESS) {
1669                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1670                                     "Bus Reset failed: Reset=%d "
1671                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1672                         }
1673                 }
1674         }
1675
1676
1677         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1678                 atomic_set(&vha->loop_state, LOOP_DOWN);
1679                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1680                 qla2x00_mark_all_devices_lost(vha);
1681                 ret = qla2x00_full_login_lip(vha);
1682                 if (ret != QLA_SUCCESS) {
1683                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1684                             "full_login_lip=%d.\n", ret);
1685                 }
1686         }
1687
1688         if (ha->flags.enable_lip_reset) {
1689                 ret = qla2x00_lip_reset(vha);
1690                 if (ret != QLA_SUCCESS)
1691                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1692                             "lip_reset failed (%d).\n", ret);
1693         }
1694
1695         /* Issue marker command only when we are going to start the I/O */
1696         vha->marker_needed = 1;
1697
1698         return QLA_SUCCESS;
1699 }
1700
1701 /*
1702  * The caller must ensure that no completion interrupts will happen
1703  * while this function is in progress.
1704  */
1705 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1706                               unsigned long *flags)
1707         __releases(qp->qp_lock_ptr)
1708         __acquires(qp->qp_lock_ptr)
1709 {
1710         DECLARE_COMPLETION_ONSTACK(comp);
1711         scsi_qla_host_t *vha = qp->vha;
1712         struct qla_hw_data *ha = vha->hw;
1713         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1714         int rval;
1715         bool ret_cmd;
1716         uint32_t ratov_j;
1717
1718         lockdep_assert_held(qp->qp_lock_ptr);
1719
1720         if (qla2x00_chip_is_down(vha)) {
1721                 sp->done(sp, res);
1722                 return;
1723         }
1724
1725         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1726             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1727              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1728              !qla2x00_isp_reg_stat(ha))) {
1729                 if (sp->comp) {
1730                         sp->done(sp, res);
1731                         return;
1732                 }
1733
1734                 sp->comp = &comp;
1735                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1736
1737                 rval = ha->isp_ops->abort_command(sp);
1738                 /* Wait for command completion. */
1739                 ret_cmd = false;
1740                 ratov_j = ha->r_a_tov/10 * 4 * 1000;
1741                 ratov_j = msecs_to_jiffies(ratov_j);
1742                 switch (rval) {
1743                 case QLA_SUCCESS:
1744                         if (wait_for_completion_timeout(&comp, ratov_j)) {
1745                                 ql_dbg(ql_dbg_taskm, vha, 0xffff,
1746                                     "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1747                                     __func__, ha->r_a_tov/10);
1748                                 ret_cmd = true;
1749                         }
1750                         /* else FW return SP to driver */
1751                         break;
1752                 default:
1753                         ret_cmd = true;
1754                         break;
1755                 }
1756
1757                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1758                 if (ret_cmd && blk_mq_request_started(cmd->request))
1759                         sp->done(sp, res);
1760         } else {
1761                 sp->done(sp, res);
1762         }
1763 }
1764
1765 /*
1766  * The caller must ensure that no completion interrupts will happen
1767  * while this function is in progress.
1768  */
1769 static void
1770 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1771 {
1772         int cnt;
1773         unsigned long flags;
1774         srb_t *sp;
1775         scsi_qla_host_t *vha = qp->vha;
1776         struct qla_hw_data *ha = vha->hw;
1777         struct req_que *req;
1778         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1779         struct qla_tgt_cmd *cmd;
1780
1781         if (!ha->req_q_map)
1782                 return;
1783         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1784         req = qp->req;
1785         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1786                 sp = req->outstanding_cmds[cnt];
1787                 if (sp) {
1788                         switch (sp->cmd_type) {
1789                         case TYPE_SRB:
1790                                 qla2x00_abort_srb(qp, sp, res, &flags);
1791                                 break;
1792                         case TYPE_TGT_CMD:
1793                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1794                                     qla_ini_mode_enabled(vha)) {
1795                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1796                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1797                                             vha->dpc_flags);
1798                                         continue;
1799                                 }
1800                                 cmd = (struct qla_tgt_cmd *)sp;
1801                                 cmd->aborted = 1;
1802                                 break;
1803                         case TYPE_TGT_TMCMD:
1804                                 /* Skip task management functions. */
1805                                 break;
1806                         default:
1807                                 break;
1808                         }
1809                         req->outstanding_cmds[cnt] = NULL;
1810                 }
1811         }
1812         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1813 }
1814
1815 /*
1816  * The caller must ensure that no completion interrupts will happen
1817  * while this function is in progress.
1818  */
1819 void
1820 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1821 {
1822         int que;
1823         struct qla_hw_data *ha = vha->hw;
1824
1825         /* Continue only if initialization complete. */
1826         if (!ha->base_qpair)
1827                 return;
1828         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1829
1830         if (!ha->queue_pair_map)
1831                 return;
1832         for (que = 0; que < ha->max_qpairs; que++) {
1833                 if (!ha->queue_pair_map[que])
1834                         continue;
1835
1836                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1837         }
1838 }
1839
1840 static int
1841 qla2xxx_slave_alloc(struct scsi_device *sdev)
1842 {
1843         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1844
1845         if (!rport || fc_remote_port_chkready(rport))
1846                 return -ENXIO;
1847
1848         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1849
1850         return 0;
1851 }
1852
1853 static int
1854 qla2xxx_slave_configure(struct scsi_device *sdev)
1855 {
1856         scsi_qla_host_t *vha = shost_priv(sdev->host);
1857         struct req_que *req = vha->req;
1858
1859         if (IS_T10_PI_CAPABLE(vha->hw))
1860                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1861
1862         scsi_change_queue_depth(sdev, req->max_q_depth);
1863         return 0;
1864 }
1865
1866 static void
1867 qla2xxx_slave_destroy(struct scsi_device *sdev)
1868 {
1869         sdev->hostdata = NULL;
1870 }
1871
1872 /**
1873  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1874  * @ha: HA context
1875  *
1876  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1877  * supported addressing method.
1878  */
1879 static void
1880 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1881 {
1882         /* Assume a 32bit DMA mask. */
1883         ha->flags.enable_64bit_addressing = 0;
1884
1885         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1886                 /* Any upper-dword bits set? */
1887                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1888                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1889                         /* Ok, a 64bit DMA mask is applicable. */
1890                         ha->flags.enable_64bit_addressing = 1;
1891                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1892                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1893                         return;
1894                 }
1895         }
1896
1897         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1898         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1899 }
1900
1901 static void
1902 qla2x00_enable_intrs(struct qla_hw_data *ha)
1903 {
1904         unsigned long flags = 0;
1905         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1906
1907         spin_lock_irqsave(&ha->hardware_lock, flags);
1908         ha->interrupts_on = 1;
1909         /* enable risc and host interrupts */
1910         wrt_reg_word(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1911         rd_reg_word(&reg->ictrl);
1912         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1913
1914 }
1915
1916 static void
1917 qla2x00_disable_intrs(struct qla_hw_data *ha)
1918 {
1919         unsigned long flags = 0;
1920         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1921
1922         spin_lock_irqsave(&ha->hardware_lock, flags);
1923         ha->interrupts_on = 0;
1924         /* disable risc and host interrupts */
1925         wrt_reg_word(&reg->ictrl, 0);
1926         rd_reg_word(&reg->ictrl);
1927         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1928 }
1929
1930 static void
1931 qla24xx_enable_intrs(struct qla_hw_data *ha)
1932 {
1933         unsigned long flags = 0;
1934         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1935
1936         spin_lock_irqsave(&ha->hardware_lock, flags);
1937         ha->interrupts_on = 1;
1938         wrt_reg_dword(&reg->ictrl, ICRX_EN_RISC_INT);
1939         rd_reg_dword(&reg->ictrl);
1940         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1941 }
1942
1943 static void
1944 qla24xx_disable_intrs(struct qla_hw_data *ha)
1945 {
1946         unsigned long flags = 0;
1947         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1948
1949         if (IS_NOPOLLING_TYPE(ha))
1950                 return;
1951         spin_lock_irqsave(&ha->hardware_lock, flags);
1952         ha->interrupts_on = 0;
1953         wrt_reg_dword(&reg->ictrl, 0);
1954         rd_reg_dword(&reg->ictrl);
1955         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1956 }
1957
1958 static int
1959 qla2x00_iospace_config(struct qla_hw_data *ha)
1960 {
1961         resource_size_t pio;
1962         uint16_t msix;
1963
1964         if (pci_request_selected_regions(ha->pdev, ha->bars,
1965             QLA2XXX_DRIVER_NAME)) {
1966                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1967                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1968                     pci_name(ha->pdev));
1969                 goto iospace_error_exit;
1970         }
1971         if (!(ha->bars & 1))
1972                 goto skip_pio;
1973
1974         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1975         pio = pci_resource_start(ha->pdev, 0);
1976         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1977                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1978                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1979                             "Invalid pci I/O region size (%s).\n",
1980                             pci_name(ha->pdev));
1981                         pio = 0;
1982                 }
1983         } else {
1984                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1985                     "Region #0 no a PIO resource (%s).\n",
1986                     pci_name(ha->pdev));
1987                 pio = 0;
1988         }
1989         ha->pio_address = pio;
1990         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1991             "PIO address=%llu.\n",
1992             (unsigned long long)ha->pio_address);
1993
1994 skip_pio:
1995         /* Use MMIO operations for all accesses. */
1996         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1997                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1998                     "Region #1 not an MMIO resource (%s), aborting.\n",
1999                     pci_name(ha->pdev));
2000                 goto iospace_error_exit;
2001         }
2002         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2003                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2004                     "Invalid PCI mem region size (%s), aborting.\n",
2005                     pci_name(ha->pdev));
2006                 goto iospace_error_exit;
2007         }
2008
2009         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2010         if (!ha->iobase) {
2011                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2012                     "Cannot remap MMIO (%s), aborting.\n",
2013                     pci_name(ha->pdev));
2014                 goto iospace_error_exit;
2015         }
2016
2017         /* Determine queue resources */
2018         ha->max_req_queues = ha->max_rsp_queues = 1;
2019         ha->msix_count = QLA_BASE_VECTORS;
2020         if (!ql2xmqsupport || !ql2xnvmeenable ||
2021             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2022                 goto mqiobase_exit;
2023
2024         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2025                         pci_resource_len(ha->pdev, 3));
2026         if (ha->mqiobase) {
2027                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2028                     "MQIO Base=%p.\n", ha->mqiobase);
2029                 /* Read MSIX vector size of the board */
2030                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2031                 ha->msix_count = msix + 1;
2032                 /* Max queues are bounded by available msix vectors */
2033                 /* MB interrupt uses 1 vector */
2034                 ha->max_req_queues = ha->msix_count - 1;
2035                 ha->max_rsp_queues = ha->max_req_queues;
2036                 /* Queue pairs is the max value minus the base queue pair */
2037                 ha->max_qpairs = ha->max_rsp_queues - 1;
2038                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2039                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2040
2041                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2042                     "MSI-X vector count: %d.\n", ha->msix_count);
2043         } else
2044                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2045                     "BAR 3 not enabled.\n");
2046
2047 mqiobase_exit:
2048         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2049             "MSIX Count: %d.\n", ha->msix_count);
2050         return (0);
2051
2052 iospace_error_exit:
2053         return (-ENOMEM);
2054 }
2055
2056
2057 static int
2058 qla83xx_iospace_config(struct qla_hw_data *ha)
2059 {
2060         uint16_t msix;
2061
2062         if (pci_request_selected_regions(ha->pdev, ha->bars,
2063             QLA2XXX_DRIVER_NAME)) {
2064                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2065                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2066                     pci_name(ha->pdev));
2067
2068                 goto iospace_error_exit;
2069         }
2070
2071         /* Use MMIO operations for all accesses. */
2072         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2073                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2074                     "Invalid pci I/O region size (%s).\n",
2075                     pci_name(ha->pdev));
2076                 goto iospace_error_exit;
2077         }
2078         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2079                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2080                     "Invalid PCI mem region size (%s), aborting\n",
2081                         pci_name(ha->pdev));
2082                 goto iospace_error_exit;
2083         }
2084
2085         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2086         if (!ha->iobase) {
2087                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2088                     "Cannot remap MMIO (%s), aborting.\n",
2089                     pci_name(ha->pdev));
2090                 goto iospace_error_exit;
2091         }
2092
2093         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2094         /* 83XX 26XX always use MQ type access for queues
2095          * - mbar 2, a.k.a region 4 */
2096         ha->max_req_queues = ha->max_rsp_queues = 1;
2097         ha->msix_count = QLA_BASE_VECTORS;
2098         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2099                         pci_resource_len(ha->pdev, 4));
2100
2101         if (!ha->mqiobase) {
2102                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2103                     "BAR2/region4 not enabled\n");
2104                 goto mqiobase_exit;
2105         }
2106
2107         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2108                         pci_resource_len(ha->pdev, 2));
2109         if (ha->msixbase) {
2110                 /* Read MSIX vector size of the board */
2111                 pci_read_config_word(ha->pdev,
2112                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2113                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2114                 /*
2115                  * By default, driver uses at least two msix vectors
2116                  * (default & rspq)
2117                  */
2118                 if (ql2xmqsupport || ql2xnvmeenable) {
2119                         /* MB interrupt uses 1 vector */
2120                         ha->max_req_queues = ha->msix_count - 1;
2121
2122                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2123                         if (QLA_TGT_MODE_ENABLED())
2124                                 ha->max_req_queues--;
2125
2126                         ha->max_rsp_queues = ha->max_req_queues;
2127
2128                         /* Queue pairs is the max value minus
2129                          * the base queue pair */
2130                         ha->max_qpairs = ha->max_req_queues - 1;
2131                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2132                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2133                 }
2134                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2135                     "MSI-X vector count: %d.\n", ha->msix_count);
2136         } else
2137                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2138                     "BAR 1 not enabled.\n");
2139
2140 mqiobase_exit:
2141         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2142             "MSIX Count: %d.\n", ha->msix_count);
2143         return 0;
2144
2145 iospace_error_exit:
2146         return -ENOMEM;
2147 }
2148
2149 static struct isp_operations qla2100_isp_ops = {
2150         .pci_config             = qla2100_pci_config,
2151         .reset_chip             = qla2x00_reset_chip,
2152         .chip_diag              = qla2x00_chip_diag,
2153         .config_rings           = qla2x00_config_rings,
2154         .reset_adapter          = qla2x00_reset_adapter,
2155         .nvram_config           = qla2x00_nvram_config,
2156         .update_fw_options      = qla2x00_update_fw_options,
2157         .load_risc              = qla2x00_load_risc,
2158         .pci_info_str           = qla2x00_pci_info_str,
2159         .fw_version_str         = qla2x00_fw_version_str,
2160         .intr_handler           = qla2100_intr_handler,
2161         .enable_intrs           = qla2x00_enable_intrs,
2162         .disable_intrs          = qla2x00_disable_intrs,
2163         .abort_command          = qla2x00_abort_command,
2164         .target_reset           = qla2x00_abort_target,
2165         .lun_reset              = qla2x00_lun_reset,
2166         .fabric_login           = qla2x00_login_fabric,
2167         .fabric_logout          = qla2x00_fabric_logout,
2168         .calc_req_entries       = qla2x00_calc_iocbs_32,
2169         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2170         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2171         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2172         .read_nvram             = qla2x00_read_nvram_data,
2173         .write_nvram            = qla2x00_write_nvram_data,
2174         .fw_dump                = qla2100_fw_dump,
2175         .beacon_on              = NULL,
2176         .beacon_off             = NULL,
2177         .beacon_blink           = NULL,
2178         .read_optrom            = qla2x00_read_optrom_data,
2179         .write_optrom           = qla2x00_write_optrom_data,
2180         .get_flash_version      = qla2x00_get_flash_version,
2181         .start_scsi             = qla2x00_start_scsi,
2182         .start_scsi_mq          = NULL,
2183         .abort_isp              = qla2x00_abort_isp,
2184         .iospace_config         = qla2x00_iospace_config,
2185         .initialize_adapter     = qla2x00_initialize_adapter,
2186 };
2187
2188 static struct isp_operations qla2300_isp_ops = {
2189         .pci_config             = qla2300_pci_config,
2190         .reset_chip             = qla2x00_reset_chip,
2191         .chip_diag              = qla2x00_chip_diag,
2192         .config_rings           = qla2x00_config_rings,
2193         .reset_adapter          = qla2x00_reset_adapter,
2194         .nvram_config           = qla2x00_nvram_config,
2195         .update_fw_options      = qla2x00_update_fw_options,
2196         .load_risc              = qla2x00_load_risc,
2197         .pci_info_str           = qla2x00_pci_info_str,
2198         .fw_version_str         = qla2x00_fw_version_str,
2199         .intr_handler           = qla2300_intr_handler,
2200         .enable_intrs           = qla2x00_enable_intrs,
2201         .disable_intrs          = qla2x00_disable_intrs,
2202         .abort_command          = qla2x00_abort_command,
2203         .target_reset           = qla2x00_abort_target,
2204         .lun_reset              = qla2x00_lun_reset,
2205         .fabric_login           = qla2x00_login_fabric,
2206         .fabric_logout          = qla2x00_fabric_logout,
2207         .calc_req_entries       = qla2x00_calc_iocbs_32,
2208         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2209         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2210         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2211         .read_nvram             = qla2x00_read_nvram_data,
2212         .write_nvram            = qla2x00_write_nvram_data,
2213         .fw_dump                = qla2300_fw_dump,
2214         .beacon_on              = qla2x00_beacon_on,
2215         .beacon_off             = qla2x00_beacon_off,
2216         .beacon_blink           = qla2x00_beacon_blink,
2217         .read_optrom            = qla2x00_read_optrom_data,
2218         .write_optrom           = qla2x00_write_optrom_data,
2219         .get_flash_version      = qla2x00_get_flash_version,
2220         .start_scsi             = qla2x00_start_scsi,
2221         .start_scsi_mq          = NULL,
2222         .abort_isp              = qla2x00_abort_isp,
2223         .iospace_config         = qla2x00_iospace_config,
2224         .initialize_adapter     = qla2x00_initialize_adapter,
2225 };
2226
2227 static struct isp_operations qla24xx_isp_ops = {
2228         .pci_config             = qla24xx_pci_config,
2229         .reset_chip             = qla24xx_reset_chip,
2230         .chip_diag              = qla24xx_chip_diag,
2231         .config_rings           = qla24xx_config_rings,
2232         .reset_adapter          = qla24xx_reset_adapter,
2233         .nvram_config           = qla24xx_nvram_config,
2234         .update_fw_options      = qla24xx_update_fw_options,
2235         .load_risc              = qla24xx_load_risc,
2236         .pci_info_str           = qla24xx_pci_info_str,
2237         .fw_version_str         = qla24xx_fw_version_str,
2238         .intr_handler           = qla24xx_intr_handler,
2239         .enable_intrs           = qla24xx_enable_intrs,
2240         .disable_intrs          = qla24xx_disable_intrs,
2241         .abort_command          = qla24xx_abort_command,
2242         .target_reset           = qla24xx_abort_target,
2243         .lun_reset              = qla24xx_lun_reset,
2244         .fabric_login           = qla24xx_login_fabric,
2245         .fabric_logout          = qla24xx_fabric_logout,
2246         .calc_req_entries       = NULL,
2247         .build_iocbs            = NULL,
2248         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2249         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2250         .read_nvram             = qla24xx_read_nvram_data,
2251         .write_nvram            = qla24xx_write_nvram_data,
2252         .fw_dump                = qla24xx_fw_dump,
2253         .beacon_on              = qla24xx_beacon_on,
2254         .beacon_off             = qla24xx_beacon_off,
2255         .beacon_blink           = qla24xx_beacon_blink,
2256         .read_optrom            = qla24xx_read_optrom_data,
2257         .write_optrom           = qla24xx_write_optrom_data,
2258         .get_flash_version      = qla24xx_get_flash_version,
2259         .start_scsi             = qla24xx_start_scsi,
2260         .start_scsi_mq          = NULL,
2261         .abort_isp              = qla2x00_abort_isp,
2262         .iospace_config         = qla2x00_iospace_config,
2263         .initialize_adapter     = qla2x00_initialize_adapter,
2264 };
2265
2266 static struct isp_operations qla25xx_isp_ops = {
2267         .pci_config             = qla25xx_pci_config,
2268         .reset_chip             = qla24xx_reset_chip,
2269         .chip_diag              = qla24xx_chip_diag,
2270         .config_rings           = qla24xx_config_rings,
2271         .reset_adapter          = qla24xx_reset_adapter,
2272         .nvram_config           = qla24xx_nvram_config,
2273         .update_fw_options      = qla24xx_update_fw_options,
2274         .load_risc              = qla24xx_load_risc,
2275         .pci_info_str           = qla24xx_pci_info_str,
2276         .fw_version_str         = qla24xx_fw_version_str,
2277         .intr_handler           = qla24xx_intr_handler,
2278         .enable_intrs           = qla24xx_enable_intrs,
2279         .disable_intrs          = qla24xx_disable_intrs,
2280         .abort_command          = qla24xx_abort_command,
2281         .target_reset           = qla24xx_abort_target,
2282         .lun_reset              = qla24xx_lun_reset,
2283         .fabric_login           = qla24xx_login_fabric,
2284         .fabric_logout          = qla24xx_fabric_logout,
2285         .calc_req_entries       = NULL,
2286         .build_iocbs            = NULL,
2287         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2288         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2289         .read_nvram             = qla25xx_read_nvram_data,
2290         .write_nvram            = qla25xx_write_nvram_data,
2291         .fw_dump                = qla25xx_fw_dump,
2292         .beacon_on              = qla24xx_beacon_on,
2293         .beacon_off             = qla24xx_beacon_off,
2294         .beacon_blink           = qla24xx_beacon_blink,
2295         .read_optrom            = qla25xx_read_optrom_data,
2296         .write_optrom           = qla24xx_write_optrom_data,
2297         .get_flash_version      = qla24xx_get_flash_version,
2298         .start_scsi             = qla24xx_dif_start_scsi,
2299         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2300         .abort_isp              = qla2x00_abort_isp,
2301         .iospace_config         = qla2x00_iospace_config,
2302         .initialize_adapter     = qla2x00_initialize_adapter,
2303 };
2304
2305 static struct isp_operations qla81xx_isp_ops = {
2306         .pci_config             = qla25xx_pci_config,
2307         .reset_chip             = qla24xx_reset_chip,
2308         .chip_diag              = qla24xx_chip_diag,
2309         .config_rings           = qla24xx_config_rings,
2310         .reset_adapter          = qla24xx_reset_adapter,
2311         .nvram_config           = qla81xx_nvram_config,
2312         .update_fw_options      = qla24xx_update_fw_options,
2313         .load_risc              = qla81xx_load_risc,
2314         .pci_info_str           = qla24xx_pci_info_str,
2315         .fw_version_str         = qla24xx_fw_version_str,
2316         .intr_handler           = qla24xx_intr_handler,
2317         .enable_intrs           = qla24xx_enable_intrs,
2318         .disable_intrs          = qla24xx_disable_intrs,
2319         .abort_command          = qla24xx_abort_command,
2320         .target_reset           = qla24xx_abort_target,
2321         .lun_reset              = qla24xx_lun_reset,
2322         .fabric_login           = qla24xx_login_fabric,
2323         .fabric_logout          = qla24xx_fabric_logout,
2324         .calc_req_entries       = NULL,
2325         .build_iocbs            = NULL,
2326         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2327         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2328         .read_nvram             = NULL,
2329         .write_nvram            = NULL,
2330         .fw_dump                = qla81xx_fw_dump,
2331         .beacon_on              = qla24xx_beacon_on,
2332         .beacon_off             = qla24xx_beacon_off,
2333         .beacon_blink           = qla83xx_beacon_blink,
2334         .read_optrom            = qla25xx_read_optrom_data,
2335         .write_optrom           = qla24xx_write_optrom_data,
2336         .get_flash_version      = qla24xx_get_flash_version,
2337         .start_scsi             = qla24xx_dif_start_scsi,
2338         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2339         .abort_isp              = qla2x00_abort_isp,
2340         .iospace_config         = qla2x00_iospace_config,
2341         .initialize_adapter     = qla2x00_initialize_adapter,
2342 };
2343
2344 static struct isp_operations qla82xx_isp_ops = {
2345         .pci_config             = qla82xx_pci_config,
2346         .reset_chip             = qla82xx_reset_chip,
2347         .chip_diag              = qla24xx_chip_diag,
2348         .config_rings           = qla82xx_config_rings,
2349         .reset_adapter          = qla24xx_reset_adapter,
2350         .nvram_config           = qla81xx_nvram_config,
2351         .update_fw_options      = qla24xx_update_fw_options,
2352         .load_risc              = qla82xx_load_risc,
2353         .pci_info_str           = qla24xx_pci_info_str,
2354         .fw_version_str         = qla24xx_fw_version_str,
2355         .intr_handler           = qla82xx_intr_handler,
2356         .enable_intrs           = qla82xx_enable_intrs,
2357         .disable_intrs          = qla82xx_disable_intrs,
2358         .abort_command          = qla24xx_abort_command,
2359         .target_reset           = qla24xx_abort_target,
2360         .lun_reset              = qla24xx_lun_reset,
2361         .fabric_login           = qla24xx_login_fabric,
2362         .fabric_logout          = qla24xx_fabric_logout,
2363         .calc_req_entries       = NULL,
2364         .build_iocbs            = NULL,
2365         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2366         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2367         .read_nvram             = qla24xx_read_nvram_data,
2368         .write_nvram            = qla24xx_write_nvram_data,
2369         .fw_dump                = qla82xx_fw_dump,
2370         .beacon_on              = qla82xx_beacon_on,
2371         .beacon_off             = qla82xx_beacon_off,
2372         .beacon_blink           = NULL,
2373         .read_optrom            = qla82xx_read_optrom_data,
2374         .write_optrom           = qla82xx_write_optrom_data,
2375         .get_flash_version      = qla82xx_get_flash_version,
2376         .start_scsi             = qla82xx_start_scsi,
2377         .start_scsi_mq          = NULL,
2378         .abort_isp              = qla82xx_abort_isp,
2379         .iospace_config         = qla82xx_iospace_config,
2380         .initialize_adapter     = qla2x00_initialize_adapter,
2381 };
2382
2383 static struct isp_operations qla8044_isp_ops = {
2384         .pci_config             = qla82xx_pci_config,
2385         .reset_chip             = qla82xx_reset_chip,
2386         .chip_diag              = qla24xx_chip_diag,
2387         .config_rings           = qla82xx_config_rings,
2388         .reset_adapter          = qla24xx_reset_adapter,
2389         .nvram_config           = qla81xx_nvram_config,
2390         .update_fw_options      = qla24xx_update_fw_options,
2391         .load_risc              = qla82xx_load_risc,
2392         .pci_info_str           = qla24xx_pci_info_str,
2393         .fw_version_str         = qla24xx_fw_version_str,
2394         .intr_handler           = qla8044_intr_handler,
2395         .enable_intrs           = qla82xx_enable_intrs,
2396         .disable_intrs          = qla82xx_disable_intrs,
2397         .abort_command          = qla24xx_abort_command,
2398         .target_reset           = qla24xx_abort_target,
2399         .lun_reset              = qla24xx_lun_reset,
2400         .fabric_login           = qla24xx_login_fabric,
2401         .fabric_logout          = qla24xx_fabric_logout,
2402         .calc_req_entries       = NULL,
2403         .build_iocbs            = NULL,
2404         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2405         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2406         .read_nvram             = NULL,
2407         .write_nvram            = NULL,
2408         .fw_dump                = qla8044_fw_dump,
2409         .beacon_on              = qla82xx_beacon_on,
2410         .beacon_off             = qla82xx_beacon_off,
2411         .beacon_blink           = NULL,
2412         .read_optrom            = qla8044_read_optrom_data,
2413         .write_optrom           = qla8044_write_optrom_data,
2414         .get_flash_version      = qla82xx_get_flash_version,
2415         .start_scsi             = qla82xx_start_scsi,
2416         .start_scsi_mq          = NULL,
2417         .abort_isp              = qla8044_abort_isp,
2418         .iospace_config         = qla82xx_iospace_config,
2419         .initialize_adapter     = qla2x00_initialize_adapter,
2420 };
2421
2422 static struct isp_operations qla83xx_isp_ops = {
2423         .pci_config             = qla25xx_pci_config,
2424         .reset_chip             = qla24xx_reset_chip,
2425         .chip_diag              = qla24xx_chip_diag,
2426         .config_rings           = qla24xx_config_rings,
2427         .reset_adapter          = qla24xx_reset_adapter,
2428         .nvram_config           = qla81xx_nvram_config,
2429         .update_fw_options      = qla24xx_update_fw_options,
2430         .load_risc              = qla81xx_load_risc,
2431         .pci_info_str           = qla24xx_pci_info_str,
2432         .fw_version_str         = qla24xx_fw_version_str,
2433         .intr_handler           = qla24xx_intr_handler,
2434         .enable_intrs           = qla24xx_enable_intrs,
2435         .disable_intrs          = qla24xx_disable_intrs,
2436         .abort_command          = qla24xx_abort_command,
2437         .target_reset           = qla24xx_abort_target,
2438         .lun_reset              = qla24xx_lun_reset,
2439         .fabric_login           = qla24xx_login_fabric,
2440         .fabric_logout          = qla24xx_fabric_logout,
2441         .calc_req_entries       = NULL,
2442         .build_iocbs            = NULL,
2443         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2444         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2445         .read_nvram             = NULL,
2446         .write_nvram            = NULL,
2447         .fw_dump                = qla83xx_fw_dump,
2448         .beacon_on              = qla24xx_beacon_on,
2449         .beacon_off             = qla24xx_beacon_off,
2450         .beacon_blink           = qla83xx_beacon_blink,
2451         .read_optrom            = qla25xx_read_optrom_data,
2452         .write_optrom           = qla24xx_write_optrom_data,
2453         .get_flash_version      = qla24xx_get_flash_version,
2454         .start_scsi             = qla24xx_dif_start_scsi,
2455         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2456         .abort_isp              = qla2x00_abort_isp,
2457         .iospace_config         = qla83xx_iospace_config,
2458         .initialize_adapter     = qla2x00_initialize_adapter,
2459 };
2460
2461 static struct isp_operations qlafx00_isp_ops = {
2462         .pci_config             = qlafx00_pci_config,
2463         .reset_chip             = qlafx00_soft_reset,
2464         .chip_diag              = qlafx00_chip_diag,
2465         .config_rings           = qlafx00_config_rings,
2466         .reset_adapter          = qlafx00_soft_reset,
2467         .nvram_config           = NULL,
2468         .update_fw_options      = NULL,
2469         .load_risc              = NULL,
2470         .pci_info_str           = qlafx00_pci_info_str,
2471         .fw_version_str         = qlafx00_fw_version_str,
2472         .intr_handler           = qlafx00_intr_handler,
2473         .enable_intrs           = qlafx00_enable_intrs,
2474         .disable_intrs          = qlafx00_disable_intrs,
2475         .abort_command          = qla24xx_async_abort_command,
2476         .target_reset           = qlafx00_abort_target,
2477         .lun_reset              = qlafx00_lun_reset,
2478         .fabric_login           = NULL,
2479         .fabric_logout          = NULL,
2480         .calc_req_entries       = NULL,
2481         .build_iocbs            = NULL,
2482         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2483         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2484         .read_nvram             = qla24xx_read_nvram_data,
2485         .write_nvram            = qla24xx_write_nvram_data,
2486         .fw_dump                = NULL,
2487         .beacon_on              = qla24xx_beacon_on,
2488         .beacon_off             = qla24xx_beacon_off,
2489         .beacon_blink           = NULL,
2490         .read_optrom            = qla24xx_read_optrom_data,
2491         .write_optrom           = qla24xx_write_optrom_data,
2492         .get_flash_version      = qla24xx_get_flash_version,
2493         .start_scsi             = qlafx00_start_scsi,
2494         .start_scsi_mq          = NULL,
2495         .abort_isp              = qlafx00_abort_isp,
2496         .iospace_config         = qlafx00_iospace_config,
2497         .initialize_adapter     = qlafx00_initialize_adapter,
2498 };
2499
2500 static struct isp_operations qla27xx_isp_ops = {
2501         .pci_config             = qla25xx_pci_config,
2502         .reset_chip             = qla24xx_reset_chip,
2503         .chip_diag              = qla24xx_chip_diag,
2504         .config_rings           = qla24xx_config_rings,
2505         .reset_adapter          = qla24xx_reset_adapter,
2506         .nvram_config           = qla81xx_nvram_config,
2507         .update_fw_options      = qla24xx_update_fw_options,
2508         .load_risc              = qla81xx_load_risc,
2509         .pci_info_str           = qla24xx_pci_info_str,
2510         .fw_version_str         = qla24xx_fw_version_str,
2511         .intr_handler           = qla24xx_intr_handler,
2512         .enable_intrs           = qla24xx_enable_intrs,
2513         .disable_intrs          = qla24xx_disable_intrs,
2514         .abort_command          = qla24xx_abort_command,
2515         .target_reset           = qla24xx_abort_target,
2516         .lun_reset              = qla24xx_lun_reset,
2517         .fabric_login           = qla24xx_login_fabric,
2518         .fabric_logout          = qla24xx_fabric_logout,
2519         .calc_req_entries       = NULL,
2520         .build_iocbs            = NULL,
2521         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2522         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2523         .read_nvram             = NULL,
2524         .write_nvram            = NULL,
2525         .fw_dump                = qla27xx_fwdump,
2526         .mpi_fw_dump            = qla27xx_mpi_fwdump,
2527         .beacon_on              = qla24xx_beacon_on,
2528         .beacon_off             = qla24xx_beacon_off,
2529         .beacon_blink           = qla83xx_beacon_blink,
2530         .read_optrom            = qla25xx_read_optrom_data,
2531         .write_optrom           = qla24xx_write_optrom_data,
2532         .get_flash_version      = qla24xx_get_flash_version,
2533         .start_scsi             = qla24xx_dif_start_scsi,
2534         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2535         .abort_isp              = qla2x00_abort_isp,
2536         .iospace_config         = qla83xx_iospace_config,
2537         .initialize_adapter     = qla2x00_initialize_adapter,
2538 };
2539
2540 static inline void
2541 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2542 {
2543         ha->device_type = DT_EXTENDED_IDS;
2544         switch (ha->pdev->device) {
2545         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2546                 ha->isp_type |= DT_ISP2100;
2547                 ha->device_type &= ~DT_EXTENDED_IDS;
2548                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2549                 break;
2550         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2551                 ha->isp_type |= DT_ISP2200;
2552                 ha->device_type &= ~DT_EXTENDED_IDS;
2553                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2554                 break;
2555         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2556                 ha->isp_type |= DT_ISP2300;
2557                 ha->device_type |= DT_ZIO_SUPPORTED;
2558                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2559                 break;
2560         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2561                 ha->isp_type |= DT_ISP2312;
2562                 ha->device_type |= DT_ZIO_SUPPORTED;
2563                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2564                 break;
2565         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2566                 ha->isp_type |= DT_ISP2322;
2567                 ha->device_type |= DT_ZIO_SUPPORTED;
2568                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2569                     ha->pdev->subsystem_device == 0x0170)
2570                         ha->device_type |= DT_OEM_001;
2571                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2572                 break;
2573         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2574                 ha->isp_type |= DT_ISP6312;
2575                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2576                 break;
2577         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2578                 ha->isp_type |= DT_ISP6322;
2579                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2580                 break;
2581         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2582                 ha->isp_type |= DT_ISP2422;
2583                 ha->device_type |= DT_ZIO_SUPPORTED;
2584                 ha->device_type |= DT_FWI2;
2585                 ha->device_type |= DT_IIDMA;
2586                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2587                 break;
2588         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2589                 ha->isp_type |= DT_ISP2432;
2590                 ha->device_type |= DT_ZIO_SUPPORTED;
2591                 ha->device_type |= DT_FWI2;
2592                 ha->device_type |= DT_IIDMA;
2593                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2594                 break;
2595         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2596                 ha->isp_type |= DT_ISP8432;
2597                 ha->device_type |= DT_ZIO_SUPPORTED;
2598                 ha->device_type |= DT_FWI2;
2599                 ha->device_type |= DT_IIDMA;
2600                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2601                 break;
2602         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2603                 ha->isp_type |= DT_ISP5422;
2604                 ha->device_type |= DT_FWI2;
2605                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2606                 break;
2607         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2608                 ha->isp_type |= DT_ISP5432;
2609                 ha->device_type |= DT_FWI2;
2610                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2611                 break;
2612         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2613                 ha->isp_type |= DT_ISP2532;
2614                 ha->device_type |= DT_ZIO_SUPPORTED;
2615                 ha->device_type |= DT_FWI2;
2616                 ha->device_type |= DT_IIDMA;
2617                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2618                 break;
2619         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2620                 ha->isp_type |= DT_ISP8001;
2621                 ha->device_type |= DT_ZIO_SUPPORTED;
2622                 ha->device_type |= DT_FWI2;
2623                 ha->device_type |= DT_IIDMA;
2624                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2625                 break;
2626         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2627                 ha->isp_type |= DT_ISP8021;
2628                 ha->device_type |= DT_ZIO_SUPPORTED;
2629                 ha->device_type |= DT_FWI2;
2630                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2631                 /* Initialize 82XX ISP flags */
2632                 qla82xx_init_flags(ha);
2633                 break;
2634          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2635                 ha->isp_type |= DT_ISP8044;
2636                 ha->device_type |= DT_ZIO_SUPPORTED;
2637                 ha->device_type |= DT_FWI2;
2638                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2639                 /* Initialize 82XX ISP flags */
2640                 qla82xx_init_flags(ha);
2641                 break;
2642         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2643                 ha->isp_type |= DT_ISP2031;
2644                 ha->device_type |= DT_ZIO_SUPPORTED;
2645                 ha->device_type |= DT_FWI2;
2646                 ha->device_type |= DT_IIDMA;
2647                 ha->device_type |= DT_T10_PI;
2648                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2649                 break;
2650         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2651                 ha->isp_type |= DT_ISP8031;
2652                 ha->device_type |= DT_ZIO_SUPPORTED;
2653                 ha->device_type |= DT_FWI2;
2654                 ha->device_type |= DT_IIDMA;
2655                 ha->device_type |= DT_T10_PI;
2656                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2657                 break;
2658         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2659                 ha->isp_type |= DT_ISPFX00;
2660                 break;
2661         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2662                 ha->isp_type |= DT_ISP2071;
2663                 ha->device_type |= DT_ZIO_SUPPORTED;
2664                 ha->device_type |= DT_FWI2;
2665                 ha->device_type |= DT_IIDMA;
2666                 ha->device_type |= DT_T10_PI;
2667                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2668                 break;
2669         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2670                 ha->isp_type |= DT_ISP2271;
2671                 ha->device_type |= DT_ZIO_SUPPORTED;
2672                 ha->device_type |= DT_FWI2;
2673                 ha->device_type |= DT_IIDMA;
2674                 ha->device_type |= DT_T10_PI;
2675                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2676                 break;
2677         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2678                 ha->isp_type |= DT_ISP2261;
2679                 ha->device_type |= DT_ZIO_SUPPORTED;
2680                 ha->device_type |= DT_FWI2;
2681                 ha->device_type |= DT_IIDMA;
2682                 ha->device_type |= DT_T10_PI;
2683                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2684                 break;
2685         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2686         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2687                 ha->isp_type |= DT_ISP2081;
2688                 ha->device_type |= DT_ZIO_SUPPORTED;
2689                 ha->device_type |= DT_FWI2;
2690                 ha->device_type |= DT_IIDMA;
2691                 ha->device_type |= DT_T10_PI;
2692                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2693                 break;
2694         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2695         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2696                 ha->isp_type |= DT_ISP2281;
2697                 ha->device_type |= DT_ZIO_SUPPORTED;
2698                 ha->device_type |= DT_FWI2;
2699                 ha->device_type |= DT_IIDMA;
2700                 ha->device_type |= DT_T10_PI;
2701                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2702                 break;
2703         }
2704
2705         if (IS_QLA82XX(ha))
2706                 ha->port_no = ha->portnum & 1;
2707         else {
2708                 /* Get adapter physical port no from interrupt pin register. */
2709                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2710                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2711                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2712                         ha->port_no--;
2713                 else
2714                         ha->port_no = !(ha->port_no & 1);
2715         }
2716
2717         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2718             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2719             ha->device_type, ha->port_no, ha->fw_srisc_address);
2720 }
2721
2722 static void
2723 qla2xxx_scan_start(struct Scsi_Host *shost)
2724 {
2725         scsi_qla_host_t *vha = shost_priv(shost);
2726
2727         if (vha->hw->flags.running_gold_fw)
2728                 return;
2729
2730         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2731         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2732         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2733         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2734 }
2735
2736 static int
2737 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2738 {
2739         scsi_qla_host_t *vha = shost_priv(shost);
2740
2741         if (test_bit(UNLOADING, &vha->dpc_flags))
2742                 return 1;
2743         if (!vha->host)
2744                 return 1;
2745         if (time > vha->hw->loop_reset_delay * HZ)
2746                 return 1;
2747
2748         return atomic_read(&vha->loop_state) == LOOP_READY;
2749 }
2750
2751 static void qla2x00_iocb_work_fn(struct work_struct *work)
2752 {
2753         struct scsi_qla_host *vha = container_of(work,
2754                 struct scsi_qla_host, iocb_work);
2755         struct qla_hw_data *ha = vha->hw;
2756         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2757         int i = 2;
2758         unsigned long flags;
2759
2760         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2761                 return;
2762
2763         while (!list_empty(&vha->work_list) && i > 0) {
2764                 qla2x00_do_work(vha);
2765                 i--;
2766         }
2767
2768         spin_lock_irqsave(&vha->work_lock, flags);
2769         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2770         spin_unlock_irqrestore(&vha->work_lock, flags);
2771 }
2772
2773 /*
2774  * PCI driver interface
2775  */
2776 static int
2777 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2778 {
2779         int     ret = -ENODEV;
2780         struct Scsi_Host *host;
2781         scsi_qla_host_t *base_vha = NULL;
2782         struct qla_hw_data *ha;
2783         char pci_info[30];
2784         char fw_str[30], wq_name[30];
2785         struct scsi_host_template *sht;
2786         int bars, mem_only = 0;
2787         uint16_t req_length = 0, rsp_length = 0;
2788         struct req_que *req = NULL;
2789         struct rsp_que *rsp = NULL;
2790         int i;
2791
2792         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2793         sht = &qla2xxx_driver_template;
2794         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2795             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2796             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2797             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2798             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2799             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2800             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2801             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2802             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2803             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2804             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2805             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2806             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2807             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2808             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2809             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2810             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2811             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2812             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2813                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2814                 mem_only = 1;
2815                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2816                     "Mem only adapter.\n");
2817         }
2818         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2819             "Bars=%d.\n", bars);
2820
2821         if (mem_only) {
2822                 if (pci_enable_device_mem(pdev))
2823                         return ret;
2824         } else {
2825                 if (pci_enable_device(pdev))
2826                         return ret;
2827         }
2828
2829         /* This may fail but that's ok */
2830         pci_enable_pcie_error_reporting(pdev);
2831
2832         /* Turn off T10-DIF when FC-NVMe is enabled */
2833         if (ql2xnvmeenable)
2834                 ql2xenabledif = 0;
2835
2836         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2837         if (!ha) {
2838                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2839                     "Unable to allocate memory for ha.\n");
2840                 goto disable_device;
2841         }
2842         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2843             "Memory allocated for ha=%p.\n", ha);
2844         ha->pdev = pdev;
2845         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2846         spin_lock_init(&ha->tgt.q_full_lock);
2847         spin_lock_init(&ha->tgt.sess_lock);
2848         spin_lock_init(&ha->tgt.atio_lock);
2849
2850         atomic_set(&ha->nvme_active_aen_cnt, 0);
2851
2852         /* Clear our data area */
2853         ha->bars = bars;
2854         ha->mem_only = mem_only;
2855         spin_lock_init(&ha->hardware_lock);
2856         spin_lock_init(&ha->vport_slock);
2857         mutex_init(&ha->selflogin_lock);
2858         mutex_init(&ha->optrom_mutex);
2859
2860         /* Set ISP-type information. */
2861         qla2x00_set_isp_flags(ha);
2862
2863         /* Set EEH reset type to fundamental if required by hba */
2864         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2865             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2866                 pdev->needs_freset = 1;
2867
2868         ha->prev_topology = 0;
2869         ha->init_cb_size = sizeof(init_cb_t);
2870         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2871         ha->optrom_size = OPTROM_SIZE_2300;
2872         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2873         atomic_set(&ha->num_pend_mbx_stage1, 0);
2874         atomic_set(&ha->num_pend_mbx_stage2, 0);
2875         atomic_set(&ha->num_pend_mbx_stage3, 0);
2876         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2877         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2878
2879         /* Assign ISP specific operations. */
2880         if (IS_QLA2100(ha)) {
2881                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2882                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2883                 req_length = REQUEST_ENTRY_CNT_2100;
2884                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2885                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2886                 ha->gid_list_info_size = 4;
2887                 ha->flash_conf_off = ~0;
2888                 ha->flash_data_off = ~0;
2889                 ha->nvram_conf_off = ~0;
2890                 ha->nvram_data_off = ~0;
2891                 ha->isp_ops = &qla2100_isp_ops;
2892         } else if (IS_QLA2200(ha)) {
2893                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2894                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2895                 req_length = REQUEST_ENTRY_CNT_2200;
2896                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2897                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2898                 ha->gid_list_info_size = 4;
2899                 ha->flash_conf_off = ~0;
2900                 ha->flash_data_off = ~0;
2901                 ha->nvram_conf_off = ~0;
2902                 ha->nvram_data_off = ~0;
2903                 ha->isp_ops = &qla2100_isp_ops;
2904         } else if (IS_QLA23XX(ha)) {
2905                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2906                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2907                 req_length = REQUEST_ENTRY_CNT_2200;
2908                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2909                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2910                 ha->gid_list_info_size = 6;
2911                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2912                         ha->optrom_size = OPTROM_SIZE_2322;
2913                 ha->flash_conf_off = ~0;
2914                 ha->flash_data_off = ~0;
2915                 ha->nvram_conf_off = ~0;
2916                 ha->nvram_data_off = ~0;
2917                 ha->isp_ops = &qla2300_isp_ops;
2918         } else if (IS_QLA24XX_TYPE(ha)) {
2919                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2920                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2921                 req_length = REQUEST_ENTRY_CNT_24XX;
2922                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2923                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2924                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2925                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2926                 ha->gid_list_info_size = 8;
2927                 ha->optrom_size = OPTROM_SIZE_24XX;
2928                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2929                 ha->isp_ops = &qla24xx_isp_ops;
2930                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2931                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2932                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2933                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2934         } else if (IS_QLA25XX(ha)) {
2935                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2936                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2937                 req_length = REQUEST_ENTRY_CNT_24XX;
2938                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2939                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2940                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2941                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2942                 ha->gid_list_info_size = 8;
2943                 ha->optrom_size = OPTROM_SIZE_25XX;
2944                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2945                 ha->isp_ops = &qla25xx_isp_ops;
2946                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2947                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2948                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2949                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2950         } else if (IS_QLA81XX(ha)) {
2951                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2952                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2953                 req_length = REQUEST_ENTRY_CNT_24XX;
2954                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2955                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2956                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2957                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2958                 ha->gid_list_info_size = 8;
2959                 ha->optrom_size = OPTROM_SIZE_81XX;
2960                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2961                 ha->isp_ops = &qla81xx_isp_ops;
2962                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2963                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2964                 ha->nvram_conf_off = ~0;
2965                 ha->nvram_data_off = ~0;
2966         } else if (IS_QLA82XX(ha)) {
2967                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2968                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2969                 req_length = REQUEST_ENTRY_CNT_82XX;
2970                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2971                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2972                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2973                 ha->gid_list_info_size = 8;
2974                 ha->optrom_size = OPTROM_SIZE_82XX;
2975                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2976                 ha->isp_ops = &qla82xx_isp_ops;
2977                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2978                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2979                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2980                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2981         } else if (IS_QLA8044(ha)) {
2982                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2983                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2984                 req_length = REQUEST_ENTRY_CNT_82XX;
2985                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2986                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2987                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2988                 ha->gid_list_info_size = 8;
2989                 ha->optrom_size = OPTROM_SIZE_83XX;
2990                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2991                 ha->isp_ops = &qla8044_isp_ops;
2992                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2993                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2994                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2995                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2996         } else if (IS_QLA83XX(ha)) {
2997                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2998                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2999                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3000                 req_length = REQUEST_ENTRY_CNT_83XX;
3001                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3002                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3003                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3004                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3005                 ha->gid_list_info_size = 8;
3006                 ha->optrom_size = OPTROM_SIZE_83XX;
3007                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3008                 ha->isp_ops = &qla83xx_isp_ops;
3009                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3010                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3011                 ha->nvram_conf_off = ~0;
3012                 ha->nvram_data_off = ~0;
3013         }  else if (IS_QLAFX00(ha)) {
3014                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3015                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3016                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3017                 req_length = REQUEST_ENTRY_CNT_FX00;
3018                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3019                 ha->isp_ops = &qlafx00_isp_ops;
3020                 ha->port_down_retry_count = 30; /* default value */
3021                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3022                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3023                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3024                 ha->mr.fw_hbt_en = 1;
3025                 ha->mr.host_info_resend = false;
3026                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3027         } else if (IS_QLA27XX(ha)) {
3028                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3029                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3030                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3031                 req_length = REQUEST_ENTRY_CNT_83XX;
3032                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3033                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3034                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3035                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3036                 ha->gid_list_info_size = 8;
3037                 ha->optrom_size = OPTROM_SIZE_83XX;
3038                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3039                 ha->isp_ops = &qla27xx_isp_ops;
3040                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3041                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3042                 ha->nvram_conf_off = ~0;
3043                 ha->nvram_data_off = ~0;
3044         } else if (IS_QLA28XX(ha)) {
3045                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3046                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3047                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3048                 req_length = REQUEST_ENTRY_CNT_24XX;
3049                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3050                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3051                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3052                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3053                 ha->gid_list_info_size = 8;
3054                 ha->optrom_size = OPTROM_SIZE_28XX;
3055                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3056                 ha->isp_ops = &qla27xx_isp_ops;
3057                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3058                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3059                 ha->nvram_conf_off = ~0;
3060                 ha->nvram_data_off = ~0;
3061         }
3062
3063         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3064             "mbx_count=%d, req_length=%d, "
3065             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3066             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3067             "max_fibre_devices=%d.\n",
3068             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3069             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3070             ha->nvram_npiv_size, ha->max_fibre_devices);
3071         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3072             "isp_ops=%p, flash_conf_off=%d, "
3073             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3074             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3075             ha->nvram_conf_off, ha->nvram_data_off);
3076
3077         /* Configure PCI I/O space */
3078         ret = ha->isp_ops->iospace_config(ha);
3079         if (ret)
3080                 goto iospace_config_failed;
3081
3082         ql_log_pci(ql_log_info, pdev, 0x001d,
3083             "Found an ISP%04X irq %d iobase 0x%p.\n",
3084             pdev->device, pdev->irq, ha->iobase);
3085         mutex_init(&ha->vport_lock);
3086         mutex_init(&ha->mq_lock);
3087         init_completion(&ha->mbx_cmd_comp);
3088         complete(&ha->mbx_cmd_comp);
3089         init_completion(&ha->mbx_intr_comp);
3090         init_completion(&ha->dcbx_comp);
3091         init_completion(&ha->lb_portup_comp);
3092
3093         set_bit(0, (unsigned long *) ha->vp_idx_map);
3094
3095         qla2x00_config_dma_addressing(ha);
3096         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3097             "64 Bit addressing is %s.\n",
3098             ha->flags.enable_64bit_addressing ? "enable" :
3099             "disable");
3100         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3101         if (ret) {
3102                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3103                     "Failed to allocate memory for adapter, aborting.\n");
3104
3105                 goto probe_hw_failed;
3106         }
3107
3108         req->max_q_depth = MAX_Q_DEPTH;
3109         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3110                 req->max_q_depth = ql2xmaxqdepth;
3111
3112
3113         base_vha = qla2x00_create_host(sht, ha);
3114         if (!base_vha) {
3115                 ret = -ENOMEM;
3116                 goto probe_hw_failed;
3117         }
3118
3119         pci_set_drvdata(pdev, base_vha);
3120         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3121
3122         host = base_vha->host;
3123         base_vha->req = req;
3124         if (IS_QLA2XXX_MIDTYPE(ha))
3125                 base_vha->mgmt_svr_loop_id =
3126                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3127         else
3128                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3129                                                 base_vha->vp_idx;
3130
3131         /* Setup fcport template structure. */
3132         ha->mr.fcport.vha = base_vha;
3133         ha->mr.fcport.port_type = FCT_UNKNOWN;
3134         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3135         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3136         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3137         ha->mr.fcport.scan_state = 1;
3138
3139         /* Set the SG table size based on ISP type */
3140         if (!IS_FWI2_CAPABLE(ha)) {
3141                 if (IS_QLA2100(ha))
3142                         host->sg_tablesize = 32;
3143         } else {
3144                 if (!IS_QLA82XX(ha))
3145                         host->sg_tablesize = QLA_SG_ALL;
3146         }
3147         host->max_id = ha->max_fibre_devices;
3148         host->cmd_per_lun = 3;
3149         host->unique_id = host->host_no;
3150         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3151                 host->max_cmd_len = 32;
3152         else
3153                 host->max_cmd_len = MAX_CMDSZ;
3154         host->max_channel = MAX_BUSES - 1;
3155         /* Older HBAs support only 16-bit LUNs */
3156         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3157             ql2xmaxlun > 0xffff)
3158                 host->max_lun = 0xffff;
3159         else
3160                 host->max_lun = ql2xmaxlun;
3161         host->transportt = qla2xxx_transport_template;
3162         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3163
3164         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3165             "max_id=%d this_id=%d "
3166             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3167             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3168             host->this_id, host->cmd_per_lun, host->unique_id,
3169             host->max_cmd_len, host->max_channel, host->max_lun,
3170             host->transportt, sht->vendor_id);
3171
3172         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3173
3174         /* Set up the irqs */
3175         ret = qla2x00_request_irqs(ha, rsp);
3176         if (ret)
3177                 goto probe_failed;
3178
3179         /* Alloc arrays of request and response ring ptrs */
3180         ret = qla2x00_alloc_queues(ha, req, rsp);
3181         if (ret) {
3182                 ql_log(ql_log_fatal, base_vha, 0x003d,
3183                     "Failed to allocate memory for queue pointers..."
3184                     "aborting.\n");
3185                 ret = -ENODEV;
3186                 goto probe_failed;
3187         }
3188
3189         if (ha->mqenable) {
3190                 /* number of hardware queues supported by blk/scsi-mq*/
3191                 host->nr_hw_queues = ha->max_qpairs;
3192
3193                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3194                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3195         } else {
3196                 if (ql2xnvmeenable) {
3197                         host->nr_hw_queues = ha->max_qpairs;
3198                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3199                             "FC-NVMe support is enabled, HW queues=%d\n",
3200                             host->nr_hw_queues);
3201                 } else {
3202                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3203                             "blk/scsi-mq disabled.\n");
3204                 }
3205         }
3206
3207         qlt_probe_one_stage1(base_vha, ha);
3208
3209         pci_save_state(pdev);
3210
3211         /* Assign back pointers */
3212         rsp->req = req;
3213         req->rsp = rsp;
3214
3215         if (IS_QLAFX00(ha)) {
3216                 ha->rsp_q_map[0] = rsp;
3217                 ha->req_q_map[0] = req;
3218                 set_bit(0, ha->req_qid_map);
3219                 set_bit(0, ha->rsp_qid_map);
3220         }
3221
3222         /* FWI2-capable only. */
3223         req->req_q_in = &ha->iobase->isp24.req_q_in;
3224         req->req_q_out = &ha->iobase->isp24.req_q_out;
3225         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3226         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3227         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3228             IS_QLA28XX(ha)) {
3229                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3230                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3231                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3232                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3233         }
3234
3235         if (IS_QLAFX00(ha)) {
3236                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3237                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3238                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3239                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3240         }
3241
3242         if (IS_P3P_TYPE(ha)) {
3243                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3244                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3245                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3246         }
3247
3248         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3249             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3250             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3251         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3252             "req->req_q_in=%p req->req_q_out=%p "
3253             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3254             req->req_q_in, req->req_q_out,
3255             rsp->rsp_q_in, rsp->rsp_q_out);
3256         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3257             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3258             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3259         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3260             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3261             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3262
3263         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3264         if (unlikely(!ha->wq)) {
3265                 ret = -ENOMEM;
3266                 goto probe_failed;
3267         }
3268
3269         if (ha->isp_ops->initialize_adapter(base_vha)) {
3270                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3271                     "Failed to initialize adapter - Adapter flags %x.\n",
3272                     base_vha->device_flags);
3273
3274                 if (IS_QLA82XX(ha)) {
3275                         qla82xx_idc_lock(ha);
3276                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3277                                 QLA8XXX_DEV_FAILED);
3278                         qla82xx_idc_unlock(ha);
3279                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3280                             "HW State: FAILED.\n");
3281                 } else if (IS_QLA8044(ha)) {
3282                         qla8044_idc_lock(ha);
3283                         qla8044_wr_direct(base_vha,
3284                                 QLA8044_CRB_DEV_STATE_INDEX,
3285                                 QLA8XXX_DEV_FAILED);
3286                         qla8044_idc_unlock(ha);
3287                         ql_log(ql_log_fatal, base_vha, 0x0150,
3288                             "HW State: FAILED.\n");
3289                 }
3290
3291                 ret = -ENODEV;
3292                 goto probe_failed;
3293         }
3294
3295         if (IS_QLAFX00(ha))
3296                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3297         else
3298                 host->can_queue = req->num_outstanding_cmds - 10;
3299
3300         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3301             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3302             host->can_queue, base_vha->req,
3303             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3304
3305         if (ha->mqenable) {
3306                 bool startit = false;
3307
3308                 if (QLA_TGT_MODE_ENABLED())
3309                         startit = false;
3310
3311                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3312                         startit = true;
3313
3314                 /* Create start of day qpairs for Block MQ */
3315                 for (i = 0; i < ha->max_qpairs; i++)
3316                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3317         }
3318
3319         if (ha->flags.running_gold_fw)
3320                 goto skip_dpc;
3321
3322         /*
3323          * Startup the kernel thread for this host adapter
3324          */
3325         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3326             "%s_dpc", base_vha->host_str);
3327         if (IS_ERR(ha->dpc_thread)) {
3328                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3329                     "Failed to start DPC thread.\n");
3330                 ret = PTR_ERR(ha->dpc_thread);
3331                 ha->dpc_thread = NULL;
3332                 goto probe_failed;
3333         }
3334         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3335             "DPC thread started successfully.\n");
3336
3337         /*
3338          * If we're not coming up in initiator mode, we might sit for
3339          * a while without waking up the dpc thread, which leads to a
3340          * stuck process warning.  So just kick the dpc once here and
3341          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3342          */
3343         qla2xxx_wake_dpc(base_vha);
3344
3345         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3346
3347         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3348                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3349                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3350                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3351
3352                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3353                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3354                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3355                 INIT_WORK(&ha->idc_state_handler,
3356                     qla83xx_idc_state_handler_work);
3357                 INIT_WORK(&ha->nic_core_unrecoverable,
3358                     qla83xx_nic_core_unrecoverable_work);
3359         }
3360
3361 skip_dpc:
3362         list_add_tail(&base_vha->list, &ha->vp_list);
3363         base_vha->host->irq = ha->pdev->irq;
3364
3365         /* Initialized the timer */
3366         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3367         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3368             "Started qla2x00_timer with "
3369             "interval=%d.\n", WATCH_INTERVAL);
3370         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3371             "Detected hba at address=%p.\n",
3372             ha);
3373
3374         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3375                 if (ha->fw_attributes & BIT_4) {
3376                         int prot = 0, guard;
3377
3378                         base_vha->flags.difdix_supported = 1;
3379                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3380                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3381                         if (ql2xenabledif == 1)
3382                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3383                         if (ql2xprotmask)
3384                                 scsi_host_set_prot(host, ql2xprotmask);
3385                         else
3386                                 scsi_host_set_prot(host,
3387                                     prot | SHOST_DIF_TYPE1_PROTECTION
3388                                     | SHOST_DIF_TYPE2_PROTECTION
3389                                     | SHOST_DIF_TYPE3_PROTECTION
3390                                     | SHOST_DIX_TYPE1_PROTECTION
3391                                     | SHOST_DIX_TYPE2_PROTECTION
3392                                     | SHOST_DIX_TYPE3_PROTECTION);
3393
3394                         guard = SHOST_DIX_GUARD_CRC;
3395
3396                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3397                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3398                                 guard |= SHOST_DIX_GUARD_IP;
3399
3400                         if (ql2xprotguard)
3401                                 scsi_host_set_guard(host, ql2xprotguard);
3402                         else
3403                                 scsi_host_set_guard(host, guard);
3404                 } else
3405                         base_vha->flags.difdix_supported = 0;
3406         }
3407
3408         ha->isp_ops->enable_intrs(ha);
3409
3410         if (IS_QLAFX00(ha)) {
3411                 ret = qlafx00_fx_disc(base_vha,
3412                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3413                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3414                     QLA_SG_ALL : 128;
3415         }
3416
3417         ret = scsi_add_host(host, &pdev->dev);
3418         if (ret)
3419                 goto probe_failed;
3420
3421         base_vha->flags.init_done = 1;
3422         base_vha->flags.online = 1;
3423         ha->prev_minidump_failed = 0;
3424
3425         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3426             "Init done and hba is online.\n");
3427
3428         if (qla_ini_mode_enabled(base_vha) ||
3429                 qla_dual_mode_enabled(base_vha))
3430                 scsi_scan_host(host);
3431         else
3432                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3433                         "skipping scsi_scan_host() for non-initiator port\n");
3434
3435         qla2x00_alloc_sysfs_attr(base_vha);
3436
3437         if (IS_QLAFX00(ha)) {
3438                 ret = qlafx00_fx_disc(base_vha,
3439                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3440
3441                 /* Register system information */
3442                 ret =  qlafx00_fx_disc(base_vha,
3443                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3444         }
3445
3446         qla2x00_init_host_attr(base_vha);
3447
3448         qla2x00_dfs_setup(base_vha);
3449
3450         ql_log(ql_log_info, base_vha, 0x00fb,
3451             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3452         ql_log(ql_log_info, base_vha, 0x00fc,
3453             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3454             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3455                                                        sizeof(pci_info)),
3456             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3457             base_vha->host_no,
3458             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3459
3460         qlt_add_target(ha, base_vha);
3461
3462         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3463
3464         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3465                 return -ENODEV;
3466
3467         return 0;
3468
3469 probe_failed:
3470         if (base_vha->gnl.l) {
3471                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3472                                 base_vha->gnl.l, base_vha->gnl.ldma);
3473                 base_vha->gnl.l = NULL;
3474         }
3475
3476         if (base_vha->timer_active)
3477                 qla2x00_stop_timer(base_vha);
3478         base_vha->flags.online = 0;
3479         if (ha->dpc_thread) {
3480                 struct task_struct *t = ha->dpc_thread;
3481
3482                 ha->dpc_thread = NULL;
3483                 kthread_stop(t);
3484         }
3485
3486         qla2x00_free_device(base_vha);
3487         scsi_host_put(base_vha->host);
3488         /*
3489          * Need to NULL out local req/rsp after
3490          * qla2x00_free_device => qla2x00_free_queues frees
3491          * what these are pointing to. Or else we'll
3492          * fall over below in qla2x00_free_req/rsp_que.
3493          */
3494         req = NULL;
3495         rsp = NULL;
3496
3497 probe_hw_failed:
3498         qla2x00_mem_free(ha);
3499         qla2x00_free_req_que(ha, req);
3500         qla2x00_free_rsp_que(ha, rsp);
3501         qla2x00_clear_drv_active(ha);
3502
3503 iospace_config_failed:
3504         if (IS_P3P_TYPE(ha)) {
3505                 if (!ha->nx_pcibase)
3506                         iounmap((device_reg_t *)ha->nx_pcibase);
3507                 if (!ql2xdbwr)
3508                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3509         } else {
3510                 if (ha->iobase)
3511                         iounmap(ha->iobase);
3512                 if (ha->cregbase)
3513                         iounmap(ha->cregbase);
3514         }
3515         pci_release_selected_regions(ha->pdev, ha->bars);
3516         kfree(ha);
3517
3518 disable_device:
3519         pci_disable_device(pdev);
3520         return ret;
3521 }
3522
3523 static void __qla_set_remove_flag(scsi_qla_host_t *base_vha)
3524 {
3525         scsi_qla_host_t *vp;
3526         unsigned long flags;
3527         struct qla_hw_data *ha;
3528
3529         if (!base_vha)
3530                 return;
3531
3532         ha = base_vha->hw;
3533
3534         spin_lock_irqsave(&ha->vport_slock, flags);
3535         list_for_each_entry(vp, &ha->vp_list, list)
3536                 set_bit(PFLG_DRIVER_REMOVING, &vp->pci_flags);
3537
3538         /*
3539          * Indicate device removal to prevent future board_disable
3540          * and wait until any pending board_disable has completed.
3541          */
3542         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3543         spin_unlock_irqrestore(&ha->vport_slock, flags);
3544 }
3545
3546 static void
3547 qla2x00_shutdown(struct pci_dev *pdev)
3548 {
3549         scsi_qla_host_t *vha;
3550         struct qla_hw_data  *ha;
3551
3552         vha = pci_get_drvdata(pdev);
3553         ha = vha->hw;
3554
3555         ql_log(ql_log_info, vha, 0xfffa,
3556                 "Adapter shutdown\n");
3557
3558         /*
3559          * Prevent future board_disable and wait
3560          * until any pending board_disable has completed.
3561          */
3562         __qla_set_remove_flag(vha);
3563         cancel_work_sync(&ha->board_disable);
3564
3565         if (!atomic_read(&pdev->enable_cnt))
3566                 return;
3567
3568         /* Notify ISPFX00 firmware */
3569         if (IS_QLAFX00(ha))
3570                 qlafx00_driver_shutdown(vha, 20);
3571
3572         /* Turn-off FCE trace */
3573         if (ha->flags.fce_enabled) {
3574                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3575                 ha->flags.fce_enabled = 0;
3576         }
3577
3578         /* Turn-off EFT trace */
3579         if (ha->eft)
3580                 qla2x00_disable_eft_trace(vha);
3581
3582         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3583             IS_QLA28XX(ha)) {
3584                 if (ha->flags.fw_started)
3585                         qla2x00_abort_isp_cleanup(vha);
3586         } else {
3587                 /* Stop currently executing firmware. */
3588                 qla2x00_try_to_stop_firmware(vha);
3589         }
3590
3591         /* Disable timer */
3592         if (vha->timer_active)
3593                 qla2x00_stop_timer(vha);
3594
3595         /* Turn adapter off line */
3596         vha->flags.online = 0;
3597
3598         /* turn-off interrupts on the card */
3599         if (ha->interrupts_on) {
3600                 vha->flags.init_done = 0;
3601                 ha->isp_ops->disable_intrs(ha);
3602         }
3603
3604         qla2x00_free_irqs(vha);
3605
3606         qla2x00_free_fw_dump(ha);
3607
3608         pci_disable_device(pdev);
3609         ql_log(ql_log_info, vha, 0xfffe,
3610                 "Adapter shutdown successfully.\n");
3611 }
3612
3613 /* Deletes all the virtual ports for a given ha */
3614 static void
3615 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3616 {
3617         scsi_qla_host_t *vha;
3618         unsigned long flags;
3619
3620         mutex_lock(&ha->vport_lock);
3621         while (ha->cur_vport_count) {
3622                 spin_lock_irqsave(&ha->vport_slock, flags);
3623
3624                 BUG_ON(base_vha->list.next == &ha->vp_list);
3625                 /* This assumes first entry in ha->vp_list is always base vha */
3626                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3627                 scsi_host_get(vha->host);
3628
3629                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3630                 mutex_unlock(&ha->vport_lock);
3631
3632                 qla_nvme_delete(vha);
3633
3634                 fc_vport_terminate(vha->fc_vport);
3635                 scsi_host_put(vha->host);
3636
3637                 mutex_lock(&ha->vport_lock);
3638         }
3639         mutex_unlock(&ha->vport_lock);
3640 }
3641
3642 /* Stops all deferred work threads */
3643 static void
3644 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3645 {
3646         /* Cancel all work and destroy DPC workqueues */
3647         if (ha->dpc_lp_wq) {
3648                 cancel_work_sync(&ha->idc_aen);
3649                 destroy_workqueue(ha->dpc_lp_wq);
3650                 ha->dpc_lp_wq = NULL;
3651         }
3652
3653         if (ha->dpc_hp_wq) {
3654                 cancel_work_sync(&ha->nic_core_reset);
3655                 cancel_work_sync(&ha->idc_state_handler);
3656                 cancel_work_sync(&ha->nic_core_unrecoverable);
3657                 destroy_workqueue(ha->dpc_hp_wq);
3658                 ha->dpc_hp_wq = NULL;
3659         }
3660
3661         /* Kill the kernel thread for this host */
3662         if (ha->dpc_thread) {
3663                 struct task_struct *t = ha->dpc_thread;
3664
3665                 /*
3666                  * qla2xxx_wake_dpc checks for ->dpc_thread
3667                  * so we need to zero it out.
3668                  */
3669                 ha->dpc_thread = NULL;
3670                 kthread_stop(t);
3671         }
3672 }
3673
3674 static void
3675 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3676 {
3677         if (IS_QLA82XX(ha)) {
3678
3679                 iounmap((device_reg_t *)ha->nx_pcibase);
3680                 if (!ql2xdbwr)
3681                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3682         } else {
3683                 if (ha->iobase)
3684                         iounmap(ha->iobase);
3685
3686                 if (ha->cregbase)
3687                         iounmap(ha->cregbase);
3688
3689                 if (ha->mqiobase)
3690                         iounmap(ha->mqiobase);
3691
3692                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
3693                     ha->msixbase)
3694                         iounmap(ha->msixbase);
3695         }
3696 }
3697
3698 static void
3699 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3700 {
3701         if (IS_QLA8044(ha)) {
3702                 qla8044_idc_lock(ha);
3703                 qla8044_clear_drv_active(ha);
3704                 qla8044_idc_unlock(ha);
3705         } else if (IS_QLA82XX(ha)) {
3706                 qla82xx_idc_lock(ha);
3707                 qla82xx_clear_drv_active(ha);
3708                 qla82xx_idc_unlock(ha);
3709         }
3710 }
3711
3712 static void
3713 qla2x00_remove_one(struct pci_dev *pdev)
3714 {
3715         scsi_qla_host_t *base_vha;
3716         struct qla_hw_data  *ha;
3717
3718         base_vha = pci_get_drvdata(pdev);
3719         ha = base_vha->hw;
3720         ql_log(ql_log_info, base_vha, 0xb079,
3721             "Removing driver\n");
3722         __qla_set_remove_flag(base_vha);
3723         cancel_work_sync(&ha->board_disable);
3724
3725         /*
3726          * If the PCI device is disabled then there was a PCI-disconnect and
3727          * qla2x00_disable_board_on_pci_error has taken care of most of the
3728          * resources.
3729          */
3730         if (!atomic_read(&pdev->enable_cnt)) {
3731                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3732                     base_vha->gnl.l, base_vha->gnl.ldma);
3733                 base_vha->gnl.l = NULL;
3734                 scsi_host_put(base_vha->host);
3735                 kfree(ha);
3736                 pci_set_drvdata(pdev, NULL);
3737                 return;
3738         }
3739         qla2x00_wait_for_hba_ready(base_vha);
3740
3741         /*
3742          * if UNLOADING flag is already set, then continue unload,
3743          * where it was set first.
3744          */
3745         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3746                 return;
3747
3748         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3749             IS_QLA28XX(ha)) {
3750                 if (ha->flags.fw_started)
3751                         qla2x00_abort_isp_cleanup(base_vha);
3752         } else if (!IS_QLAFX00(ha)) {
3753                 if (IS_QLA8031(ha)) {
3754                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3755                             "Clearing fcoe driver presence.\n");
3756                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3757                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3758                                     "Error while clearing DRV-Presence.\n");
3759                 }
3760
3761                 qla2x00_try_to_stop_firmware(base_vha);
3762         }
3763
3764         qla2x00_wait_for_sess_deletion(base_vha);
3765
3766         qla_nvme_delete(base_vha);
3767
3768         dma_free_coherent(&ha->pdev->dev,
3769                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3770
3771         base_vha->gnl.l = NULL;
3772
3773         vfree(base_vha->scan.l);
3774
3775         if (IS_QLAFX00(ha))
3776                 qlafx00_driver_shutdown(base_vha, 20);
3777
3778         qla2x00_delete_all_vps(ha, base_vha);
3779
3780         qla2x00_dfs_remove(base_vha);
3781
3782         qla84xx_put_chip(base_vha);
3783
3784         /* Disable timer */
3785         if (base_vha->timer_active)
3786                 qla2x00_stop_timer(base_vha);
3787
3788         base_vha->flags.online = 0;
3789
3790         /* free DMA memory */
3791         if (ha->exlogin_buf)
3792                 qla2x00_free_exlogin_buffer(ha);
3793
3794         /* free DMA memory */
3795         if (ha->exchoffld_buf)
3796                 qla2x00_free_exchoffld_buffer(ha);
3797
3798         qla2x00_destroy_deferred_work(ha);
3799
3800         qlt_remove_target(ha, base_vha);
3801
3802         qla2x00_free_sysfs_attr(base_vha, true);
3803
3804         fc_remove_host(base_vha->host);
3805         qlt_remove_target_resources(ha);
3806
3807         scsi_remove_host(base_vha->host);
3808
3809         qla2x00_free_device(base_vha);
3810
3811         qla2x00_clear_drv_active(ha);
3812
3813         scsi_host_put(base_vha->host);
3814
3815         qla2x00_unmap_iobases(ha);
3816
3817         pci_release_selected_regions(ha->pdev, ha->bars);
3818         kfree(ha);
3819
3820         pci_disable_pcie_error_reporting(pdev);
3821
3822         pci_disable_device(pdev);
3823 }
3824
3825 static inline void
3826 qla24xx_free_purex_list(struct purex_list *list)
3827 {
3828         struct list_head *item, *next;
3829         ulong flags;
3830
3831         spin_lock_irqsave(&list->lock, flags);
3832         list_for_each_safe(item, next, &list->head) {
3833                 list_del(item);
3834                 kfree(list_entry(item, struct purex_item, list));
3835         }
3836         spin_unlock_irqrestore(&list->lock, flags);
3837 }
3838
3839 static void
3840 qla2x00_free_device(scsi_qla_host_t *vha)
3841 {
3842         struct qla_hw_data *ha = vha->hw;
3843
3844         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3845
3846         /* Disable timer */
3847         if (vha->timer_active)
3848                 qla2x00_stop_timer(vha);
3849
3850         qla25xx_delete_queues(vha);
3851         vha->flags.online = 0;
3852
3853         /* turn-off interrupts on the card */
3854         if (ha->interrupts_on) {
3855                 vha->flags.init_done = 0;
3856                 ha->isp_ops->disable_intrs(ha);
3857         }
3858
3859         qla2x00_free_fcports(vha);
3860
3861         qla2x00_free_irqs(vha);
3862
3863         /* Flush the work queue and remove it */
3864         if (ha->wq) {
3865                 flush_workqueue(ha->wq);
3866                 destroy_workqueue(ha->wq);
3867                 ha->wq = NULL;
3868         }
3869
3870
3871         qla24xx_free_purex_list(&vha->purex_list);
3872
3873         qla2x00_mem_free(ha);
3874
3875         qla82xx_md_free(vha);
3876
3877         qla2x00_free_queues(ha);
3878 }
3879
3880 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3881 {
3882         fc_port_t *fcport, *tfcport;
3883
3884         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3885                 qla2x00_free_fcport(fcport);
3886 }
3887
3888 static inline void
3889 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport)
3890 {
3891         int now;
3892
3893         if (!fcport->rport)
3894                 return;
3895
3896         if (fcport->rport) {
3897                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3898                     "%s %8phN. rport %p roles %x\n",
3899                     __func__, fcport->port_name, fcport->rport,
3900                     fcport->rport->roles);
3901                 fc_remote_port_delete(fcport->rport);
3902         }
3903         qlt_do_generation_tick(vha, &now);
3904 }
3905
3906 /*
3907  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3908  *
3909  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3910  *
3911  * Return: None.
3912  *
3913  * Context:
3914  */
3915 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3916     int do_login)
3917 {
3918         if (IS_QLAFX00(vha->hw)) {
3919                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3920                 qla2x00_schedule_rport_del(vha, fcport);
3921                 return;
3922         }
3923
3924         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3925             vha->vp_idx == fcport->vha->vp_idx) {
3926                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3927                 qla2x00_schedule_rport_del(vha, fcport);
3928         }
3929         /*
3930          * We may need to retry the login, so don't change the state of the
3931          * port but do the retries.
3932          */
3933         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3934                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3935
3936         if (!do_login)
3937                 return;
3938
3939         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3940 }
3941
3942 void
3943 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha)
3944 {
3945         fc_port_t *fcport;
3946
3947         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3948             "Mark all dev lost\n");
3949
3950         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3951                 fcport->scan_state = 0;
3952                 qlt_schedule_sess_for_deletion(fcport);
3953         }
3954 }
3955
3956 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
3957 {
3958         int i;
3959
3960         if (IS_FWI2_CAPABLE(ha))
3961                 return;
3962
3963         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
3964                 set_bit(i, ha->loop_id_map);
3965         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
3966         set_bit(BROADCAST, ha->loop_id_map);
3967 }
3968
3969 /*
3970 * qla2x00_mem_alloc
3971 *      Allocates adapter memory.
3972 *
3973 * Returns:
3974 *      0  = success.
3975 *      !0  = failure.
3976 */
3977 static int
3978 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3979         struct req_que **req, struct rsp_que **rsp)
3980 {
3981         char    name[16];
3982
3983         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3984                 &ha->init_cb_dma, GFP_KERNEL);
3985         if (!ha->init_cb)
3986                 goto fail;
3987
3988         if (qlt_mem_alloc(ha) < 0)
3989                 goto fail_free_init_cb;
3990
3991         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3992                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3993         if (!ha->gid_list)
3994                 goto fail_free_tgt_mem;
3995
3996         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3997         if (!ha->srb_mempool)
3998                 goto fail_free_gid_list;
3999
4000         if (IS_P3P_TYPE(ha)) {
4001                 /* Allocate cache for CT6 Ctx. */
4002                 if (!ctx_cachep) {
4003                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
4004                                 sizeof(struct ct6_dsd), 0,
4005                                 SLAB_HWCACHE_ALIGN, NULL);
4006                         if (!ctx_cachep)
4007                                 goto fail_free_srb_mempool;
4008                 }
4009                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
4010                         ctx_cachep);
4011                 if (!ha->ctx_mempool)
4012                         goto fail_free_srb_mempool;
4013                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
4014                     "ctx_cachep=%p ctx_mempool=%p.\n",
4015                     ctx_cachep, ha->ctx_mempool);
4016         }
4017
4018         /* Get memory for cached NVRAM */
4019         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
4020         if (!ha->nvram)
4021                 goto fail_free_ctx_mempool;
4022
4023         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
4024                 ha->pdev->device);
4025         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4026                 DMA_POOL_SIZE, 8, 0);
4027         if (!ha->s_dma_pool)
4028                 goto fail_free_nvram;
4029
4030         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4031             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4032             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4033
4034         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
4035                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4036                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4037                 if (!ha->dl_dma_pool) {
4038                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4039                             "Failed to allocate memory for dl_dma_pool.\n");
4040                         goto fail_s_dma_pool;
4041                 }
4042
4043                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4044                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4045                 if (!ha->fcp_cmnd_dma_pool) {
4046                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4047                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4048                         goto fail_dl_dma_pool;
4049                 }
4050
4051                 if (ql2xenabledif) {
4052                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4053                         struct dsd_dma *dsd, *nxt;
4054                         uint i;
4055                         /* Creata a DMA pool of buffers for DIF bundling */
4056                         ha->dif_bundl_pool = dma_pool_create(name,
4057                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4058                         if (!ha->dif_bundl_pool) {
4059                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4060                                     "%s: failed create dif_bundl_pool\n",
4061                                     __func__);
4062                                 goto fail_dif_bundl_dma_pool;
4063                         }
4064
4065                         INIT_LIST_HEAD(&ha->pool.good.head);
4066                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4067                         ha->pool.good.count = 0;
4068                         ha->pool.unusable.count = 0;
4069                         for (i = 0; i < 128; i++) {
4070                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4071                                 if (!dsd) {
4072                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4073                                             0xe0ee, "%s: failed alloc dsd\n",
4074                                             __func__);
4075                                         return 1;
4076                                 }
4077                                 ha->dif_bundle_kallocs++;
4078
4079                                 dsd->dsd_addr = dma_pool_alloc(
4080                                     ha->dif_bundl_pool, GFP_ATOMIC,
4081                                     &dsd->dsd_list_dma);
4082                                 if (!dsd->dsd_addr) {
4083                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4084                                             0xe0ee,
4085                                             "%s: failed alloc ->dsd_addr\n",
4086                                             __func__);
4087                                         kfree(dsd);
4088                                         ha->dif_bundle_kallocs--;
4089                                         continue;
4090                                 }
4091                                 ha->dif_bundle_dma_allocs++;
4092
4093                                 /*
4094                                  * if DMA buffer crosses 4G boundary,
4095                                  * put it on bad list
4096                                  */
4097                                 if (MSD(dsd->dsd_list_dma) ^
4098                                     MSD(dsd->dsd_list_dma + bufsize)) {
4099                                         list_add_tail(&dsd->list,
4100                                             &ha->pool.unusable.head);
4101                                         ha->pool.unusable.count++;
4102                                 } else {
4103                                         list_add_tail(&dsd->list,
4104                                             &ha->pool.good.head);
4105                                         ha->pool.good.count++;
4106                                 }
4107                         }
4108
4109                         /* return the good ones back to the pool */
4110                         list_for_each_entry_safe(dsd, nxt,
4111                             &ha->pool.good.head, list) {
4112                                 list_del(&dsd->list);
4113                                 dma_pool_free(ha->dif_bundl_pool,
4114                                     dsd->dsd_addr, dsd->dsd_list_dma);
4115                                 ha->dif_bundle_dma_allocs--;
4116                                 kfree(dsd);
4117                                 ha->dif_bundle_kallocs--;
4118                         }
4119
4120                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4121                             "%s: dif dma pool (good=%u unusable=%u)\n",
4122                             __func__, ha->pool.good.count,
4123                             ha->pool.unusable.count);
4124                 }
4125
4126                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4127                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4128                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4129                     ha->dif_bundl_pool);
4130         }
4131
4132         /* Allocate memory for SNS commands */
4133         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4134         /* Get consistent memory allocated for SNS commands */
4135                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4136                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4137                 if (!ha->sns_cmd)
4138                         goto fail_dma_pool;
4139                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4140                     "sns_cmd: %p.\n", ha->sns_cmd);
4141         } else {
4142         /* Get consistent memory allocated for MS IOCB */
4143                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4144                         &ha->ms_iocb_dma);
4145                 if (!ha->ms_iocb)
4146                         goto fail_dma_pool;
4147         /* Get consistent memory allocated for CT SNS commands */
4148                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4149                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4150                 if (!ha->ct_sns)
4151                         goto fail_free_ms_iocb;
4152                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4153                     "ms_iocb=%p ct_sns=%p.\n",
4154                     ha->ms_iocb, ha->ct_sns);
4155         }
4156
4157         /* Allocate memory for request ring */
4158         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4159         if (!*req) {
4160                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4161                     "Failed to allocate memory for req.\n");
4162                 goto fail_req;
4163         }
4164         (*req)->length = req_len;
4165         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4166                 ((*req)->length + 1) * sizeof(request_t),
4167                 &(*req)->dma, GFP_KERNEL);
4168         if (!(*req)->ring) {
4169                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4170                     "Failed to allocate memory for req_ring.\n");
4171                 goto fail_req_ring;
4172         }
4173         /* Allocate memory for response ring */
4174         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4175         if (!*rsp) {
4176                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4177                     "Failed to allocate memory for rsp.\n");
4178                 goto fail_rsp;
4179         }
4180         (*rsp)->hw = ha;
4181         (*rsp)->length = rsp_len;
4182         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4183                 ((*rsp)->length + 1) * sizeof(response_t),
4184                 &(*rsp)->dma, GFP_KERNEL);
4185         if (!(*rsp)->ring) {
4186                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4187                     "Failed to allocate memory for rsp_ring.\n");
4188                 goto fail_rsp_ring;
4189         }
4190         (*req)->rsp = *rsp;
4191         (*rsp)->req = *req;
4192         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4193             "req=%p req->length=%d req->ring=%p rsp=%p "
4194             "rsp->length=%d rsp->ring=%p.\n",
4195             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4196             (*rsp)->ring);
4197         /* Allocate memory for NVRAM data for vports */
4198         if (ha->nvram_npiv_size) {
4199                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4200                                         sizeof(struct qla_npiv_entry),
4201                                         GFP_KERNEL);
4202                 if (!ha->npiv_info) {
4203                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4204                             "Failed to allocate memory for npiv_info.\n");
4205                         goto fail_npiv_info;
4206                 }
4207         } else
4208                 ha->npiv_info = NULL;
4209
4210         /* Get consistent memory allocated for EX-INIT-CB. */
4211         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4212             IS_QLA28XX(ha)) {
4213                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4214                     &ha->ex_init_cb_dma);
4215                 if (!ha->ex_init_cb)
4216                         goto fail_ex_init_cb;
4217                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4218                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4219         }
4220
4221         /* Get consistent memory allocated for Special Features-CB. */
4222         if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4223                 ha->sf_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4224                                                 &ha->sf_init_cb_dma);
4225                 if (!ha->sf_init_cb)
4226                         goto fail_sf_init_cb;
4227                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0199,
4228                            "sf_init_cb=%p.\n", ha->sf_init_cb);
4229         }
4230
4231         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4232
4233         /* Get consistent memory allocated for Async Port-Database. */
4234         if (!IS_FWI2_CAPABLE(ha)) {
4235                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4236                         &ha->async_pd_dma);
4237                 if (!ha->async_pd)
4238                         goto fail_async_pd;
4239                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4240                     "async_pd=%p.\n", ha->async_pd);
4241         }
4242
4243         INIT_LIST_HEAD(&ha->vp_list);
4244
4245         /* Allocate memory for our loop_id bitmap */
4246         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4247                                   sizeof(long),
4248                                   GFP_KERNEL);
4249         if (!ha->loop_id_map)
4250                 goto fail_loop_id_map;
4251         else {
4252                 qla2x00_set_reserved_loop_ids(ha);
4253                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4254                     "loop_id_map=%p.\n", ha->loop_id_map);
4255         }
4256
4257         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4258             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4259         if (!ha->sfp_data) {
4260                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4261                     "Unable to allocate memory for SFP read-data.\n");
4262                 goto fail_sfp_data;
4263         }
4264
4265         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4266             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4267             GFP_KERNEL);
4268         if (!ha->flt) {
4269                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4270                     "Unable to allocate memory for FLT.\n");
4271                 goto fail_flt_buffer;
4272         }
4273
4274         return 0;
4275
4276 fail_flt_buffer:
4277         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4278             ha->sfp_data, ha->sfp_data_dma);
4279 fail_sfp_data:
4280         kfree(ha->loop_id_map);
4281 fail_loop_id_map:
4282         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4283 fail_async_pd:
4284         dma_pool_free(ha->s_dma_pool, ha->sf_init_cb, ha->sf_init_cb_dma);
4285 fail_sf_init_cb:
4286         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4287 fail_ex_init_cb:
4288         kfree(ha->npiv_info);
4289 fail_npiv_info:
4290         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4291                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4292         (*rsp)->ring = NULL;
4293         (*rsp)->dma = 0;
4294 fail_rsp_ring:
4295         kfree(*rsp);
4296         *rsp = NULL;
4297 fail_rsp:
4298         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4299                 sizeof(request_t), (*req)->ring, (*req)->dma);
4300         (*req)->ring = NULL;
4301         (*req)->dma = 0;
4302 fail_req_ring:
4303         kfree(*req);
4304         *req = NULL;
4305 fail_req:
4306         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4307                 ha->ct_sns, ha->ct_sns_dma);
4308         ha->ct_sns = NULL;
4309         ha->ct_sns_dma = 0;
4310 fail_free_ms_iocb:
4311         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4312         ha->ms_iocb = NULL;
4313         ha->ms_iocb_dma = 0;
4314
4315         if (ha->sns_cmd)
4316                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4317                     ha->sns_cmd, ha->sns_cmd_dma);
4318 fail_dma_pool:
4319         if (ql2xenabledif) {
4320                 struct dsd_dma *dsd, *nxt;
4321
4322                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4323                     list) {
4324                         list_del(&dsd->list);
4325                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4326                             dsd->dsd_list_dma);
4327                         ha->dif_bundle_dma_allocs--;
4328                         kfree(dsd);
4329                         ha->dif_bundle_kallocs--;
4330                         ha->pool.unusable.count--;
4331                 }
4332                 dma_pool_destroy(ha->dif_bundl_pool);
4333                 ha->dif_bundl_pool = NULL;
4334         }
4335
4336 fail_dif_bundl_dma_pool:
4337         if (IS_QLA82XX(ha) || ql2xenabledif) {
4338                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4339                 ha->fcp_cmnd_dma_pool = NULL;
4340         }
4341 fail_dl_dma_pool:
4342         if (IS_QLA82XX(ha) || ql2xenabledif) {
4343                 dma_pool_destroy(ha->dl_dma_pool);
4344                 ha->dl_dma_pool = NULL;
4345         }
4346 fail_s_dma_pool:
4347         dma_pool_destroy(ha->s_dma_pool);
4348         ha->s_dma_pool = NULL;
4349 fail_free_nvram:
4350         kfree(ha->nvram);
4351         ha->nvram = NULL;
4352 fail_free_ctx_mempool:
4353         mempool_destroy(ha->ctx_mempool);
4354         ha->ctx_mempool = NULL;
4355 fail_free_srb_mempool:
4356         mempool_destroy(ha->srb_mempool);
4357         ha->srb_mempool = NULL;
4358 fail_free_gid_list:
4359         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4360         ha->gid_list,
4361         ha->gid_list_dma);
4362         ha->gid_list = NULL;
4363         ha->gid_list_dma = 0;
4364 fail_free_tgt_mem:
4365         qlt_mem_free(ha);
4366 fail_free_init_cb:
4367         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4368         ha->init_cb_dma);
4369         ha->init_cb = NULL;
4370         ha->init_cb_dma = 0;
4371 fail:
4372         ql_log(ql_log_fatal, NULL, 0x0030,
4373             "Memory allocation failure.\n");
4374         return -ENOMEM;
4375 }
4376
4377 int
4378 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4379 {
4380         int rval;
4381         uint16_t        size, max_cnt, temp;
4382         struct qla_hw_data *ha = vha->hw;
4383
4384         /* Return if we don't need to alloacate any extended logins */
4385         if (!ql2xexlogins)
4386                 return QLA_SUCCESS;
4387
4388         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4389                 return QLA_SUCCESS;
4390
4391         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4392         max_cnt = 0;
4393         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4394         if (rval != QLA_SUCCESS) {
4395                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4396                     "Failed to get exlogin status.\n");
4397                 return rval;
4398         }
4399
4400         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4401         temp *= size;
4402
4403         if (temp != ha->exlogin_size) {
4404                 qla2x00_free_exlogin_buffer(ha);
4405                 ha->exlogin_size = temp;
4406
4407                 ql_log(ql_log_info, vha, 0xd024,
4408                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4409                     max_cnt, size, temp);
4410
4411                 ql_log(ql_log_info, vha, 0xd025,
4412                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4413
4414                 /* Get consistent memory for extended logins */
4415                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4416                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4417                 if (!ha->exlogin_buf) {
4418                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4419                     "Failed to allocate memory for exlogin_buf_dma.\n");
4420                         return -ENOMEM;
4421                 }
4422         }
4423
4424         /* Now configure the dma buffer */
4425         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4426         if (rval) {
4427                 ql_log(ql_log_fatal, vha, 0xd033,
4428                     "Setup extended login buffer  ****FAILED****.\n");
4429                 qla2x00_free_exlogin_buffer(ha);
4430         }
4431
4432         return rval;
4433 }
4434
4435 /*
4436 * qla2x00_free_exlogin_buffer
4437 *
4438 * Input:
4439 *       ha = adapter block pointer
4440 */
4441 void
4442 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4443 {
4444         if (ha->exlogin_buf) {
4445                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4446                     ha->exlogin_buf, ha->exlogin_buf_dma);
4447                 ha->exlogin_buf = NULL;
4448                 ha->exlogin_size = 0;
4449         }
4450 }
4451
4452 static void
4453 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4454 {
4455         u32 temp;
4456         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4457         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4458
4459         if (max_cnt > vha->hw->max_exchg)
4460                 max_cnt = vha->hw->max_exchg;
4461
4462         if (qla_ini_mode_enabled(vha)) {
4463                 if (vha->ql2xiniexchg > max_cnt)
4464                         vha->ql2xiniexchg = max_cnt;
4465
4466                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4467                         *ret_cnt = vha->ql2xiniexchg;
4468
4469         } else if (qla_tgt_mode_enabled(vha)) {
4470                 if (vha->ql2xexchoffld > max_cnt) {
4471                         vha->ql2xexchoffld = max_cnt;
4472                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4473                 }
4474
4475                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4476                         *ret_cnt = vha->ql2xexchoffld;
4477         } else if (qla_dual_mode_enabled(vha)) {
4478                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4479                 if (temp > max_cnt) {
4480                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4481                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4482                         temp = max_cnt;
4483                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4484                 }
4485
4486                 if (temp > FW_DEF_EXCHANGES_CNT)
4487                         *ret_cnt = temp;
4488         }
4489 }
4490
4491 int
4492 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4493 {
4494         int rval;
4495         u16     size, max_cnt;
4496         u32 actual_cnt, totsz;
4497         struct qla_hw_data *ha = vha->hw;
4498
4499         if (!ha->flags.exchoffld_enabled)
4500                 return QLA_SUCCESS;
4501
4502         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4503                 return QLA_SUCCESS;
4504
4505         max_cnt = 0;
4506         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4507         if (rval != QLA_SUCCESS) {
4508                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4509                     "Failed to get exlogin status.\n");
4510                 return rval;
4511         }
4512
4513         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4514         ql_log(ql_log_info, vha, 0xd014,
4515             "Actual exchange offload count: %d.\n", actual_cnt);
4516
4517         totsz = actual_cnt * size;
4518
4519         if (totsz != ha->exchoffld_size) {
4520                 qla2x00_free_exchoffld_buffer(ha);
4521                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4522                         ha->exchoffld_size = 0;
4523                         ha->flags.exchoffld_enabled = 0;
4524                         return QLA_SUCCESS;
4525                 }
4526
4527                 ha->exchoffld_size = totsz;
4528
4529                 ql_log(ql_log_info, vha, 0xd016,
4530                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4531                     max_cnt, actual_cnt, size, totsz);
4532
4533                 ql_log(ql_log_info, vha, 0xd017,
4534                     "Exchange Buffers requested size = 0x%x\n",
4535                     ha->exchoffld_size);
4536
4537                 /* Get consistent memory for extended logins */
4538                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4539                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4540                 if (!ha->exchoffld_buf) {
4541                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4542                         "Failed to allocate memory for Exchange Offload.\n");
4543
4544                         if (ha->max_exchg >
4545                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4546                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4547                         } else if (ha->max_exchg >
4548                             (FW_DEF_EXCHANGES_CNT + 512)) {
4549                                 ha->max_exchg -= 512;
4550                         } else {
4551                                 ha->flags.exchoffld_enabled = 0;
4552                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4553                                     "Disabling Exchange offload due to lack of memory\n");
4554                         }
4555                         ha->exchoffld_size = 0;
4556
4557                         return -ENOMEM;
4558                 }
4559         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4560                 /* pathological case */
4561                 qla2x00_free_exchoffld_buffer(ha);
4562                 ha->exchoffld_size = 0;
4563                 ha->flags.exchoffld_enabled = 0;
4564                 ql_log(ql_log_info, vha, 0xd016,
4565                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4566                     ha->exchoffld_size, actual_cnt, size, totsz);
4567                 return 0;
4568         }
4569
4570         /* Now configure the dma buffer */
4571         rval = qla_set_exchoffld_mem_cfg(vha);
4572         if (rval) {
4573                 ql_log(ql_log_fatal, vha, 0xd02e,
4574                     "Setup exchange offload buffer ****FAILED****.\n");
4575                 qla2x00_free_exchoffld_buffer(ha);
4576         } else {
4577                 /* re-adjust number of target exchange */
4578                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4579
4580                 if (qla_ini_mode_enabled(vha))
4581                         icb->exchange_count = 0;
4582                 else
4583                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4584         }
4585
4586         return rval;
4587 }
4588
4589 /*
4590 * qla2x00_free_exchoffld_buffer
4591 *
4592 * Input:
4593 *       ha = adapter block pointer
4594 */
4595 void
4596 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4597 {
4598         if (ha->exchoffld_buf) {
4599                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4600                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4601                 ha->exchoffld_buf = NULL;
4602                 ha->exchoffld_size = 0;
4603         }
4604 }
4605
4606 /*
4607 * qla2x00_free_fw_dump
4608 *       Frees fw dump stuff.
4609 *
4610 * Input:
4611 *       ha = adapter block pointer
4612 */
4613 static void
4614 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4615 {
4616         struct fwdt *fwdt = ha->fwdt;
4617         uint j;
4618
4619         if (ha->fce)
4620                 dma_free_coherent(&ha->pdev->dev,
4621                     FCE_SIZE, ha->fce, ha->fce_dma);
4622
4623         if (ha->eft)
4624                 dma_free_coherent(&ha->pdev->dev,
4625                     EFT_SIZE, ha->eft, ha->eft_dma);
4626
4627         if (ha->fw_dump)
4628                 vfree(ha->fw_dump);
4629
4630         ha->fce = NULL;
4631         ha->fce_dma = 0;
4632         ha->flags.fce_enabled = 0;
4633         ha->eft = NULL;
4634         ha->eft_dma = 0;
4635         ha->fw_dumped = false;
4636         ha->fw_dump_cap_flags = 0;
4637         ha->fw_dump_reading = 0;
4638         ha->fw_dump = NULL;
4639         ha->fw_dump_len = 0;
4640
4641         for (j = 0; j < 2; j++, fwdt++) {
4642                 if (fwdt->template)
4643                         vfree(fwdt->template);
4644                 fwdt->template = NULL;
4645                 fwdt->length = 0;
4646         }
4647 }
4648
4649 /*
4650 * qla2x00_mem_free
4651 *      Frees all adapter allocated memory.
4652 *
4653 * Input:
4654 *      ha = adapter block pointer.
4655 */
4656 static void
4657 qla2x00_mem_free(struct qla_hw_data *ha)
4658 {
4659         qla2x00_free_fw_dump(ha);
4660
4661         if (ha->mctp_dump)
4662                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4663                     ha->mctp_dump_dma);
4664         ha->mctp_dump = NULL;
4665
4666         mempool_destroy(ha->srb_mempool);
4667         ha->srb_mempool = NULL;
4668
4669         if (ha->dcbx_tlv)
4670                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4671                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4672         ha->dcbx_tlv = NULL;
4673
4674         if (ha->xgmac_data)
4675                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4676                     ha->xgmac_data, ha->xgmac_data_dma);
4677         ha->xgmac_data = NULL;
4678
4679         if (ha->sns_cmd)
4680                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4681                 ha->sns_cmd, ha->sns_cmd_dma);
4682         ha->sns_cmd = NULL;
4683         ha->sns_cmd_dma = 0;
4684
4685         if (ha->ct_sns)
4686                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4687                 ha->ct_sns, ha->ct_sns_dma);
4688         ha->ct_sns = NULL;
4689         ha->ct_sns_dma = 0;
4690
4691         if (ha->sfp_data)
4692                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4693                     ha->sfp_data_dma);
4694         ha->sfp_data = NULL;
4695
4696         if (ha->flt)
4697                 dma_free_coherent(&ha->pdev->dev,
4698                     sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE,
4699                     ha->flt, ha->flt_dma);
4700         ha->flt = NULL;
4701         ha->flt_dma = 0;
4702
4703         if (ha->ms_iocb)
4704                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4705         ha->ms_iocb = NULL;
4706         ha->ms_iocb_dma = 0;
4707
4708         if (ha->sf_init_cb)
4709                 dma_pool_free(ha->s_dma_pool,
4710                               ha->sf_init_cb, ha->sf_init_cb_dma);
4711
4712         if (ha->ex_init_cb)
4713                 dma_pool_free(ha->s_dma_pool,
4714                         ha->ex_init_cb, ha->ex_init_cb_dma);
4715         ha->ex_init_cb = NULL;
4716         ha->ex_init_cb_dma = 0;
4717
4718         if (ha->async_pd)
4719                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4720         ha->async_pd = NULL;
4721         ha->async_pd_dma = 0;
4722
4723         dma_pool_destroy(ha->s_dma_pool);
4724         ha->s_dma_pool = NULL;
4725
4726         if (ha->gid_list)
4727                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4728                 ha->gid_list, ha->gid_list_dma);
4729         ha->gid_list = NULL;
4730         ha->gid_list_dma = 0;
4731
4732         if (IS_QLA82XX(ha)) {
4733                 if (!list_empty(&ha->gbl_dsd_list)) {
4734                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4735
4736                         /* clean up allocated prev pool */
4737                         list_for_each_entry_safe(dsd_ptr,
4738                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4739                                 dma_pool_free(ha->dl_dma_pool,
4740                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4741                                 list_del(&dsd_ptr->list);
4742                                 kfree(dsd_ptr);
4743                         }
4744                 }
4745         }
4746
4747         dma_pool_destroy(ha->dl_dma_pool);
4748         ha->dl_dma_pool = NULL;
4749
4750         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4751         ha->fcp_cmnd_dma_pool = NULL;
4752
4753         mempool_destroy(ha->ctx_mempool);
4754         ha->ctx_mempool = NULL;
4755
4756         if (ql2xenabledif && ha->dif_bundl_pool) {
4757                 struct dsd_dma *dsd, *nxt;
4758
4759                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4760                                          list) {
4761                         list_del(&dsd->list);
4762                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4763                                       dsd->dsd_list_dma);
4764                         ha->dif_bundle_dma_allocs--;
4765                         kfree(dsd);
4766                         ha->dif_bundle_kallocs--;
4767                         ha->pool.unusable.count--;
4768                 }
4769                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4770                         list_del(&dsd->list);
4771                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4772                                       dsd->dsd_list_dma);
4773                         ha->dif_bundle_dma_allocs--;
4774                         kfree(dsd);
4775                         ha->dif_bundle_kallocs--;
4776                 }
4777         }
4778
4779         dma_pool_destroy(ha->dif_bundl_pool);
4780         ha->dif_bundl_pool = NULL;
4781
4782         qlt_mem_free(ha);
4783
4784         if (ha->init_cb)
4785                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4786                         ha->init_cb, ha->init_cb_dma);
4787         ha->init_cb = NULL;
4788         ha->init_cb_dma = 0;
4789
4790         vfree(ha->optrom_buffer);
4791         ha->optrom_buffer = NULL;
4792         kfree(ha->nvram);
4793         ha->nvram = NULL;
4794         kfree(ha->npiv_info);
4795         ha->npiv_info = NULL;
4796         kfree(ha->swl);
4797         ha->swl = NULL;
4798         kfree(ha->loop_id_map);
4799         ha->sf_init_cb = NULL;
4800         ha->sf_init_cb_dma = 0;
4801         ha->loop_id_map = NULL;
4802 }
4803
4804 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4805                                                 struct qla_hw_data *ha)
4806 {
4807         struct Scsi_Host *host;
4808         struct scsi_qla_host *vha = NULL;
4809
4810         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4811         if (!host) {
4812                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4813                     "Failed to allocate host from the scsi layer, aborting.\n");
4814                 return NULL;
4815         }
4816
4817         /* Clear our data area */
4818         vha = shost_priv(host);
4819         memset(vha, 0, sizeof(scsi_qla_host_t));
4820
4821         vha->host = host;
4822         vha->host_no = host->host_no;
4823         vha->hw = ha;
4824
4825         vha->qlini_mode = ql2x_ini_mode;
4826         vha->ql2xexchoffld = ql2xexchoffld;
4827         vha->ql2xiniexchg = ql2xiniexchg;
4828
4829         INIT_LIST_HEAD(&vha->vp_fcports);
4830         INIT_LIST_HEAD(&vha->work_list);
4831         INIT_LIST_HEAD(&vha->list);
4832         INIT_LIST_HEAD(&vha->qla_cmd_list);
4833         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4834         INIT_LIST_HEAD(&vha->logo_list);
4835         INIT_LIST_HEAD(&vha->plogi_ack_list);
4836         INIT_LIST_HEAD(&vha->qp_list);
4837         INIT_LIST_HEAD(&vha->gnl.fcports);
4838         INIT_LIST_HEAD(&vha->gpnid_list);
4839         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4840
4841         INIT_LIST_HEAD(&vha->purex_list.head);
4842         spin_lock_init(&vha->purex_list.lock);
4843
4844         spin_lock_init(&vha->work_lock);
4845         spin_lock_init(&vha->cmd_list_lock);
4846         init_waitqueue_head(&vha->fcport_waitQ);
4847         init_waitqueue_head(&vha->vref_waitq);
4848
4849         vha->gnl.size = sizeof(struct get_name_list_extended) *
4850                         (ha->max_loop_id + 1);
4851         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4852             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4853         if (!vha->gnl.l) {
4854                 ql_log(ql_log_fatal, vha, 0xd04a,
4855                     "Alloc failed for name list.\n");
4856                 scsi_host_put(vha->host);
4857                 return NULL;
4858         }
4859
4860         /* todo: what about ext login? */
4861         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4862         vha->scan.l = vmalloc(vha->scan.size);
4863         if (!vha->scan.l) {
4864                 ql_log(ql_log_fatal, vha, 0xd04a,
4865                     "Alloc failed for scan database.\n");
4866                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4867                     vha->gnl.l, vha->gnl.ldma);
4868                 vha->gnl.l = NULL;
4869                 scsi_host_put(vha->host);
4870                 return NULL;
4871         }
4872         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4873
4874         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4875         ql_dbg(ql_dbg_init, vha, 0x0041,
4876             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4877             vha->host, vha->hw, vha,
4878             dev_name(&(ha->pdev->dev)));
4879
4880         return vha;
4881 }
4882
4883 struct qla_work_evt *
4884 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4885 {
4886         struct qla_work_evt *e;
4887         uint8_t bail;
4888
4889         if (test_bit(UNLOADING, &vha->dpc_flags))
4890                 return NULL;
4891
4892         QLA_VHA_MARK_BUSY(vha, bail);
4893         if (bail)
4894                 return NULL;
4895
4896         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4897         if (!e) {
4898                 QLA_VHA_MARK_NOT_BUSY(vha);
4899                 return NULL;
4900         }
4901
4902         INIT_LIST_HEAD(&e->list);
4903         e->type = type;
4904         e->flags = QLA_EVT_FLAG_FREE;
4905         return e;
4906 }
4907
4908 int
4909 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4910 {
4911         unsigned long flags;
4912         bool q = false;
4913
4914         spin_lock_irqsave(&vha->work_lock, flags);
4915         list_add_tail(&e->list, &vha->work_list);
4916
4917         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4918                 q = true;
4919
4920         spin_unlock_irqrestore(&vha->work_lock, flags);
4921
4922         if (q)
4923                 queue_work(vha->hw->wq, &vha->iocb_work);
4924
4925         return QLA_SUCCESS;
4926 }
4927
4928 int
4929 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4930     u32 data)
4931 {
4932         struct qla_work_evt *e;
4933
4934         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4935         if (!e)
4936                 return QLA_FUNCTION_FAILED;
4937
4938         e->u.aen.code = code;
4939         e->u.aen.data = data;
4940         return qla2x00_post_work(vha, e);
4941 }
4942
4943 int
4944 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4945 {
4946         struct qla_work_evt *e;
4947
4948         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4949         if (!e)
4950                 return QLA_FUNCTION_FAILED;
4951
4952         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4953         return qla2x00_post_work(vha, e);
4954 }
4955
4956 #define qla2x00_post_async_work(name, type)     \
4957 int qla2x00_post_async_##name##_work(           \
4958     struct scsi_qla_host *vha,                  \
4959     fc_port_t *fcport, uint16_t *data)          \
4960 {                                               \
4961         struct qla_work_evt *e;                 \
4962                                                 \
4963         e = qla2x00_alloc_work(vha, type);      \
4964         if (!e)                                 \
4965                 return QLA_FUNCTION_FAILED;     \
4966                                                 \
4967         e->u.logio.fcport = fcport;             \
4968         if (data) {                             \
4969                 e->u.logio.data[0] = data[0];   \
4970                 e->u.logio.data[1] = data[1];   \
4971         }                                       \
4972         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4973         return qla2x00_post_work(vha, e);       \
4974 }
4975
4976 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4977 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4978 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4979 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4980 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4981
4982 int
4983 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4984 {
4985         struct qla_work_evt *e;
4986
4987         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4988         if (!e)
4989                 return QLA_FUNCTION_FAILED;
4990
4991         e->u.uevent.code = code;
4992         return qla2x00_post_work(vha, e);
4993 }
4994
4995 static void
4996 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4997 {
4998         char event_string[40];
4999         char *envp[] = { event_string, NULL };
5000
5001         switch (code) {
5002         case QLA_UEVENT_CODE_FW_DUMP:
5003                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
5004                     vha->host_no);
5005                 break;
5006         default:
5007                 /* do nothing */
5008                 break;
5009         }
5010         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
5011 }
5012
5013 int
5014 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
5015                         uint32_t *data, int cnt)
5016 {
5017         struct qla_work_evt *e;
5018
5019         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
5020         if (!e)
5021                 return QLA_FUNCTION_FAILED;
5022
5023         e->u.aenfx.evtcode = evtcode;
5024         e->u.aenfx.count = cnt;
5025         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
5026         return qla2x00_post_work(vha, e);
5027 }
5028
5029 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
5030 {
5031         unsigned long flags;
5032
5033         if (IS_SW_RESV_ADDR(fcport->d_id))
5034                 return;
5035
5036         spin_lock_irqsave(&fcport->vha->work_lock, flags);
5037         if (fcport->disc_state == DSC_UPD_FCPORT) {
5038                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5039                 return;
5040         }
5041         fcport->jiffies_at_registration = jiffies;
5042         fcport->sec_since_registration = 0;
5043         fcport->next_disc_state = DSC_DELETED;
5044         qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5045         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5046
5047         queue_work(system_unbound_wq, &fcport->reg_work);
5048 }
5049
5050 static
5051 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5052 {
5053         unsigned long flags;
5054         fc_port_t *fcport =  NULL, *tfcp;
5055         struct qlt_plogi_ack_t *pla =
5056             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5057         uint8_t free_fcport = 0;
5058
5059         ql_dbg(ql_dbg_disc, vha, 0xffff,
5060             "%s %d %8phC enter\n",
5061             __func__, __LINE__, e->u.new_sess.port_name);
5062
5063         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5064         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5065         if (fcport) {
5066                 fcport->d_id = e->u.new_sess.id;
5067                 if (pla) {
5068                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5069                         memcpy(fcport->node_name,
5070                             pla->iocb.u.isp24.u.plogi.node_name,
5071                             WWN_SIZE);
5072                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5073                         /* we took an extra ref_count to prevent PLOGI ACK when
5074                          * fcport/sess has not been created.
5075                          */
5076                         pla->ref_count--;
5077                 }
5078         } else {
5079                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5080                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5081                 if (fcport) {
5082                         fcport->d_id = e->u.new_sess.id;
5083                         fcport->flags |= FCF_FABRIC_DEVICE;
5084                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5085
5086                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5087                             WWN_SIZE);
5088
5089                         fcport->fc4_type = e->u.new_sess.fc4_type;
5090                         if (e->u.new_sess.fc4_type & FS_FCP_IS_N2N) {
5091                                 fcport->fc4_type = FS_FC4TYPE_FCP;
5092                                 fcport->n2n_flag = 1;
5093                                 if (vha->flags.nvme_enabled)
5094                                         fcport->fc4_type |= FS_FC4TYPE_NVME;
5095                         }
5096
5097                 } else {
5098                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5099                                    "%s %8phC mem alloc fail.\n",
5100                                    __func__, e->u.new_sess.port_name);
5101
5102                         if (pla) {
5103                                 list_del(&pla->list);
5104                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5105                         }
5106                         return;
5107                 }
5108
5109                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5110                 /* search again to make sure no one else got ahead */
5111                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5112                     e->u.new_sess.port_name, 1);
5113                 if (tfcp) {
5114                         /* should rarily happen */
5115                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5116                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5117                             __func__, tfcp->port_name, tfcp->disc_state,
5118                             tfcp->fw_login_state);
5119
5120                         free_fcport = 1;
5121                 } else {
5122                         list_add_tail(&fcport->list, &vha->vp_fcports);
5123
5124                 }
5125                 if (pla) {
5126                         qlt_plogi_ack_link(vha, pla, fcport,
5127                             QLT_PLOGI_LINK_SAME_WWN);
5128                         pla->ref_count--;
5129                 }
5130         }
5131         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5132
5133         if (fcport) {
5134                 fcport->id_changed = 1;
5135                 fcport->scan_state = QLA_FCPORT_FOUND;
5136                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5137                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5138
5139                 if (pla) {
5140                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5141                                 u16 wd3_lo;
5142
5143                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5144                                 fcport->local = 0;
5145                                 fcport->loop_id =
5146                                         le16_to_cpu(
5147                                             pla->iocb.u.isp24.nport_handle);
5148                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5149                                 wd3_lo =
5150                                     le16_to_cpu(
5151                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5152
5153                                 if (wd3_lo & BIT_7)
5154                                         fcport->conf_compl_supported = 1;
5155
5156                                 if ((wd3_lo & BIT_4) == 0)
5157                                         fcport->port_type = FCT_INITIATOR;
5158                                 else
5159                                         fcport->port_type = FCT_TARGET;
5160                         }
5161                         qlt_plogi_ack_unref(vha, pla);
5162                 } else {
5163                         fc_port_t *dfcp = NULL;
5164
5165                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5166                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5167                             &e->u.new_sess.id, 1);
5168                         if (tfcp && (tfcp != fcport)) {
5169                                 /*
5170                                  * We have a conflict fcport with same NportID.
5171                                  */
5172                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5173                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5174                                     __func__, tfcp->port_name, tfcp->disc_state,
5175                                     tfcp->fw_login_state);
5176
5177                                 switch (tfcp->disc_state) {
5178                                 case DSC_DELETED:
5179                                         break;
5180                                 case DSC_DELETE_PEND:
5181                                         fcport->login_pause = 1;
5182                                         tfcp->conflict = fcport;
5183                                         break;
5184                                 default:
5185                                         fcport->login_pause = 1;
5186                                         tfcp->conflict = fcport;
5187                                         dfcp = tfcp;
5188                                         break;
5189                                 }
5190                         }
5191                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5192                         if (dfcp)
5193                                 qlt_schedule_sess_for_deletion(tfcp);
5194
5195                         if (N2N_TOPO(vha->hw)) {
5196                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5197                                 fcport->keep_nport_handle = 1;
5198                                 if (vha->flags.nvme_enabled) {
5199                                         fcport->fc4_type =
5200                                             (FS_FC4TYPE_NVME | FS_FC4TYPE_FCP);
5201                                         fcport->n2n_flag = 1;
5202                                 }
5203                                 fcport->fw_login_state = 0;
5204
5205                                 schedule_delayed_work(&vha->scan.scan_work, 5);
5206                         } else {
5207                                 qla24xx_fcport_handle_login(vha, fcport);
5208                         }
5209                 }
5210         }
5211
5212         if (free_fcport) {
5213                 qla2x00_free_fcport(fcport);
5214                 if (pla) {
5215                         list_del(&pla->list);
5216                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5217                 }
5218         }
5219 }
5220
5221 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5222 {
5223         struct srb *sp = e->u.iosb.sp;
5224         int rval;
5225
5226         rval = qla2x00_start_sp(sp);
5227         if (rval != QLA_SUCCESS) {
5228                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5229                     "%s: %s: Re-issue IOCB failed (%d).\n",
5230                     __func__, sp->name, rval);
5231                 qla24xx_sp_unmap(vha, sp);
5232         }
5233 }
5234
5235 void
5236 qla2x00_do_work(struct scsi_qla_host *vha)
5237 {
5238         struct qla_work_evt *e, *tmp;
5239         unsigned long flags;
5240         LIST_HEAD(work);
5241         int rc;
5242
5243         spin_lock_irqsave(&vha->work_lock, flags);
5244         list_splice_init(&vha->work_list, &work);
5245         spin_unlock_irqrestore(&vha->work_lock, flags);
5246
5247         list_for_each_entry_safe(e, tmp, &work, list) {
5248                 rc = QLA_SUCCESS;
5249                 switch (e->type) {
5250                 case QLA_EVT_AEN:
5251                         fc_host_post_event(vha->host, fc_get_event_number(),
5252                             e->u.aen.code, e->u.aen.data);
5253                         break;
5254                 case QLA_EVT_IDC_ACK:
5255                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5256                         break;
5257                 case QLA_EVT_ASYNC_LOGIN:
5258                         qla2x00_async_login(vha, e->u.logio.fcport,
5259                             e->u.logio.data);
5260                         break;
5261                 case QLA_EVT_ASYNC_LOGOUT:
5262                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5263                         break;
5264                 case QLA_EVT_ASYNC_ADISC:
5265                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5266                             e->u.logio.data);
5267                         break;
5268                 case QLA_EVT_UEVENT:
5269                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5270                         break;
5271                 case QLA_EVT_AENFX:
5272                         qlafx00_process_aen(vha, e);
5273                         break;
5274                 case QLA_EVT_GPNID:
5275                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5276                         break;
5277                 case QLA_EVT_UNMAP:
5278                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5279                         break;
5280                 case QLA_EVT_RELOGIN:
5281                         qla2x00_relogin(vha);
5282                         break;
5283                 case QLA_EVT_NEW_SESS:
5284                         qla24xx_create_new_sess(vha, e);
5285                         break;
5286                 case QLA_EVT_GPDB:
5287                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5288                             e->u.fcport.opt);
5289                         break;
5290                 case QLA_EVT_PRLI:
5291                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5292                         break;
5293                 case QLA_EVT_GPSC:
5294                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5295                         break;
5296                 case QLA_EVT_GNL:
5297                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5298                         break;
5299                 case QLA_EVT_NACK:
5300                         qla24xx_do_nack_work(vha, e);
5301                         break;
5302                 case QLA_EVT_ASYNC_PRLO:
5303                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5304                         break;
5305                 case QLA_EVT_ASYNC_PRLO_DONE:
5306                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5307                             e->u.logio.data);
5308                         break;
5309                 case QLA_EVT_GPNFT:
5310                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5311                             e->u.gpnft.sp);
5312                         break;
5313                 case QLA_EVT_GPNFT_DONE:
5314                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5315                         break;
5316                 case QLA_EVT_GNNFT_DONE:
5317                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5318                         break;
5319                 case QLA_EVT_GNNID:
5320                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5321                         break;
5322                 case QLA_EVT_GFPNID:
5323                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5324                         break;
5325                 case QLA_EVT_SP_RETRY:
5326                         qla_sp_retry(vha, e);
5327                         break;
5328                 case QLA_EVT_IIDMA:
5329                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5330                         break;
5331                 case QLA_EVT_ELS_PLOGI:
5332                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5333                             e->u.fcport.fcport, false);
5334                         break;
5335                 }
5336
5337                 if (rc == EAGAIN) {
5338                         /* put 'work' at head of 'vha->work_list' */
5339                         spin_lock_irqsave(&vha->work_lock, flags);
5340                         list_splice(&work, &vha->work_list);
5341                         spin_unlock_irqrestore(&vha->work_lock, flags);
5342                         break;
5343                 }
5344                 list_del_init(&e->list);
5345                 if (e->flags & QLA_EVT_FLAG_FREE)
5346                         kfree(e);
5347
5348                 /* For each work completed decrement vha ref count */
5349                 QLA_VHA_MARK_NOT_BUSY(vha);
5350         }
5351 }
5352
5353 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5354 {
5355         struct qla_work_evt *e;
5356
5357         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5358
5359         if (!e) {
5360                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5361                 return QLA_FUNCTION_FAILED;
5362         }
5363
5364         return qla2x00_post_work(vha, e);
5365 }
5366
5367 /* Relogins all the fcports of a vport
5368  * Context: dpc thread
5369  */
5370 void qla2x00_relogin(struct scsi_qla_host *vha)
5371 {
5372         fc_port_t       *fcport;
5373         int status, relogin_needed = 0;
5374         struct event_arg ea;
5375
5376         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5377                 /*
5378                  * If the port is not ONLINE then try to login
5379                  * to it if we haven't run out of retries.
5380                  */
5381                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5382                     fcport->login_retry) {
5383                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5384                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5385                                 continue;
5386
5387                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5388                                 fcport->disc_state == DSC_DELETE_PEND) {
5389                                 relogin_needed = 1;
5390                         } else {
5391                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5392                                         memset(&ea, 0, sizeof(ea));
5393                                         ea.fcport = fcport;
5394                                         qla24xx_handle_relogin_event(vha, &ea);
5395                                 } else if (vha->hw->current_topology ==
5396                                     ISP_CFG_NL) {
5397                                         fcport->login_retry--;
5398                                         status =
5399                                             qla2x00_local_device_login(vha,
5400                                                 fcport);
5401                                         if (status == QLA_SUCCESS) {
5402                                                 fcport->old_loop_id =
5403                                                     fcport->loop_id;
5404                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5405                                                     "Port login OK: logged in ID 0x%x.\n",
5406                                                     fcport->loop_id);
5407                                                 qla2x00_update_fcport
5408                                                         (vha, fcport);
5409                                         } else if (status == 1) {
5410                                                 set_bit(RELOGIN_NEEDED,
5411                                                     &vha->dpc_flags);
5412                                                 /* retry the login again */
5413                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5414                                                     "Retrying %d login again loop_id 0x%x.\n",
5415                                                     fcport->login_retry,
5416                                                     fcport->loop_id);
5417                                         } else {
5418                                                 fcport->login_retry = 0;
5419                                         }
5420
5421                                         if (fcport->login_retry == 0 &&
5422                                             status != QLA_SUCCESS)
5423                                                 qla2x00_clear_loop_id(fcport);
5424                                 }
5425                         }
5426                 }
5427                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5428                         break;
5429         }
5430
5431         if (relogin_needed)
5432                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5433
5434         ql_dbg(ql_dbg_disc, vha, 0x400e,
5435             "Relogin end.\n");
5436 }
5437
5438 /* Schedule work on any of the dpc-workqueues */
5439 void
5440 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5441 {
5442         struct qla_hw_data *ha = base_vha->hw;
5443
5444         switch (work_code) {
5445         case MBA_IDC_AEN: /* 0x8200 */
5446                 if (ha->dpc_lp_wq)
5447                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5448                 break;
5449
5450         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5451                 if (!ha->flags.nic_core_reset_hdlr_active) {
5452                         if (ha->dpc_hp_wq)
5453                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5454                 } else
5455                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5456                             "NIC Core reset is already active. Skip "
5457                             "scheduling it again.\n");
5458                 break;
5459         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5460                 if (ha->dpc_hp_wq)
5461                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5462                 break;
5463         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5464                 if (ha->dpc_hp_wq)
5465                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5466                 break;
5467         default:
5468                 ql_log(ql_log_warn, base_vha, 0xb05f,
5469                     "Unknown work-code=0x%x.\n", work_code);
5470         }
5471
5472         return;
5473 }
5474
5475 /* Work: Perform NIC Core Unrecoverable state handling */
5476 void
5477 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5478 {
5479         struct qla_hw_data *ha =
5480                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5481         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5482         uint32_t dev_state = 0;
5483
5484         qla83xx_idc_lock(base_vha, 0);
5485         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5486         qla83xx_reset_ownership(base_vha);
5487         if (ha->flags.nic_core_reset_owner) {
5488                 ha->flags.nic_core_reset_owner = 0;
5489                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5490                     QLA8XXX_DEV_FAILED);
5491                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5492                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5493         }
5494         qla83xx_idc_unlock(base_vha, 0);
5495 }
5496
5497 /* Work: Execute IDC state handler */
5498 void
5499 qla83xx_idc_state_handler_work(struct work_struct *work)
5500 {
5501         struct qla_hw_data *ha =
5502                 container_of(work, struct qla_hw_data, idc_state_handler);
5503         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5504         uint32_t dev_state = 0;
5505
5506         qla83xx_idc_lock(base_vha, 0);
5507         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5508         if (dev_state == QLA8XXX_DEV_FAILED ||
5509                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5510                 qla83xx_idc_state_handler(base_vha);
5511         qla83xx_idc_unlock(base_vha, 0);
5512 }
5513
5514 static int
5515 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5516 {
5517         int rval = QLA_SUCCESS;
5518         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5519         uint32_t heart_beat_counter1, heart_beat_counter2;
5520
5521         do {
5522                 if (time_after(jiffies, heart_beat_wait)) {
5523                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5524                             "Nic Core f/w is not alive.\n");
5525                         rval = QLA_FUNCTION_FAILED;
5526                         break;
5527                 }
5528
5529                 qla83xx_idc_lock(base_vha, 0);
5530                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5531                     &heart_beat_counter1);
5532                 qla83xx_idc_unlock(base_vha, 0);
5533                 msleep(100);
5534                 qla83xx_idc_lock(base_vha, 0);
5535                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5536                     &heart_beat_counter2);
5537                 qla83xx_idc_unlock(base_vha, 0);
5538         } while (heart_beat_counter1 == heart_beat_counter2);
5539
5540         return rval;
5541 }
5542
5543 /* Work: Perform NIC Core Reset handling */
5544 void
5545 qla83xx_nic_core_reset_work(struct work_struct *work)
5546 {
5547         struct qla_hw_data *ha =
5548                 container_of(work, struct qla_hw_data, nic_core_reset);
5549         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5550         uint32_t dev_state = 0;
5551
5552         if (IS_QLA2031(ha)) {
5553                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5554                         ql_log(ql_log_warn, base_vha, 0xb081,
5555                             "Failed to dump mctp\n");
5556                 return;
5557         }
5558
5559         if (!ha->flags.nic_core_reset_hdlr_active) {
5560                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5561                         qla83xx_idc_lock(base_vha, 0);
5562                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5563                             &dev_state);
5564                         qla83xx_idc_unlock(base_vha, 0);
5565                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5566                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5567                                     "Nic Core f/w is alive.\n");
5568                                 return;
5569                         }
5570                 }
5571
5572                 ha->flags.nic_core_reset_hdlr_active = 1;
5573                 if (qla83xx_nic_core_reset(base_vha)) {
5574                         /* NIC Core reset failed. */
5575                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5576                             "NIC Core reset failed.\n");
5577                 }
5578                 ha->flags.nic_core_reset_hdlr_active = 0;
5579         }
5580 }
5581
5582 /* Work: Handle 8200 IDC aens */
5583 void
5584 qla83xx_service_idc_aen(struct work_struct *work)
5585 {
5586         struct qla_hw_data *ha =
5587                 container_of(work, struct qla_hw_data, idc_aen);
5588         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5589         uint32_t dev_state, idc_control;
5590
5591         qla83xx_idc_lock(base_vha, 0);
5592         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5593         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5594         qla83xx_idc_unlock(base_vha, 0);
5595         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5596                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5597                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5598                             "Application requested NIC Core Reset.\n");
5599                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5600                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5601                     QLA_SUCCESS) {
5602                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5603                             "Other protocol driver requested NIC Core Reset.\n");
5604                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5605                 }
5606         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5607                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5608                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5609         }
5610 }
5611
5612 static void
5613 qla83xx_wait_logic(void)
5614 {
5615         int i;
5616
5617         /* Yield CPU */
5618         if (!in_interrupt()) {
5619                 /*
5620                  * Wait about 200ms before retrying again.
5621                  * This controls the number of retries for single
5622                  * lock operation.
5623                  */
5624                 msleep(100);
5625                 schedule();
5626         } else {
5627                 for (i = 0; i < 20; i++)
5628                         cpu_relax(); /* This a nop instr on i386 */
5629         }
5630 }
5631
5632 static int
5633 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5634 {
5635         int rval;
5636         uint32_t data;
5637         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5638         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5639         struct qla_hw_data *ha = base_vha->hw;
5640
5641         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5642             "Trying force recovery of the IDC lock.\n");
5643
5644         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5645         if (rval)
5646                 return rval;
5647
5648         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5649                 return QLA_SUCCESS;
5650         } else {
5651                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5652                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5653                     data);
5654                 if (rval)
5655                         return rval;
5656
5657                 msleep(200);
5658
5659                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5660                     &data);
5661                 if (rval)
5662                         return rval;
5663
5664                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5665                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5666                                         ~(idc_lck_rcvry_stage_mask));
5667                         rval = qla83xx_wr_reg(base_vha,
5668                             QLA83XX_IDC_LOCK_RECOVERY, data);
5669                         if (rval)
5670                                 return rval;
5671
5672                         /* Forcefully perform IDC UnLock */
5673                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5674                             &data);
5675                         if (rval)
5676                                 return rval;
5677                         /* Clear lock-id by setting 0xff */
5678                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5679                             0xff);
5680                         if (rval)
5681                                 return rval;
5682                         /* Clear lock-recovery by setting 0x0 */
5683                         rval = qla83xx_wr_reg(base_vha,
5684                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5685                         if (rval)
5686                                 return rval;
5687                 } else
5688                         return QLA_SUCCESS;
5689         }
5690
5691         return rval;
5692 }
5693
5694 static int
5695 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5696 {
5697         int rval = QLA_SUCCESS;
5698         uint32_t o_drv_lockid, n_drv_lockid;
5699         unsigned long lock_recovery_timeout;
5700
5701         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5702 retry_lockid:
5703         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5704         if (rval)
5705                 goto exit;
5706
5707         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5708         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5709                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5710                         return QLA_SUCCESS;
5711                 else
5712                         return QLA_FUNCTION_FAILED;
5713         }
5714
5715         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5716         if (rval)
5717                 goto exit;
5718
5719         if (o_drv_lockid == n_drv_lockid) {
5720                 qla83xx_wait_logic();
5721                 goto retry_lockid;
5722         } else
5723                 return QLA_SUCCESS;
5724
5725 exit:
5726         return rval;
5727 }
5728
5729 void
5730 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5731 {
5732         uint32_t data;
5733         uint32_t lock_owner;
5734         struct qla_hw_data *ha = base_vha->hw;
5735
5736         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5737 retry_lock:
5738         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5739             == QLA_SUCCESS) {
5740                 if (data) {
5741                         /* Setting lock-id to our function-number */
5742                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5743                             ha->portnum);
5744                 } else {
5745                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5746                             &lock_owner);
5747                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5748                             "Failed to acquire IDC lock, acquired by %d, "
5749                             "retrying...\n", lock_owner);
5750
5751                         /* Retry/Perform IDC-Lock recovery */
5752                         if (qla83xx_idc_lock_recovery(base_vha)
5753                             == QLA_SUCCESS) {
5754                                 qla83xx_wait_logic();
5755                                 goto retry_lock;
5756                         } else
5757                                 ql_log(ql_log_warn, base_vha, 0xb075,
5758                                     "IDC Lock recovery FAILED.\n");
5759                 }
5760
5761         }
5762
5763         return;
5764 }
5765
5766 static bool
5767 qla25xx_rdp_rsp_reduce_size(struct scsi_qla_host *vha,
5768         struct purex_entry_24xx *purex)
5769 {
5770         char fwstr[16];
5771         u32 sid = purex->s_id[2] << 16 | purex->s_id[1] << 8 | purex->s_id[0];
5772         struct port_database_24xx *pdb;
5773
5774         /* Domain Controller is always logged-out. */
5775         /* if RDP request is not from Domain Controller: */
5776         if (sid != 0xfffc01)
5777                 return false;
5778
5779         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: s_id=%#x\n", __func__, sid);
5780
5781         pdb = kzalloc(sizeof(*pdb), GFP_KERNEL);
5782         if (!pdb) {
5783                 ql_dbg(ql_dbg_init, vha, 0x0181,
5784                     "%s: Failed allocate pdb\n", __func__);
5785         } else if (qla24xx_get_port_database(vha,
5786                                 le16_to_cpu(purex->nport_handle), pdb)) {
5787                 ql_dbg(ql_dbg_init, vha, 0x0181,
5788                     "%s: Failed get pdb sid=%x\n", __func__, sid);
5789         } else if (pdb->current_login_state != PDS_PLOGI_COMPLETE &&
5790             pdb->current_login_state != PDS_PRLI_COMPLETE) {
5791                 ql_dbg(ql_dbg_init, vha, 0x0181,
5792                     "%s: Port not logged in sid=%#x\n", __func__, sid);
5793         } else {
5794                 /* RDP request is from logged in port */
5795                 kfree(pdb);
5796                 return false;
5797         }
5798         kfree(pdb);
5799
5800         vha->hw->isp_ops->fw_version_str(vha, fwstr, sizeof(fwstr));
5801         fwstr[strcspn(fwstr, " ")] = 0;
5802         /* if FW version allows RDP response length upto 2048 bytes: */
5803         if (strcmp(fwstr, "8.09.00") > 0 || strcmp(fwstr, "8.05.65") == 0)
5804                 return false;
5805
5806         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: fw=%s\n", __func__, fwstr);
5807
5808         /* RDP response length is to be reduced to maximum 256 bytes */
5809         return true;
5810 }
5811
5812 static uint
5813 qla25xx_rdp_port_speed_capability(struct qla_hw_data *ha)
5814 {
5815         if (IS_CNA_CAPABLE(ha))
5816                 return RDP_PORT_SPEED_10GB;
5817
5818         if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
5819                 unsigned int speeds = 0;
5820
5821                 if (ha->max_supported_speed == 2) {
5822                         if (ha->min_supported_speed <= 6)
5823                                 speeds |= RDP_PORT_SPEED_64GB;
5824                 }
5825
5826                 if (ha->max_supported_speed == 2 ||
5827                     ha->max_supported_speed == 1) {
5828                         if (ha->min_supported_speed <= 5)
5829                                 speeds |= RDP_PORT_SPEED_32GB;
5830                 }
5831
5832                 if (ha->max_supported_speed == 2 ||
5833                     ha->max_supported_speed == 1 ||
5834                     ha->max_supported_speed == 0) {
5835                         if (ha->min_supported_speed <= 4)
5836                                 speeds |= RDP_PORT_SPEED_16GB;
5837                 }
5838
5839                 if (ha->max_supported_speed == 1 ||
5840                     ha->max_supported_speed == 0) {
5841                         if (ha->min_supported_speed <= 3)
5842                                 speeds |= RDP_PORT_SPEED_8GB;
5843                 }
5844
5845                 if (ha->max_supported_speed == 0) {
5846                         if (ha->min_supported_speed <= 2)
5847                                 speeds |= RDP_PORT_SPEED_4GB;
5848                 }
5849
5850                 return speeds;
5851         }
5852
5853         if (IS_QLA2031(ha))
5854                 return RDP_PORT_SPEED_16GB|RDP_PORT_SPEED_8GB|
5855                        RDP_PORT_SPEED_4GB;
5856
5857         if (IS_QLA25XX(ha))
5858                 return RDP_PORT_SPEED_8GB|RDP_PORT_SPEED_4GB|
5859                        RDP_PORT_SPEED_2GB|RDP_PORT_SPEED_1GB;
5860
5861         if (IS_QLA24XX_TYPE(ha))
5862                 return RDP_PORT_SPEED_4GB|RDP_PORT_SPEED_2GB|
5863                        RDP_PORT_SPEED_1GB;
5864
5865         if (IS_QLA23XX(ha))
5866                 return RDP_PORT_SPEED_2GB|RDP_PORT_SPEED_1GB;
5867
5868         return RDP_PORT_SPEED_1GB;
5869 }
5870
5871 static uint
5872 qla25xx_rdp_port_speed_currently(struct qla_hw_data *ha)
5873 {
5874         switch (ha->link_data_rate) {
5875         case PORT_SPEED_1GB:
5876                 return RDP_PORT_SPEED_1GB;
5877
5878         case PORT_SPEED_2GB:
5879                 return RDP_PORT_SPEED_2GB;
5880
5881         case PORT_SPEED_4GB:
5882                 return RDP_PORT_SPEED_4GB;
5883
5884         case PORT_SPEED_8GB:
5885                 return RDP_PORT_SPEED_8GB;
5886
5887         case PORT_SPEED_10GB:
5888                 return RDP_PORT_SPEED_10GB;
5889
5890         case PORT_SPEED_16GB:
5891                 return RDP_PORT_SPEED_16GB;
5892
5893         case PORT_SPEED_32GB:
5894                 return RDP_PORT_SPEED_32GB;
5895
5896         case PORT_SPEED_64GB:
5897                 return RDP_PORT_SPEED_64GB;
5898
5899         default:
5900                 return RDP_PORT_SPEED_UNKNOWN;
5901         }
5902 }
5903
5904 /*
5905  * Function Name: qla24xx_process_purex_iocb
5906  *
5907  * Description:
5908  * Prepare a RDP response and send to Fabric switch
5909  *
5910  * PARAMETERS:
5911  * vha: SCSI qla host
5912  * purex: RDP request received by HBA
5913  */
5914 void qla24xx_process_purex_rdp(struct scsi_qla_host *vha,
5915                                struct purex_item *item)
5916 {
5917         struct qla_hw_data *ha = vha->hw;
5918         struct purex_entry_24xx *purex =
5919             (struct purex_entry_24xx *)&item->iocb;
5920         dma_addr_t rsp_els_dma;
5921         dma_addr_t rsp_payload_dma;
5922         dma_addr_t stat_dma;
5923         dma_addr_t bbc_dma;
5924         dma_addr_t sfp_dma;
5925         struct els_entry_24xx *rsp_els = NULL;
5926         struct rdp_rsp_payload *rsp_payload = NULL;
5927         struct link_statistics *stat = NULL;
5928         struct buffer_credit_24xx *bbc = NULL;
5929         uint8_t *sfp = NULL;
5930         uint16_t sfp_flags = 0;
5931         uint rsp_payload_length = sizeof(*rsp_payload);
5932         int rval;
5933
5934         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0180,
5935             "%s: Enter\n", __func__);
5936
5937         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0181,
5938             "-------- ELS REQ -------\n");
5939         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0182,
5940             purex, sizeof(*purex));
5941
5942         if (qla25xx_rdp_rsp_reduce_size(vha, purex)) {
5943                 rsp_payload_length =
5944                     offsetof(typeof(*rsp_payload), optical_elmt_desc);
5945                 ql_dbg(ql_dbg_init, vha, 0x0181,
5946                     "Reducing RSP payload length to %u bytes...\n",
5947                     rsp_payload_length);
5948         }
5949
5950         rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els),
5951             &rsp_els_dma, GFP_KERNEL);
5952         if (!rsp_els) {
5953                 ql_log(ql_log_warn, vha, 0x0183,
5954                     "Failed allocate dma buffer ELS RSP.\n");
5955                 goto dealloc;
5956         }
5957
5958         rsp_payload = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
5959             &rsp_payload_dma, GFP_KERNEL);
5960         if (!rsp_payload) {
5961                 ql_log(ql_log_warn, vha, 0x0184,
5962                     "Failed allocate dma buffer ELS RSP payload.\n");
5963                 goto dealloc;
5964         }
5965
5966         sfp = dma_alloc_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
5967             &sfp_dma, GFP_KERNEL);
5968
5969         stat = dma_alloc_coherent(&ha->pdev->dev, sizeof(*stat),
5970             &stat_dma, GFP_KERNEL);
5971
5972         bbc = dma_alloc_coherent(&ha->pdev->dev, sizeof(*bbc),
5973             &bbc_dma, GFP_KERNEL);
5974
5975         /* Prepare Response IOCB */
5976         rsp_els->entry_type = ELS_IOCB_TYPE;
5977         rsp_els->entry_count = 1;
5978         rsp_els->sys_define = 0;
5979         rsp_els->entry_status = 0;
5980         rsp_els->handle = 0;
5981         rsp_els->nport_handle = purex->nport_handle;
5982         rsp_els->tx_dsd_count = cpu_to_le16(1);
5983         rsp_els->vp_index = purex->vp_idx;
5984         rsp_els->sof_type = EST_SOFI3;
5985         rsp_els->rx_xchg_address = purex->rx_xchg_addr;
5986         rsp_els->rx_dsd_count = 0;
5987         rsp_els->opcode = purex->els_frame_payload[0];
5988
5989         rsp_els->d_id[0] = purex->s_id[0];
5990         rsp_els->d_id[1] = purex->s_id[1];
5991         rsp_els->d_id[2] = purex->s_id[2];
5992
5993         rsp_els->control_flags = cpu_to_le16(EPD_ELS_ACC);
5994         rsp_els->rx_byte_count = 0;
5995         rsp_els->tx_byte_count = cpu_to_le32(rsp_payload_length);
5996
5997         put_unaligned_le64(rsp_payload_dma, &rsp_els->tx_address);
5998         rsp_els->tx_len = rsp_els->tx_byte_count;
5999
6000         rsp_els->rx_address = 0;
6001         rsp_els->rx_len = 0;
6002
6003         /* Prepare Response Payload */
6004         rsp_payload->hdr.cmd = cpu_to_be32(0x2 << 24); /* LS_ACC */
6005         rsp_payload->hdr.len = cpu_to_be32(le32_to_cpu(rsp_els->tx_byte_count) -
6006                                            sizeof(rsp_payload->hdr));
6007
6008         /* Link service Request Info Descriptor */
6009         rsp_payload->ls_req_info_desc.desc_tag = cpu_to_be32(0x1);
6010         rsp_payload->ls_req_info_desc.desc_len =
6011             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc));
6012         rsp_payload->ls_req_info_desc.req_payload_word_0 =
6013             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
6014
6015         /* Link service Request Info Descriptor 2 */
6016         rsp_payload->ls_req_info_desc2.desc_tag = cpu_to_be32(0x1);
6017         rsp_payload->ls_req_info_desc2.desc_len =
6018             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc2));
6019         rsp_payload->ls_req_info_desc2.req_payload_word_0 =
6020             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
6021
6022
6023         rsp_payload->sfp_diag_desc.desc_tag = cpu_to_be32(0x10000);
6024         rsp_payload->sfp_diag_desc.desc_len =
6025                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->sfp_diag_desc));
6026
6027         if (sfp) {
6028                 /* SFP Flags */
6029                 memset(sfp, 0, SFP_RTDI_LEN);
6030                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x7, 2, 0);
6031                 if (!rval) {
6032                         /* SFP Flags bits 3-0: Port Tx Laser Type */
6033                         if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5))
6034                                 sfp_flags |= BIT_0; /* short wave */
6035                         else if (sfp[0] & BIT_1)
6036                                 sfp_flags |= BIT_1; /* long wave 1310nm */
6037                         else if (sfp[1] & BIT_4)
6038                                 sfp_flags |= BIT_1|BIT_0; /* long wave 1550nm */
6039                 }
6040
6041                 /* SFP Type */
6042                 memset(sfp, 0, SFP_RTDI_LEN);
6043                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x0, 1, 0);
6044                 if (!rval) {
6045                         sfp_flags |= BIT_4; /* optical */
6046                         if (sfp[0] == 0x3)
6047                                 sfp_flags |= BIT_6; /* sfp+ */
6048                 }
6049
6050                 rsp_payload->sfp_diag_desc.sfp_flags = cpu_to_be16(sfp_flags);
6051
6052                 /* SFP Diagnostics */
6053                 memset(sfp, 0, SFP_RTDI_LEN);
6054                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0x60, 10, 0);
6055                 if (!rval) {
6056                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6057                         rsp_payload->sfp_diag_desc.temperature = trx[0];
6058                         rsp_payload->sfp_diag_desc.vcc = trx[1];
6059                         rsp_payload->sfp_diag_desc.tx_bias = trx[2];
6060                         rsp_payload->sfp_diag_desc.tx_power = trx[3];
6061                         rsp_payload->sfp_diag_desc.rx_power = trx[4];
6062                 }
6063         }
6064
6065         /* Port Speed Descriptor */
6066         rsp_payload->port_speed_desc.desc_tag = cpu_to_be32(0x10001);
6067         rsp_payload->port_speed_desc.desc_len =
6068             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_speed_desc));
6069         rsp_payload->port_speed_desc.speed_capab = cpu_to_be16(
6070             qla25xx_rdp_port_speed_capability(ha));
6071         rsp_payload->port_speed_desc.operating_speed = cpu_to_be16(
6072             qla25xx_rdp_port_speed_currently(ha));
6073
6074         /* Link Error Status Descriptor */
6075         rsp_payload->ls_err_desc.desc_tag = cpu_to_be32(0x10002);
6076         rsp_payload->ls_err_desc.desc_len =
6077                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_err_desc));
6078
6079         if (stat) {
6080                 rval = qla24xx_get_isp_stats(vha, stat, stat_dma, 0);
6081                 if (!rval) {
6082                         rsp_payload->ls_err_desc.link_fail_cnt =
6083                             cpu_to_be32(le32_to_cpu(stat->link_fail_cnt));
6084                         rsp_payload->ls_err_desc.loss_sync_cnt =
6085                             cpu_to_be32(le32_to_cpu(stat->loss_sync_cnt));
6086                         rsp_payload->ls_err_desc.loss_sig_cnt =
6087                             cpu_to_be32(le32_to_cpu(stat->loss_sig_cnt));
6088                         rsp_payload->ls_err_desc.prim_seq_err_cnt =
6089                             cpu_to_be32(le32_to_cpu(stat->prim_seq_err_cnt));
6090                         rsp_payload->ls_err_desc.inval_xmit_word_cnt =
6091                             cpu_to_be32(le32_to_cpu(stat->inval_xmit_word_cnt));
6092                         rsp_payload->ls_err_desc.inval_crc_cnt =
6093                             cpu_to_be32(le32_to_cpu(stat->inval_crc_cnt));
6094                         rsp_payload->ls_err_desc.pn_port_phy_type |= BIT_6;
6095                 }
6096         }
6097
6098         /* Portname Descriptor */
6099         rsp_payload->port_name_diag_desc.desc_tag = cpu_to_be32(0x10003);
6100         rsp_payload->port_name_diag_desc.desc_len =
6101             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_diag_desc));
6102         memcpy(rsp_payload->port_name_diag_desc.WWNN,
6103             vha->node_name,
6104             sizeof(rsp_payload->port_name_diag_desc.WWNN));
6105         memcpy(rsp_payload->port_name_diag_desc.WWPN,
6106             vha->port_name,
6107             sizeof(rsp_payload->port_name_diag_desc.WWPN));
6108
6109         /* F-Port Portname Descriptor */
6110         rsp_payload->port_name_direct_desc.desc_tag = cpu_to_be32(0x10003);
6111         rsp_payload->port_name_direct_desc.desc_len =
6112             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_direct_desc));
6113         memcpy(rsp_payload->port_name_direct_desc.WWNN,
6114             vha->fabric_node_name,
6115             sizeof(rsp_payload->port_name_direct_desc.WWNN));
6116         memcpy(rsp_payload->port_name_direct_desc.WWPN,
6117             vha->fabric_port_name,
6118             sizeof(rsp_payload->port_name_direct_desc.WWPN));
6119
6120         /* Bufer Credit Descriptor */
6121         rsp_payload->buffer_credit_desc.desc_tag = cpu_to_be32(0x10006);
6122         rsp_payload->buffer_credit_desc.desc_len =
6123                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->buffer_credit_desc));
6124         rsp_payload->buffer_credit_desc.fcport_b2b = 0;
6125         rsp_payload->buffer_credit_desc.attached_fcport_b2b = cpu_to_be32(0);
6126         rsp_payload->buffer_credit_desc.fcport_rtt = cpu_to_be32(0);
6127
6128         if (bbc) {
6129                 memset(bbc, 0, sizeof(*bbc));
6130                 rval = qla24xx_get_buffer_credits(vha, bbc, bbc_dma);
6131                 if (!rval) {
6132                         rsp_payload->buffer_credit_desc.fcport_b2b =
6133                             cpu_to_be32(LSW(bbc->parameter[0]));
6134                 }
6135         }
6136
6137         if (rsp_payload_length < sizeof(*rsp_payload))
6138                 goto send;
6139
6140         /* Optical Element Descriptor, Temperature */
6141         rsp_payload->optical_elmt_desc[0].desc_tag = cpu_to_be32(0x10007);
6142         rsp_payload->optical_elmt_desc[0].desc_len =
6143                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6144         /* Optical Element Descriptor, Voltage */
6145         rsp_payload->optical_elmt_desc[1].desc_tag = cpu_to_be32(0x10007);
6146         rsp_payload->optical_elmt_desc[1].desc_len =
6147                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6148         /* Optical Element Descriptor, Tx Bias Current */
6149         rsp_payload->optical_elmt_desc[2].desc_tag = cpu_to_be32(0x10007);
6150         rsp_payload->optical_elmt_desc[2].desc_len =
6151                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6152         /* Optical Element Descriptor, Tx Power */
6153         rsp_payload->optical_elmt_desc[3].desc_tag = cpu_to_be32(0x10007);
6154         rsp_payload->optical_elmt_desc[3].desc_len =
6155                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6156         /* Optical Element Descriptor, Rx Power */
6157         rsp_payload->optical_elmt_desc[4].desc_tag = cpu_to_be32(0x10007);
6158         rsp_payload->optical_elmt_desc[4].desc_len =
6159                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6160
6161         if (sfp) {
6162                 memset(sfp, 0, SFP_RTDI_LEN);
6163                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0, 64, 0);
6164                 if (!rval) {
6165                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6166
6167                         /* Optical Element Descriptor, Temperature */
6168                         rsp_payload->optical_elmt_desc[0].high_alarm = trx[0];
6169                         rsp_payload->optical_elmt_desc[0].low_alarm = trx[1];
6170                         rsp_payload->optical_elmt_desc[0].high_warn = trx[2];
6171                         rsp_payload->optical_elmt_desc[0].low_warn = trx[3];
6172                         rsp_payload->optical_elmt_desc[0].element_flags =
6173                             cpu_to_be32(1 << 28);
6174
6175                         /* Optical Element Descriptor, Voltage */
6176                         rsp_payload->optical_elmt_desc[1].high_alarm = trx[4];
6177                         rsp_payload->optical_elmt_desc[1].low_alarm = trx[5];
6178                         rsp_payload->optical_elmt_desc[1].high_warn = trx[6];
6179                         rsp_payload->optical_elmt_desc[1].low_warn = trx[7];
6180                         rsp_payload->optical_elmt_desc[1].element_flags =
6181                             cpu_to_be32(2 << 28);
6182
6183                         /* Optical Element Descriptor, Tx Bias Current */
6184                         rsp_payload->optical_elmt_desc[2].high_alarm = trx[8];
6185                         rsp_payload->optical_elmt_desc[2].low_alarm = trx[9];
6186                         rsp_payload->optical_elmt_desc[2].high_warn = trx[10];
6187                         rsp_payload->optical_elmt_desc[2].low_warn = trx[11];
6188                         rsp_payload->optical_elmt_desc[2].element_flags =
6189                             cpu_to_be32(3 << 28);
6190
6191                         /* Optical Element Descriptor, Tx Power */
6192                         rsp_payload->optical_elmt_desc[3].high_alarm = trx[12];
6193                         rsp_payload->optical_elmt_desc[3].low_alarm = trx[13];
6194                         rsp_payload->optical_elmt_desc[3].high_warn = trx[14];
6195                         rsp_payload->optical_elmt_desc[3].low_warn = trx[15];
6196                         rsp_payload->optical_elmt_desc[3].element_flags =
6197                             cpu_to_be32(4 << 28);
6198
6199                         /* Optical Element Descriptor, Rx Power */
6200                         rsp_payload->optical_elmt_desc[4].high_alarm = trx[16];
6201                         rsp_payload->optical_elmt_desc[4].low_alarm = trx[17];
6202                         rsp_payload->optical_elmt_desc[4].high_warn = trx[18];
6203                         rsp_payload->optical_elmt_desc[4].low_warn = trx[19];
6204                         rsp_payload->optical_elmt_desc[4].element_flags =
6205                             cpu_to_be32(5 << 28);
6206                 }
6207
6208                 memset(sfp, 0, SFP_RTDI_LEN);
6209                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 112, 64, 0);
6210                 if (!rval) {
6211                         /* Temperature high/low alarm/warning */
6212                         rsp_payload->optical_elmt_desc[0].element_flags |=
6213                             cpu_to_be32(
6214                                 (sfp[0] >> 7 & 1) << 3 |
6215                                 (sfp[0] >> 6 & 1) << 2 |
6216                                 (sfp[4] >> 7 & 1) << 1 |
6217                                 (sfp[4] >> 6 & 1) << 0);
6218
6219                         /* Voltage high/low alarm/warning */
6220                         rsp_payload->optical_elmt_desc[1].element_flags |=
6221                             cpu_to_be32(
6222                                 (sfp[0] >> 5 & 1) << 3 |
6223                                 (sfp[0] >> 4 & 1) << 2 |
6224                                 (sfp[4] >> 5 & 1) << 1 |
6225                                 (sfp[4] >> 4 & 1) << 0);
6226
6227                         /* Tx Bias Current high/low alarm/warning */
6228                         rsp_payload->optical_elmt_desc[2].element_flags |=
6229                             cpu_to_be32(
6230                                 (sfp[0] >> 3 & 1) << 3 |
6231                                 (sfp[0] >> 2 & 1) << 2 |
6232                                 (sfp[4] >> 3 & 1) << 1 |
6233                                 (sfp[4] >> 2 & 1) << 0);
6234
6235                         /* Tx Power high/low alarm/warning */
6236                         rsp_payload->optical_elmt_desc[3].element_flags |=
6237                             cpu_to_be32(
6238                                 (sfp[0] >> 1 & 1) << 3 |
6239                                 (sfp[0] >> 0 & 1) << 2 |
6240                                 (sfp[4] >> 1 & 1) << 1 |
6241                                 (sfp[4] >> 0 & 1) << 0);
6242
6243                         /* Rx Power high/low alarm/warning */
6244                         rsp_payload->optical_elmt_desc[4].element_flags |=
6245                             cpu_to_be32(
6246                                 (sfp[1] >> 7 & 1) << 3 |
6247                                 (sfp[1] >> 6 & 1) << 2 |
6248                                 (sfp[5] >> 7 & 1) << 1 |
6249                                 (sfp[5] >> 6 & 1) << 0);
6250                 }
6251         }
6252
6253         /* Optical Product Data Descriptor */
6254         rsp_payload->optical_prod_desc.desc_tag = cpu_to_be32(0x10008);
6255         rsp_payload->optical_prod_desc.desc_len =
6256                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->optical_prod_desc));
6257
6258         if (sfp) {
6259                 memset(sfp, 0, SFP_RTDI_LEN);
6260                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 20, 64, 0);
6261                 if (!rval) {
6262                         memcpy(rsp_payload->optical_prod_desc.vendor_name,
6263                             sfp + 0,
6264                             sizeof(rsp_payload->optical_prod_desc.vendor_name));
6265                         memcpy(rsp_payload->optical_prod_desc.part_number,
6266                             sfp + 20,
6267                             sizeof(rsp_payload->optical_prod_desc.part_number));
6268                         memcpy(rsp_payload->optical_prod_desc.revision,
6269                             sfp + 36,
6270                             sizeof(rsp_payload->optical_prod_desc.revision));
6271                         memcpy(rsp_payload->optical_prod_desc.serial_number,
6272                             sfp + 48,
6273                             sizeof(rsp_payload->optical_prod_desc.serial_number));
6274                 }
6275
6276                 memset(sfp, 0, SFP_RTDI_LEN);
6277                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 84, 8, 0);
6278                 if (!rval) {
6279                         memcpy(rsp_payload->optical_prod_desc.date,
6280                             sfp + 0,
6281                             sizeof(rsp_payload->optical_prod_desc.date));
6282                 }
6283         }
6284
6285 send:
6286         ql_dbg(ql_dbg_init, vha, 0x0183,
6287             "Sending ELS Response to RDP Request...\n");
6288         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0184,
6289             "-------- ELS RSP -------\n");
6290         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0185,
6291             rsp_els, sizeof(*rsp_els));
6292         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0186,
6293             "-------- ELS RSP PAYLOAD -------\n");
6294         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0187,
6295             rsp_payload, rsp_payload_length);
6296
6297         rval = qla2x00_issue_iocb(vha, rsp_els, rsp_els_dma, 0);
6298
6299         if (rval) {
6300                 ql_log(ql_log_warn, vha, 0x0188,
6301                     "%s: iocb failed to execute -> %x\n", __func__, rval);
6302         } else if (rsp_els->comp_status) {
6303                 ql_log(ql_log_warn, vha, 0x0189,
6304                     "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
6305                     __func__, rsp_els->comp_status,
6306                     rsp_els->error_subcode_1, rsp_els->error_subcode_2);
6307         } else {
6308                 ql_dbg(ql_dbg_init, vha, 0x018a, "%s: done.\n", __func__);
6309         }
6310
6311 dealloc:
6312         if (bbc)
6313                 dma_free_coherent(&ha->pdev->dev, sizeof(*bbc),
6314                     bbc, bbc_dma);
6315         if (stat)
6316                 dma_free_coherent(&ha->pdev->dev, sizeof(*stat),
6317                     stat, stat_dma);
6318         if (sfp)
6319                 dma_free_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
6320                     sfp, sfp_dma);
6321         if (rsp_payload)
6322                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
6323                     rsp_payload, rsp_payload_dma);
6324         if (rsp_els)
6325                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els),
6326                     rsp_els, rsp_els_dma);
6327 }
6328
6329 void
6330 qla24xx_free_purex_item(struct purex_item *item)
6331 {
6332         if (item == &item->vha->default_item)
6333                 memset(&item->vha->default_item, 0, sizeof(struct purex_item));
6334         else
6335                 kfree(item);
6336 }
6337
6338 void qla24xx_process_purex_list(struct purex_list *list)
6339 {
6340         struct list_head head = LIST_HEAD_INIT(head);
6341         struct purex_item *item, *next;
6342         ulong flags;
6343
6344         spin_lock_irqsave(&list->lock, flags);
6345         list_splice_init(&list->head, &head);
6346         spin_unlock_irqrestore(&list->lock, flags);
6347
6348         list_for_each_entry_safe(item, next, &head, list) {
6349                 list_del(&item->list);
6350                 item->process_item(item->vha, item);
6351                 qla24xx_free_purex_item(item);
6352         }
6353 }
6354
6355 void
6356 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
6357 {
6358 #if 0
6359         uint16_t options = (requester_id << 15) | BIT_7;
6360 #endif
6361         uint16_t retry;
6362         uint32_t data;
6363         struct qla_hw_data *ha = base_vha->hw;
6364
6365         /* IDC-unlock implementation using driver-unlock/lock-id
6366          * remote registers
6367          */
6368         retry = 0;
6369 retry_unlock:
6370         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
6371             == QLA_SUCCESS) {
6372                 if (data == ha->portnum) {
6373                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
6374                         /* Clearing lock-id by setting 0xff */
6375                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
6376                 } else if (retry < 10) {
6377                         /* SV: XXX: IDC unlock retrying needed here? */
6378
6379                         /* Retry for IDC-unlock */
6380                         qla83xx_wait_logic();
6381                         retry++;
6382                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
6383                             "Failed to release IDC lock, retrying=%d\n", retry);
6384                         goto retry_unlock;
6385                 }
6386         } else if (retry < 10) {
6387                 /* Retry for IDC-unlock */
6388                 qla83xx_wait_logic();
6389                 retry++;
6390                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
6391                     "Failed to read drv-lockid, retrying=%d\n", retry);
6392                 goto retry_unlock;
6393         }
6394
6395         return;
6396
6397 #if 0
6398         /* XXX: IDC-unlock implementation using access-control mbx */
6399         retry = 0;
6400 retry_unlock2:
6401         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
6402                 if (retry < 10) {
6403                         /* Retry for IDC-unlock */
6404                         qla83xx_wait_logic();
6405                         retry++;
6406                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
6407                             "Failed to release IDC lock, retrying=%d\n", retry);
6408                         goto retry_unlock2;
6409                 }
6410         }
6411
6412         return;
6413 #endif
6414 }
6415
6416 int
6417 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6418 {
6419         int rval = QLA_SUCCESS;
6420         struct qla_hw_data *ha = vha->hw;
6421         uint32_t drv_presence;
6422
6423         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6424         if (rval == QLA_SUCCESS) {
6425                 drv_presence |= (1 << ha->portnum);
6426                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6427                     drv_presence);
6428         }
6429
6430         return rval;
6431 }
6432
6433 int
6434 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6435 {
6436         int rval = QLA_SUCCESS;
6437
6438         qla83xx_idc_lock(vha, 0);
6439         rval = __qla83xx_set_drv_presence(vha);
6440         qla83xx_idc_unlock(vha, 0);
6441
6442         return rval;
6443 }
6444
6445 int
6446 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6447 {
6448         int rval = QLA_SUCCESS;
6449         struct qla_hw_data *ha = vha->hw;
6450         uint32_t drv_presence;
6451
6452         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6453         if (rval == QLA_SUCCESS) {
6454                 drv_presence &= ~(1 << ha->portnum);
6455                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6456                     drv_presence);
6457         }
6458
6459         return rval;
6460 }
6461
6462 int
6463 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6464 {
6465         int rval = QLA_SUCCESS;
6466
6467         qla83xx_idc_lock(vha, 0);
6468         rval = __qla83xx_clear_drv_presence(vha);
6469         qla83xx_idc_unlock(vha, 0);
6470
6471         return rval;
6472 }
6473
6474 static void
6475 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
6476 {
6477         struct qla_hw_data *ha = vha->hw;
6478         uint32_t drv_ack, drv_presence;
6479         unsigned long ack_timeout;
6480
6481         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
6482         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
6483         while (1) {
6484                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6485                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6486                 if ((drv_ack & drv_presence) == drv_presence)
6487                         break;
6488
6489                 if (time_after_eq(jiffies, ack_timeout)) {
6490                         ql_log(ql_log_warn, vha, 0xb067,
6491                             "RESET ACK TIMEOUT! drv_presence=0x%x "
6492                             "drv_ack=0x%x\n", drv_presence, drv_ack);
6493                         /*
6494                          * The function(s) which did not ack in time are forced
6495                          * to withdraw any further participation in the IDC
6496                          * reset.
6497                          */
6498                         if (drv_ack != drv_presence)
6499                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6500                                     drv_ack);
6501                         break;
6502                 }
6503
6504                 qla83xx_idc_unlock(vha, 0);
6505                 msleep(1000);
6506                 qla83xx_idc_lock(vha, 0);
6507         }
6508
6509         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
6510         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
6511 }
6512
6513 static int
6514 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
6515 {
6516         int rval = QLA_SUCCESS;
6517         uint32_t idc_control;
6518
6519         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
6520         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
6521
6522         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
6523         __qla83xx_get_idc_control(vha, &idc_control);
6524         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
6525         __qla83xx_set_idc_control(vha, 0);
6526
6527         qla83xx_idc_unlock(vha, 0);
6528         rval = qla83xx_restart_nic_firmware(vha);
6529         qla83xx_idc_lock(vha, 0);
6530
6531         if (rval != QLA_SUCCESS) {
6532                 ql_log(ql_log_fatal, vha, 0xb06a,
6533                     "Failed to restart NIC f/w.\n");
6534                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
6535                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
6536         } else {
6537                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
6538                     "Success in restarting nic f/w.\n");
6539                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
6540                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
6541         }
6542
6543         return rval;
6544 }
6545
6546 /* Assumes idc_lock always held on entry */
6547 int
6548 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
6549 {
6550         struct qla_hw_data *ha = base_vha->hw;
6551         int rval = QLA_SUCCESS;
6552         unsigned long dev_init_timeout;
6553         uint32_t dev_state;
6554
6555         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
6556         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
6557
6558         while (1) {
6559
6560                 if (time_after_eq(jiffies, dev_init_timeout)) {
6561                         ql_log(ql_log_warn, base_vha, 0xb06e,
6562                             "Initialization TIMEOUT!\n");
6563                         /* Init timeout. Disable further NIC Core
6564                          * communication.
6565                          */
6566                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
6567                                 QLA8XXX_DEV_FAILED);
6568                         ql_log(ql_log_info, base_vha, 0xb06f,
6569                             "HW State: FAILED.\n");
6570                 }
6571
6572                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6573                 switch (dev_state) {
6574                 case QLA8XXX_DEV_READY:
6575                         if (ha->flags.nic_core_reset_owner)
6576                                 qla83xx_idc_audit(base_vha,
6577                                     IDC_AUDIT_COMPLETION);
6578                         ha->flags.nic_core_reset_owner = 0;
6579                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
6580                             "Reset_owner reset by 0x%x.\n",
6581                             ha->portnum);
6582                         goto exit;
6583                 case QLA8XXX_DEV_COLD:
6584                         if (ha->flags.nic_core_reset_owner)
6585                                 rval = qla83xx_device_bootstrap(base_vha);
6586                         else {
6587                         /* Wait for AEN to change device-state */
6588                                 qla83xx_idc_unlock(base_vha, 0);
6589                                 msleep(1000);
6590                                 qla83xx_idc_lock(base_vha, 0);
6591                         }
6592                         break;
6593                 case QLA8XXX_DEV_INITIALIZING:
6594                         /* Wait for AEN to change device-state */
6595                         qla83xx_idc_unlock(base_vha, 0);
6596                         msleep(1000);
6597                         qla83xx_idc_lock(base_vha, 0);
6598                         break;
6599                 case QLA8XXX_DEV_NEED_RESET:
6600                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
6601                                 qla83xx_need_reset_handler(base_vha);
6602                         else {
6603                                 /* Wait for AEN to change device-state */
6604                                 qla83xx_idc_unlock(base_vha, 0);
6605                                 msleep(1000);
6606                                 qla83xx_idc_lock(base_vha, 0);
6607                         }
6608                         /* reset timeout value after need reset handler */
6609                         dev_init_timeout = jiffies +
6610                             (ha->fcoe_dev_init_timeout * HZ);
6611                         break;
6612                 case QLA8XXX_DEV_NEED_QUIESCENT:
6613                         /* XXX: DEBUG for now */
6614                         qla83xx_idc_unlock(base_vha, 0);
6615                         msleep(1000);
6616                         qla83xx_idc_lock(base_vha, 0);
6617                         break;
6618                 case QLA8XXX_DEV_QUIESCENT:
6619                         /* XXX: DEBUG for now */
6620                         if (ha->flags.quiesce_owner)
6621                                 goto exit;
6622
6623                         qla83xx_idc_unlock(base_vha, 0);
6624                         msleep(1000);
6625                         qla83xx_idc_lock(base_vha, 0);
6626                         dev_init_timeout = jiffies +
6627                             (ha->fcoe_dev_init_timeout * HZ);
6628                         break;
6629                 case QLA8XXX_DEV_FAILED:
6630                         if (ha->flags.nic_core_reset_owner)
6631                                 qla83xx_idc_audit(base_vha,
6632                                     IDC_AUDIT_COMPLETION);
6633                         ha->flags.nic_core_reset_owner = 0;
6634                         __qla83xx_clear_drv_presence(base_vha);
6635                         qla83xx_idc_unlock(base_vha, 0);
6636                         qla8xxx_dev_failed_handler(base_vha);
6637                         rval = QLA_FUNCTION_FAILED;
6638                         qla83xx_idc_lock(base_vha, 0);
6639                         goto exit;
6640                 case QLA8XXX_BAD_VALUE:
6641                         qla83xx_idc_unlock(base_vha, 0);
6642                         msleep(1000);
6643                         qla83xx_idc_lock(base_vha, 0);
6644                         break;
6645                 default:
6646                         ql_log(ql_log_warn, base_vha, 0xb071,
6647                             "Unknown Device State: %x.\n", dev_state);
6648                         qla83xx_idc_unlock(base_vha, 0);
6649                         qla8xxx_dev_failed_handler(base_vha);
6650                         rval = QLA_FUNCTION_FAILED;
6651                         qla83xx_idc_lock(base_vha, 0);
6652                         goto exit;
6653                 }
6654         }
6655
6656 exit:
6657         return rval;
6658 }
6659
6660 void
6661 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6662 {
6663         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6664             board_disable);
6665         struct pci_dev *pdev = ha->pdev;
6666         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6667
6668         ql_log(ql_log_warn, base_vha, 0x015b,
6669             "Disabling adapter.\n");
6670
6671         if (!atomic_read(&pdev->enable_cnt)) {
6672                 ql_log(ql_log_info, base_vha, 0xfffc,
6673                     "PCI device disabled, no action req for PCI error=%lx\n",
6674                     base_vha->pci_flags);
6675                 return;
6676         }
6677
6678         /*
6679          * if UNLOADING flag is already set, then continue unload,
6680          * where it was set first.
6681          */
6682         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
6683                 return;
6684
6685         qla2x00_wait_for_sess_deletion(base_vha);
6686
6687         qla2x00_delete_all_vps(ha, base_vha);
6688
6689         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6690
6691         qla2x00_dfs_remove(base_vha);
6692
6693         qla84xx_put_chip(base_vha);
6694
6695         if (base_vha->timer_active)
6696                 qla2x00_stop_timer(base_vha);
6697
6698         base_vha->flags.online = 0;
6699
6700         qla2x00_destroy_deferred_work(ha);
6701
6702         /*
6703          * Do not try to stop beacon blink as it will issue a mailbox
6704          * command.
6705          */
6706         qla2x00_free_sysfs_attr(base_vha, false);
6707
6708         fc_remove_host(base_vha->host);
6709
6710         scsi_remove_host(base_vha->host);
6711
6712         base_vha->flags.init_done = 0;
6713         qla25xx_delete_queues(base_vha);
6714         qla2x00_free_fcports(base_vha);
6715         qla2x00_free_irqs(base_vha);
6716         qla2x00_mem_free(ha);
6717         qla82xx_md_free(base_vha);
6718         qla2x00_free_queues(ha);
6719
6720         qla2x00_unmap_iobases(ha);
6721
6722         pci_release_selected_regions(ha->pdev, ha->bars);
6723         pci_disable_pcie_error_reporting(pdev);
6724         pci_disable_device(pdev);
6725
6726         /*
6727          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6728          */
6729 }
6730
6731 /**************************************************************************
6732 * qla2x00_do_dpc
6733 *   This kernel thread is a task that is schedule by the interrupt handler
6734 *   to perform the background processing for interrupts.
6735 *
6736 * Notes:
6737 * This task always run in the context of a kernel thread.  It
6738 * is kick-off by the driver's detect code and starts up
6739 * up one per adapter. It immediately goes to sleep and waits for
6740 * some fibre event.  When either the interrupt handler or
6741 * the timer routine detects a event it will one of the task
6742 * bits then wake us up.
6743 **************************************************************************/
6744 static int
6745 qla2x00_do_dpc(void *data)
6746 {
6747         scsi_qla_host_t *base_vha;
6748         struct qla_hw_data *ha;
6749         uint32_t online;
6750         struct qla_qpair *qpair;
6751
6752         ha = (struct qla_hw_data *)data;
6753         base_vha = pci_get_drvdata(ha->pdev);
6754
6755         set_user_nice(current, MIN_NICE);
6756
6757         set_current_state(TASK_INTERRUPTIBLE);
6758         while (!kthread_should_stop()) {
6759                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6760                     "DPC handler sleeping.\n");
6761
6762                 schedule();
6763
6764                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6765                         goto end_loop;
6766
6767                 if (ha->flags.eeh_busy) {
6768                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6769                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6770                         goto end_loop;
6771                 }
6772
6773                 ha->dpc_active = 1;
6774
6775                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6776                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6777                     base_vha->dpc_flags);
6778
6779                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6780                         break;
6781
6782                 if (IS_P3P_TYPE(ha)) {
6783                         if (IS_QLA8044(ha)) {
6784                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6785                                         &base_vha->dpc_flags)) {
6786                                         qla8044_idc_lock(ha);
6787                                         qla8044_wr_direct(base_vha,
6788                                                 QLA8044_CRB_DEV_STATE_INDEX,
6789                                                 QLA8XXX_DEV_FAILED);
6790                                         qla8044_idc_unlock(ha);
6791                                         ql_log(ql_log_info, base_vha, 0x4004,
6792                                                 "HW State: FAILED.\n");
6793                                         qla8044_device_state_handler(base_vha);
6794                                         continue;
6795                                 }
6796
6797                         } else {
6798                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6799                                         &base_vha->dpc_flags)) {
6800                                         qla82xx_idc_lock(ha);
6801                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6802                                                 QLA8XXX_DEV_FAILED);
6803                                         qla82xx_idc_unlock(ha);
6804                                         ql_log(ql_log_info, base_vha, 0x0151,
6805                                                 "HW State: FAILED.\n");
6806                                         qla82xx_device_state_handler(base_vha);
6807                                         continue;
6808                                 }
6809                         }
6810
6811                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6812                                 &base_vha->dpc_flags)) {
6813
6814                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6815                                     "FCoE context reset scheduled.\n");
6816                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6817                                         &base_vha->dpc_flags))) {
6818                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6819                                                 /* FCoE-ctx reset failed.
6820                                                  * Escalate to chip-reset
6821                                                  */
6822                                                 set_bit(ISP_ABORT_NEEDED,
6823                                                         &base_vha->dpc_flags);
6824                                         }
6825                                         clear_bit(ABORT_ISP_ACTIVE,
6826                                                 &base_vha->dpc_flags);
6827                                 }
6828
6829                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6830                                     "FCoE context reset end.\n");
6831                         }
6832                 } else if (IS_QLAFX00(ha)) {
6833                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6834                                 &base_vha->dpc_flags)) {
6835                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6836                                     "Firmware Reset Recovery\n");
6837                                 if (qlafx00_reset_initialize(base_vha)) {
6838                                         /* Failed. Abort isp later. */
6839                                         if (!test_bit(UNLOADING,
6840                                             &base_vha->dpc_flags)) {
6841                                                 set_bit(ISP_UNRECOVERABLE,
6842                                                     &base_vha->dpc_flags);
6843                                                 ql_dbg(ql_dbg_dpc, base_vha,
6844                                                     0x4021,
6845                                                     "Reset Recovery Failed\n");
6846                                         }
6847                                 }
6848                         }
6849
6850                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6851                                 &base_vha->dpc_flags)) {
6852                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6853                                     "ISPFx00 Target Scan scheduled\n");
6854                                 if (qlafx00_rescan_isp(base_vha)) {
6855                                         if (!test_bit(UNLOADING,
6856                                             &base_vha->dpc_flags))
6857                                                 set_bit(ISP_UNRECOVERABLE,
6858                                                     &base_vha->dpc_flags);
6859                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6860                                             "ISPFx00 Target Scan Failed\n");
6861                                 }
6862                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6863                                     "ISPFx00 Target Scan End\n");
6864                         }
6865                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6866                                 &base_vha->dpc_flags)) {
6867                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6868                                     "ISPFx00 Host Info resend scheduled\n");
6869                                 qlafx00_fx_disc(base_vha,
6870                                     &base_vha->hw->mr.fcport,
6871                                     FXDISC_REG_HOST_INFO);
6872                         }
6873                 }
6874
6875                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6876                     &base_vha->dpc_flags)) {
6877                         /* Semantic:
6878                          *  - NO-OP -- await next ISP-ABORT. Preferred method
6879                          *             to minimize disruptions that will occur
6880                          *             when a forced chip-reset occurs.
6881                          *  - Force -- ISP-ABORT scheduled.
6882                          */
6883                         /* set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); */
6884                 }
6885
6886                 if (test_and_clear_bit
6887                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6888                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6889                         bool do_reset = true;
6890
6891                         switch (base_vha->qlini_mode) {
6892                         case QLA2XXX_INI_MODE_ENABLED:
6893                                 break;
6894                         case QLA2XXX_INI_MODE_DISABLED:
6895                                 if (!qla_tgt_mode_enabled(base_vha) &&
6896                                     !ha->flags.fw_started)
6897                                         do_reset = false;
6898                                 break;
6899                         case QLA2XXX_INI_MODE_DUAL:
6900                                 if (!qla_dual_mode_enabled(base_vha) &&
6901                                     !ha->flags.fw_started)
6902                                         do_reset = false;
6903                                 break;
6904                         default:
6905                                 break;
6906                         }
6907
6908                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6909                             &base_vha->dpc_flags))) {
6910                                 base_vha->flags.online = 1;
6911                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6912                                     "ISP abort scheduled.\n");
6913                                 if (ha->isp_ops->abort_isp(base_vha)) {
6914                                         /* failed. retry later */
6915                                         set_bit(ISP_ABORT_NEEDED,
6916                                             &base_vha->dpc_flags);
6917                                 }
6918                                 clear_bit(ABORT_ISP_ACTIVE,
6919                                                 &base_vha->dpc_flags);
6920                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6921                                     "ISP abort end.\n");
6922                         }
6923                 }
6924
6925                 if (test_bit(PROCESS_PUREX_IOCB, &base_vha->dpc_flags)) {
6926                         if (atomic_read(&base_vha->loop_state) == LOOP_READY) {
6927                                 qla24xx_process_purex_list
6928                                         (&base_vha->purex_list);
6929                                 clear_bit(PROCESS_PUREX_IOCB,
6930                                     &base_vha->dpc_flags);
6931                         }
6932                 }
6933
6934                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6935                     &base_vha->dpc_flags)) {
6936                         qla2x00_update_fcports(base_vha);
6937                 }
6938
6939                 if (IS_QLAFX00(ha))
6940                         goto loop_resync_check;
6941
6942                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6943                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6944                             "Quiescence mode scheduled.\n");
6945                         if (IS_P3P_TYPE(ha)) {
6946                                 if (IS_QLA82XX(ha))
6947                                         qla82xx_device_state_handler(base_vha);
6948                                 if (IS_QLA8044(ha))
6949                                         qla8044_device_state_handler(base_vha);
6950                                 clear_bit(ISP_QUIESCE_NEEDED,
6951                                     &base_vha->dpc_flags);
6952                                 if (!ha->flags.quiesce_owner) {
6953                                         qla2x00_perform_loop_resync(base_vha);
6954                                         if (IS_QLA82XX(ha)) {
6955                                                 qla82xx_idc_lock(ha);
6956                                                 qla82xx_clear_qsnt_ready(
6957                                                     base_vha);
6958                                                 qla82xx_idc_unlock(ha);
6959                                         } else if (IS_QLA8044(ha)) {
6960                                                 qla8044_idc_lock(ha);
6961                                                 qla8044_clear_qsnt_ready(
6962                                                     base_vha);
6963                                                 qla8044_idc_unlock(ha);
6964                                         }
6965                                 }
6966                         } else {
6967                                 clear_bit(ISP_QUIESCE_NEEDED,
6968                                     &base_vha->dpc_flags);
6969                                 qla2x00_quiesce_io(base_vha);
6970                         }
6971                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6972                             "Quiescence mode end.\n");
6973                 }
6974
6975                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6976                                 &base_vha->dpc_flags) &&
6977                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6978
6979                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6980                             "Reset marker scheduled.\n");
6981                         qla2x00_rst_aen(base_vha);
6982                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6983                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6984                             "Reset marker end.\n");
6985                 }
6986
6987                 /* Retry each device up to login retry count */
6988                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6989                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6990                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6991
6992                         if (!base_vha->relogin_jif ||
6993                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6994                                 base_vha->relogin_jif = jiffies + HZ;
6995                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6996
6997                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6998                                     "Relogin scheduled.\n");
6999                                 qla24xx_post_relogin_work(base_vha);
7000                         }
7001                 }
7002 loop_resync_check:
7003                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
7004                     &base_vha->dpc_flags)) {
7005
7006                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
7007                             "Loop resync scheduled.\n");
7008
7009                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
7010                             &base_vha->dpc_flags))) {
7011
7012                                 qla2x00_loop_resync(base_vha);
7013
7014                                 clear_bit(LOOP_RESYNC_ACTIVE,
7015                                                 &base_vha->dpc_flags);
7016                         }
7017
7018                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
7019                             "Loop resync end.\n");
7020                 }
7021
7022                 if (IS_QLAFX00(ha))
7023                         goto intr_on_check;
7024
7025                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
7026                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
7027                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
7028                         qla2xxx_flash_npiv_conf(base_vha);
7029                 }
7030
7031 intr_on_check:
7032                 if (!ha->interrupts_on)
7033                         ha->isp_ops->enable_intrs(ha);
7034
7035                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
7036                                         &base_vha->dpc_flags)) {
7037                         if (ha->beacon_blink_led == 1)
7038                                 ha->isp_ops->beacon_blink(base_vha);
7039                 }
7040
7041                 /* qpair online check */
7042                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
7043                     &base_vha->dpc_flags)) {
7044                         if (ha->flags.eeh_busy ||
7045                             ha->flags.pci_channel_io_perm_failure)
7046                                 online = 0;
7047                         else
7048                                 online = 1;
7049
7050                         mutex_lock(&ha->mq_lock);
7051                         list_for_each_entry(qpair, &base_vha->qp_list,
7052                             qp_list_elem)
7053                         qpair->online = online;
7054                         mutex_unlock(&ha->mq_lock);
7055                 }
7056
7057                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
7058                     &base_vha->dpc_flags)) {
7059                         ql_log(ql_log_info, base_vha, 0xffffff,
7060                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
7061                                                 ha->nvme_last_rptd_aen);
7062                         if (qla27xx_set_zio_threshold(base_vha,
7063                             ha->nvme_last_rptd_aen)) {
7064                                 ql_log(ql_log_info, base_vha, 0xffffff,
7065                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
7066                                     ha->nvme_last_rptd_aen);
7067                         }
7068                 }
7069
7070                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
7071                     &base_vha->dpc_flags)) {
7072                         ql_log(ql_log_info, base_vha, 0xffffff,
7073                             "SET ZIO Activity exchange threshold to %d.\n",
7074                             ha->last_zio_threshold);
7075                         qla27xx_set_zio_threshold(base_vha,
7076                             ha->last_zio_threshold);
7077                 }
7078
7079                 if (!IS_QLAFX00(ha))
7080                         qla2x00_do_dpc_all_vps(base_vha);
7081
7082                 if (test_and_clear_bit(N2N_LINK_RESET,
7083                         &base_vha->dpc_flags)) {
7084                         qla2x00_lip_reset(base_vha);
7085                 }
7086
7087                 ha->dpc_active = 0;
7088 end_loop:
7089                 set_current_state(TASK_INTERRUPTIBLE);
7090         } /* End of while(1) */
7091         __set_current_state(TASK_RUNNING);
7092
7093         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
7094             "DPC handler exiting.\n");
7095
7096         /*
7097          * Make sure that nobody tries to wake us up again.
7098          */
7099         ha->dpc_active = 0;
7100
7101         /* Cleanup any residual CTX SRBs. */
7102         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
7103
7104         return 0;
7105 }
7106
7107 void
7108 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
7109 {
7110         struct qla_hw_data *ha = vha->hw;
7111         struct task_struct *t = ha->dpc_thread;
7112
7113         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
7114                 wake_up_process(t);
7115 }
7116
7117 /*
7118 *  qla2x00_rst_aen
7119 *      Processes asynchronous reset.
7120 *
7121 * Input:
7122 *      ha  = adapter block pointer.
7123 */
7124 static void
7125 qla2x00_rst_aen(scsi_qla_host_t *vha)
7126 {
7127         if (vha->flags.online && !vha->flags.reset_active &&
7128             !atomic_read(&vha->loop_down_timer) &&
7129             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
7130                 do {
7131                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7132
7133                         /*
7134                          * Issue marker command only when we are going to start
7135                          * the I/O.
7136                          */
7137                         vha->marker_needed = 1;
7138                 } while (!atomic_read(&vha->loop_down_timer) &&
7139                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
7140         }
7141 }
7142
7143 /**************************************************************************
7144 *   qla2x00_timer
7145 *
7146 * Description:
7147 *   One second timer
7148 *
7149 * Context: Interrupt
7150 ***************************************************************************/
7151 void
7152 qla2x00_timer(struct timer_list *t)
7153 {
7154         scsi_qla_host_t *vha = from_timer(vha, t, timer);
7155         unsigned long   cpu_flags = 0;
7156         int             start_dpc = 0;
7157         int             index;
7158         srb_t           *sp;
7159         uint16_t        w;
7160         struct qla_hw_data *ha = vha->hw;
7161         struct req_que *req;
7162
7163         if (ha->flags.eeh_busy) {
7164                 ql_dbg(ql_dbg_timer, vha, 0x6000,
7165                     "EEH = %d, restarting timer.\n",
7166                     ha->flags.eeh_busy);
7167                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
7168                 return;
7169         }
7170
7171         /*
7172          * Hardware read to raise pending EEH errors during mailbox waits. If
7173          * the read returns -1 then disable the board.
7174          */
7175         if (!pci_channel_offline(ha->pdev)) {
7176                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
7177                 qla2x00_check_reg16_for_disconnect(vha, w);
7178         }
7179
7180         /* Make sure qla82xx_watchdog is run only for physical port */
7181         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
7182                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
7183                         start_dpc++;
7184                 if (IS_QLA82XX(ha))
7185                         qla82xx_watchdog(vha);
7186                 else if (IS_QLA8044(ha))
7187                         qla8044_watchdog(vha);
7188         }
7189
7190         if (!vha->vp_idx && IS_QLAFX00(ha))
7191                 qlafx00_timer_routine(vha);
7192
7193         /* Loop down handler. */
7194         if (atomic_read(&vha->loop_down_timer) > 0 &&
7195             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
7196             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
7197                 && vha->flags.online) {
7198
7199                 if (atomic_read(&vha->loop_down_timer) ==
7200                     vha->loop_down_abort_time) {
7201
7202                         ql_log(ql_log_info, vha, 0x6008,
7203                             "Loop down - aborting the queues before time expires.\n");
7204
7205                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
7206                                 atomic_set(&vha->loop_state, LOOP_DEAD);
7207
7208                         /*
7209                          * Schedule an ISP abort to return any FCP2-device
7210                          * commands.
7211                          */
7212                         /* NPIV - scan physical port only */
7213                         if (!vha->vp_idx) {
7214                                 spin_lock_irqsave(&ha->hardware_lock,
7215                                     cpu_flags);
7216                                 req = ha->req_q_map[0];
7217                                 for (index = 1;
7218                                     index < req->num_outstanding_cmds;
7219                                     index++) {
7220                                         fc_port_t *sfcp;
7221
7222                                         sp = req->outstanding_cmds[index];
7223                                         if (!sp)
7224                                                 continue;
7225                                         if (sp->cmd_type != TYPE_SRB)
7226                                                 continue;
7227                                         if (sp->type != SRB_SCSI_CMD)
7228                                                 continue;
7229                                         sfcp = sp->fcport;
7230                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
7231                                                 continue;
7232
7233                                         if (IS_QLA82XX(ha))
7234                                                 set_bit(FCOE_CTX_RESET_NEEDED,
7235                                                         &vha->dpc_flags);
7236                                         else
7237                                                 set_bit(ISP_ABORT_NEEDED,
7238                                                         &vha->dpc_flags);
7239                                         break;
7240                                 }
7241                                 spin_unlock_irqrestore(&ha->hardware_lock,
7242                                                                 cpu_flags);
7243                         }
7244                         start_dpc++;
7245                 }
7246
7247                 /* if the loop has been down for 4 minutes, reinit adapter */
7248                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
7249                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
7250                                 ql_log(ql_log_warn, vha, 0x6009,
7251                                     "Loop down - aborting ISP.\n");
7252
7253                                 if (IS_QLA82XX(ha))
7254                                         set_bit(FCOE_CTX_RESET_NEEDED,
7255                                                 &vha->dpc_flags);
7256                                 else
7257                                         set_bit(ISP_ABORT_NEEDED,
7258                                                 &vha->dpc_flags);
7259                         }
7260                 }
7261                 ql_dbg(ql_dbg_timer, vha, 0x600a,
7262                     "Loop down - seconds remaining %d.\n",
7263                     atomic_read(&vha->loop_down_timer));
7264         }
7265         /* Check if beacon LED needs to be blinked for physical host only */
7266         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
7267                 /* There is no beacon_blink function for ISP82xx */
7268                 if (!IS_P3P_TYPE(ha)) {
7269                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
7270                         start_dpc++;
7271                 }
7272         }
7273
7274         /* Process any deferred work. */
7275         if (!list_empty(&vha->work_list)) {
7276                 unsigned long flags;
7277                 bool q = false;
7278
7279                 spin_lock_irqsave(&vha->work_lock, flags);
7280                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
7281                         q = true;
7282                 spin_unlock_irqrestore(&vha->work_lock, flags);
7283                 if (q)
7284                         queue_work(vha->hw->wq, &vha->iocb_work);
7285         }
7286
7287         /*
7288          * FC-NVME
7289          * see if the active AEN count has changed from what was last reported.
7290          */
7291         if (!vha->vp_idx &&
7292             (atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen) &&
7293             ha->zio_mode == QLA_ZIO_MODE_6 &&
7294             !ha->flags.host_shutting_down) {
7295                 ql_log(ql_log_info, vha, 0x3002,
7296                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
7297                     ha->nvme_last_rptd_aen);
7298                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
7299                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7300                 start_dpc++;
7301         }
7302
7303         if (!vha->vp_idx &&
7304             (atomic_read(&ha->zio_threshold) != ha->last_zio_threshold) &&
7305             (ha->zio_mode == QLA_ZIO_MODE_6) &&
7306             (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
7307                 ql_log(ql_log_info, vha, 0x3002,
7308                     "Sched: Set ZIO exchange threshold to %d.\n",
7309                     ha->last_zio_threshold);
7310                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
7311                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7312                 start_dpc++;
7313         }
7314
7315         /* Schedule the DPC routine if needed */
7316         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
7317             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
7318             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
7319             start_dpc ||
7320             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
7321             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
7322             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
7323             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
7324             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
7325             test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
7326             test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags))) {
7327                 ql_dbg(ql_dbg_timer, vha, 0x600b,
7328                     "isp_abort_needed=%d loop_resync_needed=%d "
7329                     "fcport_update_needed=%d start_dpc=%d "
7330                     "reset_marker_needed=%d",
7331                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
7332                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
7333                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
7334                     start_dpc,
7335                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
7336                 ql_dbg(ql_dbg_timer, vha, 0x600c,
7337                     "beacon_blink_needed=%d isp_unrecoverable=%d "
7338                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
7339                     "relogin_needed=%d, Process_purex_iocb=%d.\n",
7340                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
7341                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
7342                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
7343                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
7344                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
7345                     test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags));
7346                 qla2xxx_wake_dpc(vha);
7347         }
7348
7349         qla2x00_restart_timer(vha, WATCH_INTERVAL);
7350 }
7351
7352 /* Firmware interface routines. */
7353
7354 #define FW_ISP21XX      0
7355 #define FW_ISP22XX      1
7356 #define FW_ISP2300      2
7357 #define FW_ISP2322      3
7358 #define FW_ISP24XX      4
7359 #define FW_ISP25XX      5
7360 #define FW_ISP81XX      6
7361 #define FW_ISP82XX      7
7362 #define FW_ISP2031      8
7363 #define FW_ISP8031      9
7364 #define FW_ISP27XX      10
7365 #define FW_ISP28XX      11
7366
7367 #define FW_FILE_ISP21XX "ql2100_fw.bin"
7368 #define FW_FILE_ISP22XX "ql2200_fw.bin"
7369 #define FW_FILE_ISP2300 "ql2300_fw.bin"
7370 #define FW_FILE_ISP2322 "ql2322_fw.bin"
7371 #define FW_FILE_ISP24XX "ql2400_fw.bin"
7372 #define FW_FILE_ISP25XX "ql2500_fw.bin"
7373 #define FW_FILE_ISP81XX "ql8100_fw.bin"
7374 #define FW_FILE_ISP82XX "ql8200_fw.bin"
7375 #define FW_FILE_ISP2031 "ql2600_fw.bin"
7376 #define FW_FILE_ISP8031 "ql8300_fw.bin"
7377 #define FW_FILE_ISP27XX "ql2700_fw.bin"
7378 #define FW_FILE_ISP28XX "ql2800_fw.bin"
7379
7380
7381 static DEFINE_MUTEX(qla_fw_lock);
7382
7383 static struct fw_blob qla_fw_blobs[] = {
7384         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
7385         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
7386         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
7387         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
7388         { .name = FW_FILE_ISP24XX, },
7389         { .name = FW_FILE_ISP25XX, },
7390         { .name = FW_FILE_ISP81XX, },
7391         { .name = FW_FILE_ISP82XX, },
7392         { .name = FW_FILE_ISP2031, },
7393         { .name = FW_FILE_ISP8031, },
7394         { .name = FW_FILE_ISP27XX, },
7395         { .name = FW_FILE_ISP28XX, },
7396         { .name = NULL, },
7397 };
7398
7399 struct fw_blob *
7400 qla2x00_request_firmware(scsi_qla_host_t *vha)
7401 {
7402         struct qla_hw_data *ha = vha->hw;
7403         struct fw_blob *blob;
7404
7405         if (IS_QLA2100(ha)) {
7406                 blob = &qla_fw_blobs[FW_ISP21XX];
7407         } else if (IS_QLA2200(ha)) {
7408                 blob = &qla_fw_blobs[FW_ISP22XX];
7409         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
7410                 blob = &qla_fw_blobs[FW_ISP2300];
7411         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
7412                 blob = &qla_fw_blobs[FW_ISP2322];
7413         } else if (IS_QLA24XX_TYPE(ha)) {
7414                 blob = &qla_fw_blobs[FW_ISP24XX];
7415         } else if (IS_QLA25XX(ha)) {
7416                 blob = &qla_fw_blobs[FW_ISP25XX];
7417         } else if (IS_QLA81XX(ha)) {
7418                 blob = &qla_fw_blobs[FW_ISP81XX];
7419         } else if (IS_QLA82XX(ha)) {
7420                 blob = &qla_fw_blobs[FW_ISP82XX];
7421         } else if (IS_QLA2031(ha)) {
7422                 blob = &qla_fw_blobs[FW_ISP2031];
7423         } else if (IS_QLA8031(ha)) {
7424                 blob = &qla_fw_blobs[FW_ISP8031];
7425         } else if (IS_QLA27XX(ha)) {
7426                 blob = &qla_fw_blobs[FW_ISP27XX];
7427         } else if (IS_QLA28XX(ha)) {
7428                 blob = &qla_fw_blobs[FW_ISP28XX];
7429         } else {
7430                 return NULL;
7431         }
7432
7433         if (!blob->name)
7434                 return NULL;
7435
7436         mutex_lock(&qla_fw_lock);
7437         if (blob->fw)
7438                 goto out;
7439
7440         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
7441                 ql_log(ql_log_warn, vha, 0x0063,
7442                     "Failed to load firmware image (%s).\n", blob->name);
7443                 blob->fw = NULL;
7444                 blob = NULL;
7445         }
7446
7447 out:
7448         mutex_unlock(&qla_fw_lock);
7449         return blob;
7450 }
7451
7452 static void
7453 qla2x00_release_firmware(void)
7454 {
7455         struct fw_blob *blob;
7456
7457         mutex_lock(&qla_fw_lock);
7458         for (blob = qla_fw_blobs; blob->name; blob++)
7459                 release_firmware(blob->fw);
7460         mutex_unlock(&qla_fw_lock);
7461 }
7462
7463 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
7464 {
7465         struct qla_hw_data *ha = vha->hw;
7466         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
7467         struct qla_qpair *qpair = NULL;
7468         struct scsi_qla_host *vp;
7469         fc_port_t *fcport;
7470         int i;
7471         unsigned long flags;
7472
7473         ha->chip_reset++;
7474
7475         ha->base_qpair->chip_reset = ha->chip_reset;
7476         for (i = 0; i < ha->max_qpairs; i++) {
7477                 if (ha->queue_pair_map[i])
7478                         ha->queue_pair_map[i]->chip_reset =
7479                             ha->base_qpair->chip_reset;
7480         }
7481
7482         /* purge MBox commands */
7483         if (atomic_read(&ha->num_pend_mbx_stage3)) {
7484                 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
7485                 complete(&ha->mbx_intr_comp);
7486         }
7487
7488         i = 0;
7489
7490         while (atomic_read(&ha->num_pend_mbx_stage3) ||
7491             atomic_read(&ha->num_pend_mbx_stage2) ||
7492             atomic_read(&ha->num_pend_mbx_stage1)) {
7493                 msleep(20);
7494                 i++;
7495                 if (i > 50)
7496                         break;
7497         }
7498
7499         ha->flags.purge_mbox = 0;
7500
7501         mutex_lock(&ha->mq_lock);
7502         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7503                 qpair->online = 0;
7504         mutex_unlock(&ha->mq_lock);
7505
7506         qla2x00_mark_all_devices_lost(vha);
7507
7508         spin_lock_irqsave(&ha->vport_slock, flags);
7509         list_for_each_entry(vp, &ha->vp_list, list) {
7510                 atomic_inc(&vp->vref_count);
7511                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7512                 qla2x00_mark_all_devices_lost(vp);
7513                 spin_lock_irqsave(&ha->vport_slock, flags);
7514                 atomic_dec(&vp->vref_count);
7515         }
7516         spin_unlock_irqrestore(&ha->vport_slock, flags);
7517
7518         /* Clear all async request states across all VPs. */
7519         list_for_each_entry(fcport, &vha->vp_fcports, list)
7520                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7521
7522         spin_lock_irqsave(&ha->vport_slock, flags);
7523         list_for_each_entry(vp, &ha->vp_list, list) {
7524                 atomic_inc(&vp->vref_count);
7525                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7526                 list_for_each_entry(fcport, &vp->vp_fcports, list)
7527                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7528                 spin_lock_irqsave(&ha->vport_slock, flags);
7529                 atomic_dec(&vp->vref_count);
7530         }
7531         spin_unlock_irqrestore(&ha->vport_slock, flags);
7532 }
7533
7534
7535 static pci_ers_result_t
7536 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
7537 {
7538         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
7539         struct qla_hw_data *ha = vha->hw;
7540
7541         ql_dbg(ql_dbg_aer, vha, 0x9000,
7542             "PCI error detected, state %x.\n", state);
7543
7544         if (!atomic_read(&pdev->enable_cnt)) {
7545                 ql_log(ql_log_info, vha, 0xffff,
7546                         "PCI device is disabled,state %x\n", state);
7547                 return PCI_ERS_RESULT_NEED_RESET;
7548         }
7549
7550         switch (state) {
7551         case pci_channel_io_normal:
7552                 ha->flags.eeh_busy = 0;
7553                 if (ql2xmqsupport || ql2xnvmeenable) {
7554                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7555                         qla2xxx_wake_dpc(vha);
7556                 }
7557                 return PCI_ERS_RESULT_CAN_RECOVER;
7558         case pci_channel_io_frozen:
7559                 ha->flags.eeh_busy = 1;
7560                 qla_pci_error_cleanup(vha);
7561                 return PCI_ERS_RESULT_NEED_RESET;
7562         case pci_channel_io_perm_failure:
7563                 ha->flags.pci_channel_io_perm_failure = 1;
7564                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
7565                 if (ql2xmqsupport || ql2xnvmeenable) {
7566                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7567                         qla2xxx_wake_dpc(vha);
7568                 }
7569                 return PCI_ERS_RESULT_DISCONNECT;
7570         }
7571         return PCI_ERS_RESULT_NEED_RESET;
7572 }
7573
7574 static pci_ers_result_t
7575 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
7576 {
7577         int risc_paused = 0;
7578         uint32_t stat;
7579         unsigned long flags;
7580         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7581         struct qla_hw_data *ha = base_vha->hw;
7582         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7583         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
7584
7585         if (IS_QLA82XX(ha))
7586                 return PCI_ERS_RESULT_RECOVERED;
7587
7588         spin_lock_irqsave(&ha->hardware_lock, flags);
7589         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
7590                 stat = rd_reg_word(&reg->hccr);
7591                 if (stat & HCCR_RISC_PAUSE)
7592                         risc_paused = 1;
7593         } else if (IS_QLA23XX(ha)) {
7594                 stat = rd_reg_dword(&reg->u.isp2300.host_status);
7595                 if (stat & HSR_RISC_PAUSED)
7596                         risc_paused = 1;
7597         } else if (IS_FWI2_CAPABLE(ha)) {
7598                 stat = rd_reg_dword(&reg24->host_status);
7599                 if (stat & HSRX_RISC_PAUSED)
7600                         risc_paused = 1;
7601         }
7602         spin_unlock_irqrestore(&ha->hardware_lock, flags);
7603
7604         if (risc_paused) {
7605                 ql_log(ql_log_info, base_vha, 0x9003,
7606                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
7607                 qla2xxx_dump_fw(base_vha);
7608
7609                 return PCI_ERS_RESULT_NEED_RESET;
7610         } else
7611                 return PCI_ERS_RESULT_RECOVERED;
7612 }
7613
7614 static pci_ers_result_t
7615 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
7616 {
7617         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
7618         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7619         struct qla_hw_data *ha = base_vha->hw;
7620         int rc;
7621         struct qla_qpair *qpair = NULL;
7622
7623         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
7624             "Slot Reset.\n");
7625
7626         /* Workaround: qla2xxx driver which access hardware earlier
7627          * needs error state to be pci_channel_io_online.
7628          * Otherwise mailbox command timesout.
7629          */
7630         pdev->error_state = pci_channel_io_normal;
7631
7632         pci_restore_state(pdev);
7633
7634         /* pci_restore_state() clears the saved_state flag of the device
7635          * save restored state which resets saved_state flag
7636          */
7637         pci_save_state(pdev);
7638
7639         if (ha->mem_only)
7640                 rc = pci_enable_device_mem(pdev);
7641         else
7642                 rc = pci_enable_device(pdev);
7643
7644         if (rc) {
7645                 ql_log(ql_log_warn, base_vha, 0x9005,
7646                     "Can't re-enable PCI device after reset.\n");
7647                 goto exit_slot_reset;
7648         }
7649
7650
7651         if (ha->isp_ops->pci_config(base_vha))
7652                 goto exit_slot_reset;
7653
7654         mutex_lock(&ha->mq_lock);
7655         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7656                 qpair->online = 1;
7657         mutex_unlock(&ha->mq_lock);
7658
7659         base_vha->flags.online = 1;
7660         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7661         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
7662                 ret =  PCI_ERS_RESULT_RECOVERED;
7663         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7664
7665
7666 exit_slot_reset:
7667         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7668             "slot_reset return %x.\n", ret);
7669
7670         return ret;
7671 }
7672
7673 static void
7674 qla2xxx_pci_resume(struct pci_dev *pdev)
7675 {
7676         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7677         struct qla_hw_data *ha = base_vha->hw;
7678         int ret;
7679
7680         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
7681             "pci_resume.\n");
7682
7683         ha->flags.eeh_busy = 0;
7684
7685         ret = qla2x00_wait_for_hba_online(base_vha);
7686         if (ret != QLA_SUCCESS) {
7687                 ql_log(ql_log_fatal, base_vha, 0x9002,
7688                     "The device failed to resume I/O from slot/link_reset.\n");
7689         }
7690 }
7691
7692 static void
7693 qla_pci_reset_prepare(struct pci_dev *pdev)
7694 {
7695         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7696         struct qla_hw_data *ha = base_vha->hw;
7697         struct qla_qpair *qpair;
7698
7699         ql_log(ql_log_warn, base_vha, 0xffff,
7700             "%s.\n", __func__);
7701
7702         /*
7703          * PCI FLR/function reset is about to reset the
7704          * slot. Stop the chip to stop all DMA access.
7705          * It is assumed that pci_reset_done will be called
7706          * after FLR to resume Chip operation.
7707          */
7708         ha->flags.eeh_busy = 1;
7709         mutex_lock(&ha->mq_lock);
7710         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7711                 qpair->online = 0;
7712         mutex_unlock(&ha->mq_lock);
7713
7714         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7715         qla2x00_abort_isp_cleanup(base_vha);
7716         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7717 }
7718
7719 static void
7720 qla_pci_reset_done(struct pci_dev *pdev)
7721 {
7722         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7723         struct qla_hw_data *ha = base_vha->hw;
7724         struct qla_qpair *qpair;
7725
7726         ql_log(ql_log_warn, base_vha, 0xffff,
7727             "%s.\n", __func__);
7728
7729         /*
7730          * FLR just completed by PCI layer. Resume adapter
7731          */
7732         ha->flags.eeh_busy = 0;
7733         mutex_lock(&ha->mq_lock);
7734         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7735                 qpair->online = 1;
7736         mutex_unlock(&ha->mq_lock);
7737
7738         base_vha->flags.online = 1;
7739         ha->isp_ops->abort_isp(base_vha);
7740         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7741 }
7742
7743 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7744 {
7745         int rc;
7746         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7747         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7748
7749         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7750                 rc = blk_mq_map_queues(qmap);
7751         else
7752                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7753         return rc;
7754 }
7755
7756 struct scsi_host_template qla2xxx_driver_template = {
7757         .module                 = THIS_MODULE,
7758         .name                   = QLA2XXX_DRIVER_NAME,
7759         .queuecommand           = qla2xxx_queuecommand,
7760
7761         .eh_timed_out           = fc_eh_timed_out,
7762         .eh_abort_handler       = qla2xxx_eh_abort,
7763         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7764         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7765         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7766         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7767
7768         .slave_configure        = qla2xxx_slave_configure,
7769
7770         .slave_alloc            = qla2xxx_slave_alloc,
7771         .slave_destroy          = qla2xxx_slave_destroy,
7772         .scan_finished          = qla2xxx_scan_finished,
7773         .scan_start             = qla2xxx_scan_start,
7774         .change_queue_depth     = scsi_change_queue_depth,
7775         .map_queues             = qla2xxx_map_queues,
7776         .this_id                = -1,
7777         .cmd_per_lun            = 3,
7778         .sg_tablesize           = SG_ALL,
7779
7780         .max_sectors            = 0xFFFF,
7781         .shost_attrs            = qla2x00_host_attrs,
7782
7783         .supported_mode         = MODE_INITIATOR,
7784         .track_queue_depth      = 1,
7785         .cmd_size               = sizeof(srb_t),
7786 };
7787
7788 static const struct pci_error_handlers qla2xxx_err_handler = {
7789         .error_detected = qla2xxx_pci_error_detected,
7790         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7791         .slot_reset = qla2xxx_pci_slot_reset,
7792         .resume = qla2xxx_pci_resume,
7793         .reset_prepare = qla_pci_reset_prepare,
7794         .reset_done = qla_pci_reset_done,
7795 };
7796
7797 static struct pci_device_id qla2xxx_pci_tbl[] = {
7798         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7799         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7800         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7801         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7802         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7803         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7804         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7805         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7806         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7807         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7808         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7809         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7810         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7811         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7812         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7813         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7814         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7815         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7816         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7817         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7818         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7819         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7820         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7821         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7822         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7823         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7824         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7825         { 0 },
7826 };
7827 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
7828
7829 static struct pci_driver qla2xxx_pci_driver = {
7830         .name           = QLA2XXX_DRIVER_NAME,
7831         .driver         = {
7832                 .owner          = THIS_MODULE,
7833         },
7834         .id_table       = qla2xxx_pci_tbl,
7835         .probe          = qla2x00_probe_one,
7836         .remove         = qla2x00_remove_one,
7837         .shutdown       = qla2x00_shutdown,
7838         .err_handler    = &qla2xxx_err_handler,
7839 };
7840
7841 static const struct file_operations apidev_fops = {
7842         .owner = THIS_MODULE,
7843         .llseek = noop_llseek,
7844 };
7845
7846 /**
7847  * qla2x00_module_init - Module initialization.
7848  **/
7849 static int __init
7850 qla2x00_module_init(void)
7851 {
7852         int ret = 0;
7853
7854         BUILD_BUG_ON(sizeof(cmd_a64_entry_t) != 64);
7855         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
7856         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
7857         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
7858         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
7859         BUILD_BUG_ON(sizeof(mrk_entry_t) != 64);
7860         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
7861         BUILD_BUG_ON(sizeof(request_t) != 64);
7862         BUILD_BUG_ON(sizeof(struct abort_entry_24xx) != 64);
7863         BUILD_BUG_ON(sizeof(struct abort_iocb_entry_fx00) != 64);
7864         BUILD_BUG_ON(sizeof(struct abts_entry_24xx) != 64);
7865         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
7866         BUILD_BUG_ON(sizeof(struct access_chip_rsp_84xx) != 64);
7867         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
7868         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
7869         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
7870         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
7871         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
7872         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
7873         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
7874         BUILD_BUG_ON(sizeof(struct ct_fdmi1_hba_attributes) != 2344);
7875         BUILD_BUG_ON(sizeof(struct ct_fdmi2_hba_attributes) != 4424);
7876         BUILD_BUG_ON(sizeof(struct ct_fdmi2_port_attributes) != 4164);
7877         BUILD_BUG_ON(sizeof(struct ct_fdmi_hba_attr) != 260);
7878         BUILD_BUG_ON(sizeof(struct ct_fdmi_port_attr) != 260);
7879         BUILD_BUG_ON(sizeof(struct ct_rsp_hdr) != 16);
7880         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
7881         BUILD_BUG_ON(sizeof(struct device_reg_24xx) != 256);
7882         BUILD_BUG_ON(sizeof(struct device_reg_25xxmq) != 24);
7883         BUILD_BUG_ON(sizeof(struct device_reg_2xxx) != 256);
7884         BUILD_BUG_ON(sizeof(struct device_reg_82xx) != 1288);
7885         BUILD_BUG_ON(sizeof(struct device_reg_fx00) != 216);
7886         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
7887         BUILD_BUG_ON(sizeof(struct els_sts_entry_24xx) != 64);
7888         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
7889         BUILD_BUG_ON(sizeof(struct imm_ntfy_from_isp) != 64);
7890         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
7891         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
7892         BUILD_BUG_ON(sizeof(struct logio_entry_24xx) != 64);
7893         BUILD_BUG_ON(sizeof(struct mbx_entry) != 64);
7894         BUILD_BUG_ON(sizeof(struct mid_init_cb_24xx) != 5252);
7895         BUILD_BUG_ON(sizeof(struct mrk_entry_24xx) != 64);
7896         BUILD_BUG_ON(sizeof(struct nvram_24xx) != 512);
7897         BUILD_BUG_ON(sizeof(struct nvram_81xx) != 512);
7898         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
7899         BUILD_BUG_ON(sizeof(struct pt_ls4_rx_unsol) != 64);
7900         BUILD_BUG_ON(sizeof(struct purex_entry_24xx) != 64);
7901         BUILD_BUG_ON(sizeof(struct qla2100_fw_dump) != 123634);
7902         BUILD_BUG_ON(sizeof(struct qla2300_fw_dump) != 136100);
7903         BUILD_BUG_ON(sizeof(struct qla24xx_fw_dump) != 37976);
7904         BUILD_BUG_ON(sizeof(struct qla25xx_fw_dump) != 39228);
7905         BUILD_BUG_ON(sizeof(struct qla2xxx_fce_chain) != 52);
7906         BUILD_BUG_ON(sizeof(struct qla2xxx_fw_dump) != 136172);
7907         BUILD_BUG_ON(sizeof(struct qla2xxx_mq_chain) != 524);
7908         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_chain) != 8);
7909         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_header) != 12);
7910         BUILD_BUG_ON(sizeof(struct qla2xxx_offld_chain) != 24);
7911         BUILD_BUG_ON(sizeof(struct qla81xx_fw_dump) != 39420);
7912         BUILD_BUG_ON(sizeof(struct qla82xx_uri_data_desc) != 28);
7913         BUILD_BUG_ON(sizeof(struct qla82xx_uri_table_desc) != 32);
7914         BUILD_BUG_ON(sizeof(struct qla83xx_fw_dump) != 51196);
7915         BUILD_BUG_ON(sizeof(struct qla_fcp_prio_cfg) != FCP_PRIO_CFG_SIZE);
7916         BUILD_BUG_ON(sizeof(struct qla_fdt_layout) != 128);
7917         BUILD_BUG_ON(sizeof(struct qla_flt_header) != 8);
7918         BUILD_BUG_ON(sizeof(struct qla_flt_region) != 16);
7919         BUILD_BUG_ON(sizeof(struct qla_npiv_entry) != 24);
7920         BUILD_BUG_ON(sizeof(struct qla_npiv_header) != 16);
7921         BUILD_BUG_ON(sizeof(struct rdp_rsp_payload) != 336);
7922         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
7923         BUILD_BUG_ON(sizeof(struct sts_entry_24xx) != 64);
7924         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry) != 64);
7925         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry_fx00) != 64);
7926         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
7927         BUILD_BUG_ON(sizeof(struct verify_chip_rsp_84xx) != 52);
7928         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
7929         BUILD_BUG_ON(sizeof(struct vp_config_entry_24xx) != 64);
7930         BUILD_BUG_ON(sizeof(struct vp_ctrl_entry_24xx) != 64);
7931         BUILD_BUG_ON(sizeof(struct vp_rpt_id_entry_24xx) != 64);
7932         BUILD_BUG_ON(sizeof(sts21_entry_t) != 64);
7933         BUILD_BUG_ON(sizeof(sts22_entry_t) != 64);
7934         BUILD_BUG_ON(sizeof(sts_cont_entry_t) != 64);
7935         BUILD_BUG_ON(sizeof(sts_entry_t) != 64);
7936         BUILD_BUG_ON(sizeof(sw_info_t) != 32);
7937         BUILD_BUG_ON(sizeof(target_id_t) != 2);
7938
7939         /* Allocate cache for SRBs. */
7940         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7941             SLAB_HWCACHE_ALIGN, NULL);
7942         if (srb_cachep == NULL) {
7943                 ql_log(ql_log_fatal, NULL, 0x0001,
7944                     "Unable to allocate SRB cache...Failing load!.\n");
7945                 return -ENOMEM;
7946         }
7947
7948         /* Initialize target kmem_cache and mem_pools */
7949         ret = qlt_init();
7950         if (ret < 0) {
7951                 goto destroy_cache;
7952         } else if (ret > 0) {
7953                 /*
7954                  * If initiator mode is explictly disabled by qlt_init(),
7955                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7956                  * performing scsi_scan_target() during LOOP UP event.
7957                  */
7958                 qla2xxx_transport_functions.disable_target_scan = 1;
7959                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7960         }
7961
7962         /* Derive version string. */
7963         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7964         if (ql2xextended_error_logging)
7965                 strcat(qla2x00_version_str, "-debug");
7966         if (ql2xextended_error_logging == 1)
7967                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7968
7969         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7970                 qla_insert_tgt_attrs();
7971
7972         qla2xxx_transport_template =
7973             fc_attach_transport(&qla2xxx_transport_functions);
7974         if (!qla2xxx_transport_template) {
7975                 ql_log(ql_log_fatal, NULL, 0x0002,
7976                     "fc_attach_transport failed...Failing load!.\n");
7977                 ret = -ENODEV;
7978                 goto qlt_exit;
7979         }
7980
7981         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7982         if (apidev_major < 0) {
7983                 ql_log(ql_log_fatal, NULL, 0x0003,
7984                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7985         }
7986
7987         qla2xxx_transport_vport_template =
7988             fc_attach_transport(&qla2xxx_transport_vport_functions);
7989         if (!qla2xxx_transport_vport_template) {
7990                 ql_log(ql_log_fatal, NULL, 0x0004,
7991                     "fc_attach_transport vport failed...Failing load!.\n");
7992                 ret = -ENODEV;
7993                 goto unreg_chrdev;
7994         }
7995         ql_log(ql_log_info, NULL, 0x0005,
7996             "QLogic Fibre Channel HBA Driver: %s.\n",
7997             qla2x00_version_str);
7998         ret = pci_register_driver(&qla2xxx_pci_driver);
7999         if (ret) {
8000                 ql_log(ql_log_fatal, NULL, 0x0006,
8001                     "pci_register_driver failed...ret=%d Failing load!.\n",
8002                     ret);
8003                 goto release_vport_transport;
8004         }
8005         return ret;
8006
8007 release_vport_transport:
8008         fc_release_transport(qla2xxx_transport_vport_template);
8009
8010 unreg_chrdev:
8011         if (apidev_major >= 0)
8012                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8013         fc_release_transport(qla2xxx_transport_template);
8014
8015 qlt_exit:
8016         qlt_exit();
8017
8018 destroy_cache:
8019         kmem_cache_destroy(srb_cachep);
8020         return ret;
8021 }
8022
8023 /**
8024  * qla2x00_module_exit - Module cleanup.
8025  **/
8026 static void __exit
8027 qla2x00_module_exit(void)
8028 {
8029         pci_unregister_driver(&qla2xxx_pci_driver);
8030         qla2x00_release_firmware();
8031         kmem_cache_destroy(ctx_cachep);
8032         fc_release_transport(qla2xxx_transport_vport_template);
8033         if (apidev_major >= 0)
8034                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8035         fc_release_transport(qla2xxx_transport_template);
8036         qlt_exit();
8037         kmem_cache_destroy(srb_cachep);
8038 }
8039
8040 module_init(qla2x00_module_init);
8041 module_exit(qla2x00_module_exit);
8042
8043 MODULE_AUTHOR("QLogic Corporation");
8044 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
8045 MODULE_LICENSE("GPL");
8046 MODULE_VERSION(QLA2XXX_VERSION);
8047 MODULE_FIRMWARE(FW_FILE_ISP21XX);
8048 MODULE_FIRMWARE(FW_FILE_ISP22XX);
8049 MODULE_FIRMWARE(FW_FILE_ISP2300);
8050 MODULE_FIRMWARE(FW_FILE_ISP2322);
8051 MODULE_FIRMWARE(FW_FILE_ISP24XX);
8052 MODULE_FIRMWARE(FW_FILE_ISP25XX);