drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 int ql2xfulldump_on_mpifail;
  39 module_param(ql2xfulldump_on_mpifail, int, S_IRUGO | S_IWUSR);
  40 MODULE_PARM_DESC(ql2xfulldump_on_mpifail,
  41                  "Set this to take full dump on MPI hang.");
  42
  43 int ql2xenforce_iocb_limit = 1;
  44 module_param(ql2xenforce_iocb_limit, int, S_IRUGO | S_IWUSR);
  45 MODULE_PARM_DESC(ql2xenforce_iocb_limit,
  46                  "Enforce IOCB throttling, to avoid FW congestion. (default: 0)");
  47
  48 /*
  49  * CT6 CTX allocation cache
  50  */
  51 static struct kmem_cache *ctx_cachep;
  52 /*
  53  * error level for logging
  54  */
  55 uint ql_errlev = 0x8001;
  56
  57 static int ql2xenableclass2;
  58 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  59 MODULE_PARM_DESC(ql2xenableclass2,
  60                 "Specify if Class 2 operations are supported from the very "
  61                 "beginning. Default is 0 - class 2 not supported.");
  62
  63
  64 int ql2xlogintimeout = 20;
  65 module_param(ql2xlogintimeout, int, S_IRUGO);
  66 MODULE_PARM_DESC(ql2xlogintimeout,
  67                 "Login timeout value in seconds.");
  68
  69 int qlport_down_retry;
  70 module_param(qlport_down_retry, int, S_IRUGO);
  71 MODULE_PARM_DESC(qlport_down_retry,
  72                 "Maximum number of command retries to a port that returns "
  73                 "a PORT-DOWN status.");
  74
  75 int ql2xplogiabsentdevice;
  76 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  77 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  78                 "Option to enable PLOGI to devices that are not present after "
  79                 "a Fabric scan.  This is needed for several broken switches. "
  80                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  81
  82 int ql2xloginretrycount;
  83 module_param(ql2xloginretrycount, int, S_IRUGO);
  84 MODULE_PARM_DESC(ql2xloginretrycount,
  85                 "Specify an alternate value for the NVRAM login retry count.");
  86
  87 int ql2xallocfwdump = 1;
  88 module_param(ql2xallocfwdump, int, S_IRUGO);
  89 MODULE_PARM_DESC(ql2xallocfwdump,
  90                 "Option to enable allocation of memory for a firmware dump "
  91                 "during HBA initialization.  Memory allocation requirements "
  92                 "vary by ISP type.  Default is 1 - allocate memory.");
  93
  94 int ql2xextended_error_logging;
  95 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  96 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  97 MODULE_PARM_DESC(ql2xextended_error_logging,
  98                 "Option to enable extended error logging,\n"
  99                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
 100                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
 101                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
 102                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
 103                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
 104                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
 105                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
 106                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
 107                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
 108                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
 109                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 110                 "\t\t0x1e400000 - Preferred value for capturing essential "
 111                 "debug information (equivalent to old "
 112                 "ql2xextended_error_logging=1).\n"
 113                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 114
 115 int ql2xshiftctondsd = 6;
 116 module_param(ql2xshiftctondsd, int, S_IRUGO);
 117 MODULE_PARM_DESC(ql2xshiftctondsd,
 118                 "Set to control shifting of command type processing "
 119                 "based on total number of SG elements.");
 120
 121 int ql2xfdmienable = 1;
 122 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 123 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 124 MODULE_PARM_DESC(ql2xfdmienable,
 125                 "Enables FDMI registrations. "
 126                 "0 - no FDMI registrations. "
 127                 "1 - provide FDMI registrations (default).");
 128
 129 #define MAX_Q_DEPTH     64
 130 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 131 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 132 MODULE_PARM_DESC(ql2xmaxqdepth,
 133                 "Maximum queue depth to set for each LUN. "
 134                 "Default is 64.");
 135
 136 int ql2xenabledif = 2;
 137 module_param(ql2xenabledif, int, S_IRUGO);
 138 MODULE_PARM_DESC(ql2xenabledif,
 139                 " Enable T10-CRC-DIF:\n"
 140                 " Default is 2.\n"
 141                 "  0 -- No DIF Support\n"
 142                 "  1 -- Enable DIF for all types\n"
 143                 "  2 -- Enable DIF for all types, except Type 0.\n");
 144
 145 #if (IS_ENABLED(CONFIG_NVME_FC))
 146 int ql2xnvmeenable = 1;
 147 #else
 148 int ql2xnvmeenable;
 149 #endif
 150 module_param(ql2xnvmeenable, int, 0644);
 151 MODULE_PARM_DESC(ql2xnvmeenable,
 152     "Enables NVME support. "
 153     "0 - no NVMe.  Default is Y");
 154
 155 int ql2xenablehba_err_chk = 2;
 156 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 157 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 158                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 159                 " Default is 2.\n"
 160                 "  0 -- Error isolation disabled\n"
 161                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 162                 "  2 -- Error isolation enabled for all Types\n");
 163
 164 int ql2xiidmaenable = 1;
 165 module_param(ql2xiidmaenable, int, S_IRUGO);
 166 MODULE_PARM_DESC(ql2xiidmaenable,
 167                 "Enables iIDMA settings "
 168                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 169
 170 int ql2xmqsupport = 1;
 171 module_param(ql2xmqsupport, int, S_IRUGO);
 172 MODULE_PARM_DESC(ql2xmqsupport,
 173                 "Enable on demand multiple queue pairs support "
 174                 "Default is 1 for supported. "
 175                 "Set it to 0 to turn off mq qpair support.");
 176
 177 int ql2xfwloadbin;
 178 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 179 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 180 MODULE_PARM_DESC(ql2xfwloadbin,
 181                 "Option to specify location from which to load ISP firmware:.\n"
 182                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 183                 "      interface.\n"
 184                 " 1 -- load firmware from flash.\n"
 185                 " 0 -- use default semantics.\n");
 186
 187 int ql2xetsenable;
 188 module_param(ql2xetsenable, int, S_IRUGO);
 189 MODULE_PARM_DESC(ql2xetsenable,
 190                 "Enables firmware ETS burst."
 191                 "Default is 0 - skip ETS enablement.");
 192
 193 int ql2xdbwr = 1;
 194 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 195 MODULE_PARM_DESC(ql2xdbwr,
 196                 "Option to specify scheme for request queue posting.\n"
 197                 " 0 -- Regular doorbell.\n"
 198                 " 1 -- CAMRAM doorbell (faster).\n");
 199
 200 int ql2xtargetreset = 1;
 201 module_param(ql2xtargetreset, int, S_IRUGO);
 202 MODULE_PARM_DESC(ql2xtargetreset,
 203                  "Enable target reset."
 204                  "Default is 1 - use hw defaults.");
 205
 206 int ql2xgffidenable;
 207 module_param(ql2xgffidenable, int, S_IRUGO);
 208 MODULE_PARM_DESC(ql2xgffidenable,
 209                 "Enables GFF_ID checks of port type. "
 210                 "Default is 0 - Do not use GFF_ID information.");
 211
 212 int ql2xasynctmfenable = 1;
 213 module_param(ql2xasynctmfenable, int, S_IRUGO);
 214 MODULE_PARM_DESC(ql2xasynctmfenable,
 215                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 216                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 217
 218 int ql2xdontresethba;
 219 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 220 MODULE_PARM_DESC(ql2xdontresethba,
 221                 "Option to specify reset behaviour.\n"
 222                 " 0 (Default) -- Reset on failure.\n"
 223                 " 1 -- Do not reset on failure.\n");
 224
 225 uint64_t ql2xmaxlun = MAX_LUNS;
 226 module_param(ql2xmaxlun, ullong, S_IRUGO);
 227 MODULE_PARM_DESC(ql2xmaxlun,
 228                 "Defines the maximum LU number to register with the SCSI "
 229                 "midlayer. Default is 65535.");
 230
 231 int ql2xmdcapmask = 0x1F;
 232 module_param(ql2xmdcapmask, int, S_IRUGO);
 233 MODULE_PARM_DESC(ql2xmdcapmask,
 234                 "Set the Minidump driver capture mask level. "
 235                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 236
 237 int ql2xmdenable = 1;
 238 module_param(ql2xmdenable, int, S_IRUGO);
 239 MODULE_PARM_DESC(ql2xmdenable,
 240                 "Enable/disable MiniDump. "
 241                 "0 - MiniDump disabled. "
 242                 "1 (Default) - MiniDump enabled.");
 243
 244 int ql2xexlogins;
 245 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 246 MODULE_PARM_DESC(ql2xexlogins,
 247                  "Number of extended Logins. "
 248                  "0 (Default)- Disabled.");
 249
 250 int ql2xexchoffld = 1024;
 251 module_param(ql2xexchoffld, uint, 0644);
 252 MODULE_PARM_DESC(ql2xexchoffld,
 253         "Number of target exchanges.");
 254
 255 int ql2xiniexchg = 1024;
 256 module_param(ql2xiniexchg, uint, 0644);
 257 MODULE_PARM_DESC(ql2xiniexchg,
 258         "Number of initiator exchanges.");
 259
 260 int ql2xfwholdabts;
 261 module_param(ql2xfwholdabts, int, S_IRUGO);
 262 MODULE_PARM_DESC(ql2xfwholdabts,
 263                 "Allow FW to hold status IOCB until ABTS rsp received. "
 264                 "0 (Default) Do not set fw option. "
 265                 "1 - Set fw option to hold ABTS.");
 266
 267 int ql2xmvasynctoatio = 1;
 268 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 269 MODULE_PARM_DESC(ql2xmvasynctoatio,
 270                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 271                 "0 (Default). Do not move IOCBs"
 272                 "1 - Move IOCBs.");
 273
 274 int ql2xautodetectsfp = 1;
 275 module_param(ql2xautodetectsfp, int, 0444);
 276 MODULE_PARM_DESC(ql2xautodetectsfp,
 277                  "Detect SFP range and set appropriate distance.\n"
 278                  "1 (Default): Enable\n");
 279
 280 int ql2xenablemsix = 1;
 281 module_param(ql2xenablemsix, int, 0444);
 282 MODULE_PARM_DESC(ql2xenablemsix,
 283                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 284                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 285                  " 0 -- enable traditional pin-based mechanism.\n"
 286                  " 1 -- enable MSI-X interrupt mechanism.\n"
 287                  " 2 -- enable MSI interrupt mechanism.\n");
 288
 289 int qla2xuseresexchforels;
 290 module_param(qla2xuseresexchforels, int, 0444);
 291 MODULE_PARM_DESC(qla2xuseresexchforels,
 292                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 293                  " 0 (default): disabled");
 294
 295 static int ql2xprotmask;
 296 module_param(ql2xprotmask, int, 0644);
 297 MODULE_PARM_DESC(ql2xprotmask,
 298                  "Override DIF/DIX protection capabilities mask\n"
 299                  "Default is 0 which sets protection mask based on "
 300                  "capabilities reported by HBA firmware.\n");
 301
 302 static int ql2xprotguard;
 303 module_param(ql2xprotguard, int, 0644);
 304 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 305                  "  0 -- Let HBA firmware decide\n"
 306                  "  1 -- Force T10 CRC\n"
 307                  "  2 -- Force IP checksum\n");
 308
 309 int ql2xdifbundlinginternalbuffers;
 310 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 311 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 312     "Force using internal buffers for DIF information\n"
 313     "0 (Default). Based on check.\n"
 314     "1 Force using internal buffers\n");
 315
 316 int ql2xsmartsan;
 317 module_param(ql2xsmartsan, int, 0444);
 318 module_param_named(smartsan, ql2xsmartsan, int, 0444);
 319 MODULE_PARM_DESC(ql2xsmartsan,
 320                 "Send SmartSAN Management Attributes for FDMI Registration."
 321                 " Default is 0 - No SmartSAN registration,"
 322                 " 1 - Register SmartSAN Management Attributes.");
 323
 324 int ql2xrdpenable;
 325 module_param(ql2xrdpenable, int, 0444);
 326 module_param_named(rdpenable, ql2xrdpenable, int, 0444);
 327 MODULE_PARM_DESC(ql2xrdpenable,
 328                 "Enables RDP responses. "
 329                 "0 - no RDP responses (default). "
 330                 "1 - provide RDP responses.");
 331
 332 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 333 static void qla2x00_free_device(scsi_qla_host_t *);
 334 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 335 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 336
 337
 338 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 339 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 340
 341 /* TODO Convert to inlines
 342  *
 343  * Timer routines
 344  */
 345
 346 __inline__ void
 347 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 348 {
 349         timer_setup(&vha->timer, qla2x00_timer, 0);
 350         vha->timer.expires = jiffies + interval * HZ;
 351         add_timer(&vha->timer);
 352         vha->timer_active = 1;
 353 }
 354
 355 static inline void
 356 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 357 {
 358         /* Currently used for 82XX only. */
 359         if (vha->device_flags & DFLG_DEV_FAILED) {
 360                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 361                     "Device in a failed state, returning.\n");
 362                 return;
 363         }
 364
 365         mod_timer(&vha->timer, jiffies + interval * HZ);
 366 }
 367
 368 static __inline__ void
 369 qla2x00_stop_timer(scsi_qla_host_t *vha)
 370 {
 371         del_timer_sync(&vha->timer);
 372         vha->timer_active = 0;
 373 }
 374
 375 static int qla2x00_do_dpc(void *data);
 376
 377 static void qla2x00_rst_aen(scsi_qla_host_t *);
 378
 379 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 380         struct req_que **, struct rsp_que **);
 381 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 382 static void qla2x00_mem_free(struct qla_hw_data *);
 383 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 384         struct qla_qpair *qpair);
 385
 386 /* -------------------------------------------------------------------------- */
 387 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 388     struct rsp_que *rsp)
 389 {
 390         struct qla_hw_data *ha = vha->hw;
 391
 392         rsp->qpair = ha->base_qpair;
 393         rsp->req = req;
 394         ha->base_qpair->hw = ha;
 395         ha->base_qpair->req = req;
 396         ha->base_qpair->rsp = rsp;
 397         ha->base_qpair->vha = vha;
 398         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 399         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 400         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 401         ha->base_qpair->srb_mempool = ha->srb_mempool;
 402         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 403         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 404         /* init qpair to this cpu. Will adjust at run time. */
 405         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 406         ha->base_qpair->pdev = ha->pdev;
 407
 408         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 409                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 410 }
 411
 412 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 413                                 struct rsp_que *rsp)
 414 {
 415         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 416
 417         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 418                                 GFP_KERNEL);
 419         if (!ha->req_q_map) {
 420                 ql_log(ql_log_fatal, vha, 0x003b,
 421                     "Unable to allocate memory for request queue ptrs.\n");
 422                 goto fail_req_map;
 423         }
 424
 425         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 426                                 GFP_KERNEL);
 427         if (!ha->rsp_q_map) {
 428                 ql_log(ql_log_fatal, vha, 0x003c,
 429                     "Unable to allocate memory for response queue ptrs.\n");
 430                 goto fail_rsp_map;
 431         }
 432
 433         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 434         if (ha->base_qpair == NULL) {
 435                 ql_log(ql_log_warn, vha, 0x00e0,
 436                     "Failed to allocate base queue pair memory.\n");
 437                 goto fail_base_qpair;
 438         }
 439
 440         qla_init_base_qpair(vha, req, rsp);
 441
 442         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 443                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 444                         GFP_KERNEL);
 445                 if (!ha->queue_pair_map) {
 446                         ql_log(ql_log_fatal, vha, 0x0180,
 447                             "Unable to allocate memory for queue pair ptrs.\n");
 448                         goto fail_qpair_map;
 449                 }
 450         }
 451
 452         /*
 453          * Make sure we record at least the request and response queue zero in
 454          * case we need to free them if part of the probe fails.
 455          */
 456         ha->rsp_q_map[0] = rsp;
 457         ha->req_q_map[0] = req;
 458         set_bit(0, ha->rsp_qid_map);
 459         set_bit(0, ha->req_qid_map);
 460         return 0;
 461
 462 fail_qpair_map:
 463         kfree(ha->base_qpair);
 464         ha->base_qpair = NULL;
 465 fail_base_qpair:
 466         kfree(ha->rsp_q_map);
 467         ha->rsp_q_map = NULL;
 468 fail_rsp_map:
 469         kfree(ha->req_q_map);
 470         ha->req_q_map = NULL;
 471 fail_req_map:
 472         return -ENOMEM;
 473 }
 474
 475 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 476 {
 477         if (IS_QLAFX00(ha)) {
 478                 if (req && req->ring_fx00)
 479                         dma_free_coherent(&ha->pdev->dev,
 480                             (req->length_fx00 + 1) * sizeof(request_t),
 481                             req->ring_fx00, req->dma_fx00);
 482         } else if (req && req->ring)
 483                 dma_free_coherent(&ha->pdev->dev,
 484                 (req->length + 1) * sizeof(request_t),
 485                 req->ring, req->dma);
 486
 487         if (req)
 488                 kfree(req->outstanding_cmds);
 489
 490         kfree(req);
 491 }
 492
 493 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 494 {
 495         if (IS_QLAFX00(ha)) {
 496                 if (rsp && rsp->ring_fx00)
 497                         dma_free_coherent(&ha->pdev->dev,
 498                             (rsp->length_fx00 + 1) * sizeof(request_t),
 499                             rsp->ring_fx00, rsp->dma_fx00);
 500         } else if (rsp && rsp->ring) {
 501                 dma_free_coherent(&ha->pdev->dev,
 502                 (rsp->length + 1) * sizeof(response_t),
 503                 rsp->ring, rsp->dma);
 504         }
 505         kfree(rsp);
 506 }
 507
 508 static void qla2x00_free_queues(struct qla_hw_data *ha)
 509 {
 510         struct req_que *req;
 511         struct rsp_que *rsp;
 512         int cnt;
 513         unsigned long flags;
 514
 515         if (ha->queue_pair_map) {
 516                 kfree(ha->queue_pair_map);
 517                 ha->queue_pair_map = NULL;
 518         }
 519         if (ha->base_qpair) {
 520                 kfree(ha->base_qpair);
 521                 ha->base_qpair = NULL;
 522         }
 523
 524         spin_lock_irqsave(&ha->hardware_lock, flags);
 525         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 526                 if (!test_bit(cnt, ha->req_qid_map))
 527                         continue;
 528
 529                 req = ha->req_q_map[cnt];
 530                 clear_bit(cnt, ha->req_qid_map);
 531                 ha->req_q_map[cnt] = NULL;
 532
 533                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 534                 qla2x00_free_req_que(ha, req);
 535                 spin_lock_irqsave(&ha->hardware_lock, flags);
 536         }
 537         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 538
 539         kfree(ha->req_q_map);
 540         ha->req_q_map = NULL;
 541
 542
 543         spin_lock_irqsave(&ha->hardware_lock, flags);
 544         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 545                 if (!test_bit(cnt, ha->rsp_qid_map))
 546                         continue;
 547
 548                 rsp = ha->rsp_q_map[cnt];
 549                 clear_bit(cnt, ha->rsp_qid_map);
 550                 ha->rsp_q_map[cnt] =  NULL;
 551                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 552                 qla2x00_free_rsp_que(ha, rsp);
 553                 spin_lock_irqsave(&ha->hardware_lock, flags);
 554         }
 555         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 556
 557         kfree(ha->rsp_q_map);
 558         ha->rsp_q_map = NULL;
 559 }
 560
 561 static char *
 562 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 563 {
 564         struct qla_hw_data *ha = vha->hw;
 565         static const char *const pci_bus_modes[] = {
 566                 "33", "66", "100", "133",
 567         };
 568         uint16_t pci_bus;
 569
 570         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 571         if (pci_bus) {
 572                 snprintf(str, str_len, "PCI-X (%s MHz)",
 573                          pci_bus_modes[pci_bus]);
 574         } else {
 575                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 576                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 577         }
 578
 579         return str;
 580 }
 581
 582 static char *
 583 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 584 {
 585         static const char *const pci_bus_modes[] = {
 586                 "33", "66", "100", "133",
 587         };
 588         struct qla_hw_data *ha = vha->hw;
 589         uint32_t pci_bus;
 590
 591         if (pci_is_pcie(ha->pdev)) {
 592                 uint32_t lstat, lspeed, lwidth;
 593                 const char *speed_str;
 594
 595                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 596                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 597                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 598
 599                 switch (lspeed) {
 600                 case 1:
 601                         speed_str = "2.5GT/s";
 602                         break;
 603                 case 2:
 604                         speed_str = "5.0GT/s";
 605                         break;
 606                 case 3:
 607                         speed_str = "8.0GT/s";
 608                         break;
 609                 case 4:
 610                         speed_str = "16.0GT/s";
 611                         break;
 612                 default:
 613                         speed_str = "<unknown>";
 614                         break;
 615                 }
 616                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 617
 618                 return str;
 619         }
 620
 621         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 622         if (pci_bus == 0 || pci_bus == 8)
 623                 snprintf(str, str_len, "PCI (%s MHz)",
 624                          pci_bus_modes[pci_bus >> 3]);
 625         else
 626                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 627                          pci_bus & 4 ? 2 : 1,
 628                          pci_bus_modes[pci_bus & 3]);
 629
 630         return str;
 631 }
 632
 633 static char *
 634 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 635 {
 636         char un_str[10];
 637         struct qla_hw_data *ha = vha->hw;
 638
 639         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 640             ha->fw_minor_version, ha->fw_subminor_version);
 641
 642         if (ha->fw_attributes & BIT_9) {
 643                 strcat(str, "FLX");
 644                 return (str);
 645         }
 646
 647         switch (ha->fw_attributes & 0xFF) {
 648         case 0x7:
 649                 strcat(str, "EF");
 650                 break;
 651         case 0x17:
 652                 strcat(str, "TP");
 653                 break;
 654         case 0x37:
 655                 strcat(str, "IP");
 656                 break;
 657         case 0x77:
 658                 strcat(str, "VI");
 659                 break;
 660         default:
 661                 sprintf(un_str, "(%x)", ha->fw_attributes);
 662                 strcat(str, un_str);
 663                 break;
 664         }
 665         if (ha->fw_attributes & 0x100)
 666                 strcat(str, "X");
 667
 668         return (str);
 669 }
 670
 671 static char *
 672 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 673 {
 674         struct qla_hw_data *ha = vha->hw;
 675
 676         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 677             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 678         return str;
 679 }
 680
 681 void qla2x00_sp_free_dma(srb_t *sp)
 682 {
 683         struct qla_hw_data *ha = sp->vha->hw;
 684         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 685
 686         if (sp->flags & SRB_DMA_VALID) {
 687                 scsi_dma_unmap(cmd);
 688                 sp->flags &= ~SRB_DMA_VALID;
 689         }
 690
 691         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 692                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 693                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 694                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 695         }
 696
 697         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 698                 /* List assured to be having elements */
 699                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 700                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 701         }
 702
 703         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 704                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 705
 706                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 707                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 708         }
 709
 710         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 711                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 712
 713                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 714                     ctx1->fcp_cmnd_dma);
 715                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 716                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 717                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 718                 mempool_free(ctx1, ha->ctx_mempool);
 719         }
 720 }
 721
 722 void qla2x00_sp_compl(srb_t *sp, int res)
 723 {
 724         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 725         struct completion *comp = sp->comp;
 726
 727         sp->free(sp);
 728         cmd->result = res;
 729         CMD_SP(cmd) = NULL;
 730         cmd->scsi_done(cmd);
 731         if (comp)
 732                 complete(comp);
 733 }
 734
 735 void qla2xxx_qpair_sp_free_dma(srb_t *sp)
 736 {
 737         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 738         struct qla_hw_data *ha = sp->fcport->vha->hw;
 739
 740         if (sp->flags & SRB_DMA_VALID) {
 741                 scsi_dma_unmap(cmd);
 742                 sp->flags &= ~SRB_DMA_VALID;
 743         }
 744
 745         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 746                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 747                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 748                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 749         }
 750
 751         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 752                 /* List assured to be having elements */
 753                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 754                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 755         }
 756
 757         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 758                 struct crc_context *difctx = sp->u.scmd.crc_ctx;
 759                 struct dsd_dma *dif_dsd, *nxt_dsd;
 760
 761                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 762                     &difctx->ldif_dma_hndl_list, list) {
 763                         list_del(&dif_dsd->list);
 764                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 765                             dif_dsd->dsd_list_dma);
 766                         kfree(dif_dsd);
 767                         difctx->no_dif_bundl--;
 768                 }
 769
 770                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 771                     &difctx->ldif_dsd_list, list) {
 772                         list_del(&dif_dsd->list);
 773                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 774                             dif_dsd->dsd_list_dma);
 775                         kfree(dif_dsd);
 776                         difctx->no_ldif_dsd--;
 777                 }
 778
 779                 if (difctx->no_ldif_dsd) {
 780                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 781                             "%s: difctx->no_ldif_dsd=%x\n",
 782                             __func__, difctx->no_ldif_dsd);
 783                 }
 784
 785                 if (difctx->no_dif_bundl) {
 786                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 787                             "%s: difctx->no_dif_bundl=%x\n",
 788                             __func__, difctx->no_dif_bundl);
 789                 }
 790                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 791         }
 792
 793         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 794                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 795
 796                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 797                     ctx1->fcp_cmnd_dma);
 798                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 799                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 800                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 801                 mempool_free(ctx1, ha->ctx_mempool);
 802                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 803         }
 804
 805         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 806                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 807
 808                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 809                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 810         }
 811 }
 812
 813 void qla2xxx_qpair_sp_compl(srb_t *sp, int res)
 814 {
 815         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 816         struct completion *comp = sp->comp;
 817
 818         sp->free(sp);
 819         cmd->result = res;
 820         CMD_SP(cmd) = NULL;
 821         cmd->scsi_done(cmd);
 822         if (comp)
 823                 complete(comp);
 824 }
 825
 826 static int
 827 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 828 {
 829         scsi_qla_host_t *vha = shost_priv(host);
 830         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 831         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 832         struct qla_hw_data *ha = vha->hw;
 833         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 834         srb_t *sp;
 835         int rval;
 836
 837         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 838             WARN_ON_ONCE(!rport)) {
 839                 cmd->result = DID_NO_CONNECT << 16;
 840                 goto qc24_fail_command;
 841         }
 842
 843         if (ha->mqenable) {
 844                 uint32_t tag;
 845                 uint16_t hwq;
 846                 struct qla_qpair *qpair = NULL;
 847
 848                 tag = blk_mq_unique_tag(cmd->request);
 849                 hwq = blk_mq_unique_tag_to_hwq(tag);
 850                 qpair = ha->queue_pair_map[hwq];
 851
 852                 if (qpair)
 853                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 854         }
 855
 856         if (ha->flags.eeh_busy) {
 857                 if (ha->flags.pci_channel_io_perm_failure) {
 858                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 859                             "PCI Channel IO permanent failure, exiting "
 860                             "cmd=%p.\n", cmd);
 861                         cmd->result = DID_NO_CONNECT << 16;
 862                 } else {
 863                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 864                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 865                         cmd->result = DID_REQUEUE << 16;
 866                 }
 867                 goto qc24_fail_command;
 868         }
 869
 870         rval = fc_remote_port_chkready(rport);
 871         if (rval) {
 872                 cmd->result = rval;
 873                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 874                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 875                     cmd, rval);
 876                 goto qc24_fail_command;
 877         }
 878
 879         if (!vha->flags.difdix_supported &&
 880                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 881                         ql_dbg(ql_dbg_io, vha, 0x3004,
 882                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 883                             cmd);
 884                         cmd->result = DID_NO_CONNECT << 16;
 885                         goto qc24_fail_command;
 886         }
 887
 888         if (!fcport) {
 889                 cmd->result = DID_NO_CONNECT << 16;
 890                 goto qc24_fail_command;
 891         }
 892
 893         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 894                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 895                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 896                         ql_dbg(ql_dbg_io, vha, 0x3005,
 897                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 898                             atomic_read(&fcport->state),
 899                             atomic_read(&base_vha->loop_state));
 900                         cmd->result = DID_NO_CONNECT << 16;
 901                         goto qc24_fail_command;
 902                 }
 903                 goto qc24_target_busy;
 904         }
 905
 906         /*
 907          * Return target busy if we've received a non-zero retry_delay_timer
 908          * in a FCP_RSP.
 909          */
 910         if (fcport->retry_delay_timestamp == 0) {
 911                 /* retry delay not set */
 912         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 913                 fcport->retry_delay_timestamp = 0;
 914         else
 915                 goto qc24_target_busy;
 916
 917         sp = scsi_cmd_priv(cmd);
 918         qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport);
 919
 920         sp->u.scmd.cmd = cmd;
 921         sp->type = SRB_SCSI_CMD;
 922
 923         CMD_SP(cmd) = (void *)sp;
 924         sp->free = qla2x00_sp_free_dma;
 925         sp->done = qla2x00_sp_compl;
 926
 927         rval = ha->isp_ops->start_scsi(sp);
 928         if (rval != QLA_SUCCESS) {
 929                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 930                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 931                 goto qc24_host_busy_free_sp;
 932         }
 933
 934         return 0;
 935
 936 qc24_host_busy_free_sp:
 937         sp->free(sp);
 938
 939 qc24_target_busy:
 940         return SCSI_MLQUEUE_TARGET_BUSY;
 941
 942 qc24_fail_command:
 943         cmd->scsi_done(cmd);
 944
 945         return 0;
 946 }
 947
 948 /* For MQ supported I/O */
 949 int
 950 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 951     struct qla_qpair *qpair)
 952 {
 953         scsi_qla_host_t *vha = shost_priv(host);
 954         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 955         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 956         struct qla_hw_data *ha = vha->hw;
 957         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 958         srb_t *sp;
 959         int rval;
 960
 961         rval = rport ? fc_remote_port_chkready(rport) : FC_PORTSTATE_OFFLINE;
 962         if (rval) {
 963                 cmd->result = rval;
 964                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 965                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 966                     cmd, rval);
 967                 goto qc24_fail_command;
 968         }
 969
 970         if (!fcport) {
 971                 cmd->result = DID_NO_CONNECT << 16;
 972                 goto qc24_fail_command;
 973         }
 974
 975         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 976                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 977                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 978                         ql_dbg(ql_dbg_io, vha, 0x3077,
 979                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 980                             atomic_read(&fcport->state),
 981                             atomic_read(&base_vha->loop_state));
 982                         cmd->result = DID_NO_CONNECT << 16;
 983                         goto qc24_fail_command;
 984                 }
 985                 goto qc24_target_busy;
 986         }
 987
 988         /*
 989          * Return target busy if we've received a non-zero retry_delay_timer
 990          * in a FCP_RSP.
 991          */
 992         if (fcport->retry_delay_timestamp == 0) {
 993                 /* retry delay not set */
 994         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 995                 fcport->retry_delay_timestamp = 0;
 996         else
 997                 goto qc24_target_busy;
 998
 999         sp = scsi_cmd_priv(cmd);
1000         qla2xxx_init_sp(sp, vha, qpair, fcport);
1001
1002         sp->u.scmd.cmd = cmd;
1003         sp->type = SRB_SCSI_CMD;
1004         CMD_SP(cmd) = (void *)sp;
1005         sp->free = qla2xxx_qpair_sp_free_dma;
1006         sp->done = qla2xxx_qpair_sp_compl;
1007
1008         rval = ha->isp_ops->start_scsi_mq(sp);
1009         if (rval != QLA_SUCCESS) {
1010                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1011                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1012                 if (rval == QLA_INTERFACE_ERROR)
1013                         goto qc24_free_sp_fail_command;
1014                 goto qc24_host_busy_free_sp;
1015         }
1016
1017         return 0;
1018
1019 qc24_host_busy_free_sp:
1020         sp->free(sp);
1021
1022 qc24_target_busy:
1023         return SCSI_MLQUEUE_TARGET_BUSY;
1024
1025 qc24_free_sp_fail_command:
1026         sp->free(sp);
1027         CMD_SP(cmd) = NULL;
1028         qla2xxx_rel_qpair_sp(sp->qpair, sp);
1029
1030 qc24_fail_command:
1031         cmd->scsi_done(cmd);
1032
1033         return 0;
1034 }
1035
1036 /*
1037  * qla2x00_eh_wait_on_command
1038  *    Waits for the command to be returned by the Firmware for some
1039  *    max time.
1040  *
1041  * Input:
1042  *    cmd = Scsi Command to wait on.
1043  *
1044  * Return:
1045  *    Completed in time : QLA_SUCCESS
1046  *    Did not complete in time : QLA_FUNCTION_FAILED
1047  */
1048 static int
1049 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1050 {
1051 #define ABORT_POLLING_PERIOD    1000
1052 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1053         unsigned long wait_iter = ABORT_WAIT_ITER;
1054         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1055         struct qla_hw_data *ha = vha->hw;
1056         int ret = QLA_SUCCESS;
1057
1058         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1059                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1060                     "Return:eh_wait.\n");
1061                 return ret;
1062         }
1063
1064         while (CMD_SP(cmd) && wait_iter--) {
1065                 msleep(ABORT_POLLING_PERIOD);
1066         }
1067         if (CMD_SP(cmd))
1068                 ret = QLA_FUNCTION_FAILED;
1069
1070         return ret;
1071 }
1072
1073 /*
1074  * qla2x00_wait_for_hba_online
1075  *    Wait till the HBA is online after going through
1076  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1077  *    finally HBA is disabled ie marked offline
1078  *
1079  * Input:
1080  *     ha - pointer to host adapter structure
1081  *
1082  * Note:
1083  *    Does context switching-Release SPIN_LOCK
1084  *    (if any) before calling this routine.
1085  *
1086  * Return:
1087  *    Success (Adapter is online) : 0
1088  *    Failed  (Adapter is offline/disabled) : 1
1089  */
1090 int
1091 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1092 {
1093         int             return_status;
1094         unsigned long   wait_online;
1095         struct qla_hw_data *ha = vha->hw;
1096         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1097
1098         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1099         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1100             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1101             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1102             ha->dpc_active) && time_before(jiffies, wait_online)) {
1103
1104                 msleep(1000);
1105         }
1106         if (base_vha->flags.online)
1107                 return_status = QLA_SUCCESS;
1108         else
1109                 return_status = QLA_FUNCTION_FAILED;
1110
1111         return (return_status);
1112 }
1113
1114 static inline int test_fcport_count(scsi_qla_host_t *vha)
1115 {
1116         struct qla_hw_data *ha = vha->hw;
1117         unsigned long flags;
1118         int res;
1119
1120         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1121         ql_dbg(ql_dbg_init, vha, 0x00ec,
1122             "tgt %p, fcport_count=%d\n",
1123             vha, vha->fcport_count);
1124         res = (vha->fcport_count == 0);
1125         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1126
1127         return res;
1128 }
1129
1130 /*
1131  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1132  * it has dependency on UNLOADING flag to stop device discovery
1133  */
1134 void
1135 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1136 {
1137         u8 i;
1138
1139         qla2x00_mark_all_devices_lost(vha);
1140
1141         for (i = 0; i < 10; i++) {
1142                 if (wait_event_timeout(vha->fcport_waitQ,
1143                     test_fcport_count(vha), HZ) > 0)
1144                         break;
1145         }
1146
1147         flush_workqueue(vha->hw->wq);
1148 }
1149
1150 /*
1151  * qla2x00_wait_for_hba_ready
1152  * Wait till the HBA is ready before doing driver unload
1153  *
1154  * Input:
1155  *     ha - pointer to host adapter structure
1156  *
1157  * Note:
1158  *    Does context switching-Release SPIN_LOCK
1159  *    (if any) before calling this routine.
1160  *
1161  */
1162 static void
1163 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1164 {
1165         struct qla_hw_data *ha = vha->hw;
1166         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1167
1168         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1169                 ha->flags.mbox_busy) ||
1170                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1171                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1172                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1173                         break;
1174                 msleep(1000);
1175         }
1176 }
1177
1178 int
1179 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1180 {
1181         int             return_status;
1182         unsigned long   wait_reset;
1183         struct qla_hw_data *ha = vha->hw;
1184         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1185
1186         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1187         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1188             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1189             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1190             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1191
1192                 msleep(1000);
1193
1194                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1195                     ha->flags.chip_reset_done)
1196                         break;
1197         }
1198         if (ha->flags.chip_reset_done)
1199                 return_status = QLA_SUCCESS;
1200         else
1201                 return_status = QLA_FUNCTION_FAILED;
1202
1203         return return_status;
1204 }
1205
1206 #define ISP_REG_DISCONNECT 0xffffffffU
1207 /**************************************************************************
1208 * qla2x00_isp_reg_stat
1209 *
1210 * Description:
1211 *       Read the host status register of ISP before aborting the command.
1212 *
1213 * Input:
1214 *       ha = pointer to host adapter structure.
1215 *
1216 *
1217 * Returns:
1218 *       Either true or false.
1219 *
1220 * Note: Return true if there is register disconnect.
1221 **************************************************************************/
1222 static inline
1223 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1224 {
1225         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1226         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1227
1228         if (IS_P3P_TYPE(ha))
1229                 return ((rd_reg_dword(&reg82->host_int)) == ISP_REG_DISCONNECT);
1230         else
1231                 return ((rd_reg_dword(&reg->host_status)) ==
1232                         ISP_REG_DISCONNECT);
1233 }
1234
1235 /**************************************************************************
1236 * qla2xxx_eh_abort
1237 *
1238 * Description:
1239 *    The abort function will abort the specified command.
1240 *
1241 * Input:
1242 *    cmd = Linux SCSI command packet to be aborted.
1243 *
1244 * Returns:
1245 *    Either SUCCESS or FAILED.
1246 *
1247 * Note:
1248 *    Only return FAILED if command not returned by firmware.
1249 **************************************************************************/
1250 static int
1251 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1252 {
1253         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1254         DECLARE_COMPLETION_ONSTACK(comp);
1255         srb_t *sp;
1256         int ret;
1257         unsigned int id;
1258         uint64_t lun;
1259         int rval;
1260         struct qla_hw_data *ha = vha->hw;
1261         uint32_t ratov_j;
1262         struct qla_qpair *qpair;
1263         unsigned long flags;
1264
1265         if (qla2x00_isp_reg_stat(ha)) {
1266                 ql_log(ql_log_info, vha, 0x8042,
1267                     "PCI/Register disconnect, exiting.\n");
1268                 return FAILED;
1269         }
1270
1271         ret = fc_block_scsi_eh(cmd);
1272         if (ret != 0)
1273                 return ret;
1274
1275         sp = scsi_cmd_priv(cmd);
1276         qpair = sp->qpair;
1277
1278         if ((sp->fcport && sp->fcport->deleted) || !qpair)
1279                 return SUCCESS;
1280
1281         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1282         sp->comp = &comp;
1283         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1284
1285
1286         id = cmd->device->id;
1287         lun = cmd->device->lun;
1288
1289         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1290             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1291             vha->host_no, id, lun, sp, cmd, sp->handle);
1292
1293         /*
1294          * Abort will release the original Command/sp from FW. Let the
1295          * original command call scsi_done. In return, he will wakeup
1296          * this sleeping thread.
1297          */
1298         rval = ha->isp_ops->abort_command(sp);
1299
1300         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1301                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1302
1303         /* Wait for the command completion. */
1304         ratov_j = ha->r_a_tov/10 * 4 * 1000;
1305         ratov_j = msecs_to_jiffies(ratov_j);
1306         switch (rval) {
1307         case QLA_SUCCESS:
1308                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1309                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1310                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1311                             __func__, ha->r_a_tov/10);
1312                         ret = FAILED;
1313                 } else {
1314                         ret = SUCCESS;
1315                 }
1316                 break;
1317         default:
1318                 ret = FAILED;
1319                 break;
1320         }
1321
1322         sp->comp = NULL;
1323
1324         ql_log(ql_log_info, vha, 0x801c,
1325             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1326             vha->host_no, id, lun, ret);
1327
1328         return ret;
1329 }
1330
1331 /*
1332  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1333  */
1334 int
1335 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1336         uint64_t l, enum nexus_wait_type type)
1337 {
1338         int cnt, match, status;
1339         unsigned long flags;
1340         struct qla_hw_data *ha = vha->hw;
1341         struct req_que *req;
1342         srb_t *sp;
1343         struct scsi_cmnd *cmd;
1344
1345         status = QLA_SUCCESS;
1346
1347         spin_lock_irqsave(&ha->hardware_lock, flags);
1348         req = vha->req;
1349         for (cnt = 1; status == QLA_SUCCESS &&
1350                 cnt < req->num_outstanding_cmds; cnt++) {
1351                 sp = req->outstanding_cmds[cnt];
1352                 if (!sp)
1353                         continue;
1354                 if (sp->type != SRB_SCSI_CMD)
1355                         continue;
1356                 if (vha->vp_idx != sp->vha->vp_idx)
1357                         continue;
1358                 match = 0;
1359                 cmd = GET_CMD_SP(sp);
1360                 switch (type) {
1361                 case WAIT_HOST:
1362                         match = 1;
1363                         break;
1364                 case WAIT_TARGET:
1365                         match = cmd->device->id == t;
1366                         break;
1367                 case WAIT_LUN:
1368                         match = (cmd->device->id == t &&
1369                                 cmd->device->lun == l);
1370                         break;
1371                 }
1372                 if (!match)
1373                         continue;
1374
1375                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1376                 status = qla2x00_eh_wait_on_command(cmd);
1377                 spin_lock_irqsave(&ha->hardware_lock, flags);
1378         }
1379         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1380
1381         return status;
1382 }
1383
1384 static char *reset_errors[] = {
1385         "HBA not online",
1386         "HBA not ready",
1387         "Task management failed",
1388         "Waiting for command completions",
1389 };
1390
1391 static int
1392 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1393     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1394 {
1395         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1396         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1397         int err;
1398
1399         if (!fcport) {
1400                 return FAILED;
1401         }
1402
1403         err = fc_block_scsi_eh(cmd);
1404         if (err != 0)
1405                 return err;
1406
1407         if (fcport->deleted)
1408                 return SUCCESS;
1409
1410         ql_log(ql_log_info, vha, 0x8009,
1411             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1412             cmd->device->id, cmd->device->lun, cmd);
1413
1414         err = 0;
1415         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1416                 ql_log(ql_log_warn, vha, 0x800a,
1417                     "Wait for hba online failed for cmd=%p.\n", cmd);
1418                 goto eh_reset_failed;
1419         }
1420         err = 2;
1421         if (do_reset(fcport, cmd->device->lun, 1)
1422                 != QLA_SUCCESS) {
1423                 ql_log(ql_log_warn, vha, 0x800c,
1424                     "do_reset failed for cmd=%p.\n", cmd);
1425                 goto eh_reset_failed;
1426         }
1427         err = 3;
1428         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1429             cmd->device->lun, type) != QLA_SUCCESS) {
1430                 ql_log(ql_log_warn, vha, 0x800d,
1431                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1432                 goto eh_reset_failed;
1433         }
1434
1435         ql_log(ql_log_info, vha, 0x800e,
1436             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1437             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1438
1439         return SUCCESS;
1440
1441 eh_reset_failed:
1442         ql_log(ql_log_info, vha, 0x800f,
1443             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1444             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1445             cmd);
1446         return FAILED;
1447 }
1448
1449 static int
1450 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1451 {
1452         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1453         struct qla_hw_data *ha = vha->hw;
1454
1455         if (qla2x00_isp_reg_stat(ha)) {
1456                 ql_log(ql_log_info, vha, 0x803e,
1457                     "PCI/Register disconnect, exiting.\n");
1458                 return FAILED;
1459         }
1460
1461         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1462             ha->isp_ops->lun_reset);
1463 }
1464
1465 static int
1466 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1467 {
1468         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1469         struct qla_hw_data *ha = vha->hw;
1470
1471         if (qla2x00_isp_reg_stat(ha)) {
1472                 ql_log(ql_log_info, vha, 0x803f,
1473                     "PCI/Register disconnect, exiting.\n");
1474                 return FAILED;
1475         }
1476
1477         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1478             ha->isp_ops->target_reset);
1479 }
1480
1481 /**************************************************************************
1482 * qla2xxx_eh_bus_reset
1483 *
1484 * Description:
1485 *    The bus reset function will reset the bus and abort any executing
1486 *    commands.
1487 *
1488 * Input:
1489 *    cmd = Linux SCSI command packet of the command that cause the
1490 *          bus reset.
1491 *
1492 * Returns:
1493 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1494 *
1495 **************************************************************************/
1496 static int
1497 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1498 {
1499         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1500         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1501         int ret = FAILED;
1502         unsigned int id;
1503         uint64_t lun;
1504         struct qla_hw_data *ha = vha->hw;
1505
1506         if (qla2x00_isp_reg_stat(ha)) {
1507                 ql_log(ql_log_info, vha, 0x8040,
1508                     "PCI/Register disconnect, exiting.\n");
1509                 return FAILED;
1510         }
1511
1512         id = cmd->device->id;
1513         lun = cmd->device->lun;
1514
1515         if (!fcport) {
1516                 return ret;
1517         }
1518
1519         ret = fc_block_scsi_eh(cmd);
1520         if (ret != 0)
1521                 return ret;
1522         ret = FAILED;
1523
1524         if (qla2x00_chip_is_down(vha))
1525                 return ret;
1526
1527         ql_log(ql_log_info, vha, 0x8012,
1528             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1529
1530         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1531                 ql_log(ql_log_fatal, vha, 0x8013,
1532                     "Wait for hba online failed board disabled.\n");
1533                 goto eh_bus_reset_done;
1534         }
1535
1536         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1537                 ret = SUCCESS;
1538
1539         if (ret == FAILED)
1540                 goto eh_bus_reset_done;
1541
1542         /* Flush outstanding commands. */
1543         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1544             QLA_SUCCESS) {
1545                 ql_log(ql_log_warn, vha, 0x8014,
1546                     "Wait for pending commands failed.\n");
1547                 ret = FAILED;
1548         }
1549
1550 eh_bus_reset_done:
1551         ql_log(ql_log_warn, vha, 0x802b,
1552             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1553             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1554
1555         return ret;
1556 }
1557
1558 /**************************************************************************
1559 * qla2xxx_eh_host_reset
1560 *
1561 * Description:
1562 *    The reset function will reset the Adapter.
1563 *
1564 * Input:
1565 *      cmd = Linux SCSI command packet of the command that cause the
1566 *            adapter reset.
1567 *
1568 * Returns:
1569 *      Either SUCCESS or FAILED.
1570 *
1571 * Note:
1572 **************************************************************************/
1573 static int
1574 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1575 {
1576         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1577         struct qla_hw_data *ha = vha->hw;
1578         int ret = FAILED;
1579         unsigned int id;
1580         uint64_t lun;
1581         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1582
1583         if (qla2x00_isp_reg_stat(ha)) {
1584                 ql_log(ql_log_info, vha, 0x8041,
1585                     "PCI/Register disconnect, exiting.\n");
1586                 schedule_work(&ha->board_disable);
1587                 return SUCCESS;
1588         }
1589
1590         id = cmd->device->id;
1591         lun = cmd->device->lun;
1592
1593         ql_log(ql_log_info, vha, 0x8018,
1594             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1595
1596         /*
1597          * No point in issuing another reset if one is active.  Also do not
1598          * attempt a reset if we are updating flash.
1599          */
1600         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1601                 goto eh_host_reset_lock;
1602
1603         if (vha != base_vha) {
1604                 if (qla2x00_vp_abort_isp(vha))
1605                         goto eh_host_reset_lock;
1606         } else {
1607                 if (IS_P3P_TYPE(vha->hw)) {
1608                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1609                                 /* Ctx reset success */
1610                                 ret = SUCCESS;
1611                                 goto eh_host_reset_lock;
1612                         }
1613                         /* fall thru if ctx reset failed */
1614                 }
1615                 if (ha->wq)
1616                         flush_workqueue(ha->wq);
1617
1618                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1619                 if (ha->isp_ops->abort_isp(base_vha)) {
1620                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1621                         /* failed. schedule dpc to try */
1622                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1623
1624                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1625                                 ql_log(ql_log_warn, vha, 0x802a,
1626                                     "wait for hba online failed.\n");
1627                                 goto eh_host_reset_lock;
1628                         }
1629                 }
1630                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1631         }
1632
1633         /* Waiting for command to be returned to OS.*/
1634         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1635                 QLA_SUCCESS)
1636                 ret = SUCCESS;
1637
1638 eh_host_reset_lock:
1639         ql_log(ql_log_info, vha, 0x8017,
1640             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1641             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1642
1643         return ret;
1644 }
1645
1646 /*
1647 * qla2x00_loop_reset
1648 *      Issue loop reset.
1649 *
1650 * Input:
1651 *      ha = adapter block pointer.
1652 *
1653 * Returns:
1654 *      0 = success
1655 */
1656 int
1657 qla2x00_loop_reset(scsi_qla_host_t *vha)
1658 {
1659         int ret;
1660         struct fc_port *fcport;
1661         struct qla_hw_data *ha = vha->hw;
1662
1663         if (IS_QLAFX00(ha)) {
1664                 return qlafx00_loop_reset(vha);
1665         }
1666
1667         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1668                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1669                         if (fcport->port_type != FCT_TARGET)
1670                                 continue;
1671
1672                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1673                         if (ret != QLA_SUCCESS) {
1674                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1675                                     "Bus Reset failed: Reset=%d "
1676                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1677                         }
1678                 }
1679         }
1680
1681
1682         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1683                 atomic_set(&vha->loop_state, LOOP_DOWN);
1684                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1685                 qla2x00_mark_all_devices_lost(vha);
1686                 ret = qla2x00_full_login_lip(vha);
1687                 if (ret != QLA_SUCCESS) {
1688                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1689                             "full_login_lip=%d.\n", ret);
1690                 }
1691         }
1692
1693         if (ha->flags.enable_lip_reset) {
1694                 ret = qla2x00_lip_reset(vha);
1695                 if (ret != QLA_SUCCESS)
1696                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1697                             "lip_reset failed (%d).\n", ret);
1698         }
1699
1700         /* Issue marker command only when we are going to start the I/O */
1701         vha->marker_needed = 1;
1702
1703         return QLA_SUCCESS;
1704 }
1705
1706 /*
1707  * The caller must ensure that no completion interrupts will happen
1708  * while this function is in progress.
1709  */
1710 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1711                               unsigned long *flags)
1712         __releases(qp->qp_lock_ptr)
1713         __acquires(qp->qp_lock_ptr)
1714 {
1715         DECLARE_COMPLETION_ONSTACK(comp);
1716         scsi_qla_host_t *vha = qp->vha;
1717         struct qla_hw_data *ha = vha->hw;
1718         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1719         int rval;
1720         bool ret_cmd;
1721         uint32_t ratov_j;
1722
1723         lockdep_assert_held(qp->qp_lock_ptr);
1724
1725         if (qla2x00_chip_is_down(vha)) {
1726                 sp->done(sp, res);
1727                 return;
1728         }
1729
1730         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1731             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1732              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1733              !qla2x00_isp_reg_stat(ha))) {
1734                 if (sp->comp) {
1735                         sp->done(sp, res);
1736                         return;
1737                 }
1738
1739                 sp->comp = &comp;
1740                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1741
1742                 rval = ha->isp_ops->abort_command(sp);
1743                 /* Wait for command completion. */
1744                 ret_cmd = false;
1745                 ratov_j = ha->r_a_tov/10 * 4 * 1000;
1746                 ratov_j = msecs_to_jiffies(ratov_j);
1747                 switch (rval) {
1748                 case QLA_SUCCESS:
1749                         if (wait_for_completion_timeout(&comp, ratov_j)) {
1750                                 ql_dbg(ql_dbg_taskm, vha, 0xffff,
1751                                     "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1752                                     __func__, ha->r_a_tov/10);
1753                                 ret_cmd = true;
1754                         }
1755                         /* else FW return SP to driver */
1756                         break;
1757                 default:
1758                         ret_cmd = true;
1759                         break;
1760                 }
1761
1762                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1763                 if (ret_cmd && blk_mq_request_started(cmd->request))
1764                         sp->done(sp, res);
1765         } else {
1766                 sp->done(sp, res);
1767         }
1768 }
1769
1770 /*
1771  * The caller must ensure that no completion interrupts will happen
1772  * while this function is in progress.
1773  */
1774 static void
1775 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1776 {
1777         int cnt;
1778         unsigned long flags;
1779         srb_t *sp;
1780         scsi_qla_host_t *vha = qp->vha;
1781         struct qla_hw_data *ha = vha->hw;
1782         struct req_que *req;
1783         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1784         struct qla_tgt_cmd *cmd;
1785
1786         if (!ha->req_q_map)
1787                 return;
1788         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1789         req = qp->req;
1790         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1791                 sp = req->outstanding_cmds[cnt];
1792                 if (sp) {
1793                         switch (sp->cmd_type) {
1794                         case TYPE_SRB:
1795                                 qla2x00_abort_srb(qp, sp, res, &flags);
1796                                 break;
1797                         case TYPE_TGT_CMD:
1798                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1799                                     qla_ini_mode_enabled(vha)) {
1800                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1801                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1802                                             vha->dpc_flags);
1803                                         continue;
1804                                 }
1805                                 cmd = (struct qla_tgt_cmd *)sp;
1806                                 cmd->aborted = 1;
1807                                 break;
1808                         case TYPE_TGT_TMCMD:
1809                                 /* Skip task management functions. */
1810                                 break;
1811                         default:
1812                                 break;
1813                         }
1814                         req->outstanding_cmds[cnt] = NULL;
1815                 }
1816         }
1817         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1818 }
1819
1820 /*
1821  * The caller must ensure that no completion interrupts will happen
1822  * while this function is in progress.
1823  */
1824 void
1825 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1826 {
1827         int que;
1828         struct qla_hw_data *ha = vha->hw;
1829
1830         /* Continue only if initialization complete. */
1831         if (!ha->base_qpair)
1832                 return;
1833         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1834
1835         if (!ha->queue_pair_map)
1836                 return;
1837         for (que = 0; que < ha->max_qpairs; que++) {
1838                 if (!ha->queue_pair_map[que])
1839                         continue;
1840
1841                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1842         }
1843 }
1844
1845 static int
1846 qla2xxx_slave_alloc(struct scsi_device *sdev)
1847 {
1848         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1849
1850         if (!rport || fc_remote_port_chkready(rport))
1851                 return -ENXIO;
1852
1853         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1854
1855         return 0;
1856 }
1857
1858 static int
1859 qla2xxx_slave_configure(struct scsi_device *sdev)
1860 {
1861         scsi_qla_host_t *vha = shost_priv(sdev->host);
1862         struct req_que *req = vha->req;
1863
1864         if (IS_T10_PI_CAPABLE(vha->hw))
1865                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1866
1867         scsi_change_queue_depth(sdev, req->max_q_depth);
1868         return 0;
1869 }
1870
1871 static void
1872 qla2xxx_slave_destroy(struct scsi_device *sdev)
1873 {
1874         sdev->hostdata = NULL;
1875 }
1876
1877 /**
1878  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1879  * @ha: HA context
1880  *
1881  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1882  * supported addressing method.
1883  */
1884 static void
1885 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1886 {
1887         /* Assume a 32bit DMA mask. */
1888         ha->flags.enable_64bit_addressing = 0;
1889
1890         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1891                 /* Any upper-dword bits set? */
1892                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1893                     !dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1894                         /* Ok, a 64bit DMA mask is applicable. */
1895                         ha->flags.enable_64bit_addressing = 1;
1896                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1897                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1898                         return;
1899                 }
1900         }
1901
1902         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1903         dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1904 }
1905
1906 static void
1907 qla2x00_enable_intrs(struct qla_hw_data *ha)
1908 {
1909         unsigned long flags = 0;
1910         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1911
1912         spin_lock_irqsave(&ha->hardware_lock, flags);
1913         ha->interrupts_on = 1;
1914         /* enable risc and host interrupts */
1915         wrt_reg_word(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1916         rd_reg_word(&reg->ictrl);
1917         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1918
1919 }
1920
1921 static void
1922 qla2x00_disable_intrs(struct qla_hw_data *ha)
1923 {
1924         unsigned long flags = 0;
1925         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1926
1927         spin_lock_irqsave(&ha->hardware_lock, flags);
1928         ha->interrupts_on = 0;
1929         /* disable risc and host interrupts */
1930         wrt_reg_word(&reg->ictrl, 0);
1931         rd_reg_word(&reg->ictrl);
1932         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1933 }
1934
1935 static void
1936 qla24xx_enable_intrs(struct qla_hw_data *ha)
1937 {
1938         unsigned long flags = 0;
1939         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1940
1941         spin_lock_irqsave(&ha->hardware_lock, flags);
1942         ha->interrupts_on = 1;
1943         wrt_reg_dword(&reg->ictrl, ICRX_EN_RISC_INT);
1944         rd_reg_dword(&reg->ictrl);
1945         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1946 }
1947
1948 static void
1949 qla24xx_disable_intrs(struct qla_hw_data *ha)
1950 {
1951         unsigned long flags = 0;
1952         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1953
1954         if (IS_NOPOLLING_TYPE(ha))
1955                 return;
1956         spin_lock_irqsave(&ha->hardware_lock, flags);
1957         ha->interrupts_on = 0;
1958         wrt_reg_dword(&reg->ictrl, 0);
1959         rd_reg_dword(&reg->ictrl);
1960         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1961 }
1962
1963 static int
1964 qla2x00_iospace_config(struct qla_hw_data *ha)
1965 {
1966         resource_size_t pio;
1967         uint16_t msix;
1968
1969         if (pci_request_selected_regions(ha->pdev, ha->bars,
1970             QLA2XXX_DRIVER_NAME)) {
1971                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1972                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1973                     pci_name(ha->pdev));
1974                 goto iospace_error_exit;
1975         }
1976         if (!(ha->bars & 1))
1977                 goto skip_pio;
1978
1979         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1980         pio = pci_resource_start(ha->pdev, 0);
1981         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1982                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1983                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1984                             "Invalid pci I/O region size (%s).\n",
1985                             pci_name(ha->pdev));
1986                         pio = 0;
1987                 }
1988         } else {
1989                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1990                     "Region #0 no a PIO resource (%s).\n",
1991                     pci_name(ha->pdev));
1992                 pio = 0;
1993         }
1994         ha->pio_address = pio;
1995         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1996             "PIO address=%llu.\n",
1997             (unsigned long long)ha->pio_address);
1998
1999 skip_pio:
2000         /* Use MMIO operations for all accesses. */
2001         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
2002                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
2003                     "Region #1 not an MMIO resource (%s), aborting.\n",
2004                     pci_name(ha->pdev));
2005                 goto iospace_error_exit;
2006         }
2007         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2008                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2009                     "Invalid PCI mem region size (%s), aborting.\n",
2010                     pci_name(ha->pdev));
2011                 goto iospace_error_exit;
2012         }
2013
2014         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2015         if (!ha->iobase) {
2016                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2017                     "Cannot remap MMIO (%s), aborting.\n",
2018                     pci_name(ha->pdev));
2019                 goto iospace_error_exit;
2020         }
2021
2022         /* Determine queue resources */
2023         ha->max_req_queues = ha->max_rsp_queues = 1;
2024         ha->msix_count = QLA_BASE_VECTORS;
2025
2026         /* Check if FW supports MQ or not */
2027         if (!(ha->fw_attributes & BIT_6))
2028                 goto mqiobase_exit;
2029
2030         if (!ql2xmqsupport || !ql2xnvmeenable ||
2031             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2032                 goto mqiobase_exit;
2033
2034         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2035                         pci_resource_len(ha->pdev, 3));
2036         if (ha->mqiobase) {
2037                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2038                     "MQIO Base=%p.\n", ha->mqiobase);
2039                 /* Read MSIX vector size of the board */
2040                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2041                 ha->msix_count = msix + 1;
2042                 /* Max queues are bounded by available msix vectors */
2043                 /* MB interrupt uses 1 vector */
2044                 ha->max_req_queues = ha->msix_count - 1;
2045                 ha->max_rsp_queues = ha->max_req_queues;
2046                 /* Queue pairs is the max value minus the base queue pair */
2047                 ha->max_qpairs = ha->max_rsp_queues - 1;
2048                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2049                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2050
2051                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2052                     "MSI-X vector count: %d.\n", ha->msix_count);
2053         } else
2054                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2055                     "BAR 3 not enabled.\n");
2056
2057 mqiobase_exit:
2058         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2059             "MSIX Count: %d.\n", ha->msix_count);
2060         return (0);
2061
2062 iospace_error_exit:
2063         return (-ENOMEM);
2064 }
2065
2066
2067 static int
2068 qla83xx_iospace_config(struct qla_hw_data *ha)
2069 {
2070         uint16_t msix;
2071
2072         if (pci_request_selected_regions(ha->pdev, ha->bars,
2073             QLA2XXX_DRIVER_NAME)) {
2074                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2075                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2076                     pci_name(ha->pdev));
2077
2078                 goto iospace_error_exit;
2079         }
2080
2081         /* Use MMIO operations for all accesses. */
2082         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2083                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2084                     "Invalid pci I/O region size (%s).\n",
2085                     pci_name(ha->pdev));
2086                 goto iospace_error_exit;
2087         }
2088         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2089                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2090                     "Invalid PCI mem region size (%s), aborting\n",
2091                         pci_name(ha->pdev));
2092                 goto iospace_error_exit;
2093         }
2094
2095         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2096         if (!ha->iobase) {
2097                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2098                     "Cannot remap MMIO (%s), aborting.\n",
2099                     pci_name(ha->pdev));
2100                 goto iospace_error_exit;
2101         }
2102
2103         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2104         /* 83XX 26XX always use MQ type access for queues
2105          * - mbar 2, a.k.a region 4 */
2106         ha->max_req_queues = ha->max_rsp_queues = 1;
2107         ha->msix_count = QLA_BASE_VECTORS;
2108         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2109                         pci_resource_len(ha->pdev, 4));
2110
2111         if (!ha->mqiobase) {
2112                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2113                     "BAR2/region4 not enabled\n");
2114                 goto mqiobase_exit;
2115         }
2116
2117         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2118                         pci_resource_len(ha->pdev, 2));
2119         if (ha->msixbase) {
2120                 /* Read MSIX vector size of the board */
2121                 pci_read_config_word(ha->pdev,
2122                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2123                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2124                 /*
2125                  * By default, driver uses at least two msix vectors
2126                  * (default & rspq)
2127                  */
2128                 if (ql2xmqsupport || ql2xnvmeenable) {
2129                         /* MB interrupt uses 1 vector */
2130                         ha->max_req_queues = ha->msix_count - 1;
2131
2132                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2133                         if (QLA_TGT_MODE_ENABLED())
2134                                 ha->max_req_queues--;
2135
2136                         ha->max_rsp_queues = ha->max_req_queues;
2137
2138                         /* Queue pairs is the max value minus
2139                          * the base queue pair */
2140                         ha->max_qpairs = ha->max_req_queues - 1;
2141                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2142                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2143                 }
2144                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2145                     "MSI-X vector count: %d.\n", ha->msix_count);
2146         } else
2147                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2148                     "BAR 1 not enabled.\n");
2149
2150 mqiobase_exit:
2151         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2152             "MSIX Count: %d.\n", ha->msix_count);
2153         return 0;
2154
2155 iospace_error_exit:
2156         return -ENOMEM;
2157 }
2158
2159 static struct isp_operations qla2100_isp_ops = {
2160         .pci_config             = qla2100_pci_config,
2161         .reset_chip             = qla2x00_reset_chip,
2162         .chip_diag              = qla2x00_chip_diag,
2163         .config_rings           = qla2x00_config_rings,
2164         .reset_adapter          = qla2x00_reset_adapter,
2165         .nvram_config           = qla2x00_nvram_config,
2166         .update_fw_options      = qla2x00_update_fw_options,
2167         .load_risc              = qla2x00_load_risc,
2168         .pci_info_str           = qla2x00_pci_info_str,
2169         .fw_version_str         = qla2x00_fw_version_str,
2170         .intr_handler           = qla2100_intr_handler,
2171         .enable_intrs           = qla2x00_enable_intrs,
2172         .disable_intrs          = qla2x00_disable_intrs,
2173         .abort_command          = qla2x00_abort_command,
2174         .target_reset           = qla2x00_abort_target,
2175         .lun_reset              = qla2x00_lun_reset,
2176         .fabric_login           = qla2x00_login_fabric,
2177         .fabric_logout          = qla2x00_fabric_logout,
2178         .calc_req_entries       = qla2x00_calc_iocbs_32,
2179         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2180         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2181         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2182         .read_nvram             = qla2x00_read_nvram_data,
2183         .write_nvram            = qla2x00_write_nvram_data,
2184         .fw_dump                = qla2100_fw_dump,
2185         .beacon_on              = NULL,
2186         .beacon_off             = NULL,
2187         .beacon_blink           = NULL,
2188         .read_optrom            = qla2x00_read_optrom_data,
2189         .write_optrom           = qla2x00_write_optrom_data,
2190         .get_flash_version      = qla2x00_get_flash_version,
2191         .start_scsi             = qla2x00_start_scsi,
2192         .start_scsi_mq          = NULL,
2193         .abort_isp              = qla2x00_abort_isp,
2194         .iospace_config         = qla2x00_iospace_config,
2195         .initialize_adapter     = qla2x00_initialize_adapter,
2196 };
2197
2198 static struct isp_operations qla2300_isp_ops = {
2199         .pci_config             = qla2300_pci_config,
2200         .reset_chip             = qla2x00_reset_chip,
2201         .chip_diag              = qla2x00_chip_diag,
2202         .config_rings           = qla2x00_config_rings,
2203         .reset_adapter          = qla2x00_reset_adapter,
2204         .nvram_config           = qla2x00_nvram_config,
2205         .update_fw_options      = qla2x00_update_fw_options,
2206         .load_risc              = qla2x00_load_risc,
2207         .pci_info_str           = qla2x00_pci_info_str,
2208         .fw_version_str         = qla2x00_fw_version_str,
2209         .intr_handler           = qla2300_intr_handler,
2210         .enable_intrs           = qla2x00_enable_intrs,
2211         .disable_intrs          = qla2x00_disable_intrs,
2212         .abort_command          = qla2x00_abort_command,
2213         .target_reset           = qla2x00_abort_target,
2214         .lun_reset              = qla2x00_lun_reset,
2215         .fabric_login           = qla2x00_login_fabric,
2216         .fabric_logout          = qla2x00_fabric_logout,
2217         .calc_req_entries       = qla2x00_calc_iocbs_32,
2218         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2219         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2220         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2221         .read_nvram             = qla2x00_read_nvram_data,
2222         .write_nvram            = qla2x00_write_nvram_data,
2223         .fw_dump                = qla2300_fw_dump,
2224         .beacon_on              = qla2x00_beacon_on,
2225         .beacon_off             = qla2x00_beacon_off,
2226         .beacon_blink           = qla2x00_beacon_blink,
2227         .read_optrom            = qla2x00_read_optrom_data,
2228         .write_optrom           = qla2x00_write_optrom_data,
2229         .get_flash_version      = qla2x00_get_flash_version,
2230         .start_scsi             = qla2x00_start_scsi,
2231         .start_scsi_mq          = NULL,
2232         .abort_isp              = qla2x00_abort_isp,
2233         .iospace_config         = qla2x00_iospace_config,
2234         .initialize_adapter     = qla2x00_initialize_adapter,
2235 };
2236
2237 static struct isp_operations qla24xx_isp_ops = {
2238         .pci_config             = qla24xx_pci_config,
2239         .reset_chip             = qla24xx_reset_chip,
2240         .chip_diag              = qla24xx_chip_diag,
2241         .config_rings           = qla24xx_config_rings,
2242         .reset_adapter          = qla24xx_reset_adapter,
2243         .nvram_config           = qla24xx_nvram_config,
2244         .update_fw_options      = qla24xx_update_fw_options,
2245         .load_risc              = qla24xx_load_risc,
2246         .pci_info_str           = qla24xx_pci_info_str,
2247         .fw_version_str         = qla24xx_fw_version_str,
2248         .intr_handler           = qla24xx_intr_handler,
2249         .enable_intrs           = qla24xx_enable_intrs,
2250         .disable_intrs          = qla24xx_disable_intrs,
2251         .abort_command          = qla24xx_abort_command,
2252         .target_reset           = qla24xx_abort_target,
2253         .lun_reset              = qla24xx_lun_reset,
2254         .fabric_login           = qla24xx_login_fabric,
2255         .fabric_logout          = qla24xx_fabric_logout,
2256         .calc_req_entries       = NULL,
2257         .build_iocbs            = NULL,
2258         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2259         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2260         .read_nvram             = qla24xx_read_nvram_data,
2261         .write_nvram            = qla24xx_write_nvram_data,
2262         .fw_dump                = qla24xx_fw_dump,
2263         .beacon_on              = qla24xx_beacon_on,
2264         .beacon_off             = qla24xx_beacon_off,
2265         .beacon_blink           = qla24xx_beacon_blink,
2266         .read_optrom            = qla24xx_read_optrom_data,
2267         .write_optrom           = qla24xx_write_optrom_data,
2268         .get_flash_version      = qla24xx_get_flash_version,
2269         .start_scsi             = qla24xx_start_scsi,
2270         .start_scsi_mq          = NULL,
2271         .abort_isp              = qla2x00_abort_isp,
2272         .iospace_config         = qla2x00_iospace_config,
2273         .initialize_adapter     = qla2x00_initialize_adapter,
2274 };
2275
2276 static struct isp_operations qla25xx_isp_ops = {
2277         .pci_config             = qla25xx_pci_config,
2278         .reset_chip             = qla24xx_reset_chip,
2279         .chip_diag              = qla24xx_chip_diag,
2280         .config_rings           = qla24xx_config_rings,
2281         .reset_adapter          = qla24xx_reset_adapter,
2282         .nvram_config           = qla24xx_nvram_config,
2283         .update_fw_options      = qla24xx_update_fw_options,
2284         .load_risc              = qla24xx_load_risc,
2285         .pci_info_str           = qla24xx_pci_info_str,
2286         .fw_version_str         = qla24xx_fw_version_str,
2287         .intr_handler           = qla24xx_intr_handler,
2288         .enable_intrs           = qla24xx_enable_intrs,
2289         .disable_intrs          = qla24xx_disable_intrs,
2290         .abort_command          = qla24xx_abort_command,
2291         .target_reset           = qla24xx_abort_target,
2292         .lun_reset              = qla24xx_lun_reset,
2293         .fabric_login           = qla24xx_login_fabric,
2294         .fabric_logout          = qla24xx_fabric_logout,
2295         .calc_req_entries       = NULL,
2296         .build_iocbs            = NULL,
2297         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2298         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2299         .read_nvram             = qla25xx_read_nvram_data,
2300         .write_nvram            = qla25xx_write_nvram_data,
2301         .fw_dump                = qla25xx_fw_dump,
2302         .beacon_on              = qla24xx_beacon_on,
2303         .beacon_off             = qla24xx_beacon_off,
2304         .beacon_blink           = qla24xx_beacon_blink,
2305         .read_optrom            = qla25xx_read_optrom_data,
2306         .write_optrom           = qla24xx_write_optrom_data,
2307         .get_flash_version      = qla24xx_get_flash_version,
2308         .start_scsi             = qla24xx_dif_start_scsi,
2309         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2310         .abort_isp              = qla2x00_abort_isp,
2311         .iospace_config         = qla2x00_iospace_config,
2312         .initialize_adapter     = qla2x00_initialize_adapter,
2313 };
2314
2315 static struct isp_operations qla81xx_isp_ops = {
2316         .pci_config             = qla25xx_pci_config,
2317         .reset_chip             = qla24xx_reset_chip,
2318         .chip_diag              = qla24xx_chip_diag,
2319         .config_rings           = qla24xx_config_rings,
2320         .reset_adapter          = qla24xx_reset_adapter,
2321         .nvram_config           = qla81xx_nvram_config,
2322         .update_fw_options      = qla24xx_update_fw_options,
2323         .load_risc              = qla81xx_load_risc,
2324         .pci_info_str           = qla24xx_pci_info_str,
2325         .fw_version_str         = qla24xx_fw_version_str,
2326         .intr_handler           = qla24xx_intr_handler,
2327         .enable_intrs           = qla24xx_enable_intrs,
2328         .disable_intrs          = qla24xx_disable_intrs,
2329         .abort_command          = qla24xx_abort_command,
2330         .target_reset           = qla24xx_abort_target,
2331         .lun_reset              = qla24xx_lun_reset,
2332         .fabric_login           = qla24xx_login_fabric,
2333         .fabric_logout          = qla24xx_fabric_logout,
2334         .calc_req_entries       = NULL,
2335         .build_iocbs            = NULL,
2336         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2337         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2338         .read_nvram             = NULL,
2339         .write_nvram            = NULL,
2340         .fw_dump                = qla81xx_fw_dump,
2341         .beacon_on              = qla24xx_beacon_on,
2342         .beacon_off             = qla24xx_beacon_off,
2343         .beacon_blink           = qla83xx_beacon_blink,
2344         .read_optrom            = qla25xx_read_optrom_data,
2345         .write_optrom           = qla24xx_write_optrom_data,
2346         .get_flash_version      = qla24xx_get_flash_version,
2347         .start_scsi             = qla24xx_dif_start_scsi,
2348         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2349         .abort_isp              = qla2x00_abort_isp,
2350         .iospace_config         = qla2x00_iospace_config,
2351         .initialize_adapter     = qla2x00_initialize_adapter,
2352 };
2353
2354 static struct isp_operations qla82xx_isp_ops = {
2355         .pci_config             = qla82xx_pci_config,
2356         .reset_chip             = qla82xx_reset_chip,
2357         .chip_diag              = qla24xx_chip_diag,
2358         .config_rings           = qla82xx_config_rings,
2359         .reset_adapter          = qla24xx_reset_adapter,
2360         .nvram_config           = qla81xx_nvram_config,
2361         .update_fw_options      = qla24xx_update_fw_options,
2362         .load_risc              = qla82xx_load_risc,
2363         .pci_info_str           = qla24xx_pci_info_str,
2364         .fw_version_str         = qla24xx_fw_version_str,
2365         .intr_handler           = qla82xx_intr_handler,
2366         .enable_intrs           = qla82xx_enable_intrs,
2367         .disable_intrs          = qla82xx_disable_intrs,
2368         .abort_command          = qla24xx_abort_command,
2369         .target_reset           = qla24xx_abort_target,
2370         .lun_reset              = qla24xx_lun_reset,
2371         .fabric_login           = qla24xx_login_fabric,
2372         .fabric_logout          = qla24xx_fabric_logout,
2373         .calc_req_entries       = NULL,
2374         .build_iocbs            = NULL,
2375         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2376         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2377         .read_nvram             = qla24xx_read_nvram_data,
2378         .write_nvram            = qla24xx_write_nvram_data,
2379         .fw_dump                = qla82xx_fw_dump,
2380         .beacon_on              = qla82xx_beacon_on,
2381         .beacon_off             = qla82xx_beacon_off,
2382         .beacon_blink           = NULL,
2383         .read_optrom            = qla82xx_read_optrom_data,
2384         .write_optrom           = qla82xx_write_optrom_data,
2385         .get_flash_version      = qla82xx_get_flash_version,
2386         .start_scsi             = qla82xx_start_scsi,
2387         .start_scsi_mq          = NULL,
2388         .abort_isp              = qla82xx_abort_isp,
2389         .iospace_config         = qla82xx_iospace_config,
2390         .initialize_adapter     = qla2x00_initialize_adapter,
2391 };
2392
2393 static struct isp_operations qla8044_isp_ops = {
2394         .pci_config             = qla82xx_pci_config,
2395         .reset_chip             = qla82xx_reset_chip,
2396         .chip_diag              = qla24xx_chip_diag,
2397         .config_rings           = qla82xx_config_rings,
2398         .reset_adapter          = qla24xx_reset_adapter,
2399         .nvram_config           = qla81xx_nvram_config,
2400         .update_fw_options      = qla24xx_update_fw_options,
2401         .load_risc              = qla82xx_load_risc,
2402         .pci_info_str           = qla24xx_pci_info_str,
2403         .fw_version_str         = qla24xx_fw_version_str,
2404         .intr_handler           = qla8044_intr_handler,
2405         .enable_intrs           = qla82xx_enable_intrs,
2406         .disable_intrs          = qla82xx_disable_intrs,
2407         .abort_command          = qla24xx_abort_command,
2408         .target_reset           = qla24xx_abort_target,
2409         .lun_reset              = qla24xx_lun_reset,
2410         .fabric_login           = qla24xx_login_fabric,
2411         .fabric_logout          = qla24xx_fabric_logout,
2412         .calc_req_entries       = NULL,
2413         .build_iocbs            = NULL,
2414         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2415         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2416         .read_nvram             = NULL,
2417         .write_nvram            = NULL,
2418         .fw_dump                = qla8044_fw_dump,
2419         .beacon_on              = qla82xx_beacon_on,
2420         .beacon_off             = qla82xx_beacon_off,
2421         .beacon_blink           = NULL,
2422         .read_optrom            = qla8044_read_optrom_data,
2423         .write_optrom           = qla8044_write_optrom_data,
2424         .get_flash_version      = qla82xx_get_flash_version,
2425         .start_scsi             = qla82xx_start_scsi,
2426         .start_scsi_mq          = NULL,
2427         .abort_isp              = qla8044_abort_isp,
2428         .iospace_config         = qla82xx_iospace_config,
2429         .initialize_adapter     = qla2x00_initialize_adapter,
2430 };
2431
2432 static struct isp_operations qla83xx_isp_ops = {
2433         .pci_config             = qla25xx_pci_config,
2434         .reset_chip             = qla24xx_reset_chip,
2435         .chip_diag              = qla24xx_chip_diag,
2436         .config_rings           = qla24xx_config_rings,
2437         .reset_adapter          = qla24xx_reset_adapter,
2438         .nvram_config           = qla81xx_nvram_config,
2439         .update_fw_options      = qla24xx_update_fw_options,
2440         .load_risc              = qla81xx_load_risc,
2441         .pci_info_str           = qla24xx_pci_info_str,
2442         .fw_version_str         = qla24xx_fw_version_str,
2443         .intr_handler           = qla24xx_intr_handler,
2444         .enable_intrs           = qla24xx_enable_intrs,
2445         .disable_intrs          = qla24xx_disable_intrs,
2446         .abort_command          = qla24xx_abort_command,
2447         .target_reset           = qla24xx_abort_target,
2448         .lun_reset              = qla24xx_lun_reset,
2449         .fabric_login           = qla24xx_login_fabric,
2450         .fabric_logout          = qla24xx_fabric_logout,
2451         .calc_req_entries       = NULL,
2452         .build_iocbs            = NULL,
2453         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2454         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2455         .read_nvram             = NULL,
2456         .write_nvram            = NULL,
2457         .fw_dump                = qla83xx_fw_dump,
2458         .beacon_on              = qla24xx_beacon_on,
2459         .beacon_off             = qla24xx_beacon_off,
2460         .beacon_blink           = qla83xx_beacon_blink,
2461         .read_optrom            = qla25xx_read_optrom_data,
2462         .write_optrom           = qla24xx_write_optrom_data,
2463         .get_flash_version      = qla24xx_get_flash_version,
2464         .start_scsi             = qla24xx_dif_start_scsi,
2465         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2466         .abort_isp              = qla2x00_abort_isp,
2467         .iospace_config         = qla83xx_iospace_config,
2468         .initialize_adapter     = qla2x00_initialize_adapter,
2469 };
2470
2471 static struct isp_operations qlafx00_isp_ops = {
2472         .pci_config             = qlafx00_pci_config,
2473         .reset_chip             = qlafx00_soft_reset,
2474         .chip_diag              = qlafx00_chip_diag,
2475         .config_rings           = qlafx00_config_rings,
2476         .reset_adapter          = qlafx00_soft_reset,
2477         .nvram_config           = NULL,
2478         .update_fw_options      = NULL,
2479         .load_risc              = NULL,
2480         .pci_info_str           = qlafx00_pci_info_str,
2481         .fw_version_str         = qlafx00_fw_version_str,
2482         .intr_handler           = qlafx00_intr_handler,
2483         .enable_intrs           = qlafx00_enable_intrs,
2484         .disable_intrs          = qlafx00_disable_intrs,
2485         .abort_command          = qla24xx_async_abort_command,
2486         .target_reset           = qlafx00_abort_target,
2487         .lun_reset              = qlafx00_lun_reset,
2488         .fabric_login           = NULL,
2489         .fabric_logout          = NULL,
2490         .calc_req_entries       = NULL,
2491         .build_iocbs            = NULL,
2492         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2493         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2494         .read_nvram             = qla24xx_read_nvram_data,
2495         .write_nvram            = qla24xx_write_nvram_data,
2496         .fw_dump                = NULL,
2497         .beacon_on              = qla24xx_beacon_on,
2498         .beacon_off             = qla24xx_beacon_off,
2499         .beacon_blink           = NULL,
2500         .read_optrom            = qla24xx_read_optrom_data,
2501         .write_optrom           = qla24xx_write_optrom_data,
2502         .get_flash_version      = qla24xx_get_flash_version,
2503         .start_scsi             = qlafx00_start_scsi,
2504         .start_scsi_mq          = NULL,
2505         .abort_isp              = qlafx00_abort_isp,
2506         .iospace_config         = qlafx00_iospace_config,
2507         .initialize_adapter     = qlafx00_initialize_adapter,
2508 };
2509
2510 static struct isp_operations qla27xx_isp_ops = {
2511         .pci_config             = qla25xx_pci_config,
2512         .reset_chip             = qla24xx_reset_chip,
2513         .chip_diag              = qla24xx_chip_diag,
2514         .config_rings           = qla24xx_config_rings,
2515         .reset_adapter          = qla24xx_reset_adapter,
2516         .nvram_config           = qla81xx_nvram_config,
2517         .update_fw_options      = qla24xx_update_fw_options,
2518         .load_risc              = qla81xx_load_risc,
2519         .pci_info_str           = qla24xx_pci_info_str,
2520         .fw_version_str         = qla24xx_fw_version_str,
2521         .intr_handler           = qla24xx_intr_handler,
2522         .enable_intrs           = qla24xx_enable_intrs,
2523         .disable_intrs          = qla24xx_disable_intrs,
2524         .abort_command          = qla24xx_abort_command,
2525         .target_reset           = qla24xx_abort_target,
2526         .lun_reset              = qla24xx_lun_reset,
2527         .fabric_login           = qla24xx_login_fabric,
2528         .fabric_logout          = qla24xx_fabric_logout,
2529         .calc_req_entries       = NULL,
2530         .build_iocbs            = NULL,
2531         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2532         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2533         .read_nvram             = NULL,
2534         .write_nvram            = NULL,
2535         .fw_dump                = qla27xx_fwdump,
2536         .mpi_fw_dump            = qla27xx_mpi_fwdump,
2537         .beacon_on              = qla24xx_beacon_on,
2538         .beacon_off             = qla24xx_beacon_off,
2539         .beacon_blink           = qla83xx_beacon_blink,
2540         .read_optrom            = qla25xx_read_optrom_data,
2541         .write_optrom           = qla24xx_write_optrom_data,
2542         .get_flash_version      = qla24xx_get_flash_version,
2543         .start_scsi             = qla24xx_dif_start_scsi,
2544         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2545         .abort_isp              = qla2x00_abort_isp,
2546         .iospace_config         = qla83xx_iospace_config,
2547         .initialize_adapter     = qla2x00_initialize_adapter,
2548 };
2549
2550 static inline void
2551 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2552 {
2553         ha->device_type = DT_EXTENDED_IDS;
2554         switch (ha->pdev->device) {
2555         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2556                 ha->isp_type |= DT_ISP2100;
2557                 ha->device_type &= ~DT_EXTENDED_IDS;
2558                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2559                 break;
2560         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2561                 ha->isp_type |= DT_ISP2200;
2562                 ha->device_type &= ~DT_EXTENDED_IDS;
2563                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2564                 break;
2565         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2566                 ha->isp_type |= DT_ISP2300;
2567                 ha->device_type |= DT_ZIO_SUPPORTED;
2568                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2569                 break;
2570         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2571                 ha->isp_type |= DT_ISP2312;
2572                 ha->device_type |= DT_ZIO_SUPPORTED;
2573                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2574                 break;
2575         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2576                 ha->isp_type |= DT_ISP2322;
2577                 ha->device_type |= DT_ZIO_SUPPORTED;
2578                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2579                     ha->pdev->subsystem_device == 0x0170)
2580                         ha->device_type |= DT_OEM_001;
2581                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2582                 break;
2583         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2584                 ha->isp_type |= DT_ISP6312;
2585                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2586                 break;
2587         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2588                 ha->isp_type |= DT_ISP6322;
2589                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2590                 break;
2591         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2592                 ha->isp_type |= DT_ISP2422;
2593                 ha->device_type |= DT_ZIO_SUPPORTED;
2594                 ha->device_type |= DT_FWI2;
2595                 ha->device_type |= DT_IIDMA;
2596                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2597                 break;
2598         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2599                 ha->isp_type |= DT_ISP2432;
2600                 ha->device_type |= DT_ZIO_SUPPORTED;
2601                 ha->device_type |= DT_FWI2;
2602                 ha->device_type |= DT_IIDMA;
2603                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2604                 break;
2605         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2606                 ha->isp_type |= DT_ISP8432;
2607                 ha->device_type |= DT_ZIO_SUPPORTED;
2608                 ha->device_type |= DT_FWI2;
2609                 ha->device_type |= DT_IIDMA;
2610                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2611                 break;
2612         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2613                 ha->isp_type |= DT_ISP5422;
2614                 ha->device_type |= DT_FWI2;
2615                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2616                 break;
2617         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2618                 ha->isp_type |= DT_ISP5432;
2619                 ha->device_type |= DT_FWI2;
2620                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2621                 break;
2622         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2623                 ha->isp_type |= DT_ISP2532;
2624                 ha->device_type |= DT_ZIO_SUPPORTED;
2625                 ha->device_type |= DT_FWI2;
2626                 ha->device_type |= DT_IIDMA;
2627                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2628                 break;
2629         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2630                 ha->isp_type |= DT_ISP8001;
2631                 ha->device_type |= DT_ZIO_SUPPORTED;
2632                 ha->device_type |= DT_FWI2;
2633                 ha->device_type |= DT_IIDMA;
2634                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2635                 break;
2636         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2637                 ha->isp_type |= DT_ISP8021;
2638                 ha->device_type |= DT_ZIO_SUPPORTED;
2639                 ha->device_type |= DT_FWI2;
2640                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2641                 /* Initialize 82XX ISP flags */
2642                 qla82xx_init_flags(ha);
2643                 break;
2644          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2645                 ha->isp_type |= DT_ISP8044;
2646                 ha->device_type |= DT_ZIO_SUPPORTED;
2647                 ha->device_type |= DT_FWI2;
2648                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2649                 /* Initialize 82XX ISP flags */
2650                 qla82xx_init_flags(ha);
2651                 break;
2652         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2653                 ha->isp_type |= DT_ISP2031;
2654                 ha->device_type |= DT_ZIO_SUPPORTED;
2655                 ha->device_type |= DT_FWI2;
2656                 ha->device_type |= DT_IIDMA;
2657                 ha->device_type |= DT_T10_PI;
2658                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2659                 break;
2660         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2661                 ha->isp_type |= DT_ISP8031;
2662                 ha->device_type |= DT_ZIO_SUPPORTED;
2663                 ha->device_type |= DT_FWI2;
2664                 ha->device_type |= DT_IIDMA;
2665                 ha->device_type |= DT_T10_PI;
2666                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2667                 break;
2668         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2669                 ha->isp_type |= DT_ISPFX00;
2670                 break;
2671         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2672                 ha->isp_type |= DT_ISP2071;
2673                 ha->device_type |= DT_ZIO_SUPPORTED;
2674                 ha->device_type |= DT_FWI2;
2675                 ha->device_type |= DT_IIDMA;
2676                 ha->device_type |= DT_T10_PI;
2677                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2678                 break;
2679         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2680                 ha->isp_type |= DT_ISP2271;
2681                 ha->device_type |= DT_ZIO_SUPPORTED;
2682                 ha->device_type |= DT_FWI2;
2683                 ha->device_type |= DT_IIDMA;
2684                 ha->device_type |= DT_T10_PI;
2685                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2686                 break;
2687         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2688                 ha->isp_type |= DT_ISP2261;
2689                 ha->device_type |= DT_ZIO_SUPPORTED;
2690                 ha->device_type |= DT_FWI2;
2691                 ha->device_type |= DT_IIDMA;
2692                 ha->device_type |= DT_T10_PI;
2693                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2694                 break;
2695         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2696         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2697                 ha->isp_type |= DT_ISP2081;
2698                 ha->device_type |= DT_ZIO_SUPPORTED;
2699                 ha->device_type |= DT_FWI2;
2700                 ha->device_type |= DT_IIDMA;
2701                 ha->device_type |= DT_T10_PI;
2702                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2703                 break;
2704         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2705         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2706                 ha->isp_type |= DT_ISP2281;
2707                 ha->device_type |= DT_ZIO_SUPPORTED;
2708                 ha->device_type |= DT_FWI2;
2709                 ha->device_type |= DT_IIDMA;
2710                 ha->device_type |= DT_T10_PI;
2711                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2712                 break;
2713         }
2714
2715         if (IS_QLA82XX(ha))
2716                 ha->port_no = ha->portnum & 1;
2717         else {
2718                 /* Get adapter physical port no from interrupt pin register. */
2719                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2720                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2721                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2722                         ha->port_no--;
2723                 else
2724                         ha->port_no = !(ha->port_no & 1);
2725         }
2726
2727         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2728             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2729             ha->device_type, ha->port_no, ha->fw_srisc_address);
2730 }
2731
2732 static void
2733 qla2xxx_scan_start(struct Scsi_Host *shost)
2734 {
2735         scsi_qla_host_t *vha = shost_priv(shost);
2736
2737         if (vha->hw->flags.running_gold_fw)
2738                 return;
2739
2740         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2741         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2742         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2743         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2744 }
2745
2746 static int
2747 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2748 {
2749         scsi_qla_host_t *vha = shost_priv(shost);
2750
2751         if (test_bit(UNLOADING, &vha->dpc_flags))
2752                 return 1;
2753         if (!vha->host)
2754                 return 1;
2755         if (time > vha->hw->loop_reset_delay * HZ)
2756                 return 1;
2757
2758         return atomic_read(&vha->loop_state) == LOOP_READY;
2759 }
2760
2761 static void qla2x00_iocb_work_fn(struct work_struct *work)
2762 {
2763         struct scsi_qla_host *vha = container_of(work,
2764                 struct scsi_qla_host, iocb_work);
2765         struct qla_hw_data *ha = vha->hw;
2766         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2767         int i = 2;
2768         unsigned long flags;
2769
2770         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2771                 return;
2772
2773         while (!list_empty(&vha->work_list) && i > 0) {
2774                 qla2x00_do_work(vha);
2775                 i--;
2776         }
2777
2778         spin_lock_irqsave(&vha->work_lock, flags);
2779         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2780         spin_unlock_irqrestore(&vha->work_lock, flags);
2781 }
2782
2783 /*
2784  * PCI driver interface
2785  */
2786 static int
2787 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2788 {
2789         int     ret = -ENODEV;
2790         struct Scsi_Host *host;
2791         scsi_qla_host_t *base_vha = NULL;
2792         struct qla_hw_data *ha;
2793         char pci_info[30];
2794         char fw_str[30], wq_name[30];
2795         struct scsi_host_template *sht;
2796         int bars, mem_only = 0;
2797         uint16_t req_length = 0, rsp_length = 0;
2798         struct req_que *req = NULL;
2799         struct rsp_que *rsp = NULL;
2800         int i;
2801
2802         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2803         sht = &qla2xxx_driver_template;
2804         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2805             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2806             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2807             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2808             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2809             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2810             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2811             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2812             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2813             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2814             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2815             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2816             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2817             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2818             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2819             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2820             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2821             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2822             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2823                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2824                 mem_only = 1;
2825                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2826                     "Mem only adapter.\n");
2827         }
2828         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2829             "Bars=%d.\n", bars);
2830
2831         if (mem_only) {
2832                 if (pci_enable_device_mem(pdev))
2833                         return ret;
2834         } else {
2835                 if (pci_enable_device(pdev))
2836                         return ret;
2837         }
2838
2839         /* This may fail but that's ok */
2840         pci_enable_pcie_error_reporting(pdev);
2841
2842         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2843         if (!ha) {
2844                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2845                     "Unable to allocate memory for ha.\n");
2846                 goto disable_device;
2847         }
2848         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2849             "Memory allocated for ha=%p.\n", ha);
2850         ha->pdev = pdev;
2851         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2852         spin_lock_init(&ha->tgt.q_full_lock);
2853         spin_lock_init(&ha->tgt.sess_lock);
2854         spin_lock_init(&ha->tgt.atio_lock);
2855
2856         atomic_set(&ha->nvme_active_aen_cnt, 0);
2857
2858         /* Clear our data area */
2859         ha->bars = bars;
2860         ha->mem_only = mem_only;
2861         spin_lock_init(&ha->hardware_lock);
2862         spin_lock_init(&ha->vport_slock);
2863         mutex_init(&ha->selflogin_lock);
2864         mutex_init(&ha->optrom_mutex);
2865
2866         /* Set ISP-type information. */
2867         qla2x00_set_isp_flags(ha);
2868
2869         /* Set EEH reset type to fundamental if required by hba */
2870         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2871             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2872                 pdev->needs_freset = 1;
2873
2874         ha->prev_topology = 0;
2875         ha->init_cb_size = sizeof(init_cb_t);
2876         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2877         ha->optrom_size = OPTROM_SIZE_2300;
2878         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2879         atomic_set(&ha->num_pend_mbx_stage1, 0);
2880         atomic_set(&ha->num_pend_mbx_stage2, 0);
2881         atomic_set(&ha->num_pend_mbx_stage3, 0);
2882         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2883         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2884
2885         /* Assign ISP specific operations. */
2886         if (IS_QLA2100(ha)) {
2887                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2888                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2889                 req_length = REQUEST_ENTRY_CNT_2100;
2890                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2891                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2892                 ha->gid_list_info_size = 4;
2893                 ha->flash_conf_off = ~0;
2894                 ha->flash_data_off = ~0;
2895                 ha->nvram_conf_off = ~0;
2896                 ha->nvram_data_off = ~0;
2897                 ha->isp_ops = &qla2100_isp_ops;
2898         } else if (IS_QLA2200(ha)) {
2899                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2900                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2901                 req_length = REQUEST_ENTRY_CNT_2200;
2902                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2903                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2904                 ha->gid_list_info_size = 4;
2905                 ha->flash_conf_off = ~0;
2906                 ha->flash_data_off = ~0;
2907                 ha->nvram_conf_off = ~0;
2908                 ha->nvram_data_off = ~0;
2909                 ha->isp_ops = &qla2100_isp_ops;
2910         } else if (IS_QLA23XX(ha)) {
2911                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2912                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2913                 req_length = REQUEST_ENTRY_CNT_2200;
2914                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2915                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2916                 ha->gid_list_info_size = 6;
2917                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2918                         ha->optrom_size = OPTROM_SIZE_2322;
2919                 ha->flash_conf_off = ~0;
2920                 ha->flash_data_off = ~0;
2921                 ha->nvram_conf_off = ~0;
2922                 ha->nvram_data_off = ~0;
2923                 ha->isp_ops = &qla2300_isp_ops;
2924         } else if (IS_QLA24XX_TYPE(ha)) {
2925                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2926                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2927                 req_length = REQUEST_ENTRY_CNT_24XX;
2928                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2929                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2930                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2931                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2932                 ha->gid_list_info_size = 8;
2933                 ha->optrom_size = OPTROM_SIZE_24XX;
2934                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2935                 ha->isp_ops = &qla24xx_isp_ops;
2936                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2937                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2938                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2939                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2940         } else if (IS_QLA25XX(ha)) {
2941                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2942                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2943                 req_length = REQUEST_ENTRY_CNT_24XX;
2944                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2945                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2946                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2947                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2948                 ha->gid_list_info_size = 8;
2949                 ha->optrom_size = OPTROM_SIZE_25XX;
2950                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2951                 ha->isp_ops = &qla25xx_isp_ops;
2952                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2953                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2954                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2955                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2956         } else if (IS_QLA81XX(ha)) {
2957                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2958                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2959                 req_length = REQUEST_ENTRY_CNT_24XX;
2960                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2961                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2962                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2963                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2964                 ha->gid_list_info_size = 8;
2965                 ha->optrom_size = OPTROM_SIZE_81XX;
2966                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2967                 ha->isp_ops = &qla81xx_isp_ops;
2968                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2969                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2970                 ha->nvram_conf_off = ~0;
2971                 ha->nvram_data_off = ~0;
2972         } else if (IS_QLA82XX(ha)) {
2973                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2974                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2975                 req_length = REQUEST_ENTRY_CNT_82XX;
2976                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2977                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2978                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2979                 ha->gid_list_info_size = 8;
2980                 ha->optrom_size = OPTROM_SIZE_82XX;
2981                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2982                 ha->isp_ops = &qla82xx_isp_ops;
2983                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2984                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2985                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2986                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2987         } else if (IS_QLA8044(ha)) {
2988                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2989                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2990                 req_length = REQUEST_ENTRY_CNT_82XX;
2991                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2992                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2993                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2994                 ha->gid_list_info_size = 8;
2995                 ha->optrom_size = OPTROM_SIZE_83XX;
2996                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2997                 ha->isp_ops = &qla8044_isp_ops;
2998                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2999                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
3000                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
3001                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
3002         } else if (IS_QLA83XX(ha)) {
3003                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3004                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3005                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3006                 req_length = REQUEST_ENTRY_CNT_83XX;
3007                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3008                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3009                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3010                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3011                 ha->gid_list_info_size = 8;
3012                 ha->optrom_size = OPTROM_SIZE_83XX;
3013                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3014                 ha->isp_ops = &qla83xx_isp_ops;
3015                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3016                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3017                 ha->nvram_conf_off = ~0;
3018                 ha->nvram_data_off = ~0;
3019         }  else if (IS_QLAFX00(ha)) {
3020                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3021                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3022                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3023                 req_length = REQUEST_ENTRY_CNT_FX00;
3024                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3025                 ha->isp_ops = &qlafx00_isp_ops;
3026                 ha->port_down_retry_count = 30; /* default value */
3027                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3028                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3029                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3030                 ha->mr.fw_hbt_en = 1;
3031                 ha->mr.host_info_resend = false;
3032                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3033         } else if (IS_QLA27XX(ha)) {
3034                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3035                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3036                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3037                 req_length = REQUEST_ENTRY_CNT_83XX;
3038                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3039                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3040                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3041                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3042                 ha->gid_list_info_size = 8;
3043                 ha->optrom_size = OPTROM_SIZE_83XX;
3044                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3045                 ha->isp_ops = &qla27xx_isp_ops;
3046                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3047                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3048                 ha->nvram_conf_off = ~0;
3049                 ha->nvram_data_off = ~0;
3050         } else if (IS_QLA28XX(ha)) {
3051                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3052                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3053                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3054                 req_length = REQUEST_ENTRY_CNT_24XX;
3055                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3056                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3057                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3058                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3059                 ha->gid_list_info_size = 8;
3060                 ha->optrom_size = OPTROM_SIZE_28XX;
3061                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3062                 ha->isp_ops = &qla27xx_isp_ops;
3063                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3064                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3065                 ha->nvram_conf_off = ~0;
3066                 ha->nvram_data_off = ~0;
3067         }
3068
3069         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3070             "mbx_count=%d, req_length=%d, "
3071             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3072             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3073             "max_fibre_devices=%d.\n",
3074             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3075             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3076             ha->nvram_npiv_size, ha->max_fibre_devices);
3077         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3078             "isp_ops=%p, flash_conf_off=%d, "
3079             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3080             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3081             ha->nvram_conf_off, ha->nvram_data_off);
3082
3083         /* Configure PCI I/O space */
3084         ret = ha->isp_ops->iospace_config(ha);
3085         if (ret)
3086                 goto iospace_config_failed;
3087
3088         ql_log_pci(ql_log_info, pdev, 0x001d,
3089             "Found an ISP%04X irq %d iobase 0x%p.\n",
3090             pdev->device, pdev->irq, ha->iobase);
3091         mutex_init(&ha->vport_lock);
3092         mutex_init(&ha->mq_lock);
3093         init_completion(&ha->mbx_cmd_comp);
3094         complete(&ha->mbx_cmd_comp);
3095         init_completion(&ha->mbx_intr_comp);
3096         init_completion(&ha->dcbx_comp);
3097         init_completion(&ha->lb_portup_comp);
3098
3099         set_bit(0, (unsigned long *) ha->vp_idx_map);
3100
3101         qla2x00_config_dma_addressing(ha);
3102         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3103             "64 Bit addressing is %s.\n",
3104             ha->flags.enable_64bit_addressing ? "enable" :
3105             "disable");
3106         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3107         if (ret) {
3108                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3109                     "Failed to allocate memory for adapter, aborting.\n");
3110
3111                 goto probe_hw_failed;
3112         }
3113
3114         req->max_q_depth = MAX_Q_DEPTH;
3115         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3116                 req->max_q_depth = ql2xmaxqdepth;
3117
3118
3119         base_vha = qla2x00_create_host(sht, ha);
3120         if (!base_vha) {
3121                 ret = -ENOMEM;
3122                 goto probe_hw_failed;
3123         }
3124
3125         pci_set_drvdata(pdev, base_vha);
3126         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3127
3128         host = base_vha->host;
3129         base_vha->req = req;
3130         if (IS_QLA2XXX_MIDTYPE(ha))
3131                 base_vha->mgmt_svr_loop_id =
3132                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3133         else
3134                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3135                                                 base_vha->vp_idx;
3136
3137         /* Setup fcport template structure. */
3138         ha->mr.fcport.vha = base_vha;
3139         ha->mr.fcport.port_type = FCT_UNKNOWN;
3140         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3141         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3142         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3143         ha->mr.fcport.scan_state = 1;
3144
3145         /* Set the SG table size based on ISP type */
3146         if (!IS_FWI2_CAPABLE(ha)) {
3147                 if (IS_QLA2100(ha))
3148                         host->sg_tablesize = 32;
3149         } else {
3150                 if (!IS_QLA82XX(ha))
3151                         host->sg_tablesize = QLA_SG_ALL;
3152         }
3153         host->max_id = ha->max_fibre_devices;
3154         host->cmd_per_lun = 3;
3155         host->unique_id = host->host_no;
3156         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3157                 host->max_cmd_len = 32;
3158         else
3159                 host->max_cmd_len = MAX_CMDSZ;
3160         host->max_channel = MAX_BUSES - 1;
3161         /* Older HBAs support only 16-bit LUNs */
3162         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3163             ql2xmaxlun > 0xffff)
3164                 host->max_lun = 0xffff;
3165         else
3166                 host->max_lun = ql2xmaxlun;
3167         host->transportt = qla2xxx_transport_template;
3168         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3169
3170         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3171             "max_id=%d this_id=%d "
3172             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3173             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3174             host->this_id, host->cmd_per_lun, host->unique_id,
3175             host->max_cmd_len, host->max_channel, host->max_lun,
3176             host->transportt, sht->vendor_id);
3177
3178         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3179
3180         /* Set up the irqs */
3181         ret = qla2x00_request_irqs(ha, rsp);
3182         if (ret)
3183                 goto probe_failed;
3184
3185         /* Alloc arrays of request and response ring ptrs */
3186         ret = qla2x00_alloc_queues(ha, req, rsp);
3187         if (ret) {
3188                 ql_log(ql_log_fatal, base_vha, 0x003d,
3189                     "Failed to allocate memory for queue pointers..."
3190                     "aborting.\n");
3191                 ret = -ENODEV;
3192                 goto probe_failed;
3193         }
3194
3195         if (ha->mqenable) {
3196                 /* number of hardware queues supported by blk/scsi-mq*/
3197                 host->nr_hw_queues = ha->max_qpairs;
3198
3199                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3200                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3201         } else {
3202                 if (ql2xnvmeenable) {
3203                         host->nr_hw_queues = ha->max_qpairs;
3204                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3205                             "FC-NVMe support is enabled, HW queues=%d\n",
3206                             host->nr_hw_queues);
3207                 } else {
3208                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3209                             "blk/scsi-mq disabled.\n");
3210                 }
3211         }
3212
3213         qlt_probe_one_stage1(base_vha, ha);
3214
3215         pci_save_state(pdev);
3216
3217         /* Assign back pointers */
3218         rsp->req = req;
3219         req->rsp = rsp;
3220
3221         if (IS_QLAFX00(ha)) {
3222                 ha->rsp_q_map[0] = rsp;
3223                 ha->req_q_map[0] = req;
3224                 set_bit(0, ha->req_qid_map);
3225                 set_bit(0, ha->rsp_qid_map);
3226         }
3227
3228         /* FWI2-capable only. */
3229         req->req_q_in = &ha->iobase->isp24.req_q_in;
3230         req->req_q_out = &ha->iobase->isp24.req_q_out;
3231         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3232         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3233         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3234             IS_QLA28XX(ha)) {
3235                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3236                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3237                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3238                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3239         }
3240
3241         if (IS_QLAFX00(ha)) {
3242                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3243                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3244                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3245                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3246         }
3247
3248         if (IS_P3P_TYPE(ha)) {
3249                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3250                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3251                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3252         }
3253
3254         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3255             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3256             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3257         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3258             "req->req_q_in=%p req->req_q_out=%p "
3259             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3260             req->req_q_in, req->req_q_out,
3261             rsp->rsp_q_in, rsp->rsp_q_out);
3262         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3263             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3264             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3265         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3266             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3267             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3268
3269         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3270         if (unlikely(!ha->wq)) {
3271                 ret = -ENOMEM;
3272                 goto probe_failed;
3273         }
3274
3275         if (ha->isp_ops->initialize_adapter(base_vha)) {
3276                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3277                     "Failed to initialize adapter - Adapter flags %x.\n",
3278                     base_vha->device_flags);
3279
3280                 if (IS_QLA82XX(ha)) {
3281                         qla82xx_idc_lock(ha);
3282                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3283                                 QLA8XXX_DEV_FAILED);
3284                         qla82xx_idc_unlock(ha);
3285                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3286                             "HW State: FAILED.\n");
3287                 } else if (IS_QLA8044(ha)) {
3288                         qla8044_idc_lock(ha);
3289                         qla8044_wr_direct(base_vha,
3290                                 QLA8044_CRB_DEV_STATE_INDEX,
3291                                 QLA8XXX_DEV_FAILED);
3292                         qla8044_idc_unlock(ha);
3293                         ql_log(ql_log_fatal, base_vha, 0x0150,
3294                             "HW State: FAILED.\n");
3295                 }
3296
3297                 ret = -ENODEV;
3298                 goto probe_failed;
3299         }
3300
3301         if (IS_QLAFX00(ha))
3302                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3303         else
3304                 host->can_queue = req->num_outstanding_cmds - 10;
3305
3306         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3307             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3308             host->can_queue, base_vha->req,
3309             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3310
3311         if (ha->mqenable) {
3312                 bool startit = false;
3313
3314                 if (QLA_TGT_MODE_ENABLED())
3315                         startit = false;
3316
3317                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3318                         startit = true;
3319
3320                 /* Create start of day qpairs for Block MQ */
3321                 for (i = 0; i < ha->max_qpairs; i++)
3322                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3323         }
3324         qla_init_iocb_limit(base_vha);
3325
3326         if (ha->flags.running_gold_fw)
3327                 goto skip_dpc;
3328
3329         /*
3330          * Startup the kernel thread for this host adapter
3331          */
3332         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3333             "%s_dpc", base_vha->host_str);
3334         if (IS_ERR(ha->dpc_thread)) {
3335                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3336                     "Failed to start DPC thread.\n");
3337                 ret = PTR_ERR(ha->dpc_thread);
3338                 ha->dpc_thread = NULL;
3339                 goto probe_failed;
3340         }
3341         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3342             "DPC thread started successfully.\n");
3343
3344         /*
3345          * If we're not coming up in initiator mode, we might sit for
3346          * a while without waking up the dpc thread, which leads to a
3347          * stuck process warning.  So just kick the dpc once here and
3348          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3349          */
3350         qla2xxx_wake_dpc(base_vha);
3351
3352         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3353
3354         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3355                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3356                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3357                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3358
3359                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3360                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3361                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3362                 INIT_WORK(&ha->idc_state_handler,
3363                     qla83xx_idc_state_handler_work);
3364                 INIT_WORK(&ha->nic_core_unrecoverable,
3365                     qla83xx_nic_core_unrecoverable_work);
3366         }
3367
3368 skip_dpc:
3369         list_add_tail(&base_vha->list, &ha->vp_list);
3370         base_vha->host->irq = ha->pdev->irq;
3371
3372         /* Initialized the timer */
3373         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3374         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3375             "Started qla2x00_timer with "
3376             "interval=%d.\n", WATCH_INTERVAL);
3377         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3378             "Detected hba at address=%p.\n",
3379             ha);
3380
3381         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3382                 if (ha->fw_attributes & BIT_4) {
3383                         int prot = 0, guard;
3384
3385                         base_vha->flags.difdix_supported = 1;
3386                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3387                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3388                         if (ql2xenabledif == 1)
3389                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3390                         if (ql2xprotmask)
3391                                 scsi_host_set_prot(host, ql2xprotmask);
3392                         else
3393                                 scsi_host_set_prot(host,
3394                                     prot | SHOST_DIF_TYPE1_PROTECTION
3395                                     | SHOST_DIF_TYPE2_PROTECTION
3396                                     | SHOST_DIF_TYPE3_PROTECTION
3397                                     | SHOST_DIX_TYPE1_PROTECTION
3398                                     | SHOST_DIX_TYPE2_PROTECTION
3399                                     | SHOST_DIX_TYPE3_PROTECTION);
3400
3401                         guard = SHOST_DIX_GUARD_CRC;
3402
3403                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3404                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3405                                 guard |= SHOST_DIX_GUARD_IP;
3406
3407                         if (ql2xprotguard)
3408                                 scsi_host_set_guard(host, ql2xprotguard);
3409                         else
3410                                 scsi_host_set_guard(host, guard);
3411                 } else
3412                         base_vha->flags.difdix_supported = 0;
3413         }
3414
3415         ha->isp_ops->enable_intrs(ha);
3416
3417         if (IS_QLAFX00(ha)) {
3418                 ret = qlafx00_fx_disc(base_vha,
3419                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3420                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3421                     QLA_SG_ALL : 128;
3422         }
3423
3424         ret = scsi_add_host(host, &pdev->dev);
3425         if (ret)
3426                 goto probe_failed;
3427
3428         base_vha->flags.init_done = 1;
3429         base_vha->flags.online = 1;
3430         ha->prev_minidump_failed = 0;
3431
3432         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3433             "Init done and hba is online.\n");
3434
3435         if (qla_ini_mode_enabled(base_vha) ||
3436                 qla_dual_mode_enabled(base_vha))
3437                 scsi_scan_host(host);
3438         else
3439                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3440                         "skipping scsi_scan_host() for non-initiator port\n");
3441
3442         qla2x00_alloc_sysfs_attr(base_vha);
3443
3444         if (IS_QLAFX00(ha)) {
3445                 ret = qlafx00_fx_disc(base_vha,
3446                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3447
3448                 /* Register system information */
3449                 ret =  qlafx00_fx_disc(base_vha,
3450                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3451         }
3452
3453         qla2x00_init_host_attr(base_vha);
3454
3455         qla2x00_dfs_setup(base_vha);
3456
3457         ql_log(ql_log_info, base_vha, 0x00fb,
3458             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3459         ql_log(ql_log_info, base_vha, 0x00fc,
3460             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3461             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3462                                                        sizeof(pci_info)),
3463             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3464             base_vha->host_no,
3465             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3466
3467         qlt_add_target(ha, base_vha);
3468
3469         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3470
3471         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3472                 return -ENODEV;
3473
3474         return 0;
3475
3476 probe_failed:
3477         if (base_vha->gnl.l) {
3478                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3479                                 base_vha->gnl.l, base_vha->gnl.ldma);
3480                 base_vha->gnl.l = NULL;
3481         }
3482
3483         if (base_vha->timer_active)
3484                 qla2x00_stop_timer(base_vha);
3485         base_vha->flags.online = 0;
3486         if (ha->dpc_thread) {
3487                 struct task_struct *t = ha->dpc_thread;
3488
3489                 ha->dpc_thread = NULL;
3490                 kthread_stop(t);
3491         }
3492
3493         qla2x00_free_device(base_vha);
3494         scsi_host_put(base_vha->host);
3495         /*
3496          * Need to NULL out local req/rsp after
3497          * qla2x00_free_device => qla2x00_free_queues frees
3498          * what these are pointing to. Or else we'll
3499          * fall over below in qla2x00_free_req/rsp_que.
3500          */
3501         req = NULL;
3502         rsp = NULL;
3503
3504 probe_hw_failed:
3505         qla2x00_mem_free(ha);
3506         qla2x00_free_req_que(ha, req);
3507         qla2x00_free_rsp_que(ha, rsp);
3508         qla2x00_clear_drv_active(ha);
3509
3510 iospace_config_failed:
3511         if (IS_P3P_TYPE(ha)) {
3512                 if (!ha->nx_pcibase)
3513                         iounmap((device_reg_t *)ha->nx_pcibase);
3514                 if (!ql2xdbwr)
3515                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3516         } else {
3517                 if (ha->iobase)
3518                         iounmap(ha->iobase);
3519                 if (ha->cregbase)
3520                         iounmap(ha->cregbase);
3521         }
3522         pci_release_selected_regions(ha->pdev, ha->bars);
3523         kfree(ha);
3524
3525 disable_device:
3526         pci_disable_device(pdev);
3527         return ret;
3528 }
3529
3530 static void __qla_set_remove_flag(scsi_qla_host_t *base_vha)
3531 {
3532         scsi_qla_host_t *vp;
3533         unsigned long flags;
3534         struct qla_hw_data *ha;
3535
3536         if (!base_vha)
3537                 return;
3538
3539         ha = base_vha->hw;
3540
3541         spin_lock_irqsave(&ha->vport_slock, flags);
3542         list_for_each_entry(vp, &ha->vp_list, list)
3543                 set_bit(PFLG_DRIVER_REMOVING, &vp->pci_flags);
3544
3545         /*
3546          * Indicate device removal to prevent future board_disable
3547          * and wait until any pending board_disable has completed.
3548          */
3549         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3550         spin_unlock_irqrestore(&ha->vport_slock, flags);
3551 }
3552
3553 static void
3554 qla2x00_shutdown(struct pci_dev *pdev)
3555 {
3556         scsi_qla_host_t *vha;
3557         struct qla_hw_data  *ha;
3558
3559         vha = pci_get_drvdata(pdev);
3560         ha = vha->hw;
3561
3562         ql_log(ql_log_info, vha, 0xfffa,
3563                 "Adapter shutdown\n");
3564
3565         /*
3566          * Prevent future board_disable and wait
3567          * until any pending board_disable has completed.
3568          */
3569         __qla_set_remove_flag(vha);
3570         cancel_work_sync(&ha->board_disable);
3571
3572         if (!atomic_read(&pdev->enable_cnt))
3573                 return;
3574
3575         /* Notify ISPFX00 firmware */
3576         if (IS_QLAFX00(ha))
3577                 qlafx00_driver_shutdown(vha, 20);
3578
3579         /* Turn-off FCE trace */
3580         if (ha->flags.fce_enabled) {
3581                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3582                 ha->flags.fce_enabled = 0;
3583         }
3584
3585         /* Turn-off EFT trace */
3586         if (ha->eft)
3587                 qla2x00_disable_eft_trace(vha);
3588
3589         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3590             IS_QLA28XX(ha)) {
3591                 if (ha->flags.fw_started)
3592                         qla2x00_abort_isp_cleanup(vha);
3593         } else {
3594                 /* Stop currently executing firmware. */
3595                 qla2x00_try_to_stop_firmware(vha);
3596         }
3597
3598         /* Disable timer */
3599         if (vha->timer_active)
3600                 qla2x00_stop_timer(vha);
3601
3602         /* Turn adapter off line */
3603         vha->flags.online = 0;
3604
3605         /* turn-off interrupts on the card */
3606         if (ha->interrupts_on) {
3607                 vha->flags.init_done = 0;
3608                 ha->isp_ops->disable_intrs(ha);
3609         }
3610
3611         qla2x00_free_irqs(vha);
3612
3613         qla2x00_free_fw_dump(ha);
3614
3615         pci_disable_device(pdev);
3616         ql_log(ql_log_info, vha, 0xfffe,
3617                 "Adapter shutdown successfully.\n");
3618 }
3619
3620 /* Deletes all the virtual ports for a given ha */
3621 static void
3622 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3623 {
3624         scsi_qla_host_t *vha;
3625         unsigned long flags;
3626
3627         mutex_lock(&ha->vport_lock);
3628         while (ha->cur_vport_count) {
3629                 spin_lock_irqsave(&ha->vport_slock, flags);
3630
3631                 BUG_ON(base_vha->list.next == &ha->vp_list);
3632                 /* This assumes first entry in ha->vp_list is always base vha */
3633                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3634                 scsi_host_get(vha->host);
3635
3636                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3637                 mutex_unlock(&ha->vport_lock);
3638
3639                 qla_nvme_delete(vha);
3640
3641                 fc_vport_terminate(vha->fc_vport);
3642                 scsi_host_put(vha->host);
3643
3644                 mutex_lock(&ha->vport_lock);
3645         }
3646         mutex_unlock(&ha->vport_lock);
3647 }
3648
3649 /* Stops all deferred work threads */
3650 static void
3651 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3652 {
3653         /* Cancel all work and destroy DPC workqueues */
3654         if (ha->dpc_lp_wq) {
3655                 cancel_work_sync(&ha->idc_aen);
3656                 destroy_workqueue(ha->dpc_lp_wq);
3657                 ha->dpc_lp_wq = NULL;
3658         }
3659
3660         if (ha->dpc_hp_wq) {
3661                 cancel_work_sync(&ha->nic_core_reset);
3662                 cancel_work_sync(&ha->idc_state_handler);
3663                 cancel_work_sync(&ha->nic_core_unrecoverable);
3664                 destroy_workqueue(ha->dpc_hp_wq);
3665                 ha->dpc_hp_wq = NULL;
3666         }
3667
3668         /* Kill the kernel thread for this host */
3669         if (ha->dpc_thread) {
3670                 struct task_struct *t = ha->dpc_thread;
3671
3672                 /*
3673                  * qla2xxx_wake_dpc checks for ->dpc_thread
3674                  * so we need to zero it out.
3675                  */
3676                 ha->dpc_thread = NULL;
3677                 kthread_stop(t);
3678         }
3679 }
3680
3681 static void
3682 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3683 {
3684         if (IS_QLA82XX(ha)) {
3685
3686                 iounmap((device_reg_t *)ha->nx_pcibase);
3687                 if (!ql2xdbwr)
3688                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3689         } else {
3690                 if (ha->iobase)
3691                         iounmap(ha->iobase);
3692
3693                 if (ha->cregbase)
3694                         iounmap(ha->cregbase);
3695
3696                 if (ha->mqiobase)
3697                         iounmap(ha->mqiobase);
3698
3699                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
3700                     ha->msixbase)
3701                         iounmap(ha->msixbase);
3702         }
3703 }
3704
3705 static void
3706 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3707 {
3708         if (IS_QLA8044(ha)) {
3709                 qla8044_idc_lock(ha);
3710                 qla8044_clear_drv_active(ha);
3711                 qla8044_idc_unlock(ha);
3712         } else if (IS_QLA82XX(ha)) {
3713                 qla82xx_idc_lock(ha);
3714                 qla82xx_clear_drv_active(ha);
3715                 qla82xx_idc_unlock(ha);
3716         }
3717 }
3718
3719 static void
3720 qla2x00_remove_one(struct pci_dev *pdev)
3721 {
3722         scsi_qla_host_t *base_vha;
3723         struct qla_hw_data  *ha;
3724
3725         base_vha = pci_get_drvdata(pdev);
3726         ha = base_vha->hw;
3727         ql_log(ql_log_info, base_vha, 0xb079,
3728             "Removing driver\n");
3729         __qla_set_remove_flag(base_vha);
3730         cancel_work_sync(&ha->board_disable);
3731
3732         /*
3733          * If the PCI device is disabled then there was a PCI-disconnect and
3734          * qla2x00_disable_board_on_pci_error has taken care of most of the
3735          * resources.
3736          */
3737         if (!atomic_read(&pdev->enable_cnt)) {
3738                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3739                     base_vha->gnl.l, base_vha->gnl.ldma);
3740                 base_vha->gnl.l = NULL;
3741                 scsi_host_put(base_vha->host);
3742                 kfree(ha);
3743                 pci_set_drvdata(pdev, NULL);
3744                 return;
3745         }
3746         qla2x00_wait_for_hba_ready(base_vha);
3747
3748         /*
3749          * if UNLOADING flag is already set, then continue unload,
3750          * where it was set first.
3751          */
3752         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3753                 return;
3754
3755         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3756             IS_QLA28XX(ha)) {
3757                 if (ha->flags.fw_started)
3758                         qla2x00_abort_isp_cleanup(base_vha);
3759         } else if (!IS_QLAFX00(ha)) {
3760                 if (IS_QLA8031(ha)) {
3761                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3762                             "Clearing fcoe driver presence.\n");
3763                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3764                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3765                                     "Error while clearing DRV-Presence.\n");
3766                 }
3767
3768                 qla2x00_try_to_stop_firmware(base_vha);
3769         }
3770
3771         qla2x00_wait_for_sess_deletion(base_vha);
3772
3773         qla_nvme_delete(base_vha);
3774
3775         dma_free_coherent(&ha->pdev->dev,
3776                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3777
3778         base_vha->gnl.l = NULL;
3779
3780         vfree(base_vha->scan.l);
3781
3782         if (IS_QLAFX00(ha))
3783                 qlafx00_driver_shutdown(base_vha, 20);
3784
3785         qla2x00_delete_all_vps(ha, base_vha);
3786
3787         qla2x00_dfs_remove(base_vha);
3788
3789         qla84xx_put_chip(base_vha);
3790
3791         /* Disable timer */
3792         if (base_vha->timer_active)
3793                 qla2x00_stop_timer(base_vha);
3794
3795         base_vha->flags.online = 0;
3796
3797         /* free DMA memory */
3798         if (ha->exlogin_buf)
3799                 qla2x00_free_exlogin_buffer(ha);
3800
3801         /* free DMA memory */
3802         if (ha->exchoffld_buf)
3803                 qla2x00_free_exchoffld_buffer(ha);
3804
3805         qla2x00_destroy_deferred_work(ha);
3806
3807         qlt_remove_target(ha, base_vha);
3808
3809         qla2x00_free_sysfs_attr(base_vha, true);
3810
3811         fc_remove_host(base_vha->host);
3812         qlt_remove_target_resources(ha);
3813
3814         scsi_remove_host(base_vha->host);
3815
3816         qla2x00_free_device(base_vha);
3817
3818         qla2x00_clear_drv_active(ha);
3819
3820         scsi_host_put(base_vha->host);
3821
3822         qla2x00_unmap_iobases(ha);
3823
3824         pci_release_selected_regions(ha->pdev, ha->bars);
3825         kfree(ha);
3826
3827         pci_disable_pcie_error_reporting(pdev);
3828
3829         pci_disable_device(pdev);
3830 }
3831
3832 static inline void
3833 qla24xx_free_purex_list(struct purex_list *list)
3834 {
3835         struct list_head *item, *next;
3836         ulong flags;
3837
3838         spin_lock_irqsave(&list->lock, flags);
3839         list_for_each_safe(item, next, &list->head) {
3840                 list_del(item);
3841                 kfree(list_entry(item, struct purex_item, list));
3842         }
3843         spin_unlock_irqrestore(&list->lock, flags);
3844 }
3845
3846 static void
3847 qla2x00_free_device(scsi_qla_host_t *vha)
3848 {
3849         struct qla_hw_data *ha = vha->hw;
3850
3851         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3852
3853         /* Disable timer */
3854         if (vha->timer_active)
3855                 qla2x00_stop_timer(vha);
3856
3857         qla25xx_delete_queues(vha);
3858         vha->flags.online = 0;
3859
3860         /* turn-off interrupts on the card */
3861         if (ha->interrupts_on) {
3862                 vha->flags.init_done = 0;
3863                 ha->isp_ops->disable_intrs(ha);
3864         }
3865
3866         qla2x00_free_fcports(vha);
3867
3868         qla2x00_free_irqs(vha);
3869
3870         /* Flush the work queue and remove it */
3871         if (ha->wq) {
3872                 flush_workqueue(ha->wq);
3873                 destroy_workqueue(ha->wq);
3874                 ha->wq = NULL;
3875         }
3876
3877
3878         qla24xx_free_purex_list(&vha->purex_list);
3879
3880         qla2x00_mem_free(ha);
3881
3882         qla82xx_md_free(vha);
3883
3884         qla2x00_free_queues(ha);
3885 }
3886
3887 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3888 {
3889         fc_port_t *fcport, *tfcport;
3890
3891         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3892                 qla2x00_free_fcport(fcport);
3893 }
3894
3895 static inline void
3896 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport)
3897 {
3898         int now;
3899
3900         if (!fcport->rport)
3901                 return;
3902
3903         if (fcport->rport) {
3904                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3905                     "%s %8phN. rport %p roles %x\n",
3906                     __func__, fcport->port_name, fcport->rport,
3907                     fcport->rport->roles);
3908                 fc_remote_port_delete(fcport->rport);
3909         }
3910         qlt_do_generation_tick(vha, &now);
3911 }
3912
3913 /*
3914  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3915  *
3916  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3917  *
3918  * Return: None.
3919  *
3920  * Context:
3921  */
3922 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3923     int do_login)
3924 {
3925         if (IS_QLAFX00(vha->hw)) {
3926                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3927                 qla2x00_schedule_rport_del(vha, fcport);
3928                 return;
3929         }
3930
3931         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3932             vha->vp_idx == fcport->vha->vp_idx) {
3933                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3934                 qla2x00_schedule_rport_del(vha, fcport);
3935         }
3936         /*
3937          * We may need to retry the login, so don't change the state of the
3938          * port but do the retries.
3939          */
3940         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3941                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3942
3943         if (!do_login)
3944                 return;
3945
3946         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3947 }
3948
3949 void
3950 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha)
3951 {
3952         fc_port_t *fcport;
3953
3954         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3955             "Mark all dev lost\n");
3956
3957         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3958                 fcport->scan_state = 0;
3959                 qlt_schedule_sess_for_deletion(fcport);
3960         }
3961 }
3962
3963 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
3964 {
3965         int i;
3966
3967         if (IS_FWI2_CAPABLE(ha))
3968                 return;
3969
3970         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
3971                 set_bit(i, ha->loop_id_map);
3972         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
3973         set_bit(BROADCAST, ha->loop_id_map);
3974 }
3975
3976 /*
3977 * qla2x00_mem_alloc
3978 *      Allocates adapter memory.
3979 *
3980 * Returns:
3981 *      0  = success.
3982 *      !0  = failure.
3983 */
3984 static int
3985 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3986         struct req_que **req, struct rsp_que **rsp)
3987 {
3988         char    name[16];
3989
3990         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3991                 &ha->init_cb_dma, GFP_KERNEL);
3992         if (!ha->init_cb)
3993                 goto fail;
3994
3995         if (qlt_mem_alloc(ha) < 0)
3996                 goto fail_free_init_cb;
3997
3998         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3999                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
4000         if (!ha->gid_list)
4001                 goto fail_free_tgt_mem;
4002
4003         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
4004         if (!ha->srb_mempool)
4005                 goto fail_free_gid_list;
4006
4007         if (IS_P3P_TYPE(ha)) {
4008                 /* Allocate cache for CT6 Ctx. */
4009                 if (!ctx_cachep) {
4010                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
4011                                 sizeof(struct ct6_dsd), 0,
4012                                 SLAB_HWCACHE_ALIGN, NULL);
4013                         if (!ctx_cachep)
4014                                 goto fail_free_srb_mempool;
4015                 }
4016                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
4017                         ctx_cachep);
4018                 if (!ha->ctx_mempool)
4019                         goto fail_free_srb_mempool;
4020                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
4021                     "ctx_cachep=%p ctx_mempool=%p.\n",
4022                     ctx_cachep, ha->ctx_mempool);
4023         }
4024
4025         /* Get memory for cached NVRAM */
4026         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
4027         if (!ha->nvram)
4028                 goto fail_free_ctx_mempool;
4029
4030         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
4031                 ha->pdev->device);
4032         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4033                 DMA_POOL_SIZE, 8, 0);
4034         if (!ha->s_dma_pool)
4035                 goto fail_free_nvram;
4036
4037         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4038             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4039             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4040
4041         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
4042                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4043                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4044                 if (!ha->dl_dma_pool) {
4045                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4046                             "Failed to allocate memory for dl_dma_pool.\n");
4047                         goto fail_s_dma_pool;
4048                 }
4049
4050                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4051                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4052                 if (!ha->fcp_cmnd_dma_pool) {
4053                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4054                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4055                         goto fail_dl_dma_pool;
4056                 }
4057
4058                 if (ql2xenabledif) {
4059                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4060                         struct dsd_dma *dsd, *nxt;
4061                         uint i;
4062                         /* Creata a DMA pool of buffers for DIF bundling */
4063                         ha->dif_bundl_pool = dma_pool_create(name,
4064                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4065                         if (!ha->dif_bundl_pool) {
4066                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4067                                     "%s: failed create dif_bundl_pool\n",
4068                                     __func__);
4069                                 goto fail_dif_bundl_dma_pool;
4070                         }
4071
4072                         INIT_LIST_HEAD(&ha->pool.good.head);
4073                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4074                         ha->pool.good.count = 0;
4075                         ha->pool.unusable.count = 0;
4076                         for (i = 0; i < 128; i++) {
4077                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4078                                 if (!dsd) {
4079                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4080                                             0xe0ee, "%s: failed alloc dsd\n",
4081                                             __func__);
4082                                         return 1;
4083                                 }
4084                                 ha->dif_bundle_kallocs++;
4085
4086                                 dsd->dsd_addr = dma_pool_alloc(
4087                                     ha->dif_bundl_pool, GFP_ATOMIC,
4088                                     &dsd->dsd_list_dma);
4089                                 if (!dsd->dsd_addr) {
4090                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4091                                             0xe0ee,
4092                                             "%s: failed alloc ->dsd_addr\n",
4093                                             __func__);
4094                                         kfree(dsd);
4095                                         ha->dif_bundle_kallocs--;
4096                                         continue;
4097                                 }
4098                                 ha->dif_bundle_dma_allocs++;
4099
4100                                 /*
4101                                  * if DMA buffer crosses 4G boundary,
4102                                  * put it on bad list
4103                                  */
4104                                 if (MSD(dsd->dsd_list_dma) ^
4105                                     MSD(dsd->dsd_list_dma + bufsize)) {
4106                                         list_add_tail(&dsd->list,
4107                                             &ha->pool.unusable.head);
4108                                         ha->pool.unusable.count++;
4109                                 } else {
4110                                         list_add_tail(&dsd->list,
4111                                             &ha->pool.good.head);
4112                                         ha->pool.good.count++;
4113                                 }
4114                         }
4115
4116                         /* return the good ones back to the pool */
4117                         list_for_each_entry_safe(dsd, nxt,
4118                             &ha->pool.good.head, list) {
4119                                 list_del(&dsd->list);
4120                                 dma_pool_free(ha->dif_bundl_pool,
4121                                     dsd->dsd_addr, dsd->dsd_list_dma);
4122                                 ha->dif_bundle_dma_allocs--;
4123                                 kfree(dsd);
4124                                 ha->dif_bundle_kallocs--;
4125                         }
4126
4127                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4128                             "%s: dif dma pool (good=%u unusable=%u)\n",
4129                             __func__, ha->pool.good.count,
4130                             ha->pool.unusable.count);
4131                 }
4132
4133                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4134                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4135                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4136                     ha->dif_bundl_pool);
4137         }
4138
4139         /* Allocate memory for SNS commands */
4140         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4141         /* Get consistent memory allocated for SNS commands */
4142                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4143                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4144                 if (!ha->sns_cmd)
4145                         goto fail_dma_pool;
4146                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4147                     "sns_cmd: %p.\n", ha->sns_cmd);
4148         } else {
4149         /* Get consistent memory allocated for MS IOCB */
4150                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4151                         &ha->ms_iocb_dma);
4152                 if (!ha->ms_iocb)
4153                         goto fail_dma_pool;
4154         /* Get consistent memory allocated for CT SNS commands */
4155                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4156                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4157                 if (!ha->ct_sns)
4158                         goto fail_free_ms_iocb;
4159                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4160                     "ms_iocb=%p ct_sns=%p.\n",
4161                     ha->ms_iocb, ha->ct_sns);
4162         }
4163
4164         /* Allocate memory for request ring */
4165         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4166         if (!*req) {
4167                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4168                     "Failed to allocate memory for req.\n");
4169                 goto fail_req;
4170         }
4171         (*req)->length = req_len;
4172         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4173                 ((*req)->length + 1) * sizeof(request_t),
4174                 &(*req)->dma, GFP_KERNEL);
4175         if (!(*req)->ring) {
4176                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4177                     "Failed to allocate memory for req_ring.\n");
4178                 goto fail_req_ring;
4179         }
4180         /* Allocate memory for response ring */
4181         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4182         if (!*rsp) {
4183                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4184                     "Failed to allocate memory for rsp.\n");
4185                 goto fail_rsp;
4186         }
4187         (*rsp)->hw = ha;
4188         (*rsp)->length = rsp_len;
4189         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4190                 ((*rsp)->length + 1) * sizeof(response_t),
4191                 &(*rsp)->dma, GFP_KERNEL);
4192         if (!(*rsp)->ring) {
4193                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4194                     "Failed to allocate memory for rsp_ring.\n");
4195                 goto fail_rsp_ring;
4196         }
4197         (*req)->rsp = *rsp;
4198         (*rsp)->req = *req;
4199         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4200             "req=%p req->length=%d req->ring=%p rsp=%p "
4201             "rsp->length=%d rsp->ring=%p.\n",
4202             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4203             (*rsp)->ring);
4204         /* Allocate memory for NVRAM data for vports */
4205         if (ha->nvram_npiv_size) {
4206                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4207                                         sizeof(struct qla_npiv_entry),
4208                                         GFP_KERNEL);
4209                 if (!ha->npiv_info) {
4210                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4211                             "Failed to allocate memory for npiv_info.\n");
4212                         goto fail_npiv_info;
4213                 }
4214         } else
4215                 ha->npiv_info = NULL;
4216
4217         /* Get consistent memory allocated for EX-INIT-CB. */
4218         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4219             IS_QLA28XX(ha)) {
4220                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4221                     &ha->ex_init_cb_dma);
4222                 if (!ha->ex_init_cb)
4223                         goto fail_ex_init_cb;
4224                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4225                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4226         }
4227
4228         /* Get consistent memory allocated for Special Features-CB. */
4229         if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4230                 ha->sf_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4231                                                 &ha->sf_init_cb_dma);
4232                 if (!ha->sf_init_cb)
4233                         goto fail_sf_init_cb;
4234                 memset(ha->sf_init_cb, 0, sizeof(struct init_sf_cb));
4235                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0199,
4236                            "sf_init_cb=%p.\n", ha->sf_init_cb);
4237         }
4238
4239         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4240
4241         /* Get consistent memory allocated for Async Port-Database. */
4242         if (!IS_FWI2_CAPABLE(ha)) {
4243                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4244                         &ha->async_pd_dma);
4245                 if (!ha->async_pd)
4246                         goto fail_async_pd;
4247                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4248                     "async_pd=%p.\n", ha->async_pd);
4249         }
4250
4251         INIT_LIST_HEAD(&ha->vp_list);
4252
4253         /* Allocate memory for our loop_id bitmap */
4254         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4255                                   sizeof(long),
4256                                   GFP_KERNEL);
4257         if (!ha->loop_id_map)
4258                 goto fail_loop_id_map;
4259         else {
4260                 qla2x00_set_reserved_loop_ids(ha);
4261                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4262                     "loop_id_map=%p.\n", ha->loop_id_map);
4263         }
4264
4265         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4266             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4267         if (!ha->sfp_data) {
4268                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4269                     "Unable to allocate memory for SFP read-data.\n");
4270                 goto fail_sfp_data;
4271         }
4272
4273         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4274             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4275             GFP_KERNEL);
4276         if (!ha->flt) {
4277                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4278                     "Unable to allocate memory for FLT.\n");
4279                 goto fail_flt_buffer;
4280         }
4281
4282         return 0;
4283
4284 fail_flt_buffer:
4285         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4286             ha->sfp_data, ha->sfp_data_dma);
4287 fail_sfp_data:
4288         kfree(ha->loop_id_map);
4289 fail_loop_id_map:
4290         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4291 fail_async_pd:
4292         dma_pool_free(ha->s_dma_pool, ha->sf_init_cb, ha->sf_init_cb_dma);
4293 fail_sf_init_cb:
4294         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4295 fail_ex_init_cb:
4296         kfree(ha->npiv_info);
4297 fail_npiv_info:
4298         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4299                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4300         (*rsp)->ring = NULL;
4301         (*rsp)->dma = 0;
4302 fail_rsp_ring:
4303         kfree(*rsp);
4304         *rsp = NULL;
4305 fail_rsp:
4306         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4307                 sizeof(request_t), (*req)->ring, (*req)->dma);
4308         (*req)->ring = NULL;
4309         (*req)->dma = 0;
4310 fail_req_ring:
4311         kfree(*req);
4312         *req = NULL;
4313 fail_req:
4314         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4315                 ha->ct_sns, ha->ct_sns_dma);
4316         ha->ct_sns = NULL;
4317         ha->ct_sns_dma = 0;
4318 fail_free_ms_iocb:
4319         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4320         ha->ms_iocb = NULL;
4321         ha->ms_iocb_dma = 0;
4322
4323         if (ha->sns_cmd)
4324                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4325                     ha->sns_cmd, ha->sns_cmd_dma);
4326 fail_dma_pool:
4327         if (ql2xenabledif) {
4328                 struct dsd_dma *dsd, *nxt;
4329
4330                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4331                     list) {
4332                         list_del(&dsd->list);
4333                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4334                             dsd->dsd_list_dma);
4335                         ha->dif_bundle_dma_allocs--;
4336                         kfree(dsd);
4337                         ha->dif_bundle_kallocs--;
4338                         ha->pool.unusable.count--;
4339                 }
4340                 dma_pool_destroy(ha->dif_bundl_pool);
4341                 ha->dif_bundl_pool = NULL;
4342         }
4343
4344 fail_dif_bundl_dma_pool:
4345         if (IS_QLA82XX(ha) || ql2xenabledif) {
4346                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4347                 ha->fcp_cmnd_dma_pool = NULL;
4348         }
4349 fail_dl_dma_pool:
4350         if (IS_QLA82XX(ha) || ql2xenabledif) {
4351                 dma_pool_destroy(ha->dl_dma_pool);
4352                 ha->dl_dma_pool = NULL;
4353         }
4354 fail_s_dma_pool:
4355         dma_pool_destroy(ha->s_dma_pool);
4356         ha->s_dma_pool = NULL;
4357 fail_free_nvram:
4358         kfree(ha->nvram);
4359         ha->nvram = NULL;
4360 fail_free_ctx_mempool:
4361         mempool_destroy(ha->ctx_mempool);
4362         ha->ctx_mempool = NULL;
4363 fail_free_srb_mempool:
4364         mempool_destroy(ha->srb_mempool);
4365         ha->srb_mempool = NULL;
4366 fail_free_gid_list:
4367         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4368         ha->gid_list,
4369         ha->gid_list_dma);
4370         ha->gid_list = NULL;
4371         ha->gid_list_dma = 0;
4372 fail_free_tgt_mem:
4373         qlt_mem_free(ha);
4374 fail_free_init_cb:
4375         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4376         ha->init_cb_dma);
4377         ha->init_cb = NULL;
4378         ha->init_cb_dma = 0;
4379 fail:
4380         ql_log(ql_log_fatal, NULL, 0x0030,
4381             "Memory allocation failure.\n");
4382         return -ENOMEM;
4383 }
4384
4385 int
4386 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4387 {
4388         int rval;
4389         uint16_t        size, max_cnt;
4390         uint32_t temp;
4391         struct qla_hw_data *ha = vha->hw;
4392
4393         /* Return if we don't need to alloacate any extended logins */
4394         if (ql2xexlogins <= MAX_FIBRE_DEVICES_2400)
4395                 return QLA_SUCCESS;
4396
4397         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4398                 return QLA_SUCCESS;
4399
4400         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4401         max_cnt = 0;
4402         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4403         if (rval != QLA_SUCCESS) {
4404                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4405                     "Failed to get exlogin status.\n");
4406                 return rval;
4407         }
4408
4409         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4410         temp *= size;
4411
4412         if (temp != ha->exlogin_size) {
4413                 qla2x00_free_exlogin_buffer(ha);
4414                 ha->exlogin_size = temp;
4415
4416                 ql_log(ql_log_info, vha, 0xd024,
4417                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4418                     max_cnt, size, temp);
4419
4420                 ql_log(ql_log_info, vha, 0xd025,
4421                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4422
4423                 /* Get consistent memory for extended logins */
4424                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4425                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4426                 if (!ha->exlogin_buf) {
4427                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4428                     "Failed to allocate memory for exlogin_buf_dma.\n");
4429                         return -ENOMEM;
4430                 }
4431         }
4432
4433         /* Now configure the dma buffer */
4434         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4435         if (rval) {
4436                 ql_log(ql_log_fatal, vha, 0xd033,
4437                     "Setup extended login buffer  ****FAILED****.\n");
4438                 qla2x00_free_exlogin_buffer(ha);
4439         }
4440
4441         return rval;
4442 }
4443
4444 /*
4445 * qla2x00_free_exlogin_buffer
4446 *
4447 * Input:
4448 *       ha = adapter block pointer
4449 */
4450 void
4451 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4452 {
4453         if (ha->exlogin_buf) {
4454                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4455                     ha->exlogin_buf, ha->exlogin_buf_dma);
4456                 ha->exlogin_buf = NULL;
4457                 ha->exlogin_size = 0;
4458         }
4459 }
4460
4461 static void
4462 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4463 {
4464         u32 temp;
4465         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4466         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4467
4468         if (max_cnt > vha->hw->max_exchg)
4469                 max_cnt = vha->hw->max_exchg;
4470
4471         if (qla_ini_mode_enabled(vha)) {
4472                 if (vha->ql2xiniexchg > max_cnt)
4473                         vha->ql2xiniexchg = max_cnt;
4474
4475                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4476                         *ret_cnt = vha->ql2xiniexchg;
4477
4478         } else if (qla_tgt_mode_enabled(vha)) {
4479                 if (vha->ql2xexchoffld > max_cnt) {
4480                         vha->ql2xexchoffld = max_cnt;
4481                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4482                 }
4483
4484                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4485                         *ret_cnt = vha->ql2xexchoffld;
4486         } else if (qla_dual_mode_enabled(vha)) {
4487                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4488                 if (temp > max_cnt) {
4489                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4490                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4491                         temp = max_cnt;
4492                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4493                 }
4494
4495                 if (temp > FW_DEF_EXCHANGES_CNT)
4496                         *ret_cnt = temp;
4497         }
4498 }
4499
4500 int
4501 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4502 {
4503         int rval;
4504         u16     size, max_cnt;
4505         u32 actual_cnt, totsz;
4506         struct qla_hw_data *ha = vha->hw;
4507
4508         if (!ha->flags.exchoffld_enabled)
4509                 return QLA_SUCCESS;
4510
4511         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4512                 return QLA_SUCCESS;
4513
4514         max_cnt = 0;
4515         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4516         if (rval != QLA_SUCCESS) {
4517                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4518                     "Failed to get exlogin status.\n");
4519                 return rval;
4520         }
4521
4522         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4523         ql_log(ql_log_info, vha, 0xd014,
4524             "Actual exchange offload count: %d.\n", actual_cnt);
4525
4526         totsz = actual_cnt * size;
4527
4528         if (totsz != ha->exchoffld_size) {
4529                 qla2x00_free_exchoffld_buffer(ha);
4530                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4531                         ha->exchoffld_size = 0;
4532                         ha->flags.exchoffld_enabled = 0;
4533                         return QLA_SUCCESS;
4534                 }
4535
4536                 ha->exchoffld_size = totsz;
4537
4538                 ql_log(ql_log_info, vha, 0xd016,
4539                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4540                     max_cnt, actual_cnt, size, totsz);
4541
4542                 ql_log(ql_log_info, vha, 0xd017,
4543                     "Exchange Buffers requested size = 0x%x\n",
4544                     ha->exchoffld_size);
4545
4546                 /* Get consistent memory for extended logins */
4547                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4548                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4549                 if (!ha->exchoffld_buf) {
4550                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4551                         "Failed to allocate memory for Exchange Offload.\n");
4552
4553                         if (ha->max_exchg >
4554                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4555                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4556                         } else if (ha->max_exchg >
4557                             (FW_DEF_EXCHANGES_CNT + 512)) {
4558                                 ha->max_exchg -= 512;
4559                         } else {
4560                                 ha->flags.exchoffld_enabled = 0;
4561                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4562                                     "Disabling Exchange offload due to lack of memory\n");
4563                         }
4564                         ha->exchoffld_size = 0;
4565
4566                         return -ENOMEM;
4567                 }
4568         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4569                 /* pathological case */
4570                 qla2x00_free_exchoffld_buffer(ha);
4571                 ha->exchoffld_size = 0;
4572                 ha->flags.exchoffld_enabled = 0;
4573                 ql_log(ql_log_info, vha, 0xd016,
4574                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4575                     ha->exchoffld_size, actual_cnt, size, totsz);
4576                 return 0;
4577         }
4578
4579         /* Now configure the dma buffer */
4580         rval = qla_set_exchoffld_mem_cfg(vha);
4581         if (rval) {
4582                 ql_log(ql_log_fatal, vha, 0xd02e,
4583                     "Setup exchange offload buffer ****FAILED****.\n");
4584                 qla2x00_free_exchoffld_buffer(ha);
4585         } else {
4586                 /* re-adjust number of target exchange */
4587                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4588
4589                 if (qla_ini_mode_enabled(vha))
4590                         icb->exchange_count = 0;
4591                 else
4592                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4593         }
4594
4595         return rval;
4596 }
4597
4598 /*
4599 * qla2x00_free_exchoffld_buffer
4600 *
4601 * Input:
4602 *       ha = adapter block pointer
4603 */
4604 void
4605 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4606 {
4607         if (ha->exchoffld_buf) {
4608                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4609                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4610                 ha->exchoffld_buf = NULL;
4611                 ha->exchoffld_size = 0;
4612         }
4613 }
4614
4615 /*
4616 * qla2x00_free_fw_dump
4617 *       Frees fw dump stuff.
4618 *
4619 * Input:
4620 *       ha = adapter block pointer
4621 */
4622 static void
4623 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4624 {
4625         struct fwdt *fwdt = ha->fwdt;
4626         uint j;
4627
4628         if (ha->fce)
4629                 dma_free_coherent(&ha->pdev->dev,
4630                     FCE_SIZE, ha->fce, ha->fce_dma);
4631
4632         if (ha->eft)
4633                 dma_free_coherent(&ha->pdev->dev,
4634                     EFT_SIZE, ha->eft, ha->eft_dma);
4635
4636         if (ha->fw_dump)
4637                 vfree(ha->fw_dump);
4638
4639         ha->fce = NULL;
4640         ha->fce_dma = 0;
4641         ha->flags.fce_enabled = 0;
4642         ha->eft = NULL;
4643         ha->eft_dma = 0;
4644         ha->fw_dumped = false;
4645         ha->fw_dump_cap_flags = 0;
4646         ha->fw_dump_reading = 0;
4647         ha->fw_dump = NULL;
4648         ha->fw_dump_len = 0;
4649
4650         for (j = 0; j < 2; j++, fwdt++) {
4651                 if (fwdt->template)
4652                         vfree(fwdt->template);
4653                 fwdt->template = NULL;
4654                 fwdt->length = 0;
4655         }
4656 }
4657
4658 /*
4659 * qla2x00_mem_free
4660 *      Frees all adapter allocated memory.
4661 *
4662 * Input:
4663 *      ha = adapter block pointer.
4664 */
4665 static void
4666 qla2x00_mem_free(struct qla_hw_data *ha)
4667 {
4668         qla2x00_free_fw_dump(ha);
4669
4670         if (ha->mctp_dump)
4671                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4672                     ha->mctp_dump_dma);
4673         ha->mctp_dump = NULL;
4674
4675         mempool_destroy(ha->srb_mempool);
4676         ha->srb_mempool = NULL;
4677
4678         if (ha->dcbx_tlv)
4679                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4680                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4681         ha->dcbx_tlv = NULL;
4682
4683         if (ha->xgmac_data)
4684                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4685                     ha->xgmac_data, ha->xgmac_data_dma);
4686         ha->xgmac_data = NULL;
4687
4688         if (ha->sns_cmd)
4689                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4690                 ha->sns_cmd, ha->sns_cmd_dma);
4691         ha->sns_cmd = NULL;
4692         ha->sns_cmd_dma = 0;
4693
4694         if (ha->ct_sns)
4695                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4696                 ha->ct_sns, ha->ct_sns_dma);
4697         ha->ct_sns = NULL;
4698         ha->ct_sns_dma = 0;
4699
4700         if (ha->sfp_data)
4701                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4702                     ha->sfp_data_dma);
4703         ha->sfp_data = NULL;
4704
4705         if (ha->flt)
4706                 dma_free_coherent(&ha->pdev->dev,
4707                     sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE,
4708                     ha->flt, ha->flt_dma);
4709         ha->flt = NULL;
4710         ha->flt_dma = 0;
4711
4712         if (ha->ms_iocb)
4713                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4714         ha->ms_iocb = NULL;
4715         ha->ms_iocb_dma = 0;
4716
4717         if (ha->sf_init_cb)
4718                 dma_pool_free(ha->s_dma_pool,
4719                               ha->sf_init_cb, ha->sf_init_cb_dma);
4720
4721         if (ha->ex_init_cb)
4722                 dma_pool_free(ha->s_dma_pool,
4723                         ha->ex_init_cb, ha->ex_init_cb_dma);
4724         ha->ex_init_cb = NULL;
4725         ha->ex_init_cb_dma = 0;
4726
4727         if (ha->async_pd)
4728                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4729         ha->async_pd = NULL;
4730         ha->async_pd_dma = 0;
4731
4732         dma_pool_destroy(ha->s_dma_pool);
4733         ha->s_dma_pool = NULL;
4734
4735         if (ha->gid_list)
4736                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4737                 ha->gid_list, ha->gid_list_dma);
4738         ha->gid_list = NULL;
4739         ha->gid_list_dma = 0;
4740
4741         if (IS_QLA82XX(ha)) {
4742                 if (!list_empty(&ha->gbl_dsd_list)) {
4743                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4744
4745                         /* clean up allocated prev pool */
4746                         list_for_each_entry_safe(dsd_ptr,
4747                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4748                                 dma_pool_free(ha->dl_dma_pool,
4749                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4750                                 list_del(&dsd_ptr->list);
4751                                 kfree(dsd_ptr);
4752                         }
4753                 }
4754         }
4755
4756         dma_pool_destroy(ha->dl_dma_pool);
4757         ha->dl_dma_pool = NULL;
4758
4759         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4760         ha->fcp_cmnd_dma_pool = NULL;
4761
4762         mempool_destroy(ha->ctx_mempool);
4763         ha->ctx_mempool = NULL;
4764
4765         if (ql2xenabledif && ha->dif_bundl_pool) {
4766                 struct dsd_dma *dsd, *nxt;
4767
4768                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4769                                          list) {
4770                         list_del(&dsd->list);
4771                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4772                                       dsd->dsd_list_dma);
4773                         ha->dif_bundle_dma_allocs--;
4774                         kfree(dsd);
4775                         ha->dif_bundle_kallocs--;
4776                         ha->pool.unusable.count--;
4777                 }
4778                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4779                         list_del(&dsd->list);
4780                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4781                                       dsd->dsd_list_dma);
4782                         ha->dif_bundle_dma_allocs--;
4783                         kfree(dsd);
4784                         ha->dif_bundle_kallocs--;
4785                 }
4786         }
4787
4788         dma_pool_destroy(ha->dif_bundl_pool);
4789         ha->dif_bundl_pool = NULL;
4790
4791         qlt_mem_free(ha);
4792
4793         if (ha->init_cb)
4794                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4795                         ha->init_cb, ha->init_cb_dma);
4796         ha->init_cb = NULL;
4797         ha->init_cb_dma = 0;
4798
4799         vfree(ha->optrom_buffer);
4800         ha->optrom_buffer = NULL;
4801         kfree(ha->nvram);
4802         ha->nvram = NULL;
4803         kfree(ha->npiv_info);
4804         ha->npiv_info = NULL;
4805         kfree(ha->swl);
4806         ha->swl = NULL;
4807         kfree(ha->loop_id_map);
4808         ha->sf_init_cb = NULL;
4809         ha->sf_init_cb_dma = 0;
4810         ha->loop_id_map = NULL;
4811 }
4812
4813 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4814                                                 struct qla_hw_data *ha)
4815 {
4816         struct Scsi_Host *host;
4817         struct scsi_qla_host *vha = NULL;
4818
4819         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4820         if (!host) {
4821                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4822                     "Failed to allocate host from the scsi layer, aborting.\n");
4823                 return NULL;
4824         }
4825
4826         /* Clear our data area */
4827         vha = shost_priv(host);
4828         memset(vha, 0, sizeof(scsi_qla_host_t));
4829
4830         vha->host = host;
4831         vha->host_no = host->host_no;
4832         vha->hw = ha;
4833
4834         vha->qlini_mode = ql2x_ini_mode;
4835         vha->ql2xexchoffld = ql2xexchoffld;
4836         vha->ql2xiniexchg = ql2xiniexchg;
4837
4838         INIT_LIST_HEAD(&vha->vp_fcports);
4839         INIT_LIST_HEAD(&vha->work_list);
4840         INIT_LIST_HEAD(&vha->list);
4841         INIT_LIST_HEAD(&vha->qla_cmd_list);
4842         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4843         INIT_LIST_HEAD(&vha->logo_list);
4844         INIT_LIST_HEAD(&vha->plogi_ack_list);
4845         INIT_LIST_HEAD(&vha->qp_list);
4846         INIT_LIST_HEAD(&vha->gnl.fcports);
4847         INIT_LIST_HEAD(&vha->gpnid_list);
4848         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4849
4850         INIT_LIST_HEAD(&vha->purex_list.head);
4851         spin_lock_init(&vha->purex_list.lock);
4852
4853         spin_lock_init(&vha->work_lock);
4854         spin_lock_init(&vha->cmd_list_lock);
4855         init_waitqueue_head(&vha->fcport_waitQ);
4856         init_waitqueue_head(&vha->vref_waitq);
4857
4858         vha->gnl.size = sizeof(struct get_name_list_extended) *
4859                         (ha->max_loop_id + 1);
4860         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4861             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4862         if (!vha->gnl.l) {
4863                 ql_log(ql_log_fatal, vha, 0xd04a,
4864                     "Alloc failed for name list.\n");
4865                 scsi_host_put(vha->host);
4866                 return NULL;
4867         }
4868
4869         /* todo: what about ext login? */
4870         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4871         vha->scan.l = vmalloc(vha->scan.size);
4872         if (!vha->scan.l) {
4873                 ql_log(ql_log_fatal, vha, 0xd04a,
4874                     "Alloc failed for scan database.\n");
4875                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4876                     vha->gnl.l, vha->gnl.ldma);
4877                 vha->gnl.l = NULL;
4878                 scsi_host_put(vha->host);
4879                 return NULL;
4880         }
4881         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4882
4883         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4884         ql_dbg(ql_dbg_init, vha, 0x0041,
4885             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4886             vha->host, vha->hw, vha,
4887             dev_name(&(ha->pdev->dev)));
4888
4889         return vha;
4890 }
4891
4892 struct qla_work_evt *
4893 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4894 {
4895         struct qla_work_evt *e;
4896         uint8_t bail;
4897
4898         if (test_bit(UNLOADING, &vha->dpc_flags))
4899                 return NULL;
4900
4901         QLA_VHA_MARK_BUSY(vha, bail);
4902         if (bail)
4903                 return NULL;
4904
4905         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4906         if (!e) {
4907                 QLA_VHA_MARK_NOT_BUSY(vha);
4908                 return NULL;
4909         }
4910
4911         INIT_LIST_HEAD(&e->list);
4912         e->type = type;
4913         e->flags = QLA_EVT_FLAG_FREE;
4914         return e;
4915 }
4916
4917 int
4918 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4919 {
4920         unsigned long flags;
4921         bool q = false;
4922
4923         spin_lock_irqsave(&vha->work_lock, flags);
4924         list_add_tail(&e->list, &vha->work_list);
4925
4926         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4927                 q = true;
4928
4929         spin_unlock_irqrestore(&vha->work_lock, flags);
4930
4931         if (q)
4932                 queue_work(vha->hw->wq, &vha->iocb_work);
4933
4934         return QLA_SUCCESS;
4935 }
4936
4937 int
4938 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4939     u32 data)
4940 {
4941         struct qla_work_evt *e;
4942
4943         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4944         if (!e)
4945                 return QLA_FUNCTION_FAILED;
4946
4947         e->u.aen.code = code;
4948         e->u.aen.data = data;
4949         return qla2x00_post_work(vha, e);
4950 }
4951
4952 int
4953 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4954 {
4955         struct qla_work_evt *e;
4956
4957         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4958         if (!e)
4959                 return QLA_FUNCTION_FAILED;
4960
4961         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4962         return qla2x00_post_work(vha, e);
4963 }
4964
4965 #define qla2x00_post_async_work(name, type)     \
4966 int qla2x00_post_async_##name##_work(           \
4967     struct scsi_qla_host *vha,                  \
4968     fc_port_t *fcport, uint16_t *data)          \
4969 {                                               \
4970         struct qla_work_evt *e;                 \
4971                                                 \
4972         e = qla2x00_alloc_work(vha, type);      \
4973         if (!e)                                 \
4974                 return QLA_FUNCTION_FAILED;     \
4975                                                 \
4976         e->u.logio.fcport = fcport;             \
4977         if (data) {                             \
4978                 e->u.logio.data[0] = data[0];   \
4979                 e->u.logio.data[1] = data[1];   \
4980         }                                       \
4981         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4982         return qla2x00_post_work(vha, e);       \
4983 }
4984
4985 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4986 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4987 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4988 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4989 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4990
4991 int
4992 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4993 {
4994         struct qla_work_evt *e;
4995
4996         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4997         if (!e)
4998                 return QLA_FUNCTION_FAILED;
4999
5000         e->u.uevent.code = code;
5001         return qla2x00_post_work(vha, e);
5002 }
5003
5004 static void
5005 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
5006 {
5007         char event_string[40];
5008         char *envp[] = { event_string, NULL };
5009
5010         switch (code) {
5011         case QLA_UEVENT_CODE_FW_DUMP:
5012                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
5013                     vha->host_no);
5014                 break;
5015         default:
5016                 /* do nothing */
5017                 break;
5018         }
5019         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
5020 }
5021
5022 int
5023 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
5024                         uint32_t *data, int cnt)
5025 {
5026         struct qla_work_evt *e;
5027
5028         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
5029         if (!e)
5030                 return QLA_FUNCTION_FAILED;
5031
5032         e->u.aenfx.evtcode = evtcode;
5033         e->u.aenfx.count = cnt;
5034         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
5035         return qla2x00_post_work(vha, e);
5036 }
5037
5038 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
5039 {
5040         unsigned long flags;
5041
5042         if (IS_SW_RESV_ADDR(fcport->d_id))
5043                 return;
5044
5045         spin_lock_irqsave(&fcport->vha->work_lock, flags);
5046         if (fcport->disc_state == DSC_UPD_FCPORT) {
5047                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5048                 return;
5049         }
5050         fcport->jiffies_at_registration = jiffies;
5051         fcport->sec_since_registration = 0;
5052         fcport->next_disc_state = DSC_DELETED;
5053         qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5054         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5055
5056         queue_work(system_unbound_wq, &fcport->reg_work);
5057 }
5058
5059 static
5060 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5061 {
5062         unsigned long flags;
5063         fc_port_t *fcport =  NULL, *tfcp;
5064         struct qlt_plogi_ack_t *pla =
5065             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5066         uint8_t free_fcport = 0;
5067
5068         ql_dbg(ql_dbg_disc, vha, 0xffff,
5069             "%s %d %8phC enter\n",
5070             __func__, __LINE__, e->u.new_sess.port_name);
5071
5072         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5073         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5074         if (fcport) {
5075                 fcport->d_id = e->u.new_sess.id;
5076                 if (pla) {
5077                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5078                         memcpy(fcport->node_name,
5079                             pla->iocb.u.isp24.u.plogi.node_name,
5080                             WWN_SIZE);
5081                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5082                         /* we took an extra ref_count to prevent PLOGI ACK when
5083                          * fcport/sess has not been created.
5084                          */
5085                         pla->ref_count--;
5086                 }
5087         } else {
5088                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5089                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5090                 if (fcport) {
5091                         fcport->d_id = e->u.new_sess.id;
5092                         fcport->flags |= FCF_FABRIC_DEVICE;
5093                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5094
5095                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5096                             WWN_SIZE);
5097
5098                         fcport->fc4_type = e->u.new_sess.fc4_type;
5099                         if (e->u.new_sess.fc4_type & FS_FCP_IS_N2N) {
5100                                 fcport->dm_login_expire = jiffies +
5101                                         QLA_N2N_WAIT_TIME * HZ;
5102                                 fcport->fc4_type = FS_FC4TYPE_FCP;
5103                                 fcport->n2n_flag = 1;
5104                                 if (vha->flags.nvme_enabled)
5105                                         fcport->fc4_type |= FS_FC4TYPE_NVME;
5106                         }
5107
5108                 } else {
5109                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5110                                    "%s %8phC mem alloc fail.\n",
5111                                    __func__, e->u.new_sess.port_name);
5112
5113                         if (pla) {
5114                                 list_del(&pla->list);
5115                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5116                         }
5117                         return;
5118                 }
5119
5120                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5121                 /* search again to make sure no one else got ahead */
5122                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5123                     e->u.new_sess.port_name, 1);
5124                 if (tfcp) {
5125                         /* should rarily happen */
5126                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5127                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5128                             __func__, tfcp->port_name, tfcp->disc_state,
5129                             tfcp->fw_login_state);
5130
5131                         free_fcport = 1;
5132                 } else {
5133                         list_add_tail(&fcport->list, &vha->vp_fcports);
5134
5135                 }
5136                 if (pla) {
5137                         qlt_plogi_ack_link(vha, pla, fcport,
5138                             QLT_PLOGI_LINK_SAME_WWN);
5139                         pla->ref_count--;
5140                 }
5141         }
5142         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5143
5144         if (fcport) {
5145                 fcport->id_changed = 1;
5146                 fcport->scan_state = QLA_FCPORT_FOUND;
5147                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5148                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5149
5150                 if (pla) {
5151                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5152                                 u16 wd3_lo;
5153
5154                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5155                                 fcport->local = 0;
5156                                 fcport->loop_id =
5157                                         le16_to_cpu(
5158                                             pla->iocb.u.isp24.nport_handle);
5159                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5160                                 wd3_lo =
5161                                     le16_to_cpu(
5162                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5163
5164                                 if (wd3_lo & BIT_7)
5165                                         fcport->conf_compl_supported = 1;
5166
5167                                 if ((wd3_lo & BIT_4) == 0)
5168                                         fcport->port_type = FCT_INITIATOR;
5169                                 else
5170                                         fcport->port_type = FCT_TARGET;
5171                         }
5172                         qlt_plogi_ack_unref(vha, pla);
5173                 } else {
5174                         fc_port_t *dfcp = NULL;
5175
5176                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5177                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5178                             &e->u.new_sess.id, 1);
5179                         if (tfcp && (tfcp != fcport)) {
5180                                 /*
5181                                  * We have a conflict fcport with same NportID.
5182                                  */
5183                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5184                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5185                                     __func__, tfcp->port_name, tfcp->disc_state,
5186                                     tfcp->fw_login_state);
5187
5188                                 switch (tfcp->disc_state) {
5189                                 case DSC_DELETED:
5190                                         break;
5191                                 case DSC_DELETE_PEND:
5192                                         fcport->login_pause = 1;
5193                                         tfcp->conflict = fcport;
5194                                         break;
5195                                 default:
5196                                         fcport->login_pause = 1;
5197                                         tfcp->conflict = fcport;
5198                                         dfcp = tfcp;
5199                                         break;
5200                                 }
5201                         }
5202                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5203                         if (dfcp)
5204                                 qlt_schedule_sess_for_deletion(tfcp);
5205
5206                         if (N2N_TOPO(vha->hw)) {
5207                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5208                                 fcport->keep_nport_handle = 1;
5209                                 if (vha->flags.nvme_enabled) {
5210                                         fcport->fc4_type =
5211                                             (FS_FC4TYPE_NVME | FS_FC4TYPE_FCP);
5212                                         fcport->n2n_flag = 1;
5213                                 }
5214                                 fcport->fw_login_state = 0;
5215
5216                                 schedule_delayed_work(&vha->scan.scan_work, 5);
5217                         } else {
5218                                 qla24xx_fcport_handle_login(vha, fcport);
5219                         }
5220                 }
5221         }
5222
5223         if (free_fcport) {
5224                 qla2x00_free_fcport(fcport);
5225                 if (pla) {
5226                         list_del(&pla->list);
5227                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5228                 }
5229         }
5230 }
5231
5232 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5233 {
5234         struct srb *sp = e->u.iosb.sp;
5235         int rval;
5236
5237         rval = qla2x00_start_sp(sp);
5238         if (rval != QLA_SUCCESS) {
5239                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5240                     "%s: %s: Re-issue IOCB failed (%d).\n",
5241                     __func__, sp->name, rval);
5242                 qla24xx_sp_unmap(vha, sp);
5243         }
5244 }
5245
5246 void
5247 qla2x00_do_work(struct scsi_qla_host *vha)
5248 {
5249         struct qla_work_evt *e, *tmp;
5250         unsigned long flags;
5251         LIST_HEAD(work);
5252         int rc;
5253
5254         spin_lock_irqsave(&vha->work_lock, flags);
5255         list_splice_init(&vha->work_list, &work);
5256         spin_unlock_irqrestore(&vha->work_lock, flags);
5257
5258         list_for_each_entry_safe(e, tmp, &work, list) {
5259                 rc = QLA_SUCCESS;
5260                 switch (e->type) {
5261                 case QLA_EVT_AEN:
5262                         fc_host_post_event(vha->host, fc_get_event_number(),
5263                             e->u.aen.code, e->u.aen.data);
5264                         break;
5265                 case QLA_EVT_IDC_ACK:
5266                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5267                         break;
5268                 case QLA_EVT_ASYNC_LOGIN:
5269                         qla2x00_async_login(vha, e->u.logio.fcport,
5270                             e->u.logio.data);
5271                         break;
5272                 case QLA_EVT_ASYNC_LOGOUT:
5273                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5274                         break;
5275                 case QLA_EVT_ASYNC_ADISC:
5276                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5277                             e->u.logio.data);
5278                         break;
5279                 case QLA_EVT_UEVENT:
5280                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5281                         break;
5282                 case QLA_EVT_AENFX:
5283                         qlafx00_process_aen(vha, e);
5284                         break;
5285                 case QLA_EVT_GPNID:
5286                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5287                         break;
5288                 case QLA_EVT_UNMAP:
5289                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5290                         break;
5291                 case QLA_EVT_RELOGIN:
5292                         qla2x00_relogin(vha);
5293                         break;
5294                 case QLA_EVT_NEW_SESS:
5295                         qla24xx_create_new_sess(vha, e);
5296                         break;
5297                 case QLA_EVT_GPDB:
5298                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5299                             e->u.fcport.opt);
5300                         break;
5301                 case QLA_EVT_PRLI:
5302                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5303                         break;
5304                 case QLA_EVT_GPSC:
5305                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5306                         break;
5307                 case QLA_EVT_GNL:
5308                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5309                         break;
5310                 case QLA_EVT_NACK:
5311                         qla24xx_do_nack_work(vha, e);
5312                         break;
5313                 case QLA_EVT_ASYNC_PRLO:
5314                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5315                         break;
5316                 case QLA_EVT_ASYNC_PRLO_DONE:
5317                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5318                             e->u.logio.data);
5319                         break;
5320                 case QLA_EVT_GPNFT:
5321                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5322                             e->u.gpnft.sp);
5323                         break;
5324                 case QLA_EVT_GPNFT_DONE:
5325                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5326                         break;
5327                 case QLA_EVT_GNNFT_DONE:
5328                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5329                         break;
5330                 case QLA_EVT_GNNID:
5331                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5332                         break;
5333                 case QLA_EVT_GFPNID:
5334                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5335                         break;
5336                 case QLA_EVT_SP_RETRY:
5337                         qla_sp_retry(vha, e);
5338                         break;
5339                 case QLA_EVT_IIDMA:
5340                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5341                         break;
5342                 case QLA_EVT_ELS_PLOGI:
5343                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5344                             e->u.fcport.fcport, false);
5345                         break;
5346                 }
5347
5348                 if (rc == EAGAIN) {
5349                         /* put 'work' at head of 'vha->work_list' */
5350                         spin_lock_irqsave(&vha->work_lock, flags);
5351                         list_splice(&work, &vha->work_list);
5352                         spin_unlock_irqrestore(&vha->work_lock, flags);
5353                         break;
5354                 }
5355                 list_del_init(&e->list);
5356                 if (e->flags & QLA_EVT_FLAG_FREE)
5357                         kfree(e);
5358
5359                 /* For each work completed decrement vha ref count */
5360                 QLA_VHA_MARK_NOT_BUSY(vha);
5361         }
5362 }
5363
5364 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5365 {
5366         struct qla_work_evt *e;
5367
5368         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5369
5370         if (!e) {
5371                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5372                 return QLA_FUNCTION_FAILED;
5373         }
5374
5375         return qla2x00_post_work(vha, e);
5376 }
5377
5378 /* Relogins all the fcports of a vport
5379  * Context: dpc thread
5380  */
5381 void qla2x00_relogin(struct scsi_qla_host *vha)
5382 {
5383         fc_port_t       *fcport;
5384         int status, relogin_needed = 0;
5385         struct event_arg ea;
5386
5387         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5388                 /*
5389                  * If the port is not ONLINE then try to login
5390                  * to it if we haven't run out of retries.
5391                  */
5392                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5393                     fcport->login_retry) {
5394                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5395                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5396                                 continue;
5397
5398                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5399                                 fcport->disc_state == DSC_DELETE_PEND) {
5400                                 relogin_needed = 1;
5401                         } else {
5402                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5403                                         memset(&ea, 0, sizeof(ea));
5404                                         ea.fcport = fcport;
5405                                         qla24xx_handle_relogin_event(vha, &ea);
5406                                 } else if (vha->hw->current_topology ==
5407                                     ISP_CFG_NL) {
5408                                         fcport->login_retry--;
5409                                         status =
5410                                             qla2x00_local_device_login(vha,
5411                                                 fcport);
5412                                         if (status == QLA_SUCCESS) {
5413                                                 fcport->old_loop_id =
5414                                                     fcport->loop_id;
5415                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5416                                                     "Port login OK: logged in ID 0x%x.\n",
5417                                                     fcport->loop_id);
5418                                                 qla2x00_update_fcport
5419                                                         (vha, fcport);
5420                                         } else if (status == 1) {
5421                                                 set_bit(RELOGIN_NEEDED,
5422                                                     &vha->dpc_flags);
5423                                                 /* retry the login again */
5424                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5425                                                     "Retrying %d login again loop_id 0x%x.\n",
5426                                                     fcport->login_retry,
5427                                                     fcport->loop_id);
5428                                         } else {
5429                                                 fcport->login_retry = 0;
5430                                         }
5431
5432                                         if (fcport->login_retry == 0 &&
5433                                             status != QLA_SUCCESS)
5434                                                 qla2x00_clear_loop_id(fcport);
5435                                 }
5436                         }
5437                 }
5438                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5439                         break;
5440         }
5441
5442         if (relogin_needed)
5443                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5444
5445         ql_dbg(ql_dbg_disc, vha, 0x400e,
5446             "Relogin end.\n");
5447 }
5448
5449 /* Schedule work on any of the dpc-workqueues */
5450 void
5451 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5452 {
5453         struct qla_hw_data *ha = base_vha->hw;
5454
5455         switch (work_code) {
5456         case MBA_IDC_AEN: /* 0x8200 */
5457                 if (ha->dpc_lp_wq)
5458                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5459                 break;
5460
5461         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5462                 if (!ha->flags.nic_core_reset_hdlr_active) {
5463                         if (ha->dpc_hp_wq)
5464                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5465                 } else
5466                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5467                             "NIC Core reset is already active. Skip "
5468                             "scheduling it again.\n");
5469                 break;
5470         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5471                 if (ha->dpc_hp_wq)
5472                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5473                 break;
5474         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5475                 if (ha->dpc_hp_wq)
5476                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5477                 break;
5478         default:
5479                 ql_log(ql_log_warn, base_vha, 0xb05f,
5480                     "Unknown work-code=0x%x.\n", work_code);
5481         }
5482
5483         return;
5484 }
5485
5486 /* Work: Perform NIC Core Unrecoverable state handling */
5487 void
5488 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5489 {
5490         struct qla_hw_data *ha =
5491                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5492         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5493         uint32_t dev_state = 0;
5494
5495         qla83xx_idc_lock(base_vha, 0);
5496         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5497         qla83xx_reset_ownership(base_vha);
5498         if (ha->flags.nic_core_reset_owner) {
5499                 ha->flags.nic_core_reset_owner = 0;
5500                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5501                     QLA8XXX_DEV_FAILED);
5502                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5503                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5504         }
5505         qla83xx_idc_unlock(base_vha, 0);
5506 }
5507
5508 /* Work: Execute IDC state handler */
5509 void
5510 qla83xx_idc_state_handler_work(struct work_struct *work)
5511 {
5512         struct qla_hw_data *ha =
5513                 container_of(work, struct qla_hw_data, idc_state_handler);
5514         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5515         uint32_t dev_state = 0;
5516
5517         qla83xx_idc_lock(base_vha, 0);
5518         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5519         if (dev_state == QLA8XXX_DEV_FAILED ||
5520                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5521                 qla83xx_idc_state_handler(base_vha);
5522         qla83xx_idc_unlock(base_vha, 0);
5523 }
5524
5525 static int
5526 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5527 {
5528         int rval = QLA_SUCCESS;
5529         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5530         uint32_t heart_beat_counter1, heart_beat_counter2;
5531
5532         do {
5533                 if (time_after(jiffies, heart_beat_wait)) {
5534                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5535                             "Nic Core f/w is not alive.\n");
5536                         rval = QLA_FUNCTION_FAILED;
5537                         break;
5538                 }
5539
5540                 qla83xx_idc_lock(base_vha, 0);
5541                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5542                     &heart_beat_counter1);
5543                 qla83xx_idc_unlock(base_vha, 0);
5544                 msleep(100);
5545                 qla83xx_idc_lock(base_vha, 0);
5546                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5547                     &heart_beat_counter2);
5548                 qla83xx_idc_unlock(base_vha, 0);
5549         } while (heart_beat_counter1 == heart_beat_counter2);
5550
5551         return rval;
5552 }
5553
5554 /* Work: Perform NIC Core Reset handling */
5555 void
5556 qla83xx_nic_core_reset_work(struct work_struct *work)
5557 {
5558         struct qla_hw_data *ha =
5559                 container_of(work, struct qla_hw_data, nic_core_reset);
5560         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5561         uint32_t dev_state = 0;
5562
5563         if (IS_QLA2031(ha)) {
5564                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5565                         ql_log(ql_log_warn, base_vha, 0xb081,
5566                             "Failed to dump mctp\n");
5567                 return;
5568         }
5569
5570         if (!ha->flags.nic_core_reset_hdlr_active) {
5571                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5572                         qla83xx_idc_lock(base_vha, 0);
5573                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5574                             &dev_state);
5575                         qla83xx_idc_unlock(base_vha, 0);
5576                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5577                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5578                                     "Nic Core f/w is alive.\n");
5579                                 return;
5580                         }
5581                 }
5582
5583                 ha->flags.nic_core_reset_hdlr_active = 1;
5584                 if (qla83xx_nic_core_reset(base_vha)) {
5585                         /* NIC Core reset failed. */
5586                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5587                             "NIC Core reset failed.\n");
5588                 }
5589                 ha->flags.nic_core_reset_hdlr_active = 0;
5590         }
5591 }
5592
5593 /* Work: Handle 8200 IDC aens */
5594 void
5595 qla83xx_service_idc_aen(struct work_struct *work)
5596 {
5597         struct qla_hw_data *ha =
5598                 container_of(work, struct qla_hw_data, idc_aen);
5599         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5600         uint32_t dev_state, idc_control;
5601
5602         qla83xx_idc_lock(base_vha, 0);
5603         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5604         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5605         qla83xx_idc_unlock(base_vha, 0);
5606         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5607                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5608                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5609                             "Application requested NIC Core Reset.\n");
5610                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5611                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5612                     QLA_SUCCESS) {
5613                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5614                             "Other protocol driver requested NIC Core Reset.\n");
5615                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5616                 }
5617         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5618                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5619                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5620         }
5621 }
5622
5623 static void
5624 qla83xx_wait_logic(void)
5625 {
5626         int i;
5627
5628         /* Yield CPU */
5629         if (!in_interrupt()) {
5630                 /*
5631                  * Wait about 200ms before retrying again.
5632                  * This controls the number of retries for single
5633                  * lock operation.
5634                  */
5635                 msleep(100);
5636                 schedule();
5637         } else {
5638                 for (i = 0; i < 20; i++)
5639                         cpu_relax(); /* This a nop instr on i386 */
5640         }
5641 }
5642
5643 static int
5644 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5645 {
5646         int rval;
5647         uint32_t data;
5648         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5649         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5650         struct qla_hw_data *ha = base_vha->hw;
5651
5652         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5653             "Trying force recovery of the IDC lock.\n");
5654
5655         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5656         if (rval)
5657                 return rval;
5658
5659         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5660                 return QLA_SUCCESS;
5661         } else {
5662                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5663                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5664                     data);
5665                 if (rval)
5666                         return rval;
5667
5668                 msleep(200);
5669
5670                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5671                     &data);
5672                 if (rval)
5673                         return rval;
5674
5675                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5676                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5677                                         ~(idc_lck_rcvry_stage_mask));
5678                         rval = qla83xx_wr_reg(base_vha,
5679                             QLA83XX_IDC_LOCK_RECOVERY, data);
5680                         if (rval)
5681                                 return rval;
5682
5683                         /* Forcefully perform IDC UnLock */
5684                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5685                             &data);
5686                         if (rval)
5687                                 return rval;
5688                         /* Clear lock-id by setting 0xff */
5689                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5690                             0xff);
5691                         if (rval)
5692                                 return rval;
5693                         /* Clear lock-recovery by setting 0x0 */
5694                         rval = qla83xx_wr_reg(base_vha,
5695                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5696                         if (rval)
5697                                 return rval;
5698                 } else
5699                         return QLA_SUCCESS;
5700         }
5701
5702         return rval;
5703 }
5704
5705 static int
5706 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5707 {
5708         int rval = QLA_SUCCESS;
5709         uint32_t o_drv_lockid, n_drv_lockid;
5710         unsigned long lock_recovery_timeout;
5711
5712         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5713 retry_lockid:
5714         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5715         if (rval)
5716                 goto exit;
5717
5718         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5719         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5720                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5721                         return QLA_SUCCESS;
5722                 else
5723                         return QLA_FUNCTION_FAILED;
5724         }
5725
5726         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5727         if (rval)
5728                 goto exit;
5729
5730         if (o_drv_lockid == n_drv_lockid) {
5731                 qla83xx_wait_logic();
5732                 goto retry_lockid;
5733         } else
5734                 return QLA_SUCCESS;
5735
5736 exit:
5737         return rval;
5738 }
5739
5740 void
5741 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5742 {
5743         uint32_t data;
5744         uint32_t lock_owner;
5745         struct qla_hw_data *ha = base_vha->hw;
5746
5747         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5748 retry_lock:
5749         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5750             == QLA_SUCCESS) {
5751                 if (data) {
5752                         /* Setting lock-id to our function-number */
5753                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5754                             ha->portnum);
5755                 } else {
5756                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5757                             &lock_owner);
5758                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5759                             "Failed to acquire IDC lock, acquired by %d, "
5760                             "retrying...\n", lock_owner);
5761
5762                         /* Retry/Perform IDC-Lock recovery */
5763                         if (qla83xx_idc_lock_recovery(base_vha)
5764                             == QLA_SUCCESS) {
5765                                 qla83xx_wait_logic();
5766                                 goto retry_lock;
5767                         } else
5768                                 ql_log(ql_log_warn, base_vha, 0xb075,
5769                                     "IDC Lock recovery FAILED.\n");
5770                 }
5771
5772         }
5773
5774         return;
5775 }
5776
5777 static bool
5778 qla25xx_rdp_rsp_reduce_size(struct scsi_qla_host *vha,
5779         struct purex_entry_24xx *purex)
5780 {
5781         char fwstr[16];
5782         u32 sid = purex->s_id[2] << 16 | purex->s_id[1] << 8 | purex->s_id[0];
5783         struct port_database_24xx *pdb;
5784
5785         /* Domain Controller is always logged-out. */
5786         /* if RDP request is not from Domain Controller: */
5787         if (sid != 0xfffc01)
5788                 return false;
5789
5790         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: s_id=%#x\n", __func__, sid);
5791
5792         pdb = kzalloc(sizeof(*pdb), GFP_KERNEL);
5793         if (!pdb) {
5794                 ql_dbg(ql_dbg_init, vha, 0x0181,
5795                     "%s: Failed allocate pdb\n", __func__);
5796         } else if (qla24xx_get_port_database(vha,
5797                                 le16_to_cpu(purex->nport_handle), pdb)) {
5798                 ql_dbg(ql_dbg_init, vha, 0x0181,
5799                     "%s: Failed get pdb sid=%x\n", __func__, sid);
5800         } else if (pdb->current_login_state != PDS_PLOGI_COMPLETE &&
5801             pdb->current_login_state != PDS_PRLI_COMPLETE) {
5802                 ql_dbg(ql_dbg_init, vha, 0x0181,
5803                     "%s: Port not logged in sid=%#x\n", __func__, sid);
5804         } else {
5805                 /* RDP request is from logged in port */
5806                 kfree(pdb);
5807                 return false;
5808         }
5809         kfree(pdb);
5810
5811         vha->hw->isp_ops->fw_version_str(vha, fwstr, sizeof(fwstr));
5812         fwstr[strcspn(fwstr, " ")] = 0;
5813         /* if FW version allows RDP response length upto 2048 bytes: */
5814         if (strcmp(fwstr, "8.09.00") > 0 || strcmp(fwstr, "8.05.65") == 0)
5815                 return false;
5816
5817         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: fw=%s\n", __func__, fwstr);
5818
5819         /* RDP response length is to be reduced to maximum 256 bytes */
5820         return true;
5821 }
5822
5823 /*
5824  * Function Name: qla24xx_process_purex_iocb
5825  *
5826  * Description:
5827  * Prepare a RDP response and send to Fabric switch
5828  *
5829  * PARAMETERS:
5830  * vha: SCSI qla host
5831  * purex: RDP request received by HBA
5832  */
5833 void qla24xx_process_purex_rdp(struct scsi_qla_host *vha,
5834                                struct purex_item *item)
5835 {
5836         struct qla_hw_data *ha = vha->hw;
5837         struct purex_entry_24xx *purex =
5838             (struct purex_entry_24xx *)&item->iocb;
5839         dma_addr_t rsp_els_dma;
5840         dma_addr_t rsp_payload_dma;
5841         dma_addr_t stat_dma;
5842         dma_addr_t sfp_dma;
5843         struct els_entry_24xx *rsp_els = NULL;
5844         struct rdp_rsp_payload *rsp_payload = NULL;
5845         struct link_statistics *stat = NULL;
5846         uint8_t *sfp = NULL;
5847         uint16_t sfp_flags = 0;
5848         uint rsp_payload_length = sizeof(*rsp_payload);
5849         int rval;
5850
5851         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0180,
5852             "%s: Enter\n", __func__);
5853
5854         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0181,
5855             "-------- ELS REQ -------\n");
5856         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0182,
5857             purex, sizeof(*purex));
5858
5859         if (qla25xx_rdp_rsp_reduce_size(vha, purex)) {
5860                 rsp_payload_length =
5861                     offsetof(typeof(*rsp_payload), optical_elmt_desc);
5862                 ql_dbg(ql_dbg_init, vha, 0x0181,
5863                     "Reducing RSP payload length to %u bytes...\n",
5864                     rsp_payload_length);
5865         }
5866
5867         rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els),
5868             &rsp_els_dma, GFP_KERNEL);
5869         if (!rsp_els) {
5870                 ql_log(ql_log_warn, vha, 0x0183,
5871                     "Failed allocate dma buffer ELS RSP.\n");
5872                 goto dealloc;
5873         }
5874
5875         rsp_payload = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
5876             &rsp_payload_dma, GFP_KERNEL);
5877         if (!rsp_payload) {
5878                 ql_log(ql_log_warn, vha, 0x0184,
5879                     "Failed allocate dma buffer ELS RSP payload.\n");
5880                 goto dealloc;
5881         }
5882
5883         sfp = dma_alloc_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
5884             &sfp_dma, GFP_KERNEL);
5885
5886         stat = dma_alloc_coherent(&ha->pdev->dev, sizeof(*stat),
5887             &stat_dma, GFP_KERNEL);
5888
5889         /* Prepare Response IOCB */
5890         rsp_els->entry_type = ELS_IOCB_TYPE;
5891         rsp_els->entry_count = 1;
5892         rsp_els->sys_define = 0;
5893         rsp_els->entry_status = 0;
5894         rsp_els->handle = 0;
5895         rsp_els->nport_handle = purex->nport_handle;
5896         rsp_els->tx_dsd_count = cpu_to_le16(1);
5897         rsp_els->vp_index = purex->vp_idx;
5898         rsp_els->sof_type = EST_SOFI3;
5899         rsp_els->rx_xchg_address = purex->rx_xchg_addr;
5900         rsp_els->rx_dsd_count = 0;
5901         rsp_els->opcode = purex->els_frame_payload[0];
5902
5903         rsp_els->d_id[0] = purex->s_id[0];
5904         rsp_els->d_id[1] = purex->s_id[1];
5905         rsp_els->d_id[2] = purex->s_id[2];
5906
5907         rsp_els->control_flags = cpu_to_le16(EPD_ELS_ACC);
5908         rsp_els->rx_byte_count = 0;
5909         rsp_els->tx_byte_count = cpu_to_le32(rsp_payload_length);
5910
5911         put_unaligned_le64(rsp_payload_dma, &rsp_els->tx_address);
5912         rsp_els->tx_len = rsp_els->tx_byte_count;
5913
5914         rsp_els->rx_address = 0;
5915         rsp_els->rx_len = 0;
5916
5917         /* Prepare Response Payload */
5918         rsp_payload->hdr.cmd = cpu_to_be32(0x2 << 24); /* LS_ACC */
5919         rsp_payload->hdr.len = cpu_to_be32(le32_to_cpu(rsp_els->tx_byte_count) -
5920                                            sizeof(rsp_payload->hdr));
5921
5922         /* Link service Request Info Descriptor */
5923         rsp_payload->ls_req_info_desc.desc_tag = cpu_to_be32(0x1);
5924         rsp_payload->ls_req_info_desc.desc_len =
5925             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc));
5926         rsp_payload->ls_req_info_desc.req_payload_word_0 =
5927             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
5928
5929         /* Link service Request Info Descriptor 2 */
5930         rsp_payload->ls_req_info_desc2.desc_tag = cpu_to_be32(0x1);
5931         rsp_payload->ls_req_info_desc2.desc_len =
5932             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc2));
5933         rsp_payload->ls_req_info_desc2.req_payload_word_0 =
5934             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
5935
5936
5937         rsp_payload->sfp_diag_desc.desc_tag = cpu_to_be32(0x10000);
5938         rsp_payload->sfp_diag_desc.desc_len =
5939                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->sfp_diag_desc));
5940
5941         if (sfp) {
5942                 /* SFP Flags */
5943                 memset(sfp, 0, SFP_RTDI_LEN);
5944                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x7, 2, 0);
5945                 if (!rval) {
5946                         /* SFP Flags bits 3-0: Port Tx Laser Type */
5947                         if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5))
5948                                 sfp_flags |= BIT_0; /* short wave */
5949                         else if (sfp[0] & BIT_1)
5950                                 sfp_flags |= BIT_1; /* long wave 1310nm */
5951                         else if (sfp[1] & BIT_4)
5952                                 sfp_flags |= BIT_1|BIT_0; /* long wave 1550nm */
5953                 }
5954
5955                 /* SFP Type */
5956                 memset(sfp, 0, SFP_RTDI_LEN);
5957                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x0, 1, 0);
5958                 if (!rval) {
5959                         sfp_flags |= BIT_4; /* optical */
5960                         if (sfp[0] == 0x3)
5961                                 sfp_flags |= BIT_6; /* sfp+ */
5962                 }
5963
5964                 rsp_payload->sfp_diag_desc.sfp_flags = cpu_to_be16(sfp_flags);
5965
5966                 /* SFP Diagnostics */
5967                 memset(sfp, 0, SFP_RTDI_LEN);
5968                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0x60, 10, 0);
5969                 if (!rval) {
5970                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
5971                         rsp_payload->sfp_diag_desc.temperature = trx[0];
5972                         rsp_payload->sfp_diag_desc.vcc = trx[1];
5973                         rsp_payload->sfp_diag_desc.tx_bias = trx[2];
5974                         rsp_payload->sfp_diag_desc.tx_power = trx[3];
5975                         rsp_payload->sfp_diag_desc.rx_power = trx[4];
5976                 }
5977         }
5978
5979         /* Port Speed Descriptor */
5980         rsp_payload->port_speed_desc.desc_tag = cpu_to_be32(0x10001);
5981         rsp_payload->port_speed_desc.desc_len =
5982             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_speed_desc));
5983         rsp_payload->port_speed_desc.speed_capab = cpu_to_be16(
5984             qla25xx_fdmi_port_speed_capability(ha));
5985         rsp_payload->port_speed_desc.operating_speed = cpu_to_be16(
5986             qla25xx_fdmi_port_speed_currently(ha));
5987
5988         /* Link Error Status Descriptor */
5989         rsp_payload->ls_err_desc.desc_tag = cpu_to_be32(0x10002);
5990         rsp_payload->ls_err_desc.desc_len =
5991                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_err_desc));
5992
5993         if (stat) {
5994                 rval = qla24xx_get_isp_stats(vha, stat, stat_dma, 0);
5995                 if (!rval) {
5996                         rsp_payload->ls_err_desc.link_fail_cnt =
5997                             cpu_to_be32(le32_to_cpu(stat->link_fail_cnt));
5998                         rsp_payload->ls_err_desc.loss_sync_cnt =
5999                             cpu_to_be32(le32_to_cpu(stat->loss_sync_cnt));
6000                         rsp_payload->ls_err_desc.loss_sig_cnt =
6001                             cpu_to_be32(le32_to_cpu(stat->loss_sig_cnt));
6002                         rsp_payload->ls_err_desc.prim_seq_err_cnt =
6003                             cpu_to_be32(le32_to_cpu(stat->prim_seq_err_cnt));
6004                         rsp_payload->ls_err_desc.inval_xmit_word_cnt =
6005                             cpu_to_be32(le32_to_cpu(stat->inval_xmit_word_cnt));
6006                         rsp_payload->ls_err_desc.inval_crc_cnt =
6007                             cpu_to_be32(le32_to_cpu(stat->inval_crc_cnt));
6008                         rsp_payload->ls_err_desc.pn_port_phy_type |= BIT_6;
6009                 }
6010         }
6011
6012         /* Portname Descriptor */
6013         rsp_payload->port_name_diag_desc.desc_tag = cpu_to_be32(0x10003);
6014         rsp_payload->port_name_diag_desc.desc_len =
6015             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_diag_desc));
6016         memcpy(rsp_payload->port_name_diag_desc.WWNN,
6017             vha->node_name,
6018             sizeof(rsp_payload->port_name_diag_desc.WWNN));
6019         memcpy(rsp_payload->port_name_diag_desc.WWPN,
6020             vha->port_name,
6021             sizeof(rsp_payload->port_name_diag_desc.WWPN));
6022
6023         /* F-Port Portname Descriptor */
6024         rsp_payload->port_name_direct_desc.desc_tag = cpu_to_be32(0x10003);
6025         rsp_payload->port_name_direct_desc.desc_len =
6026             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_direct_desc));
6027         memcpy(rsp_payload->port_name_direct_desc.WWNN,
6028             vha->fabric_node_name,
6029             sizeof(rsp_payload->port_name_direct_desc.WWNN));
6030         memcpy(rsp_payload->port_name_direct_desc.WWPN,
6031             vha->fabric_port_name,
6032             sizeof(rsp_payload->port_name_direct_desc.WWPN));
6033
6034         /* Bufer Credit Descriptor */
6035         rsp_payload->buffer_credit_desc.desc_tag = cpu_to_be32(0x10006);
6036         rsp_payload->buffer_credit_desc.desc_len =
6037                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->buffer_credit_desc));
6038         rsp_payload->buffer_credit_desc.fcport_b2b = 0;
6039         rsp_payload->buffer_credit_desc.attached_fcport_b2b = cpu_to_be32(0);
6040         rsp_payload->buffer_credit_desc.fcport_rtt = cpu_to_be32(0);
6041
6042         if (ha->flags.plogi_template_valid) {
6043                 uint32_t tmp =
6044                 be16_to_cpu(ha->plogi_els_payld.fl_csp.sp_bb_cred);
6045                 rsp_payload->buffer_credit_desc.fcport_b2b = cpu_to_be32(tmp);
6046         }
6047
6048         if (rsp_payload_length < sizeof(*rsp_payload))
6049                 goto send;
6050
6051         /* Optical Element Descriptor, Temperature */
6052         rsp_payload->optical_elmt_desc[0].desc_tag = cpu_to_be32(0x10007);
6053         rsp_payload->optical_elmt_desc[0].desc_len =
6054                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6055         /* Optical Element Descriptor, Voltage */
6056         rsp_payload->optical_elmt_desc[1].desc_tag = cpu_to_be32(0x10007);
6057         rsp_payload->optical_elmt_desc[1].desc_len =
6058                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6059         /* Optical Element Descriptor, Tx Bias Current */
6060         rsp_payload->optical_elmt_desc[2].desc_tag = cpu_to_be32(0x10007);
6061         rsp_payload->optical_elmt_desc[2].desc_len =
6062                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6063         /* Optical Element Descriptor, Tx Power */
6064         rsp_payload->optical_elmt_desc[3].desc_tag = cpu_to_be32(0x10007);
6065         rsp_payload->optical_elmt_desc[3].desc_len =
6066                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6067         /* Optical Element Descriptor, Rx Power */
6068         rsp_payload->optical_elmt_desc[4].desc_tag = cpu_to_be32(0x10007);
6069         rsp_payload->optical_elmt_desc[4].desc_len =
6070                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6071
6072         if (sfp) {
6073                 memset(sfp, 0, SFP_RTDI_LEN);
6074                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0, 64, 0);
6075                 if (!rval) {
6076                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6077
6078                         /* Optical Element Descriptor, Temperature */
6079                         rsp_payload->optical_elmt_desc[0].high_alarm = trx[0];
6080                         rsp_payload->optical_elmt_desc[0].low_alarm = trx[1];
6081                         rsp_payload->optical_elmt_desc[0].high_warn = trx[2];
6082                         rsp_payload->optical_elmt_desc[0].low_warn = trx[3];
6083                         rsp_payload->optical_elmt_desc[0].element_flags =
6084                             cpu_to_be32(1 << 28);
6085
6086                         /* Optical Element Descriptor, Voltage */
6087                         rsp_payload->optical_elmt_desc[1].high_alarm = trx[4];
6088                         rsp_payload->optical_elmt_desc[1].low_alarm = trx[5];
6089                         rsp_payload->optical_elmt_desc[1].high_warn = trx[6];
6090                         rsp_payload->optical_elmt_desc[1].low_warn = trx[7];
6091                         rsp_payload->optical_elmt_desc[1].element_flags =
6092                             cpu_to_be32(2 << 28);
6093
6094                         /* Optical Element Descriptor, Tx Bias Current */
6095                         rsp_payload->optical_elmt_desc[2].high_alarm = trx[8];
6096                         rsp_payload->optical_elmt_desc[2].low_alarm = trx[9];
6097                         rsp_payload->optical_elmt_desc[2].high_warn = trx[10];
6098                         rsp_payload->optical_elmt_desc[2].low_warn = trx[11];
6099                         rsp_payload->optical_elmt_desc[2].element_flags =
6100                             cpu_to_be32(3 << 28);
6101
6102                         /* Optical Element Descriptor, Tx Power */
6103                         rsp_payload->optical_elmt_desc[3].high_alarm = trx[12];
6104                         rsp_payload->optical_elmt_desc[3].low_alarm = trx[13];
6105                         rsp_payload->optical_elmt_desc[3].high_warn = trx[14];
6106                         rsp_payload->optical_elmt_desc[3].low_warn = trx[15];
6107                         rsp_payload->optical_elmt_desc[3].element_flags =
6108                             cpu_to_be32(4 << 28);
6109
6110                         /* Optical Element Descriptor, Rx Power */
6111                         rsp_payload->optical_elmt_desc[4].high_alarm = trx[16];
6112                         rsp_payload->optical_elmt_desc[4].low_alarm = trx[17];
6113                         rsp_payload->optical_elmt_desc[4].high_warn = trx[18];
6114                         rsp_payload->optical_elmt_desc[4].low_warn = trx[19];
6115                         rsp_payload->optical_elmt_desc[4].element_flags =
6116                             cpu_to_be32(5 << 28);
6117                 }
6118
6119                 memset(sfp, 0, SFP_RTDI_LEN);
6120                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 112, 64, 0);
6121                 if (!rval) {
6122                         /* Temperature high/low alarm/warning */
6123                         rsp_payload->optical_elmt_desc[0].element_flags |=
6124                             cpu_to_be32(
6125                                 (sfp[0] >> 7 & 1) << 3 |
6126                                 (sfp[0] >> 6 & 1) << 2 |
6127                                 (sfp[4] >> 7 & 1) << 1 |
6128                                 (sfp[4] >> 6 & 1) << 0);
6129
6130                         /* Voltage high/low alarm/warning */
6131                         rsp_payload->optical_elmt_desc[1].element_flags |=
6132                             cpu_to_be32(
6133                                 (sfp[0] >> 5 & 1) << 3 |
6134                                 (sfp[0] >> 4 & 1) << 2 |
6135                                 (sfp[4] >> 5 & 1) << 1 |
6136                                 (sfp[4] >> 4 & 1) << 0);
6137
6138                         /* Tx Bias Current high/low alarm/warning */
6139                         rsp_payload->optical_elmt_desc[2].element_flags |=
6140                             cpu_to_be32(
6141                                 (sfp[0] >> 3 & 1) << 3 |
6142                                 (sfp[0] >> 2 & 1) << 2 |
6143                                 (sfp[4] >> 3 & 1) << 1 |
6144                                 (sfp[4] >> 2 & 1) << 0);
6145
6146                         /* Tx Power high/low alarm/warning */
6147                         rsp_payload->optical_elmt_desc[3].element_flags |=
6148                             cpu_to_be32(
6149                                 (sfp[0] >> 1 & 1) << 3 |
6150                                 (sfp[0] >> 0 & 1) << 2 |
6151                                 (sfp[4] >> 1 & 1) << 1 |
6152                                 (sfp[4] >> 0 & 1) << 0);
6153
6154                         /* Rx Power high/low alarm/warning */
6155                         rsp_payload->optical_elmt_desc[4].element_flags |=
6156                             cpu_to_be32(
6157                                 (sfp[1] >> 7 & 1) << 3 |
6158                                 (sfp[1] >> 6 & 1) << 2 |
6159                                 (sfp[5] >> 7 & 1) << 1 |
6160                                 (sfp[5] >> 6 & 1) << 0);
6161                 }
6162         }
6163
6164         /* Optical Product Data Descriptor */
6165         rsp_payload->optical_prod_desc.desc_tag = cpu_to_be32(0x10008);
6166         rsp_payload->optical_prod_desc.desc_len =
6167                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->optical_prod_desc));
6168
6169         if (sfp) {
6170                 memset(sfp, 0, SFP_RTDI_LEN);
6171                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 20, 64, 0);
6172                 if (!rval) {
6173                         memcpy(rsp_payload->optical_prod_desc.vendor_name,
6174                             sfp + 0,
6175                             sizeof(rsp_payload->optical_prod_desc.vendor_name));
6176                         memcpy(rsp_payload->optical_prod_desc.part_number,
6177                             sfp + 20,
6178                             sizeof(rsp_payload->optical_prod_desc.part_number));
6179                         memcpy(rsp_payload->optical_prod_desc.revision,
6180                             sfp + 36,
6181                             sizeof(rsp_payload->optical_prod_desc.revision));
6182                         memcpy(rsp_payload->optical_prod_desc.serial_number,
6183                             sfp + 48,
6184                             sizeof(rsp_payload->optical_prod_desc.serial_number));
6185                 }
6186
6187                 memset(sfp, 0, SFP_RTDI_LEN);
6188                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 84, 8, 0);
6189                 if (!rval) {
6190                         memcpy(rsp_payload->optical_prod_desc.date,
6191                             sfp + 0,
6192                             sizeof(rsp_payload->optical_prod_desc.date));
6193                 }
6194         }
6195
6196 send:
6197         ql_dbg(ql_dbg_init, vha, 0x0183,
6198             "Sending ELS Response to RDP Request...\n");
6199         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0184,
6200             "-------- ELS RSP -------\n");
6201         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0185,
6202             rsp_els, sizeof(*rsp_els));
6203         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0186,
6204             "-------- ELS RSP PAYLOAD -------\n");
6205         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0187,
6206             rsp_payload, rsp_payload_length);
6207
6208         rval = qla2x00_issue_iocb(vha, rsp_els, rsp_els_dma, 0);
6209
6210         if (rval) {
6211                 ql_log(ql_log_warn, vha, 0x0188,
6212                     "%s: iocb failed to execute -> %x\n", __func__, rval);
6213         } else if (rsp_els->comp_status) {
6214                 ql_log(ql_log_warn, vha, 0x0189,
6215                     "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
6216                     __func__, rsp_els->comp_status,
6217                     rsp_els->error_subcode_1, rsp_els->error_subcode_2);
6218         } else {
6219                 ql_dbg(ql_dbg_init, vha, 0x018a, "%s: done.\n", __func__);
6220         }
6221
6222 dealloc:
6223         if (stat)
6224                 dma_free_coherent(&ha->pdev->dev, sizeof(*stat),
6225                     stat, stat_dma);
6226         if (sfp)
6227                 dma_free_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
6228                     sfp, sfp_dma);
6229         if (rsp_payload)
6230                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
6231                     rsp_payload, rsp_payload_dma);
6232         if (rsp_els)
6233                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els),
6234                     rsp_els, rsp_els_dma);
6235 }
6236
6237 void
6238 qla24xx_free_purex_item(struct purex_item *item)
6239 {
6240         if (item == &item->vha->default_item)
6241                 memset(&item->vha->default_item, 0, sizeof(struct purex_item));
6242         else
6243                 kfree(item);
6244 }
6245
6246 void qla24xx_process_purex_list(struct purex_list *list)
6247 {
6248         struct list_head head = LIST_HEAD_INIT(head);
6249         struct purex_item *item, *next;
6250         ulong flags;
6251
6252         spin_lock_irqsave(&list->lock, flags);
6253         list_splice_init(&list->head, &head);
6254         spin_unlock_irqrestore(&list->lock, flags);
6255
6256         list_for_each_entry_safe(item, next, &head, list) {
6257                 list_del(&item->list);
6258                 item->process_item(item->vha, item);
6259                 qla24xx_free_purex_item(item);
6260         }
6261 }
6262
6263 void
6264 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
6265 {
6266 #if 0
6267         uint16_t options = (requester_id << 15) | BIT_7;
6268 #endif
6269         uint16_t retry;
6270         uint32_t data;
6271         struct qla_hw_data *ha = base_vha->hw;
6272
6273         /* IDC-unlock implementation using driver-unlock/lock-id
6274          * remote registers
6275          */
6276         retry = 0;
6277 retry_unlock:
6278         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
6279             == QLA_SUCCESS) {
6280                 if (data == ha->portnum) {
6281                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
6282                         /* Clearing lock-id by setting 0xff */
6283                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
6284                 } else if (retry < 10) {
6285                         /* SV: XXX: IDC unlock retrying needed here? */
6286
6287                         /* Retry for IDC-unlock */
6288                         qla83xx_wait_logic();
6289                         retry++;
6290                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
6291                             "Failed to release IDC lock, retrying=%d\n", retry);
6292                         goto retry_unlock;
6293                 }
6294         } else if (retry < 10) {
6295                 /* Retry for IDC-unlock */
6296                 qla83xx_wait_logic();
6297                 retry++;
6298                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
6299                     "Failed to read drv-lockid, retrying=%d\n", retry);
6300                 goto retry_unlock;
6301         }
6302
6303         return;
6304
6305 #if 0
6306         /* XXX: IDC-unlock implementation using access-control mbx */
6307         retry = 0;
6308 retry_unlock2:
6309         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
6310                 if (retry < 10) {
6311                         /* Retry for IDC-unlock */
6312                         qla83xx_wait_logic();
6313                         retry++;
6314                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
6315                             "Failed to release IDC lock, retrying=%d\n", retry);
6316                         goto retry_unlock2;
6317                 }
6318         }
6319
6320         return;
6321 #endif
6322 }
6323
6324 int
6325 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6326 {
6327         int rval = QLA_SUCCESS;
6328         struct qla_hw_data *ha = vha->hw;
6329         uint32_t drv_presence;
6330
6331         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6332         if (rval == QLA_SUCCESS) {
6333                 drv_presence |= (1 << ha->portnum);
6334                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6335                     drv_presence);
6336         }
6337
6338         return rval;
6339 }
6340
6341 int
6342 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6343 {
6344         int rval = QLA_SUCCESS;
6345
6346         qla83xx_idc_lock(vha, 0);
6347         rval = __qla83xx_set_drv_presence(vha);
6348         qla83xx_idc_unlock(vha, 0);
6349
6350         return rval;
6351 }
6352
6353 int
6354 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6355 {
6356         int rval = QLA_SUCCESS;
6357         struct qla_hw_data *ha = vha->hw;
6358         uint32_t drv_presence;
6359
6360         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6361         if (rval == QLA_SUCCESS) {
6362                 drv_presence &= ~(1 << ha->portnum);
6363                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6364                     drv_presence);
6365         }
6366
6367         return rval;
6368 }
6369
6370 int
6371 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6372 {
6373         int rval = QLA_SUCCESS;
6374
6375         qla83xx_idc_lock(vha, 0);
6376         rval = __qla83xx_clear_drv_presence(vha);
6377         qla83xx_idc_unlock(vha, 0);
6378
6379         return rval;
6380 }
6381
6382 static void
6383 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
6384 {
6385         struct qla_hw_data *ha = vha->hw;
6386         uint32_t drv_ack, drv_presence;
6387         unsigned long ack_timeout;
6388
6389         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
6390         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
6391         while (1) {
6392                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6393                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6394                 if ((drv_ack & drv_presence) == drv_presence)
6395                         break;
6396
6397                 if (time_after_eq(jiffies, ack_timeout)) {
6398                         ql_log(ql_log_warn, vha, 0xb067,
6399                             "RESET ACK TIMEOUT! drv_presence=0x%x "
6400                             "drv_ack=0x%x\n", drv_presence, drv_ack);
6401                         /*
6402                          * The function(s) which did not ack in time are forced
6403                          * to withdraw any further participation in the IDC
6404                          * reset.
6405                          */
6406                         if (drv_ack != drv_presence)
6407                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6408                                     drv_ack);
6409                         break;
6410                 }
6411
6412                 qla83xx_idc_unlock(vha, 0);
6413                 msleep(1000);
6414                 qla83xx_idc_lock(vha, 0);
6415         }
6416
6417         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
6418         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
6419 }
6420
6421 static int
6422 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
6423 {
6424         int rval = QLA_SUCCESS;
6425         uint32_t idc_control;
6426
6427         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
6428         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
6429
6430         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
6431         __qla83xx_get_idc_control(vha, &idc_control);
6432         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
6433         __qla83xx_set_idc_control(vha, 0);
6434
6435         qla83xx_idc_unlock(vha, 0);
6436         rval = qla83xx_restart_nic_firmware(vha);
6437         qla83xx_idc_lock(vha, 0);
6438
6439         if (rval != QLA_SUCCESS) {
6440                 ql_log(ql_log_fatal, vha, 0xb06a,
6441                     "Failed to restart NIC f/w.\n");
6442                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
6443                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
6444         } else {
6445                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
6446                     "Success in restarting nic f/w.\n");
6447                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
6448                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
6449         }
6450
6451         return rval;
6452 }
6453
6454 /* Assumes idc_lock always held on entry */
6455 int
6456 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
6457 {
6458         struct qla_hw_data *ha = base_vha->hw;
6459         int rval = QLA_SUCCESS;
6460         unsigned long dev_init_timeout;
6461         uint32_t dev_state;
6462
6463         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
6464         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
6465
6466         while (1) {
6467
6468                 if (time_after_eq(jiffies, dev_init_timeout)) {
6469                         ql_log(ql_log_warn, base_vha, 0xb06e,
6470                             "Initialization TIMEOUT!\n");
6471                         /* Init timeout. Disable further NIC Core
6472                          * communication.
6473                          */
6474                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
6475                                 QLA8XXX_DEV_FAILED);
6476                         ql_log(ql_log_info, base_vha, 0xb06f,
6477                             "HW State: FAILED.\n");
6478                 }
6479
6480                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6481                 switch (dev_state) {
6482                 case QLA8XXX_DEV_READY:
6483                         if (ha->flags.nic_core_reset_owner)
6484                                 qla83xx_idc_audit(base_vha,
6485                                     IDC_AUDIT_COMPLETION);
6486                         ha->flags.nic_core_reset_owner = 0;
6487                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
6488                             "Reset_owner reset by 0x%x.\n",
6489                             ha->portnum);
6490                         goto exit;
6491                 case QLA8XXX_DEV_COLD:
6492                         if (ha->flags.nic_core_reset_owner)
6493                                 rval = qla83xx_device_bootstrap(base_vha);
6494                         else {
6495                         /* Wait for AEN to change device-state */
6496                                 qla83xx_idc_unlock(base_vha, 0);
6497                                 msleep(1000);
6498                                 qla83xx_idc_lock(base_vha, 0);
6499                         }
6500                         break;
6501                 case QLA8XXX_DEV_INITIALIZING:
6502                         /* Wait for AEN to change device-state */
6503                         qla83xx_idc_unlock(base_vha, 0);
6504                         msleep(1000);
6505                         qla83xx_idc_lock(base_vha, 0);
6506                         break;
6507                 case QLA8XXX_DEV_NEED_RESET:
6508                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
6509                                 qla83xx_need_reset_handler(base_vha);
6510                         else {
6511                                 /* Wait for AEN to change device-state */
6512                                 qla83xx_idc_unlock(base_vha, 0);
6513                                 msleep(1000);
6514                                 qla83xx_idc_lock(base_vha, 0);
6515                         }
6516                         /* reset timeout value after need reset handler */
6517                         dev_init_timeout = jiffies +
6518                             (ha->fcoe_dev_init_timeout * HZ);
6519                         break;
6520                 case QLA8XXX_DEV_NEED_QUIESCENT:
6521                         /* XXX: DEBUG for now */
6522                         qla83xx_idc_unlock(base_vha, 0);
6523                         msleep(1000);
6524                         qla83xx_idc_lock(base_vha, 0);
6525                         break;
6526                 case QLA8XXX_DEV_QUIESCENT:
6527                         /* XXX: DEBUG for now */
6528                         if (ha->flags.quiesce_owner)
6529                                 goto exit;
6530
6531                         qla83xx_idc_unlock(base_vha, 0);
6532                         msleep(1000);
6533                         qla83xx_idc_lock(base_vha, 0);
6534                         dev_init_timeout = jiffies +
6535                             (ha->fcoe_dev_init_timeout * HZ);
6536                         break;
6537                 case QLA8XXX_DEV_FAILED:
6538                         if (ha->flags.nic_core_reset_owner)
6539                                 qla83xx_idc_audit(base_vha,
6540                                     IDC_AUDIT_COMPLETION);
6541                         ha->flags.nic_core_reset_owner = 0;
6542                         __qla83xx_clear_drv_presence(base_vha);
6543                         qla83xx_idc_unlock(base_vha, 0);
6544                         qla8xxx_dev_failed_handler(base_vha);
6545                         rval = QLA_FUNCTION_FAILED;
6546                         qla83xx_idc_lock(base_vha, 0);
6547                         goto exit;
6548                 case QLA8XXX_BAD_VALUE:
6549                         qla83xx_idc_unlock(base_vha, 0);
6550                         msleep(1000);
6551                         qla83xx_idc_lock(base_vha, 0);
6552                         break;
6553                 default:
6554                         ql_log(ql_log_warn, base_vha, 0xb071,
6555                             "Unknown Device State: %x.\n", dev_state);
6556                         qla83xx_idc_unlock(base_vha, 0);
6557                         qla8xxx_dev_failed_handler(base_vha);
6558                         rval = QLA_FUNCTION_FAILED;
6559                         qla83xx_idc_lock(base_vha, 0);
6560                         goto exit;
6561                 }
6562         }
6563
6564 exit:
6565         return rval;
6566 }
6567
6568 void
6569 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6570 {
6571         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6572             board_disable);
6573         struct pci_dev *pdev = ha->pdev;
6574         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6575
6576         ql_log(ql_log_warn, base_vha, 0x015b,
6577             "Disabling adapter.\n");
6578
6579         if (!atomic_read(&pdev->enable_cnt)) {
6580                 ql_log(ql_log_info, base_vha, 0xfffc,
6581                     "PCI device disabled, no action req for PCI error=%lx\n",
6582                     base_vha->pci_flags);
6583                 return;
6584         }
6585
6586         /*
6587          * if UNLOADING flag is already set, then continue unload,
6588          * where it was set first.
6589          */
6590         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
6591                 return;
6592
6593         qla2x00_wait_for_sess_deletion(base_vha);
6594
6595         qla2x00_delete_all_vps(ha, base_vha);
6596
6597         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6598
6599         qla2x00_dfs_remove(base_vha);
6600
6601         qla84xx_put_chip(base_vha);
6602
6603         if (base_vha->timer_active)
6604                 qla2x00_stop_timer(base_vha);
6605
6606         base_vha->flags.online = 0;
6607
6608         qla2x00_destroy_deferred_work(ha);
6609
6610         /*
6611          * Do not try to stop beacon blink as it will issue a mailbox
6612          * command.
6613          */
6614         qla2x00_free_sysfs_attr(base_vha, false);
6615
6616         fc_remove_host(base_vha->host);
6617
6618         scsi_remove_host(base_vha->host);
6619
6620         base_vha->flags.init_done = 0;
6621         qla25xx_delete_queues(base_vha);
6622         qla2x00_free_fcports(base_vha);
6623         qla2x00_free_irqs(base_vha);
6624         qla2x00_mem_free(ha);
6625         qla82xx_md_free(base_vha);
6626         qla2x00_free_queues(ha);
6627
6628         qla2x00_unmap_iobases(ha);
6629
6630         pci_release_selected_regions(ha->pdev, ha->bars);
6631         pci_disable_pcie_error_reporting(pdev);
6632         pci_disable_device(pdev);
6633
6634         /*
6635          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6636          */
6637 }
6638
6639 /**************************************************************************
6640 * qla2x00_do_dpc
6641 *   This kernel thread is a task that is schedule by the interrupt handler
6642 *   to perform the background processing for interrupts.
6643 *
6644 * Notes:
6645 * This task always run in the context of a kernel thread.  It
6646 * is kick-off by the driver's detect code and starts up
6647 * up one per adapter. It immediately goes to sleep and waits for
6648 * some fibre event.  When either the interrupt handler or
6649 * the timer routine detects a event it will one of the task
6650 * bits then wake us up.
6651 **************************************************************************/
6652 static int
6653 qla2x00_do_dpc(void *data)
6654 {
6655         scsi_qla_host_t *base_vha;
6656         struct qla_hw_data *ha;
6657         uint32_t online;
6658         struct qla_qpair *qpair;
6659
6660         ha = (struct qla_hw_data *)data;
6661         base_vha = pci_get_drvdata(ha->pdev);
6662
6663         set_user_nice(current, MIN_NICE);
6664
6665         set_current_state(TASK_INTERRUPTIBLE);
6666         while (!kthread_should_stop()) {
6667                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6668                     "DPC handler sleeping.\n");
6669
6670                 schedule();
6671
6672                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6673                         goto end_loop;
6674
6675                 if (ha->flags.eeh_busy) {
6676                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6677                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6678                         goto end_loop;
6679                 }
6680
6681                 ha->dpc_active = 1;
6682
6683                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6684                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6685                     base_vha->dpc_flags);
6686
6687                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6688                         break;
6689
6690                 if (IS_P3P_TYPE(ha)) {
6691                         if (IS_QLA8044(ha)) {
6692                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6693                                         &base_vha->dpc_flags)) {
6694                                         qla8044_idc_lock(ha);
6695                                         qla8044_wr_direct(base_vha,
6696                                                 QLA8044_CRB_DEV_STATE_INDEX,
6697                                                 QLA8XXX_DEV_FAILED);
6698                                         qla8044_idc_unlock(ha);
6699                                         ql_log(ql_log_info, base_vha, 0x4004,
6700                                                 "HW State: FAILED.\n");
6701                                         qla8044_device_state_handler(base_vha);
6702                                         continue;
6703                                 }
6704
6705                         } else {
6706                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6707                                         &base_vha->dpc_flags)) {
6708                                         qla82xx_idc_lock(ha);
6709                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6710                                                 QLA8XXX_DEV_FAILED);
6711                                         qla82xx_idc_unlock(ha);
6712                                         ql_log(ql_log_info, base_vha, 0x0151,
6713                                                 "HW State: FAILED.\n");
6714                                         qla82xx_device_state_handler(base_vha);
6715                                         continue;
6716                                 }
6717                         }
6718
6719                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6720                                 &base_vha->dpc_flags)) {
6721
6722                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6723                                     "FCoE context reset scheduled.\n");
6724                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6725                                         &base_vha->dpc_flags))) {
6726                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6727                                                 /* FCoE-ctx reset failed.
6728                                                  * Escalate to chip-reset
6729                                                  */
6730                                                 set_bit(ISP_ABORT_NEEDED,
6731                                                         &base_vha->dpc_flags);
6732                                         }
6733                                         clear_bit(ABORT_ISP_ACTIVE,
6734                                                 &base_vha->dpc_flags);
6735                                 }
6736
6737                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6738                                     "FCoE context reset end.\n");
6739                         }
6740                 } else if (IS_QLAFX00(ha)) {
6741                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6742                                 &base_vha->dpc_flags)) {
6743                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6744                                     "Firmware Reset Recovery\n");
6745                                 if (qlafx00_reset_initialize(base_vha)) {
6746                                         /* Failed. Abort isp later. */
6747                                         if (!test_bit(UNLOADING,
6748                                             &base_vha->dpc_flags)) {
6749                                                 set_bit(ISP_UNRECOVERABLE,
6750                                                     &base_vha->dpc_flags);
6751                                                 ql_dbg(ql_dbg_dpc, base_vha,
6752                                                     0x4021,
6753                                                     "Reset Recovery Failed\n");
6754                                         }
6755                                 }
6756                         }
6757
6758                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6759                                 &base_vha->dpc_flags)) {
6760                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6761                                     "ISPFx00 Target Scan scheduled\n");
6762                                 if (qlafx00_rescan_isp(base_vha)) {
6763                                         if (!test_bit(UNLOADING,
6764                                             &base_vha->dpc_flags))
6765                                                 set_bit(ISP_UNRECOVERABLE,
6766                                                     &base_vha->dpc_flags);
6767                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6768                                             "ISPFx00 Target Scan Failed\n");
6769                                 }
6770                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6771                                     "ISPFx00 Target Scan End\n");
6772                         }
6773                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6774                                 &base_vha->dpc_flags)) {
6775                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6776                                     "ISPFx00 Host Info resend scheduled\n");
6777                                 qlafx00_fx_disc(base_vha,
6778                                     &base_vha->hw->mr.fcport,
6779                                     FXDISC_REG_HOST_INFO);
6780                         }
6781                 }
6782
6783                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6784                     &base_vha->dpc_flags)) {
6785                         /* Semantic:
6786                          *  - NO-OP -- await next ISP-ABORT. Preferred method
6787                          *             to minimize disruptions that will occur
6788                          *             when a forced chip-reset occurs.
6789                          *  - Force -- ISP-ABORT scheduled.
6790                          */
6791                         /* set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); */
6792                 }
6793
6794                 if (test_and_clear_bit
6795                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6796                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6797                         bool do_reset = true;
6798
6799                         switch (base_vha->qlini_mode) {
6800                         case QLA2XXX_INI_MODE_ENABLED:
6801                                 break;
6802                         case QLA2XXX_INI_MODE_DISABLED:
6803                                 if (!qla_tgt_mode_enabled(base_vha) &&
6804                                     !ha->flags.fw_started)
6805                                         do_reset = false;
6806                                 break;
6807                         case QLA2XXX_INI_MODE_DUAL:
6808                                 if (!qla_dual_mode_enabled(base_vha) &&
6809                                     !ha->flags.fw_started)
6810                                         do_reset = false;
6811                                 break;
6812                         default:
6813                                 break;
6814                         }
6815
6816                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6817                             &base_vha->dpc_flags))) {
6818                                 base_vha->flags.online = 1;
6819                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6820                                     "ISP abort scheduled.\n");
6821                                 if (ha->isp_ops->abort_isp(base_vha)) {
6822                                         /* failed. retry later */
6823                                         set_bit(ISP_ABORT_NEEDED,
6824                                             &base_vha->dpc_flags);
6825                                 }
6826                                 clear_bit(ABORT_ISP_ACTIVE,
6827                                                 &base_vha->dpc_flags);
6828                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6829                                     "ISP abort end.\n");
6830                         }
6831                 }
6832
6833                 if (test_bit(PROCESS_PUREX_IOCB, &base_vha->dpc_flags)) {
6834                         if (atomic_read(&base_vha->loop_state) == LOOP_READY) {
6835                                 qla24xx_process_purex_list
6836                                         (&base_vha->purex_list);
6837                                 clear_bit(PROCESS_PUREX_IOCB,
6838                                     &base_vha->dpc_flags);
6839                         }
6840                 }
6841
6842                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6843                     &base_vha->dpc_flags)) {
6844                         qla2x00_update_fcports(base_vha);
6845                 }
6846
6847                 if (IS_QLAFX00(ha))
6848                         goto loop_resync_check;
6849
6850                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6851                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6852                             "Quiescence mode scheduled.\n");
6853                         if (IS_P3P_TYPE(ha)) {
6854                                 if (IS_QLA82XX(ha))
6855                                         qla82xx_device_state_handler(base_vha);
6856                                 if (IS_QLA8044(ha))
6857                                         qla8044_device_state_handler(base_vha);
6858                                 clear_bit(ISP_QUIESCE_NEEDED,
6859                                     &base_vha->dpc_flags);
6860                                 if (!ha->flags.quiesce_owner) {
6861                                         qla2x00_perform_loop_resync(base_vha);
6862                                         if (IS_QLA82XX(ha)) {
6863                                                 qla82xx_idc_lock(ha);
6864                                                 qla82xx_clear_qsnt_ready(
6865                                                     base_vha);
6866                                                 qla82xx_idc_unlock(ha);
6867                                         } else if (IS_QLA8044(ha)) {
6868                                                 qla8044_idc_lock(ha);
6869                                                 qla8044_clear_qsnt_ready(
6870                                                     base_vha);
6871                                                 qla8044_idc_unlock(ha);
6872                                         }
6873                                 }
6874                         } else {
6875                                 clear_bit(ISP_QUIESCE_NEEDED,
6876                                     &base_vha->dpc_flags);
6877                                 qla2x00_quiesce_io(base_vha);
6878                         }
6879                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6880                             "Quiescence mode end.\n");
6881                 }
6882
6883                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6884                                 &base_vha->dpc_flags) &&
6885                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6886
6887                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6888                             "Reset marker scheduled.\n");
6889                         qla2x00_rst_aen(base_vha);
6890                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6891                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6892                             "Reset marker end.\n");
6893                 }
6894
6895                 /* Retry each device up to login retry count */
6896                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6897                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6898                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6899
6900                         if (!base_vha->relogin_jif ||
6901                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6902                                 base_vha->relogin_jif = jiffies + HZ;
6903                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6904
6905                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6906                                     "Relogin scheduled.\n");
6907                                 qla24xx_post_relogin_work(base_vha);
6908                         }
6909                 }
6910 loop_resync_check:
6911                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6912                     &base_vha->dpc_flags)) {
6913
6914                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6915                             "Loop resync scheduled.\n");
6916
6917                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6918                             &base_vha->dpc_flags))) {
6919
6920                                 qla2x00_loop_resync(base_vha);
6921
6922                                 clear_bit(LOOP_RESYNC_ACTIVE,
6923                                                 &base_vha->dpc_flags);
6924                         }
6925
6926                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6927                             "Loop resync end.\n");
6928                 }
6929
6930                 if (IS_QLAFX00(ha))
6931                         goto intr_on_check;
6932
6933                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6934                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6935                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6936                         qla2xxx_flash_npiv_conf(base_vha);
6937                 }
6938
6939 intr_on_check:
6940                 if (!ha->interrupts_on)
6941                         ha->isp_ops->enable_intrs(ha);
6942
6943                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6944                                         &base_vha->dpc_flags)) {
6945                         if (ha->beacon_blink_led == 1)
6946                                 ha->isp_ops->beacon_blink(base_vha);
6947                 }
6948
6949                 /* qpair online check */
6950                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6951                     &base_vha->dpc_flags)) {
6952                         if (ha->flags.eeh_busy ||
6953                             ha->flags.pci_channel_io_perm_failure)
6954                                 online = 0;
6955                         else
6956                                 online = 1;
6957
6958                         mutex_lock(&ha->mq_lock);
6959                         list_for_each_entry(qpair, &base_vha->qp_list,
6960                             qp_list_elem)
6961                         qpair->online = online;
6962                         mutex_unlock(&ha->mq_lock);
6963                 }
6964
6965                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
6966                     &base_vha->dpc_flags)) {
6967                         ql_log(ql_log_info, base_vha, 0xffffff,
6968                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6969                                                 ha->nvme_last_rptd_aen);
6970                         if (qla27xx_set_zio_threshold(base_vha,
6971                             ha->nvme_last_rptd_aen)) {
6972                                 ql_log(ql_log_info, base_vha, 0xffffff,
6973                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6974                                     ha->nvme_last_rptd_aen);
6975                         }
6976                 }
6977
6978                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
6979                     &base_vha->dpc_flags)) {
6980                         ql_log(ql_log_info, base_vha, 0xffffff,
6981                             "SET ZIO Activity exchange threshold to %d.\n",
6982                             ha->last_zio_threshold);
6983                         qla27xx_set_zio_threshold(base_vha,
6984                             ha->last_zio_threshold);
6985                 }
6986
6987                 if (!IS_QLAFX00(ha))
6988                         qla2x00_do_dpc_all_vps(base_vha);
6989
6990                 if (test_and_clear_bit(N2N_LINK_RESET,
6991                         &base_vha->dpc_flags)) {
6992                         qla2x00_lip_reset(base_vha);
6993                 }
6994
6995                 ha->dpc_active = 0;
6996 end_loop:
6997                 set_current_state(TASK_INTERRUPTIBLE);
6998         } /* End of while(1) */
6999         __set_current_state(TASK_RUNNING);
7000
7001         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
7002             "DPC handler exiting.\n");
7003
7004         /*
7005          * Make sure that nobody tries to wake us up again.
7006          */
7007         ha->dpc_active = 0;
7008
7009         /* Cleanup any residual CTX SRBs. */
7010         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
7011
7012         return 0;
7013 }
7014
7015 void
7016 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
7017 {
7018         struct qla_hw_data *ha = vha->hw;
7019         struct task_struct *t = ha->dpc_thread;
7020
7021         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
7022                 wake_up_process(t);
7023 }
7024
7025 /*
7026 *  qla2x00_rst_aen
7027 *      Processes asynchronous reset.
7028 *
7029 * Input:
7030 *      ha  = adapter block pointer.
7031 */
7032 static void
7033 qla2x00_rst_aen(scsi_qla_host_t *vha)
7034 {
7035         if (vha->flags.online && !vha->flags.reset_active &&
7036             !atomic_read(&vha->loop_down_timer) &&
7037             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
7038                 do {
7039                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7040
7041                         /*
7042                          * Issue marker command only when we are going to start
7043                          * the I/O.
7044                          */
7045                         vha->marker_needed = 1;
7046                 } while (!atomic_read(&vha->loop_down_timer) &&
7047                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
7048         }
7049 }
7050
7051 /**************************************************************************
7052 *   qla2x00_timer
7053 *
7054 * Description:
7055 *   One second timer
7056 *
7057 * Context: Interrupt
7058 ***************************************************************************/
7059 void
7060 qla2x00_timer(struct timer_list *t)
7061 {
7062         scsi_qla_host_t *vha = from_timer(vha, t, timer);
7063         unsigned long   cpu_flags = 0;
7064         int             start_dpc = 0;
7065         int             index;
7066         srb_t           *sp;
7067         uint16_t        w;
7068         struct qla_hw_data *ha = vha->hw;
7069         struct req_que *req;
7070
7071         if (ha->flags.eeh_busy) {
7072                 ql_dbg(ql_dbg_timer, vha, 0x6000,
7073                     "EEH = %d, restarting timer.\n",
7074                     ha->flags.eeh_busy);
7075                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
7076                 return;
7077         }
7078
7079         /*
7080          * Hardware read to raise pending EEH errors during mailbox waits. If
7081          * the read returns -1 then disable the board.
7082          */
7083         if (!pci_channel_offline(ha->pdev)) {
7084                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
7085                 qla2x00_check_reg16_for_disconnect(vha, w);
7086         }
7087
7088         /* Make sure qla82xx_watchdog is run only for physical port */
7089         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
7090                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
7091                         start_dpc++;
7092                 if (IS_QLA82XX(ha))
7093                         qla82xx_watchdog(vha);
7094                 else if (IS_QLA8044(ha))
7095                         qla8044_watchdog(vha);
7096         }
7097
7098         if (!vha->vp_idx && IS_QLAFX00(ha))
7099                 qlafx00_timer_routine(vha);
7100
7101         /* Loop down handler. */
7102         if (atomic_read(&vha->loop_down_timer) > 0 &&
7103             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
7104             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
7105                 && vha->flags.online) {
7106
7107                 if (atomic_read(&vha->loop_down_timer) ==
7108                     vha->loop_down_abort_time) {
7109
7110                         ql_log(ql_log_info, vha, 0x6008,
7111                             "Loop down - aborting the queues before time expires.\n");
7112
7113                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
7114                                 atomic_set(&vha->loop_state, LOOP_DEAD);
7115
7116                         /*
7117                          * Schedule an ISP abort to return any FCP2-device
7118                          * commands.
7119                          */
7120                         /* NPIV - scan physical port only */
7121                         if (!vha->vp_idx) {
7122                                 spin_lock_irqsave(&ha->hardware_lock,
7123                                     cpu_flags);
7124                                 req = ha->req_q_map[0];
7125                                 for (index = 1;
7126                                     index < req->num_outstanding_cmds;
7127                                     index++) {
7128                                         fc_port_t *sfcp;
7129
7130                                         sp = req->outstanding_cmds[index];
7131                                         if (!sp)
7132                                                 continue;
7133                                         if (sp->cmd_type != TYPE_SRB)
7134                                                 continue;
7135                                         if (sp->type != SRB_SCSI_CMD)
7136                                                 continue;
7137                                         sfcp = sp->fcport;
7138                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
7139                                                 continue;
7140
7141                                         if (IS_QLA82XX(ha))
7142                                                 set_bit(FCOE_CTX_RESET_NEEDED,
7143                                                         &vha->dpc_flags);
7144                                         else
7145                                                 set_bit(ISP_ABORT_NEEDED,
7146                                                         &vha->dpc_flags);
7147                                         break;
7148                                 }
7149                                 spin_unlock_irqrestore(&ha->hardware_lock,
7150                                                                 cpu_flags);
7151                         }
7152                         start_dpc++;
7153                 }
7154
7155                 /* if the loop has been down for 4 minutes, reinit adapter */
7156                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
7157                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
7158                                 ql_log(ql_log_warn, vha, 0x6009,
7159                                     "Loop down - aborting ISP.\n");
7160
7161                                 if (IS_QLA82XX(ha))
7162                                         set_bit(FCOE_CTX_RESET_NEEDED,
7163                                                 &vha->dpc_flags);
7164                                 else
7165                                         set_bit(ISP_ABORT_NEEDED,
7166                                                 &vha->dpc_flags);
7167                         }
7168                 }
7169                 ql_dbg(ql_dbg_timer, vha, 0x600a,
7170                     "Loop down - seconds remaining %d.\n",
7171                     atomic_read(&vha->loop_down_timer));
7172         }
7173         /* Check if beacon LED needs to be blinked for physical host only */
7174         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
7175                 /* There is no beacon_blink function for ISP82xx */
7176                 if (!IS_P3P_TYPE(ha)) {
7177                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
7178                         start_dpc++;
7179                 }
7180         }
7181
7182         /* Process any deferred work. */
7183         if (!list_empty(&vha->work_list)) {
7184                 unsigned long flags;
7185                 bool q = false;
7186
7187                 spin_lock_irqsave(&vha->work_lock, flags);
7188                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
7189                         q = true;
7190                 spin_unlock_irqrestore(&vha->work_lock, flags);
7191                 if (q)
7192                         queue_work(vha->hw->wq, &vha->iocb_work);
7193         }
7194
7195         /*
7196          * FC-NVME
7197          * see if the active AEN count has changed from what was last reported.
7198          */
7199         index = atomic_read(&ha->nvme_active_aen_cnt);
7200         if (!vha->vp_idx &&
7201             (index != ha->nvme_last_rptd_aen) &&
7202             (index >= DEFAULT_ZIO_THRESHOLD) &&
7203             ha->zio_mode == QLA_ZIO_MODE_6 &&
7204             !ha->flags.host_shutting_down) {
7205                 ql_log(ql_log_info, vha, 0x3002,
7206                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
7207                     ha->nvme_last_rptd_aen);
7208                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
7209                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7210                 start_dpc++;
7211         }
7212
7213         if (!vha->vp_idx &&
7214             atomic_read(&ha->zio_threshold) != ha->last_zio_threshold &&
7215             IS_ZIO_THRESHOLD_CAPABLE(ha)) {
7216                 ql_log(ql_log_info, vha, 0x3002,
7217                     "Sched: Set ZIO exchange threshold to %d.\n",
7218                     ha->last_zio_threshold);
7219                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
7220                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7221                 start_dpc++;
7222         }
7223
7224         /* Schedule the DPC routine if needed */
7225         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
7226             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
7227             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
7228             start_dpc ||
7229             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
7230             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
7231             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
7232             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
7233             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
7234             test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
7235             test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags))) {
7236                 ql_dbg(ql_dbg_timer, vha, 0x600b,
7237                     "isp_abort_needed=%d loop_resync_needed=%d "
7238                     "fcport_update_needed=%d start_dpc=%d "
7239                     "reset_marker_needed=%d",
7240                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
7241                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
7242                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
7243                     start_dpc,
7244                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
7245                 ql_dbg(ql_dbg_timer, vha, 0x600c,
7246                     "beacon_blink_needed=%d isp_unrecoverable=%d "
7247                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
7248                     "relogin_needed=%d, Process_purex_iocb=%d.\n",
7249                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
7250                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
7251                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
7252                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
7253                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
7254                     test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags));
7255                 qla2xxx_wake_dpc(vha);
7256         }
7257
7258         qla2x00_restart_timer(vha, WATCH_INTERVAL);
7259 }
7260
7261 /* Firmware interface routines. */
7262
7263 #define FW_ISP21XX      0
7264 #define FW_ISP22XX      1
7265 #define FW_ISP2300      2
7266 #define FW_ISP2322      3
7267 #define FW_ISP24XX      4
7268 #define FW_ISP25XX      5
7269 #define FW_ISP81XX      6
7270 #define FW_ISP82XX      7
7271 #define FW_ISP2031      8
7272 #define FW_ISP8031      9
7273 #define FW_ISP27XX      10
7274 #define FW_ISP28XX      11
7275
7276 #define FW_FILE_ISP21XX "ql2100_fw.bin"
7277 #define FW_FILE_ISP22XX "ql2200_fw.bin"
7278 #define FW_FILE_ISP2300 "ql2300_fw.bin"
7279 #define FW_FILE_ISP2322 "ql2322_fw.bin"
7280 #define FW_FILE_ISP24XX "ql2400_fw.bin"
7281 #define FW_FILE_ISP25XX "ql2500_fw.bin"
7282 #define FW_FILE_ISP81XX "ql8100_fw.bin"
7283 #define FW_FILE_ISP82XX "ql8200_fw.bin"
7284 #define FW_FILE_ISP2031 "ql2600_fw.bin"
7285 #define FW_FILE_ISP8031 "ql8300_fw.bin"
7286 #define FW_FILE_ISP27XX "ql2700_fw.bin"
7287 #define FW_FILE_ISP28XX "ql2800_fw.bin"
7288
7289
7290 static DEFINE_MUTEX(qla_fw_lock);
7291
7292 static struct fw_blob qla_fw_blobs[] = {
7293         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
7294         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
7295         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
7296         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
7297         { .name = FW_FILE_ISP24XX, },
7298         { .name = FW_FILE_ISP25XX, },
7299         { .name = FW_FILE_ISP81XX, },
7300         { .name = FW_FILE_ISP82XX, },
7301         { .name = FW_FILE_ISP2031, },
7302         { .name = FW_FILE_ISP8031, },
7303         { .name = FW_FILE_ISP27XX, },
7304         { .name = FW_FILE_ISP28XX, },
7305         { .name = NULL, },
7306 };
7307
7308 struct fw_blob *
7309 qla2x00_request_firmware(scsi_qla_host_t *vha)
7310 {
7311         struct qla_hw_data *ha = vha->hw;
7312         struct fw_blob *blob;
7313
7314         if (IS_QLA2100(ha)) {
7315                 blob = &qla_fw_blobs[FW_ISP21XX];
7316         } else if (IS_QLA2200(ha)) {
7317                 blob = &qla_fw_blobs[FW_ISP22XX];
7318         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
7319                 blob = &qla_fw_blobs[FW_ISP2300];
7320         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
7321                 blob = &qla_fw_blobs[FW_ISP2322];
7322         } else if (IS_QLA24XX_TYPE(ha)) {
7323                 blob = &qla_fw_blobs[FW_ISP24XX];
7324         } else if (IS_QLA25XX(ha)) {
7325                 blob = &qla_fw_blobs[FW_ISP25XX];
7326         } else if (IS_QLA81XX(ha)) {
7327                 blob = &qla_fw_blobs[FW_ISP81XX];
7328         } else if (IS_QLA82XX(ha)) {
7329                 blob = &qla_fw_blobs[FW_ISP82XX];
7330         } else if (IS_QLA2031(ha)) {
7331                 blob = &qla_fw_blobs[FW_ISP2031];
7332         } else if (IS_QLA8031(ha)) {
7333                 blob = &qla_fw_blobs[FW_ISP8031];
7334         } else if (IS_QLA27XX(ha)) {
7335                 blob = &qla_fw_blobs[FW_ISP27XX];
7336         } else if (IS_QLA28XX(ha)) {
7337                 blob = &qla_fw_blobs[FW_ISP28XX];
7338         } else {
7339                 return NULL;
7340         }
7341
7342         if (!blob->name)
7343                 return NULL;
7344
7345         mutex_lock(&qla_fw_lock);
7346         if (blob->fw)
7347                 goto out;
7348
7349         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
7350                 ql_log(ql_log_warn, vha, 0x0063,
7351                     "Failed to load firmware image (%s).\n", blob->name);
7352                 blob->fw = NULL;
7353                 blob = NULL;
7354         }
7355
7356 out:
7357         mutex_unlock(&qla_fw_lock);
7358         return blob;
7359 }
7360
7361 static void
7362 qla2x00_release_firmware(void)
7363 {
7364         struct fw_blob *blob;
7365
7366         mutex_lock(&qla_fw_lock);
7367         for (blob = qla_fw_blobs; blob->name; blob++)
7368                 release_firmware(blob->fw);
7369         mutex_unlock(&qla_fw_lock);
7370 }
7371
7372 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
7373 {
7374         struct qla_hw_data *ha = vha->hw;
7375         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
7376         struct qla_qpair *qpair = NULL;
7377         struct scsi_qla_host *vp;
7378         fc_port_t *fcport;
7379         int i;
7380         unsigned long flags;
7381
7382         ha->chip_reset++;
7383
7384         ha->base_qpair->chip_reset = ha->chip_reset;
7385         for (i = 0; i < ha->max_qpairs; i++) {
7386                 if (ha->queue_pair_map[i])
7387                         ha->queue_pair_map[i]->chip_reset =
7388                             ha->base_qpair->chip_reset;
7389         }
7390
7391         /* purge MBox commands */
7392         if (atomic_read(&ha->num_pend_mbx_stage3)) {
7393                 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
7394                 complete(&ha->mbx_intr_comp);
7395         }
7396
7397         i = 0;
7398
7399         while (atomic_read(&ha->num_pend_mbx_stage3) ||
7400             atomic_read(&ha->num_pend_mbx_stage2) ||
7401             atomic_read(&ha->num_pend_mbx_stage1)) {
7402                 msleep(20);
7403                 i++;
7404                 if (i > 50)
7405                         break;
7406         }
7407
7408         ha->flags.purge_mbox = 0;
7409
7410         mutex_lock(&ha->mq_lock);
7411         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7412                 qpair->online = 0;
7413         mutex_unlock(&ha->mq_lock);
7414
7415         qla2x00_mark_all_devices_lost(vha);
7416
7417         spin_lock_irqsave(&ha->vport_slock, flags);
7418         list_for_each_entry(vp, &ha->vp_list, list) {
7419                 atomic_inc(&vp->vref_count);
7420                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7421                 qla2x00_mark_all_devices_lost(vp);
7422                 spin_lock_irqsave(&ha->vport_slock, flags);
7423                 atomic_dec(&vp->vref_count);
7424         }
7425         spin_unlock_irqrestore(&ha->vport_slock, flags);
7426
7427         /* Clear all async request states across all VPs. */
7428         list_for_each_entry(fcport, &vha->vp_fcports, list)
7429                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7430
7431         spin_lock_irqsave(&ha->vport_slock, flags);
7432         list_for_each_entry(vp, &ha->vp_list, list) {
7433                 atomic_inc(&vp->vref_count);
7434                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7435                 list_for_each_entry(fcport, &vp->vp_fcports, list)
7436                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7437                 spin_lock_irqsave(&ha->vport_slock, flags);
7438                 atomic_dec(&vp->vref_count);
7439         }
7440         spin_unlock_irqrestore(&ha->vport_slock, flags);
7441 }
7442
7443
7444 static pci_ers_result_t
7445 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
7446 {
7447         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
7448         struct qla_hw_data *ha = vha->hw;
7449
7450         ql_dbg(ql_dbg_aer, vha, 0x9000,
7451             "PCI error detected, state %x.\n", state);
7452
7453         if (!atomic_read(&pdev->enable_cnt)) {
7454                 ql_log(ql_log_info, vha, 0xffff,
7455                         "PCI device is disabled,state %x\n", state);
7456                 return PCI_ERS_RESULT_NEED_RESET;
7457         }
7458
7459         switch (state) {
7460         case pci_channel_io_normal:
7461                 ha->flags.eeh_busy = 0;
7462                 if (ql2xmqsupport || ql2xnvmeenable) {
7463                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7464                         qla2xxx_wake_dpc(vha);
7465                 }
7466                 return PCI_ERS_RESULT_CAN_RECOVER;
7467         case pci_channel_io_frozen:
7468                 ha->flags.eeh_busy = 1;
7469                 qla_pci_error_cleanup(vha);
7470                 return PCI_ERS_RESULT_NEED_RESET;
7471         case pci_channel_io_perm_failure:
7472                 ha->flags.pci_channel_io_perm_failure = 1;
7473                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
7474                 if (ql2xmqsupport || ql2xnvmeenable) {
7475                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7476                         qla2xxx_wake_dpc(vha);
7477                 }
7478                 return PCI_ERS_RESULT_DISCONNECT;
7479         }
7480         return PCI_ERS_RESULT_NEED_RESET;
7481 }
7482
7483 static pci_ers_result_t
7484 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
7485 {
7486         int risc_paused = 0;
7487         uint32_t stat;
7488         unsigned long flags;
7489         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7490         struct qla_hw_data *ha = base_vha->hw;
7491         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7492         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
7493
7494         if (IS_QLA82XX(ha))
7495                 return PCI_ERS_RESULT_RECOVERED;
7496
7497         spin_lock_irqsave(&ha->hardware_lock, flags);
7498         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
7499                 stat = rd_reg_word(&reg->hccr);
7500                 if (stat & HCCR_RISC_PAUSE)
7501                         risc_paused = 1;
7502         } else if (IS_QLA23XX(ha)) {
7503                 stat = rd_reg_dword(&reg->u.isp2300.host_status);
7504                 if (stat & HSR_RISC_PAUSED)
7505                         risc_paused = 1;
7506         } else if (IS_FWI2_CAPABLE(ha)) {
7507                 stat = rd_reg_dword(&reg24->host_status);
7508                 if (stat & HSRX_RISC_PAUSED)
7509                         risc_paused = 1;
7510         }
7511         spin_unlock_irqrestore(&ha->hardware_lock, flags);
7512
7513         if (risc_paused) {
7514                 ql_log(ql_log_info, base_vha, 0x9003,
7515                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
7516                 qla2xxx_dump_fw(base_vha);
7517
7518                 return PCI_ERS_RESULT_NEED_RESET;
7519         } else
7520                 return PCI_ERS_RESULT_RECOVERED;
7521 }
7522
7523 static pci_ers_result_t
7524 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
7525 {
7526         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
7527         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7528         struct qla_hw_data *ha = base_vha->hw;
7529         int rc;
7530         struct qla_qpair *qpair = NULL;
7531
7532         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
7533             "Slot Reset.\n");
7534
7535         /* Workaround: qla2xxx driver which access hardware earlier
7536          * needs error state to be pci_channel_io_online.
7537          * Otherwise mailbox command timesout.
7538          */
7539         pdev->error_state = pci_channel_io_normal;
7540
7541         pci_restore_state(pdev);
7542
7543         /* pci_restore_state() clears the saved_state flag of the device
7544          * save restored state which resets saved_state flag
7545          */
7546         pci_save_state(pdev);
7547
7548         if (ha->mem_only)
7549                 rc = pci_enable_device_mem(pdev);
7550         else
7551                 rc = pci_enable_device(pdev);
7552
7553         if (rc) {
7554                 ql_log(ql_log_warn, base_vha, 0x9005,
7555                     "Can't re-enable PCI device after reset.\n");
7556                 goto exit_slot_reset;
7557         }
7558
7559
7560         if (ha->isp_ops->pci_config(base_vha))
7561                 goto exit_slot_reset;
7562
7563         mutex_lock(&ha->mq_lock);
7564         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7565                 qpair->online = 1;
7566         mutex_unlock(&ha->mq_lock);
7567
7568         base_vha->flags.online = 1;
7569         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7570         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
7571                 ret =  PCI_ERS_RESULT_RECOVERED;
7572         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7573
7574
7575 exit_slot_reset:
7576         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7577             "slot_reset return %x.\n", ret);
7578
7579         return ret;
7580 }
7581
7582 static void
7583 qla2xxx_pci_resume(struct pci_dev *pdev)
7584 {
7585         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7586         struct qla_hw_data *ha = base_vha->hw;
7587         int ret;
7588
7589         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
7590             "pci_resume.\n");
7591
7592         ha->flags.eeh_busy = 0;
7593
7594         ret = qla2x00_wait_for_hba_online(base_vha);
7595         if (ret != QLA_SUCCESS) {
7596                 ql_log(ql_log_fatal, base_vha, 0x9002,
7597                     "The device failed to resume I/O from slot/link_reset.\n");
7598         }
7599 }
7600
7601 static void
7602 qla_pci_reset_prepare(struct pci_dev *pdev)
7603 {
7604         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7605         struct qla_hw_data *ha = base_vha->hw;
7606         struct qla_qpair *qpair;
7607
7608         ql_log(ql_log_warn, base_vha, 0xffff,
7609             "%s.\n", __func__);
7610
7611         /*
7612          * PCI FLR/function reset is about to reset the
7613          * slot. Stop the chip to stop all DMA access.
7614          * It is assumed that pci_reset_done will be called
7615          * after FLR to resume Chip operation.
7616          */
7617         ha->flags.eeh_busy = 1;
7618         mutex_lock(&ha->mq_lock);
7619         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7620                 qpair->online = 0;
7621         mutex_unlock(&ha->mq_lock);
7622
7623         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7624         qla2x00_abort_isp_cleanup(base_vha);
7625         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7626 }
7627
7628 static void
7629 qla_pci_reset_done(struct pci_dev *pdev)
7630 {
7631         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7632         struct qla_hw_data *ha = base_vha->hw;
7633         struct qla_qpair *qpair;
7634
7635         ql_log(ql_log_warn, base_vha, 0xffff,
7636             "%s.\n", __func__);
7637
7638         /*
7639          * FLR just completed by PCI layer. Resume adapter
7640          */
7641         ha->flags.eeh_busy = 0;
7642         mutex_lock(&ha->mq_lock);
7643         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7644                 qpair->online = 1;
7645         mutex_unlock(&ha->mq_lock);
7646
7647         base_vha->flags.online = 1;
7648         ha->isp_ops->abort_isp(base_vha);
7649         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7650 }
7651
7652 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7653 {
7654         int rc;
7655         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7656         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7657
7658         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7659                 rc = blk_mq_map_queues(qmap);
7660         else
7661                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7662         return rc;
7663 }
7664
7665 struct scsi_host_template qla2xxx_driver_template = {
7666         .module                 = THIS_MODULE,
7667         .name                   = QLA2XXX_DRIVER_NAME,
7668         .queuecommand           = qla2xxx_queuecommand,
7669
7670         .eh_timed_out           = fc_eh_timed_out,
7671         .eh_abort_handler       = qla2xxx_eh_abort,
7672         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7673         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7674         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7675         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7676
7677         .slave_configure        = qla2xxx_slave_configure,
7678
7679         .slave_alloc            = qla2xxx_slave_alloc,
7680         .slave_destroy          = qla2xxx_slave_destroy,
7681         .scan_finished          = qla2xxx_scan_finished,
7682         .scan_start             = qla2xxx_scan_start,
7683         .change_queue_depth     = scsi_change_queue_depth,
7684         .map_queues             = qla2xxx_map_queues,
7685         .this_id                = -1,
7686         .cmd_per_lun            = 3,
7687         .sg_tablesize           = SG_ALL,
7688
7689         .max_sectors            = 0xFFFF,
7690         .shost_attrs            = qla2x00_host_attrs,
7691
7692         .supported_mode         = MODE_INITIATOR,
7693         .track_queue_depth      = 1,
7694         .cmd_size               = sizeof(srb_t),
7695 };
7696
7697 static const struct pci_error_handlers qla2xxx_err_handler = {
7698         .error_detected = qla2xxx_pci_error_detected,
7699         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7700         .slot_reset = qla2xxx_pci_slot_reset,
7701         .resume = qla2xxx_pci_resume,
7702         .reset_prepare = qla_pci_reset_prepare,
7703         .reset_done = qla_pci_reset_done,
7704 };
7705
7706 static struct pci_device_id qla2xxx_pci_tbl[] = {
7707         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7708         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7709         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7710         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7711         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7712         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7713         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7714         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7715         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7716         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7717         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7718         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7719         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7720         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7721         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7722         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7723         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7724         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7725         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7726         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7727         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7728         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7729         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7730         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7731         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7732         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7733         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7734         { 0 },
7735 };
7736 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
7737
7738 static struct pci_driver qla2xxx_pci_driver = {
7739         .name           = QLA2XXX_DRIVER_NAME,
7740         .driver         = {
7741                 .owner          = THIS_MODULE,
7742         },
7743         .id_table       = qla2xxx_pci_tbl,
7744         .probe          = qla2x00_probe_one,
7745         .remove         = qla2x00_remove_one,
7746         .shutdown       = qla2x00_shutdown,
7747         .err_handler    = &qla2xxx_err_handler,
7748 };
7749
7750 static const struct file_operations apidev_fops = {
7751         .owner = THIS_MODULE,
7752         .llseek = noop_llseek,
7753 };
7754
7755 /**
7756  * qla2x00_module_init - Module initialization.
7757  **/
7758 static int __init
7759 qla2x00_module_init(void)
7760 {
7761         int ret = 0;
7762
7763         BUILD_BUG_ON(sizeof(cmd_a64_entry_t) != 64);
7764         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
7765         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
7766         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
7767         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
7768         BUILD_BUG_ON(sizeof(mrk_entry_t) != 64);
7769         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
7770         BUILD_BUG_ON(sizeof(request_t) != 64);
7771         BUILD_BUG_ON(sizeof(struct abort_entry_24xx) != 64);
7772         BUILD_BUG_ON(sizeof(struct abort_iocb_entry_fx00) != 64);
7773         BUILD_BUG_ON(sizeof(struct abts_entry_24xx) != 64);
7774         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
7775         BUILD_BUG_ON(sizeof(struct access_chip_rsp_84xx) != 64);
7776         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
7777         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
7778         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
7779         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
7780         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
7781         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
7782         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
7783         BUILD_BUG_ON(sizeof(struct ct_fdmi1_hba_attributes) != 2344);
7784         BUILD_BUG_ON(sizeof(struct ct_fdmi2_hba_attributes) != 4424);
7785         BUILD_BUG_ON(sizeof(struct ct_fdmi2_port_attributes) != 4164);
7786         BUILD_BUG_ON(sizeof(struct ct_fdmi_hba_attr) != 260);
7787         BUILD_BUG_ON(sizeof(struct ct_fdmi_port_attr) != 260);
7788         BUILD_BUG_ON(sizeof(struct ct_rsp_hdr) != 16);
7789         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
7790         BUILD_BUG_ON(sizeof(struct device_reg_24xx) != 256);
7791         BUILD_BUG_ON(sizeof(struct device_reg_25xxmq) != 24);
7792         BUILD_BUG_ON(sizeof(struct device_reg_2xxx) != 256);
7793         BUILD_BUG_ON(sizeof(struct device_reg_82xx) != 1288);
7794         BUILD_BUG_ON(sizeof(struct device_reg_fx00) != 216);
7795         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
7796         BUILD_BUG_ON(sizeof(struct els_sts_entry_24xx) != 64);
7797         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
7798         BUILD_BUG_ON(sizeof(struct imm_ntfy_from_isp) != 64);
7799         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
7800         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
7801         BUILD_BUG_ON(sizeof(struct logio_entry_24xx) != 64);
7802         BUILD_BUG_ON(sizeof(struct mbx_entry) != 64);
7803         BUILD_BUG_ON(sizeof(struct mid_init_cb_24xx) != 5252);
7804         BUILD_BUG_ON(sizeof(struct mrk_entry_24xx) != 64);
7805         BUILD_BUG_ON(sizeof(struct nvram_24xx) != 512);
7806         BUILD_BUG_ON(sizeof(struct nvram_81xx) != 512);
7807         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
7808         BUILD_BUG_ON(sizeof(struct pt_ls4_rx_unsol) != 64);
7809         BUILD_BUG_ON(sizeof(struct purex_entry_24xx) != 64);
7810         BUILD_BUG_ON(sizeof(struct qla2100_fw_dump) != 123634);
7811         BUILD_BUG_ON(sizeof(struct qla2300_fw_dump) != 136100);
7812         BUILD_BUG_ON(sizeof(struct qla24xx_fw_dump) != 37976);
7813         BUILD_BUG_ON(sizeof(struct qla25xx_fw_dump) != 39228);
7814         BUILD_BUG_ON(sizeof(struct qla2xxx_fce_chain) != 52);
7815         BUILD_BUG_ON(sizeof(struct qla2xxx_fw_dump) != 136172);
7816         BUILD_BUG_ON(sizeof(struct qla2xxx_mq_chain) != 524);
7817         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_chain) != 8);
7818         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_header) != 12);
7819         BUILD_BUG_ON(sizeof(struct qla2xxx_offld_chain) != 24);
7820         BUILD_BUG_ON(sizeof(struct qla81xx_fw_dump) != 39420);
7821         BUILD_BUG_ON(sizeof(struct qla82xx_uri_data_desc) != 28);
7822         BUILD_BUG_ON(sizeof(struct qla82xx_uri_table_desc) != 32);
7823         BUILD_BUG_ON(sizeof(struct qla83xx_fw_dump) != 51196);
7824         BUILD_BUG_ON(sizeof(struct qla_fcp_prio_cfg) != FCP_PRIO_CFG_SIZE);
7825         BUILD_BUG_ON(sizeof(struct qla_fdt_layout) != 128);
7826         BUILD_BUG_ON(sizeof(struct qla_flt_header) != 8);
7827         BUILD_BUG_ON(sizeof(struct qla_flt_region) != 16);
7828         BUILD_BUG_ON(sizeof(struct qla_npiv_entry) != 24);
7829         BUILD_BUG_ON(sizeof(struct qla_npiv_header) != 16);
7830         BUILD_BUG_ON(sizeof(struct rdp_rsp_payload) != 336);
7831         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
7832         BUILD_BUG_ON(sizeof(struct sts_entry_24xx) != 64);
7833         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry) != 64);
7834         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry_fx00) != 64);
7835         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
7836         BUILD_BUG_ON(sizeof(struct verify_chip_rsp_84xx) != 52);
7837         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
7838         BUILD_BUG_ON(sizeof(struct vp_config_entry_24xx) != 64);
7839         BUILD_BUG_ON(sizeof(struct vp_ctrl_entry_24xx) != 64);
7840         BUILD_BUG_ON(sizeof(struct vp_rpt_id_entry_24xx) != 64);
7841         BUILD_BUG_ON(sizeof(sts21_entry_t) != 64);
7842         BUILD_BUG_ON(sizeof(sts22_entry_t) != 64);
7843         BUILD_BUG_ON(sizeof(sts_cont_entry_t) != 64);
7844         BUILD_BUG_ON(sizeof(sts_entry_t) != 64);
7845         BUILD_BUG_ON(sizeof(sw_info_t) != 32);
7846         BUILD_BUG_ON(sizeof(target_id_t) != 2);
7847
7848         /* Allocate cache for SRBs. */
7849         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7850             SLAB_HWCACHE_ALIGN, NULL);
7851         if (srb_cachep == NULL) {
7852                 ql_log(ql_log_fatal, NULL, 0x0001,
7853                     "Unable to allocate SRB cache...Failing load!.\n");
7854                 return -ENOMEM;
7855         }
7856
7857         /* Initialize target kmem_cache and mem_pools */
7858         ret = qlt_init();
7859         if (ret < 0) {
7860                 goto destroy_cache;
7861         } else if (ret > 0) {
7862                 /*
7863                  * If initiator mode is explictly disabled by qlt_init(),
7864                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7865                  * performing scsi_scan_target() during LOOP UP event.
7866                  */
7867                 qla2xxx_transport_functions.disable_target_scan = 1;
7868                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7869         }
7870
7871         /* Derive version string. */
7872         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7873         if (ql2xextended_error_logging)
7874                 strcat(qla2x00_version_str, "-debug");
7875         if (ql2xextended_error_logging == 1)
7876                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7877
7878         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7879                 qla_insert_tgt_attrs();
7880
7881         qla2xxx_transport_template =
7882             fc_attach_transport(&qla2xxx_transport_functions);
7883         if (!qla2xxx_transport_template) {
7884                 ql_log(ql_log_fatal, NULL, 0x0002,
7885                     "fc_attach_transport failed...Failing load!.\n");
7886                 ret = -ENODEV;
7887                 goto qlt_exit;
7888         }
7889
7890         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7891         if (apidev_major < 0) {
7892                 ql_log(ql_log_fatal, NULL, 0x0003,
7893                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7894         }
7895
7896         qla2xxx_transport_vport_template =
7897             fc_attach_transport(&qla2xxx_transport_vport_functions);
7898         if (!qla2xxx_transport_vport_template) {
7899                 ql_log(ql_log_fatal, NULL, 0x0004,
7900                     "fc_attach_transport vport failed...Failing load!.\n");
7901                 ret = -ENODEV;
7902                 goto unreg_chrdev;
7903         }
7904         ql_log(ql_log_info, NULL, 0x0005,
7905             "QLogic Fibre Channel HBA Driver: %s.\n",
7906             qla2x00_version_str);
7907         ret = pci_register_driver(&qla2xxx_pci_driver);
7908         if (ret) {
7909                 ql_log(ql_log_fatal, NULL, 0x0006,
7910                     "pci_register_driver failed...ret=%d Failing load!.\n",
7911                     ret);
7912                 goto release_vport_transport;
7913         }
7914         return ret;
7915
7916 release_vport_transport:
7917         fc_release_transport(qla2xxx_transport_vport_template);
7918
7919 unreg_chrdev:
7920         if (apidev_major >= 0)
7921                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7922         fc_release_transport(qla2xxx_transport_template);
7923
7924 qlt_exit:
7925         qlt_exit();
7926
7927 destroy_cache:
7928         kmem_cache_destroy(srb_cachep);
7929         return ret;
7930 }
7931
7932 /**
7933  * qla2x00_module_exit - Module cleanup.
7934  **/
7935 static void __exit
7936 qla2x00_module_exit(void)
7937 {
7938         pci_unregister_driver(&qla2xxx_pci_driver);
7939         qla2x00_release_firmware();
7940         kmem_cache_destroy(ctx_cachep);
7941         fc_release_transport(qla2xxx_transport_vport_template);
7942         if (apidev_major >= 0)
7943                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7944         fc_release_transport(qla2xxx_transport_template);
7945         qlt_exit();
7946         kmem_cache_destroy(srb_cachep);
7947 }
7948
7949 module_init(qla2x00_module_init);
7950 module_exit(qla2x00_module_exit);
7951
7952 MODULE_AUTHOR("QLogic Corporation");
7953 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7954 MODULE_LICENSE("GPL");
7955 MODULE_FIRMWARE(FW_FILE_ISP21XX);
7956 MODULE_FIRMWARE(FW_FILE_ISP22XX);
7957 MODULE_FIRMWARE(FW_FILE_ISP2300);
7958 MODULE_FIRMWARE(FW_FILE_ISP2322);
7959 MODULE_FIRMWARE(FW_FILE_ISP24XX);
7960 MODULE_FIRMWARE(FW_FILE_ISP25XX);