drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 int ql2xfulldump_on_mpifail;
  39 module_param(ql2xfulldump_on_mpifail, int, S_IRUGO | S_IWUSR);
  40 MODULE_PARM_DESC(ql2xfulldump_on_mpifail,
  41                  "Set this to take full dump on MPI hang.");
  42
  43 /*
  44  * CT6 CTX allocation cache
  45  */
  46 static struct kmem_cache *ctx_cachep;
  47 /*
  48  * error level for logging
  49  */
  50 uint ql_errlev = 0x8001;
  51
  52 static int ql2xenableclass2;
  53 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  54 MODULE_PARM_DESC(ql2xenableclass2,
  55                 "Specify if Class 2 operations are supported from the very "
  56                 "beginning. Default is 0 - class 2 not supported.");
  57
  58
  59 int ql2xlogintimeout = 20;
  60 module_param(ql2xlogintimeout, int, S_IRUGO);
  61 MODULE_PARM_DESC(ql2xlogintimeout,
  62                 "Login timeout value in seconds.");
  63
  64 int qlport_down_retry;
  65 module_param(qlport_down_retry, int, S_IRUGO);
  66 MODULE_PARM_DESC(qlport_down_retry,
  67                 "Maximum number of command retries to a port that returns "
  68                 "a PORT-DOWN status.");
  69
  70 int ql2xplogiabsentdevice;
  71 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  72 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  73                 "Option to enable PLOGI to devices that are not present after "
  74                 "a Fabric scan.  This is needed for several broken switches. "
  75                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  76
  77 int ql2xloginretrycount;
  78 module_param(ql2xloginretrycount, int, S_IRUGO);
  79 MODULE_PARM_DESC(ql2xloginretrycount,
  80                 "Specify an alternate value for the NVRAM login retry count.");
  81
  82 int ql2xallocfwdump = 1;
  83 module_param(ql2xallocfwdump, int, S_IRUGO);
  84 MODULE_PARM_DESC(ql2xallocfwdump,
  85                 "Option to enable allocation of memory for a firmware dump "
  86                 "during HBA initialization.  Memory allocation requirements "
  87                 "vary by ISP type.  Default is 1 - allocate memory.");
  88
  89 int ql2xextended_error_logging;
  90 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  91 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  92 MODULE_PARM_DESC(ql2xextended_error_logging,
  93                 "Option to enable extended error logging,\n"
  94                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  95                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  96                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  97                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  98                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  99                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
 100                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
 101                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
 102                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
 103                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
 104                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 105                 "\t\t0x1e400000 - Preferred value for capturing essential "
 106                 "debug information (equivalent to old "
 107                 "ql2xextended_error_logging=1).\n"
 108                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 109
 110 int ql2xshiftctondsd = 6;
 111 module_param(ql2xshiftctondsd, int, S_IRUGO);
 112 MODULE_PARM_DESC(ql2xshiftctondsd,
 113                 "Set to control shifting of command type processing "
 114                 "based on total number of SG elements.");
 115
 116 int ql2xfdmienable = 1;
 117 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 118 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xfdmienable,
 120                 "Enables FDMI registrations. "
 121                 "0 - no FDMI registrations. "
 122                 "1 - provide FDMI registrations (default).");
 123
 124 #define MAX_Q_DEPTH     64
 125 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 126 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 127 MODULE_PARM_DESC(ql2xmaxqdepth,
 128                 "Maximum queue depth to set for each LUN. "
 129                 "Default is 64.");
 130
 131 int ql2xenabledif = 2;
 132 module_param(ql2xenabledif, int, S_IRUGO);
 133 MODULE_PARM_DESC(ql2xenabledif,
 134                 " Enable T10-CRC-DIF:\n"
 135                 " Default is 2.\n"
 136                 "  0 -- No DIF Support\n"
 137                 "  1 -- Enable DIF for all types\n"
 138                 "  2 -- Enable DIF for all types, except Type 0.\n");
 139
 140 #if (IS_ENABLED(CONFIG_NVME_FC))
 141 int ql2xnvmeenable = 1;
 142 #else
 143 int ql2xnvmeenable;
 144 #endif
 145 module_param(ql2xnvmeenable, int, 0644);
 146 MODULE_PARM_DESC(ql2xnvmeenable,
 147     "Enables NVME support. "
 148     "0 - no NVMe.  Default is Y");
 149
 150 int ql2xenablehba_err_chk = 2;
 151 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 152 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 153                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 154                 " Default is 2.\n"
 155                 "  0 -- Error isolation disabled\n"
 156                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 157                 "  2 -- Error isolation enabled for all Types\n");
 158
 159 int ql2xiidmaenable = 1;
 160 module_param(ql2xiidmaenable, int, S_IRUGO);
 161 MODULE_PARM_DESC(ql2xiidmaenable,
 162                 "Enables iIDMA settings "
 163                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 164
 165 int ql2xmqsupport = 1;
 166 module_param(ql2xmqsupport, int, S_IRUGO);
 167 MODULE_PARM_DESC(ql2xmqsupport,
 168                 "Enable on demand multiple queue pairs support "
 169                 "Default is 1 for supported. "
 170                 "Set it to 0 to turn off mq qpair support.");
 171
 172 int ql2xfwloadbin;
 173 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 174 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xfwloadbin,
 176                 "Option to specify location from which to load ISP firmware:.\n"
 177                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 178                 "      interface.\n"
 179                 " 1 -- load firmware from flash.\n"
 180                 " 0 -- use default semantics.\n");
 181
 182 int ql2xetsenable;
 183 module_param(ql2xetsenable, int, S_IRUGO);
 184 MODULE_PARM_DESC(ql2xetsenable,
 185                 "Enables firmware ETS burst."
 186                 "Default is 0 - skip ETS enablement.");
 187
 188 int ql2xdbwr = 1;
 189 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 190 MODULE_PARM_DESC(ql2xdbwr,
 191                 "Option to specify scheme for request queue posting.\n"
 192                 " 0 -- Regular doorbell.\n"
 193                 " 1 -- CAMRAM doorbell (faster).\n");
 194
 195 int ql2xtargetreset = 1;
 196 module_param(ql2xtargetreset, int, S_IRUGO);
 197 MODULE_PARM_DESC(ql2xtargetreset,
 198                  "Enable target reset."
 199                  "Default is 1 - use hw defaults.");
 200
 201 int ql2xgffidenable;
 202 module_param(ql2xgffidenable, int, S_IRUGO);
 203 MODULE_PARM_DESC(ql2xgffidenable,
 204                 "Enables GFF_ID checks of port type. "
 205                 "Default is 0 - Do not use GFF_ID information.");
 206
 207 int ql2xasynctmfenable = 1;
 208 module_param(ql2xasynctmfenable, int, S_IRUGO);
 209 MODULE_PARM_DESC(ql2xasynctmfenable,
 210                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 211                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 212
 213 int ql2xdontresethba;
 214 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 215 MODULE_PARM_DESC(ql2xdontresethba,
 216                 "Option to specify reset behaviour.\n"
 217                 " 0 (Default) -- Reset on failure.\n"
 218                 " 1 -- Do not reset on failure.\n");
 219
 220 uint64_t ql2xmaxlun = MAX_LUNS;
 221 module_param(ql2xmaxlun, ullong, S_IRUGO);
 222 MODULE_PARM_DESC(ql2xmaxlun,
 223                 "Defines the maximum LU number to register with the SCSI "
 224                 "midlayer. Default is 65535.");
 225
 226 int ql2xmdcapmask = 0x1F;
 227 module_param(ql2xmdcapmask, int, S_IRUGO);
 228 MODULE_PARM_DESC(ql2xmdcapmask,
 229                 "Set the Minidump driver capture mask level. "
 230                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 231
 232 int ql2xmdenable = 1;
 233 module_param(ql2xmdenable, int, S_IRUGO);
 234 MODULE_PARM_DESC(ql2xmdenable,
 235                 "Enable/disable MiniDump. "
 236                 "0 - MiniDump disabled. "
 237                 "1 (Default) - MiniDump enabled.");
 238
 239 int ql2xexlogins;
 240 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 241 MODULE_PARM_DESC(ql2xexlogins,
 242                  "Number of extended Logins. "
 243                  "0 (Default)- Disabled.");
 244
 245 int ql2xexchoffld = 1024;
 246 module_param(ql2xexchoffld, uint, 0644);
 247 MODULE_PARM_DESC(ql2xexchoffld,
 248         "Number of target exchanges.");
 249
 250 int ql2xiniexchg = 1024;
 251 module_param(ql2xiniexchg, uint, 0644);
 252 MODULE_PARM_DESC(ql2xiniexchg,
 253         "Number of initiator exchanges.");
 254
 255 int ql2xfwholdabts;
 256 module_param(ql2xfwholdabts, int, S_IRUGO);
 257 MODULE_PARM_DESC(ql2xfwholdabts,
 258                 "Allow FW to hold status IOCB until ABTS rsp received. "
 259                 "0 (Default) Do not set fw option. "
 260                 "1 - Set fw option to hold ABTS.");
 261
 262 int ql2xmvasynctoatio = 1;
 263 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 264 MODULE_PARM_DESC(ql2xmvasynctoatio,
 265                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 266                 "0 (Default). Do not move IOCBs"
 267                 "1 - Move IOCBs.");
 268
 269 int ql2xautodetectsfp = 1;
 270 module_param(ql2xautodetectsfp, int, 0444);
 271 MODULE_PARM_DESC(ql2xautodetectsfp,
 272                  "Detect SFP range and set appropriate distance.\n"
 273                  "1 (Default): Enable\n");
 274
 275 int ql2xenablemsix = 1;
 276 module_param(ql2xenablemsix, int, 0444);
 277 MODULE_PARM_DESC(ql2xenablemsix,
 278                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 279                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 280                  " 0 -- enable traditional pin-based mechanism.\n"
 281                  " 1 -- enable MSI-X interrupt mechanism.\n"
 282                  " 2 -- enable MSI interrupt mechanism.\n");
 283
 284 int qla2xuseresexchforels;
 285 module_param(qla2xuseresexchforels, int, 0444);
 286 MODULE_PARM_DESC(qla2xuseresexchforels,
 287                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 288                  " 0 (default): disabled");
 289
 290 static int ql2xprotmask;
 291 module_param(ql2xprotmask, int, 0644);
 292 MODULE_PARM_DESC(ql2xprotmask,
 293                  "Override DIF/DIX protection capabilities mask\n"
 294                  "Default is 0 which sets protection mask based on "
 295                  "capabilities reported by HBA firmware.\n");
 296
 297 static int ql2xprotguard;
 298 module_param(ql2xprotguard, int, 0644);
 299 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 300                  "  0 -- Let HBA firmware decide\n"
 301                  "  1 -- Force T10 CRC\n"
 302                  "  2 -- Force IP checksum\n");
 303
 304 int ql2xdifbundlinginternalbuffers;
 305 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 306 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 307     "Force using internal buffers for DIF information\n"
 308     "0 (Default). Based on check.\n"
 309     "1 Force using internal buffers\n");
 310
 311 int ql2xsmartsan;
 312 module_param(ql2xsmartsan, int, 0444);
 313 module_param_named(smartsan, ql2xsmartsan, int, 0444);
 314 MODULE_PARM_DESC(ql2xsmartsan,
 315                 "Send SmartSAN Management Attributes for FDMI Registration."
 316                 " Default is 0 - No SmartSAN registration,"
 317                 " 1 - Register SmartSAN Management Attributes.");
 318
 319 int ql2xrdpenable;
 320 module_param(ql2xrdpenable, int, 0444);
 321 module_param_named(rdpenable, ql2xrdpenable, int, 0444);
 322 MODULE_PARM_DESC(ql2xrdpenable,
 323                 "Enables RDP responses. "
 324                 "0 - no RDP responses (default). "
 325                 "1 - provide RDP responses.");
 326
 327 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 328 static void qla2x00_free_device(scsi_qla_host_t *);
 329 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 330 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 331
 332
 333 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 334 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 335
 336 /* TODO Convert to inlines
 337  *
 338  * Timer routines
 339  */
 340
 341 __inline__ void
 342 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 343 {
 344         timer_setup(&vha->timer, qla2x00_timer, 0);
 345         vha->timer.expires = jiffies + interval * HZ;
 346         add_timer(&vha->timer);
 347         vha->timer_active = 1;
 348 }
 349
 350 static inline void
 351 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 352 {
 353         /* Currently used for 82XX only. */
 354         if (vha->device_flags & DFLG_DEV_FAILED) {
 355                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 356                     "Device in a failed state, returning.\n");
 357                 return;
 358         }
 359
 360         mod_timer(&vha->timer, jiffies + interval * HZ);
 361 }
 362
 363 static __inline__ void
 364 qla2x00_stop_timer(scsi_qla_host_t *vha)
 365 {
 366         del_timer_sync(&vha->timer);
 367         vha->timer_active = 0;
 368 }
 369
 370 static int qla2x00_do_dpc(void *data);
 371
 372 static void qla2x00_rst_aen(scsi_qla_host_t *);
 373
 374 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 375         struct req_que **, struct rsp_que **);
 376 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 377 static void qla2x00_mem_free(struct qla_hw_data *);
 378 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 379         struct qla_qpair *qpair);
 380
 381 /* -------------------------------------------------------------------------- */
 382 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 383     struct rsp_que *rsp)
 384 {
 385         struct qla_hw_data *ha = vha->hw;
 386
 387         rsp->qpair = ha->base_qpair;
 388         rsp->req = req;
 389         ha->base_qpair->hw = ha;
 390         ha->base_qpair->req = req;
 391         ha->base_qpair->rsp = rsp;
 392         ha->base_qpair->vha = vha;
 393         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 394         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 395         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 396         ha->base_qpair->srb_mempool = ha->srb_mempool;
 397         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 398         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 399         /* init qpair to this cpu. Will adjust at run time. */
 400         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 401         ha->base_qpair->pdev = ha->pdev;
 402
 403         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 404                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 405 }
 406
 407 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 408                                 struct rsp_que *rsp)
 409 {
 410         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 411
 412         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 413                                 GFP_KERNEL);
 414         if (!ha->req_q_map) {
 415                 ql_log(ql_log_fatal, vha, 0x003b,
 416                     "Unable to allocate memory for request queue ptrs.\n");
 417                 goto fail_req_map;
 418         }
 419
 420         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 421                                 GFP_KERNEL);
 422         if (!ha->rsp_q_map) {
 423                 ql_log(ql_log_fatal, vha, 0x003c,
 424                     "Unable to allocate memory for response queue ptrs.\n");
 425                 goto fail_rsp_map;
 426         }
 427
 428         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 429         if (ha->base_qpair == NULL) {
 430                 ql_log(ql_log_warn, vha, 0x00e0,
 431                     "Failed to allocate base queue pair memory.\n");
 432                 goto fail_base_qpair;
 433         }
 434
 435         qla_init_base_qpair(vha, req, rsp);
 436
 437         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 438                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 439                         GFP_KERNEL);
 440                 if (!ha->queue_pair_map) {
 441                         ql_log(ql_log_fatal, vha, 0x0180,
 442                             "Unable to allocate memory for queue pair ptrs.\n");
 443                         goto fail_qpair_map;
 444                 }
 445         }
 446
 447         /*
 448          * Make sure we record at least the request and response queue zero in
 449          * case we need to free them if part of the probe fails.
 450          */
 451         ha->rsp_q_map[0] = rsp;
 452         ha->req_q_map[0] = req;
 453         set_bit(0, ha->rsp_qid_map);
 454         set_bit(0, ha->req_qid_map);
 455         return 0;
 456
 457 fail_qpair_map:
 458         kfree(ha->base_qpair);
 459         ha->base_qpair = NULL;
 460 fail_base_qpair:
 461         kfree(ha->rsp_q_map);
 462         ha->rsp_q_map = NULL;
 463 fail_rsp_map:
 464         kfree(ha->req_q_map);
 465         ha->req_q_map = NULL;
 466 fail_req_map:
 467         return -ENOMEM;
 468 }
 469
 470 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 471 {
 472         if (IS_QLAFX00(ha)) {
 473                 if (req && req->ring_fx00)
 474                         dma_free_coherent(&ha->pdev->dev,
 475                             (req->length_fx00 + 1) * sizeof(request_t),
 476                             req->ring_fx00, req->dma_fx00);
 477         } else if (req && req->ring)
 478                 dma_free_coherent(&ha->pdev->dev,
 479                 (req->length + 1) * sizeof(request_t),
 480                 req->ring, req->dma);
 481
 482         if (req)
 483                 kfree(req->outstanding_cmds);
 484
 485         kfree(req);
 486 }
 487
 488 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 489 {
 490         if (IS_QLAFX00(ha)) {
 491                 if (rsp && rsp->ring_fx00)
 492                         dma_free_coherent(&ha->pdev->dev,
 493                             (rsp->length_fx00 + 1) * sizeof(request_t),
 494                             rsp->ring_fx00, rsp->dma_fx00);
 495         } else if (rsp && rsp->ring) {
 496                 dma_free_coherent(&ha->pdev->dev,
 497                 (rsp->length + 1) * sizeof(response_t),
 498                 rsp->ring, rsp->dma);
 499         }
 500         kfree(rsp);
 501 }
 502
 503 static void qla2x00_free_queues(struct qla_hw_data *ha)
 504 {
 505         struct req_que *req;
 506         struct rsp_que *rsp;
 507         int cnt;
 508         unsigned long flags;
 509
 510         if (ha->queue_pair_map) {
 511                 kfree(ha->queue_pair_map);
 512                 ha->queue_pair_map = NULL;
 513         }
 514         if (ha->base_qpair) {
 515                 kfree(ha->base_qpair);
 516                 ha->base_qpair = NULL;
 517         }
 518
 519         spin_lock_irqsave(&ha->hardware_lock, flags);
 520         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 521                 if (!test_bit(cnt, ha->req_qid_map))
 522                         continue;
 523
 524                 req = ha->req_q_map[cnt];
 525                 clear_bit(cnt, ha->req_qid_map);
 526                 ha->req_q_map[cnt] = NULL;
 527
 528                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 529                 qla2x00_free_req_que(ha, req);
 530                 spin_lock_irqsave(&ha->hardware_lock, flags);
 531         }
 532         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 533
 534         kfree(ha->req_q_map);
 535         ha->req_q_map = NULL;
 536
 537
 538         spin_lock_irqsave(&ha->hardware_lock, flags);
 539         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 540                 if (!test_bit(cnt, ha->rsp_qid_map))
 541                         continue;
 542
 543                 rsp = ha->rsp_q_map[cnt];
 544                 clear_bit(cnt, ha->rsp_qid_map);
 545                 ha->rsp_q_map[cnt] =  NULL;
 546                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 547                 qla2x00_free_rsp_que(ha, rsp);
 548                 spin_lock_irqsave(&ha->hardware_lock, flags);
 549         }
 550         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 551
 552         kfree(ha->rsp_q_map);
 553         ha->rsp_q_map = NULL;
 554 }
 555
 556 static char *
 557 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 558 {
 559         struct qla_hw_data *ha = vha->hw;
 560         static const char *const pci_bus_modes[] = {
 561                 "33", "66", "100", "133",
 562         };
 563         uint16_t pci_bus;
 564
 565         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 566         if (pci_bus) {
 567                 snprintf(str, str_len, "PCI-X (%s MHz)",
 568                          pci_bus_modes[pci_bus]);
 569         } else {
 570                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 571                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 572         }
 573
 574         return str;
 575 }
 576
 577 static char *
 578 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 579 {
 580         static const char *const pci_bus_modes[] = {
 581                 "33", "66", "100", "133",
 582         };
 583         struct qla_hw_data *ha = vha->hw;
 584         uint32_t pci_bus;
 585
 586         if (pci_is_pcie(ha->pdev)) {
 587                 uint32_t lstat, lspeed, lwidth;
 588                 const char *speed_str;
 589
 590                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 591                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 592                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 593
 594                 switch (lspeed) {
 595                 case 1:
 596                         speed_str = "2.5GT/s";
 597                         break;
 598                 case 2:
 599                         speed_str = "5.0GT/s";
 600                         break;
 601                 case 3:
 602                         speed_str = "8.0GT/s";
 603                         break;
 604                 case 4:
 605                         speed_str = "16.0GT/s";
 606                         break;
 607                 default:
 608                         speed_str = "<unknown>";
 609                         break;
 610                 }
 611                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 612
 613                 return str;
 614         }
 615
 616         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 617         if (pci_bus == 0 || pci_bus == 8)
 618                 snprintf(str, str_len, "PCI (%s MHz)",
 619                          pci_bus_modes[pci_bus >> 3]);
 620         else
 621                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 622                          pci_bus & 4 ? 2 : 1,
 623                          pci_bus_modes[pci_bus & 3]);
 624
 625         return str;
 626 }
 627
 628 static char *
 629 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 630 {
 631         char un_str[10];
 632         struct qla_hw_data *ha = vha->hw;
 633
 634         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 635             ha->fw_minor_version, ha->fw_subminor_version);
 636
 637         if (ha->fw_attributes & BIT_9) {
 638                 strcat(str, "FLX");
 639                 return (str);
 640         }
 641
 642         switch (ha->fw_attributes & 0xFF) {
 643         case 0x7:
 644                 strcat(str, "EF");
 645                 break;
 646         case 0x17:
 647                 strcat(str, "TP");
 648                 break;
 649         case 0x37:
 650                 strcat(str, "IP");
 651                 break;
 652         case 0x77:
 653                 strcat(str, "VI");
 654                 break;
 655         default:
 656                 sprintf(un_str, "(%x)", ha->fw_attributes);
 657                 strcat(str, un_str);
 658                 break;
 659         }
 660         if (ha->fw_attributes & 0x100)
 661                 strcat(str, "X");
 662
 663         return (str);
 664 }
 665
 666 static char *
 667 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 668 {
 669         struct qla_hw_data *ha = vha->hw;
 670
 671         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 672             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 673         return str;
 674 }
 675
 676 void qla2x00_sp_free_dma(srb_t *sp)
 677 {
 678         struct qla_hw_data *ha = sp->vha->hw;
 679         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 680
 681         if (sp->flags & SRB_DMA_VALID) {
 682                 scsi_dma_unmap(cmd);
 683                 sp->flags &= ~SRB_DMA_VALID;
 684         }
 685
 686         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 687                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 688                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 689                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 690         }
 691
 692         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 693                 /* List assured to be having elements */
 694                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 695                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 696         }
 697
 698         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 699                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 700
 701                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 702                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 703         }
 704
 705         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 706                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 707
 708                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 709                     ctx1->fcp_cmnd_dma);
 710                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 711                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 712                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 713                 mempool_free(ctx1, ha->ctx_mempool);
 714         }
 715 }
 716
 717 void qla2x00_sp_compl(srb_t *sp, int res)
 718 {
 719         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 720         struct completion *comp = sp->comp;
 721
 722         sp->free(sp);
 723         cmd->result = res;
 724         CMD_SP(cmd) = NULL;
 725         cmd->scsi_done(cmd);
 726         if (comp)
 727                 complete(comp);
 728 }
 729
 730 void qla2xxx_qpair_sp_free_dma(srb_t *sp)
 731 {
 732         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 733         struct qla_hw_data *ha = sp->fcport->vha->hw;
 734
 735         if (sp->flags & SRB_DMA_VALID) {
 736                 scsi_dma_unmap(cmd);
 737                 sp->flags &= ~SRB_DMA_VALID;
 738         }
 739
 740         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 741                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 742                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 743                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 744         }
 745
 746         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 747                 /* List assured to be having elements */
 748                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 749                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 750         }
 751
 752         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 753                 struct crc_context *difctx = sp->u.scmd.crc_ctx;
 754                 struct dsd_dma *dif_dsd, *nxt_dsd;
 755
 756                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 757                     &difctx->ldif_dma_hndl_list, list) {
 758                         list_del(&dif_dsd->list);
 759                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 760                             dif_dsd->dsd_list_dma);
 761                         kfree(dif_dsd);
 762                         difctx->no_dif_bundl--;
 763                 }
 764
 765                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 766                     &difctx->ldif_dsd_list, list) {
 767                         list_del(&dif_dsd->list);
 768                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 769                             dif_dsd->dsd_list_dma);
 770                         kfree(dif_dsd);
 771                         difctx->no_ldif_dsd--;
 772                 }
 773
 774                 if (difctx->no_ldif_dsd) {
 775                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 776                             "%s: difctx->no_ldif_dsd=%x\n",
 777                             __func__, difctx->no_ldif_dsd);
 778                 }
 779
 780                 if (difctx->no_dif_bundl) {
 781                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 782                             "%s: difctx->no_dif_bundl=%x\n",
 783                             __func__, difctx->no_dif_bundl);
 784                 }
 785                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 786         }
 787
 788         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 789                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 790
 791                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 792                     ctx1->fcp_cmnd_dma);
 793                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 794                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 795                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 796                 mempool_free(ctx1, ha->ctx_mempool);
 797                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 798         }
 799
 800         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 801                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 802
 803                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 804                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 805         }
 806 }
 807
 808 void qla2xxx_qpair_sp_compl(srb_t *sp, int res)
 809 {
 810         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 811         struct completion *comp = sp->comp;
 812
 813         sp->free(sp);
 814         cmd->result = res;
 815         CMD_SP(cmd) = NULL;
 816         cmd->scsi_done(cmd);
 817         if (comp)
 818                 complete(comp);
 819 }
 820
 821 static int
 822 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 823 {
 824         scsi_qla_host_t *vha = shost_priv(host);
 825         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 826         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 827         struct qla_hw_data *ha = vha->hw;
 828         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 829         srb_t *sp;
 830         int rval;
 831
 832         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 833             WARN_ON_ONCE(!rport)) {
 834                 cmd->result = DID_NO_CONNECT << 16;
 835                 goto qc24_fail_command;
 836         }
 837
 838         if (ha->mqenable) {
 839                 uint32_t tag;
 840                 uint16_t hwq;
 841                 struct qla_qpair *qpair = NULL;
 842
 843                 tag = blk_mq_unique_tag(cmd->request);
 844                 hwq = blk_mq_unique_tag_to_hwq(tag);
 845                 qpair = ha->queue_pair_map[hwq];
 846
 847                 if (qpair)
 848                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 849         }
 850
 851         if (ha->flags.eeh_busy) {
 852                 if (ha->flags.pci_channel_io_perm_failure) {
 853                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 854                             "PCI Channel IO permanent failure, exiting "
 855                             "cmd=%p.\n", cmd);
 856                         cmd->result = DID_NO_CONNECT << 16;
 857                 } else {
 858                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 859                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 860                         cmd->result = DID_REQUEUE << 16;
 861                 }
 862                 goto qc24_fail_command;
 863         }
 864
 865         rval = fc_remote_port_chkready(rport);
 866         if (rval) {
 867                 cmd->result = rval;
 868                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 869                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 870                     cmd, rval);
 871                 goto qc24_fail_command;
 872         }
 873
 874         if (!vha->flags.difdix_supported &&
 875                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 876                         ql_dbg(ql_dbg_io, vha, 0x3004,
 877                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 878                             cmd);
 879                         cmd->result = DID_NO_CONNECT << 16;
 880                         goto qc24_fail_command;
 881         }
 882
 883         if (!fcport) {
 884                 cmd->result = DID_NO_CONNECT << 16;
 885                 goto qc24_fail_command;
 886         }
 887
 888         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 889                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 890                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 891                         ql_dbg(ql_dbg_io, vha, 0x3005,
 892                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 893                             atomic_read(&fcport->state),
 894                             atomic_read(&base_vha->loop_state));
 895                         cmd->result = DID_NO_CONNECT << 16;
 896                         goto qc24_fail_command;
 897                 }
 898                 goto qc24_target_busy;
 899         }
 900
 901         /*
 902          * Return target busy if we've received a non-zero retry_delay_timer
 903          * in a FCP_RSP.
 904          */
 905         if (fcport->retry_delay_timestamp == 0) {
 906                 /* retry delay not set */
 907         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 908                 fcport->retry_delay_timestamp = 0;
 909         else
 910                 goto qc24_target_busy;
 911
 912         sp = scsi_cmd_priv(cmd);
 913         qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport);
 914
 915         sp->u.scmd.cmd = cmd;
 916         sp->type = SRB_SCSI_CMD;
 917
 918         CMD_SP(cmd) = (void *)sp;
 919         sp->free = qla2x00_sp_free_dma;
 920         sp->done = qla2x00_sp_compl;
 921
 922         rval = ha->isp_ops->start_scsi(sp);
 923         if (rval != QLA_SUCCESS) {
 924                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 925                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 926                 goto qc24_host_busy_free_sp;
 927         }
 928
 929         return 0;
 930
 931 qc24_host_busy_free_sp:
 932         sp->free(sp);
 933
 934 qc24_target_busy:
 935         return SCSI_MLQUEUE_TARGET_BUSY;
 936
 937 qc24_fail_command:
 938         cmd->scsi_done(cmd);
 939
 940         return 0;
 941 }
 942
 943 /* For MQ supported I/O */
 944 int
 945 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 946     struct qla_qpair *qpair)
 947 {
 948         scsi_qla_host_t *vha = shost_priv(host);
 949         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 950         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 951         struct qla_hw_data *ha = vha->hw;
 952         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 953         srb_t *sp;
 954         int rval;
 955
 956         rval = rport ? fc_remote_port_chkready(rport) : FC_PORTSTATE_OFFLINE;
 957         if (rval) {
 958                 cmd->result = rval;
 959                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 960                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 961                     cmd, rval);
 962                 goto qc24_fail_command;
 963         }
 964
 965         if (!fcport) {
 966                 cmd->result = DID_NO_CONNECT << 16;
 967                 goto qc24_fail_command;
 968         }
 969
 970         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 971                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 972                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 973                         ql_dbg(ql_dbg_io, vha, 0x3077,
 974                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 975                             atomic_read(&fcport->state),
 976                             atomic_read(&base_vha->loop_state));
 977                         cmd->result = DID_NO_CONNECT << 16;
 978                         goto qc24_fail_command;
 979                 }
 980                 goto qc24_target_busy;
 981         }
 982
 983         /*
 984          * Return target busy if we've received a non-zero retry_delay_timer
 985          * in a FCP_RSP.
 986          */
 987         if (fcport->retry_delay_timestamp == 0) {
 988                 /* retry delay not set */
 989         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 990                 fcport->retry_delay_timestamp = 0;
 991         else
 992                 goto qc24_target_busy;
 993
 994         sp = scsi_cmd_priv(cmd);
 995         qla2xxx_init_sp(sp, vha, qpair, fcport);
 996
 997         sp->u.scmd.cmd = cmd;
 998         sp->type = SRB_SCSI_CMD;
 999         CMD_SP(cmd) = (void *)sp;
1000         sp->free = qla2xxx_qpair_sp_free_dma;
1001         sp->done = qla2xxx_qpair_sp_compl;
1002
1003         rval = ha->isp_ops->start_scsi_mq(sp);
1004         if (rval != QLA_SUCCESS) {
1005                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1006                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1007                 if (rval == QLA_INTERFACE_ERROR)
1008                         goto qc24_free_sp_fail_command;
1009                 goto qc24_host_busy_free_sp;
1010         }
1011
1012         return 0;
1013
1014 qc24_host_busy_free_sp:
1015         sp->free(sp);
1016
1017 qc24_target_busy:
1018         return SCSI_MLQUEUE_TARGET_BUSY;
1019
1020 qc24_free_sp_fail_command:
1021         sp->free(sp);
1022         CMD_SP(cmd) = NULL;
1023         qla2xxx_rel_qpair_sp(sp->qpair, sp);
1024
1025 qc24_fail_command:
1026         cmd->scsi_done(cmd);
1027
1028         return 0;
1029 }
1030
1031 /*
1032  * qla2x00_eh_wait_on_command
1033  *    Waits for the command to be returned by the Firmware for some
1034  *    max time.
1035  *
1036  * Input:
1037  *    cmd = Scsi Command to wait on.
1038  *
1039  * Return:
1040  *    Completed in time : QLA_SUCCESS
1041  *    Did not complete in time : QLA_FUNCTION_FAILED
1042  */
1043 static int
1044 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1045 {
1046 #define ABORT_POLLING_PERIOD    1000
1047 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1048         unsigned long wait_iter = ABORT_WAIT_ITER;
1049         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1050         struct qla_hw_data *ha = vha->hw;
1051         int ret = QLA_SUCCESS;
1052
1053         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1054                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1055                     "Return:eh_wait.\n");
1056                 return ret;
1057         }
1058
1059         while (CMD_SP(cmd) && wait_iter--) {
1060                 msleep(ABORT_POLLING_PERIOD);
1061         }
1062         if (CMD_SP(cmd))
1063                 ret = QLA_FUNCTION_FAILED;
1064
1065         return ret;
1066 }
1067
1068 /*
1069  * qla2x00_wait_for_hba_online
1070  *    Wait till the HBA is online after going through
1071  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1072  *    finally HBA is disabled ie marked offline
1073  *
1074  * Input:
1075  *     ha - pointer to host adapter structure
1076  *
1077  * Note:
1078  *    Does context switching-Release SPIN_LOCK
1079  *    (if any) before calling this routine.
1080  *
1081  * Return:
1082  *    Success (Adapter is online) : 0
1083  *    Failed  (Adapter is offline/disabled) : 1
1084  */
1085 int
1086 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1087 {
1088         int             return_status;
1089         unsigned long   wait_online;
1090         struct qla_hw_data *ha = vha->hw;
1091         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1092
1093         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1094         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1095             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1096             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1097             ha->dpc_active) && time_before(jiffies, wait_online)) {
1098
1099                 msleep(1000);
1100         }
1101         if (base_vha->flags.online)
1102                 return_status = QLA_SUCCESS;
1103         else
1104                 return_status = QLA_FUNCTION_FAILED;
1105
1106         return (return_status);
1107 }
1108
1109 static inline int test_fcport_count(scsi_qla_host_t *vha)
1110 {
1111         struct qla_hw_data *ha = vha->hw;
1112         unsigned long flags;
1113         int res;
1114
1115         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1116         ql_dbg(ql_dbg_init, vha, 0x00ec,
1117             "tgt %p, fcport_count=%d\n",
1118             vha, vha->fcport_count);
1119         res = (vha->fcport_count == 0);
1120         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1121
1122         return res;
1123 }
1124
1125 /*
1126  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1127  * it has dependency on UNLOADING flag to stop device discovery
1128  */
1129 void
1130 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1131 {
1132         u8 i;
1133
1134         qla2x00_mark_all_devices_lost(vha);
1135
1136         for (i = 0; i < 10; i++) {
1137                 if (wait_event_timeout(vha->fcport_waitQ,
1138                     test_fcport_count(vha), HZ) > 0)
1139                         break;
1140         }
1141
1142         flush_workqueue(vha->hw->wq);
1143 }
1144
1145 /*
1146  * qla2x00_wait_for_hba_ready
1147  * Wait till the HBA is ready before doing driver unload
1148  *
1149  * Input:
1150  *     ha - pointer to host adapter structure
1151  *
1152  * Note:
1153  *    Does context switching-Release SPIN_LOCK
1154  *    (if any) before calling this routine.
1155  *
1156  */
1157 static void
1158 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1159 {
1160         struct qla_hw_data *ha = vha->hw;
1161         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1162
1163         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1164                 ha->flags.mbox_busy) ||
1165                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1166                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1167                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1168                         break;
1169                 msleep(1000);
1170         }
1171 }
1172
1173 int
1174 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1175 {
1176         int             return_status;
1177         unsigned long   wait_reset;
1178         struct qla_hw_data *ha = vha->hw;
1179         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1180
1181         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1182         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1183             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1184             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1185             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1186
1187                 msleep(1000);
1188
1189                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1190                     ha->flags.chip_reset_done)
1191                         break;
1192         }
1193         if (ha->flags.chip_reset_done)
1194                 return_status = QLA_SUCCESS;
1195         else
1196                 return_status = QLA_FUNCTION_FAILED;
1197
1198         return return_status;
1199 }
1200
1201 #define ISP_REG_DISCONNECT 0xffffffffU
1202 /**************************************************************************
1203 * qla2x00_isp_reg_stat
1204 *
1205 * Description:
1206 *       Read the host status register of ISP before aborting the command.
1207 *
1208 * Input:
1209 *       ha = pointer to host adapter structure.
1210 *
1211 *
1212 * Returns:
1213 *       Either true or false.
1214 *
1215 * Note: Return true if there is register disconnect.
1216 **************************************************************************/
1217 static inline
1218 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1219 {
1220         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1221         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1222
1223         if (IS_P3P_TYPE(ha))
1224                 return ((rd_reg_dword(&reg82->host_int)) == ISP_REG_DISCONNECT);
1225         else
1226                 return ((rd_reg_dword(&reg->host_status)) ==
1227                         ISP_REG_DISCONNECT);
1228 }
1229
1230 /**************************************************************************
1231 * qla2xxx_eh_abort
1232 *
1233 * Description:
1234 *    The abort function will abort the specified command.
1235 *
1236 * Input:
1237 *    cmd = Linux SCSI command packet to be aborted.
1238 *
1239 * Returns:
1240 *    Either SUCCESS or FAILED.
1241 *
1242 * Note:
1243 *    Only return FAILED if command not returned by firmware.
1244 **************************************************************************/
1245 static int
1246 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1247 {
1248         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1249         DECLARE_COMPLETION_ONSTACK(comp);
1250         srb_t *sp;
1251         int ret;
1252         unsigned int id;
1253         uint64_t lun;
1254         int rval;
1255         struct qla_hw_data *ha = vha->hw;
1256         uint32_t ratov_j;
1257         struct qla_qpair *qpair;
1258         unsigned long flags;
1259
1260         if (qla2x00_isp_reg_stat(ha)) {
1261                 ql_log(ql_log_info, vha, 0x8042,
1262                     "PCI/Register disconnect, exiting.\n");
1263                 return FAILED;
1264         }
1265
1266         ret = fc_block_scsi_eh(cmd);
1267         if (ret != 0)
1268                 return ret;
1269
1270         sp = scsi_cmd_priv(cmd);
1271         qpair = sp->qpair;
1272
1273         if ((sp->fcport && sp->fcport->deleted) || !qpair)
1274                 return SUCCESS;
1275
1276         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1277         sp->comp = &comp;
1278         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1279
1280
1281         id = cmd->device->id;
1282         lun = cmd->device->lun;
1283
1284         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1285             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1286             vha->host_no, id, lun, sp, cmd, sp->handle);
1287
1288         /*
1289          * Abort will release the original Command/sp from FW. Let the
1290          * original command call scsi_done. In return, he will wakeup
1291          * this sleeping thread.
1292          */
1293         rval = ha->isp_ops->abort_command(sp);
1294
1295         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1296                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1297
1298         /* Wait for the command completion. */
1299         ratov_j = ha->r_a_tov/10 * 4 * 1000;
1300         ratov_j = msecs_to_jiffies(ratov_j);
1301         switch (rval) {
1302         case QLA_SUCCESS:
1303                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1304                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1305                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1306                             __func__, ha->r_a_tov/10);
1307                         ret = FAILED;
1308                 } else {
1309                         ret = SUCCESS;
1310                 }
1311                 break;
1312         default:
1313                 ret = FAILED;
1314                 break;
1315         }
1316
1317         sp->comp = NULL;
1318
1319         ql_log(ql_log_info, vha, 0x801c,
1320             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1321             vha->host_no, id, lun, ret);
1322
1323         return ret;
1324 }
1325
1326 /*
1327  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1328  */
1329 int
1330 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1331         uint64_t l, enum nexus_wait_type type)
1332 {
1333         int cnt, match, status;
1334         unsigned long flags;
1335         struct qla_hw_data *ha = vha->hw;
1336         struct req_que *req;
1337         srb_t *sp;
1338         struct scsi_cmnd *cmd;
1339
1340         status = QLA_SUCCESS;
1341
1342         spin_lock_irqsave(&ha->hardware_lock, flags);
1343         req = vha->req;
1344         for (cnt = 1; status == QLA_SUCCESS &&
1345                 cnt < req->num_outstanding_cmds; cnt++) {
1346                 sp = req->outstanding_cmds[cnt];
1347                 if (!sp)
1348                         continue;
1349                 if (sp->type != SRB_SCSI_CMD)
1350                         continue;
1351                 if (vha->vp_idx != sp->vha->vp_idx)
1352                         continue;
1353                 match = 0;
1354                 cmd = GET_CMD_SP(sp);
1355                 switch (type) {
1356                 case WAIT_HOST:
1357                         match = 1;
1358                         break;
1359                 case WAIT_TARGET:
1360                         match = cmd->device->id == t;
1361                         break;
1362                 case WAIT_LUN:
1363                         match = (cmd->device->id == t &&
1364                                 cmd->device->lun == l);
1365                         break;
1366                 }
1367                 if (!match)
1368                         continue;
1369
1370                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1371                 status = qla2x00_eh_wait_on_command(cmd);
1372                 spin_lock_irqsave(&ha->hardware_lock, flags);
1373         }
1374         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1375
1376         return status;
1377 }
1378
1379 static char *reset_errors[] = {
1380         "HBA not online",
1381         "HBA not ready",
1382         "Task management failed",
1383         "Waiting for command completions",
1384 };
1385
1386 static int
1387 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1388     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1389 {
1390         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1391         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1392         int err;
1393
1394         if (!fcport) {
1395                 return FAILED;
1396         }
1397
1398         err = fc_block_scsi_eh(cmd);
1399         if (err != 0)
1400                 return err;
1401
1402         if (fcport->deleted)
1403                 return SUCCESS;
1404
1405         ql_log(ql_log_info, vha, 0x8009,
1406             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1407             cmd->device->id, cmd->device->lun, cmd);
1408
1409         err = 0;
1410         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1411                 ql_log(ql_log_warn, vha, 0x800a,
1412                     "Wait for hba online failed for cmd=%p.\n", cmd);
1413                 goto eh_reset_failed;
1414         }
1415         err = 2;
1416         if (do_reset(fcport, cmd->device->lun, 1)
1417                 != QLA_SUCCESS) {
1418                 ql_log(ql_log_warn, vha, 0x800c,
1419                     "do_reset failed for cmd=%p.\n", cmd);
1420                 goto eh_reset_failed;
1421         }
1422         err = 3;
1423         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1424             cmd->device->lun, type) != QLA_SUCCESS) {
1425                 ql_log(ql_log_warn, vha, 0x800d,
1426                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1427                 goto eh_reset_failed;
1428         }
1429
1430         ql_log(ql_log_info, vha, 0x800e,
1431             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1432             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1433
1434         return SUCCESS;
1435
1436 eh_reset_failed:
1437         ql_log(ql_log_info, vha, 0x800f,
1438             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1439             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1440             cmd);
1441         return FAILED;
1442 }
1443
1444 static int
1445 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1446 {
1447         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1448         struct qla_hw_data *ha = vha->hw;
1449
1450         if (qla2x00_isp_reg_stat(ha)) {
1451                 ql_log(ql_log_info, vha, 0x803e,
1452                     "PCI/Register disconnect, exiting.\n");
1453                 return FAILED;
1454         }
1455
1456         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1457             ha->isp_ops->lun_reset);
1458 }
1459
1460 static int
1461 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1462 {
1463         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1464         struct qla_hw_data *ha = vha->hw;
1465
1466         if (qla2x00_isp_reg_stat(ha)) {
1467                 ql_log(ql_log_info, vha, 0x803f,
1468                     "PCI/Register disconnect, exiting.\n");
1469                 return FAILED;
1470         }
1471
1472         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1473             ha->isp_ops->target_reset);
1474 }
1475
1476 /**************************************************************************
1477 * qla2xxx_eh_bus_reset
1478 *
1479 * Description:
1480 *    The bus reset function will reset the bus and abort any executing
1481 *    commands.
1482 *
1483 * Input:
1484 *    cmd = Linux SCSI command packet of the command that cause the
1485 *          bus reset.
1486 *
1487 * Returns:
1488 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1489 *
1490 **************************************************************************/
1491 static int
1492 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1493 {
1494         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1495         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1496         int ret = FAILED;
1497         unsigned int id;
1498         uint64_t lun;
1499         struct qla_hw_data *ha = vha->hw;
1500
1501         if (qla2x00_isp_reg_stat(ha)) {
1502                 ql_log(ql_log_info, vha, 0x8040,
1503                     "PCI/Register disconnect, exiting.\n");
1504                 return FAILED;
1505         }
1506
1507         id = cmd->device->id;
1508         lun = cmd->device->lun;
1509
1510         if (!fcport) {
1511                 return ret;
1512         }
1513
1514         ret = fc_block_scsi_eh(cmd);
1515         if (ret != 0)
1516                 return ret;
1517         ret = FAILED;
1518
1519         if (qla2x00_chip_is_down(vha))
1520                 return ret;
1521
1522         ql_log(ql_log_info, vha, 0x8012,
1523             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1524
1525         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1526                 ql_log(ql_log_fatal, vha, 0x8013,
1527                     "Wait for hba online failed board disabled.\n");
1528                 goto eh_bus_reset_done;
1529         }
1530
1531         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1532                 ret = SUCCESS;
1533
1534         if (ret == FAILED)
1535                 goto eh_bus_reset_done;
1536
1537         /* Flush outstanding commands. */
1538         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1539             QLA_SUCCESS) {
1540                 ql_log(ql_log_warn, vha, 0x8014,
1541                     "Wait for pending commands failed.\n");
1542                 ret = FAILED;
1543         }
1544
1545 eh_bus_reset_done:
1546         ql_log(ql_log_warn, vha, 0x802b,
1547             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1548             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1549
1550         return ret;
1551 }
1552
1553 /**************************************************************************
1554 * qla2xxx_eh_host_reset
1555 *
1556 * Description:
1557 *    The reset function will reset the Adapter.
1558 *
1559 * Input:
1560 *      cmd = Linux SCSI command packet of the command that cause the
1561 *            adapter reset.
1562 *
1563 * Returns:
1564 *      Either SUCCESS or FAILED.
1565 *
1566 * Note:
1567 **************************************************************************/
1568 static int
1569 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1570 {
1571         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1572         struct qla_hw_data *ha = vha->hw;
1573         int ret = FAILED;
1574         unsigned int id;
1575         uint64_t lun;
1576         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1577
1578         if (qla2x00_isp_reg_stat(ha)) {
1579                 ql_log(ql_log_info, vha, 0x8041,
1580                     "PCI/Register disconnect, exiting.\n");
1581                 schedule_work(&ha->board_disable);
1582                 return SUCCESS;
1583         }
1584
1585         id = cmd->device->id;
1586         lun = cmd->device->lun;
1587
1588         ql_log(ql_log_info, vha, 0x8018,
1589             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1590
1591         /*
1592          * No point in issuing another reset if one is active.  Also do not
1593          * attempt a reset if we are updating flash.
1594          */
1595         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1596                 goto eh_host_reset_lock;
1597
1598         if (vha != base_vha) {
1599                 if (qla2x00_vp_abort_isp(vha))
1600                         goto eh_host_reset_lock;
1601         } else {
1602                 if (IS_P3P_TYPE(vha->hw)) {
1603                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1604                                 /* Ctx reset success */
1605                                 ret = SUCCESS;
1606                                 goto eh_host_reset_lock;
1607                         }
1608                         /* fall thru if ctx reset failed */
1609                 }
1610                 if (ha->wq)
1611                         flush_workqueue(ha->wq);
1612
1613                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1614                 if (ha->isp_ops->abort_isp(base_vha)) {
1615                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1616                         /* failed. schedule dpc to try */
1617                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1618
1619                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1620                                 ql_log(ql_log_warn, vha, 0x802a,
1621                                     "wait for hba online failed.\n");
1622                                 goto eh_host_reset_lock;
1623                         }
1624                 }
1625                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1626         }
1627
1628         /* Waiting for command to be returned to OS.*/
1629         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1630                 QLA_SUCCESS)
1631                 ret = SUCCESS;
1632
1633 eh_host_reset_lock:
1634         ql_log(ql_log_info, vha, 0x8017,
1635             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1636             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1637
1638         return ret;
1639 }
1640
1641 /*
1642 * qla2x00_loop_reset
1643 *      Issue loop reset.
1644 *
1645 * Input:
1646 *      ha = adapter block pointer.
1647 *
1648 * Returns:
1649 *      0 = success
1650 */
1651 int
1652 qla2x00_loop_reset(scsi_qla_host_t *vha)
1653 {
1654         int ret;
1655         struct fc_port *fcport;
1656         struct qla_hw_data *ha = vha->hw;
1657
1658         if (IS_QLAFX00(ha)) {
1659                 return qlafx00_loop_reset(vha);
1660         }
1661
1662         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1663                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1664                         if (fcport->port_type != FCT_TARGET)
1665                                 continue;
1666
1667                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1668                         if (ret != QLA_SUCCESS) {
1669                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1670                                     "Bus Reset failed: Reset=%d "
1671                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1672                         }
1673                 }
1674         }
1675
1676
1677         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1678                 atomic_set(&vha->loop_state, LOOP_DOWN);
1679                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1680                 qla2x00_mark_all_devices_lost(vha);
1681                 ret = qla2x00_full_login_lip(vha);
1682                 if (ret != QLA_SUCCESS) {
1683                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1684                             "full_login_lip=%d.\n", ret);
1685                 }
1686         }
1687
1688         if (ha->flags.enable_lip_reset) {
1689                 ret = qla2x00_lip_reset(vha);
1690                 if (ret != QLA_SUCCESS)
1691                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1692                             "lip_reset failed (%d).\n", ret);
1693         }
1694
1695         /* Issue marker command only when we are going to start the I/O */
1696         vha->marker_needed = 1;
1697
1698         return QLA_SUCCESS;
1699 }
1700
1701 /*
1702  * The caller must ensure that no completion interrupts will happen
1703  * while this function is in progress.
1704  */
1705 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1706                               unsigned long *flags)
1707         __releases(qp->qp_lock_ptr)
1708         __acquires(qp->qp_lock_ptr)
1709 {
1710         DECLARE_COMPLETION_ONSTACK(comp);
1711         scsi_qla_host_t *vha = qp->vha;
1712         struct qla_hw_data *ha = vha->hw;
1713         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1714         int rval;
1715         bool ret_cmd;
1716         uint32_t ratov_j;
1717
1718         lockdep_assert_held(qp->qp_lock_ptr);
1719
1720         if (qla2x00_chip_is_down(vha)) {
1721                 sp->done(sp, res);
1722                 return;
1723         }
1724
1725         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1726             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1727              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1728              !qla2x00_isp_reg_stat(ha))) {
1729                 if (sp->comp) {
1730                         sp->done(sp, res);
1731                         return;
1732                 }
1733
1734                 sp->comp = &comp;
1735                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1736
1737                 rval = ha->isp_ops->abort_command(sp);
1738                 /* Wait for command completion. */
1739                 ret_cmd = false;
1740                 ratov_j = ha->r_a_tov/10 * 4 * 1000;
1741                 ratov_j = msecs_to_jiffies(ratov_j);
1742                 switch (rval) {
1743                 case QLA_SUCCESS:
1744                         if (wait_for_completion_timeout(&comp, ratov_j)) {
1745                                 ql_dbg(ql_dbg_taskm, vha, 0xffff,
1746                                     "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1747                                     __func__, ha->r_a_tov/10);
1748                                 ret_cmd = true;
1749                         }
1750                         /* else FW return SP to driver */
1751                         break;
1752                 default:
1753                         ret_cmd = true;
1754                         break;
1755                 }
1756
1757                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1758                 if (ret_cmd && blk_mq_request_started(cmd->request))
1759                         sp->done(sp, res);
1760         } else {
1761                 sp->done(sp, res);
1762         }
1763 }
1764
1765 /*
1766  * The caller must ensure that no completion interrupts will happen
1767  * while this function is in progress.
1768  */
1769 static void
1770 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1771 {
1772         int cnt;
1773         unsigned long flags;
1774         srb_t *sp;
1775         scsi_qla_host_t *vha = qp->vha;
1776         struct qla_hw_data *ha = vha->hw;
1777         struct req_que *req;
1778         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1779         struct qla_tgt_cmd *cmd;
1780
1781         if (!ha->req_q_map)
1782                 return;
1783         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1784         req = qp->req;
1785         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1786                 sp = req->outstanding_cmds[cnt];
1787                 if (sp) {
1788                         switch (sp->cmd_type) {
1789                         case TYPE_SRB:
1790                                 qla2x00_abort_srb(qp, sp, res, &flags);
1791                                 break;
1792                         case TYPE_TGT_CMD:
1793                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1794                                     qla_ini_mode_enabled(vha)) {
1795                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1796                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1797                                             vha->dpc_flags);
1798                                         continue;
1799                                 }
1800                                 cmd = (struct qla_tgt_cmd *)sp;
1801                                 cmd->aborted = 1;
1802                                 break;
1803                         case TYPE_TGT_TMCMD:
1804                                 /* Skip task management functions. */
1805                                 break;
1806                         default:
1807                                 break;
1808                         }
1809                         req->outstanding_cmds[cnt] = NULL;
1810                 }
1811         }
1812         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1813 }
1814
1815 /*
1816  * The caller must ensure that no completion interrupts will happen
1817  * while this function is in progress.
1818  */
1819 void
1820 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1821 {
1822         int que;
1823         struct qla_hw_data *ha = vha->hw;
1824
1825         /* Continue only if initialization complete. */
1826         if (!ha->base_qpair)
1827                 return;
1828         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1829
1830         if (!ha->queue_pair_map)
1831                 return;
1832         for (que = 0; que < ha->max_qpairs; que++) {
1833                 if (!ha->queue_pair_map[que])
1834                         continue;
1835
1836                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1837         }
1838 }
1839
1840 static int
1841 qla2xxx_slave_alloc(struct scsi_device *sdev)
1842 {
1843         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1844
1845         if (!rport || fc_remote_port_chkready(rport))
1846                 return -ENXIO;
1847
1848         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1849
1850         return 0;
1851 }
1852
1853 static int
1854 qla2xxx_slave_configure(struct scsi_device *sdev)
1855 {
1856         scsi_qla_host_t *vha = shost_priv(sdev->host);
1857         struct req_que *req = vha->req;
1858
1859         if (IS_T10_PI_CAPABLE(vha->hw))
1860                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1861
1862         scsi_change_queue_depth(sdev, req->max_q_depth);
1863         return 0;
1864 }
1865
1866 static void
1867 qla2xxx_slave_destroy(struct scsi_device *sdev)
1868 {
1869         sdev->hostdata = NULL;
1870 }
1871
1872 /**
1873  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1874  * @ha: HA context
1875  *
1876  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1877  * supported addressing method.
1878  */
1879 static void
1880 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1881 {
1882         /* Assume a 32bit DMA mask. */
1883         ha->flags.enable_64bit_addressing = 0;
1884
1885         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1886                 /* Any upper-dword bits set? */
1887                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1888                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1889                         /* Ok, a 64bit DMA mask is applicable. */
1890                         ha->flags.enable_64bit_addressing = 1;
1891                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1892                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1893                         return;
1894                 }
1895         }
1896
1897         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1898         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1899 }
1900
1901 static void
1902 qla2x00_enable_intrs(struct qla_hw_data *ha)
1903 {
1904         unsigned long flags = 0;
1905         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1906
1907         spin_lock_irqsave(&ha->hardware_lock, flags);
1908         ha->interrupts_on = 1;
1909         /* enable risc and host interrupts */
1910         wrt_reg_word(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1911         rd_reg_word(&reg->ictrl);
1912         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1913
1914 }
1915
1916 static void
1917 qla2x00_disable_intrs(struct qla_hw_data *ha)
1918 {
1919         unsigned long flags = 0;
1920         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1921
1922         spin_lock_irqsave(&ha->hardware_lock, flags);
1923         ha->interrupts_on = 0;
1924         /* disable risc and host interrupts */
1925         wrt_reg_word(&reg->ictrl, 0);
1926         rd_reg_word(&reg->ictrl);
1927         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1928 }
1929
1930 static void
1931 qla24xx_enable_intrs(struct qla_hw_data *ha)
1932 {
1933         unsigned long flags = 0;
1934         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1935
1936         spin_lock_irqsave(&ha->hardware_lock, flags);
1937         ha->interrupts_on = 1;
1938         wrt_reg_dword(&reg->ictrl, ICRX_EN_RISC_INT);
1939         rd_reg_dword(&reg->ictrl);
1940         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1941 }
1942
1943 static void
1944 qla24xx_disable_intrs(struct qla_hw_data *ha)
1945 {
1946         unsigned long flags = 0;
1947         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1948
1949         if (IS_NOPOLLING_TYPE(ha))
1950                 return;
1951         spin_lock_irqsave(&ha->hardware_lock, flags);
1952         ha->interrupts_on = 0;
1953         wrt_reg_dword(&reg->ictrl, 0);
1954         rd_reg_dword(&reg->ictrl);
1955         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1956 }
1957
1958 static int
1959 qla2x00_iospace_config(struct qla_hw_data *ha)
1960 {
1961         resource_size_t pio;
1962         uint16_t msix;
1963
1964         if (pci_request_selected_regions(ha->pdev, ha->bars,
1965             QLA2XXX_DRIVER_NAME)) {
1966                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1967                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1968                     pci_name(ha->pdev));
1969                 goto iospace_error_exit;
1970         }
1971         if (!(ha->bars & 1))
1972                 goto skip_pio;
1973
1974         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1975         pio = pci_resource_start(ha->pdev, 0);
1976         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1977                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1978                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1979                             "Invalid pci I/O region size (%s).\n",
1980                             pci_name(ha->pdev));
1981                         pio = 0;
1982                 }
1983         } else {
1984                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1985                     "Region #0 no a PIO resource (%s).\n",
1986                     pci_name(ha->pdev));
1987                 pio = 0;
1988         }
1989         ha->pio_address = pio;
1990         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1991             "PIO address=%llu.\n",
1992             (unsigned long long)ha->pio_address);
1993
1994 skip_pio:
1995         /* Use MMIO operations for all accesses. */
1996         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1997                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1998                     "Region #1 not an MMIO resource (%s), aborting.\n",
1999                     pci_name(ha->pdev));
2000                 goto iospace_error_exit;
2001         }
2002         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2003                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2004                     "Invalid PCI mem region size (%s), aborting.\n",
2005                     pci_name(ha->pdev));
2006                 goto iospace_error_exit;
2007         }
2008
2009         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2010         if (!ha->iobase) {
2011                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2012                     "Cannot remap MMIO (%s), aborting.\n",
2013                     pci_name(ha->pdev));
2014                 goto iospace_error_exit;
2015         }
2016
2017         /* Determine queue resources */
2018         ha->max_req_queues = ha->max_rsp_queues = 1;
2019         ha->msix_count = QLA_BASE_VECTORS;
2020
2021         /* Check if FW supports MQ or not */
2022         if (!(ha->fw_attributes & BIT_6))
2023                 goto mqiobase_exit;
2024
2025         if (!ql2xmqsupport || !ql2xnvmeenable ||
2026             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2027                 goto mqiobase_exit;
2028
2029         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2030                         pci_resource_len(ha->pdev, 3));
2031         if (ha->mqiobase) {
2032                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2033                     "MQIO Base=%p.\n", ha->mqiobase);
2034                 /* Read MSIX vector size of the board */
2035                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2036                 ha->msix_count = msix + 1;
2037                 /* Max queues are bounded by available msix vectors */
2038                 /* MB interrupt uses 1 vector */
2039                 ha->max_req_queues = ha->msix_count - 1;
2040                 ha->max_rsp_queues = ha->max_req_queues;
2041                 /* Queue pairs is the max value minus the base queue pair */
2042                 ha->max_qpairs = ha->max_rsp_queues - 1;
2043                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2044                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2045
2046                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2047                     "MSI-X vector count: %d.\n", ha->msix_count);
2048         } else
2049                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2050                     "BAR 3 not enabled.\n");
2051
2052 mqiobase_exit:
2053         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2054             "MSIX Count: %d.\n", ha->msix_count);
2055         return (0);
2056
2057 iospace_error_exit:
2058         return (-ENOMEM);
2059 }
2060
2061
2062 static int
2063 qla83xx_iospace_config(struct qla_hw_data *ha)
2064 {
2065         uint16_t msix;
2066
2067         if (pci_request_selected_regions(ha->pdev, ha->bars,
2068             QLA2XXX_DRIVER_NAME)) {
2069                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2070                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2071                     pci_name(ha->pdev));
2072
2073                 goto iospace_error_exit;
2074         }
2075
2076         /* Use MMIO operations for all accesses. */
2077         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2078                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2079                     "Invalid pci I/O region size (%s).\n",
2080                     pci_name(ha->pdev));
2081                 goto iospace_error_exit;
2082         }
2083         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2084                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2085                     "Invalid PCI mem region size (%s), aborting\n",
2086                         pci_name(ha->pdev));
2087                 goto iospace_error_exit;
2088         }
2089
2090         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2091         if (!ha->iobase) {
2092                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2093                     "Cannot remap MMIO (%s), aborting.\n",
2094                     pci_name(ha->pdev));
2095                 goto iospace_error_exit;
2096         }
2097
2098         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2099         /* 83XX 26XX always use MQ type access for queues
2100          * - mbar 2, a.k.a region 4 */
2101         ha->max_req_queues = ha->max_rsp_queues = 1;
2102         ha->msix_count = QLA_BASE_VECTORS;
2103         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2104                         pci_resource_len(ha->pdev, 4));
2105
2106         if (!ha->mqiobase) {
2107                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2108                     "BAR2/region4 not enabled\n");
2109                 goto mqiobase_exit;
2110         }
2111
2112         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2113                         pci_resource_len(ha->pdev, 2));
2114         if (ha->msixbase) {
2115                 /* Read MSIX vector size of the board */
2116                 pci_read_config_word(ha->pdev,
2117                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2118                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2119                 /*
2120                  * By default, driver uses at least two msix vectors
2121                  * (default & rspq)
2122                  */
2123                 if (ql2xmqsupport || ql2xnvmeenable) {
2124                         /* MB interrupt uses 1 vector */
2125                         ha->max_req_queues = ha->msix_count - 1;
2126
2127                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2128                         if (QLA_TGT_MODE_ENABLED())
2129                                 ha->max_req_queues--;
2130
2131                         ha->max_rsp_queues = ha->max_req_queues;
2132
2133                         /* Queue pairs is the max value minus
2134                          * the base queue pair */
2135                         ha->max_qpairs = ha->max_req_queues - 1;
2136                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2137                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2138                 }
2139                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2140                     "MSI-X vector count: %d.\n", ha->msix_count);
2141         } else
2142                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2143                     "BAR 1 not enabled.\n");
2144
2145 mqiobase_exit:
2146         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2147             "MSIX Count: %d.\n", ha->msix_count);
2148         return 0;
2149
2150 iospace_error_exit:
2151         return -ENOMEM;
2152 }
2153
2154 static struct isp_operations qla2100_isp_ops = {
2155         .pci_config             = qla2100_pci_config,
2156         .reset_chip             = qla2x00_reset_chip,
2157         .chip_diag              = qla2x00_chip_diag,
2158         .config_rings           = qla2x00_config_rings,
2159         .reset_adapter          = qla2x00_reset_adapter,
2160         .nvram_config           = qla2x00_nvram_config,
2161         .update_fw_options      = qla2x00_update_fw_options,
2162         .load_risc              = qla2x00_load_risc,
2163         .pci_info_str           = qla2x00_pci_info_str,
2164         .fw_version_str         = qla2x00_fw_version_str,
2165         .intr_handler           = qla2100_intr_handler,
2166         .enable_intrs           = qla2x00_enable_intrs,
2167         .disable_intrs          = qla2x00_disable_intrs,
2168         .abort_command          = qla2x00_abort_command,
2169         .target_reset           = qla2x00_abort_target,
2170         .lun_reset              = qla2x00_lun_reset,
2171         .fabric_login           = qla2x00_login_fabric,
2172         .fabric_logout          = qla2x00_fabric_logout,
2173         .calc_req_entries       = qla2x00_calc_iocbs_32,
2174         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2175         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2176         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2177         .read_nvram             = qla2x00_read_nvram_data,
2178         .write_nvram            = qla2x00_write_nvram_data,
2179         .fw_dump                = qla2100_fw_dump,
2180         .beacon_on              = NULL,
2181         .beacon_off             = NULL,
2182         .beacon_blink           = NULL,
2183         .read_optrom            = qla2x00_read_optrom_data,
2184         .write_optrom           = qla2x00_write_optrom_data,
2185         .get_flash_version      = qla2x00_get_flash_version,
2186         .start_scsi             = qla2x00_start_scsi,
2187         .start_scsi_mq          = NULL,
2188         .abort_isp              = qla2x00_abort_isp,
2189         .iospace_config         = qla2x00_iospace_config,
2190         .initialize_adapter     = qla2x00_initialize_adapter,
2191 };
2192
2193 static struct isp_operations qla2300_isp_ops = {
2194         .pci_config             = qla2300_pci_config,
2195         .reset_chip             = qla2x00_reset_chip,
2196         .chip_diag              = qla2x00_chip_diag,
2197         .config_rings           = qla2x00_config_rings,
2198         .reset_adapter          = qla2x00_reset_adapter,
2199         .nvram_config           = qla2x00_nvram_config,
2200         .update_fw_options      = qla2x00_update_fw_options,
2201         .load_risc              = qla2x00_load_risc,
2202         .pci_info_str           = qla2x00_pci_info_str,
2203         .fw_version_str         = qla2x00_fw_version_str,
2204         .intr_handler           = qla2300_intr_handler,
2205         .enable_intrs           = qla2x00_enable_intrs,
2206         .disable_intrs          = qla2x00_disable_intrs,
2207         .abort_command          = qla2x00_abort_command,
2208         .target_reset           = qla2x00_abort_target,
2209         .lun_reset              = qla2x00_lun_reset,
2210         .fabric_login           = qla2x00_login_fabric,
2211         .fabric_logout          = qla2x00_fabric_logout,
2212         .calc_req_entries       = qla2x00_calc_iocbs_32,
2213         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2214         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2215         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2216         .read_nvram             = qla2x00_read_nvram_data,
2217         .write_nvram            = qla2x00_write_nvram_data,
2218         .fw_dump                = qla2300_fw_dump,
2219         .beacon_on              = qla2x00_beacon_on,
2220         .beacon_off             = qla2x00_beacon_off,
2221         .beacon_blink           = qla2x00_beacon_blink,
2222         .read_optrom            = qla2x00_read_optrom_data,
2223         .write_optrom           = qla2x00_write_optrom_data,
2224         .get_flash_version      = qla2x00_get_flash_version,
2225         .start_scsi             = qla2x00_start_scsi,
2226         .start_scsi_mq          = NULL,
2227         .abort_isp              = qla2x00_abort_isp,
2228         .iospace_config         = qla2x00_iospace_config,
2229         .initialize_adapter     = qla2x00_initialize_adapter,
2230 };
2231
2232 static struct isp_operations qla24xx_isp_ops = {
2233         .pci_config             = qla24xx_pci_config,
2234         .reset_chip             = qla24xx_reset_chip,
2235         .chip_diag              = qla24xx_chip_diag,
2236         .config_rings           = qla24xx_config_rings,
2237         .reset_adapter          = qla24xx_reset_adapter,
2238         .nvram_config           = qla24xx_nvram_config,
2239         .update_fw_options      = qla24xx_update_fw_options,
2240         .load_risc              = qla24xx_load_risc,
2241         .pci_info_str           = qla24xx_pci_info_str,
2242         .fw_version_str         = qla24xx_fw_version_str,
2243         .intr_handler           = qla24xx_intr_handler,
2244         .enable_intrs           = qla24xx_enable_intrs,
2245         .disable_intrs          = qla24xx_disable_intrs,
2246         .abort_command          = qla24xx_abort_command,
2247         .target_reset           = qla24xx_abort_target,
2248         .lun_reset              = qla24xx_lun_reset,
2249         .fabric_login           = qla24xx_login_fabric,
2250         .fabric_logout          = qla24xx_fabric_logout,
2251         .calc_req_entries       = NULL,
2252         .build_iocbs            = NULL,
2253         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2254         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2255         .read_nvram             = qla24xx_read_nvram_data,
2256         .write_nvram            = qla24xx_write_nvram_data,
2257         .fw_dump                = qla24xx_fw_dump,
2258         .beacon_on              = qla24xx_beacon_on,
2259         .beacon_off             = qla24xx_beacon_off,
2260         .beacon_blink           = qla24xx_beacon_blink,
2261         .read_optrom            = qla24xx_read_optrom_data,
2262         .write_optrom           = qla24xx_write_optrom_data,
2263         .get_flash_version      = qla24xx_get_flash_version,
2264         .start_scsi             = qla24xx_start_scsi,
2265         .start_scsi_mq          = NULL,
2266         .abort_isp              = qla2x00_abort_isp,
2267         .iospace_config         = qla2x00_iospace_config,
2268         .initialize_adapter     = qla2x00_initialize_adapter,
2269 };
2270
2271 static struct isp_operations qla25xx_isp_ops = {
2272         .pci_config             = qla25xx_pci_config,
2273         .reset_chip             = qla24xx_reset_chip,
2274         .chip_diag              = qla24xx_chip_diag,
2275         .config_rings           = qla24xx_config_rings,
2276         .reset_adapter          = qla24xx_reset_adapter,
2277         .nvram_config           = qla24xx_nvram_config,
2278         .update_fw_options      = qla24xx_update_fw_options,
2279         .load_risc              = qla24xx_load_risc,
2280         .pci_info_str           = qla24xx_pci_info_str,
2281         .fw_version_str         = qla24xx_fw_version_str,
2282         .intr_handler           = qla24xx_intr_handler,
2283         .enable_intrs           = qla24xx_enable_intrs,
2284         .disable_intrs          = qla24xx_disable_intrs,
2285         .abort_command          = qla24xx_abort_command,
2286         .target_reset           = qla24xx_abort_target,
2287         .lun_reset              = qla24xx_lun_reset,
2288         .fabric_login           = qla24xx_login_fabric,
2289         .fabric_logout          = qla24xx_fabric_logout,
2290         .calc_req_entries       = NULL,
2291         .build_iocbs            = NULL,
2292         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2293         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2294         .read_nvram             = qla25xx_read_nvram_data,
2295         .write_nvram            = qla25xx_write_nvram_data,
2296         .fw_dump                = qla25xx_fw_dump,
2297         .beacon_on              = qla24xx_beacon_on,
2298         .beacon_off             = qla24xx_beacon_off,
2299         .beacon_blink           = qla24xx_beacon_blink,
2300         .read_optrom            = qla25xx_read_optrom_data,
2301         .write_optrom           = qla24xx_write_optrom_data,
2302         .get_flash_version      = qla24xx_get_flash_version,
2303         .start_scsi             = qla24xx_dif_start_scsi,
2304         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2305         .abort_isp              = qla2x00_abort_isp,
2306         .iospace_config         = qla2x00_iospace_config,
2307         .initialize_adapter     = qla2x00_initialize_adapter,
2308 };
2309
2310 static struct isp_operations qla81xx_isp_ops = {
2311         .pci_config             = qla25xx_pci_config,
2312         .reset_chip             = qla24xx_reset_chip,
2313         .chip_diag              = qla24xx_chip_diag,
2314         .config_rings           = qla24xx_config_rings,
2315         .reset_adapter          = qla24xx_reset_adapter,
2316         .nvram_config           = qla81xx_nvram_config,
2317         .update_fw_options      = qla24xx_update_fw_options,
2318         .load_risc              = qla81xx_load_risc,
2319         .pci_info_str           = qla24xx_pci_info_str,
2320         .fw_version_str         = qla24xx_fw_version_str,
2321         .intr_handler           = qla24xx_intr_handler,
2322         .enable_intrs           = qla24xx_enable_intrs,
2323         .disable_intrs          = qla24xx_disable_intrs,
2324         .abort_command          = qla24xx_abort_command,
2325         .target_reset           = qla24xx_abort_target,
2326         .lun_reset              = qla24xx_lun_reset,
2327         .fabric_login           = qla24xx_login_fabric,
2328         .fabric_logout          = qla24xx_fabric_logout,
2329         .calc_req_entries       = NULL,
2330         .build_iocbs            = NULL,
2331         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2332         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2333         .read_nvram             = NULL,
2334         .write_nvram            = NULL,
2335         .fw_dump                = qla81xx_fw_dump,
2336         .beacon_on              = qla24xx_beacon_on,
2337         .beacon_off             = qla24xx_beacon_off,
2338         .beacon_blink           = qla83xx_beacon_blink,
2339         .read_optrom            = qla25xx_read_optrom_data,
2340         .write_optrom           = qla24xx_write_optrom_data,
2341         .get_flash_version      = qla24xx_get_flash_version,
2342         .start_scsi             = qla24xx_dif_start_scsi,
2343         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2344         .abort_isp              = qla2x00_abort_isp,
2345         .iospace_config         = qla2x00_iospace_config,
2346         .initialize_adapter     = qla2x00_initialize_adapter,
2347 };
2348
2349 static struct isp_operations qla82xx_isp_ops = {
2350         .pci_config             = qla82xx_pci_config,
2351         .reset_chip             = qla82xx_reset_chip,
2352         .chip_diag              = qla24xx_chip_diag,
2353         .config_rings           = qla82xx_config_rings,
2354         .reset_adapter          = qla24xx_reset_adapter,
2355         .nvram_config           = qla81xx_nvram_config,
2356         .update_fw_options      = qla24xx_update_fw_options,
2357         .load_risc              = qla82xx_load_risc,
2358         .pci_info_str           = qla24xx_pci_info_str,
2359         .fw_version_str         = qla24xx_fw_version_str,
2360         .intr_handler           = qla82xx_intr_handler,
2361         .enable_intrs           = qla82xx_enable_intrs,
2362         .disable_intrs          = qla82xx_disable_intrs,
2363         .abort_command          = qla24xx_abort_command,
2364         .target_reset           = qla24xx_abort_target,
2365         .lun_reset              = qla24xx_lun_reset,
2366         .fabric_login           = qla24xx_login_fabric,
2367         .fabric_logout          = qla24xx_fabric_logout,
2368         .calc_req_entries       = NULL,
2369         .build_iocbs            = NULL,
2370         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2371         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2372         .read_nvram             = qla24xx_read_nvram_data,
2373         .write_nvram            = qla24xx_write_nvram_data,
2374         .fw_dump                = qla82xx_fw_dump,
2375         .beacon_on              = qla82xx_beacon_on,
2376         .beacon_off             = qla82xx_beacon_off,
2377         .beacon_blink           = NULL,
2378         .read_optrom            = qla82xx_read_optrom_data,
2379         .write_optrom           = qla82xx_write_optrom_data,
2380         .get_flash_version      = qla82xx_get_flash_version,
2381         .start_scsi             = qla82xx_start_scsi,
2382         .start_scsi_mq          = NULL,
2383         .abort_isp              = qla82xx_abort_isp,
2384         .iospace_config         = qla82xx_iospace_config,
2385         .initialize_adapter     = qla2x00_initialize_adapter,
2386 };
2387
2388 static struct isp_operations qla8044_isp_ops = {
2389         .pci_config             = qla82xx_pci_config,
2390         .reset_chip             = qla82xx_reset_chip,
2391         .chip_diag              = qla24xx_chip_diag,
2392         .config_rings           = qla82xx_config_rings,
2393         .reset_adapter          = qla24xx_reset_adapter,
2394         .nvram_config           = qla81xx_nvram_config,
2395         .update_fw_options      = qla24xx_update_fw_options,
2396         .load_risc              = qla82xx_load_risc,
2397         .pci_info_str           = qla24xx_pci_info_str,
2398         .fw_version_str         = qla24xx_fw_version_str,
2399         .intr_handler           = qla8044_intr_handler,
2400         .enable_intrs           = qla82xx_enable_intrs,
2401         .disable_intrs          = qla82xx_disable_intrs,
2402         .abort_command          = qla24xx_abort_command,
2403         .target_reset           = qla24xx_abort_target,
2404         .lun_reset              = qla24xx_lun_reset,
2405         .fabric_login           = qla24xx_login_fabric,
2406         .fabric_logout          = qla24xx_fabric_logout,
2407         .calc_req_entries       = NULL,
2408         .build_iocbs            = NULL,
2409         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2410         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2411         .read_nvram             = NULL,
2412         .write_nvram            = NULL,
2413         .fw_dump                = qla8044_fw_dump,
2414         .beacon_on              = qla82xx_beacon_on,
2415         .beacon_off             = qla82xx_beacon_off,
2416         .beacon_blink           = NULL,
2417         .read_optrom            = qla8044_read_optrom_data,
2418         .write_optrom           = qla8044_write_optrom_data,
2419         .get_flash_version      = qla82xx_get_flash_version,
2420         .start_scsi             = qla82xx_start_scsi,
2421         .start_scsi_mq          = NULL,
2422         .abort_isp              = qla8044_abort_isp,
2423         .iospace_config         = qla82xx_iospace_config,
2424         .initialize_adapter     = qla2x00_initialize_adapter,
2425 };
2426
2427 static struct isp_operations qla83xx_isp_ops = {
2428         .pci_config             = qla25xx_pci_config,
2429         .reset_chip             = qla24xx_reset_chip,
2430         .chip_diag              = qla24xx_chip_diag,
2431         .config_rings           = qla24xx_config_rings,
2432         .reset_adapter          = qla24xx_reset_adapter,
2433         .nvram_config           = qla81xx_nvram_config,
2434         .update_fw_options      = qla24xx_update_fw_options,
2435         .load_risc              = qla81xx_load_risc,
2436         .pci_info_str           = qla24xx_pci_info_str,
2437         .fw_version_str         = qla24xx_fw_version_str,
2438         .intr_handler           = qla24xx_intr_handler,
2439         .enable_intrs           = qla24xx_enable_intrs,
2440         .disable_intrs          = qla24xx_disable_intrs,
2441         .abort_command          = qla24xx_abort_command,
2442         .target_reset           = qla24xx_abort_target,
2443         .lun_reset              = qla24xx_lun_reset,
2444         .fabric_login           = qla24xx_login_fabric,
2445         .fabric_logout          = qla24xx_fabric_logout,
2446         .calc_req_entries       = NULL,
2447         .build_iocbs            = NULL,
2448         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2449         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2450         .read_nvram             = NULL,
2451         .write_nvram            = NULL,
2452         .fw_dump                = qla83xx_fw_dump,
2453         .beacon_on              = qla24xx_beacon_on,
2454         .beacon_off             = qla24xx_beacon_off,
2455         .beacon_blink           = qla83xx_beacon_blink,
2456         .read_optrom            = qla25xx_read_optrom_data,
2457         .write_optrom           = qla24xx_write_optrom_data,
2458         .get_flash_version      = qla24xx_get_flash_version,
2459         .start_scsi             = qla24xx_dif_start_scsi,
2460         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2461         .abort_isp              = qla2x00_abort_isp,
2462         .iospace_config         = qla83xx_iospace_config,
2463         .initialize_adapter     = qla2x00_initialize_adapter,
2464 };
2465
2466 static struct isp_operations qlafx00_isp_ops = {
2467         .pci_config             = qlafx00_pci_config,
2468         .reset_chip             = qlafx00_soft_reset,
2469         .chip_diag              = qlafx00_chip_diag,
2470         .config_rings           = qlafx00_config_rings,
2471         .reset_adapter          = qlafx00_soft_reset,
2472         .nvram_config           = NULL,
2473         .update_fw_options      = NULL,
2474         .load_risc              = NULL,
2475         .pci_info_str           = qlafx00_pci_info_str,
2476         .fw_version_str         = qlafx00_fw_version_str,
2477         .intr_handler           = qlafx00_intr_handler,
2478         .enable_intrs           = qlafx00_enable_intrs,
2479         .disable_intrs          = qlafx00_disable_intrs,
2480         .abort_command          = qla24xx_async_abort_command,
2481         .target_reset           = qlafx00_abort_target,
2482         .lun_reset              = qlafx00_lun_reset,
2483         .fabric_login           = NULL,
2484         .fabric_logout          = NULL,
2485         .calc_req_entries       = NULL,
2486         .build_iocbs            = NULL,
2487         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2488         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2489         .read_nvram             = qla24xx_read_nvram_data,
2490         .write_nvram            = qla24xx_write_nvram_data,
2491         .fw_dump                = NULL,
2492         .beacon_on              = qla24xx_beacon_on,
2493         .beacon_off             = qla24xx_beacon_off,
2494         .beacon_blink           = NULL,
2495         .read_optrom            = qla24xx_read_optrom_data,
2496         .write_optrom           = qla24xx_write_optrom_data,
2497         .get_flash_version      = qla24xx_get_flash_version,
2498         .start_scsi             = qlafx00_start_scsi,
2499         .start_scsi_mq          = NULL,
2500         .abort_isp              = qlafx00_abort_isp,
2501         .iospace_config         = qlafx00_iospace_config,
2502         .initialize_adapter     = qlafx00_initialize_adapter,
2503 };
2504
2505 static struct isp_operations qla27xx_isp_ops = {
2506         .pci_config             = qla25xx_pci_config,
2507         .reset_chip             = qla24xx_reset_chip,
2508         .chip_diag              = qla24xx_chip_diag,
2509         .config_rings           = qla24xx_config_rings,
2510         .reset_adapter          = qla24xx_reset_adapter,
2511         .nvram_config           = qla81xx_nvram_config,
2512         .update_fw_options      = qla24xx_update_fw_options,
2513         .load_risc              = qla81xx_load_risc,
2514         .pci_info_str           = qla24xx_pci_info_str,
2515         .fw_version_str         = qla24xx_fw_version_str,
2516         .intr_handler           = qla24xx_intr_handler,
2517         .enable_intrs           = qla24xx_enable_intrs,
2518         .disable_intrs          = qla24xx_disable_intrs,
2519         .abort_command          = qla24xx_abort_command,
2520         .target_reset           = qla24xx_abort_target,
2521         .lun_reset              = qla24xx_lun_reset,
2522         .fabric_login           = qla24xx_login_fabric,
2523         .fabric_logout          = qla24xx_fabric_logout,
2524         .calc_req_entries       = NULL,
2525         .build_iocbs            = NULL,
2526         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2527         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2528         .read_nvram             = NULL,
2529         .write_nvram            = NULL,
2530         .fw_dump                = qla27xx_fwdump,
2531         .mpi_fw_dump            = qla27xx_mpi_fwdump,
2532         .beacon_on              = qla24xx_beacon_on,
2533         .beacon_off             = qla24xx_beacon_off,
2534         .beacon_blink           = qla83xx_beacon_blink,
2535         .read_optrom            = qla25xx_read_optrom_data,
2536         .write_optrom           = qla24xx_write_optrom_data,
2537         .get_flash_version      = qla24xx_get_flash_version,
2538         .start_scsi             = qla24xx_dif_start_scsi,
2539         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2540         .abort_isp              = qla2x00_abort_isp,
2541         .iospace_config         = qla83xx_iospace_config,
2542         .initialize_adapter     = qla2x00_initialize_adapter,
2543 };
2544
2545 static inline void
2546 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2547 {
2548         ha->device_type = DT_EXTENDED_IDS;
2549         switch (ha->pdev->device) {
2550         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2551                 ha->isp_type |= DT_ISP2100;
2552                 ha->device_type &= ~DT_EXTENDED_IDS;
2553                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2554                 break;
2555         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2556                 ha->isp_type |= DT_ISP2200;
2557                 ha->device_type &= ~DT_EXTENDED_IDS;
2558                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2559                 break;
2560         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2561                 ha->isp_type |= DT_ISP2300;
2562                 ha->device_type |= DT_ZIO_SUPPORTED;
2563                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2564                 break;
2565         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2566                 ha->isp_type |= DT_ISP2312;
2567                 ha->device_type |= DT_ZIO_SUPPORTED;
2568                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2569                 break;
2570         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2571                 ha->isp_type |= DT_ISP2322;
2572                 ha->device_type |= DT_ZIO_SUPPORTED;
2573                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2574                     ha->pdev->subsystem_device == 0x0170)
2575                         ha->device_type |= DT_OEM_001;
2576                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2577                 break;
2578         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2579                 ha->isp_type |= DT_ISP6312;
2580                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2581                 break;
2582         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2583                 ha->isp_type |= DT_ISP6322;
2584                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2585                 break;
2586         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2587                 ha->isp_type |= DT_ISP2422;
2588                 ha->device_type |= DT_ZIO_SUPPORTED;
2589                 ha->device_type |= DT_FWI2;
2590                 ha->device_type |= DT_IIDMA;
2591                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2592                 break;
2593         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2594                 ha->isp_type |= DT_ISP2432;
2595                 ha->device_type |= DT_ZIO_SUPPORTED;
2596                 ha->device_type |= DT_FWI2;
2597                 ha->device_type |= DT_IIDMA;
2598                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2599                 break;
2600         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2601                 ha->isp_type |= DT_ISP8432;
2602                 ha->device_type |= DT_ZIO_SUPPORTED;
2603                 ha->device_type |= DT_FWI2;
2604                 ha->device_type |= DT_IIDMA;
2605                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2606                 break;
2607         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2608                 ha->isp_type |= DT_ISP5422;
2609                 ha->device_type |= DT_FWI2;
2610                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2611                 break;
2612         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2613                 ha->isp_type |= DT_ISP5432;
2614                 ha->device_type |= DT_FWI2;
2615                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2616                 break;
2617         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2618                 ha->isp_type |= DT_ISP2532;
2619                 ha->device_type |= DT_ZIO_SUPPORTED;
2620                 ha->device_type |= DT_FWI2;
2621                 ha->device_type |= DT_IIDMA;
2622                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2623                 break;
2624         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2625                 ha->isp_type |= DT_ISP8001;
2626                 ha->device_type |= DT_ZIO_SUPPORTED;
2627                 ha->device_type |= DT_FWI2;
2628                 ha->device_type |= DT_IIDMA;
2629                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2630                 break;
2631         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2632                 ha->isp_type |= DT_ISP8021;
2633                 ha->device_type |= DT_ZIO_SUPPORTED;
2634                 ha->device_type |= DT_FWI2;
2635                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2636                 /* Initialize 82XX ISP flags */
2637                 qla82xx_init_flags(ha);
2638                 break;
2639          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2640                 ha->isp_type |= DT_ISP8044;
2641                 ha->device_type |= DT_ZIO_SUPPORTED;
2642                 ha->device_type |= DT_FWI2;
2643                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2644                 /* Initialize 82XX ISP flags */
2645                 qla82xx_init_flags(ha);
2646                 break;
2647         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2648                 ha->isp_type |= DT_ISP2031;
2649                 ha->device_type |= DT_ZIO_SUPPORTED;
2650                 ha->device_type |= DT_FWI2;
2651                 ha->device_type |= DT_IIDMA;
2652                 ha->device_type |= DT_T10_PI;
2653                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2654                 break;
2655         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2656                 ha->isp_type |= DT_ISP8031;
2657                 ha->device_type |= DT_ZIO_SUPPORTED;
2658                 ha->device_type |= DT_FWI2;
2659                 ha->device_type |= DT_IIDMA;
2660                 ha->device_type |= DT_T10_PI;
2661                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2662                 break;
2663         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2664                 ha->isp_type |= DT_ISPFX00;
2665                 break;
2666         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2667                 ha->isp_type |= DT_ISP2071;
2668                 ha->device_type |= DT_ZIO_SUPPORTED;
2669                 ha->device_type |= DT_FWI2;
2670                 ha->device_type |= DT_IIDMA;
2671                 ha->device_type |= DT_T10_PI;
2672                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2673                 break;
2674         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2675                 ha->isp_type |= DT_ISP2271;
2676                 ha->device_type |= DT_ZIO_SUPPORTED;
2677                 ha->device_type |= DT_FWI2;
2678                 ha->device_type |= DT_IIDMA;
2679                 ha->device_type |= DT_T10_PI;
2680                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2681                 break;
2682         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2683                 ha->isp_type |= DT_ISP2261;
2684                 ha->device_type |= DT_ZIO_SUPPORTED;
2685                 ha->device_type |= DT_FWI2;
2686                 ha->device_type |= DT_IIDMA;
2687                 ha->device_type |= DT_T10_PI;
2688                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2689                 break;
2690         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2691         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2692                 ha->isp_type |= DT_ISP2081;
2693                 ha->device_type |= DT_ZIO_SUPPORTED;
2694                 ha->device_type |= DT_FWI2;
2695                 ha->device_type |= DT_IIDMA;
2696                 ha->device_type |= DT_T10_PI;
2697                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2698                 break;
2699         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2700         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2701                 ha->isp_type |= DT_ISP2281;
2702                 ha->device_type |= DT_ZIO_SUPPORTED;
2703                 ha->device_type |= DT_FWI2;
2704                 ha->device_type |= DT_IIDMA;
2705                 ha->device_type |= DT_T10_PI;
2706                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2707                 break;
2708         }
2709
2710         if (IS_QLA82XX(ha))
2711                 ha->port_no = ha->portnum & 1;
2712         else {
2713                 /* Get adapter physical port no from interrupt pin register. */
2714                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2715                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2716                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2717                         ha->port_no--;
2718                 else
2719                         ha->port_no = !(ha->port_no & 1);
2720         }
2721
2722         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2723             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2724             ha->device_type, ha->port_no, ha->fw_srisc_address);
2725 }
2726
2727 static void
2728 qla2xxx_scan_start(struct Scsi_Host *shost)
2729 {
2730         scsi_qla_host_t *vha = shost_priv(shost);
2731
2732         if (vha->hw->flags.running_gold_fw)
2733                 return;
2734
2735         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2736         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2737         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2738         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2739 }
2740
2741 static int
2742 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2743 {
2744         scsi_qla_host_t *vha = shost_priv(shost);
2745
2746         if (test_bit(UNLOADING, &vha->dpc_flags))
2747                 return 1;
2748         if (!vha->host)
2749                 return 1;
2750         if (time > vha->hw->loop_reset_delay * HZ)
2751                 return 1;
2752
2753         return atomic_read(&vha->loop_state) == LOOP_READY;
2754 }
2755
2756 static void qla2x00_iocb_work_fn(struct work_struct *work)
2757 {
2758         struct scsi_qla_host *vha = container_of(work,
2759                 struct scsi_qla_host, iocb_work);
2760         struct qla_hw_data *ha = vha->hw;
2761         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2762         int i = 2;
2763         unsigned long flags;
2764
2765         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2766                 return;
2767
2768         while (!list_empty(&vha->work_list) && i > 0) {
2769                 qla2x00_do_work(vha);
2770                 i--;
2771         }
2772
2773         spin_lock_irqsave(&vha->work_lock, flags);
2774         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2775         spin_unlock_irqrestore(&vha->work_lock, flags);
2776 }
2777
2778 /*
2779  * PCI driver interface
2780  */
2781 static int
2782 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2783 {
2784         int     ret = -ENODEV;
2785         struct Scsi_Host *host;
2786         scsi_qla_host_t *base_vha = NULL;
2787         struct qla_hw_data *ha;
2788         char pci_info[30];
2789         char fw_str[30], wq_name[30];
2790         struct scsi_host_template *sht;
2791         int bars, mem_only = 0;
2792         uint16_t req_length = 0, rsp_length = 0;
2793         struct req_que *req = NULL;
2794         struct rsp_que *rsp = NULL;
2795         int i;
2796
2797         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2798         sht = &qla2xxx_driver_template;
2799         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2800             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2801             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2802             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2803             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2804             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2805             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2806             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2807             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2808             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2809             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2810             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2811             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2812             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2813             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2814             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2815             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2816             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2817             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2818                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2819                 mem_only = 1;
2820                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2821                     "Mem only adapter.\n");
2822         }
2823         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2824             "Bars=%d.\n", bars);
2825
2826         if (mem_only) {
2827                 if (pci_enable_device_mem(pdev))
2828                         return ret;
2829         } else {
2830                 if (pci_enable_device(pdev))
2831                         return ret;
2832         }
2833
2834         /* This may fail but that's ok */
2835         pci_enable_pcie_error_reporting(pdev);
2836
2837         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2838         if (!ha) {
2839                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2840                     "Unable to allocate memory for ha.\n");
2841                 goto disable_device;
2842         }
2843         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2844             "Memory allocated for ha=%p.\n", ha);
2845         ha->pdev = pdev;
2846         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2847         spin_lock_init(&ha->tgt.q_full_lock);
2848         spin_lock_init(&ha->tgt.sess_lock);
2849         spin_lock_init(&ha->tgt.atio_lock);
2850
2851         atomic_set(&ha->nvme_active_aen_cnt, 0);
2852
2853         /* Clear our data area */
2854         ha->bars = bars;
2855         ha->mem_only = mem_only;
2856         spin_lock_init(&ha->hardware_lock);
2857         spin_lock_init(&ha->vport_slock);
2858         mutex_init(&ha->selflogin_lock);
2859         mutex_init(&ha->optrom_mutex);
2860
2861         /* Set ISP-type information. */
2862         qla2x00_set_isp_flags(ha);
2863
2864         /* Set EEH reset type to fundamental if required by hba */
2865         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2866             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2867                 pdev->needs_freset = 1;
2868
2869         ha->prev_topology = 0;
2870         ha->init_cb_size = sizeof(init_cb_t);
2871         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2872         ha->optrom_size = OPTROM_SIZE_2300;
2873         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2874         atomic_set(&ha->num_pend_mbx_stage1, 0);
2875         atomic_set(&ha->num_pend_mbx_stage2, 0);
2876         atomic_set(&ha->num_pend_mbx_stage3, 0);
2877         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2878         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2879
2880         /* Assign ISP specific operations. */
2881         if (IS_QLA2100(ha)) {
2882                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2883                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2884                 req_length = REQUEST_ENTRY_CNT_2100;
2885                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2886                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2887                 ha->gid_list_info_size = 4;
2888                 ha->flash_conf_off = ~0;
2889                 ha->flash_data_off = ~0;
2890                 ha->nvram_conf_off = ~0;
2891                 ha->nvram_data_off = ~0;
2892                 ha->isp_ops = &qla2100_isp_ops;
2893         } else if (IS_QLA2200(ha)) {
2894                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2895                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2896                 req_length = REQUEST_ENTRY_CNT_2200;
2897                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2898                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2899                 ha->gid_list_info_size = 4;
2900                 ha->flash_conf_off = ~0;
2901                 ha->flash_data_off = ~0;
2902                 ha->nvram_conf_off = ~0;
2903                 ha->nvram_data_off = ~0;
2904                 ha->isp_ops = &qla2100_isp_ops;
2905         } else if (IS_QLA23XX(ha)) {
2906                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2907                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2908                 req_length = REQUEST_ENTRY_CNT_2200;
2909                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2910                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2911                 ha->gid_list_info_size = 6;
2912                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2913                         ha->optrom_size = OPTROM_SIZE_2322;
2914                 ha->flash_conf_off = ~0;
2915                 ha->flash_data_off = ~0;
2916                 ha->nvram_conf_off = ~0;
2917                 ha->nvram_data_off = ~0;
2918                 ha->isp_ops = &qla2300_isp_ops;
2919         } else if (IS_QLA24XX_TYPE(ha)) {
2920                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2921                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2922                 req_length = REQUEST_ENTRY_CNT_24XX;
2923                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2924                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2925                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2926                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2927                 ha->gid_list_info_size = 8;
2928                 ha->optrom_size = OPTROM_SIZE_24XX;
2929                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2930                 ha->isp_ops = &qla24xx_isp_ops;
2931                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2932                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2933                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2934                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2935         } else if (IS_QLA25XX(ha)) {
2936                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2937                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2938                 req_length = REQUEST_ENTRY_CNT_24XX;
2939                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2940                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2941                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2942                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2943                 ha->gid_list_info_size = 8;
2944                 ha->optrom_size = OPTROM_SIZE_25XX;
2945                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2946                 ha->isp_ops = &qla25xx_isp_ops;
2947                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2948                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2949                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2950                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2951         } else if (IS_QLA81XX(ha)) {
2952                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2953                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2954                 req_length = REQUEST_ENTRY_CNT_24XX;
2955                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2956                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2957                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2958                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2959                 ha->gid_list_info_size = 8;
2960                 ha->optrom_size = OPTROM_SIZE_81XX;
2961                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2962                 ha->isp_ops = &qla81xx_isp_ops;
2963                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2964                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2965                 ha->nvram_conf_off = ~0;
2966                 ha->nvram_data_off = ~0;
2967         } else if (IS_QLA82XX(ha)) {
2968                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2969                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2970                 req_length = REQUEST_ENTRY_CNT_82XX;
2971                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2972                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2973                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2974                 ha->gid_list_info_size = 8;
2975                 ha->optrom_size = OPTROM_SIZE_82XX;
2976                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2977                 ha->isp_ops = &qla82xx_isp_ops;
2978                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2979                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2980                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2981                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2982         } else if (IS_QLA8044(ha)) {
2983                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2984                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2985                 req_length = REQUEST_ENTRY_CNT_82XX;
2986                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2987                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2988                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2989                 ha->gid_list_info_size = 8;
2990                 ha->optrom_size = OPTROM_SIZE_83XX;
2991                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2992                 ha->isp_ops = &qla8044_isp_ops;
2993                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2994                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2995                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2996                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2997         } else if (IS_QLA83XX(ha)) {
2998                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2999                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3000                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3001                 req_length = REQUEST_ENTRY_CNT_83XX;
3002                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3003                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3004                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3005                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3006                 ha->gid_list_info_size = 8;
3007                 ha->optrom_size = OPTROM_SIZE_83XX;
3008                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3009                 ha->isp_ops = &qla83xx_isp_ops;
3010                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3011                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3012                 ha->nvram_conf_off = ~0;
3013                 ha->nvram_data_off = ~0;
3014         }  else if (IS_QLAFX00(ha)) {
3015                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3016                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3017                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3018                 req_length = REQUEST_ENTRY_CNT_FX00;
3019                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3020                 ha->isp_ops = &qlafx00_isp_ops;
3021                 ha->port_down_retry_count = 30; /* default value */
3022                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3023                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3024                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3025                 ha->mr.fw_hbt_en = 1;
3026                 ha->mr.host_info_resend = false;
3027                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3028         } else if (IS_QLA27XX(ha)) {
3029                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3030                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3031                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3032                 req_length = REQUEST_ENTRY_CNT_83XX;
3033                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3034                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3035                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3036                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3037                 ha->gid_list_info_size = 8;
3038                 ha->optrom_size = OPTROM_SIZE_83XX;
3039                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3040                 ha->isp_ops = &qla27xx_isp_ops;
3041                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3042                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3043                 ha->nvram_conf_off = ~0;
3044                 ha->nvram_data_off = ~0;
3045         } else if (IS_QLA28XX(ha)) {
3046                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3047                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3048                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3049                 req_length = REQUEST_ENTRY_CNT_24XX;
3050                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3051                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3052                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3053                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3054                 ha->gid_list_info_size = 8;
3055                 ha->optrom_size = OPTROM_SIZE_28XX;
3056                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3057                 ha->isp_ops = &qla27xx_isp_ops;
3058                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3059                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3060                 ha->nvram_conf_off = ~0;
3061                 ha->nvram_data_off = ~0;
3062         }
3063
3064         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3065             "mbx_count=%d, req_length=%d, "
3066             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3067             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3068             "max_fibre_devices=%d.\n",
3069             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3070             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3071             ha->nvram_npiv_size, ha->max_fibre_devices);
3072         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3073             "isp_ops=%p, flash_conf_off=%d, "
3074             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3075             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3076             ha->nvram_conf_off, ha->nvram_data_off);
3077
3078         /* Configure PCI I/O space */
3079         ret = ha->isp_ops->iospace_config(ha);
3080         if (ret)
3081                 goto iospace_config_failed;
3082
3083         ql_log_pci(ql_log_info, pdev, 0x001d,
3084             "Found an ISP%04X irq %d iobase 0x%p.\n",
3085             pdev->device, pdev->irq, ha->iobase);
3086         mutex_init(&ha->vport_lock);
3087         mutex_init(&ha->mq_lock);
3088         init_completion(&ha->mbx_cmd_comp);
3089         complete(&ha->mbx_cmd_comp);
3090         init_completion(&ha->mbx_intr_comp);
3091         init_completion(&ha->dcbx_comp);
3092         init_completion(&ha->lb_portup_comp);
3093
3094         set_bit(0, (unsigned long *) ha->vp_idx_map);
3095
3096         qla2x00_config_dma_addressing(ha);
3097         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3098             "64 Bit addressing is %s.\n",
3099             ha->flags.enable_64bit_addressing ? "enable" :
3100             "disable");
3101         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3102         if (ret) {
3103                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3104                     "Failed to allocate memory for adapter, aborting.\n");
3105
3106                 goto probe_hw_failed;
3107         }
3108
3109         req->max_q_depth = MAX_Q_DEPTH;
3110         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3111                 req->max_q_depth = ql2xmaxqdepth;
3112
3113
3114         base_vha = qla2x00_create_host(sht, ha);
3115         if (!base_vha) {
3116                 ret = -ENOMEM;
3117                 goto probe_hw_failed;
3118         }
3119
3120         pci_set_drvdata(pdev, base_vha);
3121         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3122
3123         host = base_vha->host;
3124         base_vha->req = req;
3125         if (IS_QLA2XXX_MIDTYPE(ha))
3126                 base_vha->mgmt_svr_loop_id =
3127                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3128         else
3129                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3130                                                 base_vha->vp_idx;
3131
3132         /* Setup fcport template structure. */
3133         ha->mr.fcport.vha = base_vha;
3134         ha->mr.fcport.port_type = FCT_UNKNOWN;
3135         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3136         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3137         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3138         ha->mr.fcport.scan_state = 1;
3139
3140         /* Set the SG table size based on ISP type */
3141         if (!IS_FWI2_CAPABLE(ha)) {
3142                 if (IS_QLA2100(ha))
3143                         host->sg_tablesize = 32;
3144         } else {
3145                 if (!IS_QLA82XX(ha))
3146                         host->sg_tablesize = QLA_SG_ALL;
3147         }
3148         host->max_id = ha->max_fibre_devices;
3149         host->cmd_per_lun = 3;
3150         host->unique_id = host->host_no;
3151         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3152                 host->max_cmd_len = 32;
3153         else
3154                 host->max_cmd_len = MAX_CMDSZ;
3155         host->max_channel = MAX_BUSES - 1;
3156         /* Older HBAs support only 16-bit LUNs */
3157         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3158             ql2xmaxlun > 0xffff)
3159                 host->max_lun = 0xffff;
3160         else
3161                 host->max_lun = ql2xmaxlun;
3162         host->transportt = qla2xxx_transport_template;
3163         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3164
3165         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3166             "max_id=%d this_id=%d "
3167             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3168             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3169             host->this_id, host->cmd_per_lun, host->unique_id,
3170             host->max_cmd_len, host->max_channel, host->max_lun,
3171             host->transportt, sht->vendor_id);
3172
3173         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3174
3175         /* Set up the irqs */
3176         ret = qla2x00_request_irqs(ha, rsp);
3177         if (ret)
3178                 goto probe_failed;
3179
3180         /* Alloc arrays of request and response ring ptrs */
3181         ret = qla2x00_alloc_queues(ha, req, rsp);
3182         if (ret) {
3183                 ql_log(ql_log_fatal, base_vha, 0x003d,
3184                     "Failed to allocate memory for queue pointers..."
3185                     "aborting.\n");
3186                 ret = -ENODEV;
3187                 goto probe_failed;
3188         }
3189
3190         if (ha->mqenable) {
3191                 /* number of hardware queues supported by blk/scsi-mq*/
3192                 host->nr_hw_queues = ha->max_qpairs;
3193
3194                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3195                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3196         } else {
3197                 if (ql2xnvmeenable) {
3198                         host->nr_hw_queues = ha->max_qpairs;
3199                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3200                             "FC-NVMe support is enabled, HW queues=%d\n",
3201                             host->nr_hw_queues);
3202                 } else {
3203                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3204                             "blk/scsi-mq disabled.\n");
3205                 }
3206         }
3207
3208         qlt_probe_one_stage1(base_vha, ha);
3209
3210         pci_save_state(pdev);
3211
3212         /* Assign back pointers */
3213         rsp->req = req;
3214         req->rsp = rsp;
3215
3216         if (IS_QLAFX00(ha)) {
3217                 ha->rsp_q_map[0] = rsp;
3218                 ha->req_q_map[0] = req;
3219                 set_bit(0, ha->req_qid_map);
3220                 set_bit(0, ha->rsp_qid_map);
3221         }
3222
3223         /* FWI2-capable only. */
3224         req->req_q_in = &ha->iobase->isp24.req_q_in;
3225         req->req_q_out = &ha->iobase->isp24.req_q_out;
3226         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3227         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3228         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3229             IS_QLA28XX(ha)) {
3230                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3231                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3232                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3233                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3234         }
3235
3236         if (IS_QLAFX00(ha)) {
3237                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3238                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3239                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3240                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3241         }
3242
3243         if (IS_P3P_TYPE(ha)) {
3244                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3245                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3246                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3247         }
3248
3249         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3250             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3251             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3252         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3253             "req->req_q_in=%p req->req_q_out=%p "
3254             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3255             req->req_q_in, req->req_q_out,
3256             rsp->rsp_q_in, rsp->rsp_q_out);
3257         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3258             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3259             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3260         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3261             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3262             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3263
3264         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3265         if (unlikely(!ha->wq)) {
3266                 ret = -ENOMEM;
3267                 goto probe_failed;
3268         }
3269
3270         if (ha->isp_ops->initialize_adapter(base_vha)) {
3271                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3272                     "Failed to initialize adapter - Adapter flags %x.\n",
3273                     base_vha->device_flags);
3274
3275                 if (IS_QLA82XX(ha)) {
3276                         qla82xx_idc_lock(ha);
3277                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3278                                 QLA8XXX_DEV_FAILED);
3279                         qla82xx_idc_unlock(ha);
3280                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3281                             "HW State: FAILED.\n");
3282                 } else if (IS_QLA8044(ha)) {
3283                         qla8044_idc_lock(ha);
3284                         qla8044_wr_direct(base_vha,
3285                                 QLA8044_CRB_DEV_STATE_INDEX,
3286                                 QLA8XXX_DEV_FAILED);
3287                         qla8044_idc_unlock(ha);
3288                         ql_log(ql_log_fatal, base_vha, 0x0150,
3289                             "HW State: FAILED.\n");
3290                 }
3291
3292                 ret = -ENODEV;
3293                 goto probe_failed;
3294         }
3295
3296         if (IS_QLAFX00(ha))
3297                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3298         else
3299                 host->can_queue = req->num_outstanding_cmds - 10;
3300
3301         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3302             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3303             host->can_queue, base_vha->req,
3304             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3305
3306         if (ha->mqenable) {
3307                 bool startit = false;
3308
3309                 if (QLA_TGT_MODE_ENABLED())
3310                         startit = false;
3311
3312                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3313                         startit = true;
3314
3315                 /* Create start of day qpairs for Block MQ */
3316                 for (i = 0; i < ha->max_qpairs; i++)
3317                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3318         }
3319
3320         if (ha->flags.running_gold_fw)
3321                 goto skip_dpc;
3322
3323         /*
3324          * Startup the kernel thread for this host adapter
3325          */
3326         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3327             "%s_dpc", base_vha->host_str);
3328         if (IS_ERR(ha->dpc_thread)) {
3329                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3330                     "Failed to start DPC thread.\n");
3331                 ret = PTR_ERR(ha->dpc_thread);
3332                 ha->dpc_thread = NULL;
3333                 goto probe_failed;
3334         }
3335         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3336             "DPC thread started successfully.\n");
3337
3338         /*
3339          * If we're not coming up in initiator mode, we might sit for
3340          * a while without waking up the dpc thread, which leads to a
3341          * stuck process warning.  So just kick the dpc once here and
3342          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3343          */
3344         qla2xxx_wake_dpc(base_vha);
3345
3346         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3347
3348         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3349                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3350                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3351                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3352
3353                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3354                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3355                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3356                 INIT_WORK(&ha->idc_state_handler,
3357                     qla83xx_idc_state_handler_work);
3358                 INIT_WORK(&ha->nic_core_unrecoverable,
3359                     qla83xx_nic_core_unrecoverable_work);
3360         }
3361
3362 skip_dpc:
3363         list_add_tail(&base_vha->list, &ha->vp_list);
3364         base_vha->host->irq = ha->pdev->irq;
3365
3366         /* Initialized the timer */
3367         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3368         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3369             "Started qla2x00_timer with "
3370             "interval=%d.\n", WATCH_INTERVAL);
3371         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3372             "Detected hba at address=%p.\n",
3373             ha);
3374
3375         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3376                 if (ha->fw_attributes & BIT_4) {
3377                         int prot = 0, guard;
3378
3379                         base_vha->flags.difdix_supported = 1;
3380                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3381                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3382                         if (ql2xenabledif == 1)
3383                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3384                         if (ql2xprotmask)
3385                                 scsi_host_set_prot(host, ql2xprotmask);
3386                         else
3387                                 scsi_host_set_prot(host,
3388                                     prot | SHOST_DIF_TYPE1_PROTECTION
3389                                     | SHOST_DIF_TYPE2_PROTECTION
3390                                     | SHOST_DIF_TYPE3_PROTECTION
3391                                     | SHOST_DIX_TYPE1_PROTECTION
3392                                     | SHOST_DIX_TYPE2_PROTECTION
3393                                     | SHOST_DIX_TYPE3_PROTECTION);
3394
3395                         guard = SHOST_DIX_GUARD_CRC;
3396
3397                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3398                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3399                                 guard |= SHOST_DIX_GUARD_IP;
3400
3401                         if (ql2xprotguard)
3402                                 scsi_host_set_guard(host, ql2xprotguard);
3403                         else
3404                                 scsi_host_set_guard(host, guard);
3405                 } else
3406                         base_vha->flags.difdix_supported = 0;
3407         }
3408
3409         ha->isp_ops->enable_intrs(ha);
3410
3411         if (IS_QLAFX00(ha)) {
3412                 ret = qlafx00_fx_disc(base_vha,
3413                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3414                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3415                     QLA_SG_ALL : 128;
3416         }
3417
3418         ret = scsi_add_host(host, &pdev->dev);
3419         if (ret)
3420                 goto probe_failed;
3421
3422         base_vha->flags.init_done = 1;
3423         base_vha->flags.online = 1;
3424         ha->prev_minidump_failed = 0;
3425
3426         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3427             "Init done and hba is online.\n");
3428
3429         if (qla_ini_mode_enabled(base_vha) ||
3430                 qla_dual_mode_enabled(base_vha))
3431                 scsi_scan_host(host);
3432         else
3433                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3434                         "skipping scsi_scan_host() for non-initiator port\n");
3435
3436         qla2x00_alloc_sysfs_attr(base_vha);
3437
3438         if (IS_QLAFX00(ha)) {
3439                 ret = qlafx00_fx_disc(base_vha,
3440                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3441
3442                 /* Register system information */
3443                 ret =  qlafx00_fx_disc(base_vha,
3444                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3445         }
3446
3447         qla2x00_init_host_attr(base_vha);
3448
3449         qla2x00_dfs_setup(base_vha);
3450
3451         ql_log(ql_log_info, base_vha, 0x00fb,
3452             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3453         ql_log(ql_log_info, base_vha, 0x00fc,
3454             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3455             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3456                                                        sizeof(pci_info)),
3457             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3458             base_vha->host_no,
3459             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3460
3461         qlt_add_target(ha, base_vha);
3462
3463         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3464
3465         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3466                 return -ENODEV;
3467
3468         return 0;
3469
3470 probe_failed:
3471         if (base_vha->gnl.l) {
3472                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3473                                 base_vha->gnl.l, base_vha->gnl.ldma);
3474                 base_vha->gnl.l = NULL;
3475         }
3476
3477         if (base_vha->timer_active)
3478                 qla2x00_stop_timer(base_vha);
3479         base_vha->flags.online = 0;
3480         if (ha->dpc_thread) {
3481                 struct task_struct *t = ha->dpc_thread;
3482
3483                 ha->dpc_thread = NULL;
3484                 kthread_stop(t);
3485         }
3486
3487         qla2x00_free_device(base_vha);
3488         scsi_host_put(base_vha->host);
3489         /*
3490          * Need to NULL out local req/rsp after
3491          * qla2x00_free_device => qla2x00_free_queues frees
3492          * what these are pointing to. Or else we'll
3493          * fall over below in qla2x00_free_req/rsp_que.
3494          */
3495         req = NULL;
3496         rsp = NULL;
3497
3498 probe_hw_failed:
3499         qla2x00_mem_free(ha);
3500         qla2x00_free_req_que(ha, req);
3501         qla2x00_free_rsp_que(ha, rsp);
3502         qla2x00_clear_drv_active(ha);
3503
3504 iospace_config_failed:
3505         if (IS_P3P_TYPE(ha)) {
3506                 if (!ha->nx_pcibase)
3507                         iounmap((device_reg_t *)ha->nx_pcibase);
3508                 if (!ql2xdbwr)
3509                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3510         } else {
3511                 if (ha->iobase)
3512                         iounmap(ha->iobase);
3513                 if (ha->cregbase)
3514                         iounmap(ha->cregbase);
3515         }
3516         pci_release_selected_regions(ha->pdev, ha->bars);
3517         kfree(ha);
3518
3519 disable_device:
3520         pci_disable_device(pdev);
3521         return ret;
3522 }
3523
3524 static void __qla_set_remove_flag(scsi_qla_host_t *base_vha)
3525 {
3526         scsi_qla_host_t *vp;
3527         unsigned long flags;
3528         struct qla_hw_data *ha;
3529
3530         if (!base_vha)
3531                 return;
3532
3533         ha = base_vha->hw;
3534
3535         spin_lock_irqsave(&ha->vport_slock, flags);
3536         list_for_each_entry(vp, &ha->vp_list, list)
3537                 set_bit(PFLG_DRIVER_REMOVING, &vp->pci_flags);
3538
3539         /*
3540          * Indicate device removal to prevent future board_disable
3541          * and wait until any pending board_disable has completed.
3542          */
3543         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3544         spin_unlock_irqrestore(&ha->vport_slock, flags);
3545 }
3546
3547 static void
3548 qla2x00_shutdown(struct pci_dev *pdev)
3549 {
3550         scsi_qla_host_t *vha;
3551         struct qla_hw_data  *ha;
3552
3553         vha = pci_get_drvdata(pdev);
3554         ha = vha->hw;
3555
3556         ql_log(ql_log_info, vha, 0xfffa,
3557                 "Adapter shutdown\n");
3558
3559         /*
3560          * Prevent future board_disable and wait
3561          * until any pending board_disable has completed.
3562          */
3563         __qla_set_remove_flag(vha);
3564         cancel_work_sync(&ha->board_disable);
3565
3566         if (!atomic_read(&pdev->enable_cnt))
3567                 return;
3568
3569         /* Notify ISPFX00 firmware */
3570         if (IS_QLAFX00(ha))
3571                 qlafx00_driver_shutdown(vha, 20);
3572
3573         /* Turn-off FCE trace */
3574         if (ha->flags.fce_enabled) {
3575                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3576                 ha->flags.fce_enabled = 0;
3577         }
3578
3579         /* Turn-off EFT trace */
3580         if (ha->eft)
3581                 qla2x00_disable_eft_trace(vha);
3582
3583         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3584             IS_QLA28XX(ha)) {
3585                 if (ha->flags.fw_started)
3586                         qla2x00_abort_isp_cleanup(vha);
3587         } else {
3588                 /* Stop currently executing firmware. */
3589                 qla2x00_try_to_stop_firmware(vha);
3590         }
3591
3592         /* Disable timer */
3593         if (vha->timer_active)
3594                 qla2x00_stop_timer(vha);
3595
3596         /* Turn adapter off line */
3597         vha->flags.online = 0;
3598
3599         /* turn-off interrupts on the card */
3600         if (ha->interrupts_on) {
3601                 vha->flags.init_done = 0;
3602                 ha->isp_ops->disable_intrs(ha);
3603         }
3604
3605         qla2x00_free_irqs(vha);
3606
3607         qla2x00_free_fw_dump(ha);
3608
3609         pci_disable_device(pdev);
3610         ql_log(ql_log_info, vha, 0xfffe,
3611                 "Adapter shutdown successfully.\n");
3612 }
3613
3614 /* Deletes all the virtual ports for a given ha */
3615 static void
3616 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3617 {
3618         scsi_qla_host_t *vha;
3619         unsigned long flags;
3620
3621         mutex_lock(&ha->vport_lock);
3622         while (ha->cur_vport_count) {
3623                 spin_lock_irqsave(&ha->vport_slock, flags);
3624
3625                 BUG_ON(base_vha->list.next == &ha->vp_list);
3626                 /* This assumes first entry in ha->vp_list is always base vha */
3627                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3628                 scsi_host_get(vha->host);
3629
3630                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3631                 mutex_unlock(&ha->vport_lock);
3632
3633                 qla_nvme_delete(vha);
3634
3635                 fc_vport_terminate(vha->fc_vport);
3636                 scsi_host_put(vha->host);
3637
3638                 mutex_lock(&ha->vport_lock);
3639         }
3640         mutex_unlock(&ha->vport_lock);
3641 }
3642
3643 /* Stops all deferred work threads */
3644 static void
3645 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3646 {
3647         /* Cancel all work and destroy DPC workqueues */
3648         if (ha->dpc_lp_wq) {
3649                 cancel_work_sync(&ha->idc_aen);
3650                 destroy_workqueue(ha->dpc_lp_wq);
3651                 ha->dpc_lp_wq = NULL;
3652         }
3653
3654         if (ha->dpc_hp_wq) {
3655                 cancel_work_sync(&ha->nic_core_reset);
3656                 cancel_work_sync(&ha->idc_state_handler);
3657                 cancel_work_sync(&ha->nic_core_unrecoverable);
3658                 destroy_workqueue(ha->dpc_hp_wq);
3659                 ha->dpc_hp_wq = NULL;
3660         }
3661
3662         /* Kill the kernel thread for this host */
3663         if (ha->dpc_thread) {
3664                 struct task_struct *t = ha->dpc_thread;
3665
3666                 /*
3667                  * qla2xxx_wake_dpc checks for ->dpc_thread
3668                  * so we need to zero it out.
3669                  */
3670                 ha->dpc_thread = NULL;
3671                 kthread_stop(t);
3672         }
3673 }
3674
3675 static void
3676 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3677 {
3678         if (IS_QLA82XX(ha)) {
3679
3680                 iounmap((device_reg_t *)ha->nx_pcibase);
3681                 if (!ql2xdbwr)
3682                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3683         } else {
3684                 if (ha->iobase)
3685                         iounmap(ha->iobase);
3686
3687                 if (ha->cregbase)
3688                         iounmap(ha->cregbase);
3689
3690                 if (ha->mqiobase)
3691                         iounmap(ha->mqiobase);
3692
3693                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
3694                     ha->msixbase)
3695                         iounmap(ha->msixbase);
3696         }
3697 }
3698
3699 static void
3700 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3701 {
3702         if (IS_QLA8044(ha)) {
3703                 qla8044_idc_lock(ha);
3704                 qla8044_clear_drv_active(ha);
3705                 qla8044_idc_unlock(ha);
3706         } else if (IS_QLA82XX(ha)) {
3707                 qla82xx_idc_lock(ha);
3708                 qla82xx_clear_drv_active(ha);
3709                 qla82xx_idc_unlock(ha);
3710         }
3711 }
3712
3713 static void
3714 qla2x00_remove_one(struct pci_dev *pdev)
3715 {
3716         scsi_qla_host_t *base_vha;
3717         struct qla_hw_data  *ha;
3718
3719         base_vha = pci_get_drvdata(pdev);
3720         ha = base_vha->hw;
3721         ql_log(ql_log_info, base_vha, 0xb079,
3722             "Removing driver\n");
3723         __qla_set_remove_flag(base_vha);
3724         cancel_work_sync(&ha->board_disable);
3725
3726         /*
3727          * If the PCI device is disabled then there was a PCI-disconnect and
3728          * qla2x00_disable_board_on_pci_error has taken care of most of the
3729          * resources.
3730          */
3731         if (!atomic_read(&pdev->enable_cnt)) {
3732                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3733                     base_vha->gnl.l, base_vha->gnl.ldma);
3734                 base_vha->gnl.l = NULL;
3735                 scsi_host_put(base_vha->host);
3736                 kfree(ha);
3737                 pci_set_drvdata(pdev, NULL);
3738                 return;
3739         }
3740         qla2x00_wait_for_hba_ready(base_vha);
3741
3742         /*
3743          * if UNLOADING flag is already set, then continue unload,
3744          * where it was set first.
3745          */
3746         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3747                 return;
3748
3749         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3750             IS_QLA28XX(ha)) {
3751                 if (ha->flags.fw_started)
3752                         qla2x00_abort_isp_cleanup(base_vha);
3753         } else if (!IS_QLAFX00(ha)) {
3754                 if (IS_QLA8031(ha)) {
3755                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3756                             "Clearing fcoe driver presence.\n");
3757                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3758                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3759                                     "Error while clearing DRV-Presence.\n");
3760                 }
3761
3762                 qla2x00_try_to_stop_firmware(base_vha);
3763         }
3764
3765         qla2x00_wait_for_sess_deletion(base_vha);
3766
3767         qla_nvme_delete(base_vha);
3768
3769         dma_free_coherent(&ha->pdev->dev,
3770                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3771
3772         base_vha->gnl.l = NULL;
3773
3774         vfree(base_vha->scan.l);
3775
3776         if (IS_QLAFX00(ha))
3777                 qlafx00_driver_shutdown(base_vha, 20);
3778
3779         qla2x00_delete_all_vps(ha, base_vha);
3780
3781         qla2x00_dfs_remove(base_vha);
3782
3783         qla84xx_put_chip(base_vha);
3784
3785         /* Disable timer */
3786         if (base_vha->timer_active)
3787                 qla2x00_stop_timer(base_vha);
3788
3789         base_vha->flags.online = 0;
3790
3791         /* free DMA memory */
3792         if (ha->exlogin_buf)
3793                 qla2x00_free_exlogin_buffer(ha);
3794
3795         /* free DMA memory */
3796         if (ha->exchoffld_buf)
3797                 qla2x00_free_exchoffld_buffer(ha);
3798
3799         qla2x00_destroy_deferred_work(ha);
3800
3801         qlt_remove_target(ha, base_vha);
3802
3803         qla2x00_free_sysfs_attr(base_vha, true);
3804
3805         fc_remove_host(base_vha->host);
3806         qlt_remove_target_resources(ha);
3807
3808         scsi_remove_host(base_vha->host);
3809
3810         qla2x00_free_device(base_vha);
3811
3812         qla2x00_clear_drv_active(ha);
3813
3814         scsi_host_put(base_vha->host);
3815
3816         qla2x00_unmap_iobases(ha);
3817
3818         pci_release_selected_regions(ha->pdev, ha->bars);
3819         kfree(ha);
3820
3821         pci_disable_pcie_error_reporting(pdev);
3822
3823         pci_disable_device(pdev);
3824 }
3825
3826 static inline void
3827 qla24xx_free_purex_list(struct purex_list *list)
3828 {
3829         struct list_head *item, *next;
3830         ulong flags;
3831
3832         spin_lock_irqsave(&list->lock, flags);
3833         list_for_each_safe(item, next, &list->head) {
3834                 list_del(item);
3835                 kfree(list_entry(item, struct purex_item, list));
3836         }
3837         spin_unlock_irqrestore(&list->lock, flags);
3838 }
3839
3840 static void
3841 qla2x00_free_device(scsi_qla_host_t *vha)
3842 {
3843         struct qla_hw_data *ha = vha->hw;
3844
3845         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3846
3847         /* Disable timer */
3848         if (vha->timer_active)
3849                 qla2x00_stop_timer(vha);
3850
3851         qla25xx_delete_queues(vha);
3852         vha->flags.online = 0;
3853
3854         /* turn-off interrupts on the card */
3855         if (ha->interrupts_on) {
3856                 vha->flags.init_done = 0;
3857                 ha->isp_ops->disable_intrs(ha);
3858         }
3859
3860         qla2x00_free_fcports(vha);
3861
3862         qla2x00_free_irqs(vha);
3863
3864         /* Flush the work queue and remove it */
3865         if (ha->wq) {
3866                 flush_workqueue(ha->wq);
3867                 destroy_workqueue(ha->wq);
3868                 ha->wq = NULL;
3869         }
3870
3871
3872         qla24xx_free_purex_list(&vha->purex_list);
3873
3874         qla2x00_mem_free(ha);
3875
3876         qla82xx_md_free(vha);
3877
3878         qla2x00_free_queues(ha);
3879 }
3880
3881 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3882 {
3883         fc_port_t *fcport, *tfcport;
3884
3885         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3886                 qla2x00_free_fcport(fcport);
3887 }
3888
3889 static inline void
3890 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport)
3891 {
3892         int now;
3893
3894         if (!fcport->rport)
3895                 return;
3896
3897         if (fcport->rport) {
3898                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3899                     "%s %8phN. rport %p roles %x\n",
3900                     __func__, fcport->port_name, fcport->rport,
3901                     fcport->rport->roles);
3902                 fc_remote_port_delete(fcport->rport);
3903         }
3904         qlt_do_generation_tick(vha, &now);
3905 }
3906
3907 /*
3908  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3909  *
3910  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3911  *
3912  * Return: None.
3913  *
3914  * Context:
3915  */
3916 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3917     int do_login)
3918 {
3919         if (IS_QLAFX00(vha->hw)) {
3920                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3921                 qla2x00_schedule_rport_del(vha, fcport);
3922                 return;
3923         }
3924
3925         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3926             vha->vp_idx == fcport->vha->vp_idx) {
3927                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3928                 qla2x00_schedule_rport_del(vha, fcport);
3929         }
3930         /*
3931          * We may need to retry the login, so don't change the state of the
3932          * port but do the retries.
3933          */
3934         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3935                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3936
3937         if (!do_login)
3938                 return;
3939
3940         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3941 }
3942
3943 void
3944 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha)
3945 {
3946         fc_port_t *fcport;
3947
3948         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3949             "Mark all dev lost\n");
3950
3951         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3952                 fcport->scan_state = 0;
3953                 qlt_schedule_sess_for_deletion(fcport);
3954         }
3955 }
3956
3957 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
3958 {
3959         int i;
3960
3961         if (IS_FWI2_CAPABLE(ha))
3962                 return;
3963
3964         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
3965                 set_bit(i, ha->loop_id_map);
3966         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
3967         set_bit(BROADCAST, ha->loop_id_map);
3968 }
3969
3970 /*
3971 * qla2x00_mem_alloc
3972 *      Allocates adapter memory.
3973 *
3974 * Returns:
3975 *      0  = success.
3976 *      !0  = failure.
3977 */
3978 static int
3979 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3980         struct req_que **req, struct rsp_que **rsp)
3981 {
3982         char    name[16];
3983
3984         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3985                 &ha->init_cb_dma, GFP_KERNEL);
3986         if (!ha->init_cb)
3987                 goto fail;
3988
3989         if (qlt_mem_alloc(ha) < 0)
3990                 goto fail_free_init_cb;
3991
3992         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3993                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3994         if (!ha->gid_list)
3995                 goto fail_free_tgt_mem;
3996
3997         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3998         if (!ha->srb_mempool)
3999                 goto fail_free_gid_list;
4000
4001         if (IS_P3P_TYPE(ha)) {
4002                 /* Allocate cache for CT6 Ctx. */
4003                 if (!ctx_cachep) {
4004                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
4005                                 sizeof(struct ct6_dsd), 0,
4006                                 SLAB_HWCACHE_ALIGN, NULL);
4007                         if (!ctx_cachep)
4008                                 goto fail_free_srb_mempool;
4009                 }
4010                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
4011                         ctx_cachep);
4012                 if (!ha->ctx_mempool)
4013                         goto fail_free_srb_mempool;
4014                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
4015                     "ctx_cachep=%p ctx_mempool=%p.\n",
4016                     ctx_cachep, ha->ctx_mempool);
4017         }
4018
4019         /* Get memory for cached NVRAM */
4020         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
4021         if (!ha->nvram)
4022                 goto fail_free_ctx_mempool;
4023
4024         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
4025                 ha->pdev->device);
4026         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4027                 DMA_POOL_SIZE, 8, 0);
4028         if (!ha->s_dma_pool)
4029                 goto fail_free_nvram;
4030
4031         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4032             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4033             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4034
4035         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
4036                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4037                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4038                 if (!ha->dl_dma_pool) {
4039                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4040                             "Failed to allocate memory for dl_dma_pool.\n");
4041                         goto fail_s_dma_pool;
4042                 }
4043
4044                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4045                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4046                 if (!ha->fcp_cmnd_dma_pool) {
4047                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4048                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4049                         goto fail_dl_dma_pool;
4050                 }
4051
4052                 if (ql2xenabledif) {
4053                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4054                         struct dsd_dma *dsd, *nxt;
4055                         uint i;
4056                         /* Creata a DMA pool of buffers for DIF bundling */
4057                         ha->dif_bundl_pool = dma_pool_create(name,
4058                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4059                         if (!ha->dif_bundl_pool) {
4060                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4061                                     "%s: failed create dif_bundl_pool\n",
4062                                     __func__);
4063                                 goto fail_dif_bundl_dma_pool;
4064                         }
4065
4066                         INIT_LIST_HEAD(&ha->pool.good.head);
4067                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4068                         ha->pool.good.count = 0;
4069                         ha->pool.unusable.count = 0;
4070                         for (i = 0; i < 128; i++) {
4071                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4072                                 if (!dsd) {
4073                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4074                                             0xe0ee, "%s: failed alloc dsd\n",
4075                                             __func__);
4076                                         return 1;
4077                                 }
4078                                 ha->dif_bundle_kallocs++;
4079
4080                                 dsd->dsd_addr = dma_pool_alloc(
4081                                     ha->dif_bundl_pool, GFP_ATOMIC,
4082                                     &dsd->dsd_list_dma);
4083                                 if (!dsd->dsd_addr) {
4084                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4085                                             0xe0ee,
4086                                             "%s: failed alloc ->dsd_addr\n",
4087                                             __func__);
4088                                         kfree(dsd);
4089                                         ha->dif_bundle_kallocs--;
4090                                         continue;
4091                                 }
4092                                 ha->dif_bundle_dma_allocs++;
4093
4094                                 /*
4095                                  * if DMA buffer crosses 4G boundary,
4096                                  * put it on bad list
4097                                  */
4098                                 if (MSD(dsd->dsd_list_dma) ^
4099                                     MSD(dsd->dsd_list_dma + bufsize)) {
4100                                         list_add_tail(&dsd->list,
4101                                             &ha->pool.unusable.head);
4102                                         ha->pool.unusable.count++;
4103                                 } else {
4104                                         list_add_tail(&dsd->list,
4105                                             &ha->pool.good.head);
4106                                         ha->pool.good.count++;
4107                                 }
4108                         }
4109
4110                         /* return the good ones back to the pool */
4111                         list_for_each_entry_safe(dsd, nxt,
4112                             &ha->pool.good.head, list) {
4113                                 list_del(&dsd->list);
4114                                 dma_pool_free(ha->dif_bundl_pool,
4115                                     dsd->dsd_addr, dsd->dsd_list_dma);
4116                                 ha->dif_bundle_dma_allocs--;
4117                                 kfree(dsd);
4118                                 ha->dif_bundle_kallocs--;
4119                         }
4120
4121                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4122                             "%s: dif dma pool (good=%u unusable=%u)\n",
4123                             __func__, ha->pool.good.count,
4124                             ha->pool.unusable.count);
4125                 }
4126
4127                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4128                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4129                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4130                     ha->dif_bundl_pool);
4131         }
4132
4133         /* Allocate memory for SNS commands */
4134         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4135         /* Get consistent memory allocated for SNS commands */
4136                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4137                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4138                 if (!ha->sns_cmd)
4139                         goto fail_dma_pool;
4140                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4141                     "sns_cmd: %p.\n", ha->sns_cmd);
4142         } else {
4143         /* Get consistent memory allocated for MS IOCB */
4144                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4145                         &ha->ms_iocb_dma);
4146                 if (!ha->ms_iocb)
4147                         goto fail_dma_pool;
4148         /* Get consistent memory allocated for CT SNS commands */
4149                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4150                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4151                 if (!ha->ct_sns)
4152                         goto fail_free_ms_iocb;
4153                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4154                     "ms_iocb=%p ct_sns=%p.\n",
4155                     ha->ms_iocb, ha->ct_sns);
4156         }
4157
4158         /* Allocate memory for request ring */
4159         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4160         if (!*req) {
4161                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4162                     "Failed to allocate memory for req.\n");
4163                 goto fail_req;
4164         }
4165         (*req)->length = req_len;
4166         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4167                 ((*req)->length + 1) * sizeof(request_t),
4168                 &(*req)->dma, GFP_KERNEL);
4169         if (!(*req)->ring) {
4170                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4171                     "Failed to allocate memory for req_ring.\n");
4172                 goto fail_req_ring;
4173         }
4174         /* Allocate memory for response ring */
4175         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4176         if (!*rsp) {
4177                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4178                     "Failed to allocate memory for rsp.\n");
4179                 goto fail_rsp;
4180         }
4181         (*rsp)->hw = ha;
4182         (*rsp)->length = rsp_len;
4183         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4184                 ((*rsp)->length + 1) * sizeof(response_t),
4185                 &(*rsp)->dma, GFP_KERNEL);
4186         if (!(*rsp)->ring) {
4187                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4188                     "Failed to allocate memory for rsp_ring.\n");
4189                 goto fail_rsp_ring;
4190         }
4191         (*req)->rsp = *rsp;
4192         (*rsp)->req = *req;
4193         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4194             "req=%p req->length=%d req->ring=%p rsp=%p "
4195             "rsp->length=%d rsp->ring=%p.\n",
4196             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4197             (*rsp)->ring);
4198         /* Allocate memory for NVRAM data for vports */
4199         if (ha->nvram_npiv_size) {
4200                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4201                                         sizeof(struct qla_npiv_entry),
4202                                         GFP_KERNEL);
4203                 if (!ha->npiv_info) {
4204                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4205                             "Failed to allocate memory for npiv_info.\n");
4206                         goto fail_npiv_info;
4207                 }
4208         } else
4209                 ha->npiv_info = NULL;
4210
4211         /* Get consistent memory allocated for EX-INIT-CB. */
4212         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4213             IS_QLA28XX(ha)) {
4214                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4215                     &ha->ex_init_cb_dma);
4216                 if (!ha->ex_init_cb)
4217                         goto fail_ex_init_cb;
4218                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4219                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4220         }
4221
4222         /* Get consistent memory allocated for Special Features-CB. */
4223         if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4224                 ha->sf_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4225                                                 &ha->sf_init_cb_dma);
4226                 if (!ha->sf_init_cb)
4227                         goto fail_sf_init_cb;
4228                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0199,
4229                            "sf_init_cb=%p.\n", ha->sf_init_cb);
4230         }
4231
4232         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4233
4234         /* Get consistent memory allocated for Async Port-Database. */
4235         if (!IS_FWI2_CAPABLE(ha)) {
4236                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4237                         &ha->async_pd_dma);
4238                 if (!ha->async_pd)
4239                         goto fail_async_pd;
4240                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4241                     "async_pd=%p.\n", ha->async_pd);
4242         }
4243
4244         INIT_LIST_HEAD(&ha->vp_list);
4245
4246         /* Allocate memory for our loop_id bitmap */
4247         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4248                                   sizeof(long),
4249                                   GFP_KERNEL);
4250         if (!ha->loop_id_map)
4251                 goto fail_loop_id_map;
4252         else {
4253                 qla2x00_set_reserved_loop_ids(ha);
4254                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4255                     "loop_id_map=%p.\n", ha->loop_id_map);
4256         }
4257
4258         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4259             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4260         if (!ha->sfp_data) {
4261                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4262                     "Unable to allocate memory for SFP read-data.\n");
4263                 goto fail_sfp_data;
4264         }
4265
4266         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4267             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4268             GFP_KERNEL);
4269         if (!ha->flt) {
4270                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4271                     "Unable to allocate memory for FLT.\n");
4272                 goto fail_flt_buffer;
4273         }
4274
4275         return 0;
4276
4277 fail_flt_buffer:
4278         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4279             ha->sfp_data, ha->sfp_data_dma);
4280 fail_sfp_data:
4281         kfree(ha->loop_id_map);
4282 fail_loop_id_map:
4283         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4284 fail_async_pd:
4285         dma_pool_free(ha->s_dma_pool, ha->sf_init_cb, ha->sf_init_cb_dma);
4286 fail_sf_init_cb:
4287         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4288 fail_ex_init_cb:
4289         kfree(ha->npiv_info);
4290 fail_npiv_info:
4291         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4292                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4293         (*rsp)->ring = NULL;
4294         (*rsp)->dma = 0;
4295 fail_rsp_ring:
4296         kfree(*rsp);
4297         *rsp = NULL;
4298 fail_rsp:
4299         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4300                 sizeof(request_t), (*req)->ring, (*req)->dma);
4301         (*req)->ring = NULL;
4302         (*req)->dma = 0;
4303 fail_req_ring:
4304         kfree(*req);
4305         *req = NULL;
4306 fail_req:
4307         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4308                 ha->ct_sns, ha->ct_sns_dma);
4309         ha->ct_sns = NULL;
4310         ha->ct_sns_dma = 0;
4311 fail_free_ms_iocb:
4312         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4313         ha->ms_iocb = NULL;
4314         ha->ms_iocb_dma = 0;
4315
4316         if (ha->sns_cmd)
4317                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4318                     ha->sns_cmd, ha->sns_cmd_dma);
4319 fail_dma_pool:
4320         if (ql2xenabledif) {
4321                 struct dsd_dma *dsd, *nxt;
4322
4323                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4324                     list) {
4325                         list_del(&dsd->list);
4326                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4327                             dsd->dsd_list_dma);
4328                         ha->dif_bundle_dma_allocs--;
4329                         kfree(dsd);
4330                         ha->dif_bundle_kallocs--;
4331                         ha->pool.unusable.count--;
4332                 }
4333                 dma_pool_destroy(ha->dif_bundl_pool);
4334                 ha->dif_bundl_pool = NULL;
4335         }
4336
4337 fail_dif_bundl_dma_pool:
4338         if (IS_QLA82XX(ha) || ql2xenabledif) {
4339                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4340                 ha->fcp_cmnd_dma_pool = NULL;
4341         }
4342 fail_dl_dma_pool:
4343         if (IS_QLA82XX(ha) || ql2xenabledif) {
4344                 dma_pool_destroy(ha->dl_dma_pool);
4345                 ha->dl_dma_pool = NULL;
4346         }
4347 fail_s_dma_pool:
4348         dma_pool_destroy(ha->s_dma_pool);
4349         ha->s_dma_pool = NULL;
4350 fail_free_nvram:
4351         kfree(ha->nvram);
4352         ha->nvram = NULL;
4353 fail_free_ctx_mempool:
4354         mempool_destroy(ha->ctx_mempool);
4355         ha->ctx_mempool = NULL;
4356 fail_free_srb_mempool:
4357         mempool_destroy(ha->srb_mempool);
4358         ha->srb_mempool = NULL;
4359 fail_free_gid_list:
4360         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4361         ha->gid_list,
4362         ha->gid_list_dma);
4363         ha->gid_list = NULL;
4364         ha->gid_list_dma = 0;
4365 fail_free_tgt_mem:
4366         qlt_mem_free(ha);
4367 fail_free_init_cb:
4368         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4369         ha->init_cb_dma);
4370         ha->init_cb = NULL;
4371         ha->init_cb_dma = 0;
4372 fail:
4373         ql_log(ql_log_fatal, NULL, 0x0030,
4374             "Memory allocation failure.\n");
4375         return -ENOMEM;
4376 }
4377
4378 int
4379 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4380 {
4381         int rval;
4382         uint16_t        size, max_cnt, temp;
4383         struct qla_hw_data *ha = vha->hw;
4384
4385         /* Return if we don't need to alloacate any extended logins */
4386         if (!ql2xexlogins)
4387                 return QLA_SUCCESS;
4388
4389         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4390                 return QLA_SUCCESS;
4391
4392         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4393         max_cnt = 0;
4394         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4395         if (rval != QLA_SUCCESS) {
4396                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4397                     "Failed to get exlogin status.\n");
4398                 return rval;
4399         }
4400
4401         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4402         temp *= size;
4403
4404         if (temp != ha->exlogin_size) {
4405                 qla2x00_free_exlogin_buffer(ha);
4406                 ha->exlogin_size = temp;
4407
4408                 ql_log(ql_log_info, vha, 0xd024,
4409                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4410                     max_cnt, size, temp);
4411
4412                 ql_log(ql_log_info, vha, 0xd025,
4413                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4414
4415                 /* Get consistent memory for extended logins */
4416                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4417                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4418                 if (!ha->exlogin_buf) {
4419                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4420                     "Failed to allocate memory for exlogin_buf_dma.\n");
4421                         return -ENOMEM;
4422                 }
4423         }
4424
4425         /* Now configure the dma buffer */
4426         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4427         if (rval) {
4428                 ql_log(ql_log_fatal, vha, 0xd033,
4429                     "Setup extended login buffer  ****FAILED****.\n");
4430                 qla2x00_free_exlogin_buffer(ha);
4431         }
4432
4433         return rval;
4434 }
4435
4436 /*
4437 * qla2x00_free_exlogin_buffer
4438 *
4439 * Input:
4440 *       ha = adapter block pointer
4441 */
4442 void
4443 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4444 {
4445         if (ha->exlogin_buf) {
4446                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4447                     ha->exlogin_buf, ha->exlogin_buf_dma);
4448                 ha->exlogin_buf = NULL;
4449                 ha->exlogin_size = 0;
4450         }
4451 }
4452
4453 static void
4454 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4455 {
4456         u32 temp;
4457         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4458         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4459
4460         if (max_cnt > vha->hw->max_exchg)
4461                 max_cnt = vha->hw->max_exchg;
4462
4463         if (qla_ini_mode_enabled(vha)) {
4464                 if (vha->ql2xiniexchg > max_cnt)
4465                         vha->ql2xiniexchg = max_cnt;
4466
4467                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4468                         *ret_cnt = vha->ql2xiniexchg;
4469
4470         } else if (qla_tgt_mode_enabled(vha)) {
4471                 if (vha->ql2xexchoffld > max_cnt) {
4472                         vha->ql2xexchoffld = max_cnt;
4473                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4474                 }
4475
4476                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4477                         *ret_cnt = vha->ql2xexchoffld;
4478         } else if (qla_dual_mode_enabled(vha)) {
4479                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4480                 if (temp > max_cnt) {
4481                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4482                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4483                         temp = max_cnt;
4484                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4485                 }
4486
4487                 if (temp > FW_DEF_EXCHANGES_CNT)
4488                         *ret_cnt = temp;
4489         }
4490 }
4491
4492 int
4493 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4494 {
4495         int rval;
4496         u16     size, max_cnt;
4497         u32 actual_cnt, totsz;
4498         struct qla_hw_data *ha = vha->hw;
4499
4500         if (!ha->flags.exchoffld_enabled)
4501                 return QLA_SUCCESS;
4502
4503         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4504                 return QLA_SUCCESS;
4505
4506         max_cnt = 0;
4507         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4508         if (rval != QLA_SUCCESS) {
4509                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4510                     "Failed to get exlogin status.\n");
4511                 return rval;
4512         }
4513
4514         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4515         ql_log(ql_log_info, vha, 0xd014,
4516             "Actual exchange offload count: %d.\n", actual_cnt);
4517
4518         totsz = actual_cnt * size;
4519
4520         if (totsz != ha->exchoffld_size) {
4521                 qla2x00_free_exchoffld_buffer(ha);
4522                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4523                         ha->exchoffld_size = 0;
4524                         ha->flags.exchoffld_enabled = 0;
4525                         return QLA_SUCCESS;
4526                 }
4527
4528                 ha->exchoffld_size = totsz;
4529
4530                 ql_log(ql_log_info, vha, 0xd016,
4531                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4532                     max_cnt, actual_cnt, size, totsz);
4533
4534                 ql_log(ql_log_info, vha, 0xd017,
4535                     "Exchange Buffers requested size = 0x%x\n",
4536                     ha->exchoffld_size);
4537
4538                 /* Get consistent memory for extended logins */
4539                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4540                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4541                 if (!ha->exchoffld_buf) {
4542                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4543                         "Failed to allocate memory for Exchange Offload.\n");
4544
4545                         if (ha->max_exchg >
4546                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4547                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4548                         } else if (ha->max_exchg >
4549                             (FW_DEF_EXCHANGES_CNT + 512)) {
4550                                 ha->max_exchg -= 512;
4551                         } else {
4552                                 ha->flags.exchoffld_enabled = 0;
4553                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4554                                     "Disabling Exchange offload due to lack of memory\n");
4555                         }
4556                         ha->exchoffld_size = 0;
4557
4558                         return -ENOMEM;
4559                 }
4560         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4561                 /* pathological case */
4562                 qla2x00_free_exchoffld_buffer(ha);
4563                 ha->exchoffld_size = 0;
4564                 ha->flags.exchoffld_enabled = 0;
4565                 ql_log(ql_log_info, vha, 0xd016,
4566                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4567                     ha->exchoffld_size, actual_cnt, size, totsz);
4568                 return 0;
4569         }
4570
4571         /* Now configure the dma buffer */
4572         rval = qla_set_exchoffld_mem_cfg(vha);
4573         if (rval) {
4574                 ql_log(ql_log_fatal, vha, 0xd02e,
4575                     "Setup exchange offload buffer ****FAILED****.\n");
4576                 qla2x00_free_exchoffld_buffer(ha);
4577         } else {
4578                 /* re-adjust number of target exchange */
4579                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4580
4581                 if (qla_ini_mode_enabled(vha))
4582                         icb->exchange_count = 0;
4583                 else
4584                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4585         }
4586
4587         return rval;
4588 }
4589
4590 /*
4591 * qla2x00_free_exchoffld_buffer
4592 *
4593 * Input:
4594 *       ha = adapter block pointer
4595 */
4596 void
4597 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4598 {
4599         if (ha->exchoffld_buf) {
4600                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4601                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4602                 ha->exchoffld_buf = NULL;
4603                 ha->exchoffld_size = 0;
4604         }
4605 }
4606
4607 /*
4608 * qla2x00_free_fw_dump
4609 *       Frees fw dump stuff.
4610 *
4611 * Input:
4612 *       ha = adapter block pointer
4613 */
4614 static void
4615 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4616 {
4617         struct fwdt *fwdt = ha->fwdt;
4618         uint j;
4619
4620         if (ha->fce)
4621                 dma_free_coherent(&ha->pdev->dev,
4622                     FCE_SIZE, ha->fce, ha->fce_dma);
4623
4624         if (ha->eft)
4625                 dma_free_coherent(&ha->pdev->dev,
4626                     EFT_SIZE, ha->eft, ha->eft_dma);
4627
4628         if (ha->fw_dump)
4629                 vfree(ha->fw_dump);
4630
4631         ha->fce = NULL;
4632         ha->fce_dma = 0;
4633         ha->flags.fce_enabled = 0;
4634         ha->eft = NULL;
4635         ha->eft_dma = 0;
4636         ha->fw_dumped = false;
4637         ha->fw_dump_cap_flags = 0;
4638         ha->fw_dump_reading = 0;
4639         ha->fw_dump = NULL;
4640         ha->fw_dump_len = 0;
4641
4642         for (j = 0; j < 2; j++, fwdt++) {
4643                 if (fwdt->template)
4644                         vfree(fwdt->template);
4645                 fwdt->template = NULL;
4646                 fwdt->length = 0;
4647         }
4648 }
4649
4650 /*
4651 * qla2x00_mem_free
4652 *      Frees all adapter allocated memory.
4653 *
4654 * Input:
4655 *      ha = adapter block pointer.
4656 */
4657 static void
4658 qla2x00_mem_free(struct qla_hw_data *ha)
4659 {
4660         qla2x00_free_fw_dump(ha);
4661
4662         if (ha->mctp_dump)
4663                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4664                     ha->mctp_dump_dma);
4665         ha->mctp_dump = NULL;
4666
4667         mempool_destroy(ha->srb_mempool);
4668         ha->srb_mempool = NULL;
4669
4670         if (ha->dcbx_tlv)
4671                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4672                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4673         ha->dcbx_tlv = NULL;
4674
4675         if (ha->xgmac_data)
4676                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4677                     ha->xgmac_data, ha->xgmac_data_dma);
4678         ha->xgmac_data = NULL;
4679
4680         if (ha->sns_cmd)
4681                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4682                 ha->sns_cmd, ha->sns_cmd_dma);
4683         ha->sns_cmd = NULL;
4684         ha->sns_cmd_dma = 0;
4685
4686         if (ha->ct_sns)
4687                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4688                 ha->ct_sns, ha->ct_sns_dma);
4689         ha->ct_sns = NULL;
4690         ha->ct_sns_dma = 0;
4691
4692         if (ha->sfp_data)
4693                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4694                     ha->sfp_data_dma);
4695         ha->sfp_data = NULL;
4696
4697         if (ha->flt)
4698                 dma_free_coherent(&ha->pdev->dev,
4699                     sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE,
4700                     ha->flt, ha->flt_dma);
4701         ha->flt = NULL;
4702         ha->flt_dma = 0;
4703
4704         if (ha->ms_iocb)
4705                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4706         ha->ms_iocb = NULL;
4707         ha->ms_iocb_dma = 0;
4708
4709         if (ha->sf_init_cb)
4710                 dma_pool_free(ha->s_dma_pool,
4711                               ha->sf_init_cb, ha->sf_init_cb_dma);
4712
4713         if (ha->ex_init_cb)
4714                 dma_pool_free(ha->s_dma_pool,
4715                         ha->ex_init_cb, ha->ex_init_cb_dma);
4716         ha->ex_init_cb = NULL;
4717         ha->ex_init_cb_dma = 0;
4718
4719         if (ha->async_pd)
4720                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4721         ha->async_pd = NULL;
4722         ha->async_pd_dma = 0;
4723
4724         dma_pool_destroy(ha->s_dma_pool);
4725         ha->s_dma_pool = NULL;
4726
4727         if (ha->gid_list)
4728                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4729                 ha->gid_list, ha->gid_list_dma);
4730         ha->gid_list = NULL;
4731         ha->gid_list_dma = 0;
4732
4733         if (IS_QLA82XX(ha)) {
4734                 if (!list_empty(&ha->gbl_dsd_list)) {
4735                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4736
4737                         /* clean up allocated prev pool */
4738                         list_for_each_entry_safe(dsd_ptr,
4739                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4740                                 dma_pool_free(ha->dl_dma_pool,
4741                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4742                                 list_del(&dsd_ptr->list);
4743                                 kfree(dsd_ptr);
4744                         }
4745                 }
4746         }
4747
4748         dma_pool_destroy(ha->dl_dma_pool);
4749         ha->dl_dma_pool = NULL;
4750
4751         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4752         ha->fcp_cmnd_dma_pool = NULL;
4753
4754         mempool_destroy(ha->ctx_mempool);
4755         ha->ctx_mempool = NULL;
4756
4757         if (ql2xenabledif && ha->dif_bundl_pool) {
4758                 struct dsd_dma *dsd, *nxt;
4759
4760                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4761                                          list) {
4762                         list_del(&dsd->list);
4763                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4764                                       dsd->dsd_list_dma);
4765                         ha->dif_bundle_dma_allocs--;
4766                         kfree(dsd);
4767                         ha->dif_bundle_kallocs--;
4768                         ha->pool.unusable.count--;
4769                 }
4770                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4771                         list_del(&dsd->list);
4772                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4773                                       dsd->dsd_list_dma);
4774                         ha->dif_bundle_dma_allocs--;
4775                         kfree(dsd);
4776                         ha->dif_bundle_kallocs--;
4777                 }
4778         }
4779
4780         dma_pool_destroy(ha->dif_bundl_pool);
4781         ha->dif_bundl_pool = NULL;
4782
4783         qlt_mem_free(ha);
4784
4785         if (ha->init_cb)
4786                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4787                         ha->init_cb, ha->init_cb_dma);
4788         ha->init_cb = NULL;
4789         ha->init_cb_dma = 0;
4790
4791         vfree(ha->optrom_buffer);
4792         ha->optrom_buffer = NULL;
4793         kfree(ha->nvram);
4794         ha->nvram = NULL;
4795         kfree(ha->npiv_info);
4796         ha->npiv_info = NULL;
4797         kfree(ha->swl);
4798         ha->swl = NULL;
4799         kfree(ha->loop_id_map);
4800         ha->sf_init_cb = NULL;
4801         ha->sf_init_cb_dma = 0;
4802         ha->loop_id_map = NULL;
4803 }
4804
4805 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4806                                                 struct qla_hw_data *ha)
4807 {
4808         struct Scsi_Host *host;
4809         struct scsi_qla_host *vha = NULL;
4810
4811         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4812         if (!host) {
4813                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4814                     "Failed to allocate host from the scsi layer, aborting.\n");
4815                 return NULL;
4816         }
4817
4818         /* Clear our data area */
4819         vha = shost_priv(host);
4820         memset(vha, 0, sizeof(scsi_qla_host_t));
4821
4822         vha->host = host;
4823         vha->host_no = host->host_no;
4824         vha->hw = ha;
4825
4826         vha->qlini_mode = ql2x_ini_mode;
4827         vha->ql2xexchoffld = ql2xexchoffld;
4828         vha->ql2xiniexchg = ql2xiniexchg;
4829
4830         INIT_LIST_HEAD(&vha->vp_fcports);
4831         INIT_LIST_HEAD(&vha->work_list);
4832         INIT_LIST_HEAD(&vha->list);
4833         INIT_LIST_HEAD(&vha->qla_cmd_list);
4834         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4835         INIT_LIST_HEAD(&vha->logo_list);
4836         INIT_LIST_HEAD(&vha->plogi_ack_list);
4837         INIT_LIST_HEAD(&vha->qp_list);
4838         INIT_LIST_HEAD(&vha->gnl.fcports);
4839         INIT_LIST_HEAD(&vha->gpnid_list);
4840         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4841
4842         INIT_LIST_HEAD(&vha->purex_list.head);
4843         spin_lock_init(&vha->purex_list.lock);
4844
4845         spin_lock_init(&vha->work_lock);
4846         spin_lock_init(&vha->cmd_list_lock);
4847         init_waitqueue_head(&vha->fcport_waitQ);
4848         init_waitqueue_head(&vha->vref_waitq);
4849
4850         vha->gnl.size = sizeof(struct get_name_list_extended) *
4851                         (ha->max_loop_id + 1);
4852         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4853             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4854         if (!vha->gnl.l) {
4855                 ql_log(ql_log_fatal, vha, 0xd04a,
4856                     "Alloc failed for name list.\n");
4857                 scsi_host_put(vha->host);
4858                 return NULL;
4859         }
4860
4861         /* todo: what about ext login? */
4862         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4863         vha->scan.l = vmalloc(vha->scan.size);
4864         if (!vha->scan.l) {
4865                 ql_log(ql_log_fatal, vha, 0xd04a,
4866                     "Alloc failed for scan database.\n");
4867                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4868                     vha->gnl.l, vha->gnl.ldma);
4869                 vha->gnl.l = NULL;
4870                 scsi_host_put(vha->host);
4871                 return NULL;
4872         }
4873         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4874
4875         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4876         ql_dbg(ql_dbg_init, vha, 0x0041,
4877             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4878             vha->host, vha->hw, vha,
4879             dev_name(&(ha->pdev->dev)));
4880
4881         return vha;
4882 }
4883
4884 struct qla_work_evt *
4885 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4886 {
4887         struct qla_work_evt *e;
4888         uint8_t bail;
4889
4890         if (test_bit(UNLOADING, &vha->dpc_flags))
4891                 return NULL;
4892
4893         QLA_VHA_MARK_BUSY(vha, bail);
4894         if (bail)
4895                 return NULL;
4896
4897         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4898         if (!e) {
4899                 QLA_VHA_MARK_NOT_BUSY(vha);
4900                 return NULL;
4901         }
4902
4903         INIT_LIST_HEAD(&e->list);
4904         e->type = type;
4905         e->flags = QLA_EVT_FLAG_FREE;
4906         return e;
4907 }
4908
4909 int
4910 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4911 {
4912         unsigned long flags;
4913         bool q = false;
4914
4915         spin_lock_irqsave(&vha->work_lock, flags);
4916         list_add_tail(&e->list, &vha->work_list);
4917
4918         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4919                 q = true;
4920
4921         spin_unlock_irqrestore(&vha->work_lock, flags);
4922
4923         if (q)
4924                 queue_work(vha->hw->wq, &vha->iocb_work);
4925
4926         return QLA_SUCCESS;
4927 }
4928
4929 int
4930 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4931     u32 data)
4932 {
4933         struct qla_work_evt *e;
4934
4935         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4936         if (!e)
4937                 return QLA_FUNCTION_FAILED;
4938
4939         e->u.aen.code = code;
4940         e->u.aen.data = data;
4941         return qla2x00_post_work(vha, e);
4942 }
4943
4944 int
4945 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4946 {
4947         struct qla_work_evt *e;
4948
4949         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4950         if (!e)
4951                 return QLA_FUNCTION_FAILED;
4952
4953         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4954         return qla2x00_post_work(vha, e);
4955 }
4956
4957 #define qla2x00_post_async_work(name, type)     \
4958 int qla2x00_post_async_##name##_work(           \
4959     struct scsi_qla_host *vha,                  \
4960     fc_port_t *fcport, uint16_t *data)          \
4961 {                                               \
4962         struct qla_work_evt *e;                 \
4963                                                 \
4964         e = qla2x00_alloc_work(vha, type);      \
4965         if (!e)                                 \
4966                 return QLA_FUNCTION_FAILED;     \
4967                                                 \
4968         e->u.logio.fcport = fcport;             \
4969         if (data) {                             \
4970                 e->u.logio.data[0] = data[0];   \
4971                 e->u.logio.data[1] = data[1];   \
4972         }                                       \
4973         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4974         return qla2x00_post_work(vha, e);       \
4975 }
4976
4977 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4978 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4979 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4980 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4981 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4982
4983 int
4984 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4985 {
4986         struct qla_work_evt *e;
4987
4988         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4989         if (!e)
4990                 return QLA_FUNCTION_FAILED;
4991
4992         e->u.uevent.code = code;
4993         return qla2x00_post_work(vha, e);
4994 }
4995
4996 static void
4997 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4998 {
4999         char event_string[40];
5000         char *envp[] = { event_string, NULL };
5001
5002         switch (code) {
5003         case QLA_UEVENT_CODE_FW_DUMP:
5004                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
5005                     vha->host_no);
5006                 break;
5007         default:
5008                 /* do nothing */
5009                 break;
5010         }
5011         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
5012 }
5013
5014 int
5015 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
5016                         uint32_t *data, int cnt)
5017 {
5018         struct qla_work_evt *e;
5019
5020         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
5021         if (!e)
5022                 return QLA_FUNCTION_FAILED;
5023
5024         e->u.aenfx.evtcode = evtcode;
5025         e->u.aenfx.count = cnt;
5026         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
5027         return qla2x00_post_work(vha, e);
5028 }
5029
5030 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
5031 {
5032         unsigned long flags;
5033
5034         if (IS_SW_RESV_ADDR(fcport->d_id))
5035                 return;
5036
5037         spin_lock_irqsave(&fcport->vha->work_lock, flags);
5038         if (fcport->disc_state == DSC_UPD_FCPORT) {
5039                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5040                 return;
5041         }
5042         fcport->jiffies_at_registration = jiffies;
5043         fcport->sec_since_registration = 0;
5044         fcport->next_disc_state = DSC_DELETED;
5045         qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5046         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5047
5048         queue_work(system_unbound_wq, &fcport->reg_work);
5049 }
5050
5051 static
5052 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5053 {
5054         unsigned long flags;
5055         fc_port_t *fcport =  NULL, *tfcp;
5056         struct qlt_plogi_ack_t *pla =
5057             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5058         uint8_t free_fcport = 0;
5059
5060         ql_dbg(ql_dbg_disc, vha, 0xffff,
5061             "%s %d %8phC enter\n",
5062             __func__, __LINE__, e->u.new_sess.port_name);
5063
5064         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5065         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5066         if (fcport) {
5067                 fcport->d_id = e->u.new_sess.id;
5068                 if (pla) {
5069                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5070                         memcpy(fcport->node_name,
5071                             pla->iocb.u.isp24.u.plogi.node_name,
5072                             WWN_SIZE);
5073                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5074                         /* we took an extra ref_count to prevent PLOGI ACK when
5075                          * fcport/sess has not been created.
5076                          */
5077                         pla->ref_count--;
5078                 }
5079         } else {
5080                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5081                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5082                 if (fcport) {
5083                         fcport->d_id = e->u.new_sess.id;
5084                         fcport->flags |= FCF_FABRIC_DEVICE;
5085                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5086
5087                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5088                             WWN_SIZE);
5089
5090                         fcport->fc4_type = e->u.new_sess.fc4_type;
5091                         if (e->u.new_sess.fc4_type & FS_FCP_IS_N2N) {
5092                                 fcport->fc4_type = FS_FC4TYPE_FCP;
5093                                 fcport->n2n_flag = 1;
5094                                 if (vha->flags.nvme_enabled)
5095                                         fcport->fc4_type |= FS_FC4TYPE_NVME;
5096                         }
5097
5098                 } else {
5099                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5100                                    "%s %8phC mem alloc fail.\n",
5101                                    __func__, e->u.new_sess.port_name);
5102
5103                         if (pla) {
5104                                 list_del(&pla->list);
5105                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5106                         }
5107                         return;
5108                 }
5109
5110                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5111                 /* search again to make sure no one else got ahead */
5112                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5113                     e->u.new_sess.port_name, 1);
5114                 if (tfcp) {
5115                         /* should rarily happen */
5116                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5117                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5118                             __func__, tfcp->port_name, tfcp->disc_state,
5119                             tfcp->fw_login_state);
5120
5121                         free_fcport = 1;
5122                 } else {
5123                         list_add_tail(&fcport->list, &vha->vp_fcports);
5124
5125                 }
5126                 if (pla) {
5127                         qlt_plogi_ack_link(vha, pla, fcport,
5128                             QLT_PLOGI_LINK_SAME_WWN);
5129                         pla->ref_count--;
5130                 }
5131         }
5132         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5133
5134         if (fcport) {
5135                 fcport->id_changed = 1;
5136                 fcport->scan_state = QLA_FCPORT_FOUND;
5137                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5138                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5139
5140                 if (pla) {
5141                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5142                                 u16 wd3_lo;
5143
5144                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5145                                 fcport->local = 0;
5146                                 fcport->loop_id =
5147                                         le16_to_cpu(
5148                                             pla->iocb.u.isp24.nport_handle);
5149                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5150                                 wd3_lo =
5151                                     le16_to_cpu(
5152                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5153
5154                                 if (wd3_lo & BIT_7)
5155                                         fcport->conf_compl_supported = 1;
5156
5157                                 if ((wd3_lo & BIT_4) == 0)
5158                                         fcport->port_type = FCT_INITIATOR;
5159                                 else
5160                                         fcport->port_type = FCT_TARGET;
5161                         }
5162                         qlt_plogi_ack_unref(vha, pla);
5163                 } else {
5164                         fc_port_t *dfcp = NULL;
5165
5166                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5167                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5168                             &e->u.new_sess.id, 1);
5169                         if (tfcp && (tfcp != fcport)) {
5170                                 /*
5171                                  * We have a conflict fcport with same NportID.
5172                                  */
5173                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5174                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5175                                     __func__, tfcp->port_name, tfcp->disc_state,
5176                                     tfcp->fw_login_state);
5177
5178                                 switch (tfcp->disc_state) {
5179                                 case DSC_DELETED:
5180                                         break;
5181                                 case DSC_DELETE_PEND:
5182                                         fcport->login_pause = 1;
5183                                         tfcp->conflict = fcport;
5184                                         break;
5185                                 default:
5186                                         fcport->login_pause = 1;
5187                                         tfcp->conflict = fcport;
5188                                         dfcp = tfcp;
5189                                         break;
5190                                 }
5191                         }
5192                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5193                         if (dfcp)
5194                                 qlt_schedule_sess_for_deletion(tfcp);
5195
5196                         if (N2N_TOPO(vha->hw)) {
5197                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5198                                 fcport->keep_nport_handle = 1;
5199                                 if (vha->flags.nvme_enabled) {
5200                                         fcport->fc4_type =
5201                                             (FS_FC4TYPE_NVME | FS_FC4TYPE_FCP);
5202                                         fcport->n2n_flag = 1;
5203                                 }
5204                                 fcport->fw_login_state = 0;
5205
5206                                 schedule_delayed_work(&vha->scan.scan_work, 5);
5207                         } else {
5208                                 qla24xx_fcport_handle_login(vha, fcport);
5209                         }
5210                 }
5211         }
5212
5213         if (free_fcport) {
5214                 qla2x00_free_fcport(fcport);
5215                 if (pla) {
5216                         list_del(&pla->list);
5217                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5218                 }
5219         }
5220 }
5221
5222 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5223 {
5224         struct srb *sp = e->u.iosb.sp;
5225         int rval;
5226
5227         rval = qla2x00_start_sp(sp);
5228         if (rval != QLA_SUCCESS) {
5229                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5230                     "%s: %s: Re-issue IOCB failed (%d).\n",
5231                     __func__, sp->name, rval);
5232                 qla24xx_sp_unmap(vha, sp);
5233         }
5234 }
5235
5236 void
5237 qla2x00_do_work(struct scsi_qla_host *vha)
5238 {
5239         struct qla_work_evt *e, *tmp;
5240         unsigned long flags;
5241         LIST_HEAD(work);
5242         int rc;
5243
5244         spin_lock_irqsave(&vha->work_lock, flags);
5245         list_splice_init(&vha->work_list, &work);
5246         spin_unlock_irqrestore(&vha->work_lock, flags);
5247
5248         list_for_each_entry_safe(e, tmp, &work, list) {
5249                 rc = QLA_SUCCESS;
5250                 switch (e->type) {
5251                 case QLA_EVT_AEN:
5252                         fc_host_post_event(vha->host, fc_get_event_number(),
5253                             e->u.aen.code, e->u.aen.data);
5254                         break;
5255                 case QLA_EVT_IDC_ACK:
5256                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5257                         break;
5258                 case QLA_EVT_ASYNC_LOGIN:
5259                         qla2x00_async_login(vha, e->u.logio.fcport,
5260                             e->u.logio.data);
5261                         break;
5262                 case QLA_EVT_ASYNC_LOGOUT:
5263                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5264                         break;
5265                 case QLA_EVT_ASYNC_ADISC:
5266                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5267                             e->u.logio.data);
5268                         break;
5269                 case QLA_EVT_UEVENT:
5270                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5271                         break;
5272                 case QLA_EVT_AENFX:
5273                         qlafx00_process_aen(vha, e);
5274                         break;
5275                 case QLA_EVT_GPNID:
5276                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5277                         break;
5278                 case QLA_EVT_UNMAP:
5279                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5280                         break;
5281                 case QLA_EVT_RELOGIN:
5282                         qla2x00_relogin(vha);
5283                         break;
5284                 case QLA_EVT_NEW_SESS:
5285                         qla24xx_create_new_sess(vha, e);
5286                         break;
5287                 case QLA_EVT_GPDB:
5288                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5289                             e->u.fcport.opt);
5290                         break;
5291                 case QLA_EVT_PRLI:
5292                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5293                         break;
5294                 case QLA_EVT_GPSC:
5295                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5296                         break;
5297                 case QLA_EVT_GNL:
5298                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5299                         break;
5300                 case QLA_EVT_NACK:
5301                         qla24xx_do_nack_work(vha, e);
5302                         break;
5303                 case QLA_EVT_ASYNC_PRLO:
5304                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5305                         break;
5306                 case QLA_EVT_ASYNC_PRLO_DONE:
5307                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5308                             e->u.logio.data);
5309                         break;
5310                 case QLA_EVT_GPNFT:
5311                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5312                             e->u.gpnft.sp);
5313                         break;
5314                 case QLA_EVT_GPNFT_DONE:
5315                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5316                         break;
5317                 case QLA_EVT_GNNFT_DONE:
5318                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5319                         break;
5320                 case QLA_EVT_GNNID:
5321                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5322                         break;
5323                 case QLA_EVT_GFPNID:
5324                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5325                         break;
5326                 case QLA_EVT_SP_RETRY:
5327                         qla_sp_retry(vha, e);
5328                         break;
5329                 case QLA_EVT_IIDMA:
5330                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5331                         break;
5332                 case QLA_EVT_ELS_PLOGI:
5333                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5334                             e->u.fcport.fcport, false);
5335                         break;
5336                 }
5337
5338                 if (rc == EAGAIN) {
5339                         /* put 'work' at head of 'vha->work_list' */
5340                         spin_lock_irqsave(&vha->work_lock, flags);
5341                         list_splice(&work, &vha->work_list);
5342                         spin_unlock_irqrestore(&vha->work_lock, flags);
5343                         break;
5344                 }
5345                 list_del_init(&e->list);
5346                 if (e->flags & QLA_EVT_FLAG_FREE)
5347                         kfree(e);
5348
5349                 /* For each work completed decrement vha ref count */
5350                 QLA_VHA_MARK_NOT_BUSY(vha);
5351         }
5352 }
5353
5354 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5355 {
5356         struct qla_work_evt *e;
5357
5358         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5359
5360         if (!e) {
5361                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5362                 return QLA_FUNCTION_FAILED;
5363         }
5364
5365         return qla2x00_post_work(vha, e);
5366 }
5367
5368 /* Relogins all the fcports of a vport
5369  * Context: dpc thread
5370  */
5371 void qla2x00_relogin(struct scsi_qla_host *vha)
5372 {
5373         fc_port_t       *fcport;
5374         int status, relogin_needed = 0;
5375         struct event_arg ea;
5376
5377         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5378                 /*
5379                  * If the port is not ONLINE then try to login
5380                  * to it if we haven't run out of retries.
5381                  */
5382                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5383                     fcport->login_retry) {
5384                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5385                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5386                                 continue;
5387
5388                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5389                                 fcport->disc_state == DSC_DELETE_PEND) {
5390                                 relogin_needed = 1;
5391                         } else {
5392                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5393                                         memset(&ea, 0, sizeof(ea));
5394                                         ea.fcport = fcport;
5395                                         qla24xx_handle_relogin_event(vha, &ea);
5396                                 } else if (vha->hw->current_topology ==
5397                                     ISP_CFG_NL) {
5398                                         fcport->login_retry--;
5399                                         status =
5400                                             qla2x00_local_device_login(vha,
5401                                                 fcport);
5402                                         if (status == QLA_SUCCESS) {
5403                                                 fcport->old_loop_id =
5404                                                     fcport->loop_id;
5405                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5406                                                     "Port login OK: logged in ID 0x%x.\n",
5407                                                     fcport->loop_id);
5408                                                 qla2x00_update_fcport
5409                                                         (vha, fcport);
5410                                         } else if (status == 1) {
5411                                                 set_bit(RELOGIN_NEEDED,
5412                                                     &vha->dpc_flags);
5413                                                 /* retry the login again */
5414                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5415                                                     "Retrying %d login again loop_id 0x%x.\n",
5416                                                     fcport->login_retry,
5417                                                     fcport->loop_id);
5418                                         } else {
5419                                                 fcport->login_retry = 0;
5420                                         }
5421
5422                                         if (fcport->login_retry == 0 &&
5423                                             status != QLA_SUCCESS)
5424                                                 qla2x00_clear_loop_id(fcport);
5425                                 }
5426                         }
5427                 }
5428                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5429                         break;
5430         }
5431
5432         if (relogin_needed)
5433                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5434
5435         ql_dbg(ql_dbg_disc, vha, 0x400e,
5436             "Relogin end.\n");
5437 }
5438
5439 /* Schedule work on any of the dpc-workqueues */
5440 void
5441 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5442 {
5443         struct qla_hw_data *ha = base_vha->hw;
5444
5445         switch (work_code) {
5446         case MBA_IDC_AEN: /* 0x8200 */
5447                 if (ha->dpc_lp_wq)
5448                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5449                 break;
5450
5451         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5452                 if (!ha->flags.nic_core_reset_hdlr_active) {
5453                         if (ha->dpc_hp_wq)
5454                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5455                 } else
5456                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5457                             "NIC Core reset is already active. Skip "
5458                             "scheduling it again.\n");
5459                 break;
5460         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5461                 if (ha->dpc_hp_wq)
5462                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5463                 break;
5464         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5465                 if (ha->dpc_hp_wq)
5466                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5467                 break;
5468         default:
5469                 ql_log(ql_log_warn, base_vha, 0xb05f,
5470                     "Unknown work-code=0x%x.\n", work_code);
5471         }
5472
5473         return;
5474 }
5475
5476 /* Work: Perform NIC Core Unrecoverable state handling */
5477 void
5478 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5479 {
5480         struct qla_hw_data *ha =
5481                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5482         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5483         uint32_t dev_state = 0;
5484
5485         qla83xx_idc_lock(base_vha, 0);
5486         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5487         qla83xx_reset_ownership(base_vha);
5488         if (ha->flags.nic_core_reset_owner) {
5489                 ha->flags.nic_core_reset_owner = 0;
5490                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5491                     QLA8XXX_DEV_FAILED);
5492                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5493                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5494         }
5495         qla83xx_idc_unlock(base_vha, 0);
5496 }
5497
5498 /* Work: Execute IDC state handler */
5499 void
5500 qla83xx_idc_state_handler_work(struct work_struct *work)
5501 {
5502         struct qla_hw_data *ha =
5503                 container_of(work, struct qla_hw_data, idc_state_handler);
5504         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5505         uint32_t dev_state = 0;
5506
5507         qla83xx_idc_lock(base_vha, 0);
5508         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5509         if (dev_state == QLA8XXX_DEV_FAILED ||
5510                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5511                 qla83xx_idc_state_handler(base_vha);
5512         qla83xx_idc_unlock(base_vha, 0);
5513 }
5514
5515 static int
5516 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5517 {
5518         int rval = QLA_SUCCESS;
5519         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5520         uint32_t heart_beat_counter1, heart_beat_counter2;
5521
5522         do {
5523                 if (time_after(jiffies, heart_beat_wait)) {
5524                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5525                             "Nic Core f/w is not alive.\n");
5526                         rval = QLA_FUNCTION_FAILED;
5527                         break;
5528                 }
5529
5530                 qla83xx_idc_lock(base_vha, 0);
5531                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5532                     &heart_beat_counter1);
5533                 qla83xx_idc_unlock(base_vha, 0);
5534                 msleep(100);
5535                 qla83xx_idc_lock(base_vha, 0);
5536                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5537                     &heart_beat_counter2);
5538                 qla83xx_idc_unlock(base_vha, 0);
5539         } while (heart_beat_counter1 == heart_beat_counter2);
5540
5541         return rval;
5542 }
5543
5544 /* Work: Perform NIC Core Reset handling */
5545 void
5546 qla83xx_nic_core_reset_work(struct work_struct *work)
5547 {
5548         struct qla_hw_data *ha =
5549                 container_of(work, struct qla_hw_data, nic_core_reset);
5550         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5551         uint32_t dev_state = 0;
5552
5553         if (IS_QLA2031(ha)) {
5554                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5555                         ql_log(ql_log_warn, base_vha, 0xb081,
5556                             "Failed to dump mctp\n");
5557                 return;
5558         }
5559
5560         if (!ha->flags.nic_core_reset_hdlr_active) {
5561                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5562                         qla83xx_idc_lock(base_vha, 0);
5563                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5564                             &dev_state);
5565                         qla83xx_idc_unlock(base_vha, 0);
5566                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5567                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5568                                     "Nic Core f/w is alive.\n");
5569                                 return;
5570                         }
5571                 }
5572
5573                 ha->flags.nic_core_reset_hdlr_active = 1;
5574                 if (qla83xx_nic_core_reset(base_vha)) {
5575                         /* NIC Core reset failed. */
5576                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5577                             "NIC Core reset failed.\n");
5578                 }
5579                 ha->flags.nic_core_reset_hdlr_active = 0;
5580         }
5581 }
5582
5583 /* Work: Handle 8200 IDC aens */
5584 void
5585 qla83xx_service_idc_aen(struct work_struct *work)
5586 {
5587         struct qla_hw_data *ha =
5588                 container_of(work, struct qla_hw_data, idc_aen);
5589         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5590         uint32_t dev_state, idc_control;
5591
5592         qla83xx_idc_lock(base_vha, 0);
5593         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5594         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5595         qla83xx_idc_unlock(base_vha, 0);
5596         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5597                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5598                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5599                             "Application requested NIC Core Reset.\n");
5600                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5601                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5602                     QLA_SUCCESS) {
5603                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5604                             "Other protocol driver requested NIC Core Reset.\n");
5605                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5606                 }
5607         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5608                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5609                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5610         }
5611 }
5612
5613 static void
5614 qla83xx_wait_logic(void)
5615 {
5616         int i;
5617
5618         /* Yield CPU */
5619         if (!in_interrupt()) {
5620                 /*
5621                  * Wait about 200ms before retrying again.
5622                  * This controls the number of retries for single
5623                  * lock operation.
5624                  */
5625                 msleep(100);
5626                 schedule();
5627         } else {
5628                 for (i = 0; i < 20; i++)
5629                         cpu_relax(); /* This a nop instr on i386 */
5630         }
5631 }
5632
5633 static int
5634 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5635 {
5636         int rval;
5637         uint32_t data;
5638         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5639         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5640         struct qla_hw_data *ha = base_vha->hw;
5641
5642         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5643             "Trying force recovery of the IDC lock.\n");
5644
5645         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5646         if (rval)
5647                 return rval;
5648
5649         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5650                 return QLA_SUCCESS;
5651         } else {
5652                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5653                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5654                     data);
5655                 if (rval)
5656                         return rval;
5657
5658                 msleep(200);
5659
5660                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5661                     &data);
5662                 if (rval)
5663                         return rval;
5664
5665                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5666                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5667                                         ~(idc_lck_rcvry_stage_mask));
5668                         rval = qla83xx_wr_reg(base_vha,
5669                             QLA83XX_IDC_LOCK_RECOVERY, data);
5670                         if (rval)
5671                                 return rval;
5672
5673                         /* Forcefully perform IDC UnLock */
5674                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5675                             &data);
5676                         if (rval)
5677                                 return rval;
5678                         /* Clear lock-id by setting 0xff */
5679                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5680                             0xff);
5681                         if (rval)
5682                                 return rval;
5683                         /* Clear lock-recovery by setting 0x0 */
5684                         rval = qla83xx_wr_reg(base_vha,
5685                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5686                         if (rval)
5687                                 return rval;
5688                 } else
5689                         return QLA_SUCCESS;
5690         }
5691
5692         return rval;
5693 }
5694
5695 static int
5696 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5697 {
5698         int rval = QLA_SUCCESS;
5699         uint32_t o_drv_lockid, n_drv_lockid;
5700         unsigned long lock_recovery_timeout;
5701
5702         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5703 retry_lockid:
5704         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5705         if (rval)
5706                 goto exit;
5707
5708         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5709         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5710                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5711                         return QLA_SUCCESS;
5712                 else
5713                         return QLA_FUNCTION_FAILED;
5714         }
5715
5716         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5717         if (rval)
5718                 goto exit;
5719
5720         if (o_drv_lockid == n_drv_lockid) {
5721                 qla83xx_wait_logic();
5722                 goto retry_lockid;
5723         } else
5724                 return QLA_SUCCESS;
5725
5726 exit:
5727         return rval;
5728 }
5729
5730 void
5731 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5732 {
5733         uint32_t data;
5734         uint32_t lock_owner;
5735         struct qla_hw_data *ha = base_vha->hw;
5736
5737         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5738 retry_lock:
5739         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5740             == QLA_SUCCESS) {
5741                 if (data) {
5742                         /* Setting lock-id to our function-number */
5743                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5744                             ha->portnum);
5745                 } else {
5746                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5747                             &lock_owner);
5748                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5749                             "Failed to acquire IDC lock, acquired by %d, "
5750                             "retrying...\n", lock_owner);
5751
5752                         /* Retry/Perform IDC-Lock recovery */
5753                         if (qla83xx_idc_lock_recovery(base_vha)
5754                             == QLA_SUCCESS) {
5755                                 qla83xx_wait_logic();
5756                                 goto retry_lock;
5757                         } else
5758                                 ql_log(ql_log_warn, base_vha, 0xb075,
5759                                     "IDC Lock recovery FAILED.\n");
5760                 }
5761
5762         }
5763
5764         return;
5765 }
5766
5767 static bool
5768 qla25xx_rdp_rsp_reduce_size(struct scsi_qla_host *vha,
5769         struct purex_entry_24xx *purex)
5770 {
5771         char fwstr[16];
5772         u32 sid = purex->s_id[2] << 16 | purex->s_id[1] << 8 | purex->s_id[0];
5773         struct port_database_24xx *pdb;
5774
5775         /* Domain Controller is always logged-out. */
5776         /* if RDP request is not from Domain Controller: */
5777         if (sid != 0xfffc01)
5778                 return false;
5779
5780         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: s_id=%#x\n", __func__, sid);
5781
5782         pdb = kzalloc(sizeof(*pdb), GFP_KERNEL);
5783         if (!pdb) {
5784                 ql_dbg(ql_dbg_init, vha, 0x0181,
5785                     "%s: Failed allocate pdb\n", __func__);
5786         } else if (qla24xx_get_port_database(vha,
5787                                 le16_to_cpu(purex->nport_handle), pdb)) {
5788                 ql_dbg(ql_dbg_init, vha, 0x0181,
5789                     "%s: Failed get pdb sid=%x\n", __func__, sid);
5790         } else if (pdb->current_login_state != PDS_PLOGI_COMPLETE &&
5791             pdb->current_login_state != PDS_PRLI_COMPLETE) {
5792                 ql_dbg(ql_dbg_init, vha, 0x0181,
5793                     "%s: Port not logged in sid=%#x\n", __func__, sid);
5794         } else {
5795                 /* RDP request is from logged in port */
5796                 kfree(pdb);
5797                 return false;
5798         }
5799         kfree(pdb);
5800
5801         vha->hw->isp_ops->fw_version_str(vha, fwstr, sizeof(fwstr));
5802         fwstr[strcspn(fwstr, " ")] = 0;
5803         /* if FW version allows RDP response length upto 2048 bytes: */
5804         if (strcmp(fwstr, "8.09.00") > 0 || strcmp(fwstr, "8.05.65") == 0)
5805                 return false;
5806
5807         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: fw=%s\n", __func__, fwstr);
5808
5809         /* RDP response length is to be reduced to maximum 256 bytes */
5810         return true;
5811 }
5812
5813 static uint
5814 qla25xx_rdp_port_speed_capability(struct qla_hw_data *ha)
5815 {
5816         if (IS_CNA_CAPABLE(ha))
5817                 return RDP_PORT_SPEED_10GB;
5818
5819         if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
5820                 unsigned int speeds = 0;
5821
5822                 if (ha->max_supported_speed == 2) {
5823                         if (ha->min_supported_speed <= 6)
5824                                 speeds |= RDP_PORT_SPEED_64GB;
5825                 }
5826
5827                 if (ha->max_supported_speed == 2 ||
5828                     ha->max_supported_speed == 1) {
5829                         if (ha->min_supported_speed <= 5)
5830                                 speeds |= RDP_PORT_SPEED_32GB;
5831                 }
5832
5833                 if (ha->max_supported_speed == 2 ||
5834                     ha->max_supported_speed == 1 ||
5835                     ha->max_supported_speed == 0) {
5836                         if (ha->min_supported_speed <= 4)
5837                                 speeds |= RDP_PORT_SPEED_16GB;
5838                 }
5839
5840                 if (ha->max_supported_speed == 1 ||
5841                     ha->max_supported_speed == 0) {
5842                         if (ha->min_supported_speed <= 3)
5843                                 speeds |= RDP_PORT_SPEED_8GB;
5844                 }
5845
5846                 if (ha->max_supported_speed == 0) {
5847                         if (ha->min_supported_speed <= 2)
5848                                 speeds |= RDP_PORT_SPEED_4GB;
5849                 }
5850
5851                 return speeds;
5852         }
5853
5854         if (IS_QLA2031(ha))
5855                 return RDP_PORT_SPEED_16GB|RDP_PORT_SPEED_8GB|
5856                        RDP_PORT_SPEED_4GB;
5857
5858         if (IS_QLA25XX(ha))
5859                 return RDP_PORT_SPEED_8GB|RDP_PORT_SPEED_4GB|
5860                        RDP_PORT_SPEED_2GB|RDP_PORT_SPEED_1GB;
5861
5862         if (IS_QLA24XX_TYPE(ha))
5863                 return RDP_PORT_SPEED_4GB|RDP_PORT_SPEED_2GB|
5864                        RDP_PORT_SPEED_1GB;
5865
5866         if (IS_QLA23XX(ha))
5867                 return RDP_PORT_SPEED_2GB|RDP_PORT_SPEED_1GB;
5868
5869         return RDP_PORT_SPEED_1GB;
5870 }
5871
5872 static uint
5873 qla25xx_rdp_port_speed_currently(struct qla_hw_data *ha)
5874 {
5875         switch (ha->link_data_rate) {
5876         case PORT_SPEED_1GB:
5877                 return RDP_PORT_SPEED_1GB;
5878
5879         case PORT_SPEED_2GB:
5880                 return RDP_PORT_SPEED_2GB;
5881
5882         case PORT_SPEED_4GB:
5883                 return RDP_PORT_SPEED_4GB;
5884
5885         case PORT_SPEED_8GB:
5886                 return RDP_PORT_SPEED_8GB;
5887
5888         case PORT_SPEED_10GB:
5889                 return RDP_PORT_SPEED_10GB;
5890
5891         case PORT_SPEED_16GB:
5892                 return RDP_PORT_SPEED_16GB;
5893
5894         case PORT_SPEED_32GB:
5895                 return RDP_PORT_SPEED_32GB;
5896
5897         case PORT_SPEED_64GB:
5898                 return RDP_PORT_SPEED_64GB;
5899
5900         default:
5901                 return RDP_PORT_SPEED_UNKNOWN;
5902         }
5903 }
5904
5905 /*
5906  * Function Name: qla24xx_process_purex_iocb
5907  *
5908  * Description:
5909  * Prepare a RDP response and send to Fabric switch
5910  *
5911  * PARAMETERS:
5912  * vha: SCSI qla host
5913  * purex: RDP request received by HBA
5914  */
5915 void qla24xx_process_purex_rdp(struct scsi_qla_host *vha,
5916                                struct purex_item *item)
5917 {
5918         struct qla_hw_data *ha = vha->hw;
5919         struct purex_entry_24xx *purex =
5920             (struct purex_entry_24xx *)&item->iocb;
5921         dma_addr_t rsp_els_dma;
5922         dma_addr_t rsp_payload_dma;
5923         dma_addr_t stat_dma;
5924         dma_addr_t bbc_dma;
5925         dma_addr_t sfp_dma;
5926         struct els_entry_24xx *rsp_els = NULL;
5927         struct rdp_rsp_payload *rsp_payload = NULL;
5928         struct link_statistics *stat = NULL;
5929         struct buffer_credit_24xx *bbc = NULL;
5930         uint8_t *sfp = NULL;
5931         uint16_t sfp_flags = 0;
5932         uint rsp_payload_length = sizeof(*rsp_payload);
5933         int rval;
5934
5935         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0180,
5936             "%s: Enter\n", __func__);
5937
5938         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0181,
5939             "-------- ELS REQ -------\n");
5940         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0182,
5941             purex, sizeof(*purex));
5942
5943         if (qla25xx_rdp_rsp_reduce_size(vha, purex)) {
5944                 rsp_payload_length =
5945                     offsetof(typeof(*rsp_payload), optical_elmt_desc);
5946                 ql_dbg(ql_dbg_init, vha, 0x0181,
5947                     "Reducing RSP payload length to %u bytes...\n",
5948                     rsp_payload_length);
5949         }
5950
5951         rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els),
5952             &rsp_els_dma, GFP_KERNEL);
5953         if (!rsp_els) {
5954                 ql_log(ql_log_warn, vha, 0x0183,
5955                     "Failed allocate dma buffer ELS RSP.\n");
5956                 goto dealloc;
5957         }
5958
5959         rsp_payload = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
5960             &rsp_payload_dma, GFP_KERNEL);
5961         if (!rsp_payload) {
5962                 ql_log(ql_log_warn, vha, 0x0184,
5963                     "Failed allocate dma buffer ELS RSP payload.\n");
5964                 goto dealloc;
5965         }
5966
5967         sfp = dma_alloc_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
5968             &sfp_dma, GFP_KERNEL);
5969
5970         stat = dma_alloc_coherent(&ha->pdev->dev, sizeof(*stat),
5971             &stat_dma, GFP_KERNEL);
5972
5973         bbc = dma_alloc_coherent(&ha->pdev->dev, sizeof(*bbc),
5974             &bbc_dma, GFP_KERNEL);
5975
5976         /* Prepare Response IOCB */
5977         rsp_els->entry_type = ELS_IOCB_TYPE;
5978         rsp_els->entry_count = 1;
5979         rsp_els->sys_define = 0;
5980         rsp_els->entry_status = 0;
5981         rsp_els->handle = 0;
5982         rsp_els->nport_handle = purex->nport_handle;
5983         rsp_els->tx_dsd_count = cpu_to_le16(1);
5984         rsp_els->vp_index = purex->vp_idx;
5985         rsp_els->sof_type = EST_SOFI3;
5986         rsp_els->rx_xchg_address = purex->rx_xchg_addr;
5987         rsp_els->rx_dsd_count = 0;
5988         rsp_els->opcode = purex->els_frame_payload[0];
5989
5990         rsp_els->d_id[0] = purex->s_id[0];
5991         rsp_els->d_id[1] = purex->s_id[1];
5992         rsp_els->d_id[2] = purex->s_id[2];
5993
5994         rsp_els->control_flags = cpu_to_le16(EPD_ELS_ACC);
5995         rsp_els->rx_byte_count = 0;
5996         rsp_els->tx_byte_count = cpu_to_le32(rsp_payload_length);
5997
5998         put_unaligned_le64(rsp_payload_dma, &rsp_els->tx_address);
5999         rsp_els->tx_len = rsp_els->tx_byte_count;
6000
6001         rsp_els->rx_address = 0;
6002         rsp_els->rx_len = 0;
6003
6004         /* Prepare Response Payload */
6005         rsp_payload->hdr.cmd = cpu_to_be32(0x2 << 24); /* LS_ACC */
6006         rsp_payload->hdr.len = cpu_to_be32(le32_to_cpu(rsp_els->tx_byte_count) -
6007                                            sizeof(rsp_payload->hdr));
6008
6009         /* Link service Request Info Descriptor */
6010         rsp_payload->ls_req_info_desc.desc_tag = cpu_to_be32(0x1);
6011         rsp_payload->ls_req_info_desc.desc_len =
6012             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc));
6013         rsp_payload->ls_req_info_desc.req_payload_word_0 =
6014             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
6015
6016         /* Link service Request Info Descriptor 2 */
6017         rsp_payload->ls_req_info_desc2.desc_tag = cpu_to_be32(0x1);
6018         rsp_payload->ls_req_info_desc2.desc_len =
6019             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc2));
6020         rsp_payload->ls_req_info_desc2.req_payload_word_0 =
6021             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
6022
6023
6024         rsp_payload->sfp_diag_desc.desc_tag = cpu_to_be32(0x10000);
6025         rsp_payload->sfp_diag_desc.desc_len =
6026                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->sfp_diag_desc));
6027
6028         if (sfp) {
6029                 /* SFP Flags */
6030                 memset(sfp, 0, SFP_RTDI_LEN);
6031                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x7, 2, 0);
6032                 if (!rval) {
6033                         /* SFP Flags bits 3-0: Port Tx Laser Type */
6034                         if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5))
6035                                 sfp_flags |= BIT_0; /* short wave */
6036                         else if (sfp[0] & BIT_1)
6037                                 sfp_flags |= BIT_1; /* long wave 1310nm */
6038                         else if (sfp[1] & BIT_4)
6039                                 sfp_flags |= BIT_1|BIT_0; /* long wave 1550nm */
6040                 }
6041
6042                 /* SFP Type */
6043                 memset(sfp, 0, SFP_RTDI_LEN);
6044                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x0, 1, 0);
6045                 if (!rval) {
6046                         sfp_flags |= BIT_4; /* optical */
6047                         if (sfp[0] == 0x3)
6048                                 sfp_flags |= BIT_6; /* sfp+ */
6049                 }
6050
6051                 rsp_payload->sfp_diag_desc.sfp_flags = cpu_to_be16(sfp_flags);
6052
6053                 /* SFP Diagnostics */
6054                 memset(sfp, 0, SFP_RTDI_LEN);
6055                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0x60, 10, 0);
6056                 if (!rval) {
6057                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6058                         rsp_payload->sfp_diag_desc.temperature = trx[0];
6059                         rsp_payload->sfp_diag_desc.vcc = trx[1];
6060                         rsp_payload->sfp_diag_desc.tx_bias = trx[2];
6061                         rsp_payload->sfp_diag_desc.tx_power = trx[3];
6062                         rsp_payload->sfp_diag_desc.rx_power = trx[4];
6063                 }
6064         }
6065
6066         /* Port Speed Descriptor */
6067         rsp_payload->port_speed_desc.desc_tag = cpu_to_be32(0x10001);
6068         rsp_payload->port_speed_desc.desc_len =
6069             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_speed_desc));
6070         rsp_payload->port_speed_desc.speed_capab = cpu_to_be16(
6071             qla25xx_rdp_port_speed_capability(ha));
6072         rsp_payload->port_speed_desc.operating_speed = cpu_to_be16(
6073             qla25xx_rdp_port_speed_currently(ha));
6074
6075         /* Link Error Status Descriptor */
6076         rsp_payload->ls_err_desc.desc_tag = cpu_to_be32(0x10002);
6077         rsp_payload->ls_err_desc.desc_len =
6078                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_err_desc));
6079
6080         if (stat) {
6081                 rval = qla24xx_get_isp_stats(vha, stat, stat_dma, 0);
6082                 if (!rval) {
6083                         rsp_payload->ls_err_desc.link_fail_cnt =
6084                             cpu_to_be32(le32_to_cpu(stat->link_fail_cnt));
6085                         rsp_payload->ls_err_desc.loss_sync_cnt =
6086                             cpu_to_be32(le32_to_cpu(stat->loss_sync_cnt));
6087                         rsp_payload->ls_err_desc.loss_sig_cnt =
6088                             cpu_to_be32(le32_to_cpu(stat->loss_sig_cnt));
6089                         rsp_payload->ls_err_desc.prim_seq_err_cnt =
6090                             cpu_to_be32(le32_to_cpu(stat->prim_seq_err_cnt));
6091                         rsp_payload->ls_err_desc.inval_xmit_word_cnt =
6092                             cpu_to_be32(le32_to_cpu(stat->inval_xmit_word_cnt));
6093                         rsp_payload->ls_err_desc.inval_crc_cnt =
6094                             cpu_to_be32(le32_to_cpu(stat->inval_crc_cnt));
6095                         rsp_payload->ls_err_desc.pn_port_phy_type |= BIT_6;
6096                 }
6097         }
6098
6099         /* Portname Descriptor */
6100         rsp_payload->port_name_diag_desc.desc_tag = cpu_to_be32(0x10003);
6101         rsp_payload->port_name_diag_desc.desc_len =
6102             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_diag_desc));
6103         memcpy(rsp_payload->port_name_diag_desc.WWNN,
6104             vha->node_name,
6105             sizeof(rsp_payload->port_name_diag_desc.WWNN));
6106         memcpy(rsp_payload->port_name_diag_desc.WWPN,
6107             vha->port_name,
6108             sizeof(rsp_payload->port_name_diag_desc.WWPN));
6109
6110         /* F-Port Portname Descriptor */
6111         rsp_payload->port_name_direct_desc.desc_tag = cpu_to_be32(0x10003);
6112         rsp_payload->port_name_direct_desc.desc_len =
6113             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_direct_desc));
6114         memcpy(rsp_payload->port_name_direct_desc.WWNN,
6115             vha->fabric_node_name,
6116             sizeof(rsp_payload->port_name_direct_desc.WWNN));
6117         memcpy(rsp_payload->port_name_direct_desc.WWPN,
6118             vha->fabric_port_name,
6119             sizeof(rsp_payload->port_name_direct_desc.WWPN));
6120
6121         /* Bufer Credit Descriptor */
6122         rsp_payload->buffer_credit_desc.desc_tag = cpu_to_be32(0x10006);
6123         rsp_payload->buffer_credit_desc.desc_len =
6124                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->buffer_credit_desc));
6125         rsp_payload->buffer_credit_desc.fcport_b2b = 0;
6126         rsp_payload->buffer_credit_desc.attached_fcport_b2b = cpu_to_be32(0);
6127         rsp_payload->buffer_credit_desc.fcport_rtt = cpu_to_be32(0);
6128
6129         if (bbc) {
6130                 memset(bbc, 0, sizeof(*bbc));
6131                 rval = qla24xx_get_buffer_credits(vha, bbc, bbc_dma);
6132                 if (!rval) {
6133                         rsp_payload->buffer_credit_desc.fcport_b2b =
6134                             cpu_to_be32(LSW(bbc->parameter[0]));
6135                 }
6136         }
6137
6138         if (rsp_payload_length < sizeof(*rsp_payload))
6139                 goto send;
6140
6141         /* Optical Element Descriptor, Temperature */
6142         rsp_payload->optical_elmt_desc[0].desc_tag = cpu_to_be32(0x10007);
6143         rsp_payload->optical_elmt_desc[0].desc_len =
6144                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6145         /* Optical Element Descriptor, Voltage */
6146         rsp_payload->optical_elmt_desc[1].desc_tag = cpu_to_be32(0x10007);
6147         rsp_payload->optical_elmt_desc[1].desc_len =
6148                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6149         /* Optical Element Descriptor, Tx Bias Current */
6150         rsp_payload->optical_elmt_desc[2].desc_tag = cpu_to_be32(0x10007);
6151         rsp_payload->optical_elmt_desc[2].desc_len =
6152                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6153         /* Optical Element Descriptor, Tx Power */
6154         rsp_payload->optical_elmt_desc[3].desc_tag = cpu_to_be32(0x10007);
6155         rsp_payload->optical_elmt_desc[3].desc_len =
6156                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6157         /* Optical Element Descriptor, Rx Power */
6158         rsp_payload->optical_elmt_desc[4].desc_tag = cpu_to_be32(0x10007);
6159         rsp_payload->optical_elmt_desc[4].desc_len =
6160                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6161
6162         if (sfp) {
6163                 memset(sfp, 0, SFP_RTDI_LEN);
6164                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0, 64, 0);
6165                 if (!rval) {
6166                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6167
6168                         /* Optical Element Descriptor, Temperature */
6169                         rsp_payload->optical_elmt_desc[0].high_alarm = trx[0];
6170                         rsp_payload->optical_elmt_desc[0].low_alarm = trx[1];
6171                         rsp_payload->optical_elmt_desc[0].high_warn = trx[2];
6172                         rsp_payload->optical_elmt_desc[0].low_warn = trx[3];
6173                         rsp_payload->optical_elmt_desc[0].element_flags =
6174                             cpu_to_be32(1 << 28);
6175
6176                         /* Optical Element Descriptor, Voltage */
6177                         rsp_payload->optical_elmt_desc[1].high_alarm = trx[4];
6178                         rsp_payload->optical_elmt_desc[1].low_alarm = trx[5];
6179                         rsp_payload->optical_elmt_desc[1].high_warn = trx[6];
6180                         rsp_payload->optical_elmt_desc[1].low_warn = trx[7];
6181                         rsp_payload->optical_elmt_desc[1].element_flags =
6182                             cpu_to_be32(2 << 28);
6183
6184                         /* Optical Element Descriptor, Tx Bias Current */
6185                         rsp_payload->optical_elmt_desc[2].high_alarm = trx[8];
6186                         rsp_payload->optical_elmt_desc[2].low_alarm = trx[9];
6187                         rsp_payload->optical_elmt_desc[2].high_warn = trx[10];
6188                         rsp_payload->optical_elmt_desc[2].low_warn = trx[11];
6189                         rsp_payload->optical_elmt_desc[2].element_flags =
6190                             cpu_to_be32(3 << 28);
6191
6192                         /* Optical Element Descriptor, Tx Power */
6193                         rsp_payload->optical_elmt_desc[3].high_alarm = trx[12];
6194                         rsp_payload->optical_elmt_desc[3].low_alarm = trx[13];
6195                         rsp_payload->optical_elmt_desc[3].high_warn = trx[14];
6196                         rsp_payload->optical_elmt_desc[3].low_warn = trx[15];
6197                         rsp_payload->optical_elmt_desc[3].element_flags =
6198                             cpu_to_be32(4 << 28);
6199
6200                         /* Optical Element Descriptor, Rx Power */
6201                         rsp_payload->optical_elmt_desc[4].high_alarm = trx[16];
6202                         rsp_payload->optical_elmt_desc[4].low_alarm = trx[17];
6203                         rsp_payload->optical_elmt_desc[4].high_warn = trx[18];
6204                         rsp_payload->optical_elmt_desc[4].low_warn = trx[19];
6205                         rsp_payload->optical_elmt_desc[4].element_flags =
6206                             cpu_to_be32(5 << 28);
6207                 }
6208
6209                 memset(sfp, 0, SFP_RTDI_LEN);
6210                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 112, 64, 0);
6211                 if (!rval) {
6212                         /* Temperature high/low alarm/warning */
6213                         rsp_payload->optical_elmt_desc[0].element_flags |=
6214                             cpu_to_be32(
6215                                 (sfp[0] >> 7 & 1) << 3 |
6216                                 (sfp[0] >> 6 & 1) << 2 |
6217                                 (sfp[4] >> 7 & 1) << 1 |
6218                                 (sfp[4] >> 6 & 1) << 0);
6219
6220                         /* Voltage high/low alarm/warning */
6221                         rsp_payload->optical_elmt_desc[1].element_flags |=
6222                             cpu_to_be32(
6223                                 (sfp[0] >> 5 & 1) << 3 |
6224                                 (sfp[0] >> 4 & 1) << 2 |
6225                                 (sfp[4] >> 5 & 1) << 1 |
6226                                 (sfp[4] >> 4 & 1) << 0);
6227
6228                         /* Tx Bias Current high/low alarm/warning */
6229                         rsp_payload->optical_elmt_desc[2].element_flags |=
6230                             cpu_to_be32(
6231                                 (sfp[0] >> 3 & 1) << 3 |
6232                                 (sfp[0] >> 2 & 1) << 2 |
6233                                 (sfp[4] >> 3 & 1) << 1 |
6234                                 (sfp[4] >> 2 & 1) << 0);
6235
6236                         /* Tx Power high/low alarm/warning */
6237                         rsp_payload->optical_elmt_desc[3].element_flags |=
6238                             cpu_to_be32(
6239                                 (sfp[0] >> 1 & 1) << 3 |
6240                                 (sfp[0] >> 0 & 1) << 2 |
6241                                 (sfp[4] >> 1 & 1) << 1 |
6242                                 (sfp[4] >> 0 & 1) << 0);
6243
6244                         /* Rx Power high/low alarm/warning */
6245                         rsp_payload->optical_elmt_desc[4].element_flags |=
6246                             cpu_to_be32(
6247                                 (sfp[1] >> 7 & 1) << 3 |
6248                                 (sfp[1] >> 6 & 1) << 2 |
6249                                 (sfp[5] >> 7 & 1) << 1 |
6250                                 (sfp[5] >> 6 & 1) << 0);
6251                 }
6252         }
6253
6254         /* Optical Product Data Descriptor */
6255         rsp_payload->optical_prod_desc.desc_tag = cpu_to_be32(0x10008);
6256         rsp_payload->optical_prod_desc.desc_len =
6257                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->optical_prod_desc));
6258
6259         if (sfp) {
6260                 memset(sfp, 0, SFP_RTDI_LEN);
6261                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 20, 64, 0);
6262                 if (!rval) {
6263                         memcpy(rsp_payload->optical_prod_desc.vendor_name,
6264                             sfp + 0,
6265                             sizeof(rsp_payload->optical_prod_desc.vendor_name));
6266                         memcpy(rsp_payload->optical_prod_desc.part_number,
6267                             sfp + 20,
6268                             sizeof(rsp_payload->optical_prod_desc.part_number));
6269                         memcpy(rsp_payload->optical_prod_desc.revision,
6270                             sfp + 36,
6271                             sizeof(rsp_payload->optical_prod_desc.revision));
6272                         memcpy(rsp_payload->optical_prod_desc.serial_number,
6273                             sfp + 48,
6274                             sizeof(rsp_payload->optical_prod_desc.serial_number));
6275                 }
6276
6277                 memset(sfp, 0, SFP_RTDI_LEN);
6278                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 84, 8, 0);
6279                 if (!rval) {
6280                         memcpy(rsp_payload->optical_prod_desc.date,
6281                             sfp + 0,
6282                             sizeof(rsp_payload->optical_prod_desc.date));
6283                 }
6284         }
6285
6286 send:
6287         ql_dbg(ql_dbg_init, vha, 0x0183,
6288             "Sending ELS Response to RDP Request...\n");
6289         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0184,
6290             "-------- ELS RSP -------\n");
6291         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0185,
6292             rsp_els, sizeof(*rsp_els));
6293         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0186,
6294             "-------- ELS RSP PAYLOAD -------\n");
6295         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0187,
6296             rsp_payload, rsp_payload_length);
6297
6298         rval = qla2x00_issue_iocb(vha, rsp_els, rsp_els_dma, 0);
6299
6300         if (rval) {
6301                 ql_log(ql_log_warn, vha, 0x0188,
6302                     "%s: iocb failed to execute -> %x\n", __func__, rval);
6303         } else if (rsp_els->comp_status) {
6304                 ql_log(ql_log_warn, vha, 0x0189,
6305                     "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
6306                     __func__, rsp_els->comp_status,
6307                     rsp_els->error_subcode_1, rsp_els->error_subcode_2);
6308         } else {
6309                 ql_dbg(ql_dbg_init, vha, 0x018a, "%s: done.\n", __func__);
6310         }
6311
6312 dealloc:
6313         if (bbc)
6314                 dma_free_coherent(&ha->pdev->dev, sizeof(*bbc),
6315                     bbc, bbc_dma);
6316         if (stat)
6317                 dma_free_coherent(&ha->pdev->dev, sizeof(*stat),
6318                     stat, stat_dma);
6319         if (sfp)
6320                 dma_free_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
6321                     sfp, sfp_dma);
6322         if (rsp_payload)
6323                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
6324                     rsp_payload, rsp_payload_dma);
6325         if (rsp_els)
6326                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els),
6327                     rsp_els, rsp_els_dma);
6328 }
6329
6330 void
6331 qla24xx_free_purex_item(struct purex_item *item)
6332 {
6333         if (item == &item->vha->default_item)
6334                 memset(&item->vha->default_item, 0, sizeof(struct purex_item));
6335         else
6336                 kfree(item);
6337 }
6338
6339 void qla24xx_process_purex_list(struct purex_list *list)
6340 {
6341         struct list_head head = LIST_HEAD_INIT(head);
6342         struct purex_item *item, *next;
6343         ulong flags;
6344
6345         spin_lock_irqsave(&list->lock, flags);
6346         list_splice_init(&list->head, &head);
6347         spin_unlock_irqrestore(&list->lock, flags);
6348
6349         list_for_each_entry_safe(item, next, &head, list) {
6350                 list_del(&item->list);
6351                 item->process_item(item->vha, item);
6352                 qla24xx_free_purex_item(item);
6353         }
6354 }
6355
6356 void
6357 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
6358 {
6359 #if 0
6360         uint16_t options = (requester_id << 15) | BIT_7;
6361 #endif
6362         uint16_t retry;
6363         uint32_t data;
6364         struct qla_hw_data *ha = base_vha->hw;
6365
6366         /* IDC-unlock implementation using driver-unlock/lock-id
6367          * remote registers
6368          */
6369         retry = 0;
6370 retry_unlock:
6371         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
6372             == QLA_SUCCESS) {
6373                 if (data == ha->portnum) {
6374                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
6375                         /* Clearing lock-id by setting 0xff */
6376                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
6377                 } else if (retry < 10) {
6378                         /* SV: XXX: IDC unlock retrying needed here? */
6379
6380                         /* Retry for IDC-unlock */
6381                         qla83xx_wait_logic();
6382                         retry++;
6383                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
6384                             "Failed to release IDC lock, retrying=%d\n", retry);
6385                         goto retry_unlock;
6386                 }
6387         } else if (retry < 10) {
6388                 /* Retry for IDC-unlock */
6389                 qla83xx_wait_logic();
6390                 retry++;
6391                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
6392                     "Failed to read drv-lockid, retrying=%d\n", retry);
6393                 goto retry_unlock;
6394         }
6395
6396         return;
6397
6398 #if 0
6399         /* XXX: IDC-unlock implementation using access-control mbx */
6400         retry = 0;
6401 retry_unlock2:
6402         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
6403                 if (retry < 10) {
6404                         /* Retry for IDC-unlock */
6405                         qla83xx_wait_logic();
6406                         retry++;
6407                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
6408                             "Failed to release IDC lock, retrying=%d\n", retry);
6409                         goto retry_unlock2;
6410                 }
6411         }
6412
6413         return;
6414 #endif
6415 }
6416
6417 int
6418 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6419 {
6420         int rval = QLA_SUCCESS;
6421         struct qla_hw_data *ha = vha->hw;
6422         uint32_t drv_presence;
6423
6424         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6425         if (rval == QLA_SUCCESS) {
6426                 drv_presence |= (1 << ha->portnum);
6427                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6428                     drv_presence);
6429         }
6430
6431         return rval;
6432 }
6433
6434 int
6435 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6436 {
6437         int rval = QLA_SUCCESS;
6438
6439         qla83xx_idc_lock(vha, 0);
6440         rval = __qla83xx_set_drv_presence(vha);
6441         qla83xx_idc_unlock(vha, 0);
6442
6443         return rval;
6444 }
6445
6446 int
6447 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6448 {
6449         int rval = QLA_SUCCESS;
6450         struct qla_hw_data *ha = vha->hw;
6451         uint32_t drv_presence;
6452
6453         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6454         if (rval == QLA_SUCCESS) {
6455                 drv_presence &= ~(1 << ha->portnum);
6456                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6457                     drv_presence);
6458         }
6459
6460         return rval;
6461 }
6462
6463 int
6464 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6465 {
6466         int rval = QLA_SUCCESS;
6467
6468         qla83xx_idc_lock(vha, 0);
6469         rval = __qla83xx_clear_drv_presence(vha);
6470         qla83xx_idc_unlock(vha, 0);
6471
6472         return rval;
6473 }
6474
6475 static void
6476 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
6477 {
6478         struct qla_hw_data *ha = vha->hw;
6479         uint32_t drv_ack, drv_presence;
6480         unsigned long ack_timeout;
6481
6482         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
6483         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
6484         while (1) {
6485                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6486                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6487                 if ((drv_ack & drv_presence) == drv_presence)
6488                         break;
6489
6490                 if (time_after_eq(jiffies, ack_timeout)) {
6491                         ql_log(ql_log_warn, vha, 0xb067,
6492                             "RESET ACK TIMEOUT! drv_presence=0x%x "
6493                             "drv_ack=0x%x\n", drv_presence, drv_ack);
6494                         /*
6495                          * The function(s) which did not ack in time are forced
6496                          * to withdraw any further participation in the IDC
6497                          * reset.
6498                          */
6499                         if (drv_ack != drv_presence)
6500                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6501                                     drv_ack);
6502                         break;
6503                 }
6504
6505                 qla83xx_idc_unlock(vha, 0);
6506                 msleep(1000);
6507                 qla83xx_idc_lock(vha, 0);
6508         }
6509
6510         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
6511         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
6512 }
6513
6514 static int
6515 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
6516 {
6517         int rval = QLA_SUCCESS;
6518         uint32_t idc_control;
6519
6520         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
6521         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
6522
6523         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
6524         __qla83xx_get_idc_control(vha, &idc_control);
6525         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
6526         __qla83xx_set_idc_control(vha, 0);
6527
6528         qla83xx_idc_unlock(vha, 0);
6529         rval = qla83xx_restart_nic_firmware(vha);
6530         qla83xx_idc_lock(vha, 0);
6531
6532         if (rval != QLA_SUCCESS) {
6533                 ql_log(ql_log_fatal, vha, 0xb06a,
6534                     "Failed to restart NIC f/w.\n");
6535                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
6536                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
6537         } else {
6538                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
6539                     "Success in restarting nic f/w.\n");
6540                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
6541                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
6542         }
6543
6544         return rval;
6545 }
6546
6547 /* Assumes idc_lock always held on entry */
6548 int
6549 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
6550 {
6551         struct qla_hw_data *ha = base_vha->hw;
6552         int rval = QLA_SUCCESS;
6553         unsigned long dev_init_timeout;
6554         uint32_t dev_state;
6555
6556         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
6557         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
6558
6559         while (1) {
6560
6561                 if (time_after_eq(jiffies, dev_init_timeout)) {
6562                         ql_log(ql_log_warn, base_vha, 0xb06e,
6563                             "Initialization TIMEOUT!\n");
6564                         /* Init timeout. Disable further NIC Core
6565                          * communication.
6566                          */
6567                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
6568                                 QLA8XXX_DEV_FAILED);
6569                         ql_log(ql_log_info, base_vha, 0xb06f,
6570                             "HW State: FAILED.\n");
6571                 }
6572
6573                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6574                 switch (dev_state) {
6575                 case QLA8XXX_DEV_READY:
6576                         if (ha->flags.nic_core_reset_owner)
6577                                 qla83xx_idc_audit(base_vha,
6578                                     IDC_AUDIT_COMPLETION);
6579                         ha->flags.nic_core_reset_owner = 0;
6580                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
6581                             "Reset_owner reset by 0x%x.\n",
6582                             ha->portnum);
6583                         goto exit;
6584                 case QLA8XXX_DEV_COLD:
6585                         if (ha->flags.nic_core_reset_owner)
6586                                 rval = qla83xx_device_bootstrap(base_vha);
6587                         else {
6588                         /* Wait for AEN to change device-state */
6589                                 qla83xx_idc_unlock(base_vha, 0);
6590                                 msleep(1000);
6591                                 qla83xx_idc_lock(base_vha, 0);
6592                         }
6593                         break;
6594                 case QLA8XXX_DEV_INITIALIZING:
6595                         /* Wait for AEN to change device-state */
6596                         qla83xx_idc_unlock(base_vha, 0);
6597                         msleep(1000);
6598                         qla83xx_idc_lock(base_vha, 0);
6599                         break;
6600                 case QLA8XXX_DEV_NEED_RESET:
6601                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
6602                                 qla83xx_need_reset_handler(base_vha);
6603                         else {
6604                                 /* Wait for AEN to change device-state */
6605                                 qla83xx_idc_unlock(base_vha, 0);
6606                                 msleep(1000);
6607                                 qla83xx_idc_lock(base_vha, 0);
6608                         }
6609                         /* reset timeout value after need reset handler */
6610                         dev_init_timeout = jiffies +
6611                             (ha->fcoe_dev_init_timeout * HZ);
6612                         break;
6613                 case QLA8XXX_DEV_NEED_QUIESCENT:
6614                         /* XXX: DEBUG for now */
6615                         qla83xx_idc_unlock(base_vha, 0);
6616                         msleep(1000);
6617                         qla83xx_idc_lock(base_vha, 0);
6618                         break;
6619                 case QLA8XXX_DEV_QUIESCENT:
6620                         /* XXX: DEBUG for now */
6621                         if (ha->flags.quiesce_owner)
6622                                 goto exit;
6623
6624                         qla83xx_idc_unlock(base_vha, 0);
6625                         msleep(1000);
6626                         qla83xx_idc_lock(base_vha, 0);
6627                         dev_init_timeout = jiffies +
6628                             (ha->fcoe_dev_init_timeout * HZ);
6629                         break;
6630                 case QLA8XXX_DEV_FAILED:
6631                         if (ha->flags.nic_core_reset_owner)
6632                                 qla83xx_idc_audit(base_vha,
6633                                     IDC_AUDIT_COMPLETION);
6634                         ha->flags.nic_core_reset_owner = 0;
6635                         __qla83xx_clear_drv_presence(base_vha);
6636                         qla83xx_idc_unlock(base_vha, 0);
6637                         qla8xxx_dev_failed_handler(base_vha);
6638                         rval = QLA_FUNCTION_FAILED;
6639                         qla83xx_idc_lock(base_vha, 0);
6640                         goto exit;
6641                 case QLA8XXX_BAD_VALUE:
6642                         qla83xx_idc_unlock(base_vha, 0);
6643                         msleep(1000);
6644                         qla83xx_idc_lock(base_vha, 0);
6645                         break;
6646                 default:
6647                         ql_log(ql_log_warn, base_vha, 0xb071,
6648                             "Unknown Device State: %x.\n", dev_state);
6649                         qla83xx_idc_unlock(base_vha, 0);
6650                         qla8xxx_dev_failed_handler(base_vha);
6651                         rval = QLA_FUNCTION_FAILED;
6652                         qla83xx_idc_lock(base_vha, 0);
6653                         goto exit;
6654                 }
6655         }
6656
6657 exit:
6658         return rval;
6659 }
6660
6661 void
6662 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6663 {
6664         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6665             board_disable);
6666         struct pci_dev *pdev = ha->pdev;
6667         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6668
6669         ql_log(ql_log_warn, base_vha, 0x015b,
6670             "Disabling adapter.\n");
6671
6672         if (!atomic_read(&pdev->enable_cnt)) {
6673                 ql_log(ql_log_info, base_vha, 0xfffc,
6674                     "PCI device disabled, no action req for PCI error=%lx\n",
6675                     base_vha->pci_flags);
6676                 return;
6677         }
6678
6679         /*
6680          * if UNLOADING flag is already set, then continue unload,
6681          * where it was set first.
6682          */
6683         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
6684                 return;
6685
6686         qla2x00_wait_for_sess_deletion(base_vha);
6687
6688         qla2x00_delete_all_vps(ha, base_vha);
6689
6690         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6691
6692         qla2x00_dfs_remove(base_vha);
6693
6694         qla84xx_put_chip(base_vha);
6695
6696         if (base_vha->timer_active)
6697                 qla2x00_stop_timer(base_vha);
6698
6699         base_vha->flags.online = 0;
6700
6701         qla2x00_destroy_deferred_work(ha);
6702
6703         /*
6704          * Do not try to stop beacon blink as it will issue a mailbox
6705          * command.
6706          */
6707         qla2x00_free_sysfs_attr(base_vha, false);
6708
6709         fc_remove_host(base_vha->host);
6710
6711         scsi_remove_host(base_vha->host);
6712
6713         base_vha->flags.init_done = 0;
6714         qla25xx_delete_queues(base_vha);
6715         qla2x00_free_fcports(base_vha);
6716         qla2x00_free_irqs(base_vha);
6717         qla2x00_mem_free(ha);
6718         qla82xx_md_free(base_vha);
6719         qla2x00_free_queues(ha);
6720
6721         qla2x00_unmap_iobases(ha);
6722
6723         pci_release_selected_regions(ha->pdev, ha->bars);
6724         pci_disable_pcie_error_reporting(pdev);
6725         pci_disable_device(pdev);
6726
6727         /*
6728          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6729          */
6730 }
6731
6732 /**************************************************************************
6733 * qla2x00_do_dpc
6734 *   This kernel thread is a task that is schedule by the interrupt handler
6735 *   to perform the background processing for interrupts.
6736 *
6737 * Notes:
6738 * This task always run in the context of a kernel thread.  It
6739 * is kick-off by the driver's detect code and starts up
6740 * up one per adapter. It immediately goes to sleep and waits for
6741 * some fibre event.  When either the interrupt handler or
6742 * the timer routine detects a event it will one of the task
6743 * bits then wake us up.
6744 **************************************************************************/
6745 static int
6746 qla2x00_do_dpc(void *data)
6747 {
6748         scsi_qla_host_t *base_vha;
6749         struct qla_hw_data *ha;
6750         uint32_t online;
6751         struct qla_qpair *qpair;
6752
6753         ha = (struct qla_hw_data *)data;
6754         base_vha = pci_get_drvdata(ha->pdev);
6755
6756         set_user_nice(current, MIN_NICE);
6757
6758         set_current_state(TASK_INTERRUPTIBLE);
6759         while (!kthread_should_stop()) {
6760                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6761                     "DPC handler sleeping.\n");
6762
6763                 schedule();
6764
6765                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6766                         goto end_loop;
6767
6768                 if (ha->flags.eeh_busy) {
6769                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6770                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6771                         goto end_loop;
6772                 }
6773
6774                 ha->dpc_active = 1;
6775
6776                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6777                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6778                     base_vha->dpc_flags);
6779
6780                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6781                         break;
6782
6783                 if (IS_P3P_TYPE(ha)) {
6784                         if (IS_QLA8044(ha)) {
6785                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6786                                         &base_vha->dpc_flags)) {
6787                                         qla8044_idc_lock(ha);
6788                                         qla8044_wr_direct(base_vha,
6789                                                 QLA8044_CRB_DEV_STATE_INDEX,
6790                                                 QLA8XXX_DEV_FAILED);
6791                                         qla8044_idc_unlock(ha);
6792                                         ql_log(ql_log_info, base_vha, 0x4004,
6793                                                 "HW State: FAILED.\n");
6794                                         qla8044_device_state_handler(base_vha);
6795                                         continue;
6796                                 }
6797
6798                         } else {
6799                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6800                                         &base_vha->dpc_flags)) {
6801                                         qla82xx_idc_lock(ha);
6802                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6803                                                 QLA8XXX_DEV_FAILED);
6804                                         qla82xx_idc_unlock(ha);
6805                                         ql_log(ql_log_info, base_vha, 0x0151,
6806                                                 "HW State: FAILED.\n");
6807                                         qla82xx_device_state_handler(base_vha);
6808                                         continue;
6809                                 }
6810                         }
6811
6812                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6813                                 &base_vha->dpc_flags)) {
6814
6815                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6816                                     "FCoE context reset scheduled.\n");
6817                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6818                                         &base_vha->dpc_flags))) {
6819                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6820                                                 /* FCoE-ctx reset failed.
6821                                                  * Escalate to chip-reset
6822                                                  */
6823                                                 set_bit(ISP_ABORT_NEEDED,
6824                                                         &base_vha->dpc_flags);
6825                                         }
6826                                         clear_bit(ABORT_ISP_ACTIVE,
6827                                                 &base_vha->dpc_flags);
6828                                 }
6829
6830                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6831                                     "FCoE context reset end.\n");
6832                         }
6833                 } else if (IS_QLAFX00(ha)) {
6834                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6835                                 &base_vha->dpc_flags)) {
6836                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6837                                     "Firmware Reset Recovery\n");
6838                                 if (qlafx00_reset_initialize(base_vha)) {
6839                                         /* Failed. Abort isp later. */
6840                                         if (!test_bit(UNLOADING,
6841                                             &base_vha->dpc_flags)) {
6842                                                 set_bit(ISP_UNRECOVERABLE,
6843                                                     &base_vha->dpc_flags);
6844                                                 ql_dbg(ql_dbg_dpc, base_vha,
6845                                                     0x4021,
6846                                                     "Reset Recovery Failed\n");
6847                                         }
6848                                 }
6849                         }
6850
6851                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6852                                 &base_vha->dpc_flags)) {
6853                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6854                                     "ISPFx00 Target Scan scheduled\n");
6855                                 if (qlafx00_rescan_isp(base_vha)) {
6856                                         if (!test_bit(UNLOADING,
6857                                             &base_vha->dpc_flags))
6858                                                 set_bit(ISP_UNRECOVERABLE,
6859                                                     &base_vha->dpc_flags);
6860                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6861                                             "ISPFx00 Target Scan Failed\n");
6862                                 }
6863                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6864                                     "ISPFx00 Target Scan End\n");
6865                         }
6866                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6867                                 &base_vha->dpc_flags)) {
6868                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6869                                     "ISPFx00 Host Info resend scheduled\n");
6870                                 qlafx00_fx_disc(base_vha,
6871                                     &base_vha->hw->mr.fcport,
6872                                     FXDISC_REG_HOST_INFO);
6873                         }
6874                 }
6875
6876                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6877                     &base_vha->dpc_flags)) {
6878                         /* Semantic:
6879                          *  - NO-OP -- await next ISP-ABORT. Preferred method
6880                          *             to minimize disruptions that will occur
6881                          *             when a forced chip-reset occurs.
6882                          *  - Force -- ISP-ABORT scheduled.
6883                          */
6884                         /* set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); */
6885                 }
6886
6887                 if (test_and_clear_bit
6888                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6889                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6890                         bool do_reset = true;
6891
6892                         switch (base_vha->qlini_mode) {
6893                         case QLA2XXX_INI_MODE_ENABLED:
6894                                 break;
6895                         case QLA2XXX_INI_MODE_DISABLED:
6896                                 if (!qla_tgt_mode_enabled(base_vha) &&
6897                                     !ha->flags.fw_started)
6898                                         do_reset = false;
6899                                 break;
6900                         case QLA2XXX_INI_MODE_DUAL:
6901                                 if (!qla_dual_mode_enabled(base_vha) &&
6902                                     !ha->flags.fw_started)
6903                                         do_reset = false;
6904                                 break;
6905                         default:
6906                                 break;
6907                         }
6908
6909                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6910                             &base_vha->dpc_flags))) {
6911                                 base_vha->flags.online = 1;
6912                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6913                                     "ISP abort scheduled.\n");
6914                                 if (ha->isp_ops->abort_isp(base_vha)) {
6915                                         /* failed. retry later */
6916                                         set_bit(ISP_ABORT_NEEDED,
6917                                             &base_vha->dpc_flags);
6918                                 }
6919                                 clear_bit(ABORT_ISP_ACTIVE,
6920                                                 &base_vha->dpc_flags);
6921                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6922                                     "ISP abort end.\n");
6923                         }
6924                 }
6925
6926                 if (test_bit(PROCESS_PUREX_IOCB, &base_vha->dpc_flags)) {
6927                         if (atomic_read(&base_vha->loop_state) == LOOP_READY) {
6928                                 qla24xx_process_purex_list
6929                                         (&base_vha->purex_list);
6930                                 clear_bit(PROCESS_PUREX_IOCB,
6931                                     &base_vha->dpc_flags);
6932                         }
6933                 }
6934
6935                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6936                     &base_vha->dpc_flags)) {
6937                         qla2x00_update_fcports(base_vha);
6938                 }
6939
6940                 if (IS_QLAFX00(ha))
6941                         goto loop_resync_check;
6942
6943                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6944                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6945                             "Quiescence mode scheduled.\n");
6946                         if (IS_P3P_TYPE(ha)) {
6947                                 if (IS_QLA82XX(ha))
6948                                         qla82xx_device_state_handler(base_vha);
6949                                 if (IS_QLA8044(ha))
6950                                         qla8044_device_state_handler(base_vha);
6951                                 clear_bit(ISP_QUIESCE_NEEDED,
6952                                     &base_vha->dpc_flags);
6953                                 if (!ha->flags.quiesce_owner) {
6954                                         qla2x00_perform_loop_resync(base_vha);
6955                                         if (IS_QLA82XX(ha)) {
6956                                                 qla82xx_idc_lock(ha);
6957                                                 qla82xx_clear_qsnt_ready(
6958                                                     base_vha);
6959                                                 qla82xx_idc_unlock(ha);
6960                                         } else if (IS_QLA8044(ha)) {
6961                                                 qla8044_idc_lock(ha);
6962                                                 qla8044_clear_qsnt_ready(
6963                                                     base_vha);
6964                                                 qla8044_idc_unlock(ha);
6965                                         }
6966                                 }
6967                         } else {
6968                                 clear_bit(ISP_QUIESCE_NEEDED,
6969                                     &base_vha->dpc_flags);
6970                                 qla2x00_quiesce_io(base_vha);
6971                         }
6972                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6973                             "Quiescence mode end.\n");
6974                 }
6975
6976                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6977                                 &base_vha->dpc_flags) &&
6978                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6979
6980                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6981                             "Reset marker scheduled.\n");
6982                         qla2x00_rst_aen(base_vha);
6983                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6984                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6985                             "Reset marker end.\n");
6986                 }
6987
6988                 /* Retry each device up to login retry count */
6989                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6990                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6991                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6992
6993                         if (!base_vha->relogin_jif ||
6994                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6995                                 base_vha->relogin_jif = jiffies + HZ;
6996                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6997
6998                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6999                                     "Relogin scheduled.\n");
7000                                 qla24xx_post_relogin_work(base_vha);
7001                         }
7002                 }
7003 loop_resync_check:
7004                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
7005                     &base_vha->dpc_flags)) {
7006
7007                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
7008                             "Loop resync scheduled.\n");
7009
7010                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
7011                             &base_vha->dpc_flags))) {
7012
7013                                 qla2x00_loop_resync(base_vha);
7014
7015                                 clear_bit(LOOP_RESYNC_ACTIVE,
7016                                                 &base_vha->dpc_flags);
7017                         }
7018
7019                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
7020                             "Loop resync end.\n");
7021                 }
7022
7023                 if (IS_QLAFX00(ha))
7024                         goto intr_on_check;
7025
7026                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
7027                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
7028                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
7029                         qla2xxx_flash_npiv_conf(base_vha);
7030                 }
7031
7032 intr_on_check:
7033                 if (!ha->interrupts_on)
7034                         ha->isp_ops->enable_intrs(ha);
7035
7036                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
7037                                         &base_vha->dpc_flags)) {
7038                         if (ha->beacon_blink_led == 1)
7039                                 ha->isp_ops->beacon_blink(base_vha);
7040                 }
7041
7042                 /* qpair online check */
7043                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
7044                     &base_vha->dpc_flags)) {
7045                         if (ha->flags.eeh_busy ||
7046                             ha->flags.pci_channel_io_perm_failure)
7047                                 online = 0;
7048                         else
7049                                 online = 1;
7050
7051                         mutex_lock(&ha->mq_lock);
7052                         list_for_each_entry(qpair, &base_vha->qp_list,
7053                             qp_list_elem)
7054                         qpair->online = online;
7055                         mutex_unlock(&ha->mq_lock);
7056                 }
7057
7058                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
7059                     &base_vha->dpc_flags)) {
7060                         ql_log(ql_log_info, base_vha, 0xffffff,
7061                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
7062                                                 ha->nvme_last_rptd_aen);
7063                         if (qla27xx_set_zio_threshold(base_vha,
7064                             ha->nvme_last_rptd_aen)) {
7065                                 ql_log(ql_log_info, base_vha, 0xffffff,
7066                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
7067                                     ha->nvme_last_rptd_aen);
7068                         }
7069                 }
7070
7071                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
7072                     &base_vha->dpc_flags)) {
7073                         ql_log(ql_log_info, base_vha, 0xffffff,
7074                             "SET ZIO Activity exchange threshold to %d.\n",
7075                             ha->last_zio_threshold);
7076                         qla27xx_set_zio_threshold(base_vha,
7077                             ha->last_zio_threshold);
7078                 }
7079
7080                 if (!IS_QLAFX00(ha))
7081                         qla2x00_do_dpc_all_vps(base_vha);
7082
7083                 if (test_and_clear_bit(N2N_LINK_RESET,
7084                         &base_vha->dpc_flags)) {
7085                         qla2x00_lip_reset(base_vha);
7086                 }
7087
7088                 ha->dpc_active = 0;
7089 end_loop:
7090                 set_current_state(TASK_INTERRUPTIBLE);
7091         } /* End of while(1) */
7092         __set_current_state(TASK_RUNNING);
7093
7094         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
7095             "DPC handler exiting.\n");
7096
7097         /*
7098          * Make sure that nobody tries to wake us up again.
7099          */
7100         ha->dpc_active = 0;
7101
7102         /* Cleanup any residual CTX SRBs. */
7103         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
7104
7105         return 0;
7106 }
7107
7108 void
7109 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
7110 {
7111         struct qla_hw_data *ha = vha->hw;
7112         struct task_struct *t = ha->dpc_thread;
7113
7114         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
7115                 wake_up_process(t);
7116 }
7117
7118 /*
7119 *  qla2x00_rst_aen
7120 *      Processes asynchronous reset.
7121 *
7122 * Input:
7123 *      ha  = adapter block pointer.
7124 */
7125 static void
7126 qla2x00_rst_aen(scsi_qla_host_t *vha)
7127 {
7128         if (vha->flags.online && !vha->flags.reset_active &&
7129             !atomic_read(&vha->loop_down_timer) &&
7130             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
7131                 do {
7132                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7133
7134                         /*
7135                          * Issue marker command only when we are going to start
7136                          * the I/O.
7137                          */
7138                         vha->marker_needed = 1;
7139                 } while (!atomic_read(&vha->loop_down_timer) &&
7140                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
7141         }
7142 }
7143
7144 /**************************************************************************
7145 *   qla2x00_timer
7146 *
7147 * Description:
7148 *   One second timer
7149 *
7150 * Context: Interrupt
7151 ***************************************************************************/
7152 void
7153 qla2x00_timer(struct timer_list *t)
7154 {
7155         scsi_qla_host_t *vha = from_timer(vha, t, timer);
7156         unsigned long   cpu_flags = 0;
7157         int             start_dpc = 0;
7158         int             index;
7159         srb_t           *sp;
7160         uint16_t        w;
7161         struct qla_hw_data *ha = vha->hw;
7162         struct req_que *req;
7163
7164         if (ha->flags.eeh_busy) {
7165                 ql_dbg(ql_dbg_timer, vha, 0x6000,
7166                     "EEH = %d, restarting timer.\n",
7167                     ha->flags.eeh_busy);
7168                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
7169                 return;
7170         }
7171
7172         /*
7173          * Hardware read to raise pending EEH errors during mailbox waits. If
7174          * the read returns -1 then disable the board.
7175          */
7176         if (!pci_channel_offline(ha->pdev)) {
7177                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
7178                 qla2x00_check_reg16_for_disconnect(vha, w);
7179         }
7180
7181         /* Make sure qla82xx_watchdog is run only for physical port */
7182         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
7183                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
7184                         start_dpc++;
7185                 if (IS_QLA82XX(ha))
7186                         qla82xx_watchdog(vha);
7187                 else if (IS_QLA8044(ha))
7188                         qla8044_watchdog(vha);
7189         }
7190
7191         if (!vha->vp_idx && IS_QLAFX00(ha))
7192                 qlafx00_timer_routine(vha);
7193
7194         /* Loop down handler. */
7195         if (atomic_read(&vha->loop_down_timer) > 0 &&
7196             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
7197             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
7198                 && vha->flags.online) {
7199
7200                 if (atomic_read(&vha->loop_down_timer) ==
7201                     vha->loop_down_abort_time) {
7202
7203                         ql_log(ql_log_info, vha, 0x6008,
7204                             "Loop down - aborting the queues before time expires.\n");
7205
7206                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
7207                                 atomic_set(&vha->loop_state, LOOP_DEAD);
7208
7209                         /*
7210                          * Schedule an ISP abort to return any FCP2-device
7211                          * commands.
7212                          */
7213                         /* NPIV - scan physical port only */
7214                         if (!vha->vp_idx) {
7215                                 spin_lock_irqsave(&ha->hardware_lock,
7216                                     cpu_flags);
7217                                 req = ha->req_q_map[0];
7218                                 for (index = 1;
7219                                     index < req->num_outstanding_cmds;
7220                                     index++) {
7221                                         fc_port_t *sfcp;
7222
7223                                         sp = req->outstanding_cmds[index];
7224                                         if (!sp)
7225                                                 continue;
7226                                         if (sp->cmd_type != TYPE_SRB)
7227                                                 continue;
7228                                         if (sp->type != SRB_SCSI_CMD)
7229                                                 continue;
7230                                         sfcp = sp->fcport;
7231                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
7232                                                 continue;
7233
7234                                         if (IS_QLA82XX(ha))
7235                                                 set_bit(FCOE_CTX_RESET_NEEDED,
7236                                                         &vha->dpc_flags);
7237                                         else
7238                                                 set_bit(ISP_ABORT_NEEDED,
7239                                                         &vha->dpc_flags);
7240                                         break;
7241                                 }
7242                                 spin_unlock_irqrestore(&ha->hardware_lock,
7243                                                                 cpu_flags);
7244                         }
7245                         start_dpc++;
7246                 }
7247
7248                 /* if the loop has been down for 4 minutes, reinit adapter */
7249                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
7250                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
7251                                 ql_log(ql_log_warn, vha, 0x6009,
7252                                     "Loop down - aborting ISP.\n");
7253
7254                                 if (IS_QLA82XX(ha))
7255                                         set_bit(FCOE_CTX_RESET_NEEDED,
7256                                                 &vha->dpc_flags);
7257                                 else
7258                                         set_bit(ISP_ABORT_NEEDED,
7259                                                 &vha->dpc_flags);
7260                         }
7261                 }
7262                 ql_dbg(ql_dbg_timer, vha, 0x600a,
7263                     "Loop down - seconds remaining %d.\n",
7264                     atomic_read(&vha->loop_down_timer));
7265         }
7266         /* Check if beacon LED needs to be blinked for physical host only */
7267         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
7268                 /* There is no beacon_blink function for ISP82xx */
7269                 if (!IS_P3P_TYPE(ha)) {
7270                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
7271                         start_dpc++;
7272                 }
7273         }
7274
7275         /* Process any deferred work. */
7276         if (!list_empty(&vha->work_list)) {
7277                 unsigned long flags;
7278                 bool q = false;
7279
7280                 spin_lock_irqsave(&vha->work_lock, flags);
7281                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
7282                         q = true;
7283                 spin_unlock_irqrestore(&vha->work_lock, flags);
7284                 if (q)
7285                         queue_work(vha->hw->wq, &vha->iocb_work);
7286         }
7287
7288         /*
7289          * FC-NVME
7290          * see if the active AEN count has changed from what was last reported.
7291          */
7292         if (!vha->vp_idx &&
7293             (atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen) &&
7294             ha->zio_mode == QLA_ZIO_MODE_6 &&
7295             !ha->flags.host_shutting_down) {
7296                 ql_log(ql_log_info, vha, 0x3002,
7297                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
7298                     ha->nvme_last_rptd_aen);
7299                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
7300                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7301                 start_dpc++;
7302         }
7303
7304         if (!vha->vp_idx &&
7305             (atomic_read(&ha->zio_threshold) != ha->last_zio_threshold) &&
7306             (ha->zio_mode == QLA_ZIO_MODE_6) &&
7307             (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
7308                 ql_log(ql_log_info, vha, 0x3002,
7309                     "Sched: Set ZIO exchange threshold to %d.\n",
7310                     ha->last_zio_threshold);
7311                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
7312                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7313                 start_dpc++;
7314         }
7315
7316         /* Schedule the DPC routine if needed */
7317         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
7318             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
7319             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
7320             start_dpc ||
7321             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
7322             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
7323             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
7324             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
7325             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
7326             test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
7327             test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags))) {
7328                 ql_dbg(ql_dbg_timer, vha, 0x600b,
7329                     "isp_abort_needed=%d loop_resync_needed=%d "
7330                     "fcport_update_needed=%d start_dpc=%d "
7331                     "reset_marker_needed=%d",
7332                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
7333                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
7334                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
7335                     start_dpc,
7336                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
7337                 ql_dbg(ql_dbg_timer, vha, 0x600c,
7338                     "beacon_blink_needed=%d isp_unrecoverable=%d "
7339                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
7340                     "relogin_needed=%d, Process_purex_iocb=%d.\n",
7341                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
7342                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
7343                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
7344                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
7345                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
7346                     test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags));
7347                 qla2xxx_wake_dpc(vha);
7348         }
7349
7350         qla2x00_restart_timer(vha, WATCH_INTERVAL);
7351 }
7352
7353 /* Firmware interface routines. */
7354
7355 #define FW_ISP21XX      0
7356 #define FW_ISP22XX      1
7357 #define FW_ISP2300      2
7358 #define FW_ISP2322      3
7359 #define FW_ISP24XX      4
7360 #define FW_ISP25XX      5
7361 #define FW_ISP81XX      6
7362 #define FW_ISP82XX      7
7363 #define FW_ISP2031      8
7364 #define FW_ISP8031      9
7365 #define FW_ISP27XX      10
7366 #define FW_ISP28XX      11
7367
7368 #define FW_FILE_ISP21XX "ql2100_fw.bin"
7369 #define FW_FILE_ISP22XX "ql2200_fw.bin"
7370 #define FW_FILE_ISP2300 "ql2300_fw.bin"
7371 #define FW_FILE_ISP2322 "ql2322_fw.bin"
7372 #define FW_FILE_ISP24XX "ql2400_fw.bin"
7373 #define FW_FILE_ISP25XX "ql2500_fw.bin"
7374 #define FW_FILE_ISP81XX "ql8100_fw.bin"
7375 #define FW_FILE_ISP82XX "ql8200_fw.bin"
7376 #define FW_FILE_ISP2031 "ql2600_fw.bin"
7377 #define FW_FILE_ISP8031 "ql8300_fw.bin"
7378 #define FW_FILE_ISP27XX "ql2700_fw.bin"
7379 #define FW_FILE_ISP28XX "ql2800_fw.bin"
7380
7381
7382 static DEFINE_MUTEX(qla_fw_lock);
7383
7384 static struct fw_blob qla_fw_blobs[] = {
7385         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
7386         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
7387         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
7388         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
7389         { .name = FW_FILE_ISP24XX, },
7390         { .name = FW_FILE_ISP25XX, },
7391         { .name = FW_FILE_ISP81XX, },
7392         { .name = FW_FILE_ISP82XX, },
7393         { .name = FW_FILE_ISP2031, },
7394         { .name = FW_FILE_ISP8031, },
7395         { .name = FW_FILE_ISP27XX, },
7396         { .name = FW_FILE_ISP28XX, },
7397         { .name = NULL, },
7398 };
7399
7400 struct fw_blob *
7401 qla2x00_request_firmware(scsi_qla_host_t *vha)
7402 {
7403         struct qla_hw_data *ha = vha->hw;
7404         struct fw_blob *blob;
7405
7406         if (IS_QLA2100(ha)) {
7407                 blob = &qla_fw_blobs[FW_ISP21XX];
7408         } else if (IS_QLA2200(ha)) {
7409                 blob = &qla_fw_blobs[FW_ISP22XX];
7410         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
7411                 blob = &qla_fw_blobs[FW_ISP2300];
7412         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
7413                 blob = &qla_fw_blobs[FW_ISP2322];
7414         } else if (IS_QLA24XX_TYPE(ha)) {
7415                 blob = &qla_fw_blobs[FW_ISP24XX];
7416         } else if (IS_QLA25XX(ha)) {
7417                 blob = &qla_fw_blobs[FW_ISP25XX];
7418         } else if (IS_QLA81XX(ha)) {
7419                 blob = &qla_fw_blobs[FW_ISP81XX];
7420         } else if (IS_QLA82XX(ha)) {
7421                 blob = &qla_fw_blobs[FW_ISP82XX];
7422         } else if (IS_QLA2031(ha)) {
7423                 blob = &qla_fw_blobs[FW_ISP2031];
7424         } else if (IS_QLA8031(ha)) {
7425                 blob = &qla_fw_blobs[FW_ISP8031];
7426         } else if (IS_QLA27XX(ha)) {
7427                 blob = &qla_fw_blobs[FW_ISP27XX];
7428         } else if (IS_QLA28XX(ha)) {
7429                 blob = &qla_fw_blobs[FW_ISP28XX];
7430         } else {
7431                 return NULL;
7432         }
7433
7434         if (!blob->name)
7435                 return NULL;
7436
7437         mutex_lock(&qla_fw_lock);
7438         if (blob->fw)
7439                 goto out;
7440
7441         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
7442                 ql_log(ql_log_warn, vha, 0x0063,
7443                     "Failed to load firmware image (%s).\n", blob->name);
7444                 blob->fw = NULL;
7445                 blob = NULL;
7446         }
7447
7448 out:
7449         mutex_unlock(&qla_fw_lock);
7450         return blob;
7451 }
7452
7453 static void
7454 qla2x00_release_firmware(void)
7455 {
7456         struct fw_blob *blob;
7457
7458         mutex_lock(&qla_fw_lock);
7459         for (blob = qla_fw_blobs; blob->name; blob++)
7460                 release_firmware(blob->fw);
7461         mutex_unlock(&qla_fw_lock);
7462 }
7463
7464 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
7465 {
7466         struct qla_hw_data *ha = vha->hw;
7467         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
7468         struct qla_qpair *qpair = NULL;
7469         struct scsi_qla_host *vp;
7470         fc_port_t *fcport;
7471         int i;
7472         unsigned long flags;
7473
7474         ha->chip_reset++;
7475
7476         ha->base_qpair->chip_reset = ha->chip_reset;
7477         for (i = 0; i < ha->max_qpairs; i++) {
7478                 if (ha->queue_pair_map[i])
7479                         ha->queue_pair_map[i]->chip_reset =
7480                             ha->base_qpair->chip_reset;
7481         }
7482
7483         /* purge MBox commands */
7484         if (atomic_read(&ha->num_pend_mbx_stage3)) {
7485                 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
7486                 complete(&ha->mbx_intr_comp);
7487         }
7488
7489         i = 0;
7490
7491         while (atomic_read(&ha->num_pend_mbx_stage3) ||
7492             atomic_read(&ha->num_pend_mbx_stage2) ||
7493             atomic_read(&ha->num_pend_mbx_stage1)) {
7494                 msleep(20);
7495                 i++;
7496                 if (i > 50)
7497                         break;
7498         }
7499
7500         ha->flags.purge_mbox = 0;
7501
7502         mutex_lock(&ha->mq_lock);
7503         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7504                 qpair->online = 0;
7505         mutex_unlock(&ha->mq_lock);
7506
7507         qla2x00_mark_all_devices_lost(vha);
7508
7509         spin_lock_irqsave(&ha->vport_slock, flags);
7510         list_for_each_entry(vp, &ha->vp_list, list) {
7511                 atomic_inc(&vp->vref_count);
7512                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7513                 qla2x00_mark_all_devices_lost(vp);
7514                 spin_lock_irqsave(&ha->vport_slock, flags);
7515                 atomic_dec(&vp->vref_count);
7516         }
7517         spin_unlock_irqrestore(&ha->vport_slock, flags);
7518
7519         /* Clear all async request states across all VPs. */
7520         list_for_each_entry(fcport, &vha->vp_fcports, list)
7521                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7522
7523         spin_lock_irqsave(&ha->vport_slock, flags);
7524         list_for_each_entry(vp, &ha->vp_list, list) {
7525                 atomic_inc(&vp->vref_count);
7526                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7527                 list_for_each_entry(fcport, &vp->vp_fcports, list)
7528                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7529                 spin_lock_irqsave(&ha->vport_slock, flags);
7530                 atomic_dec(&vp->vref_count);
7531         }
7532         spin_unlock_irqrestore(&ha->vport_slock, flags);
7533 }
7534
7535
7536 static pci_ers_result_t
7537 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
7538 {
7539         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
7540         struct qla_hw_data *ha = vha->hw;
7541
7542         ql_dbg(ql_dbg_aer, vha, 0x9000,
7543             "PCI error detected, state %x.\n", state);
7544
7545         if (!atomic_read(&pdev->enable_cnt)) {
7546                 ql_log(ql_log_info, vha, 0xffff,
7547                         "PCI device is disabled,state %x\n", state);
7548                 return PCI_ERS_RESULT_NEED_RESET;
7549         }
7550
7551         switch (state) {
7552         case pci_channel_io_normal:
7553                 ha->flags.eeh_busy = 0;
7554                 if (ql2xmqsupport || ql2xnvmeenable) {
7555                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7556                         qla2xxx_wake_dpc(vha);
7557                 }
7558                 return PCI_ERS_RESULT_CAN_RECOVER;
7559         case pci_channel_io_frozen:
7560                 ha->flags.eeh_busy = 1;
7561                 qla_pci_error_cleanup(vha);
7562                 return PCI_ERS_RESULT_NEED_RESET;
7563         case pci_channel_io_perm_failure:
7564                 ha->flags.pci_channel_io_perm_failure = 1;
7565                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
7566                 if (ql2xmqsupport || ql2xnvmeenable) {
7567                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7568                         qla2xxx_wake_dpc(vha);
7569                 }
7570                 return PCI_ERS_RESULT_DISCONNECT;
7571         }
7572         return PCI_ERS_RESULT_NEED_RESET;
7573 }
7574
7575 static pci_ers_result_t
7576 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
7577 {
7578         int risc_paused = 0;
7579         uint32_t stat;
7580         unsigned long flags;
7581         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7582         struct qla_hw_data *ha = base_vha->hw;
7583         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7584         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
7585
7586         if (IS_QLA82XX(ha))
7587                 return PCI_ERS_RESULT_RECOVERED;
7588
7589         spin_lock_irqsave(&ha->hardware_lock, flags);
7590         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
7591                 stat = rd_reg_word(&reg->hccr);
7592                 if (stat & HCCR_RISC_PAUSE)
7593                         risc_paused = 1;
7594         } else if (IS_QLA23XX(ha)) {
7595                 stat = rd_reg_dword(&reg->u.isp2300.host_status);
7596                 if (stat & HSR_RISC_PAUSED)
7597                         risc_paused = 1;
7598         } else if (IS_FWI2_CAPABLE(ha)) {
7599                 stat = rd_reg_dword(&reg24->host_status);
7600                 if (stat & HSRX_RISC_PAUSED)
7601                         risc_paused = 1;
7602         }
7603         spin_unlock_irqrestore(&ha->hardware_lock, flags);
7604
7605         if (risc_paused) {
7606                 ql_log(ql_log_info, base_vha, 0x9003,
7607                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
7608                 qla2xxx_dump_fw(base_vha);
7609
7610                 return PCI_ERS_RESULT_NEED_RESET;
7611         } else
7612                 return PCI_ERS_RESULT_RECOVERED;
7613 }
7614
7615 static pci_ers_result_t
7616 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
7617 {
7618         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
7619         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7620         struct qla_hw_data *ha = base_vha->hw;
7621         int rc;
7622         struct qla_qpair *qpair = NULL;
7623
7624         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
7625             "Slot Reset.\n");
7626
7627         /* Workaround: qla2xxx driver which access hardware earlier
7628          * needs error state to be pci_channel_io_online.
7629          * Otherwise mailbox command timesout.
7630          */
7631         pdev->error_state = pci_channel_io_normal;
7632
7633         pci_restore_state(pdev);
7634
7635         /* pci_restore_state() clears the saved_state flag of the device
7636          * save restored state which resets saved_state flag
7637          */
7638         pci_save_state(pdev);
7639
7640         if (ha->mem_only)
7641                 rc = pci_enable_device_mem(pdev);
7642         else
7643                 rc = pci_enable_device(pdev);
7644
7645         if (rc) {
7646                 ql_log(ql_log_warn, base_vha, 0x9005,
7647                     "Can't re-enable PCI device after reset.\n");
7648                 goto exit_slot_reset;
7649         }
7650
7651
7652         if (ha->isp_ops->pci_config(base_vha))
7653                 goto exit_slot_reset;
7654
7655         mutex_lock(&ha->mq_lock);
7656         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7657                 qpair->online = 1;
7658         mutex_unlock(&ha->mq_lock);
7659
7660         base_vha->flags.online = 1;
7661         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7662         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
7663                 ret =  PCI_ERS_RESULT_RECOVERED;
7664         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7665
7666
7667 exit_slot_reset:
7668         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7669             "slot_reset return %x.\n", ret);
7670
7671         return ret;
7672 }
7673
7674 static void
7675 qla2xxx_pci_resume(struct pci_dev *pdev)
7676 {
7677         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7678         struct qla_hw_data *ha = base_vha->hw;
7679         int ret;
7680
7681         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
7682             "pci_resume.\n");
7683
7684         ha->flags.eeh_busy = 0;
7685
7686         ret = qla2x00_wait_for_hba_online(base_vha);
7687         if (ret != QLA_SUCCESS) {
7688                 ql_log(ql_log_fatal, base_vha, 0x9002,
7689                     "The device failed to resume I/O from slot/link_reset.\n");
7690         }
7691 }
7692
7693 static void
7694 qla_pci_reset_prepare(struct pci_dev *pdev)
7695 {
7696         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7697         struct qla_hw_data *ha = base_vha->hw;
7698         struct qla_qpair *qpair;
7699
7700         ql_log(ql_log_warn, base_vha, 0xffff,
7701             "%s.\n", __func__);
7702
7703         /*
7704          * PCI FLR/function reset is about to reset the
7705          * slot. Stop the chip to stop all DMA access.
7706          * It is assumed that pci_reset_done will be called
7707          * after FLR to resume Chip operation.
7708          */
7709         ha->flags.eeh_busy = 1;
7710         mutex_lock(&ha->mq_lock);
7711         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7712                 qpair->online = 0;
7713         mutex_unlock(&ha->mq_lock);
7714
7715         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7716         qla2x00_abort_isp_cleanup(base_vha);
7717         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7718 }
7719
7720 static void
7721 qla_pci_reset_done(struct pci_dev *pdev)
7722 {
7723         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7724         struct qla_hw_data *ha = base_vha->hw;
7725         struct qla_qpair *qpair;
7726
7727         ql_log(ql_log_warn, base_vha, 0xffff,
7728             "%s.\n", __func__);
7729
7730         /*
7731          * FLR just completed by PCI layer. Resume adapter
7732          */
7733         ha->flags.eeh_busy = 0;
7734         mutex_lock(&ha->mq_lock);
7735         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7736                 qpair->online = 1;
7737         mutex_unlock(&ha->mq_lock);
7738
7739         base_vha->flags.online = 1;
7740         ha->isp_ops->abort_isp(base_vha);
7741         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7742 }
7743
7744 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7745 {
7746         int rc;
7747         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7748         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7749
7750         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7751                 rc = blk_mq_map_queues(qmap);
7752         else
7753                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7754         return rc;
7755 }
7756
7757 struct scsi_host_template qla2xxx_driver_template = {
7758         .module                 = THIS_MODULE,
7759         .name                   = QLA2XXX_DRIVER_NAME,
7760         .queuecommand           = qla2xxx_queuecommand,
7761
7762         .eh_timed_out           = fc_eh_timed_out,
7763         .eh_abort_handler       = qla2xxx_eh_abort,
7764         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7765         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7766         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7767         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7768
7769         .slave_configure        = qla2xxx_slave_configure,
7770
7771         .slave_alloc            = qla2xxx_slave_alloc,
7772         .slave_destroy          = qla2xxx_slave_destroy,
7773         .scan_finished          = qla2xxx_scan_finished,
7774         .scan_start             = qla2xxx_scan_start,
7775         .change_queue_depth     = scsi_change_queue_depth,
7776         .map_queues             = qla2xxx_map_queues,
7777         .this_id                = -1,
7778         .cmd_per_lun            = 3,
7779         .sg_tablesize           = SG_ALL,
7780
7781         .max_sectors            = 0xFFFF,
7782         .shost_attrs            = qla2x00_host_attrs,
7783
7784         .supported_mode         = MODE_INITIATOR,
7785         .track_queue_depth      = 1,
7786         .cmd_size               = sizeof(srb_t),
7787 };
7788
7789 static const struct pci_error_handlers qla2xxx_err_handler = {
7790         .error_detected = qla2xxx_pci_error_detected,
7791         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7792         .slot_reset = qla2xxx_pci_slot_reset,
7793         .resume = qla2xxx_pci_resume,
7794         .reset_prepare = qla_pci_reset_prepare,
7795         .reset_done = qla_pci_reset_done,
7796 };
7797
7798 static struct pci_device_id qla2xxx_pci_tbl[] = {
7799         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7800         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7801         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7802         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7803         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7804         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7805         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7806         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7807         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7808         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7809         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7810         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7811         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7812         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7813         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7814         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7815         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7816         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7817         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7818         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7819         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7820         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7821         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7822         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7823         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7824         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7825         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7826         { 0 },
7827 };
7828 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
7829
7830 static struct pci_driver qla2xxx_pci_driver = {
7831         .name           = QLA2XXX_DRIVER_NAME,
7832         .driver         = {
7833                 .owner          = THIS_MODULE,
7834         },
7835         .id_table       = qla2xxx_pci_tbl,
7836         .probe          = qla2x00_probe_one,
7837         .remove         = qla2x00_remove_one,
7838         .shutdown       = qla2x00_shutdown,
7839         .err_handler    = &qla2xxx_err_handler,
7840 };
7841
7842 static const struct file_operations apidev_fops = {
7843         .owner = THIS_MODULE,
7844         .llseek = noop_llseek,
7845 };
7846
7847 /**
7848  * qla2x00_module_init - Module initialization.
7849  **/
7850 static int __init
7851 qla2x00_module_init(void)
7852 {
7853         int ret = 0;
7854
7855         BUILD_BUG_ON(sizeof(cmd_a64_entry_t) != 64);
7856         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
7857         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
7858         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
7859         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
7860         BUILD_BUG_ON(sizeof(mrk_entry_t) != 64);
7861         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
7862         BUILD_BUG_ON(sizeof(request_t) != 64);
7863         BUILD_BUG_ON(sizeof(struct abort_entry_24xx) != 64);
7864         BUILD_BUG_ON(sizeof(struct abort_iocb_entry_fx00) != 64);
7865         BUILD_BUG_ON(sizeof(struct abts_entry_24xx) != 64);
7866         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
7867         BUILD_BUG_ON(sizeof(struct access_chip_rsp_84xx) != 64);
7868         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
7869         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
7870         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
7871         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
7872         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
7873         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
7874         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
7875         BUILD_BUG_ON(sizeof(struct ct_fdmi1_hba_attributes) != 2344);
7876         BUILD_BUG_ON(sizeof(struct ct_fdmi2_hba_attributes) != 4424);
7877         BUILD_BUG_ON(sizeof(struct ct_fdmi2_port_attributes) != 4164);
7878         BUILD_BUG_ON(sizeof(struct ct_fdmi_hba_attr) != 260);
7879         BUILD_BUG_ON(sizeof(struct ct_fdmi_port_attr) != 260);
7880         BUILD_BUG_ON(sizeof(struct ct_rsp_hdr) != 16);
7881         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
7882         BUILD_BUG_ON(sizeof(struct device_reg_24xx) != 256);
7883         BUILD_BUG_ON(sizeof(struct device_reg_25xxmq) != 24);
7884         BUILD_BUG_ON(sizeof(struct device_reg_2xxx) != 256);
7885         BUILD_BUG_ON(sizeof(struct device_reg_82xx) != 1288);
7886         BUILD_BUG_ON(sizeof(struct device_reg_fx00) != 216);
7887         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
7888         BUILD_BUG_ON(sizeof(struct els_sts_entry_24xx) != 64);
7889         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
7890         BUILD_BUG_ON(sizeof(struct imm_ntfy_from_isp) != 64);
7891         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
7892         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
7893         BUILD_BUG_ON(sizeof(struct logio_entry_24xx) != 64);
7894         BUILD_BUG_ON(sizeof(struct mbx_entry) != 64);
7895         BUILD_BUG_ON(sizeof(struct mid_init_cb_24xx) != 5252);
7896         BUILD_BUG_ON(sizeof(struct mrk_entry_24xx) != 64);
7897         BUILD_BUG_ON(sizeof(struct nvram_24xx) != 512);
7898         BUILD_BUG_ON(sizeof(struct nvram_81xx) != 512);
7899         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
7900         BUILD_BUG_ON(sizeof(struct pt_ls4_rx_unsol) != 64);
7901         BUILD_BUG_ON(sizeof(struct purex_entry_24xx) != 64);
7902         BUILD_BUG_ON(sizeof(struct qla2100_fw_dump) != 123634);
7903         BUILD_BUG_ON(sizeof(struct qla2300_fw_dump) != 136100);
7904         BUILD_BUG_ON(sizeof(struct qla24xx_fw_dump) != 37976);
7905         BUILD_BUG_ON(sizeof(struct qla25xx_fw_dump) != 39228);
7906         BUILD_BUG_ON(sizeof(struct qla2xxx_fce_chain) != 52);
7907         BUILD_BUG_ON(sizeof(struct qla2xxx_fw_dump) != 136172);
7908         BUILD_BUG_ON(sizeof(struct qla2xxx_mq_chain) != 524);
7909         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_chain) != 8);
7910         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_header) != 12);
7911         BUILD_BUG_ON(sizeof(struct qla2xxx_offld_chain) != 24);
7912         BUILD_BUG_ON(sizeof(struct qla81xx_fw_dump) != 39420);
7913         BUILD_BUG_ON(sizeof(struct qla82xx_uri_data_desc) != 28);
7914         BUILD_BUG_ON(sizeof(struct qla82xx_uri_table_desc) != 32);
7915         BUILD_BUG_ON(sizeof(struct qla83xx_fw_dump) != 51196);
7916         BUILD_BUG_ON(sizeof(struct qla_fcp_prio_cfg) != FCP_PRIO_CFG_SIZE);
7917         BUILD_BUG_ON(sizeof(struct qla_fdt_layout) != 128);
7918         BUILD_BUG_ON(sizeof(struct qla_flt_header) != 8);
7919         BUILD_BUG_ON(sizeof(struct qla_flt_region) != 16);
7920         BUILD_BUG_ON(sizeof(struct qla_npiv_entry) != 24);
7921         BUILD_BUG_ON(sizeof(struct qla_npiv_header) != 16);
7922         BUILD_BUG_ON(sizeof(struct rdp_rsp_payload) != 336);
7923         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
7924         BUILD_BUG_ON(sizeof(struct sts_entry_24xx) != 64);
7925         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry) != 64);
7926         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry_fx00) != 64);
7927         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
7928         BUILD_BUG_ON(sizeof(struct verify_chip_rsp_84xx) != 52);
7929         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
7930         BUILD_BUG_ON(sizeof(struct vp_config_entry_24xx) != 64);
7931         BUILD_BUG_ON(sizeof(struct vp_ctrl_entry_24xx) != 64);
7932         BUILD_BUG_ON(sizeof(struct vp_rpt_id_entry_24xx) != 64);
7933         BUILD_BUG_ON(sizeof(sts21_entry_t) != 64);
7934         BUILD_BUG_ON(sizeof(sts22_entry_t) != 64);
7935         BUILD_BUG_ON(sizeof(sts_cont_entry_t) != 64);
7936         BUILD_BUG_ON(sizeof(sts_entry_t) != 64);
7937         BUILD_BUG_ON(sizeof(sw_info_t) != 32);
7938         BUILD_BUG_ON(sizeof(target_id_t) != 2);
7939
7940         /* Allocate cache for SRBs. */
7941         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7942             SLAB_HWCACHE_ALIGN, NULL);
7943         if (srb_cachep == NULL) {
7944                 ql_log(ql_log_fatal, NULL, 0x0001,
7945                     "Unable to allocate SRB cache...Failing load!.\n");
7946                 return -ENOMEM;
7947         }
7948
7949         /* Initialize target kmem_cache and mem_pools */
7950         ret = qlt_init();
7951         if (ret < 0) {
7952                 goto destroy_cache;
7953         } else if (ret > 0) {
7954                 /*
7955                  * If initiator mode is explictly disabled by qlt_init(),
7956                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7957                  * performing scsi_scan_target() during LOOP UP event.
7958                  */
7959                 qla2xxx_transport_functions.disable_target_scan = 1;
7960                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7961         }
7962
7963         /* Derive version string. */
7964         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7965         if (ql2xextended_error_logging)
7966                 strcat(qla2x00_version_str, "-debug");
7967         if (ql2xextended_error_logging == 1)
7968                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7969
7970         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7971                 qla_insert_tgt_attrs();
7972
7973         qla2xxx_transport_template =
7974             fc_attach_transport(&qla2xxx_transport_functions);
7975         if (!qla2xxx_transport_template) {
7976                 ql_log(ql_log_fatal, NULL, 0x0002,
7977                     "fc_attach_transport failed...Failing load!.\n");
7978                 ret = -ENODEV;
7979                 goto qlt_exit;
7980         }
7981
7982         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7983         if (apidev_major < 0) {
7984                 ql_log(ql_log_fatal, NULL, 0x0003,
7985                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7986         }
7987
7988         qla2xxx_transport_vport_template =
7989             fc_attach_transport(&qla2xxx_transport_vport_functions);
7990         if (!qla2xxx_transport_vport_template) {
7991                 ql_log(ql_log_fatal, NULL, 0x0004,
7992                     "fc_attach_transport vport failed...Failing load!.\n");
7993                 ret = -ENODEV;
7994                 goto unreg_chrdev;
7995         }
7996         ql_log(ql_log_info, NULL, 0x0005,
7997             "QLogic Fibre Channel HBA Driver: %s.\n",
7998             qla2x00_version_str);
7999         ret = pci_register_driver(&qla2xxx_pci_driver);
8000         if (ret) {
8001                 ql_log(ql_log_fatal, NULL, 0x0006,
8002                     "pci_register_driver failed...ret=%d Failing load!.\n",
8003                     ret);
8004                 goto release_vport_transport;
8005         }
8006         return ret;
8007
8008 release_vport_transport:
8009         fc_release_transport(qla2xxx_transport_vport_template);
8010
8011 unreg_chrdev:
8012         if (apidev_major >= 0)
8013                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8014         fc_release_transport(qla2xxx_transport_template);
8015
8016 qlt_exit:
8017         qlt_exit();
8018
8019 destroy_cache:
8020         kmem_cache_destroy(srb_cachep);
8021         return ret;
8022 }
8023
8024 /**
8025  * qla2x00_module_exit - Module cleanup.
8026  **/
8027 static void __exit
8028 qla2x00_module_exit(void)
8029 {
8030         pci_unregister_driver(&qla2xxx_pci_driver);
8031         qla2x00_release_firmware();
8032         kmem_cache_destroy(ctx_cachep);
8033         fc_release_transport(qla2xxx_transport_vport_template);
8034         if (apidev_major >= 0)
8035                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8036         fc_release_transport(qla2xxx_transport_template);
8037         qlt_exit();
8038         kmem_cache_destroy(srb_cachep);
8039 }
8040
8041 module_init(qla2x00_module_init);
8042 module_exit(qla2x00_module_exit);
8043
8044 MODULE_AUTHOR("QLogic Corporation");
8045 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
8046 MODULE_LICENSE("GPL");
8047 MODULE_VERSION(QLA2XXX_VERSION);
8048 MODULE_FIRMWARE(FW_FILE_ISP21XX);
8049 MODULE_FIRMWARE(FW_FILE_ISP22XX);
8050 MODULE_FIRMWARE(FW_FILE_ISP2300);
8051 MODULE_FIRMWARE(FW_FILE_ISP2322);
8052 MODULE_FIRMWARE(FW_FILE_ISP24XX);
8053 MODULE_FIRMWARE(FW_FILE_ISP25XX);