drivers/scsi/qla2xxx/qla_os.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * QLogic Fibre Channel HBA Driver
   4  * Copyright (c)  2003-2014 QLogic Corporation
   5  */
   6 #include "qla_def.h"
   7
   8 #include <linux/moduleparam.h>
   9 #include <linux/vmalloc.h>
  10 #include <linux/delay.h>
  11 #include <linux/kthread.h>
  12 #include <linux/mutex.h>
  13 #include <linux/kobject.h>
  14 #include <linux/slab.h>
  15 #include <linux/blk-mq-pci.h>
  16 #include <linux/refcount.h>
  17
  18 #include <scsi/scsi_tcq.h>
  19 #include <scsi/scsicam.h>
  20 #include <scsi/scsi_transport.h>
  21 #include <scsi/scsi_transport_fc.h>
  22
  23 #include "qla_target.h"
  24
  25 /*
  26  * Driver version
  27  */
  28 char qla2x00_version_str[40];
  29
  30 static int apidev_major;
  31
  32 /*
  33  * SRB allocation cache
  34  */
  35 struct kmem_cache *srb_cachep;
  36
  37 int ql2xfulldump_on_mpifail;
  38 module_param(ql2xfulldump_on_mpifail, int, S_IRUGO | S_IWUSR);
  39 MODULE_PARM_DESC(ql2xfulldump_on_mpifail,
  40                  "Set this to take full dump on MPI hang.");
  41
  42 int ql2xenforce_iocb_limit = 1;
  43 module_param(ql2xenforce_iocb_limit, int, S_IRUGO | S_IWUSR);
  44 MODULE_PARM_DESC(ql2xenforce_iocb_limit,
  45                  "Enforce IOCB throttling, to avoid FW congestion. (default: 1)");
  46
  47 /*
  48  * CT6 CTX allocation cache
  49  */
  50 static struct kmem_cache *ctx_cachep;
  51 /*
  52  * error level for logging
  53  */
  54 uint ql_errlev = 0x8001;
  55
  56 static int ql2xenableclass2;
  57 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  58 MODULE_PARM_DESC(ql2xenableclass2,
  59                 "Specify if Class 2 operations are supported from the very "
  60                 "beginning. Default is 0 - class 2 not supported.");
  61
  62
  63 int ql2xlogintimeout = 20;
  64 module_param(ql2xlogintimeout, int, S_IRUGO);
  65 MODULE_PARM_DESC(ql2xlogintimeout,
  66                 "Login timeout value in seconds.");
  67
  68 int qlport_down_retry;
  69 module_param(qlport_down_retry, int, S_IRUGO);
  70 MODULE_PARM_DESC(qlport_down_retry,
  71                 "Maximum number of command retries to a port that returns "
  72                 "a PORT-DOWN status.");
  73
  74 int ql2xplogiabsentdevice;
  75 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  76 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  77                 "Option to enable PLOGI to devices that are not present after "
  78                 "a Fabric scan.  This is needed for several broken switches. "
  79                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  80
  81 int ql2xloginretrycount;
  82 module_param(ql2xloginretrycount, int, S_IRUGO);
  83 MODULE_PARM_DESC(ql2xloginretrycount,
  84                 "Specify an alternate value for the NVRAM login retry count.");
  85
  86 int ql2xallocfwdump = 1;
  87 module_param(ql2xallocfwdump, int, S_IRUGO);
  88 MODULE_PARM_DESC(ql2xallocfwdump,
  89                 "Option to enable allocation of memory for a firmware dump "
  90                 "during HBA initialization.  Memory allocation requirements "
  91                 "vary by ISP type.  Default is 1 - allocate memory.");
  92
  93 int ql2xextended_error_logging;
  94 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  95 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  96 MODULE_PARM_DESC(ql2xextended_error_logging,
  97                 "Option to enable extended error logging,\n"
  98                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  99                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
 100                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
 101                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
 102                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
 103                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
 104                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
 105                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
 106                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
 107                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
 108                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 109                 "\t\t0x1e400000 - Preferred value for capturing essential "
 110                 "debug information (equivalent to old "
 111                 "ql2xextended_error_logging=1).\n"
 112                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 113
 114 int ql2xshiftctondsd = 6;
 115 module_param(ql2xshiftctondsd, int, S_IRUGO);
 116 MODULE_PARM_DESC(ql2xshiftctondsd,
 117                 "Set to control shifting of command type processing "
 118                 "based on total number of SG elements.");
 119
 120 int ql2xfdmienable = 1;
 121 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 122 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 123 MODULE_PARM_DESC(ql2xfdmienable,
 124                 "Enables FDMI registrations. "
 125                 "0 - no FDMI registrations. "
 126                 "1 - provide FDMI registrations (default).");
 127
 128 #define MAX_Q_DEPTH     64
 129 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 130 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xmaxqdepth,
 132                 "Maximum queue depth to set for each LUN. "
 133                 "Default is 64.");
 134
 135 int ql2xenabledif = 2;
 136 module_param(ql2xenabledif, int, S_IRUGO);
 137 MODULE_PARM_DESC(ql2xenabledif,
 138                 " Enable T10-CRC-DIF:\n"
 139                 " Default is 2.\n"
 140                 "  0 -- No DIF Support\n"
 141                 "  1 -- Enable DIF for all types\n"
 142                 "  2 -- Enable DIF for all types, except Type 0.\n");
 143
 144 #if (IS_ENABLED(CONFIG_NVME_FC))
 145 int ql2xnvmeenable = 1;
 146 #else
 147 int ql2xnvmeenable;
 148 #endif
 149 module_param(ql2xnvmeenable, int, 0644);
 150 MODULE_PARM_DESC(ql2xnvmeenable,
 151     "Enables NVME support. "
 152     "0 - no NVMe.  Default is Y");
 153
 154 int ql2xenablehba_err_chk = 2;
 155 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 156 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 157                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 158                 " Default is 2.\n"
 159                 "  0 -- Error isolation disabled\n"
 160                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 161                 "  2 -- Error isolation enabled for all Types\n");
 162
 163 int ql2xiidmaenable = 1;
 164 module_param(ql2xiidmaenable, int, S_IRUGO);
 165 MODULE_PARM_DESC(ql2xiidmaenable,
 166                 "Enables iIDMA settings "
 167                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 168
 169 int ql2xmqsupport = 1;
 170 module_param(ql2xmqsupport, int, S_IRUGO);
 171 MODULE_PARM_DESC(ql2xmqsupport,
 172                 "Enable on demand multiple queue pairs support "
 173                 "Default is 1 for supported. "
 174                 "Set it to 0 to turn off mq qpair support.");
 175
 176 int ql2xfwloadbin;
 177 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 178 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 179 MODULE_PARM_DESC(ql2xfwloadbin,
 180                 "Option to specify location from which to load ISP firmware:.\n"
 181                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 182                 "      interface.\n"
 183                 " 1 -- load firmware from flash.\n"
 184                 " 0 -- use default semantics.\n");
 185
 186 int ql2xetsenable;
 187 module_param(ql2xetsenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xetsenable,
 189                 "Enables firmware ETS burst."
 190                 "Default is 0 - skip ETS enablement.");
 191
 192 int ql2xdbwr = 1;
 193 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 194 MODULE_PARM_DESC(ql2xdbwr,
 195                 "Option to specify scheme for request queue posting.\n"
 196                 " 0 -- Regular doorbell.\n"
 197                 " 1 -- CAMRAM doorbell (faster).\n");
 198
 199 int ql2xtargetreset = 1;
 200 module_param(ql2xtargetreset, int, S_IRUGO);
 201 MODULE_PARM_DESC(ql2xtargetreset,
 202                  "Enable target reset."
 203                  "Default is 1 - use hw defaults.");
 204
 205 int ql2xgffidenable;
 206 module_param(ql2xgffidenable, int, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xgffidenable,
 208                 "Enables GFF_ID checks of port type. "
 209                 "Default is 0 - Do not use GFF_ID information.");
 210
 211 int ql2xasynctmfenable = 1;
 212 module_param(ql2xasynctmfenable, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xasynctmfenable,
 214                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 215                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 216
 217 int ql2xdontresethba;
 218 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 219 MODULE_PARM_DESC(ql2xdontresethba,
 220                 "Option to specify reset behaviour.\n"
 221                 " 0 (Default) -- Reset on failure.\n"
 222                 " 1 -- Do not reset on failure.\n");
 223
 224 uint64_t ql2xmaxlun = MAX_LUNS;
 225 module_param(ql2xmaxlun, ullong, S_IRUGO);
 226 MODULE_PARM_DESC(ql2xmaxlun,
 227                 "Defines the maximum LU number to register with the SCSI "
 228                 "midlayer. Default is 65535.");
 229
 230 int ql2xmdcapmask = 0x1F;
 231 module_param(ql2xmdcapmask, int, S_IRUGO);
 232 MODULE_PARM_DESC(ql2xmdcapmask,
 233                 "Set the Minidump driver capture mask level. "
 234                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 235
 236 int ql2xmdenable = 1;
 237 module_param(ql2xmdenable, int, S_IRUGO);
 238 MODULE_PARM_DESC(ql2xmdenable,
 239                 "Enable/disable MiniDump. "
 240                 "0 - MiniDump disabled. "
 241                 "1 (Default) - MiniDump enabled.");
 242
 243 int ql2xexlogins;
 244 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 245 MODULE_PARM_DESC(ql2xexlogins,
 246                  "Number of extended Logins. "
 247                  "0 (Default)- Disabled.");
 248
 249 int ql2xexchoffld = 1024;
 250 module_param(ql2xexchoffld, uint, 0644);
 251 MODULE_PARM_DESC(ql2xexchoffld,
 252         "Number of target exchanges.");
 253
 254 int ql2xiniexchg = 1024;
 255 module_param(ql2xiniexchg, uint, 0644);
 256 MODULE_PARM_DESC(ql2xiniexchg,
 257         "Number of initiator exchanges.");
 258
 259 int ql2xfwholdabts;
 260 module_param(ql2xfwholdabts, int, S_IRUGO);
 261 MODULE_PARM_DESC(ql2xfwholdabts,
 262                 "Allow FW to hold status IOCB until ABTS rsp received. "
 263                 "0 (Default) Do not set fw option. "
 264                 "1 - Set fw option to hold ABTS.");
 265
 266 int ql2xmvasynctoatio = 1;
 267 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 268 MODULE_PARM_DESC(ql2xmvasynctoatio,
 269                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 270                 "0 (Default). Do not move IOCBs"
 271                 "1 - Move IOCBs.");
 272
 273 int ql2xautodetectsfp = 1;
 274 module_param(ql2xautodetectsfp, int, 0444);
 275 MODULE_PARM_DESC(ql2xautodetectsfp,
 276                  "Detect SFP range and set appropriate distance.\n"
 277                  "1 (Default): Enable\n");
 278
 279 int ql2xenablemsix = 1;
 280 module_param(ql2xenablemsix, int, 0444);
 281 MODULE_PARM_DESC(ql2xenablemsix,
 282                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 283                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 284                  " 0 -- enable traditional pin-based mechanism.\n"
 285                  " 1 -- enable MSI-X interrupt mechanism.\n"
 286                  " 2 -- enable MSI interrupt mechanism.\n");
 287
 288 int qla2xuseresexchforels;
 289 module_param(qla2xuseresexchforels, int, 0444);
 290 MODULE_PARM_DESC(qla2xuseresexchforels,
 291                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 292                  " 0 (default): disabled");
 293
 294 static int ql2xprotmask;
 295 module_param(ql2xprotmask, int, 0644);
 296 MODULE_PARM_DESC(ql2xprotmask,
 297                  "Override DIF/DIX protection capabilities mask\n"
 298                  "Default is 0 which sets protection mask based on "
 299                  "capabilities reported by HBA firmware.\n");
 300
 301 static int ql2xprotguard;
 302 module_param(ql2xprotguard, int, 0644);
 303 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 304                  "  0 -- Let HBA firmware decide\n"
 305                  "  1 -- Force T10 CRC\n"
 306                  "  2 -- Force IP checksum\n");
 307
 308 int ql2xdifbundlinginternalbuffers;
 309 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 310 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 311     "Force using internal buffers for DIF information\n"
 312     "0 (Default). Based on check.\n"
 313     "1 Force using internal buffers\n");
 314
 315 int ql2xsmartsan;
 316 module_param(ql2xsmartsan, int, 0444);
 317 module_param_named(smartsan, ql2xsmartsan, int, 0444);
 318 MODULE_PARM_DESC(ql2xsmartsan,
 319                 "Send SmartSAN Management Attributes for FDMI Registration."
 320                 " Default is 0 - No SmartSAN registration,"
 321                 " 1 - Register SmartSAN Management Attributes.");
 322
 323 int ql2xrdpenable;
 324 module_param(ql2xrdpenable, int, 0444);
 325 module_param_named(rdpenable, ql2xrdpenable, int, 0444);
 326 MODULE_PARM_DESC(ql2xrdpenable,
 327                 "Enables RDP responses. "
 328                 "0 - no RDP responses (default). "
 329                 "1 - provide RDP responses.");
 330 int ql2xabts_wait_nvme = 1;
 331 module_param(ql2xabts_wait_nvme, int, 0444);
 332 MODULE_PARM_DESC(ql2xabts_wait_nvme,
 333                  "To wait for ABTS response on I/O timeouts for NVMe. (default: 1)");
 334
 335
 336 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 337 static void qla2x00_free_device(scsi_qla_host_t *);
 338 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 339 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 340
 341
 342 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 343 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 344
 345 /* TODO Convert to inlines
 346  *
 347  * Timer routines
 348  */
 349
 350 __inline__ void
 351 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 352 {
 353         timer_setup(&vha->timer, qla2x00_timer, 0);
 354         vha->timer.expires = jiffies + interval * HZ;
 355         add_timer(&vha->timer);
 356         vha->timer_active = 1;
 357 }
 358
 359 static inline void
 360 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 361 {
 362         /* Currently used for 82XX only. */
 363         if (vha->device_flags & DFLG_DEV_FAILED) {
 364                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 365                     "Device in a failed state, returning.\n");
 366                 return;
 367         }
 368
 369         mod_timer(&vha->timer, jiffies + interval * HZ);
 370 }
 371
 372 static __inline__ void
 373 qla2x00_stop_timer(scsi_qla_host_t *vha)
 374 {
 375         del_timer_sync(&vha->timer);
 376         vha->timer_active = 0;
 377 }
 378
 379 static int qla2x00_do_dpc(void *data);
 380
 381 static void qla2x00_rst_aen(scsi_qla_host_t *);
 382
 383 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 384         struct req_que **, struct rsp_que **);
 385 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 386 static void qla2x00_mem_free(struct qla_hw_data *);
 387 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 388         struct qla_qpair *qpair);
 389
 390 /* -------------------------------------------------------------------------- */
 391 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 392     struct rsp_que *rsp)
 393 {
 394         struct qla_hw_data *ha = vha->hw;
 395
 396         rsp->qpair = ha->base_qpair;
 397         rsp->req = req;
 398         ha->base_qpair->hw = ha;
 399         ha->base_qpair->req = req;
 400         ha->base_qpair->rsp = rsp;
 401         ha->base_qpair->vha = vha;
 402         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 403         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 404         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 405         ha->base_qpair->srb_mempool = ha->srb_mempool;
 406         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 407         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 408         /* init qpair to this cpu. Will adjust at run time. */
 409         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 410         ha->base_qpair->pdev = ha->pdev;
 411
 412         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 413                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 414 }
 415
 416 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 417                                 struct rsp_que *rsp)
 418 {
 419         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 420
 421         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 422                                 GFP_KERNEL);
 423         if (!ha->req_q_map) {
 424                 ql_log(ql_log_fatal, vha, 0x003b,
 425                     "Unable to allocate memory for request queue ptrs.\n");
 426                 goto fail_req_map;
 427         }
 428
 429         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 430                                 GFP_KERNEL);
 431         if (!ha->rsp_q_map) {
 432                 ql_log(ql_log_fatal, vha, 0x003c,
 433                     "Unable to allocate memory for response queue ptrs.\n");
 434                 goto fail_rsp_map;
 435         }
 436
 437         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 438         if (ha->base_qpair == NULL) {
 439                 ql_log(ql_log_warn, vha, 0x00e0,
 440                     "Failed to allocate base queue pair memory.\n");
 441                 goto fail_base_qpair;
 442         }
 443
 444         qla_init_base_qpair(vha, req, rsp);
 445
 446         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 447                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 448                         GFP_KERNEL);
 449                 if (!ha->queue_pair_map) {
 450                         ql_log(ql_log_fatal, vha, 0x0180,
 451                             "Unable to allocate memory for queue pair ptrs.\n");
 452                         goto fail_qpair_map;
 453                 }
 454         }
 455
 456         /*
 457          * Make sure we record at least the request and response queue zero in
 458          * case we need to free them if part of the probe fails.
 459          */
 460         ha->rsp_q_map[0] = rsp;
 461         ha->req_q_map[0] = req;
 462         set_bit(0, ha->rsp_qid_map);
 463         set_bit(0, ha->req_qid_map);
 464         return 0;
 465
 466 fail_qpair_map:
 467         kfree(ha->base_qpair);
 468         ha->base_qpair = NULL;
 469 fail_base_qpair:
 470         kfree(ha->rsp_q_map);
 471         ha->rsp_q_map = NULL;
 472 fail_rsp_map:
 473         kfree(ha->req_q_map);
 474         ha->req_q_map = NULL;
 475 fail_req_map:
 476         return -ENOMEM;
 477 }
 478
 479 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 480 {
 481         if (IS_QLAFX00(ha)) {
 482                 if (req && req->ring_fx00)
 483                         dma_free_coherent(&ha->pdev->dev,
 484                             (req->length_fx00 + 1) * sizeof(request_t),
 485                             req->ring_fx00, req->dma_fx00);
 486         } else if (req && req->ring)
 487                 dma_free_coherent(&ha->pdev->dev,
 488                 (req->length + 1) * sizeof(request_t),
 489                 req->ring, req->dma);
 490
 491         if (req)
 492                 kfree(req->outstanding_cmds);
 493
 494         kfree(req);
 495 }
 496
 497 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 498 {
 499         if (IS_QLAFX00(ha)) {
 500                 if (rsp && rsp->ring_fx00)
 501                         dma_free_coherent(&ha->pdev->dev,
 502                             (rsp->length_fx00 + 1) * sizeof(request_t),
 503                             rsp->ring_fx00, rsp->dma_fx00);
 504         } else if (rsp && rsp->ring) {
 505                 dma_free_coherent(&ha->pdev->dev,
 506                 (rsp->length + 1) * sizeof(response_t),
 507                 rsp->ring, rsp->dma);
 508         }
 509         kfree(rsp);
 510 }
 511
 512 static void qla2x00_free_queues(struct qla_hw_data *ha)
 513 {
 514         struct req_que *req;
 515         struct rsp_que *rsp;
 516         int cnt;
 517         unsigned long flags;
 518
 519         if (ha->queue_pair_map) {
 520                 kfree(ha->queue_pair_map);
 521                 ha->queue_pair_map = NULL;
 522         }
 523         if (ha->base_qpair) {
 524                 kfree(ha->base_qpair);
 525                 ha->base_qpair = NULL;
 526         }
 527
 528         spin_lock_irqsave(&ha->hardware_lock, flags);
 529         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 530                 if (!test_bit(cnt, ha->req_qid_map))
 531                         continue;
 532
 533                 req = ha->req_q_map[cnt];
 534                 clear_bit(cnt, ha->req_qid_map);
 535                 ha->req_q_map[cnt] = NULL;
 536
 537                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 538                 qla2x00_free_req_que(ha, req);
 539                 spin_lock_irqsave(&ha->hardware_lock, flags);
 540         }
 541         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 542
 543         kfree(ha->req_q_map);
 544         ha->req_q_map = NULL;
 545
 546
 547         spin_lock_irqsave(&ha->hardware_lock, flags);
 548         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 549                 if (!test_bit(cnt, ha->rsp_qid_map))
 550                         continue;
 551
 552                 rsp = ha->rsp_q_map[cnt];
 553                 clear_bit(cnt, ha->rsp_qid_map);
 554                 ha->rsp_q_map[cnt] =  NULL;
 555                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 556                 qla2x00_free_rsp_que(ha, rsp);
 557                 spin_lock_irqsave(&ha->hardware_lock, flags);
 558         }
 559         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 560
 561         kfree(ha->rsp_q_map);
 562         ha->rsp_q_map = NULL;
 563 }
 564
 565 static char *
 566 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 567 {
 568         struct qla_hw_data *ha = vha->hw;
 569         static const char *const pci_bus_modes[] = {
 570                 "33", "66", "100", "133",
 571         };
 572         uint16_t pci_bus;
 573
 574         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 575         if (pci_bus) {
 576                 snprintf(str, str_len, "PCI-X (%s MHz)",
 577                          pci_bus_modes[pci_bus]);
 578         } else {
 579                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 580                 snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]);
 581         }
 582
 583         return str;
 584 }
 585
 586 static char *
 587 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
 588 {
 589         static const char *const pci_bus_modes[] = {
 590                 "33", "66", "100", "133",
 591         };
 592         struct qla_hw_data *ha = vha->hw;
 593         uint32_t pci_bus;
 594
 595         if (pci_is_pcie(ha->pdev)) {
 596                 uint32_t lstat, lspeed, lwidth;
 597                 const char *speed_str;
 598
 599                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 600                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 601                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 602
 603                 switch (lspeed) {
 604                 case 1:
 605                         speed_str = "2.5GT/s";
 606                         break;
 607                 case 2:
 608                         speed_str = "5.0GT/s";
 609                         break;
 610                 case 3:
 611                         speed_str = "8.0GT/s";
 612                         break;
 613                 case 4:
 614                         speed_str = "16.0GT/s";
 615                         break;
 616                 default:
 617                         speed_str = "<unknown>";
 618                         break;
 619                 }
 620                 snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth);
 621
 622                 return str;
 623         }
 624
 625         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 626         if (pci_bus == 0 || pci_bus == 8)
 627                 snprintf(str, str_len, "PCI (%s MHz)",
 628                          pci_bus_modes[pci_bus >> 3]);
 629         else
 630                 snprintf(str, str_len, "PCI-X Mode %d (%s MHz)",
 631                          pci_bus & 4 ? 2 : 1,
 632                          pci_bus_modes[pci_bus & 3]);
 633
 634         return str;
 635 }
 636
 637 static char *
 638 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 639 {
 640         char un_str[10];
 641         struct qla_hw_data *ha = vha->hw;
 642
 643         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 644             ha->fw_minor_version, ha->fw_subminor_version);
 645
 646         if (ha->fw_attributes & BIT_9) {
 647                 strcat(str, "FLX");
 648                 return (str);
 649         }
 650
 651         switch (ha->fw_attributes & 0xFF) {
 652         case 0x7:
 653                 strcat(str, "EF");
 654                 break;
 655         case 0x17:
 656                 strcat(str, "TP");
 657                 break;
 658         case 0x37:
 659                 strcat(str, "IP");
 660                 break;
 661         case 0x77:
 662                 strcat(str, "VI");
 663                 break;
 664         default:
 665                 sprintf(un_str, "(%x)", ha->fw_attributes);
 666                 strcat(str, un_str);
 667                 break;
 668         }
 669         if (ha->fw_attributes & 0x100)
 670                 strcat(str, "X");
 671
 672         return (str);
 673 }
 674
 675 static char *
 676 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 677 {
 678         struct qla_hw_data *ha = vha->hw;
 679
 680         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 681             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 682         return str;
 683 }
 684
 685 void qla2x00_sp_free_dma(srb_t *sp)
 686 {
 687         struct qla_hw_data *ha = sp->vha->hw;
 688         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 689
 690         if (sp->flags & SRB_DMA_VALID) {
 691                 scsi_dma_unmap(cmd);
 692                 sp->flags &= ~SRB_DMA_VALID;
 693         }
 694
 695         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 696                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 697                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 698                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 699         }
 700
 701         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 702                 /* List assured to be having elements */
 703                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 704                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 705         }
 706
 707         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 708                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 709
 710                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 711                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 712         }
 713
 714         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 715                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 716
 717                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 718                     ctx1->fcp_cmnd_dma);
 719                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 720                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 721                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 722                 mempool_free(ctx1, ha->ctx_mempool);
 723         }
 724 }
 725
 726 void qla2x00_sp_compl(srb_t *sp, int res)
 727 {
 728         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 729         struct completion *comp = sp->comp;
 730
 731         sp->free(sp);
 732         cmd->result = res;
 733         CMD_SP(cmd) = NULL;
 734         cmd->scsi_done(cmd);
 735         if (comp)
 736                 complete(comp);
 737 }
 738
 739 void qla2xxx_qpair_sp_free_dma(srb_t *sp)
 740 {
 741         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 742         struct qla_hw_data *ha = sp->fcport->vha->hw;
 743
 744         if (sp->flags & SRB_DMA_VALID) {
 745                 scsi_dma_unmap(cmd);
 746                 sp->flags &= ~SRB_DMA_VALID;
 747         }
 748
 749         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 750                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 751                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 752                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 753         }
 754
 755         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 756                 /* List assured to be having elements */
 757                 qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx);
 758                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 759         }
 760
 761         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 762                 struct crc_context *difctx = sp->u.scmd.crc_ctx;
 763                 struct dsd_dma *dif_dsd, *nxt_dsd;
 764
 765                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 766                     &difctx->ldif_dma_hndl_list, list) {
 767                         list_del(&dif_dsd->list);
 768                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 769                             dif_dsd->dsd_list_dma);
 770                         kfree(dif_dsd);
 771                         difctx->no_dif_bundl--;
 772                 }
 773
 774                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 775                     &difctx->ldif_dsd_list, list) {
 776                         list_del(&dif_dsd->list);
 777                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 778                             dif_dsd->dsd_list_dma);
 779                         kfree(dif_dsd);
 780                         difctx->no_ldif_dsd--;
 781                 }
 782
 783                 if (difctx->no_ldif_dsd) {
 784                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 785                             "%s: difctx->no_ldif_dsd=%x\n",
 786                             __func__, difctx->no_ldif_dsd);
 787                 }
 788
 789                 if (difctx->no_dif_bundl) {
 790                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 791                             "%s: difctx->no_dif_bundl=%x\n",
 792                             __func__, difctx->no_dif_bundl);
 793                 }
 794                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 795         }
 796
 797         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 798                 struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx;
 799
 800                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 801                     ctx1->fcp_cmnd_dma);
 802                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 803                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 804                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 805                 mempool_free(ctx1, ha->ctx_mempool);
 806                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 807         }
 808
 809         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 810                 struct crc_context *ctx0 = sp->u.scmd.crc_ctx;
 811
 812                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 813                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 814         }
 815 }
 816
 817 void qla2xxx_qpair_sp_compl(srb_t *sp, int res)
 818 {
 819         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 820         struct completion *comp = sp->comp;
 821
 822         sp->free(sp);
 823         cmd->result = res;
 824         CMD_SP(cmd) = NULL;
 825         cmd->scsi_done(cmd);
 826         if (comp)
 827                 complete(comp);
 828 }
 829
 830 static int
 831 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 832 {
 833         scsi_qla_host_t *vha = shost_priv(host);
 834         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 835         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 836         struct qla_hw_data *ha = vha->hw;
 837         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 838         srb_t *sp;
 839         int rval;
 840
 841         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 842             WARN_ON_ONCE(!rport)) {
 843                 cmd->result = DID_NO_CONNECT << 16;
 844                 goto qc24_fail_command;
 845         }
 846
 847         if (ha->mqenable) {
 848                 uint32_t tag;
 849                 uint16_t hwq;
 850                 struct qla_qpair *qpair = NULL;
 851
 852                 tag = blk_mq_unique_tag(cmd->request);
 853                 hwq = blk_mq_unique_tag_to_hwq(tag);
 854                 qpair = ha->queue_pair_map[hwq];
 855
 856                 if (qpair)
 857                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 858         }
 859
 860         if (ha->flags.eeh_busy) {
 861                 if (ha->flags.pci_channel_io_perm_failure) {
 862                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 863                             "PCI Channel IO permanent failure, exiting "
 864                             "cmd=%p.\n", cmd);
 865                         cmd->result = DID_NO_CONNECT << 16;
 866                 } else {
 867                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 868                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 869                         cmd->result = DID_REQUEUE << 16;
 870                 }
 871                 goto qc24_fail_command;
 872         }
 873
 874         rval = fc_remote_port_chkready(rport);
 875         if (rval) {
 876                 cmd->result = rval;
 877                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 878                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 879                     cmd, rval);
 880                 goto qc24_fail_command;
 881         }
 882
 883         if (!vha->flags.difdix_supported &&
 884                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 885                         ql_dbg(ql_dbg_io, vha, 0x3004,
 886                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 887                             cmd);
 888                         cmd->result = DID_NO_CONNECT << 16;
 889                         goto qc24_fail_command;
 890         }
 891
 892         if (!fcport || fcport->deleted) {
 893                 cmd->result = DID_IMM_RETRY << 16;
 894                 goto qc24_fail_command;
 895         }
 896
 897         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 898                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 899                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 900                         ql_dbg(ql_dbg_io, vha, 0x3005,
 901                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 902                             atomic_read(&fcport->state),
 903                             atomic_read(&base_vha->loop_state));
 904                         cmd->result = DID_NO_CONNECT << 16;
 905                         goto qc24_fail_command;
 906                 }
 907                 goto qc24_target_busy;
 908         }
 909
 910         /*
 911          * Return target busy if we've received a non-zero retry_delay_timer
 912          * in a FCP_RSP.
 913          */
 914         if (fcport->retry_delay_timestamp == 0) {
 915                 /* retry delay not set */
 916         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 917                 fcport->retry_delay_timestamp = 0;
 918         else
 919                 goto qc24_target_busy;
 920
 921         sp = scsi_cmd_priv(cmd);
 922         qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport);
 923
 924         sp->u.scmd.cmd = cmd;
 925         sp->type = SRB_SCSI_CMD;
 926
 927         CMD_SP(cmd) = (void *)sp;
 928         sp->free = qla2x00_sp_free_dma;
 929         sp->done = qla2x00_sp_compl;
 930
 931         rval = ha->isp_ops->start_scsi(sp);
 932         if (rval != QLA_SUCCESS) {
 933                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 934                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 935                 goto qc24_host_busy_free_sp;
 936         }
 937
 938         return 0;
 939
 940 qc24_host_busy_free_sp:
 941         sp->free(sp);
 942
 943 qc24_target_busy:
 944         return SCSI_MLQUEUE_TARGET_BUSY;
 945
 946 qc24_fail_command:
 947         cmd->scsi_done(cmd);
 948
 949         return 0;
 950 }
 951
 952 /* For MQ supported I/O */
 953 int
 954 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 955     struct qla_qpair *qpair)
 956 {
 957         scsi_qla_host_t *vha = shost_priv(host);
 958         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 959         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 960         struct qla_hw_data *ha = vha->hw;
 961         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 962         srb_t *sp;
 963         int rval;
 964
 965         rval = rport ? fc_remote_port_chkready(rport) : (DID_NO_CONNECT << 16);
 966         if (rval) {
 967                 cmd->result = rval;
 968                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 969                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 970                     cmd, rval);
 971                 goto qc24_fail_command;
 972         }
 973
 974         if (!qpair->online) {
 975                 ql_dbg(ql_dbg_io, vha, 0x3077,
 976                        "qpair not online. eeh_busy=%d.\n", ha->flags.eeh_busy);
 977                 cmd->result = DID_NO_CONNECT << 16;
 978                 goto qc24_fail_command;
 979         }
 980
 981         if (!fcport || fcport->deleted) {
 982                 cmd->result = DID_IMM_RETRY << 16;
 983                 goto qc24_fail_command;
 984         }
 985
 986         if (atomic_read(&fcport->state) != FCS_ONLINE || fcport->deleted) {
 987                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 988                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 989                         ql_dbg(ql_dbg_io, vha, 0x3077,
 990                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 991                             atomic_read(&fcport->state),
 992                             atomic_read(&base_vha->loop_state));
 993                         cmd->result = DID_NO_CONNECT << 16;
 994                         goto qc24_fail_command;
 995                 }
 996                 goto qc24_target_busy;
 997         }
 998
 999         /*
1000          * Return target busy if we've received a non-zero retry_delay_timer
1001          * in a FCP_RSP.
1002          */
1003         if (fcport->retry_delay_timestamp == 0) {
1004                 /* retry delay not set */
1005         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1006                 fcport->retry_delay_timestamp = 0;
1007         else
1008                 goto qc24_target_busy;
1009
1010         sp = scsi_cmd_priv(cmd);
1011         qla2xxx_init_sp(sp, vha, qpair, fcport);
1012
1013         sp->u.scmd.cmd = cmd;
1014         sp->type = SRB_SCSI_CMD;
1015         CMD_SP(cmd) = (void *)sp;
1016         sp->free = qla2xxx_qpair_sp_free_dma;
1017         sp->done = qla2xxx_qpair_sp_compl;
1018
1019         rval = ha->isp_ops->start_scsi_mq(sp);
1020         if (rval != QLA_SUCCESS) {
1021                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1022                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1023                 goto qc24_host_busy_free_sp;
1024         }
1025
1026         return 0;
1027
1028 qc24_host_busy_free_sp:
1029         sp->free(sp);
1030
1031 qc24_target_busy:
1032         return SCSI_MLQUEUE_TARGET_BUSY;
1033
1034 qc24_fail_command:
1035         cmd->scsi_done(cmd);
1036
1037         return 0;
1038 }
1039
1040 /*
1041  * qla2x00_eh_wait_on_command
1042  *    Waits for the command to be returned by the Firmware for some
1043  *    max time.
1044  *
1045  * Input:
1046  *    cmd = Scsi Command to wait on.
1047  *
1048  * Return:
1049  *    Completed in time : QLA_SUCCESS
1050  *    Did not complete in time : QLA_FUNCTION_FAILED
1051  */
1052 static int
1053 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1054 {
1055 #define ABORT_POLLING_PERIOD    1000
1056 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1057         unsigned long wait_iter = ABORT_WAIT_ITER;
1058         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1059         struct qla_hw_data *ha = vha->hw;
1060         int ret = QLA_SUCCESS;
1061
1062         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1063                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1064                     "Return:eh_wait.\n");
1065                 return ret;
1066         }
1067
1068         while (CMD_SP(cmd) && wait_iter--) {
1069                 msleep(ABORT_POLLING_PERIOD);
1070         }
1071         if (CMD_SP(cmd))
1072                 ret = QLA_FUNCTION_FAILED;
1073
1074         return ret;
1075 }
1076
1077 /*
1078  * qla2x00_wait_for_hba_online
1079  *    Wait till the HBA is online after going through
1080  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1081  *    finally HBA is disabled ie marked offline
1082  *
1083  * Input:
1084  *     ha - pointer to host adapter structure
1085  *
1086  * Note:
1087  *    Does context switching-Release SPIN_LOCK
1088  *    (if any) before calling this routine.
1089  *
1090  * Return:
1091  *    Success (Adapter is online) : 0
1092  *    Failed  (Adapter is offline/disabled) : 1
1093  */
1094 int
1095 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1096 {
1097         int             return_status;
1098         unsigned long   wait_online;
1099         struct qla_hw_data *ha = vha->hw;
1100         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1101
1102         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1103         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1104             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1105             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1106             ha->dpc_active) && time_before(jiffies, wait_online)) {
1107
1108                 msleep(1000);
1109         }
1110         if (base_vha->flags.online)
1111                 return_status = QLA_SUCCESS;
1112         else
1113                 return_status = QLA_FUNCTION_FAILED;
1114
1115         return (return_status);
1116 }
1117
1118 static inline int test_fcport_count(scsi_qla_host_t *vha)
1119 {
1120         struct qla_hw_data *ha = vha->hw;
1121         unsigned long flags;
1122         int res;
1123
1124         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1125         ql_dbg(ql_dbg_init, vha, 0x00ec,
1126             "tgt %p, fcport_count=%d\n",
1127             vha, vha->fcport_count);
1128         res = (vha->fcport_count == 0);
1129         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1130
1131         return res;
1132 }
1133
1134 /*
1135  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1136  * it has dependency on UNLOADING flag to stop device discovery
1137  */
1138 void
1139 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1140 {
1141         u8 i;
1142
1143         qla2x00_mark_all_devices_lost(vha);
1144
1145         for (i = 0; i < 10; i++) {
1146                 if (wait_event_timeout(vha->fcport_waitQ,
1147                     test_fcport_count(vha), HZ) > 0)
1148                         break;
1149         }
1150
1151         flush_workqueue(vha->hw->wq);
1152 }
1153
1154 /*
1155  * qla2x00_wait_for_hba_ready
1156  * Wait till the HBA is ready before doing driver unload
1157  *
1158  * Input:
1159  *     ha - pointer to host adapter structure
1160  *
1161  * Note:
1162  *    Does context switching-Release SPIN_LOCK
1163  *    (if any) before calling this routine.
1164  *
1165  */
1166 static void
1167 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1168 {
1169         struct qla_hw_data *ha = vha->hw;
1170         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1171
1172         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1173                 ha->flags.mbox_busy) ||
1174                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1175                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1176                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1177                         break;
1178                 msleep(1000);
1179         }
1180 }
1181
1182 int
1183 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1184 {
1185         int             return_status;
1186         unsigned long   wait_reset;
1187         struct qla_hw_data *ha = vha->hw;
1188         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1189
1190         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1191         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1192             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1193             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1194             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1195
1196                 msleep(1000);
1197
1198                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1199                     ha->flags.chip_reset_done)
1200                         break;
1201         }
1202         if (ha->flags.chip_reset_done)
1203                 return_status = QLA_SUCCESS;
1204         else
1205                 return_status = QLA_FUNCTION_FAILED;
1206
1207         return return_status;
1208 }
1209
1210 /**************************************************************************
1211 * qla2xxx_eh_abort
1212 *
1213 * Description:
1214 *    The abort function will abort the specified command.
1215 *
1216 * Input:
1217 *    cmd = Linux SCSI command packet to be aborted.
1218 *
1219 * Returns:
1220 *    Either SUCCESS or FAILED.
1221 *
1222 * Note:
1223 *    Only return FAILED if command not returned by firmware.
1224 **************************************************************************/
1225 static int
1226 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1227 {
1228         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1229         DECLARE_COMPLETION_ONSTACK(comp);
1230         srb_t *sp;
1231         int ret;
1232         unsigned int id;
1233         uint64_t lun;
1234         int rval;
1235         struct qla_hw_data *ha = vha->hw;
1236         uint32_t ratov_j;
1237         struct qla_qpair *qpair;
1238         unsigned long flags;
1239
1240         if (qla2x00_isp_reg_stat(ha)) {
1241                 ql_log(ql_log_info, vha, 0x8042,
1242                     "PCI/Register disconnect, exiting.\n");
1243                 qla_pci_set_eeh_busy(vha);
1244                 return FAILED;
1245         }
1246
1247         ret = fc_block_scsi_eh(cmd);
1248         if (ret != 0)
1249                 return ret;
1250
1251         sp = scsi_cmd_priv(cmd);
1252         qpair = sp->qpair;
1253
1254         vha->cmd_timeout_cnt++;
1255
1256         if ((sp->fcport && sp->fcport->deleted) || !qpair)
1257                 return SUCCESS;
1258
1259         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1260         sp->comp = &comp;
1261         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1262
1263
1264         id = cmd->device->id;
1265         lun = cmd->device->lun;
1266
1267         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1268             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1269             vha->host_no, id, lun, sp, cmd, sp->handle);
1270
1271         /*
1272          * Abort will release the original Command/sp from FW. Let the
1273          * original command call scsi_done. In return, he will wakeup
1274          * this sleeping thread.
1275          */
1276         rval = ha->isp_ops->abort_command(sp);
1277
1278         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1279                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1280
1281         /* Wait for the command completion. */
1282         ratov_j = ha->r_a_tov/10 * 4 * 1000;
1283         ratov_j = msecs_to_jiffies(ratov_j);
1284         switch (rval) {
1285         case QLA_SUCCESS:
1286                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1287                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1288                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1289                             __func__, ha->r_a_tov/10);
1290                         ret = FAILED;
1291                 } else {
1292                         ret = SUCCESS;
1293                 }
1294                 break;
1295         default:
1296                 ret = FAILED;
1297                 break;
1298         }
1299
1300         sp->comp = NULL;
1301
1302         ql_log(ql_log_info, vha, 0x801c,
1303             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1304             vha->host_no, id, lun, ret);
1305
1306         return ret;
1307 }
1308
1309 /*
1310  * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED.
1311  */
1312 int
1313 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1314         uint64_t l, enum nexus_wait_type type)
1315 {
1316         int cnt, match, status;
1317         unsigned long flags;
1318         struct qla_hw_data *ha = vha->hw;
1319         struct req_que *req;
1320         srb_t *sp;
1321         struct scsi_cmnd *cmd;
1322
1323         status = QLA_SUCCESS;
1324
1325         spin_lock_irqsave(&ha->hardware_lock, flags);
1326         req = vha->req;
1327         for (cnt = 1; status == QLA_SUCCESS &&
1328                 cnt < req->num_outstanding_cmds; cnt++) {
1329                 sp = req->outstanding_cmds[cnt];
1330                 if (!sp)
1331                         continue;
1332                 if (sp->type != SRB_SCSI_CMD)
1333                         continue;
1334                 if (vha->vp_idx != sp->vha->vp_idx)
1335                         continue;
1336                 match = 0;
1337                 cmd = GET_CMD_SP(sp);
1338                 switch (type) {
1339                 case WAIT_HOST:
1340                         match = 1;
1341                         break;
1342                 case WAIT_TARGET:
1343                         match = cmd->device->id == t;
1344                         break;
1345                 case WAIT_LUN:
1346                         match = (cmd->device->id == t &&
1347                                 cmd->device->lun == l);
1348                         break;
1349                 }
1350                 if (!match)
1351                         continue;
1352
1353                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1354                 status = qla2x00_eh_wait_on_command(cmd);
1355                 spin_lock_irqsave(&ha->hardware_lock, flags);
1356         }
1357         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1358
1359         return status;
1360 }
1361
1362 static char *reset_errors[] = {
1363         "HBA not online",
1364         "HBA not ready",
1365         "Task management failed",
1366         "Waiting for command completions",
1367 };
1368
1369 static int
1370 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1371     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1372 {
1373         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1374         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1375         int err;
1376
1377         if (!fcport) {
1378                 return FAILED;
1379         }
1380
1381         err = fc_block_scsi_eh(cmd);
1382         if (err != 0)
1383                 return err;
1384
1385         if (fcport->deleted)
1386                 return SUCCESS;
1387
1388         ql_log(ql_log_info, vha, 0x8009,
1389             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1390             cmd->device->id, cmd->device->lun, cmd);
1391
1392         err = 0;
1393         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1394                 ql_log(ql_log_warn, vha, 0x800a,
1395                     "Wait for hba online failed for cmd=%p.\n", cmd);
1396                 goto eh_reset_failed;
1397         }
1398         err = 2;
1399         if (do_reset(fcport, cmd->device->lun, 1)
1400                 != QLA_SUCCESS) {
1401                 ql_log(ql_log_warn, vha, 0x800c,
1402                     "do_reset failed for cmd=%p.\n", cmd);
1403                 goto eh_reset_failed;
1404         }
1405         err = 3;
1406         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1407             cmd->device->lun, type) != QLA_SUCCESS) {
1408                 ql_log(ql_log_warn, vha, 0x800d,
1409                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1410                 goto eh_reset_failed;
1411         }
1412
1413         ql_log(ql_log_info, vha, 0x800e,
1414             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1415             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1416
1417         return SUCCESS;
1418
1419 eh_reset_failed:
1420         ql_log(ql_log_info, vha, 0x800f,
1421             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1422             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1423             cmd);
1424         vha->reset_cmd_err_cnt++;
1425         return FAILED;
1426 }
1427
1428 static int
1429 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1430 {
1431         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1432         struct qla_hw_data *ha = vha->hw;
1433
1434         if (qla2x00_isp_reg_stat(ha)) {
1435                 ql_log(ql_log_info, vha, 0x803e,
1436                     "PCI/Register disconnect, exiting.\n");
1437                 qla_pci_set_eeh_busy(vha);
1438                 return FAILED;
1439         }
1440
1441         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1442             ha->isp_ops->lun_reset);
1443 }
1444
1445 static int
1446 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1447 {
1448         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1449         struct qla_hw_data *ha = vha->hw;
1450
1451         if (qla2x00_isp_reg_stat(ha)) {
1452                 ql_log(ql_log_info, vha, 0x803f,
1453                     "PCI/Register disconnect, exiting.\n");
1454                 qla_pci_set_eeh_busy(vha);
1455                 return FAILED;
1456         }
1457
1458         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1459             ha->isp_ops->target_reset);
1460 }
1461
1462 /**************************************************************************
1463 * qla2xxx_eh_bus_reset
1464 *
1465 * Description:
1466 *    The bus reset function will reset the bus and abort any executing
1467 *    commands.
1468 *
1469 * Input:
1470 *    cmd = Linux SCSI command packet of the command that cause the
1471 *          bus reset.
1472 *
1473 * Returns:
1474 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1475 *
1476 **************************************************************************/
1477 static int
1478 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1479 {
1480         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1481         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1482         int ret = FAILED;
1483         unsigned int id;
1484         uint64_t lun;
1485         struct qla_hw_data *ha = vha->hw;
1486
1487         if (qla2x00_isp_reg_stat(ha)) {
1488                 ql_log(ql_log_info, vha, 0x8040,
1489                     "PCI/Register disconnect, exiting.\n");
1490                 qla_pci_set_eeh_busy(vha);
1491                 return FAILED;
1492         }
1493
1494         id = cmd->device->id;
1495         lun = cmd->device->lun;
1496
1497         if (!fcport) {
1498                 return ret;
1499         }
1500
1501         ret = fc_block_scsi_eh(cmd);
1502         if (ret != 0)
1503                 return ret;
1504         ret = FAILED;
1505
1506         if (qla2x00_chip_is_down(vha))
1507                 return ret;
1508
1509         ql_log(ql_log_info, vha, 0x8012,
1510             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1511
1512         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1513                 ql_log(ql_log_fatal, vha, 0x8013,
1514                     "Wait for hba online failed board disabled.\n");
1515                 goto eh_bus_reset_done;
1516         }
1517
1518         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1519                 ret = SUCCESS;
1520
1521         if (ret == FAILED)
1522                 goto eh_bus_reset_done;
1523
1524         /* Flush outstanding commands. */
1525         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1526             QLA_SUCCESS) {
1527                 ql_log(ql_log_warn, vha, 0x8014,
1528                     "Wait for pending commands failed.\n");
1529                 ret = FAILED;
1530         }
1531
1532 eh_bus_reset_done:
1533         ql_log(ql_log_warn, vha, 0x802b,
1534             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1535             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1536
1537         return ret;
1538 }
1539
1540 /**************************************************************************
1541 * qla2xxx_eh_host_reset
1542 *
1543 * Description:
1544 *    The reset function will reset the Adapter.
1545 *
1546 * Input:
1547 *      cmd = Linux SCSI command packet of the command that cause the
1548 *            adapter reset.
1549 *
1550 * Returns:
1551 *      Either SUCCESS or FAILED.
1552 *
1553 * Note:
1554 **************************************************************************/
1555 static int
1556 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1557 {
1558         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1559         struct qla_hw_data *ha = vha->hw;
1560         int ret = FAILED;
1561         unsigned int id;
1562         uint64_t lun;
1563         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1564
1565         if (qla2x00_isp_reg_stat(ha)) {
1566                 ql_log(ql_log_info, vha, 0x8041,
1567                     "PCI/Register disconnect, exiting.\n");
1568                 qla_pci_set_eeh_busy(vha);
1569                 return SUCCESS;
1570         }
1571
1572         id = cmd->device->id;
1573         lun = cmd->device->lun;
1574
1575         ql_log(ql_log_info, vha, 0x8018,
1576             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1577
1578         /*
1579          * No point in issuing another reset if one is active.  Also do not
1580          * attempt a reset if we are updating flash.
1581          */
1582         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1583                 goto eh_host_reset_lock;
1584
1585         if (vha != base_vha) {
1586                 if (qla2x00_vp_abort_isp(vha))
1587                         goto eh_host_reset_lock;
1588         } else {
1589                 if (IS_P3P_TYPE(vha->hw)) {
1590                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1591                                 /* Ctx reset success */
1592                                 ret = SUCCESS;
1593                                 goto eh_host_reset_lock;
1594                         }
1595                         /* fall thru if ctx reset failed */
1596                 }
1597                 if (ha->wq)
1598                         flush_workqueue(ha->wq);
1599
1600                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1601                 if (ha->isp_ops->abort_isp(base_vha)) {
1602                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1603                         /* failed. schedule dpc to try */
1604                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1605
1606                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1607                                 ql_log(ql_log_warn, vha, 0x802a,
1608                                     "wait for hba online failed.\n");
1609                                 goto eh_host_reset_lock;
1610                         }
1611                 }
1612                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1613         }
1614
1615         /* Waiting for command to be returned to OS.*/
1616         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1617                 QLA_SUCCESS)
1618                 ret = SUCCESS;
1619
1620 eh_host_reset_lock:
1621         ql_log(ql_log_info, vha, 0x8017,
1622             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1623             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1624
1625         return ret;
1626 }
1627
1628 /*
1629 * qla2x00_loop_reset
1630 *      Issue loop reset.
1631 *
1632 * Input:
1633 *      ha = adapter block pointer.
1634 *
1635 * Returns:
1636 *      0 = success
1637 */
1638 int
1639 qla2x00_loop_reset(scsi_qla_host_t *vha)
1640 {
1641         int ret;
1642         struct fc_port *fcport;
1643         struct qla_hw_data *ha = vha->hw;
1644
1645         if (IS_QLAFX00(ha)) {
1646                 return qlafx00_loop_reset(vha);
1647         }
1648
1649         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1650                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1651                         if (fcport->port_type != FCT_TARGET)
1652                                 continue;
1653
1654                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1655                         if (ret != QLA_SUCCESS) {
1656                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1657                                     "Bus Reset failed: Reset=%d "
1658                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1659                         }
1660                 }
1661         }
1662
1663
1664         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1665                 atomic_set(&vha->loop_state, LOOP_DOWN);
1666                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1667                 qla2x00_mark_all_devices_lost(vha);
1668                 ret = qla2x00_full_login_lip(vha);
1669                 if (ret != QLA_SUCCESS) {
1670                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1671                             "full_login_lip=%d.\n", ret);
1672                 }
1673         }
1674
1675         if (ha->flags.enable_lip_reset) {
1676                 ret = qla2x00_lip_reset(vha);
1677                 if (ret != QLA_SUCCESS)
1678                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1679                             "lip_reset failed (%d).\n", ret);
1680         }
1681
1682         /* Issue marker command only when we are going to start the I/O */
1683         vha->marker_needed = 1;
1684
1685         return QLA_SUCCESS;
1686 }
1687
1688 /*
1689  * The caller must ensure that no completion interrupts will happen
1690  * while this function is in progress.
1691  */
1692 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1693                               unsigned long *flags)
1694         __releases(qp->qp_lock_ptr)
1695         __acquires(qp->qp_lock_ptr)
1696 {
1697         DECLARE_COMPLETION_ONSTACK(comp);
1698         scsi_qla_host_t *vha = qp->vha;
1699         struct qla_hw_data *ha = vha->hw;
1700         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1701         int rval;
1702         bool ret_cmd;
1703         uint32_t ratov_j;
1704
1705         lockdep_assert_held(qp->qp_lock_ptr);
1706
1707         if (qla2x00_chip_is_down(vha)) {
1708                 sp->done(sp, res);
1709                 return;
1710         }
1711
1712         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1713             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1714              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1715              !qla2x00_isp_reg_stat(ha))) {
1716                 if (sp->comp) {
1717                         sp->done(sp, res);
1718                         return;
1719                 }
1720
1721                 sp->comp = &comp;
1722                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1723
1724                 rval = ha->isp_ops->abort_command(sp);
1725                 /* Wait for command completion. */
1726                 ret_cmd = false;
1727                 ratov_j = ha->r_a_tov/10 * 4 * 1000;
1728                 ratov_j = msecs_to_jiffies(ratov_j);
1729                 switch (rval) {
1730                 case QLA_SUCCESS:
1731                         if (wait_for_completion_timeout(&comp, ratov_j)) {
1732                                 ql_dbg(ql_dbg_taskm, vha, 0xffff,
1733                                     "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1734                                     __func__, ha->r_a_tov/10);
1735                                 ret_cmd = true;
1736                         }
1737                         /* else FW return SP to driver */
1738                         break;
1739                 default:
1740                         ret_cmd = true;
1741                         break;
1742                 }
1743
1744                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1745                 if (ret_cmd && blk_mq_request_started(cmd->request))
1746                         sp->done(sp, res);
1747         } else {
1748                 sp->done(sp, res);
1749         }
1750 }
1751
1752 /*
1753  * The caller must ensure that no completion interrupts will happen
1754  * while this function is in progress.
1755  */
1756 static void
1757 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1758 {
1759         int cnt;
1760         unsigned long flags;
1761         srb_t *sp;
1762         scsi_qla_host_t *vha = qp->vha;
1763         struct qla_hw_data *ha = vha->hw;
1764         struct req_que *req;
1765         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1766         struct qla_tgt_cmd *cmd;
1767
1768         if (!ha->req_q_map)
1769                 return;
1770         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1771         req = qp->req;
1772         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1773                 sp = req->outstanding_cmds[cnt];
1774                 if (sp) {
1775                         switch (sp->cmd_type) {
1776                         case TYPE_SRB:
1777                                 qla2x00_abort_srb(qp, sp, res, &flags);
1778                                 break;
1779                         case TYPE_TGT_CMD:
1780                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1781                                     qla_ini_mode_enabled(vha)) {
1782                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1783                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1784                                             vha->dpc_flags);
1785                                         continue;
1786                                 }
1787                                 cmd = (struct qla_tgt_cmd *)sp;
1788                                 cmd->aborted = 1;
1789                                 break;
1790                         case TYPE_TGT_TMCMD:
1791                                 /* Skip task management functions. */
1792                                 break;
1793                         default:
1794                                 break;
1795                         }
1796                         req->outstanding_cmds[cnt] = NULL;
1797                 }
1798         }
1799         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1800 }
1801
1802 /*
1803  * The caller must ensure that no completion interrupts will happen
1804  * while this function is in progress.
1805  */
1806 void
1807 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1808 {
1809         int que;
1810         struct qla_hw_data *ha = vha->hw;
1811
1812         /* Continue only if initialization complete. */
1813         if (!ha->base_qpair)
1814                 return;
1815         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1816
1817         if (!ha->queue_pair_map)
1818                 return;
1819         for (que = 0; que < ha->max_qpairs; que++) {
1820                 if (!ha->queue_pair_map[que])
1821                         continue;
1822
1823                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1824         }
1825 }
1826
1827 static int
1828 qla2xxx_slave_alloc(struct scsi_device *sdev)
1829 {
1830         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1831
1832         if (!rport || fc_remote_port_chkready(rport))
1833                 return -ENXIO;
1834
1835         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1836
1837         return 0;
1838 }
1839
1840 static int
1841 qla2xxx_slave_configure(struct scsi_device *sdev)
1842 {
1843         scsi_qla_host_t *vha = shost_priv(sdev->host);
1844         struct req_que *req = vha->req;
1845
1846         if (IS_T10_PI_CAPABLE(vha->hw))
1847                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1848
1849         scsi_change_queue_depth(sdev, req->max_q_depth);
1850         return 0;
1851 }
1852
1853 static void
1854 qla2xxx_slave_destroy(struct scsi_device *sdev)
1855 {
1856         sdev->hostdata = NULL;
1857 }
1858
1859 /**
1860  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1861  * @ha: HA context
1862  *
1863  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1864  * supported addressing method.
1865  */
1866 static void
1867 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1868 {
1869         /* Assume a 32bit DMA mask. */
1870         ha->flags.enable_64bit_addressing = 0;
1871
1872         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1873                 /* Any upper-dword bits set? */
1874                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1875                     !dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1876                         /* Ok, a 64bit DMA mask is applicable. */
1877                         ha->flags.enable_64bit_addressing = 1;
1878                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1879                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1880                         return;
1881                 }
1882         }
1883
1884         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1885         dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1886 }
1887
1888 static void
1889 qla2x00_enable_intrs(struct qla_hw_data *ha)
1890 {
1891         unsigned long flags = 0;
1892         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1893
1894         spin_lock_irqsave(&ha->hardware_lock, flags);
1895         ha->interrupts_on = 1;
1896         /* enable risc and host interrupts */
1897         wrt_reg_word(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1898         rd_reg_word(&reg->ictrl);
1899         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1900
1901 }
1902
1903 static void
1904 qla2x00_disable_intrs(struct qla_hw_data *ha)
1905 {
1906         unsigned long flags = 0;
1907         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1908
1909         spin_lock_irqsave(&ha->hardware_lock, flags);
1910         ha->interrupts_on = 0;
1911         /* disable risc and host interrupts */
1912         wrt_reg_word(&reg->ictrl, 0);
1913         rd_reg_word(&reg->ictrl);
1914         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1915 }
1916
1917 static void
1918 qla24xx_enable_intrs(struct qla_hw_data *ha)
1919 {
1920         unsigned long flags = 0;
1921         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1922
1923         spin_lock_irqsave(&ha->hardware_lock, flags);
1924         ha->interrupts_on = 1;
1925         wrt_reg_dword(&reg->ictrl, ICRX_EN_RISC_INT);
1926         rd_reg_dword(&reg->ictrl);
1927         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1928 }
1929
1930 static void
1931 qla24xx_disable_intrs(struct qla_hw_data *ha)
1932 {
1933         unsigned long flags = 0;
1934         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1935
1936         if (IS_NOPOLLING_TYPE(ha))
1937                 return;
1938         spin_lock_irqsave(&ha->hardware_lock, flags);
1939         ha->interrupts_on = 0;
1940         wrt_reg_dword(&reg->ictrl, 0);
1941         rd_reg_dword(&reg->ictrl);
1942         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1943 }
1944
1945 static int
1946 qla2x00_iospace_config(struct qla_hw_data *ha)
1947 {
1948         resource_size_t pio;
1949         uint16_t msix;
1950
1951         if (pci_request_selected_regions(ha->pdev, ha->bars,
1952             QLA2XXX_DRIVER_NAME)) {
1953                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1954                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1955                     pci_name(ha->pdev));
1956                 goto iospace_error_exit;
1957         }
1958         if (!(ha->bars & 1))
1959                 goto skip_pio;
1960
1961         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1962         pio = pci_resource_start(ha->pdev, 0);
1963         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1964                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1965                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1966                             "Invalid pci I/O region size (%s).\n",
1967                             pci_name(ha->pdev));
1968                         pio = 0;
1969                 }
1970         } else {
1971                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1972                     "Region #0 no a PIO resource (%s).\n",
1973                     pci_name(ha->pdev));
1974                 pio = 0;
1975         }
1976         ha->pio_address = pio;
1977         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1978             "PIO address=%llu.\n",
1979             (unsigned long long)ha->pio_address);
1980
1981 skip_pio:
1982         /* Use MMIO operations for all accesses. */
1983         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1984                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1985                     "Region #1 not an MMIO resource (%s), aborting.\n",
1986                     pci_name(ha->pdev));
1987                 goto iospace_error_exit;
1988         }
1989         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1990                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1991                     "Invalid PCI mem region size (%s), aborting.\n",
1992                     pci_name(ha->pdev));
1993                 goto iospace_error_exit;
1994         }
1995
1996         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1997         if (!ha->iobase) {
1998                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1999                     "Cannot remap MMIO (%s), aborting.\n",
2000                     pci_name(ha->pdev));
2001                 goto iospace_error_exit;
2002         }
2003
2004         /* Determine queue resources */
2005         ha->max_req_queues = ha->max_rsp_queues = 1;
2006         ha->msix_count = QLA_BASE_VECTORS;
2007
2008         /* Check if FW supports MQ or not */
2009         if (!(ha->fw_attributes & BIT_6))
2010                 goto mqiobase_exit;
2011
2012         if (!ql2xmqsupport || !ql2xnvmeenable ||
2013             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2014                 goto mqiobase_exit;
2015
2016         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2017                         pci_resource_len(ha->pdev, 3));
2018         if (ha->mqiobase) {
2019                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2020                     "MQIO Base=%p.\n", ha->mqiobase);
2021                 /* Read MSIX vector size of the board */
2022                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2023                 ha->msix_count = msix + 1;
2024                 /* Max queues are bounded by available msix vectors */
2025                 /* MB interrupt uses 1 vector */
2026                 ha->max_req_queues = ha->msix_count - 1;
2027                 ha->max_rsp_queues = ha->max_req_queues;
2028                 /* Queue pairs is the max value minus the base queue pair */
2029                 ha->max_qpairs = ha->max_rsp_queues - 1;
2030                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2031                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2032
2033                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2034                     "MSI-X vector count: %d.\n", ha->msix_count);
2035         } else
2036                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2037                     "BAR 3 not enabled.\n");
2038
2039 mqiobase_exit:
2040         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2041             "MSIX Count: %d.\n", ha->msix_count);
2042         return (0);
2043
2044 iospace_error_exit:
2045         return (-ENOMEM);
2046 }
2047
2048
2049 static int
2050 qla83xx_iospace_config(struct qla_hw_data *ha)
2051 {
2052         uint16_t msix;
2053
2054         if (pci_request_selected_regions(ha->pdev, ha->bars,
2055             QLA2XXX_DRIVER_NAME)) {
2056                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2057                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2058                     pci_name(ha->pdev));
2059
2060                 goto iospace_error_exit;
2061         }
2062
2063         /* Use MMIO operations for all accesses. */
2064         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2065                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2066                     "Invalid pci I/O region size (%s).\n",
2067                     pci_name(ha->pdev));
2068                 goto iospace_error_exit;
2069         }
2070         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2071                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2072                     "Invalid PCI mem region size (%s), aborting\n",
2073                         pci_name(ha->pdev));
2074                 goto iospace_error_exit;
2075         }
2076
2077         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2078         if (!ha->iobase) {
2079                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2080                     "Cannot remap MMIO (%s), aborting.\n",
2081                     pci_name(ha->pdev));
2082                 goto iospace_error_exit;
2083         }
2084
2085         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2086         /* 83XX 26XX always use MQ type access for queues
2087          * - mbar 2, a.k.a region 4 */
2088         ha->max_req_queues = ha->max_rsp_queues = 1;
2089         ha->msix_count = QLA_BASE_VECTORS;
2090         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2091                         pci_resource_len(ha->pdev, 4));
2092
2093         if (!ha->mqiobase) {
2094                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2095                     "BAR2/region4 not enabled\n");
2096                 goto mqiobase_exit;
2097         }
2098
2099         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2100                         pci_resource_len(ha->pdev, 2));
2101         if (ha->msixbase) {
2102                 /* Read MSIX vector size of the board */
2103                 pci_read_config_word(ha->pdev,
2104                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2105                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2106                 /*
2107                  * By default, driver uses at least two msix vectors
2108                  * (default & rspq)
2109                  */
2110                 if (ql2xmqsupport || ql2xnvmeenable) {
2111                         /* MB interrupt uses 1 vector */
2112                         ha->max_req_queues = ha->msix_count - 1;
2113
2114                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2115                         if (QLA_TGT_MODE_ENABLED())
2116                                 ha->max_req_queues--;
2117
2118                         ha->max_rsp_queues = ha->max_req_queues;
2119
2120                         /* Queue pairs is the max value minus
2121                          * the base queue pair */
2122                         ha->max_qpairs = ha->max_req_queues - 1;
2123                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2124                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2125                 }
2126                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2127                     "MSI-X vector count: %d.\n", ha->msix_count);
2128         } else
2129                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2130                     "BAR 1 not enabled.\n");
2131
2132 mqiobase_exit:
2133         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2134             "MSIX Count: %d.\n", ha->msix_count);
2135         return 0;
2136
2137 iospace_error_exit:
2138         return -ENOMEM;
2139 }
2140
2141 static struct isp_operations qla2100_isp_ops = {
2142         .pci_config             = qla2100_pci_config,
2143         .reset_chip             = qla2x00_reset_chip,
2144         .chip_diag              = qla2x00_chip_diag,
2145         .config_rings           = qla2x00_config_rings,
2146         .reset_adapter          = qla2x00_reset_adapter,
2147         .nvram_config           = qla2x00_nvram_config,
2148         .update_fw_options      = qla2x00_update_fw_options,
2149         .load_risc              = qla2x00_load_risc,
2150         .pci_info_str           = qla2x00_pci_info_str,
2151         .fw_version_str         = qla2x00_fw_version_str,
2152         .intr_handler           = qla2100_intr_handler,
2153         .enable_intrs           = qla2x00_enable_intrs,
2154         .disable_intrs          = qla2x00_disable_intrs,
2155         .abort_command          = qla2x00_abort_command,
2156         .target_reset           = qla2x00_abort_target,
2157         .lun_reset              = qla2x00_lun_reset,
2158         .fabric_login           = qla2x00_login_fabric,
2159         .fabric_logout          = qla2x00_fabric_logout,
2160         .calc_req_entries       = qla2x00_calc_iocbs_32,
2161         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2162         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2163         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2164         .read_nvram             = qla2x00_read_nvram_data,
2165         .write_nvram            = qla2x00_write_nvram_data,
2166         .fw_dump                = qla2100_fw_dump,
2167         .beacon_on              = NULL,
2168         .beacon_off             = NULL,
2169         .beacon_blink           = NULL,
2170         .read_optrom            = qla2x00_read_optrom_data,
2171         .write_optrom           = qla2x00_write_optrom_data,
2172         .get_flash_version      = qla2x00_get_flash_version,
2173         .start_scsi             = qla2x00_start_scsi,
2174         .start_scsi_mq          = NULL,
2175         .abort_isp              = qla2x00_abort_isp,
2176         .iospace_config         = qla2x00_iospace_config,
2177         .initialize_adapter     = qla2x00_initialize_adapter,
2178 };
2179
2180 static struct isp_operations qla2300_isp_ops = {
2181         .pci_config             = qla2300_pci_config,
2182         .reset_chip             = qla2x00_reset_chip,
2183         .chip_diag              = qla2x00_chip_diag,
2184         .config_rings           = qla2x00_config_rings,
2185         .reset_adapter          = qla2x00_reset_adapter,
2186         .nvram_config           = qla2x00_nvram_config,
2187         .update_fw_options      = qla2x00_update_fw_options,
2188         .load_risc              = qla2x00_load_risc,
2189         .pci_info_str           = qla2x00_pci_info_str,
2190         .fw_version_str         = qla2x00_fw_version_str,
2191         .intr_handler           = qla2300_intr_handler,
2192         .enable_intrs           = qla2x00_enable_intrs,
2193         .disable_intrs          = qla2x00_disable_intrs,
2194         .abort_command          = qla2x00_abort_command,
2195         .target_reset           = qla2x00_abort_target,
2196         .lun_reset              = qla2x00_lun_reset,
2197         .fabric_login           = qla2x00_login_fabric,
2198         .fabric_logout          = qla2x00_fabric_logout,
2199         .calc_req_entries       = qla2x00_calc_iocbs_32,
2200         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2201         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2202         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2203         .read_nvram             = qla2x00_read_nvram_data,
2204         .write_nvram            = qla2x00_write_nvram_data,
2205         .fw_dump                = qla2300_fw_dump,
2206         .beacon_on              = qla2x00_beacon_on,
2207         .beacon_off             = qla2x00_beacon_off,
2208         .beacon_blink           = qla2x00_beacon_blink,
2209         .read_optrom            = qla2x00_read_optrom_data,
2210         .write_optrom           = qla2x00_write_optrom_data,
2211         .get_flash_version      = qla2x00_get_flash_version,
2212         .start_scsi             = qla2x00_start_scsi,
2213         .start_scsi_mq          = NULL,
2214         .abort_isp              = qla2x00_abort_isp,
2215         .iospace_config         = qla2x00_iospace_config,
2216         .initialize_adapter     = qla2x00_initialize_adapter,
2217 };
2218
2219 static struct isp_operations qla24xx_isp_ops = {
2220         .pci_config             = qla24xx_pci_config,
2221         .reset_chip             = qla24xx_reset_chip,
2222         .chip_diag              = qla24xx_chip_diag,
2223         .config_rings           = qla24xx_config_rings,
2224         .reset_adapter          = qla24xx_reset_adapter,
2225         .nvram_config           = qla24xx_nvram_config,
2226         .update_fw_options      = qla24xx_update_fw_options,
2227         .load_risc              = qla24xx_load_risc,
2228         .pci_info_str           = qla24xx_pci_info_str,
2229         .fw_version_str         = qla24xx_fw_version_str,
2230         .intr_handler           = qla24xx_intr_handler,
2231         .enable_intrs           = qla24xx_enable_intrs,
2232         .disable_intrs          = qla24xx_disable_intrs,
2233         .abort_command          = qla24xx_abort_command,
2234         .target_reset           = qla24xx_abort_target,
2235         .lun_reset              = qla24xx_lun_reset,
2236         .fabric_login           = qla24xx_login_fabric,
2237         .fabric_logout          = qla24xx_fabric_logout,
2238         .calc_req_entries       = NULL,
2239         .build_iocbs            = NULL,
2240         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2241         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2242         .read_nvram             = qla24xx_read_nvram_data,
2243         .write_nvram            = qla24xx_write_nvram_data,
2244         .fw_dump                = qla24xx_fw_dump,
2245         .beacon_on              = qla24xx_beacon_on,
2246         .beacon_off             = qla24xx_beacon_off,
2247         .beacon_blink           = qla24xx_beacon_blink,
2248         .read_optrom            = qla24xx_read_optrom_data,
2249         .write_optrom           = qla24xx_write_optrom_data,
2250         .get_flash_version      = qla24xx_get_flash_version,
2251         .start_scsi             = qla24xx_start_scsi,
2252         .start_scsi_mq          = NULL,
2253         .abort_isp              = qla2x00_abort_isp,
2254         .iospace_config         = qla2x00_iospace_config,
2255         .initialize_adapter     = qla2x00_initialize_adapter,
2256 };
2257
2258 static struct isp_operations qla25xx_isp_ops = {
2259         .pci_config             = qla25xx_pci_config,
2260         .reset_chip             = qla24xx_reset_chip,
2261         .chip_diag              = qla24xx_chip_diag,
2262         .config_rings           = qla24xx_config_rings,
2263         .reset_adapter          = qla24xx_reset_adapter,
2264         .nvram_config           = qla24xx_nvram_config,
2265         .update_fw_options      = qla24xx_update_fw_options,
2266         .load_risc              = qla24xx_load_risc,
2267         .pci_info_str           = qla24xx_pci_info_str,
2268         .fw_version_str         = qla24xx_fw_version_str,
2269         .intr_handler           = qla24xx_intr_handler,
2270         .enable_intrs           = qla24xx_enable_intrs,
2271         .disable_intrs          = qla24xx_disable_intrs,
2272         .abort_command          = qla24xx_abort_command,
2273         .target_reset           = qla24xx_abort_target,
2274         .lun_reset              = qla24xx_lun_reset,
2275         .fabric_login           = qla24xx_login_fabric,
2276         .fabric_logout          = qla24xx_fabric_logout,
2277         .calc_req_entries       = NULL,
2278         .build_iocbs            = NULL,
2279         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2280         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2281         .read_nvram             = qla25xx_read_nvram_data,
2282         .write_nvram            = qla25xx_write_nvram_data,
2283         .fw_dump                = qla25xx_fw_dump,
2284         .beacon_on              = qla24xx_beacon_on,
2285         .beacon_off             = qla24xx_beacon_off,
2286         .beacon_blink           = qla24xx_beacon_blink,
2287         .read_optrom            = qla25xx_read_optrom_data,
2288         .write_optrom           = qla24xx_write_optrom_data,
2289         .get_flash_version      = qla24xx_get_flash_version,
2290         .start_scsi             = qla24xx_dif_start_scsi,
2291         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2292         .abort_isp              = qla2x00_abort_isp,
2293         .iospace_config         = qla2x00_iospace_config,
2294         .initialize_adapter     = qla2x00_initialize_adapter,
2295 };
2296
2297 static struct isp_operations qla81xx_isp_ops = {
2298         .pci_config             = qla25xx_pci_config,
2299         .reset_chip             = qla24xx_reset_chip,
2300         .chip_diag              = qla24xx_chip_diag,
2301         .config_rings           = qla24xx_config_rings,
2302         .reset_adapter          = qla24xx_reset_adapter,
2303         .nvram_config           = qla81xx_nvram_config,
2304         .update_fw_options      = qla24xx_update_fw_options,
2305         .load_risc              = qla81xx_load_risc,
2306         .pci_info_str           = qla24xx_pci_info_str,
2307         .fw_version_str         = qla24xx_fw_version_str,
2308         .intr_handler           = qla24xx_intr_handler,
2309         .enable_intrs           = qla24xx_enable_intrs,
2310         .disable_intrs          = qla24xx_disable_intrs,
2311         .abort_command          = qla24xx_abort_command,
2312         .target_reset           = qla24xx_abort_target,
2313         .lun_reset              = qla24xx_lun_reset,
2314         .fabric_login           = qla24xx_login_fabric,
2315         .fabric_logout          = qla24xx_fabric_logout,
2316         .calc_req_entries       = NULL,
2317         .build_iocbs            = NULL,
2318         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2319         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2320         .read_nvram             = NULL,
2321         .write_nvram            = NULL,
2322         .fw_dump                = qla81xx_fw_dump,
2323         .beacon_on              = qla24xx_beacon_on,
2324         .beacon_off             = qla24xx_beacon_off,
2325         .beacon_blink           = qla83xx_beacon_blink,
2326         .read_optrom            = qla25xx_read_optrom_data,
2327         .write_optrom           = qla24xx_write_optrom_data,
2328         .get_flash_version      = qla24xx_get_flash_version,
2329         .start_scsi             = qla24xx_dif_start_scsi,
2330         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2331         .abort_isp              = qla2x00_abort_isp,
2332         .iospace_config         = qla2x00_iospace_config,
2333         .initialize_adapter     = qla2x00_initialize_adapter,
2334 };
2335
2336 static struct isp_operations qla82xx_isp_ops = {
2337         .pci_config             = qla82xx_pci_config,
2338         .reset_chip             = qla82xx_reset_chip,
2339         .chip_diag              = qla24xx_chip_diag,
2340         .config_rings           = qla82xx_config_rings,
2341         .reset_adapter          = qla24xx_reset_adapter,
2342         .nvram_config           = qla81xx_nvram_config,
2343         .update_fw_options      = qla24xx_update_fw_options,
2344         .load_risc              = qla82xx_load_risc,
2345         .pci_info_str           = qla24xx_pci_info_str,
2346         .fw_version_str         = qla24xx_fw_version_str,
2347         .intr_handler           = qla82xx_intr_handler,
2348         .enable_intrs           = qla82xx_enable_intrs,
2349         .disable_intrs          = qla82xx_disable_intrs,
2350         .abort_command          = qla24xx_abort_command,
2351         .target_reset           = qla24xx_abort_target,
2352         .lun_reset              = qla24xx_lun_reset,
2353         .fabric_login           = qla24xx_login_fabric,
2354         .fabric_logout          = qla24xx_fabric_logout,
2355         .calc_req_entries       = NULL,
2356         .build_iocbs            = NULL,
2357         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2358         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2359         .read_nvram             = qla24xx_read_nvram_data,
2360         .write_nvram            = qla24xx_write_nvram_data,
2361         .fw_dump                = qla82xx_fw_dump,
2362         .beacon_on              = qla82xx_beacon_on,
2363         .beacon_off             = qla82xx_beacon_off,
2364         .beacon_blink           = NULL,
2365         .read_optrom            = qla82xx_read_optrom_data,
2366         .write_optrom           = qla82xx_write_optrom_data,
2367         .get_flash_version      = qla82xx_get_flash_version,
2368         .start_scsi             = qla82xx_start_scsi,
2369         .start_scsi_mq          = NULL,
2370         .abort_isp              = qla82xx_abort_isp,
2371         .iospace_config         = qla82xx_iospace_config,
2372         .initialize_adapter     = qla2x00_initialize_adapter,
2373 };
2374
2375 static struct isp_operations qla8044_isp_ops = {
2376         .pci_config             = qla82xx_pci_config,
2377         .reset_chip             = qla82xx_reset_chip,
2378         .chip_diag              = qla24xx_chip_diag,
2379         .config_rings           = qla82xx_config_rings,
2380         .reset_adapter          = qla24xx_reset_adapter,
2381         .nvram_config           = qla81xx_nvram_config,
2382         .update_fw_options      = qla24xx_update_fw_options,
2383         .load_risc              = qla82xx_load_risc,
2384         .pci_info_str           = qla24xx_pci_info_str,
2385         .fw_version_str         = qla24xx_fw_version_str,
2386         .intr_handler           = qla8044_intr_handler,
2387         .enable_intrs           = qla82xx_enable_intrs,
2388         .disable_intrs          = qla82xx_disable_intrs,
2389         .abort_command          = qla24xx_abort_command,
2390         .target_reset           = qla24xx_abort_target,
2391         .lun_reset              = qla24xx_lun_reset,
2392         .fabric_login           = qla24xx_login_fabric,
2393         .fabric_logout          = qla24xx_fabric_logout,
2394         .calc_req_entries       = NULL,
2395         .build_iocbs            = NULL,
2396         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2397         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2398         .read_nvram             = NULL,
2399         .write_nvram            = NULL,
2400         .fw_dump                = qla8044_fw_dump,
2401         .beacon_on              = qla82xx_beacon_on,
2402         .beacon_off             = qla82xx_beacon_off,
2403         .beacon_blink           = NULL,
2404         .read_optrom            = qla8044_read_optrom_data,
2405         .write_optrom           = qla8044_write_optrom_data,
2406         .get_flash_version      = qla82xx_get_flash_version,
2407         .start_scsi             = qla82xx_start_scsi,
2408         .start_scsi_mq          = NULL,
2409         .abort_isp              = qla8044_abort_isp,
2410         .iospace_config         = qla82xx_iospace_config,
2411         .initialize_adapter     = qla2x00_initialize_adapter,
2412 };
2413
2414 static struct isp_operations qla83xx_isp_ops = {
2415         .pci_config             = qla25xx_pci_config,
2416         .reset_chip             = qla24xx_reset_chip,
2417         .chip_diag              = qla24xx_chip_diag,
2418         .config_rings           = qla24xx_config_rings,
2419         .reset_adapter          = qla24xx_reset_adapter,
2420         .nvram_config           = qla81xx_nvram_config,
2421         .update_fw_options      = qla24xx_update_fw_options,
2422         .load_risc              = qla81xx_load_risc,
2423         .pci_info_str           = qla24xx_pci_info_str,
2424         .fw_version_str         = qla24xx_fw_version_str,
2425         .intr_handler           = qla24xx_intr_handler,
2426         .enable_intrs           = qla24xx_enable_intrs,
2427         .disable_intrs          = qla24xx_disable_intrs,
2428         .abort_command          = qla24xx_abort_command,
2429         .target_reset           = qla24xx_abort_target,
2430         .lun_reset              = qla24xx_lun_reset,
2431         .fabric_login           = qla24xx_login_fabric,
2432         .fabric_logout          = qla24xx_fabric_logout,
2433         .calc_req_entries       = NULL,
2434         .build_iocbs            = NULL,
2435         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2436         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2437         .read_nvram             = NULL,
2438         .write_nvram            = NULL,
2439         .fw_dump                = qla83xx_fw_dump,
2440         .beacon_on              = qla24xx_beacon_on,
2441         .beacon_off             = qla24xx_beacon_off,
2442         .beacon_blink           = qla83xx_beacon_blink,
2443         .read_optrom            = qla25xx_read_optrom_data,
2444         .write_optrom           = qla24xx_write_optrom_data,
2445         .get_flash_version      = qla24xx_get_flash_version,
2446         .start_scsi             = qla24xx_dif_start_scsi,
2447         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2448         .abort_isp              = qla2x00_abort_isp,
2449         .iospace_config         = qla83xx_iospace_config,
2450         .initialize_adapter     = qla2x00_initialize_adapter,
2451 };
2452
2453 static struct isp_operations qlafx00_isp_ops = {
2454         .pci_config             = qlafx00_pci_config,
2455         .reset_chip             = qlafx00_soft_reset,
2456         .chip_diag              = qlafx00_chip_diag,
2457         .config_rings           = qlafx00_config_rings,
2458         .reset_adapter          = qlafx00_soft_reset,
2459         .nvram_config           = NULL,
2460         .update_fw_options      = NULL,
2461         .load_risc              = NULL,
2462         .pci_info_str           = qlafx00_pci_info_str,
2463         .fw_version_str         = qlafx00_fw_version_str,
2464         .intr_handler           = qlafx00_intr_handler,
2465         .enable_intrs           = qlafx00_enable_intrs,
2466         .disable_intrs          = qlafx00_disable_intrs,
2467         .abort_command          = qla24xx_async_abort_command,
2468         .target_reset           = qlafx00_abort_target,
2469         .lun_reset              = qlafx00_lun_reset,
2470         .fabric_login           = NULL,
2471         .fabric_logout          = NULL,
2472         .calc_req_entries       = NULL,
2473         .build_iocbs            = NULL,
2474         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2475         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2476         .read_nvram             = qla24xx_read_nvram_data,
2477         .write_nvram            = qla24xx_write_nvram_data,
2478         .fw_dump                = NULL,
2479         .beacon_on              = qla24xx_beacon_on,
2480         .beacon_off             = qla24xx_beacon_off,
2481         .beacon_blink           = NULL,
2482         .read_optrom            = qla24xx_read_optrom_data,
2483         .write_optrom           = qla24xx_write_optrom_data,
2484         .get_flash_version      = qla24xx_get_flash_version,
2485         .start_scsi             = qlafx00_start_scsi,
2486         .start_scsi_mq          = NULL,
2487         .abort_isp              = qlafx00_abort_isp,
2488         .iospace_config         = qlafx00_iospace_config,
2489         .initialize_adapter     = qlafx00_initialize_adapter,
2490 };
2491
2492 static struct isp_operations qla27xx_isp_ops = {
2493         .pci_config             = qla25xx_pci_config,
2494         .reset_chip             = qla24xx_reset_chip,
2495         .chip_diag              = qla24xx_chip_diag,
2496         .config_rings           = qla24xx_config_rings,
2497         .reset_adapter          = qla24xx_reset_adapter,
2498         .nvram_config           = qla81xx_nvram_config,
2499         .update_fw_options      = qla24xx_update_fw_options,
2500         .load_risc              = qla81xx_load_risc,
2501         .pci_info_str           = qla24xx_pci_info_str,
2502         .fw_version_str         = qla24xx_fw_version_str,
2503         .intr_handler           = qla24xx_intr_handler,
2504         .enable_intrs           = qla24xx_enable_intrs,
2505         .disable_intrs          = qla24xx_disable_intrs,
2506         .abort_command          = qla24xx_abort_command,
2507         .target_reset           = qla24xx_abort_target,
2508         .lun_reset              = qla24xx_lun_reset,
2509         .fabric_login           = qla24xx_login_fabric,
2510         .fabric_logout          = qla24xx_fabric_logout,
2511         .calc_req_entries       = NULL,
2512         .build_iocbs            = NULL,
2513         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2514         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2515         .read_nvram             = NULL,
2516         .write_nvram            = NULL,
2517         .fw_dump                = qla27xx_fwdump,
2518         .mpi_fw_dump            = qla27xx_mpi_fwdump,
2519         .beacon_on              = qla24xx_beacon_on,
2520         .beacon_off             = qla24xx_beacon_off,
2521         .beacon_blink           = qla83xx_beacon_blink,
2522         .read_optrom            = qla25xx_read_optrom_data,
2523         .write_optrom           = qla24xx_write_optrom_data,
2524         .get_flash_version      = qla24xx_get_flash_version,
2525         .start_scsi             = qla24xx_dif_start_scsi,
2526         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2527         .abort_isp              = qla2x00_abort_isp,
2528         .iospace_config         = qla83xx_iospace_config,
2529         .initialize_adapter     = qla2x00_initialize_adapter,
2530 };
2531
2532 static inline void
2533 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2534 {
2535         ha->device_type = DT_EXTENDED_IDS;
2536         switch (ha->pdev->device) {
2537         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2538                 ha->isp_type |= DT_ISP2100;
2539                 ha->device_type &= ~DT_EXTENDED_IDS;
2540                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2541                 break;
2542         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2543                 ha->isp_type |= DT_ISP2200;
2544                 ha->device_type &= ~DT_EXTENDED_IDS;
2545                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2546                 break;
2547         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2548                 ha->isp_type |= DT_ISP2300;
2549                 ha->device_type |= DT_ZIO_SUPPORTED;
2550                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2551                 break;
2552         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2553                 ha->isp_type |= DT_ISP2312;
2554                 ha->device_type |= DT_ZIO_SUPPORTED;
2555                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2556                 break;
2557         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2558                 ha->isp_type |= DT_ISP2322;
2559                 ha->device_type |= DT_ZIO_SUPPORTED;
2560                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2561                     ha->pdev->subsystem_device == 0x0170)
2562                         ha->device_type |= DT_OEM_001;
2563                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2564                 break;
2565         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2566                 ha->isp_type |= DT_ISP6312;
2567                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2568                 break;
2569         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2570                 ha->isp_type |= DT_ISP6322;
2571                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2572                 break;
2573         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2574                 ha->isp_type |= DT_ISP2422;
2575                 ha->device_type |= DT_ZIO_SUPPORTED;
2576                 ha->device_type |= DT_FWI2;
2577                 ha->device_type |= DT_IIDMA;
2578                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2579                 break;
2580         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2581                 ha->isp_type |= DT_ISP2432;
2582                 ha->device_type |= DT_ZIO_SUPPORTED;
2583                 ha->device_type |= DT_FWI2;
2584                 ha->device_type |= DT_IIDMA;
2585                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2586                 break;
2587         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2588                 ha->isp_type |= DT_ISP8432;
2589                 ha->device_type |= DT_ZIO_SUPPORTED;
2590                 ha->device_type |= DT_FWI2;
2591                 ha->device_type |= DT_IIDMA;
2592                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2593                 break;
2594         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2595                 ha->isp_type |= DT_ISP5422;
2596                 ha->device_type |= DT_FWI2;
2597                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2598                 break;
2599         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2600                 ha->isp_type |= DT_ISP5432;
2601                 ha->device_type |= DT_FWI2;
2602                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2603                 break;
2604         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2605                 ha->isp_type |= DT_ISP2532;
2606                 ha->device_type |= DT_ZIO_SUPPORTED;
2607                 ha->device_type |= DT_FWI2;
2608                 ha->device_type |= DT_IIDMA;
2609                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2610                 break;
2611         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2612                 ha->isp_type |= DT_ISP8001;
2613                 ha->device_type |= DT_ZIO_SUPPORTED;
2614                 ha->device_type |= DT_FWI2;
2615                 ha->device_type |= DT_IIDMA;
2616                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2617                 break;
2618         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2619                 ha->isp_type |= DT_ISP8021;
2620                 ha->device_type |= DT_ZIO_SUPPORTED;
2621                 ha->device_type |= DT_FWI2;
2622                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2623                 /* Initialize 82XX ISP flags */
2624                 qla82xx_init_flags(ha);
2625                 break;
2626          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2627                 ha->isp_type |= DT_ISP8044;
2628                 ha->device_type |= DT_ZIO_SUPPORTED;
2629                 ha->device_type |= DT_FWI2;
2630                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2631                 /* Initialize 82XX ISP flags */
2632                 qla82xx_init_flags(ha);
2633                 break;
2634         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2635                 ha->isp_type |= DT_ISP2031;
2636                 ha->device_type |= DT_ZIO_SUPPORTED;
2637                 ha->device_type |= DT_FWI2;
2638                 ha->device_type |= DT_IIDMA;
2639                 ha->device_type |= DT_T10_PI;
2640                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2641                 break;
2642         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2643                 ha->isp_type |= DT_ISP8031;
2644                 ha->device_type |= DT_ZIO_SUPPORTED;
2645                 ha->device_type |= DT_FWI2;
2646                 ha->device_type |= DT_IIDMA;
2647                 ha->device_type |= DT_T10_PI;
2648                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2649                 break;
2650         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2651                 ha->isp_type |= DT_ISPFX00;
2652                 break;
2653         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2654                 ha->isp_type |= DT_ISP2071;
2655                 ha->device_type |= DT_ZIO_SUPPORTED;
2656                 ha->device_type |= DT_FWI2;
2657                 ha->device_type |= DT_IIDMA;
2658                 ha->device_type |= DT_T10_PI;
2659                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2660                 break;
2661         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2662                 ha->isp_type |= DT_ISP2271;
2663                 ha->device_type |= DT_ZIO_SUPPORTED;
2664                 ha->device_type |= DT_FWI2;
2665                 ha->device_type |= DT_IIDMA;
2666                 ha->device_type |= DT_T10_PI;
2667                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2668                 break;
2669         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2670                 ha->isp_type |= DT_ISP2261;
2671                 ha->device_type |= DT_ZIO_SUPPORTED;
2672                 ha->device_type |= DT_FWI2;
2673                 ha->device_type |= DT_IIDMA;
2674                 ha->device_type |= DT_T10_PI;
2675                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2676                 break;
2677         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2678         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2679                 ha->isp_type |= DT_ISP2081;
2680                 ha->device_type |= DT_ZIO_SUPPORTED;
2681                 ha->device_type |= DT_FWI2;
2682                 ha->device_type |= DT_IIDMA;
2683                 ha->device_type |= DT_T10_PI;
2684                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2685                 break;
2686         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2687         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2688                 ha->isp_type |= DT_ISP2281;
2689                 ha->device_type |= DT_ZIO_SUPPORTED;
2690                 ha->device_type |= DT_FWI2;
2691                 ha->device_type |= DT_IIDMA;
2692                 ha->device_type |= DT_T10_PI;
2693                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2694                 break;
2695         }
2696
2697         if (IS_QLA82XX(ha))
2698                 ha->port_no = ha->portnum & 1;
2699         else {
2700                 /* Get adapter physical port no from interrupt pin register. */
2701                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2702                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2703                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2704                         ha->port_no--;
2705                 else
2706                         ha->port_no = !(ha->port_no & 1);
2707         }
2708
2709         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2710             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2711             ha->device_type, ha->port_no, ha->fw_srisc_address);
2712 }
2713
2714 static void
2715 qla2xxx_scan_start(struct Scsi_Host *shost)
2716 {
2717         scsi_qla_host_t *vha = shost_priv(shost);
2718
2719         if (vha->hw->flags.running_gold_fw)
2720                 return;
2721
2722         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2723         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2724         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2725         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2726 }
2727
2728 static int
2729 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2730 {
2731         scsi_qla_host_t *vha = shost_priv(shost);
2732
2733         if (test_bit(UNLOADING, &vha->dpc_flags))
2734                 return 1;
2735         if (!vha->host)
2736                 return 1;
2737         if (time > vha->hw->loop_reset_delay * HZ)
2738                 return 1;
2739
2740         return atomic_read(&vha->loop_state) == LOOP_READY;
2741 }
2742
2743 static void qla2x00_iocb_work_fn(struct work_struct *work)
2744 {
2745         struct scsi_qla_host *vha = container_of(work,
2746                 struct scsi_qla_host, iocb_work);
2747         struct qla_hw_data *ha = vha->hw;
2748         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2749         int i = 2;
2750         unsigned long flags;
2751
2752         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2753                 return;
2754
2755         while (!list_empty(&vha->work_list) && i > 0) {
2756                 qla2x00_do_work(vha);
2757                 i--;
2758         }
2759
2760         spin_lock_irqsave(&vha->work_lock, flags);
2761         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2762         spin_unlock_irqrestore(&vha->work_lock, flags);
2763 }
2764
2765 /*
2766  * PCI driver interface
2767  */
2768 static int
2769 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2770 {
2771         int     ret = -ENODEV;
2772         struct Scsi_Host *host;
2773         scsi_qla_host_t *base_vha = NULL;
2774         struct qla_hw_data *ha;
2775         char pci_info[30];
2776         char fw_str[30], wq_name[30];
2777         struct scsi_host_template *sht;
2778         int bars, mem_only = 0;
2779         uint16_t req_length = 0, rsp_length = 0;
2780         struct req_que *req = NULL;
2781         struct rsp_que *rsp = NULL;
2782         int i;
2783
2784         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2785         sht = &qla2xxx_driver_template;
2786         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2787             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2788             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2789             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2790             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2791             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2792             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2793             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2794             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2795             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2796             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2797             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2798             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2799             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2800             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2801             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2802             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2803             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2804             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2805                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2806                 mem_only = 1;
2807                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2808                     "Mem only adapter.\n");
2809         }
2810         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2811             "Bars=%d.\n", bars);
2812
2813         if (mem_only) {
2814                 if (pci_enable_device_mem(pdev))
2815                         return ret;
2816         } else {
2817                 if (pci_enable_device(pdev))
2818                         return ret;
2819         }
2820
2821         /* This may fail but that's ok */
2822         pci_enable_pcie_error_reporting(pdev);
2823
2824         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2825         if (!ha) {
2826                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2827                     "Unable to allocate memory for ha.\n");
2828                 goto disable_device;
2829         }
2830         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2831             "Memory allocated for ha=%p.\n", ha);
2832         ha->pdev = pdev;
2833         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2834         spin_lock_init(&ha->tgt.q_full_lock);
2835         spin_lock_init(&ha->tgt.sess_lock);
2836         spin_lock_init(&ha->tgt.atio_lock);
2837
2838         spin_lock_init(&ha->sadb_lock);
2839         INIT_LIST_HEAD(&ha->sadb_tx_index_list);
2840         INIT_LIST_HEAD(&ha->sadb_rx_index_list);
2841
2842         spin_lock_init(&ha->sadb_fp_lock);
2843
2844         if (qla_edif_sadb_build_free_pool(ha)) {
2845                 kfree(ha);
2846                 goto  disable_device;
2847         }
2848
2849         atomic_set(&ha->nvme_active_aen_cnt, 0);
2850
2851         /* Clear our data area */
2852         ha->bars = bars;
2853         ha->mem_only = mem_only;
2854         spin_lock_init(&ha->hardware_lock);
2855         spin_lock_init(&ha->vport_slock);
2856         mutex_init(&ha->selflogin_lock);
2857         mutex_init(&ha->optrom_mutex);
2858
2859         /* Set ISP-type information. */
2860         qla2x00_set_isp_flags(ha);
2861
2862         /* Set EEH reset type to fundamental if required by hba */
2863         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2864             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2865                 pdev->needs_freset = 1;
2866
2867         ha->prev_topology = 0;
2868         ha->init_cb_size = sizeof(init_cb_t);
2869         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2870         ha->optrom_size = OPTROM_SIZE_2300;
2871         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2872         atomic_set(&ha->num_pend_mbx_stage1, 0);
2873         atomic_set(&ha->num_pend_mbx_stage2, 0);
2874         atomic_set(&ha->num_pend_mbx_stage3, 0);
2875         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2876         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2877
2878         /* Assign ISP specific operations. */
2879         if (IS_QLA2100(ha)) {
2880                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2881                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2882                 req_length = REQUEST_ENTRY_CNT_2100;
2883                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2884                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2885                 ha->gid_list_info_size = 4;
2886                 ha->flash_conf_off = ~0;
2887                 ha->flash_data_off = ~0;
2888                 ha->nvram_conf_off = ~0;
2889                 ha->nvram_data_off = ~0;
2890                 ha->isp_ops = &qla2100_isp_ops;
2891         } else if (IS_QLA2200(ha)) {
2892                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2893                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2894                 req_length = REQUEST_ENTRY_CNT_2200;
2895                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2896                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2897                 ha->gid_list_info_size = 4;
2898                 ha->flash_conf_off = ~0;
2899                 ha->flash_data_off = ~0;
2900                 ha->nvram_conf_off = ~0;
2901                 ha->nvram_data_off = ~0;
2902                 ha->isp_ops = &qla2100_isp_ops;
2903         } else if (IS_QLA23XX(ha)) {
2904                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2905                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2906                 req_length = REQUEST_ENTRY_CNT_2200;
2907                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2908                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2909                 ha->gid_list_info_size = 6;
2910                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2911                         ha->optrom_size = OPTROM_SIZE_2322;
2912                 ha->flash_conf_off = ~0;
2913                 ha->flash_data_off = ~0;
2914                 ha->nvram_conf_off = ~0;
2915                 ha->nvram_data_off = ~0;
2916                 ha->isp_ops = &qla2300_isp_ops;
2917         } else if (IS_QLA24XX_TYPE(ha)) {
2918                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2919                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2920                 req_length = REQUEST_ENTRY_CNT_24XX;
2921                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2922                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2923                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2924                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2925                 ha->gid_list_info_size = 8;
2926                 ha->optrom_size = OPTROM_SIZE_24XX;
2927                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2928                 ha->isp_ops = &qla24xx_isp_ops;
2929                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2930                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2931                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2932                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2933         } else if (IS_QLA25XX(ha)) {
2934                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2935                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2936                 req_length = REQUEST_ENTRY_CNT_24XX;
2937                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2938                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2939                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2940                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2941                 ha->gid_list_info_size = 8;
2942                 ha->optrom_size = OPTROM_SIZE_25XX;
2943                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2944                 ha->isp_ops = &qla25xx_isp_ops;
2945                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2946                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2947                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2948                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2949         } else if (IS_QLA81XX(ha)) {
2950                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2951                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2952                 req_length = REQUEST_ENTRY_CNT_24XX;
2953                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2954                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2955                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2956                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2957                 ha->gid_list_info_size = 8;
2958                 ha->optrom_size = OPTROM_SIZE_81XX;
2959                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2960                 ha->isp_ops = &qla81xx_isp_ops;
2961                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2962                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2963                 ha->nvram_conf_off = ~0;
2964                 ha->nvram_data_off = ~0;
2965         } else if (IS_QLA82XX(ha)) {
2966                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2967                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2968                 req_length = REQUEST_ENTRY_CNT_82XX;
2969                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2970                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2971                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2972                 ha->gid_list_info_size = 8;
2973                 ha->optrom_size = OPTROM_SIZE_82XX;
2974                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2975                 ha->isp_ops = &qla82xx_isp_ops;
2976                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2977                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2978                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2979                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2980         } else if (IS_QLA8044(ha)) {
2981                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2982                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2983                 req_length = REQUEST_ENTRY_CNT_82XX;
2984                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2985                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2986                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2987                 ha->gid_list_info_size = 8;
2988                 ha->optrom_size = OPTROM_SIZE_83XX;
2989                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2990                 ha->isp_ops = &qla8044_isp_ops;
2991                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2992                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2993                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2994                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2995         } else if (IS_QLA83XX(ha)) {
2996                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2997                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2998                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2999                 req_length = REQUEST_ENTRY_CNT_83XX;
3000                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3001                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3002                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3003                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3004                 ha->gid_list_info_size = 8;
3005                 ha->optrom_size = OPTROM_SIZE_83XX;
3006                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3007                 ha->isp_ops = &qla83xx_isp_ops;
3008                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3009                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3010                 ha->nvram_conf_off = ~0;
3011                 ha->nvram_data_off = ~0;
3012         }  else if (IS_QLAFX00(ha)) {
3013                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3014                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3015                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3016                 req_length = REQUEST_ENTRY_CNT_FX00;
3017                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3018                 ha->isp_ops = &qlafx00_isp_ops;
3019                 ha->port_down_retry_count = 30; /* default value */
3020                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3021                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3022                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3023                 ha->mr.fw_hbt_en = 1;
3024                 ha->mr.host_info_resend = false;
3025                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3026         } else if (IS_QLA27XX(ha)) {
3027                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3028                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3029                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3030                 req_length = REQUEST_ENTRY_CNT_83XX;
3031                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3032                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3033                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3034                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3035                 ha->gid_list_info_size = 8;
3036                 ha->optrom_size = OPTROM_SIZE_83XX;
3037                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3038                 ha->isp_ops = &qla27xx_isp_ops;
3039                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3040                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3041                 ha->nvram_conf_off = ~0;
3042                 ha->nvram_data_off = ~0;
3043         } else if (IS_QLA28XX(ha)) {
3044                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3045                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3046                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3047                 req_length = REQUEST_ENTRY_CNT_24XX;
3048                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3049                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3050                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3051                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3052                 ha->gid_list_info_size = 8;
3053                 ha->optrom_size = OPTROM_SIZE_28XX;
3054                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3055                 ha->isp_ops = &qla27xx_isp_ops;
3056                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3057                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3058                 ha->nvram_conf_off = ~0;
3059                 ha->nvram_data_off = ~0;
3060         }
3061
3062         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3063             "mbx_count=%d, req_length=%d, "
3064             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3065             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3066             "max_fibre_devices=%d.\n",
3067             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3068             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3069             ha->nvram_npiv_size, ha->max_fibre_devices);
3070         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3071             "isp_ops=%p, flash_conf_off=%d, "
3072             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3073             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3074             ha->nvram_conf_off, ha->nvram_data_off);
3075
3076         /* Configure PCI I/O space */
3077         ret = ha->isp_ops->iospace_config(ha);
3078         if (ret)
3079                 goto iospace_config_failed;
3080
3081         ql_log_pci(ql_log_info, pdev, 0x001d,
3082             "Found an ISP%04X irq %d iobase 0x%p.\n",
3083             pdev->device, pdev->irq, ha->iobase);
3084         mutex_init(&ha->vport_lock);
3085         mutex_init(&ha->mq_lock);
3086         init_completion(&ha->mbx_cmd_comp);
3087         complete(&ha->mbx_cmd_comp);
3088         init_completion(&ha->mbx_intr_comp);
3089         init_completion(&ha->dcbx_comp);
3090         init_completion(&ha->lb_portup_comp);
3091
3092         set_bit(0, (unsigned long *) ha->vp_idx_map);
3093
3094         qla2x00_config_dma_addressing(ha);
3095         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3096             "64 Bit addressing is %s.\n",
3097             ha->flags.enable_64bit_addressing ? "enable" :
3098             "disable");
3099         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3100         if (ret) {
3101                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3102                     "Failed to allocate memory for adapter, aborting.\n");
3103
3104                 goto probe_hw_failed;
3105         }
3106
3107         req->max_q_depth = MAX_Q_DEPTH;
3108         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3109                 req->max_q_depth = ql2xmaxqdepth;
3110
3111
3112         base_vha = qla2x00_create_host(sht, ha);
3113         if (!base_vha) {
3114                 ret = -ENOMEM;
3115                 goto probe_hw_failed;
3116         }
3117
3118         pci_set_drvdata(pdev, base_vha);
3119         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3120
3121         host = base_vha->host;
3122         base_vha->req = req;
3123         if (IS_QLA2XXX_MIDTYPE(ha))
3124                 base_vha->mgmt_svr_loop_id =
3125                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3126         else
3127                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3128                                                 base_vha->vp_idx;
3129
3130         /* Setup fcport template structure. */
3131         ha->mr.fcport.vha = base_vha;
3132         ha->mr.fcport.port_type = FCT_UNKNOWN;
3133         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3134         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3135         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3136         ha->mr.fcport.scan_state = 1;
3137
3138         qla2xxx_reset_stats(host, QLA2XX_HW_ERROR | QLA2XX_SHT_LNK_DWN |
3139                             QLA2XX_INT_ERR | QLA2XX_CMD_TIMEOUT |
3140                             QLA2XX_RESET_CMD_ERR | QLA2XX_TGT_SHT_LNK_DOWN);
3141
3142         /* Set the SG table size based on ISP type */
3143         if (!IS_FWI2_CAPABLE(ha)) {
3144                 if (IS_QLA2100(ha))
3145                         host->sg_tablesize = 32;
3146         } else {
3147                 if (!IS_QLA82XX(ha))
3148                         host->sg_tablesize = QLA_SG_ALL;
3149         }
3150         host->max_id = ha->max_fibre_devices;
3151         host->cmd_per_lun = 3;
3152         host->unique_id = host->host_no;
3153         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3154                 host->max_cmd_len = 32;
3155         else
3156                 host->max_cmd_len = MAX_CMDSZ;
3157         host->max_channel = MAX_BUSES - 1;
3158         /* Older HBAs support only 16-bit LUNs */
3159         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3160             ql2xmaxlun > 0xffff)
3161                 host->max_lun = 0xffff;
3162         else
3163                 host->max_lun = ql2xmaxlun;
3164         host->transportt = qla2xxx_transport_template;
3165         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3166
3167         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3168             "max_id=%d this_id=%d "
3169             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3170             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3171             host->this_id, host->cmd_per_lun, host->unique_id,
3172             host->max_cmd_len, host->max_channel, host->max_lun,
3173             host->transportt, sht->vendor_id);
3174
3175         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3176
3177         /* Set up the irqs */
3178         ret = qla2x00_request_irqs(ha, rsp);
3179         if (ret)
3180                 goto probe_failed;
3181
3182         /* Alloc arrays of request and response ring ptrs */
3183         ret = qla2x00_alloc_queues(ha, req, rsp);
3184         if (ret) {
3185                 ql_log(ql_log_fatal, base_vha, 0x003d,
3186                     "Failed to allocate memory for queue pointers..."
3187                     "aborting.\n");
3188                 ret = -ENODEV;
3189                 goto probe_failed;
3190         }
3191
3192         if (ha->mqenable) {
3193                 /* number of hardware queues supported by blk/scsi-mq*/
3194                 host->nr_hw_queues = ha->max_qpairs;
3195
3196                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3197                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3198         } else {
3199                 if (ql2xnvmeenable) {
3200                         host->nr_hw_queues = ha->max_qpairs;
3201                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3202                             "FC-NVMe support is enabled, HW queues=%d\n",
3203                             host->nr_hw_queues);
3204                 } else {
3205                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3206                             "blk/scsi-mq disabled.\n");
3207                 }
3208         }
3209
3210         qlt_probe_one_stage1(base_vha, ha);
3211
3212         pci_save_state(pdev);
3213
3214         /* Assign back pointers */
3215         rsp->req = req;
3216         req->rsp = rsp;
3217
3218         if (IS_QLAFX00(ha)) {
3219                 ha->rsp_q_map[0] = rsp;
3220                 ha->req_q_map[0] = req;
3221                 set_bit(0, ha->req_qid_map);
3222                 set_bit(0, ha->rsp_qid_map);
3223         }
3224
3225         /* FWI2-capable only. */
3226         req->req_q_in = &ha->iobase->isp24.req_q_in;
3227         req->req_q_out = &ha->iobase->isp24.req_q_out;
3228         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3229         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3230         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3231             IS_QLA28XX(ha)) {
3232                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3233                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3234                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3235                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3236         }
3237
3238         if (IS_QLAFX00(ha)) {
3239                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3240                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3241                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3242                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3243         }
3244
3245         if (IS_P3P_TYPE(ha)) {
3246                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3247                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3248                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3249         }
3250
3251         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3252             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3253             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3254         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3255             "req->req_q_in=%p req->req_q_out=%p "
3256             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3257             req->req_q_in, req->req_q_out,
3258             rsp->rsp_q_in, rsp->rsp_q_out);
3259         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3260             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3261             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3262         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3263             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3264             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3265
3266         ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 0);
3267         if (unlikely(!ha->wq)) {
3268                 ret = -ENOMEM;
3269                 goto probe_failed;
3270         }
3271
3272         if (ha->isp_ops->initialize_adapter(base_vha)) {
3273                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3274                     "Failed to initialize adapter - Adapter flags %x.\n",
3275                     base_vha->device_flags);
3276
3277                 if (IS_QLA82XX(ha)) {
3278                         qla82xx_idc_lock(ha);
3279                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3280                                 QLA8XXX_DEV_FAILED);
3281                         qla82xx_idc_unlock(ha);
3282                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3283                             "HW State: FAILED.\n");
3284                 } else if (IS_QLA8044(ha)) {
3285                         qla8044_idc_lock(ha);
3286                         qla8044_wr_direct(base_vha,
3287                                 QLA8044_CRB_DEV_STATE_INDEX,
3288                                 QLA8XXX_DEV_FAILED);
3289                         qla8044_idc_unlock(ha);
3290                         ql_log(ql_log_fatal, base_vha, 0x0150,
3291                             "HW State: FAILED.\n");
3292                 }
3293
3294                 ret = -ENODEV;
3295                 goto probe_failed;
3296         }
3297
3298         if (IS_QLAFX00(ha))
3299                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3300         else
3301                 host->can_queue = req->num_outstanding_cmds - 10;
3302
3303         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3304             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3305             host->can_queue, base_vha->req,
3306             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3307
3308         if (ha->mqenable) {
3309                 bool startit = false;
3310
3311                 if (QLA_TGT_MODE_ENABLED())
3312                         startit = false;
3313
3314                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3315                         startit = true;
3316
3317                 /* Create start of day qpairs for Block MQ */
3318                 for (i = 0; i < ha->max_qpairs; i++)
3319                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3320         }
3321         qla_init_iocb_limit(base_vha);
3322
3323         if (ha->flags.running_gold_fw)
3324                 goto skip_dpc;
3325
3326         /*
3327          * Startup the kernel thread for this host adapter
3328          */
3329         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3330             "%s_dpc", base_vha->host_str);
3331         if (IS_ERR(ha->dpc_thread)) {
3332                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3333                     "Failed to start DPC thread.\n");
3334                 ret = PTR_ERR(ha->dpc_thread);
3335                 ha->dpc_thread = NULL;
3336                 goto probe_failed;
3337         }
3338         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3339             "DPC thread started successfully.\n");
3340
3341         /*
3342          * If we're not coming up in initiator mode, we might sit for
3343          * a while without waking up the dpc thread, which leads to a
3344          * stuck process warning.  So just kick the dpc once here and
3345          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3346          */
3347         qla2xxx_wake_dpc(base_vha);
3348
3349         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3350
3351         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3352                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3353                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3354                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3355
3356                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3357                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3358                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3359                 INIT_WORK(&ha->idc_state_handler,
3360                     qla83xx_idc_state_handler_work);
3361                 INIT_WORK(&ha->nic_core_unrecoverable,
3362                     qla83xx_nic_core_unrecoverable_work);
3363         }
3364
3365 skip_dpc:
3366         list_add_tail(&base_vha->list, &ha->vp_list);
3367         base_vha->host->irq = ha->pdev->irq;
3368
3369         /* Initialized the timer */
3370         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3371         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3372             "Started qla2x00_timer with "
3373             "interval=%d.\n", WATCH_INTERVAL);
3374         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3375             "Detected hba at address=%p.\n",
3376             ha);
3377
3378         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3379                 if (ha->fw_attributes & BIT_4) {
3380                         int prot = 0, guard;
3381
3382                         base_vha->flags.difdix_supported = 1;
3383                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3384                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3385                         if (ql2xenabledif == 1)
3386                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3387                         if (ql2xprotmask)
3388                                 scsi_host_set_prot(host, ql2xprotmask);
3389                         else
3390                                 scsi_host_set_prot(host,
3391                                     prot | SHOST_DIF_TYPE1_PROTECTION
3392                                     | SHOST_DIF_TYPE2_PROTECTION
3393                                     | SHOST_DIF_TYPE3_PROTECTION
3394                                     | SHOST_DIX_TYPE1_PROTECTION
3395                                     | SHOST_DIX_TYPE2_PROTECTION
3396                                     | SHOST_DIX_TYPE3_PROTECTION);
3397
3398                         guard = SHOST_DIX_GUARD_CRC;
3399
3400                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3401                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3402                                 guard |= SHOST_DIX_GUARD_IP;
3403
3404                         if (ql2xprotguard)
3405                                 scsi_host_set_guard(host, ql2xprotguard);
3406                         else
3407                                 scsi_host_set_guard(host, guard);
3408                 } else
3409                         base_vha->flags.difdix_supported = 0;
3410         }
3411
3412         ha->isp_ops->enable_intrs(ha);
3413
3414         if (IS_QLAFX00(ha)) {
3415                 ret = qlafx00_fx_disc(base_vha,
3416                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3417                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3418                     QLA_SG_ALL : 128;
3419         }
3420
3421         ret = scsi_add_host(host, &pdev->dev);
3422         if (ret)
3423                 goto probe_failed;
3424
3425         base_vha->flags.init_done = 1;
3426         base_vha->flags.online = 1;
3427         ha->prev_minidump_failed = 0;
3428
3429         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3430             "Init done and hba is online.\n");
3431
3432         if (qla_ini_mode_enabled(base_vha) ||
3433                 qla_dual_mode_enabled(base_vha))
3434                 scsi_scan_host(host);
3435         else
3436                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3437                         "skipping scsi_scan_host() for non-initiator port\n");
3438
3439         qla2x00_alloc_sysfs_attr(base_vha);
3440
3441         if (IS_QLAFX00(ha)) {
3442                 ret = qlafx00_fx_disc(base_vha,
3443                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3444
3445                 /* Register system information */
3446                 ret =  qlafx00_fx_disc(base_vha,
3447                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3448         }
3449
3450         qla2x00_init_host_attr(base_vha);
3451
3452         qla2x00_dfs_setup(base_vha);
3453
3454         ql_log(ql_log_info, base_vha, 0x00fb,
3455             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3456         ql_log(ql_log_info, base_vha, 0x00fc,
3457             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3458             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info,
3459                                                        sizeof(pci_info)),
3460             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3461             base_vha->host_no,
3462             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3463
3464         qlt_add_target(ha, base_vha);
3465
3466         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3467
3468         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3469                 return -ENODEV;
3470
3471         return 0;
3472
3473 probe_failed:
3474         qla_enode_stop(base_vha);
3475         if (base_vha->gnl.l) {
3476                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3477                                 base_vha->gnl.l, base_vha->gnl.ldma);
3478                 base_vha->gnl.l = NULL;
3479         }
3480
3481         if (base_vha->timer_active)
3482                 qla2x00_stop_timer(base_vha);
3483         base_vha->flags.online = 0;
3484         if (ha->dpc_thread) {
3485                 struct task_struct *t = ha->dpc_thread;
3486
3487                 ha->dpc_thread = NULL;
3488                 kthread_stop(t);
3489         }
3490
3491         qla2x00_free_device(base_vha);
3492         scsi_host_put(base_vha->host);
3493         /*
3494          * Need to NULL out local req/rsp after
3495          * qla2x00_free_device => qla2x00_free_queues frees
3496          * what these are pointing to. Or else we'll
3497          * fall over below in qla2x00_free_req/rsp_que.
3498          */
3499         req = NULL;
3500         rsp = NULL;
3501
3502 probe_hw_failed:
3503         qla2x00_mem_free(ha);
3504         qla2x00_free_req_que(ha, req);
3505         qla2x00_free_rsp_que(ha, rsp);
3506         qla2x00_clear_drv_active(ha);
3507
3508 iospace_config_failed:
3509         if (IS_P3P_TYPE(ha)) {
3510                 if (!ha->nx_pcibase)
3511                         iounmap((device_reg_t *)ha->nx_pcibase);
3512                 if (!ql2xdbwr)
3513                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3514         } else {
3515                 if (ha->iobase)
3516                         iounmap(ha->iobase);
3517                 if (ha->cregbase)
3518                         iounmap(ha->cregbase);
3519         }
3520         pci_release_selected_regions(ha->pdev, ha->bars);
3521         kfree(ha);
3522
3523 disable_device:
3524         pci_disable_device(pdev);
3525         return ret;
3526 }
3527
3528 static void __qla_set_remove_flag(scsi_qla_host_t *base_vha)
3529 {
3530         scsi_qla_host_t *vp;
3531         unsigned long flags;
3532         struct qla_hw_data *ha;
3533
3534         if (!base_vha)
3535                 return;
3536
3537         ha = base_vha->hw;
3538
3539         spin_lock_irqsave(&ha->vport_slock, flags);
3540         list_for_each_entry(vp, &ha->vp_list, list)
3541                 set_bit(PFLG_DRIVER_REMOVING, &vp->pci_flags);
3542
3543         /*
3544          * Indicate device removal to prevent future board_disable
3545          * and wait until any pending board_disable has completed.
3546          */
3547         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3548         spin_unlock_irqrestore(&ha->vport_slock, flags);
3549 }
3550
3551 static void
3552 qla2x00_shutdown(struct pci_dev *pdev)
3553 {
3554         scsi_qla_host_t *vha;
3555         struct qla_hw_data  *ha;
3556
3557         vha = pci_get_drvdata(pdev);
3558         ha = vha->hw;
3559
3560         ql_log(ql_log_info, vha, 0xfffa,
3561                 "Adapter shutdown\n");
3562
3563         /*
3564          * Prevent future board_disable and wait
3565          * until any pending board_disable has completed.
3566          */
3567         __qla_set_remove_flag(vha);
3568         cancel_work_sync(&ha->board_disable);
3569
3570         if (!atomic_read(&pdev->enable_cnt))
3571                 return;
3572
3573         /* Notify ISPFX00 firmware */
3574         if (IS_QLAFX00(ha))
3575                 qlafx00_driver_shutdown(vha, 20);
3576
3577         /* Turn-off FCE trace */
3578         if (ha->flags.fce_enabled) {
3579                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3580                 ha->flags.fce_enabled = 0;
3581         }
3582
3583         /* Turn-off EFT trace */
3584         if (ha->eft)
3585                 qla2x00_disable_eft_trace(vha);
3586
3587         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3588             IS_QLA28XX(ha)) {
3589                 if (ha->flags.fw_started)
3590                         qla2x00_abort_isp_cleanup(vha);
3591         } else {
3592                 /* Stop currently executing firmware. */
3593                 qla2x00_try_to_stop_firmware(vha);
3594         }
3595
3596         /* Disable timer */
3597         if (vha->timer_active)
3598                 qla2x00_stop_timer(vha);
3599
3600         /* Turn adapter off line */
3601         vha->flags.online = 0;
3602
3603         /* turn-off interrupts on the card */
3604         if (ha->interrupts_on) {
3605                 vha->flags.init_done = 0;
3606                 ha->isp_ops->disable_intrs(ha);
3607         }
3608
3609         qla2x00_free_irqs(vha);
3610
3611         qla2x00_free_fw_dump(ha);
3612
3613         pci_disable_device(pdev);
3614         ql_log(ql_log_info, vha, 0xfffe,
3615                 "Adapter shutdown successfully.\n");
3616 }
3617
3618 /* Deletes all the virtual ports for a given ha */
3619 static void
3620 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3621 {
3622         scsi_qla_host_t *vha;
3623         unsigned long flags;
3624
3625         mutex_lock(&ha->vport_lock);
3626         while (ha->cur_vport_count) {
3627                 spin_lock_irqsave(&ha->vport_slock, flags);
3628
3629                 BUG_ON(base_vha->list.next == &ha->vp_list);
3630                 /* This assumes first entry in ha->vp_list is always base vha */
3631                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3632                 scsi_host_get(vha->host);
3633
3634                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3635                 mutex_unlock(&ha->vport_lock);
3636
3637                 qla_nvme_delete(vha);
3638
3639                 fc_vport_terminate(vha->fc_vport);
3640                 scsi_host_put(vha->host);
3641
3642                 mutex_lock(&ha->vport_lock);
3643         }
3644         mutex_unlock(&ha->vport_lock);
3645 }
3646
3647 /* Stops all deferred work threads */
3648 static void
3649 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3650 {
3651         /* Cancel all work and destroy DPC workqueues */
3652         if (ha->dpc_lp_wq) {
3653                 cancel_work_sync(&ha->idc_aen);
3654                 destroy_workqueue(ha->dpc_lp_wq);
3655                 ha->dpc_lp_wq = NULL;
3656         }
3657
3658         if (ha->dpc_hp_wq) {
3659                 cancel_work_sync(&ha->nic_core_reset);
3660                 cancel_work_sync(&ha->idc_state_handler);
3661                 cancel_work_sync(&ha->nic_core_unrecoverable);
3662                 destroy_workqueue(ha->dpc_hp_wq);
3663                 ha->dpc_hp_wq = NULL;
3664         }
3665
3666         /* Kill the kernel thread for this host */
3667         if (ha->dpc_thread) {
3668                 struct task_struct *t = ha->dpc_thread;
3669
3670                 /*
3671                  * qla2xxx_wake_dpc checks for ->dpc_thread
3672                  * so we need to zero it out.
3673                  */
3674                 ha->dpc_thread = NULL;
3675                 kthread_stop(t);
3676         }
3677 }
3678
3679 static void
3680 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3681 {
3682         if (IS_QLA82XX(ha)) {
3683
3684                 iounmap((device_reg_t *)ha->nx_pcibase);
3685                 if (!ql2xdbwr)
3686                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3687         } else {
3688                 if (ha->iobase)
3689                         iounmap(ha->iobase);
3690
3691                 if (ha->cregbase)
3692                         iounmap(ha->cregbase);
3693
3694                 if (ha->mqiobase)
3695                         iounmap(ha->mqiobase);
3696
3697                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
3698                     ha->msixbase)
3699                         iounmap(ha->msixbase);
3700         }
3701 }
3702
3703 static void
3704 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3705 {
3706         if (IS_QLA8044(ha)) {
3707                 qla8044_idc_lock(ha);
3708                 qla8044_clear_drv_active(ha);
3709                 qla8044_idc_unlock(ha);
3710         } else if (IS_QLA82XX(ha)) {
3711                 qla82xx_idc_lock(ha);
3712                 qla82xx_clear_drv_active(ha);
3713                 qla82xx_idc_unlock(ha);
3714         }
3715 }
3716
3717 static void
3718 qla2x00_remove_one(struct pci_dev *pdev)
3719 {
3720         scsi_qla_host_t *base_vha;
3721         struct qla_hw_data  *ha;
3722
3723         base_vha = pci_get_drvdata(pdev);
3724         ha = base_vha->hw;
3725         ql_log(ql_log_info, base_vha, 0xb079,
3726             "Removing driver\n");
3727         __qla_set_remove_flag(base_vha);
3728         cancel_work_sync(&ha->board_disable);
3729
3730         /*
3731          * If the PCI device is disabled then there was a PCI-disconnect and
3732          * qla2x00_disable_board_on_pci_error has taken care of most of the
3733          * resources.
3734          */
3735         if (!atomic_read(&pdev->enable_cnt)) {
3736                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3737                     base_vha->gnl.l, base_vha->gnl.ldma);
3738                 base_vha->gnl.l = NULL;
3739                 scsi_host_put(base_vha->host);
3740                 kfree(ha);
3741                 pci_set_drvdata(pdev, NULL);
3742                 return;
3743         }
3744         qla2x00_wait_for_hba_ready(base_vha);
3745
3746         /*
3747          * if UNLOADING flag is already set, then continue unload,
3748          * where it was set first.
3749          */
3750         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
3751                 return;
3752
3753         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3754             IS_QLA28XX(ha)) {
3755                 if (ha->flags.fw_started)
3756                         qla2x00_abort_isp_cleanup(base_vha);
3757         } else if (!IS_QLAFX00(ha)) {
3758                 if (IS_QLA8031(ha)) {
3759                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3760                             "Clearing fcoe driver presence.\n");
3761                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3762                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3763                                     "Error while clearing DRV-Presence.\n");
3764                 }
3765
3766                 qla2x00_try_to_stop_firmware(base_vha);
3767         }
3768
3769         qla2x00_wait_for_sess_deletion(base_vha);
3770
3771         qla_nvme_delete(base_vha);
3772
3773         dma_free_coherent(&ha->pdev->dev,
3774                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3775
3776         base_vha->gnl.l = NULL;
3777         qla_enode_stop(base_vha);
3778
3779         vfree(base_vha->scan.l);
3780
3781         if (IS_QLAFX00(ha))
3782                 qlafx00_driver_shutdown(base_vha, 20);
3783
3784         qla2x00_delete_all_vps(ha, base_vha);
3785
3786         qla2x00_dfs_remove(base_vha);
3787
3788         qla84xx_put_chip(base_vha);
3789
3790         /* Disable timer */
3791         if (base_vha->timer_active)
3792                 qla2x00_stop_timer(base_vha);
3793
3794         base_vha->flags.online = 0;
3795
3796         /* free DMA memory */
3797         if (ha->exlogin_buf)
3798                 qla2x00_free_exlogin_buffer(ha);
3799
3800         /* free DMA memory */
3801         if (ha->exchoffld_buf)
3802                 qla2x00_free_exchoffld_buffer(ha);
3803
3804         qla2x00_destroy_deferred_work(ha);
3805
3806         qlt_remove_target(ha, base_vha);
3807
3808         qla2x00_free_sysfs_attr(base_vha, true);
3809
3810         fc_remove_host(base_vha->host);
3811
3812         scsi_remove_host(base_vha->host);
3813
3814         qla2x00_free_device(base_vha);
3815
3816         qla2x00_clear_drv_active(ha);
3817
3818         scsi_host_put(base_vha->host);
3819
3820         qla2x00_unmap_iobases(ha);
3821
3822         pci_release_selected_regions(ha->pdev, ha->bars);
3823         kfree(ha);
3824
3825         pci_disable_pcie_error_reporting(pdev);
3826
3827         pci_disable_device(pdev);
3828 }
3829
3830 static inline void
3831 qla24xx_free_purex_list(struct purex_list *list)
3832 {
3833         struct list_head *item, *next;
3834         ulong flags;
3835
3836         spin_lock_irqsave(&list->lock, flags);
3837         list_for_each_safe(item, next, &list->head) {
3838                 list_del(item);
3839                 kfree(list_entry(item, struct purex_item, list));
3840         }
3841         spin_unlock_irqrestore(&list->lock, flags);
3842 }
3843
3844 static void
3845 qla2x00_free_device(scsi_qla_host_t *vha)
3846 {
3847         struct qla_hw_data *ha = vha->hw;
3848
3849         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3850
3851         /* Disable timer */
3852         if (vha->timer_active)
3853                 qla2x00_stop_timer(vha);
3854
3855         qla25xx_delete_queues(vha);
3856         vha->flags.online = 0;
3857
3858         /* turn-off interrupts on the card */
3859         if (ha->interrupts_on) {
3860                 vha->flags.init_done = 0;
3861                 ha->isp_ops->disable_intrs(ha);
3862         }
3863
3864         qla2x00_free_fcports(vha);
3865
3866         qla2x00_free_irqs(vha);
3867
3868         /* Flush the work queue and remove it */
3869         if (ha->wq) {
3870                 flush_workqueue(ha->wq);
3871                 destroy_workqueue(ha->wq);
3872                 ha->wq = NULL;
3873         }
3874
3875
3876         qla24xx_free_purex_list(&vha->purex_list);
3877
3878         qla2x00_mem_free(ha);
3879
3880         qla82xx_md_free(vha);
3881
3882         qla_edif_sadb_release_free_pool(ha);
3883         qla_edif_sadb_release(ha);
3884
3885         qla2x00_free_queues(ha);
3886 }
3887
3888 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3889 {
3890         fc_port_t *fcport, *tfcport;
3891
3892         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3893                 qla2x00_free_fcport(fcport);
3894 }
3895
3896 static inline void
3897 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport)
3898 {
3899         int now;
3900
3901         if (!fcport->rport)
3902                 return;
3903
3904         if (fcport->rport) {
3905                 ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3906                     "%s %8phN. rport %p roles %x\n",
3907                     __func__, fcport->port_name, fcport->rport,
3908                     fcport->rport->roles);
3909                 fc_remote_port_delete(fcport->rport);
3910         }
3911         qlt_do_generation_tick(vha, &now);
3912 }
3913
3914 /*
3915  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3916  *
3917  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3918  *
3919  * Return: None.
3920  *
3921  * Context:
3922  */
3923 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3924     int do_login)
3925 {
3926         if (IS_QLAFX00(vha->hw)) {
3927                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3928                 qla2x00_schedule_rport_del(vha, fcport);
3929                 return;
3930         }
3931
3932         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3933             vha->vp_idx == fcport->vha->vp_idx) {
3934                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3935                 qla2x00_schedule_rport_del(vha, fcport);
3936         }
3937         /*
3938          * We may need to retry the login, so don't change the state of the
3939          * port but do the retries.
3940          */
3941         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3942                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3943
3944         if (!do_login)
3945                 return;
3946
3947         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3948 }
3949
3950 void
3951 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha)
3952 {
3953         fc_port_t *fcport;
3954
3955         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3956             "Mark all dev lost\n");
3957
3958         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3959                 fcport->scan_state = 0;
3960                 qlt_schedule_sess_for_deletion(fcport);
3961         }
3962 }
3963
3964 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
3965 {
3966         int i;
3967
3968         if (IS_FWI2_CAPABLE(ha))
3969                 return;
3970
3971         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
3972                 set_bit(i, ha->loop_id_map);
3973         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
3974         set_bit(BROADCAST, ha->loop_id_map);
3975 }
3976
3977 /*
3978 * qla2x00_mem_alloc
3979 *      Allocates adapter memory.
3980 *
3981 * Returns:
3982 *      0  = success.
3983 *      !0  = failure.
3984 */
3985 static int
3986 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3987         struct req_que **req, struct rsp_que **rsp)
3988 {
3989         char    name[16];
3990         int rc;
3991
3992         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3993                 &ha->init_cb_dma, GFP_KERNEL);
3994         if (!ha->init_cb)
3995                 goto fail;
3996
3997         rc = btree_init32(&ha->host_map);
3998         if (rc)
3999                 goto fail_free_init_cb;
4000
4001         if (qlt_mem_alloc(ha) < 0)
4002                 goto fail_free_btree;
4003
4004         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
4005                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
4006         if (!ha->gid_list)
4007                 goto fail_free_tgt_mem;
4008
4009         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
4010         if (!ha->srb_mempool)
4011                 goto fail_free_gid_list;
4012
4013         if (IS_P3P_TYPE(ha)) {
4014                 /* Allocate cache for CT6 Ctx. */
4015                 if (!ctx_cachep) {
4016                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
4017                                 sizeof(struct ct6_dsd), 0,
4018                                 SLAB_HWCACHE_ALIGN, NULL);
4019                         if (!ctx_cachep)
4020                                 goto fail_free_srb_mempool;
4021                 }
4022                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
4023                         ctx_cachep);
4024                 if (!ha->ctx_mempool)
4025                         goto fail_free_srb_mempool;
4026                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
4027                     "ctx_cachep=%p ctx_mempool=%p.\n",
4028                     ctx_cachep, ha->ctx_mempool);
4029         }
4030
4031         /* Get memory for cached NVRAM */
4032         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
4033         if (!ha->nvram)
4034                 goto fail_free_ctx_mempool;
4035
4036         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
4037                 ha->pdev->device);
4038         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4039                 DMA_POOL_SIZE, 8, 0);
4040         if (!ha->s_dma_pool)
4041                 goto fail_free_nvram;
4042
4043         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4044             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4045             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4046
4047         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
4048                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4049                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4050                 if (!ha->dl_dma_pool) {
4051                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4052                             "Failed to allocate memory for dl_dma_pool.\n");
4053                         goto fail_s_dma_pool;
4054                 }
4055
4056                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4057                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4058                 if (!ha->fcp_cmnd_dma_pool) {
4059                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4060                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4061                         goto fail_dl_dma_pool;
4062                 }
4063
4064                 if (ql2xenabledif) {
4065                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4066                         struct dsd_dma *dsd, *nxt;
4067                         uint i;
4068                         /* Creata a DMA pool of buffers for DIF bundling */
4069                         ha->dif_bundl_pool = dma_pool_create(name,
4070                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4071                         if (!ha->dif_bundl_pool) {
4072                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4073                                     "%s: failed create dif_bundl_pool\n",
4074                                     __func__);
4075                                 goto fail_dif_bundl_dma_pool;
4076                         }
4077
4078                         INIT_LIST_HEAD(&ha->pool.good.head);
4079                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4080                         ha->pool.good.count = 0;
4081                         ha->pool.unusable.count = 0;
4082                         for (i = 0; i < 128; i++) {
4083                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4084                                 if (!dsd) {
4085                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4086                                             0xe0ee, "%s: failed alloc dsd\n",
4087                                             __func__);
4088                                         return 1;
4089                                 }
4090                                 ha->dif_bundle_kallocs++;
4091
4092                                 dsd->dsd_addr = dma_pool_alloc(
4093                                     ha->dif_bundl_pool, GFP_ATOMIC,
4094                                     &dsd->dsd_list_dma);
4095                                 if (!dsd->dsd_addr) {
4096                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4097                                             0xe0ee,
4098                                             "%s: failed alloc ->dsd_addr\n",
4099                                             __func__);
4100                                         kfree(dsd);
4101                                         ha->dif_bundle_kallocs--;
4102                                         continue;
4103                                 }
4104                                 ha->dif_bundle_dma_allocs++;
4105
4106                                 /*
4107                                  * if DMA buffer crosses 4G boundary,
4108                                  * put it on bad list
4109                                  */
4110                                 if (MSD(dsd->dsd_list_dma) ^
4111                                     MSD(dsd->dsd_list_dma + bufsize)) {
4112                                         list_add_tail(&dsd->list,
4113                                             &ha->pool.unusable.head);
4114                                         ha->pool.unusable.count++;
4115                                 } else {
4116                                         list_add_tail(&dsd->list,
4117                                             &ha->pool.good.head);
4118                                         ha->pool.good.count++;
4119                                 }
4120                         }
4121
4122                         /* return the good ones back to the pool */
4123                         list_for_each_entry_safe(dsd, nxt,
4124                             &ha->pool.good.head, list) {
4125                                 list_del(&dsd->list);
4126                                 dma_pool_free(ha->dif_bundl_pool,
4127                                     dsd->dsd_addr, dsd->dsd_list_dma);
4128                                 ha->dif_bundle_dma_allocs--;
4129                                 kfree(dsd);
4130                                 ha->dif_bundle_kallocs--;
4131                         }
4132
4133                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4134                             "%s: dif dma pool (good=%u unusable=%u)\n",
4135                             __func__, ha->pool.good.count,
4136                             ha->pool.unusable.count);
4137                 }
4138
4139                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4140                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4141                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4142                     ha->dif_bundl_pool);
4143         }
4144
4145         /* Allocate memory for SNS commands */
4146         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4147         /* Get consistent memory allocated for SNS commands */
4148                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4149                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4150                 if (!ha->sns_cmd)
4151                         goto fail_dma_pool;
4152                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4153                     "sns_cmd: %p.\n", ha->sns_cmd);
4154         } else {
4155         /* Get consistent memory allocated for MS IOCB */
4156                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4157                         &ha->ms_iocb_dma);
4158                 if (!ha->ms_iocb)
4159                         goto fail_dma_pool;
4160         /* Get consistent memory allocated for CT SNS commands */
4161                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4162                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4163                 if (!ha->ct_sns)
4164                         goto fail_free_ms_iocb;
4165                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4166                     "ms_iocb=%p ct_sns=%p.\n",
4167                     ha->ms_iocb, ha->ct_sns);
4168         }
4169
4170         /* Allocate memory for request ring */
4171         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4172         if (!*req) {
4173                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4174                     "Failed to allocate memory for req.\n");
4175                 goto fail_req;
4176         }
4177         (*req)->length = req_len;
4178         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4179                 ((*req)->length + 1) * sizeof(request_t),
4180                 &(*req)->dma, GFP_KERNEL);
4181         if (!(*req)->ring) {
4182                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4183                     "Failed to allocate memory for req_ring.\n");
4184                 goto fail_req_ring;
4185         }
4186         /* Allocate memory for response ring */
4187         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4188         if (!*rsp) {
4189                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4190                     "Failed to allocate memory for rsp.\n");
4191                 goto fail_rsp;
4192         }
4193         (*rsp)->hw = ha;
4194         (*rsp)->length = rsp_len;
4195         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4196                 ((*rsp)->length + 1) * sizeof(response_t),
4197                 &(*rsp)->dma, GFP_KERNEL);
4198         if (!(*rsp)->ring) {
4199                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4200                     "Failed to allocate memory for rsp_ring.\n");
4201                 goto fail_rsp_ring;
4202         }
4203         (*req)->rsp = *rsp;
4204         (*rsp)->req = *req;
4205         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4206             "req=%p req->length=%d req->ring=%p rsp=%p "
4207             "rsp->length=%d rsp->ring=%p.\n",
4208             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4209             (*rsp)->ring);
4210         /* Allocate memory for NVRAM data for vports */
4211         if (ha->nvram_npiv_size) {
4212                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4213                                         sizeof(struct qla_npiv_entry),
4214                                         GFP_KERNEL);
4215                 if (!ha->npiv_info) {
4216                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4217                             "Failed to allocate memory for npiv_info.\n");
4218                         goto fail_npiv_info;
4219                 }
4220         } else
4221                 ha->npiv_info = NULL;
4222
4223         /* Get consistent memory allocated for EX-INIT-CB. */
4224         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4225             IS_QLA28XX(ha)) {
4226                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4227                     &ha->ex_init_cb_dma);
4228                 if (!ha->ex_init_cb)
4229                         goto fail_ex_init_cb;
4230                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4231                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4232         }
4233
4234         /* Get consistent memory allocated for Special Features-CB. */
4235         if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4236                 ha->sf_init_cb = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL,
4237                                                 &ha->sf_init_cb_dma);
4238                 if (!ha->sf_init_cb)
4239                         goto fail_sf_init_cb;
4240                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0199,
4241                            "sf_init_cb=%p.\n", ha->sf_init_cb);
4242         }
4243
4244         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4245
4246         /* Get consistent memory allocated for Async Port-Database. */
4247         if (!IS_FWI2_CAPABLE(ha)) {
4248                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4249                         &ha->async_pd_dma);
4250                 if (!ha->async_pd)
4251                         goto fail_async_pd;
4252                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4253                     "async_pd=%p.\n", ha->async_pd);
4254         }
4255
4256         INIT_LIST_HEAD(&ha->vp_list);
4257
4258         /* Allocate memory for our loop_id bitmap */
4259         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4260                                   sizeof(long),
4261                                   GFP_KERNEL);
4262         if (!ha->loop_id_map)
4263                 goto fail_loop_id_map;
4264         else {
4265                 qla2x00_set_reserved_loop_ids(ha);
4266                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4267                     "loop_id_map=%p.\n", ha->loop_id_map);
4268         }
4269
4270         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4271             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4272         if (!ha->sfp_data) {
4273                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4274                     "Unable to allocate memory for SFP read-data.\n");
4275                 goto fail_sfp_data;
4276         }
4277
4278         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4279             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4280             GFP_KERNEL);
4281         if (!ha->flt) {
4282                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4283                     "Unable to allocate memory for FLT.\n");
4284                 goto fail_flt_buffer;
4285         }
4286
4287         /* allocate the purex dma pool */
4288         ha->purex_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4289             MAX_PAYLOAD, 8, 0);
4290
4291         if (!ha->purex_dma_pool) {
4292                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4293                     "Unable to allocate purex_dma_pool.\n");
4294                 goto fail_flt;
4295         }
4296
4297         ha->elsrej.size = sizeof(struct fc_els_ls_rjt) + 16;
4298         ha->elsrej.c = dma_alloc_coherent(&ha->pdev->dev,
4299             ha->elsrej.size, &ha->elsrej.cdma, GFP_KERNEL);
4300
4301         if (!ha->elsrej.c) {
4302                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0xffff,
4303                     "Alloc failed for els reject cmd.\n");
4304                 goto fail_elsrej;
4305         }
4306         ha->elsrej.c->er_cmd = ELS_LS_RJT;
4307         ha->elsrej.c->er_reason = ELS_RJT_BUSY;
4308         ha->elsrej.c->er_explan = ELS_EXPL_UNAB_DATA;
4309         return 0;
4310
4311 fail_elsrej:
4312         dma_pool_destroy(ha->purex_dma_pool);
4313 fail_flt:
4314         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4315             ha->flt, ha->flt_dma);
4316
4317 fail_flt_buffer:
4318         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4319             ha->sfp_data, ha->sfp_data_dma);
4320 fail_sfp_data:
4321         kfree(ha->loop_id_map);
4322 fail_loop_id_map:
4323         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4324 fail_async_pd:
4325         dma_pool_free(ha->s_dma_pool, ha->sf_init_cb, ha->sf_init_cb_dma);
4326 fail_sf_init_cb:
4327         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4328 fail_ex_init_cb:
4329         kfree(ha->npiv_info);
4330 fail_npiv_info:
4331         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4332                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4333         (*rsp)->ring = NULL;
4334         (*rsp)->dma = 0;
4335 fail_rsp_ring:
4336         kfree(*rsp);
4337         *rsp = NULL;
4338 fail_rsp:
4339         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4340                 sizeof(request_t), (*req)->ring, (*req)->dma);
4341         (*req)->ring = NULL;
4342         (*req)->dma = 0;
4343 fail_req_ring:
4344         kfree(*req);
4345         *req = NULL;
4346 fail_req:
4347         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4348                 ha->ct_sns, ha->ct_sns_dma);
4349         ha->ct_sns = NULL;
4350         ha->ct_sns_dma = 0;
4351 fail_free_ms_iocb:
4352         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4353         ha->ms_iocb = NULL;
4354         ha->ms_iocb_dma = 0;
4355
4356         if (ha->sns_cmd)
4357                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4358                     ha->sns_cmd, ha->sns_cmd_dma);
4359 fail_dma_pool:
4360         if (ql2xenabledif) {
4361                 struct dsd_dma *dsd, *nxt;
4362
4363                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4364                     list) {
4365                         list_del(&dsd->list);
4366                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4367                             dsd->dsd_list_dma);
4368                         ha->dif_bundle_dma_allocs--;
4369                         kfree(dsd);
4370                         ha->dif_bundle_kallocs--;
4371                         ha->pool.unusable.count--;
4372                 }
4373                 dma_pool_destroy(ha->dif_bundl_pool);
4374                 ha->dif_bundl_pool = NULL;
4375         }
4376
4377 fail_dif_bundl_dma_pool:
4378         if (IS_QLA82XX(ha) || ql2xenabledif) {
4379                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4380                 ha->fcp_cmnd_dma_pool = NULL;
4381         }
4382 fail_dl_dma_pool:
4383         if (IS_QLA82XX(ha) || ql2xenabledif) {
4384                 dma_pool_destroy(ha->dl_dma_pool);
4385                 ha->dl_dma_pool = NULL;
4386         }
4387 fail_s_dma_pool:
4388         dma_pool_destroy(ha->s_dma_pool);
4389         ha->s_dma_pool = NULL;
4390 fail_free_nvram:
4391         kfree(ha->nvram);
4392         ha->nvram = NULL;
4393 fail_free_ctx_mempool:
4394         mempool_destroy(ha->ctx_mempool);
4395         ha->ctx_mempool = NULL;
4396 fail_free_srb_mempool:
4397         mempool_destroy(ha->srb_mempool);
4398         ha->srb_mempool = NULL;
4399 fail_free_gid_list:
4400         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4401         ha->gid_list,
4402         ha->gid_list_dma);
4403         ha->gid_list = NULL;
4404         ha->gid_list_dma = 0;
4405 fail_free_tgt_mem:
4406         qlt_mem_free(ha);
4407 fail_free_btree:
4408         btree_destroy32(&ha->host_map);
4409 fail_free_init_cb:
4410         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4411         ha->init_cb_dma);
4412         ha->init_cb = NULL;
4413         ha->init_cb_dma = 0;
4414 fail:
4415         ql_log(ql_log_fatal, NULL, 0x0030,
4416             "Memory allocation failure.\n");
4417         return -ENOMEM;
4418 }
4419
4420 int
4421 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4422 {
4423         int rval;
4424         uint16_t        size, max_cnt;
4425         uint32_t temp;
4426         struct qla_hw_data *ha = vha->hw;
4427
4428         /* Return if we don't need to alloacate any extended logins */
4429         if (ql2xexlogins <= MAX_FIBRE_DEVICES_2400)
4430                 return QLA_SUCCESS;
4431
4432         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4433                 return QLA_SUCCESS;
4434
4435         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4436         max_cnt = 0;
4437         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4438         if (rval != QLA_SUCCESS) {
4439                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4440                     "Failed to get exlogin status.\n");
4441                 return rval;
4442         }
4443
4444         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4445         temp *= size;
4446
4447         if (temp != ha->exlogin_size) {
4448                 qla2x00_free_exlogin_buffer(ha);
4449                 ha->exlogin_size = temp;
4450
4451                 ql_log(ql_log_info, vha, 0xd024,
4452                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4453                     max_cnt, size, temp);
4454
4455                 ql_log(ql_log_info, vha, 0xd025,
4456                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4457
4458                 /* Get consistent memory for extended logins */
4459                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4460                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4461                 if (!ha->exlogin_buf) {
4462                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4463                     "Failed to allocate memory for exlogin_buf_dma.\n");
4464                         return -ENOMEM;
4465                 }
4466         }
4467
4468         /* Now configure the dma buffer */
4469         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4470         if (rval) {
4471                 ql_log(ql_log_fatal, vha, 0xd033,
4472                     "Setup extended login buffer  ****FAILED****.\n");
4473                 qla2x00_free_exlogin_buffer(ha);
4474         }
4475
4476         return rval;
4477 }
4478
4479 /*
4480 * qla2x00_free_exlogin_buffer
4481 *
4482 * Input:
4483 *       ha = adapter block pointer
4484 */
4485 void
4486 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4487 {
4488         if (ha->exlogin_buf) {
4489                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4490                     ha->exlogin_buf, ha->exlogin_buf_dma);
4491                 ha->exlogin_buf = NULL;
4492                 ha->exlogin_size = 0;
4493         }
4494 }
4495
4496 static void
4497 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4498 {
4499         u32 temp;
4500         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4501         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4502
4503         if (max_cnt > vha->hw->max_exchg)
4504                 max_cnt = vha->hw->max_exchg;
4505
4506         if (qla_ini_mode_enabled(vha)) {
4507                 if (vha->ql2xiniexchg > max_cnt)
4508                         vha->ql2xiniexchg = max_cnt;
4509
4510                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4511                         *ret_cnt = vha->ql2xiniexchg;
4512
4513         } else if (qla_tgt_mode_enabled(vha)) {
4514                 if (vha->ql2xexchoffld > max_cnt) {
4515                         vha->ql2xexchoffld = max_cnt;
4516                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4517                 }
4518
4519                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4520                         *ret_cnt = vha->ql2xexchoffld;
4521         } else if (qla_dual_mode_enabled(vha)) {
4522                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4523                 if (temp > max_cnt) {
4524                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4525                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4526                         temp = max_cnt;
4527                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4528                 }
4529
4530                 if (temp > FW_DEF_EXCHANGES_CNT)
4531                         *ret_cnt = temp;
4532         }
4533 }
4534
4535 int
4536 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4537 {
4538         int rval;
4539         u16     size, max_cnt;
4540         u32 actual_cnt, totsz;
4541         struct qla_hw_data *ha = vha->hw;
4542
4543         if (!ha->flags.exchoffld_enabled)
4544                 return QLA_SUCCESS;
4545
4546         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4547                 return QLA_SUCCESS;
4548
4549         max_cnt = 0;
4550         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4551         if (rval != QLA_SUCCESS) {
4552                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4553                     "Failed to get exlogin status.\n");
4554                 return rval;
4555         }
4556
4557         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4558         ql_log(ql_log_info, vha, 0xd014,
4559             "Actual exchange offload count: %d.\n", actual_cnt);
4560
4561         totsz = actual_cnt * size;
4562
4563         if (totsz != ha->exchoffld_size) {
4564                 qla2x00_free_exchoffld_buffer(ha);
4565                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4566                         ha->exchoffld_size = 0;
4567                         ha->flags.exchoffld_enabled = 0;
4568                         return QLA_SUCCESS;
4569                 }
4570
4571                 ha->exchoffld_size = totsz;
4572
4573                 ql_log(ql_log_info, vha, 0xd016,
4574                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4575                     max_cnt, actual_cnt, size, totsz);
4576
4577                 ql_log(ql_log_info, vha, 0xd017,
4578                     "Exchange Buffers requested size = 0x%x\n",
4579                     ha->exchoffld_size);
4580
4581                 /* Get consistent memory for extended logins */
4582                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4583                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4584                 if (!ha->exchoffld_buf) {
4585                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4586                         "Failed to allocate memory for Exchange Offload.\n");
4587
4588                         if (ha->max_exchg >
4589                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4590                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4591                         } else if (ha->max_exchg >
4592                             (FW_DEF_EXCHANGES_CNT + 512)) {
4593                                 ha->max_exchg -= 512;
4594                         } else {
4595                                 ha->flags.exchoffld_enabled = 0;
4596                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4597                                     "Disabling Exchange offload due to lack of memory\n");
4598                         }
4599                         ha->exchoffld_size = 0;
4600
4601                         return -ENOMEM;
4602                 }
4603         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4604                 /* pathological case */
4605                 qla2x00_free_exchoffld_buffer(ha);
4606                 ha->exchoffld_size = 0;
4607                 ha->flags.exchoffld_enabled = 0;
4608                 ql_log(ql_log_info, vha, 0xd016,
4609                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4610                     ha->exchoffld_size, actual_cnt, size, totsz);
4611                 return 0;
4612         }
4613
4614         /* Now configure the dma buffer */
4615         rval = qla_set_exchoffld_mem_cfg(vha);
4616         if (rval) {
4617                 ql_log(ql_log_fatal, vha, 0xd02e,
4618                     "Setup exchange offload buffer ****FAILED****.\n");
4619                 qla2x00_free_exchoffld_buffer(ha);
4620         } else {
4621                 /* re-adjust number of target exchange */
4622                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4623
4624                 if (qla_ini_mode_enabled(vha))
4625                         icb->exchange_count = 0;
4626                 else
4627                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4628         }
4629
4630         return rval;
4631 }
4632
4633 /*
4634 * qla2x00_free_exchoffld_buffer
4635 *
4636 * Input:
4637 *       ha = adapter block pointer
4638 */
4639 void
4640 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4641 {
4642         if (ha->exchoffld_buf) {
4643                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4644                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4645                 ha->exchoffld_buf = NULL;
4646                 ha->exchoffld_size = 0;
4647         }
4648 }
4649
4650 /*
4651 * qla2x00_free_fw_dump
4652 *       Frees fw dump stuff.
4653 *
4654 * Input:
4655 *       ha = adapter block pointer
4656 */
4657 static void
4658 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4659 {
4660         struct fwdt *fwdt = ha->fwdt;
4661         uint j;
4662
4663         if (ha->fce)
4664                 dma_free_coherent(&ha->pdev->dev,
4665                     FCE_SIZE, ha->fce, ha->fce_dma);
4666
4667         if (ha->eft)
4668                 dma_free_coherent(&ha->pdev->dev,
4669                     EFT_SIZE, ha->eft, ha->eft_dma);
4670
4671         vfree(ha->fw_dump);
4672
4673         ha->fce = NULL;
4674         ha->fce_dma = 0;
4675         ha->flags.fce_enabled = 0;
4676         ha->eft = NULL;
4677         ha->eft_dma = 0;
4678         ha->fw_dumped = false;
4679         ha->fw_dump_cap_flags = 0;
4680         ha->fw_dump_reading = 0;
4681         ha->fw_dump = NULL;
4682         ha->fw_dump_len = 0;
4683
4684         for (j = 0; j < 2; j++, fwdt++) {
4685                 vfree(fwdt->template);
4686                 fwdt->template = NULL;
4687                 fwdt->length = 0;
4688         }
4689 }
4690
4691 /*
4692 * qla2x00_mem_free
4693 *      Frees all adapter allocated memory.
4694 *
4695 * Input:
4696 *      ha = adapter block pointer.
4697 */
4698 static void
4699 qla2x00_mem_free(struct qla_hw_data *ha)
4700 {
4701         qla2x00_free_fw_dump(ha);
4702
4703         if (ha->mctp_dump)
4704                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4705                     ha->mctp_dump_dma);
4706         ha->mctp_dump = NULL;
4707
4708         mempool_destroy(ha->srb_mempool);
4709         ha->srb_mempool = NULL;
4710
4711         if (ha->dcbx_tlv)
4712                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4713                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4714         ha->dcbx_tlv = NULL;
4715
4716         if (ha->xgmac_data)
4717                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4718                     ha->xgmac_data, ha->xgmac_data_dma);
4719         ha->xgmac_data = NULL;
4720
4721         if (ha->sns_cmd)
4722                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4723                 ha->sns_cmd, ha->sns_cmd_dma);
4724         ha->sns_cmd = NULL;
4725         ha->sns_cmd_dma = 0;
4726
4727         if (ha->ct_sns)
4728                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4729                 ha->ct_sns, ha->ct_sns_dma);
4730         ha->ct_sns = NULL;
4731         ha->ct_sns_dma = 0;
4732
4733         if (ha->sfp_data)
4734                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4735                     ha->sfp_data_dma);
4736         ha->sfp_data = NULL;
4737
4738         if (ha->flt)
4739                 dma_free_coherent(&ha->pdev->dev,
4740                     sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE,
4741                     ha->flt, ha->flt_dma);
4742         ha->flt = NULL;
4743         ha->flt_dma = 0;
4744
4745         if (ha->ms_iocb)
4746                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4747         ha->ms_iocb = NULL;
4748         ha->ms_iocb_dma = 0;
4749
4750         if (ha->sf_init_cb)
4751                 dma_pool_free(ha->s_dma_pool,
4752                               ha->sf_init_cb, ha->sf_init_cb_dma);
4753
4754         if (ha->ex_init_cb)
4755                 dma_pool_free(ha->s_dma_pool,
4756                         ha->ex_init_cb, ha->ex_init_cb_dma);
4757         ha->ex_init_cb = NULL;
4758         ha->ex_init_cb_dma = 0;
4759
4760         if (ha->async_pd)
4761                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4762         ha->async_pd = NULL;
4763         ha->async_pd_dma = 0;
4764
4765         dma_pool_destroy(ha->s_dma_pool);
4766         ha->s_dma_pool = NULL;
4767
4768         if (ha->gid_list)
4769                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4770                 ha->gid_list, ha->gid_list_dma);
4771         ha->gid_list = NULL;
4772         ha->gid_list_dma = 0;
4773
4774         if (IS_QLA82XX(ha)) {
4775                 if (!list_empty(&ha->gbl_dsd_list)) {
4776                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4777
4778                         /* clean up allocated prev pool */
4779                         list_for_each_entry_safe(dsd_ptr,
4780                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4781                                 dma_pool_free(ha->dl_dma_pool,
4782                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4783                                 list_del(&dsd_ptr->list);
4784                                 kfree(dsd_ptr);
4785                         }
4786                 }
4787         }
4788
4789         dma_pool_destroy(ha->dl_dma_pool);
4790         ha->dl_dma_pool = NULL;
4791
4792         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4793         ha->fcp_cmnd_dma_pool = NULL;
4794
4795         mempool_destroy(ha->ctx_mempool);
4796         ha->ctx_mempool = NULL;
4797
4798         if (ql2xenabledif && ha->dif_bundl_pool) {
4799                 struct dsd_dma *dsd, *nxt;
4800
4801                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4802                                          list) {
4803                         list_del(&dsd->list);
4804                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4805                                       dsd->dsd_list_dma);
4806                         ha->dif_bundle_dma_allocs--;
4807                         kfree(dsd);
4808                         ha->dif_bundle_kallocs--;
4809                         ha->pool.unusable.count--;
4810                 }
4811                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4812                         list_del(&dsd->list);
4813                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4814                                       dsd->dsd_list_dma);
4815                         ha->dif_bundle_dma_allocs--;
4816                         kfree(dsd);
4817                         ha->dif_bundle_kallocs--;
4818                 }
4819         }
4820
4821         dma_pool_destroy(ha->dif_bundl_pool);
4822         ha->dif_bundl_pool = NULL;
4823
4824         qlt_mem_free(ha);
4825         qla_remove_hostmap(ha);
4826
4827         if (ha->init_cb)
4828                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4829                         ha->init_cb, ha->init_cb_dma);
4830
4831         dma_pool_destroy(ha->purex_dma_pool);
4832         ha->purex_dma_pool = NULL;
4833
4834         if (ha->elsrej.c) {
4835                 dma_free_coherent(&ha->pdev->dev, ha->elsrej.size,
4836                     ha->elsrej.c, ha->elsrej.cdma);
4837                 ha->elsrej.c = NULL;
4838         }
4839
4840         ha->init_cb = NULL;
4841         ha->init_cb_dma = 0;
4842
4843         vfree(ha->optrom_buffer);
4844         ha->optrom_buffer = NULL;
4845         kfree(ha->nvram);
4846         ha->nvram = NULL;
4847         kfree(ha->npiv_info);
4848         ha->npiv_info = NULL;
4849         kfree(ha->swl);
4850         ha->swl = NULL;
4851         kfree(ha->loop_id_map);
4852         ha->sf_init_cb = NULL;
4853         ha->sf_init_cb_dma = 0;
4854         ha->loop_id_map = NULL;
4855 }
4856
4857 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4858                                                 struct qla_hw_data *ha)
4859 {
4860         struct Scsi_Host *host;
4861         struct scsi_qla_host *vha = NULL;
4862
4863         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4864         if (!host) {
4865                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4866                     "Failed to allocate host from the scsi layer, aborting.\n");
4867                 return NULL;
4868         }
4869
4870         /* Clear our data area */
4871         vha = shost_priv(host);
4872         memset(vha, 0, sizeof(scsi_qla_host_t));
4873
4874         vha->host = host;
4875         vha->host_no = host->host_no;
4876         vha->hw = ha;
4877
4878         vha->qlini_mode = ql2x_ini_mode;
4879         vha->ql2xexchoffld = ql2xexchoffld;
4880         vha->ql2xiniexchg = ql2xiniexchg;
4881
4882         INIT_LIST_HEAD(&vha->vp_fcports);
4883         INIT_LIST_HEAD(&vha->work_list);
4884         INIT_LIST_HEAD(&vha->list);
4885         INIT_LIST_HEAD(&vha->qla_cmd_list);
4886         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4887         INIT_LIST_HEAD(&vha->logo_list);
4888         INIT_LIST_HEAD(&vha->plogi_ack_list);
4889         INIT_LIST_HEAD(&vha->qp_list);
4890         INIT_LIST_HEAD(&vha->gnl.fcports);
4891         INIT_LIST_HEAD(&vha->gpnid_list);
4892         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4893
4894         INIT_LIST_HEAD(&vha->purex_list.head);
4895         spin_lock_init(&vha->purex_list.lock);
4896
4897         spin_lock_init(&vha->work_lock);
4898         spin_lock_init(&vha->cmd_list_lock);
4899         init_waitqueue_head(&vha->fcport_waitQ);
4900         init_waitqueue_head(&vha->vref_waitq);
4901         qla_enode_init(vha);
4902
4903         vha->gnl.size = sizeof(struct get_name_list_extended) *
4904                         (ha->max_loop_id + 1);
4905         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4906             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4907         if (!vha->gnl.l) {
4908                 ql_log(ql_log_fatal, vha, 0xd04a,
4909                     "Alloc failed for name list.\n");
4910                 scsi_host_put(vha->host);
4911                 return NULL;
4912         }
4913
4914         /* todo: what about ext login? */
4915         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4916         vha->scan.l = vmalloc(vha->scan.size);
4917         if (!vha->scan.l) {
4918                 ql_log(ql_log_fatal, vha, 0xd04a,
4919                     "Alloc failed for scan database.\n");
4920                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4921                     vha->gnl.l, vha->gnl.ldma);
4922                 vha->gnl.l = NULL;
4923                 scsi_host_put(vha->host);
4924                 return NULL;
4925         }
4926         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4927
4928         sprintf(vha->host_str, "%s_%lu", QLA2XXX_DRIVER_NAME, vha->host_no);
4929         ql_dbg(ql_dbg_init, vha, 0x0041,
4930             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4931             vha->host, vha->hw, vha,
4932             dev_name(&(ha->pdev->dev)));
4933
4934         return vha;
4935 }
4936
4937 struct qla_work_evt *
4938 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4939 {
4940         struct qla_work_evt *e;
4941         uint8_t bail;
4942
4943         if (test_bit(UNLOADING, &vha->dpc_flags))
4944                 return NULL;
4945
4946         QLA_VHA_MARK_BUSY(vha, bail);
4947         if (bail)
4948                 return NULL;
4949
4950         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4951         if (!e) {
4952                 QLA_VHA_MARK_NOT_BUSY(vha);
4953                 return NULL;
4954         }
4955
4956         INIT_LIST_HEAD(&e->list);
4957         e->type = type;
4958         e->flags = QLA_EVT_FLAG_FREE;
4959         return e;
4960 }
4961
4962 int
4963 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4964 {
4965         unsigned long flags;
4966         bool q = false;
4967
4968         spin_lock_irqsave(&vha->work_lock, flags);
4969         list_add_tail(&e->list, &vha->work_list);
4970
4971         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4972                 q = true;
4973
4974         spin_unlock_irqrestore(&vha->work_lock, flags);
4975
4976         if (q)
4977                 queue_work(vha->hw->wq, &vha->iocb_work);
4978
4979         return QLA_SUCCESS;
4980 }
4981
4982 int
4983 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4984     u32 data)
4985 {
4986         struct qla_work_evt *e;
4987
4988         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4989         if (!e)
4990                 return QLA_FUNCTION_FAILED;
4991
4992         e->u.aen.code = code;
4993         e->u.aen.data = data;
4994         return qla2x00_post_work(vha, e);
4995 }
4996
4997 int
4998 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4999 {
5000         struct qla_work_evt *e;
5001
5002         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
5003         if (!e)
5004                 return QLA_FUNCTION_FAILED;
5005
5006         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
5007         return qla2x00_post_work(vha, e);
5008 }
5009
5010 #define qla2x00_post_async_work(name, type)     \
5011 int qla2x00_post_async_##name##_work(           \
5012     struct scsi_qla_host *vha,                  \
5013     fc_port_t *fcport, uint16_t *data)          \
5014 {                                               \
5015         struct qla_work_evt *e;                 \
5016                                                 \
5017         e = qla2x00_alloc_work(vha, type);      \
5018         if (!e)                                 \
5019                 return QLA_FUNCTION_FAILED;     \
5020                                                 \
5021         e->u.logio.fcport = fcport;             \
5022         if (data) {                             \
5023                 e->u.logio.data[0] = data[0];   \
5024                 e->u.logio.data[1] = data[1];   \
5025         }                                       \
5026         fcport->flags |= FCF_ASYNC_ACTIVE;      \
5027         return qla2x00_post_work(vha, e);       \
5028 }
5029
5030 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
5031 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
5032 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
5033 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
5034 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
5035
5036 int
5037 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
5038 {
5039         struct qla_work_evt *e;
5040
5041         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
5042         if (!e)
5043                 return QLA_FUNCTION_FAILED;
5044
5045         e->u.uevent.code = code;
5046         return qla2x00_post_work(vha, e);
5047 }
5048
5049 static void
5050 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
5051 {
5052         char event_string[40];
5053         char *envp[] = { event_string, NULL };
5054
5055         switch (code) {
5056         case QLA_UEVENT_CODE_FW_DUMP:
5057                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%lu",
5058                     vha->host_no);
5059                 break;
5060         default:
5061                 /* do nothing */
5062                 break;
5063         }
5064         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
5065 }
5066
5067 int
5068 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
5069                         uint32_t *data, int cnt)
5070 {
5071         struct qla_work_evt *e;
5072
5073         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
5074         if (!e)
5075                 return QLA_FUNCTION_FAILED;
5076
5077         e->u.aenfx.evtcode = evtcode;
5078         e->u.aenfx.count = cnt;
5079         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
5080         return qla2x00_post_work(vha, e);
5081 }
5082
5083 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
5084 {
5085         unsigned long flags;
5086
5087         if (IS_SW_RESV_ADDR(fcport->d_id))
5088                 return;
5089
5090         spin_lock_irqsave(&fcport->vha->work_lock, flags);
5091         if (fcport->disc_state == DSC_UPD_FCPORT) {
5092                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5093                 return;
5094         }
5095         fcport->jiffies_at_registration = jiffies;
5096         fcport->sec_since_registration = 0;
5097         fcport->next_disc_state = DSC_DELETED;
5098         qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5099         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5100
5101         queue_work(system_unbound_wq, &fcport->reg_work);
5102 }
5103
5104 static
5105 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5106 {
5107         unsigned long flags;
5108         fc_port_t *fcport =  NULL, *tfcp;
5109         struct qlt_plogi_ack_t *pla =
5110             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5111         uint8_t free_fcport = 0;
5112
5113         ql_dbg(ql_dbg_disc, vha, 0xffff,
5114             "%s %d %8phC enter\n",
5115             __func__, __LINE__, e->u.new_sess.port_name);
5116
5117         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5118         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5119         if (fcport) {
5120                 fcport->d_id = e->u.new_sess.id;
5121                 if (pla) {
5122                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5123                         memcpy(fcport->node_name,
5124                             pla->iocb.u.isp24.u.plogi.node_name,
5125                             WWN_SIZE);
5126                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5127                         /* we took an extra ref_count to prevent PLOGI ACK when
5128                          * fcport/sess has not been created.
5129                          */
5130                         pla->ref_count--;
5131                 }
5132         } else {
5133                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5134                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5135                 if (fcport) {
5136                         fcport->d_id = e->u.new_sess.id;
5137                         fcport->flags |= FCF_FABRIC_DEVICE;
5138                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5139                         fcport->tgt_short_link_down_cnt = 0;
5140
5141                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5142                             WWN_SIZE);
5143
5144                         fcport->fc4_type = e->u.new_sess.fc4_type;
5145                         if (e->u.new_sess.fc4_type & FS_FCP_IS_N2N) {
5146                                 fcport->dm_login_expire = jiffies +
5147                                         QLA_N2N_WAIT_TIME * HZ;
5148                                 fcport->fc4_type = FS_FC4TYPE_FCP;
5149                                 fcport->n2n_flag = 1;
5150                                 if (vha->flags.nvme_enabled)
5151                                         fcport->fc4_type |= FS_FC4TYPE_NVME;
5152                         }
5153
5154                 } else {
5155                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5156                                    "%s %8phC mem alloc fail.\n",
5157                                    __func__, e->u.new_sess.port_name);
5158
5159                         if (pla) {
5160                                 list_del(&pla->list);
5161                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5162                         }
5163                         return;
5164                 }
5165
5166                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5167                 /* search again to make sure no one else got ahead */
5168                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5169                     e->u.new_sess.port_name, 1);
5170                 if (tfcp) {
5171                         /* should rarily happen */
5172                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5173                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5174                             __func__, tfcp->port_name, tfcp->disc_state,
5175                             tfcp->fw_login_state);
5176
5177                         free_fcport = 1;
5178                 } else {
5179                         list_add_tail(&fcport->list, &vha->vp_fcports);
5180
5181                 }
5182                 if (pla) {
5183                         qlt_plogi_ack_link(vha, pla, fcport,
5184                             QLT_PLOGI_LINK_SAME_WWN);
5185                         pla->ref_count--;
5186                 }
5187         }
5188         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5189
5190         if (fcport) {
5191                 fcport->id_changed = 1;
5192                 fcport->scan_state = QLA_FCPORT_FOUND;
5193                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5194                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5195
5196                 if (pla) {
5197                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5198                                 u16 wd3_lo;
5199
5200                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5201                                 fcport->local = 0;
5202                                 fcport->loop_id =
5203                                         le16_to_cpu(
5204                                             pla->iocb.u.isp24.nport_handle);
5205                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5206                                 wd3_lo =
5207                                     le16_to_cpu(
5208                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5209
5210                                 if (wd3_lo & BIT_7)
5211                                         fcport->conf_compl_supported = 1;
5212
5213                                 if ((wd3_lo & BIT_4) == 0)
5214                                         fcport->port_type = FCT_INITIATOR;
5215                                 else
5216                                         fcport->port_type = FCT_TARGET;
5217                         }
5218                         qlt_plogi_ack_unref(vha, pla);
5219                 } else {
5220                         fc_port_t *dfcp = NULL;
5221
5222                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5223                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5224                             &e->u.new_sess.id, 1);
5225                         if (tfcp && (tfcp != fcport)) {
5226                                 /*
5227                                  * We have a conflict fcport with same NportID.
5228                                  */
5229                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5230                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5231                                     __func__, tfcp->port_name, tfcp->disc_state,
5232                                     tfcp->fw_login_state);
5233
5234                                 switch (tfcp->disc_state) {
5235                                 case DSC_DELETED:
5236                                         break;
5237                                 case DSC_DELETE_PEND:
5238                                         fcport->login_pause = 1;
5239                                         tfcp->conflict = fcport;
5240                                         break;
5241                                 default:
5242                                         fcport->login_pause = 1;
5243                                         tfcp->conflict = fcport;
5244                                         dfcp = tfcp;
5245                                         break;
5246                                 }
5247                         }
5248                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5249                         if (dfcp)
5250                                 qlt_schedule_sess_for_deletion(tfcp);
5251
5252                         if (N2N_TOPO(vha->hw)) {
5253                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5254                                 fcport->keep_nport_handle = 1;
5255                                 if (vha->flags.nvme_enabled) {
5256                                         fcport->fc4_type =
5257                                             (FS_FC4TYPE_NVME | FS_FC4TYPE_FCP);
5258                                         fcport->n2n_flag = 1;
5259                                 }
5260                                 fcport->fw_login_state = 0;
5261
5262                                 schedule_delayed_work(&vha->scan.scan_work, 5);
5263                         } else {
5264                                 qla24xx_fcport_handle_login(vha, fcport);
5265                         }
5266                 }
5267         }
5268
5269         if (free_fcport) {
5270                 qla2x00_free_fcport(fcport);
5271                 if (pla) {
5272                         list_del(&pla->list);
5273                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5274                 }
5275         }
5276 }
5277
5278 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5279 {
5280         struct srb *sp = e->u.iosb.sp;
5281         int rval;
5282
5283         rval = qla2x00_start_sp(sp);
5284         if (rval != QLA_SUCCESS) {
5285                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5286                     "%s: %s: Re-issue IOCB failed (%d).\n",
5287                     __func__, sp->name, rval);
5288                 qla24xx_sp_unmap(vha, sp);
5289         }
5290 }
5291
5292 void
5293 qla2x00_do_work(struct scsi_qla_host *vha)
5294 {
5295         struct qla_work_evt *e, *tmp;
5296         unsigned long flags;
5297         LIST_HEAD(work);
5298         int rc;
5299
5300         spin_lock_irqsave(&vha->work_lock, flags);
5301         list_splice_init(&vha->work_list, &work);
5302         spin_unlock_irqrestore(&vha->work_lock, flags);
5303
5304         list_for_each_entry_safe(e, tmp, &work, list) {
5305                 rc = QLA_SUCCESS;
5306                 switch (e->type) {
5307                 case QLA_EVT_AEN:
5308                         fc_host_post_event(vha->host, fc_get_event_number(),
5309                             e->u.aen.code, e->u.aen.data);
5310                         break;
5311                 case QLA_EVT_IDC_ACK:
5312                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5313                         break;
5314                 case QLA_EVT_ASYNC_LOGIN:
5315                         qla2x00_async_login(vha, e->u.logio.fcport,
5316                             e->u.logio.data);
5317                         break;
5318                 case QLA_EVT_ASYNC_LOGOUT:
5319                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5320                         break;
5321                 case QLA_EVT_ASYNC_ADISC:
5322                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5323                             e->u.logio.data);
5324                         break;
5325                 case QLA_EVT_UEVENT:
5326                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5327                         break;
5328                 case QLA_EVT_AENFX:
5329                         qlafx00_process_aen(vha, e);
5330                         break;
5331                 case QLA_EVT_GPNID:
5332                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5333                         break;
5334                 case QLA_EVT_UNMAP:
5335                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5336                         break;
5337                 case QLA_EVT_RELOGIN:
5338                         qla2x00_relogin(vha);
5339                         break;
5340                 case QLA_EVT_NEW_SESS:
5341                         qla24xx_create_new_sess(vha, e);
5342                         break;
5343                 case QLA_EVT_GPDB:
5344                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5345                             e->u.fcport.opt);
5346                         break;
5347                 case QLA_EVT_PRLI:
5348                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5349                         break;
5350                 case QLA_EVT_GPSC:
5351                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5352                         break;
5353                 case QLA_EVT_GNL:
5354                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5355                         break;
5356                 case QLA_EVT_NACK:
5357                         qla24xx_do_nack_work(vha, e);
5358                         break;
5359                 case QLA_EVT_ASYNC_PRLO:
5360                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5361                         break;
5362                 case QLA_EVT_ASYNC_PRLO_DONE:
5363                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5364                             e->u.logio.data);
5365                         break;
5366                 case QLA_EVT_GPNFT:
5367                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5368                             e->u.gpnft.sp);
5369                         break;
5370                 case QLA_EVT_GPNFT_DONE:
5371                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5372                         break;
5373                 case QLA_EVT_GNNFT_DONE:
5374                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5375                         break;
5376                 case QLA_EVT_GNNID:
5377                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5378                         break;
5379                 case QLA_EVT_GFPNID:
5380                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5381                         break;
5382                 case QLA_EVT_SP_RETRY:
5383                         qla_sp_retry(vha, e);
5384                         break;
5385                 case QLA_EVT_IIDMA:
5386                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5387                         break;
5388                 case QLA_EVT_ELS_PLOGI:
5389                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5390                             e->u.fcport.fcport, false);
5391                         break;
5392                 case QLA_EVT_SA_REPLACE:
5393                         qla24xx_issue_sa_replace_iocb(vha, e);
5394                         break;
5395                 }
5396
5397                 if (rc == EAGAIN) {
5398                         /* put 'work' at head of 'vha->work_list' */
5399                         spin_lock_irqsave(&vha->work_lock, flags);
5400                         list_splice(&work, &vha->work_list);
5401                         spin_unlock_irqrestore(&vha->work_lock, flags);
5402                         break;
5403                 }
5404                 list_del_init(&e->list);
5405                 if (e->flags & QLA_EVT_FLAG_FREE)
5406                         kfree(e);
5407
5408                 /* For each work completed decrement vha ref count */
5409                 QLA_VHA_MARK_NOT_BUSY(vha);
5410         }
5411 }
5412
5413 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5414 {
5415         struct qla_work_evt *e;
5416
5417         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5418
5419         if (!e) {
5420                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5421                 return QLA_FUNCTION_FAILED;
5422         }
5423
5424         return qla2x00_post_work(vha, e);
5425 }
5426
5427 /* Relogins all the fcports of a vport
5428  * Context: dpc thread
5429  */
5430 void qla2x00_relogin(struct scsi_qla_host *vha)
5431 {
5432         fc_port_t       *fcport;
5433         int status, relogin_needed = 0;
5434         struct event_arg ea;
5435
5436         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5437                 /*
5438                  * If the port is not ONLINE then try to login
5439                  * to it if we haven't run out of retries.
5440                  */
5441                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5442                     fcport->login_retry) {
5443                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5444                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5445                                 continue;
5446
5447                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5448                                 fcport->disc_state == DSC_DELETE_PEND) {
5449                                 relogin_needed = 1;
5450                         } else {
5451                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5452                                         memset(&ea, 0, sizeof(ea));
5453                                         ea.fcport = fcport;
5454                                         qla24xx_handle_relogin_event(vha, &ea);
5455                                 } else if (vha->hw->current_topology ==
5456                                     ISP_CFG_NL) {
5457                                         fcport->login_retry--;
5458                                         status =
5459                                             qla2x00_local_device_login(vha,
5460                                                 fcport);
5461                                         if (status == QLA_SUCCESS) {
5462                                                 fcport->old_loop_id =
5463                                                     fcport->loop_id;
5464                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5465                                                     "Port login OK: logged in ID 0x%x.\n",
5466                                                     fcport->loop_id);
5467                                                 qla2x00_update_fcport
5468                                                         (vha, fcport);
5469                                         } else if (status == 1) {
5470                                                 set_bit(RELOGIN_NEEDED,
5471                                                     &vha->dpc_flags);
5472                                                 /* retry the login again */
5473                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5474                                                     "Retrying %d login again loop_id 0x%x.\n",
5475                                                     fcport->login_retry,
5476                                                     fcport->loop_id);
5477                                         } else {
5478                                                 fcport->login_retry = 0;
5479                                         }
5480
5481                                         if (fcport->login_retry == 0 &&
5482                                             status != QLA_SUCCESS)
5483                                                 qla2x00_clear_loop_id(fcport);
5484                                 }
5485                         }
5486                 }
5487                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5488                         break;
5489         }
5490
5491         if (relogin_needed)
5492                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5493
5494         ql_dbg(ql_dbg_disc, vha, 0x400e,
5495             "Relogin end.\n");
5496 }
5497
5498 /* Schedule work on any of the dpc-workqueues */
5499 void
5500 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5501 {
5502         struct qla_hw_data *ha = base_vha->hw;
5503
5504         switch (work_code) {
5505         case MBA_IDC_AEN: /* 0x8200 */
5506                 if (ha->dpc_lp_wq)
5507                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5508                 break;
5509
5510         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5511                 if (!ha->flags.nic_core_reset_hdlr_active) {
5512                         if (ha->dpc_hp_wq)
5513                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5514                 } else
5515                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5516                             "NIC Core reset is already active. Skip "
5517                             "scheduling it again.\n");
5518                 break;
5519         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5520                 if (ha->dpc_hp_wq)
5521                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5522                 break;
5523         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5524                 if (ha->dpc_hp_wq)
5525                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5526                 break;
5527         default:
5528                 ql_log(ql_log_warn, base_vha, 0xb05f,
5529                     "Unknown work-code=0x%x.\n", work_code);
5530         }
5531
5532         return;
5533 }
5534
5535 /* Work: Perform NIC Core Unrecoverable state handling */
5536 void
5537 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5538 {
5539         struct qla_hw_data *ha =
5540                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5541         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5542         uint32_t dev_state = 0;
5543
5544         qla83xx_idc_lock(base_vha, 0);
5545         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5546         qla83xx_reset_ownership(base_vha);
5547         if (ha->flags.nic_core_reset_owner) {
5548                 ha->flags.nic_core_reset_owner = 0;
5549                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5550                     QLA8XXX_DEV_FAILED);
5551                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5552                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5553         }
5554         qla83xx_idc_unlock(base_vha, 0);
5555 }
5556
5557 /* Work: Execute IDC state handler */
5558 void
5559 qla83xx_idc_state_handler_work(struct work_struct *work)
5560 {
5561         struct qla_hw_data *ha =
5562                 container_of(work, struct qla_hw_data, idc_state_handler);
5563         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5564         uint32_t dev_state = 0;
5565
5566         qla83xx_idc_lock(base_vha, 0);
5567         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5568         if (dev_state == QLA8XXX_DEV_FAILED ||
5569                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5570                 qla83xx_idc_state_handler(base_vha);
5571         qla83xx_idc_unlock(base_vha, 0);
5572 }
5573
5574 static int
5575 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5576 {
5577         int rval = QLA_SUCCESS;
5578         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5579         uint32_t heart_beat_counter1, heart_beat_counter2;
5580
5581         do {
5582                 if (time_after(jiffies, heart_beat_wait)) {
5583                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5584                             "Nic Core f/w is not alive.\n");
5585                         rval = QLA_FUNCTION_FAILED;
5586                         break;
5587                 }
5588
5589                 qla83xx_idc_lock(base_vha, 0);
5590                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5591                     &heart_beat_counter1);
5592                 qla83xx_idc_unlock(base_vha, 0);
5593                 msleep(100);
5594                 qla83xx_idc_lock(base_vha, 0);
5595                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5596                     &heart_beat_counter2);
5597                 qla83xx_idc_unlock(base_vha, 0);
5598         } while (heart_beat_counter1 == heart_beat_counter2);
5599
5600         return rval;
5601 }
5602
5603 /* Work: Perform NIC Core Reset handling */
5604 void
5605 qla83xx_nic_core_reset_work(struct work_struct *work)
5606 {
5607         struct qla_hw_data *ha =
5608                 container_of(work, struct qla_hw_data, nic_core_reset);
5609         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5610         uint32_t dev_state = 0;
5611
5612         if (IS_QLA2031(ha)) {
5613                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5614                         ql_log(ql_log_warn, base_vha, 0xb081,
5615                             "Failed to dump mctp\n");
5616                 return;
5617         }
5618
5619         if (!ha->flags.nic_core_reset_hdlr_active) {
5620                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5621                         qla83xx_idc_lock(base_vha, 0);
5622                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5623                             &dev_state);
5624                         qla83xx_idc_unlock(base_vha, 0);
5625                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5626                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5627                                     "Nic Core f/w is alive.\n");
5628                                 return;
5629                         }
5630                 }
5631
5632                 ha->flags.nic_core_reset_hdlr_active = 1;
5633                 if (qla83xx_nic_core_reset(base_vha)) {
5634                         /* NIC Core reset failed. */
5635                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5636                             "NIC Core reset failed.\n");
5637                 }
5638                 ha->flags.nic_core_reset_hdlr_active = 0;
5639         }
5640 }
5641
5642 /* Work: Handle 8200 IDC aens */
5643 void
5644 qla83xx_service_idc_aen(struct work_struct *work)
5645 {
5646         struct qla_hw_data *ha =
5647                 container_of(work, struct qla_hw_data, idc_aen);
5648         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5649         uint32_t dev_state, idc_control;
5650
5651         qla83xx_idc_lock(base_vha, 0);
5652         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5653         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5654         qla83xx_idc_unlock(base_vha, 0);
5655         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5656                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5657                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5658                             "Application requested NIC Core Reset.\n");
5659                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5660                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5661                     QLA_SUCCESS) {
5662                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5663                             "Other protocol driver requested NIC Core Reset.\n");
5664                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5665                 }
5666         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5667                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5668                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5669         }
5670 }
5671
5672 /*
5673  * Control the frequency of IDC lock retries
5674  */
5675 #define QLA83XX_WAIT_LOGIC_MS   100
5676
5677 static int
5678 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5679 {
5680         int rval;
5681         uint32_t data;
5682         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5683         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5684         struct qla_hw_data *ha = base_vha->hw;
5685
5686         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5687             "Trying force recovery of the IDC lock.\n");
5688
5689         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5690         if (rval)
5691                 return rval;
5692
5693         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5694                 return QLA_SUCCESS;
5695         } else {
5696                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5697                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5698                     data);
5699                 if (rval)
5700                         return rval;
5701
5702                 msleep(200);
5703
5704                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5705                     &data);
5706                 if (rval)
5707                         return rval;
5708
5709                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5710                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5711                                         ~(idc_lck_rcvry_stage_mask));
5712                         rval = qla83xx_wr_reg(base_vha,
5713                             QLA83XX_IDC_LOCK_RECOVERY, data);
5714                         if (rval)
5715                                 return rval;
5716
5717                         /* Forcefully perform IDC UnLock */
5718                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5719                             &data);
5720                         if (rval)
5721                                 return rval;
5722                         /* Clear lock-id by setting 0xff */
5723                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5724                             0xff);
5725                         if (rval)
5726                                 return rval;
5727                         /* Clear lock-recovery by setting 0x0 */
5728                         rval = qla83xx_wr_reg(base_vha,
5729                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5730                         if (rval)
5731                                 return rval;
5732                 } else
5733                         return QLA_SUCCESS;
5734         }
5735
5736         return rval;
5737 }
5738
5739 static int
5740 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5741 {
5742         int rval = QLA_SUCCESS;
5743         uint32_t o_drv_lockid, n_drv_lockid;
5744         unsigned long lock_recovery_timeout;
5745
5746         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5747 retry_lockid:
5748         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5749         if (rval)
5750                 goto exit;
5751
5752         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5753         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5754                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5755                         return QLA_SUCCESS;
5756                 else
5757                         return QLA_FUNCTION_FAILED;
5758         }
5759
5760         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5761         if (rval)
5762                 goto exit;
5763
5764         if (o_drv_lockid == n_drv_lockid) {
5765                 msleep(QLA83XX_WAIT_LOGIC_MS);
5766                 goto retry_lockid;
5767         } else
5768                 return QLA_SUCCESS;
5769
5770 exit:
5771         return rval;
5772 }
5773
5774 /*
5775  * Context: task, can sleep
5776  */
5777 void
5778 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5779 {
5780         uint32_t data;
5781         uint32_t lock_owner;
5782         struct qla_hw_data *ha = base_vha->hw;
5783
5784         might_sleep();
5785
5786         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5787 retry_lock:
5788         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5789             == QLA_SUCCESS) {
5790                 if (data) {
5791                         /* Setting lock-id to our function-number */
5792                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5793                             ha->portnum);
5794                 } else {
5795                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5796                             &lock_owner);
5797                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5798                             "Failed to acquire IDC lock, acquired by %d, "
5799                             "retrying...\n", lock_owner);
5800
5801                         /* Retry/Perform IDC-Lock recovery */
5802                         if (qla83xx_idc_lock_recovery(base_vha)
5803                             == QLA_SUCCESS) {
5804                                 msleep(QLA83XX_WAIT_LOGIC_MS);
5805                                 goto retry_lock;
5806                         } else
5807                                 ql_log(ql_log_warn, base_vha, 0xb075,
5808                                     "IDC Lock recovery FAILED.\n");
5809                 }
5810
5811         }
5812
5813         return;
5814 }
5815
5816 static bool
5817 qla25xx_rdp_rsp_reduce_size(struct scsi_qla_host *vha,
5818         struct purex_entry_24xx *purex)
5819 {
5820         char fwstr[16];
5821         u32 sid = purex->s_id[2] << 16 | purex->s_id[1] << 8 | purex->s_id[0];
5822         struct port_database_24xx *pdb;
5823
5824         /* Domain Controller is always logged-out. */
5825         /* if RDP request is not from Domain Controller: */
5826         if (sid != 0xfffc01)
5827                 return false;
5828
5829         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: s_id=%#x\n", __func__, sid);
5830
5831         pdb = kzalloc(sizeof(*pdb), GFP_KERNEL);
5832         if (!pdb) {
5833                 ql_dbg(ql_dbg_init, vha, 0x0181,
5834                     "%s: Failed allocate pdb\n", __func__);
5835         } else if (qla24xx_get_port_database(vha,
5836                                 le16_to_cpu(purex->nport_handle), pdb)) {
5837                 ql_dbg(ql_dbg_init, vha, 0x0181,
5838                     "%s: Failed get pdb sid=%x\n", __func__, sid);
5839         } else if (pdb->current_login_state != PDS_PLOGI_COMPLETE &&
5840             pdb->current_login_state != PDS_PRLI_COMPLETE) {
5841                 ql_dbg(ql_dbg_init, vha, 0x0181,
5842                     "%s: Port not logged in sid=%#x\n", __func__, sid);
5843         } else {
5844                 /* RDP request is from logged in port */
5845                 kfree(pdb);
5846                 return false;
5847         }
5848         kfree(pdb);
5849
5850         vha->hw->isp_ops->fw_version_str(vha, fwstr, sizeof(fwstr));
5851         fwstr[strcspn(fwstr, " ")] = 0;
5852         /* if FW version allows RDP response length upto 2048 bytes: */
5853         if (strcmp(fwstr, "8.09.00") > 0 || strcmp(fwstr, "8.05.65") == 0)
5854                 return false;
5855
5856         ql_dbg(ql_dbg_init, vha, 0x0181, "%s: fw=%s\n", __func__, fwstr);
5857
5858         /* RDP response length is to be reduced to maximum 256 bytes */
5859         return true;
5860 }
5861
5862 /*
5863  * Function Name: qla24xx_process_purex_iocb
5864  *
5865  * Description:
5866  * Prepare a RDP response and send to Fabric switch
5867  *
5868  * PARAMETERS:
5869  * vha: SCSI qla host
5870  * purex: RDP request received by HBA
5871  */
5872 void qla24xx_process_purex_rdp(struct scsi_qla_host *vha,
5873                                struct purex_item *item)
5874 {
5875         struct qla_hw_data *ha = vha->hw;
5876         struct purex_entry_24xx *purex =
5877             (struct purex_entry_24xx *)&item->iocb;
5878         dma_addr_t rsp_els_dma;
5879         dma_addr_t rsp_payload_dma;
5880         dma_addr_t stat_dma;
5881         dma_addr_t sfp_dma;
5882         struct els_entry_24xx *rsp_els = NULL;
5883         struct rdp_rsp_payload *rsp_payload = NULL;
5884         struct link_statistics *stat = NULL;
5885         uint8_t *sfp = NULL;
5886         uint16_t sfp_flags = 0;
5887         uint rsp_payload_length = sizeof(*rsp_payload);
5888         int rval;
5889
5890         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0180,
5891             "%s: Enter\n", __func__);
5892
5893         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0181,
5894             "-------- ELS REQ -------\n");
5895         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0182,
5896             purex, sizeof(*purex));
5897
5898         if (qla25xx_rdp_rsp_reduce_size(vha, purex)) {
5899                 rsp_payload_length =
5900                     offsetof(typeof(*rsp_payload), optical_elmt_desc);
5901                 ql_dbg(ql_dbg_init, vha, 0x0181,
5902                     "Reducing RSP payload length to %u bytes...\n",
5903                     rsp_payload_length);
5904         }
5905
5906         rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els),
5907             &rsp_els_dma, GFP_KERNEL);
5908         if (!rsp_els) {
5909                 ql_log(ql_log_warn, vha, 0x0183,
5910                     "Failed allocate dma buffer ELS RSP.\n");
5911                 goto dealloc;
5912         }
5913
5914         rsp_payload = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
5915             &rsp_payload_dma, GFP_KERNEL);
5916         if (!rsp_payload) {
5917                 ql_log(ql_log_warn, vha, 0x0184,
5918                     "Failed allocate dma buffer ELS RSP payload.\n");
5919                 goto dealloc;
5920         }
5921
5922         sfp = dma_alloc_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
5923             &sfp_dma, GFP_KERNEL);
5924
5925         stat = dma_alloc_coherent(&ha->pdev->dev, sizeof(*stat),
5926             &stat_dma, GFP_KERNEL);
5927
5928         /* Prepare Response IOCB */
5929         rsp_els->entry_type = ELS_IOCB_TYPE;
5930         rsp_els->entry_count = 1;
5931         rsp_els->sys_define = 0;
5932         rsp_els->entry_status = 0;
5933         rsp_els->handle = 0;
5934         rsp_els->nport_handle = purex->nport_handle;
5935         rsp_els->tx_dsd_count = cpu_to_le16(1);
5936         rsp_els->vp_index = purex->vp_idx;
5937         rsp_els->sof_type = EST_SOFI3;
5938         rsp_els->rx_xchg_address = purex->rx_xchg_addr;
5939         rsp_els->rx_dsd_count = 0;
5940         rsp_els->opcode = purex->els_frame_payload[0];
5941
5942         rsp_els->d_id[0] = purex->s_id[0];
5943         rsp_els->d_id[1] = purex->s_id[1];
5944         rsp_els->d_id[2] = purex->s_id[2];
5945
5946         rsp_els->control_flags = cpu_to_le16(EPD_ELS_ACC);
5947         rsp_els->rx_byte_count = 0;
5948         rsp_els->tx_byte_count = cpu_to_le32(rsp_payload_length);
5949
5950         put_unaligned_le64(rsp_payload_dma, &rsp_els->tx_address);
5951         rsp_els->tx_len = rsp_els->tx_byte_count;
5952
5953         rsp_els->rx_address = 0;
5954         rsp_els->rx_len = 0;
5955
5956         /* Prepare Response Payload */
5957         rsp_payload->hdr.cmd = cpu_to_be32(0x2 << 24); /* LS_ACC */
5958         rsp_payload->hdr.len = cpu_to_be32(le32_to_cpu(rsp_els->tx_byte_count) -
5959                                            sizeof(rsp_payload->hdr));
5960
5961         /* Link service Request Info Descriptor */
5962         rsp_payload->ls_req_info_desc.desc_tag = cpu_to_be32(0x1);
5963         rsp_payload->ls_req_info_desc.desc_len =
5964             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc));
5965         rsp_payload->ls_req_info_desc.req_payload_word_0 =
5966             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
5967
5968         /* Link service Request Info Descriptor 2 */
5969         rsp_payload->ls_req_info_desc2.desc_tag = cpu_to_be32(0x1);
5970         rsp_payload->ls_req_info_desc2.desc_len =
5971             cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_req_info_desc2));
5972         rsp_payload->ls_req_info_desc2.req_payload_word_0 =
5973             cpu_to_be32p((uint32_t *)purex->els_frame_payload);
5974
5975
5976         rsp_payload->sfp_diag_desc.desc_tag = cpu_to_be32(0x10000);
5977         rsp_payload->sfp_diag_desc.desc_len =
5978                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->sfp_diag_desc));
5979
5980         if (sfp) {
5981                 /* SFP Flags */
5982                 memset(sfp, 0, SFP_RTDI_LEN);
5983                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x7, 2, 0);
5984                 if (!rval) {
5985                         /* SFP Flags bits 3-0: Port Tx Laser Type */
5986                         if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5))
5987                                 sfp_flags |= BIT_0; /* short wave */
5988                         else if (sfp[0] & BIT_1)
5989                                 sfp_flags |= BIT_1; /* long wave 1310nm */
5990                         else if (sfp[1] & BIT_4)
5991                                 sfp_flags |= BIT_1|BIT_0; /* long wave 1550nm */
5992                 }
5993
5994                 /* SFP Type */
5995                 memset(sfp, 0, SFP_RTDI_LEN);
5996                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 0x0, 1, 0);
5997                 if (!rval) {
5998                         sfp_flags |= BIT_4; /* optical */
5999                         if (sfp[0] == 0x3)
6000                                 sfp_flags |= BIT_6; /* sfp+ */
6001                 }
6002
6003                 rsp_payload->sfp_diag_desc.sfp_flags = cpu_to_be16(sfp_flags);
6004
6005                 /* SFP Diagnostics */
6006                 memset(sfp, 0, SFP_RTDI_LEN);
6007                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0x60, 10, 0);
6008                 if (!rval) {
6009                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6010                         rsp_payload->sfp_diag_desc.temperature = trx[0];
6011                         rsp_payload->sfp_diag_desc.vcc = trx[1];
6012                         rsp_payload->sfp_diag_desc.tx_bias = trx[2];
6013                         rsp_payload->sfp_diag_desc.tx_power = trx[3];
6014                         rsp_payload->sfp_diag_desc.rx_power = trx[4];
6015                 }
6016         }
6017
6018         /* Port Speed Descriptor */
6019         rsp_payload->port_speed_desc.desc_tag = cpu_to_be32(0x10001);
6020         rsp_payload->port_speed_desc.desc_len =
6021             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_speed_desc));
6022         rsp_payload->port_speed_desc.speed_capab = cpu_to_be16(
6023             qla25xx_fdmi_port_speed_capability(ha));
6024         rsp_payload->port_speed_desc.operating_speed = cpu_to_be16(
6025             qla25xx_fdmi_port_speed_currently(ha));
6026
6027         /* Link Error Status Descriptor */
6028         rsp_payload->ls_err_desc.desc_tag = cpu_to_be32(0x10002);
6029         rsp_payload->ls_err_desc.desc_len =
6030                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->ls_err_desc));
6031
6032         if (stat) {
6033                 rval = qla24xx_get_isp_stats(vha, stat, stat_dma, 0);
6034                 if (!rval) {
6035                         rsp_payload->ls_err_desc.link_fail_cnt =
6036                             cpu_to_be32(le32_to_cpu(stat->link_fail_cnt));
6037                         rsp_payload->ls_err_desc.loss_sync_cnt =
6038                             cpu_to_be32(le32_to_cpu(stat->loss_sync_cnt));
6039                         rsp_payload->ls_err_desc.loss_sig_cnt =
6040                             cpu_to_be32(le32_to_cpu(stat->loss_sig_cnt));
6041                         rsp_payload->ls_err_desc.prim_seq_err_cnt =
6042                             cpu_to_be32(le32_to_cpu(stat->prim_seq_err_cnt));
6043                         rsp_payload->ls_err_desc.inval_xmit_word_cnt =
6044                             cpu_to_be32(le32_to_cpu(stat->inval_xmit_word_cnt));
6045                         rsp_payload->ls_err_desc.inval_crc_cnt =
6046                             cpu_to_be32(le32_to_cpu(stat->inval_crc_cnt));
6047                         rsp_payload->ls_err_desc.pn_port_phy_type |= BIT_6;
6048                 }
6049         }
6050
6051         /* Portname Descriptor */
6052         rsp_payload->port_name_diag_desc.desc_tag = cpu_to_be32(0x10003);
6053         rsp_payload->port_name_diag_desc.desc_len =
6054             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_diag_desc));
6055         memcpy(rsp_payload->port_name_diag_desc.WWNN,
6056             vha->node_name,
6057             sizeof(rsp_payload->port_name_diag_desc.WWNN));
6058         memcpy(rsp_payload->port_name_diag_desc.WWPN,
6059             vha->port_name,
6060             sizeof(rsp_payload->port_name_diag_desc.WWPN));
6061
6062         /* F-Port Portname Descriptor */
6063         rsp_payload->port_name_direct_desc.desc_tag = cpu_to_be32(0x10003);
6064         rsp_payload->port_name_direct_desc.desc_len =
6065             cpu_to_be32(RDP_DESC_LEN(rsp_payload->port_name_direct_desc));
6066         memcpy(rsp_payload->port_name_direct_desc.WWNN,
6067             vha->fabric_node_name,
6068             sizeof(rsp_payload->port_name_direct_desc.WWNN));
6069         memcpy(rsp_payload->port_name_direct_desc.WWPN,
6070             vha->fabric_port_name,
6071             sizeof(rsp_payload->port_name_direct_desc.WWPN));
6072
6073         /* Bufer Credit Descriptor */
6074         rsp_payload->buffer_credit_desc.desc_tag = cpu_to_be32(0x10006);
6075         rsp_payload->buffer_credit_desc.desc_len =
6076                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->buffer_credit_desc));
6077         rsp_payload->buffer_credit_desc.fcport_b2b = 0;
6078         rsp_payload->buffer_credit_desc.attached_fcport_b2b = cpu_to_be32(0);
6079         rsp_payload->buffer_credit_desc.fcport_rtt = cpu_to_be32(0);
6080
6081         if (ha->flags.plogi_template_valid) {
6082                 uint32_t tmp =
6083                 be16_to_cpu(ha->plogi_els_payld.fl_csp.sp_bb_cred);
6084                 rsp_payload->buffer_credit_desc.fcport_b2b = cpu_to_be32(tmp);
6085         }
6086
6087         if (rsp_payload_length < sizeof(*rsp_payload))
6088                 goto send;
6089
6090         /* Optical Element Descriptor, Temperature */
6091         rsp_payload->optical_elmt_desc[0].desc_tag = cpu_to_be32(0x10007);
6092         rsp_payload->optical_elmt_desc[0].desc_len =
6093                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6094         /* Optical Element Descriptor, Voltage */
6095         rsp_payload->optical_elmt_desc[1].desc_tag = cpu_to_be32(0x10007);
6096         rsp_payload->optical_elmt_desc[1].desc_len =
6097                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6098         /* Optical Element Descriptor, Tx Bias Current */
6099         rsp_payload->optical_elmt_desc[2].desc_tag = cpu_to_be32(0x10007);
6100         rsp_payload->optical_elmt_desc[2].desc_len =
6101                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6102         /* Optical Element Descriptor, Tx Power */
6103         rsp_payload->optical_elmt_desc[3].desc_tag = cpu_to_be32(0x10007);
6104         rsp_payload->optical_elmt_desc[3].desc_len =
6105                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6106         /* Optical Element Descriptor, Rx Power */
6107         rsp_payload->optical_elmt_desc[4].desc_tag = cpu_to_be32(0x10007);
6108         rsp_payload->optical_elmt_desc[4].desc_len =
6109                 cpu_to_be32(RDP_DESC_LEN(*rsp_payload->optical_elmt_desc));
6110
6111         if (sfp) {
6112                 memset(sfp, 0, SFP_RTDI_LEN);
6113                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 0, 64, 0);
6114                 if (!rval) {
6115                         __be16 *trx = (__force __be16 *)sfp; /* already be16 */
6116
6117                         /* Optical Element Descriptor, Temperature */
6118                         rsp_payload->optical_elmt_desc[0].high_alarm = trx[0];
6119                         rsp_payload->optical_elmt_desc[0].low_alarm = trx[1];
6120                         rsp_payload->optical_elmt_desc[0].high_warn = trx[2];
6121                         rsp_payload->optical_elmt_desc[0].low_warn = trx[3];
6122                         rsp_payload->optical_elmt_desc[0].element_flags =
6123                             cpu_to_be32(1 << 28);
6124
6125                         /* Optical Element Descriptor, Voltage */
6126                         rsp_payload->optical_elmt_desc[1].high_alarm = trx[4];
6127                         rsp_payload->optical_elmt_desc[1].low_alarm = trx[5];
6128                         rsp_payload->optical_elmt_desc[1].high_warn = trx[6];
6129                         rsp_payload->optical_elmt_desc[1].low_warn = trx[7];
6130                         rsp_payload->optical_elmt_desc[1].element_flags =
6131                             cpu_to_be32(2 << 28);
6132
6133                         /* Optical Element Descriptor, Tx Bias Current */
6134                         rsp_payload->optical_elmt_desc[2].high_alarm = trx[8];
6135                         rsp_payload->optical_elmt_desc[2].low_alarm = trx[9];
6136                         rsp_payload->optical_elmt_desc[2].high_warn = trx[10];
6137                         rsp_payload->optical_elmt_desc[2].low_warn = trx[11];
6138                         rsp_payload->optical_elmt_desc[2].element_flags =
6139                             cpu_to_be32(3 << 28);
6140
6141                         /* Optical Element Descriptor, Tx Power */
6142                         rsp_payload->optical_elmt_desc[3].high_alarm = trx[12];
6143                         rsp_payload->optical_elmt_desc[3].low_alarm = trx[13];
6144                         rsp_payload->optical_elmt_desc[3].high_warn = trx[14];
6145                         rsp_payload->optical_elmt_desc[3].low_warn = trx[15];
6146                         rsp_payload->optical_elmt_desc[3].element_flags =
6147                             cpu_to_be32(4 << 28);
6148
6149                         /* Optical Element Descriptor, Rx Power */
6150                         rsp_payload->optical_elmt_desc[4].high_alarm = trx[16];
6151                         rsp_payload->optical_elmt_desc[4].low_alarm = trx[17];
6152                         rsp_payload->optical_elmt_desc[4].high_warn = trx[18];
6153                         rsp_payload->optical_elmt_desc[4].low_warn = trx[19];
6154                         rsp_payload->optical_elmt_desc[4].element_flags =
6155                             cpu_to_be32(5 << 28);
6156                 }
6157
6158                 memset(sfp, 0, SFP_RTDI_LEN);
6159                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa2, 112, 64, 0);
6160                 if (!rval) {
6161                         /* Temperature high/low alarm/warning */
6162                         rsp_payload->optical_elmt_desc[0].element_flags |=
6163                             cpu_to_be32(
6164                                 (sfp[0] >> 7 & 1) << 3 |
6165                                 (sfp[0] >> 6 & 1) << 2 |
6166                                 (sfp[4] >> 7 & 1) << 1 |
6167                                 (sfp[4] >> 6 & 1) << 0);
6168
6169                         /* Voltage high/low alarm/warning */
6170                         rsp_payload->optical_elmt_desc[1].element_flags |=
6171                             cpu_to_be32(
6172                                 (sfp[0] >> 5 & 1) << 3 |
6173                                 (sfp[0] >> 4 & 1) << 2 |
6174                                 (sfp[4] >> 5 & 1) << 1 |
6175                                 (sfp[4] >> 4 & 1) << 0);
6176
6177                         /* Tx Bias Current high/low alarm/warning */
6178                         rsp_payload->optical_elmt_desc[2].element_flags |=
6179                             cpu_to_be32(
6180                                 (sfp[0] >> 3 & 1) << 3 |
6181                                 (sfp[0] >> 2 & 1) << 2 |
6182                                 (sfp[4] >> 3 & 1) << 1 |
6183                                 (sfp[4] >> 2 & 1) << 0);
6184
6185                         /* Tx Power high/low alarm/warning */
6186                         rsp_payload->optical_elmt_desc[3].element_flags |=
6187                             cpu_to_be32(
6188                                 (sfp[0] >> 1 & 1) << 3 |
6189                                 (sfp[0] >> 0 & 1) << 2 |
6190                                 (sfp[4] >> 1 & 1) << 1 |
6191                                 (sfp[4] >> 0 & 1) << 0);
6192
6193                         /* Rx Power high/low alarm/warning */
6194                         rsp_payload->optical_elmt_desc[4].element_flags |=
6195                             cpu_to_be32(
6196                                 (sfp[1] >> 7 & 1) << 3 |
6197                                 (sfp[1] >> 6 & 1) << 2 |
6198                                 (sfp[5] >> 7 & 1) << 1 |
6199                                 (sfp[5] >> 6 & 1) << 0);
6200                 }
6201         }
6202
6203         /* Optical Product Data Descriptor */
6204         rsp_payload->optical_prod_desc.desc_tag = cpu_to_be32(0x10008);
6205         rsp_payload->optical_prod_desc.desc_len =
6206                 cpu_to_be32(RDP_DESC_LEN(rsp_payload->optical_prod_desc));
6207
6208         if (sfp) {
6209                 memset(sfp, 0, SFP_RTDI_LEN);
6210                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 20, 64, 0);
6211                 if (!rval) {
6212                         memcpy(rsp_payload->optical_prod_desc.vendor_name,
6213                             sfp + 0,
6214                             sizeof(rsp_payload->optical_prod_desc.vendor_name));
6215                         memcpy(rsp_payload->optical_prod_desc.part_number,
6216                             sfp + 20,
6217                             sizeof(rsp_payload->optical_prod_desc.part_number));
6218                         memcpy(rsp_payload->optical_prod_desc.revision,
6219                             sfp + 36,
6220                             sizeof(rsp_payload->optical_prod_desc.revision));
6221                         memcpy(rsp_payload->optical_prod_desc.serial_number,
6222                             sfp + 48,
6223                             sizeof(rsp_payload->optical_prod_desc.serial_number));
6224                 }
6225
6226                 memset(sfp, 0, SFP_RTDI_LEN);
6227                 rval = qla2x00_read_sfp(vha, sfp_dma, sfp, 0xa0, 84, 8, 0);
6228                 if (!rval) {
6229                         memcpy(rsp_payload->optical_prod_desc.date,
6230                             sfp + 0,
6231                             sizeof(rsp_payload->optical_prod_desc.date));
6232                 }
6233         }
6234
6235 send:
6236         ql_dbg(ql_dbg_init, vha, 0x0183,
6237             "Sending ELS Response to RDP Request...\n");
6238         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0184,
6239             "-------- ELS RSP -------\n");
6240         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0185,
6241             rsp_els, sizeof(*rsp_els));
6242         ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0186,
6243             "-------- ELS RSP PAYLOAD -------\n");
6244         ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0187,
6245             rsp_payload, rsp_payload_length);
6246
6247         rval = qla2x00_issue_iocb(vha, rsp_els, rsp_els_dma, 0);
6248
6249         if (rval) {
6250                 ql_log(ql_log_warn, vha, 0x0188,
6251                     "%s: iocb failed to execute -> %x\n", __func__, rval);
6252         } else if (rsp_els->comp_status) {
6253                 ql_log(ql_log_warn, vha, 0x0189,
6254                     "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
6255                     __func__, rsp_els->comp_status,
6256                     rsp_els->error_subcode_1, rsp_els->error_subcode_2);
6257         } else {
6258                 ql_dbg(ql_dbg_init, vha, 0x018a, "%s: done.\n", __func__);
6259         }
6260
6261 dealloc:
6262         if (stat)
6263                 dma_free_coherent(&ha->pdev->dev, sizeof(*stat),
6264                     stat, stat_dma);
6265         if (sfp)
6266                 dma_free_coherent(&ha->pdev->dev, SFP_RTDI_LEN,
6267                     sfp, sfp_dma);
6268         if (rsp_payload)
6269                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_payload),
6270                     rsp_payload, rsp_payload_dma);
6271         if (rsp_els)
6272                 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els),
6273                     rsp_els, rsp_els_dma);
6274 }
6275
6276 void
6277 qla24xx_free_purex_item(struct purex_item *item)
6278 {
6279         if (item == &item->vha->default_item)
6280                 memset(&item->vha->default_item, 0, sizeof(struct purex_item));
6281         else
6282                 kfree(item);
6283 }
6284
6285 void qla24xx_process_purex_list(struct purex_list *list)
6286 {
6287         struct list_head head = LIST_HEAD_INIT(head);
6288         struct purex_item *item, *next;
6289         ulong flags;
6290
6291         spin_lock_irqsave(&list->lock, flags);
6292         list_splice_init(&list->head, &head);
6293         spin_unlock_irqrestore(&list->lock, flags);
6294
6295         list_for_each_entry_safe(item, next, &head, list) {
6296                 list_del(&item->list);
6297                 item->process_item(item->vha, item);
6298                 qla24xx_free_purex_item(item);
6299         }
6300 }
6301
6302 /*
6303  * Context: task, can sleep
6304  */
6305 void
6306 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
6307 {
6308 #if 0
6309         uint16_t options = (requester_id << 15) | BIT_7;
6310 #endif
6311         uint16_t retry;
6312         uint32_t data;
6313         struct qla_hw_data *ha = base_vha->hw;
6314
6315         might_sleep();
6316
6317         /* IDC-unlock implementation using driver-unlock/lock-id
6318          * remote registers
6319          */
6320         retry = 0;
6321 retry_unlock:
6322         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
6323             == QLA_SUCCESS) {
6324                 if (data == ha->portnum) {
6325                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
6326                         /* Clearing lock-id by setting 0xff */
6327                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
6328                 } else if (retry < 10) {
6329                         /* SV: XXX: IDC unlock retrying needed here? */
6330
6331                         /* Retry for IDC-unlock */
6332                         msleep(QLA83XX_WAIT_LOGIC_MS);
6333                         retry++;
6334                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
6335                             "Failed to release IDC lock, retrying=%d\n", retry);
6336                         goto retry_unlock;
6337                 }
6338         } else if (retry < 10) {
6339                 /* Retry for IDC-unlock */
6340                 msleep(QLA83XX_WAIT_LOGIC_MS);
6341                 retry++;
6342                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
6343                     "Failed to read drv-lockid, retrying=%d\n", retry);
6344                 goto retry_unlock;
6345         }
6346
6347         return;
6348
6349 #if 0
6350         /* XXX: IDC-unlock implementation using access-control mbx */
6351         retry = 0;
6352 retry_unlock2:
6353         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
6354                 if (retry < 10) {
6355                         /* Retry for IDC-unlock */
6356                         msleep(QLA83XX_WAIT_LOGIC_MS);
6357                         retry++;
6358                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
6359                             "Failed to release IDC lock, retrying=%d\n", retry);
6360                         goto retry_unlock2;
6361                 }
6362         }
6363
6364         return;
6365 #endif
6366 }
6367
6368 int
6369 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6370 {
6371         int rval = QLA_SUCCESS;
6372         struct qla_hw_data *ha = vha->hw;
6373         uint32_t drv_presence;
6374
6375         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6376         if (rval == QLA_SUCCESS) {
6377                 drv_presence |= (1 << ha->portnum);
6378                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6379                     drv_presence);
6380         }
6381
6382         return rval;
6383 }
6384
6385 int
6386 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
6387 {
6388         int rval = QLA_SUCCESS;
6389
6390         qla83xx_idc_lock(vha, 0);
6391         rval = __qla83xx_set_drv_presence(vha);
6392         qla83xx_idc_unlock(vha, 0);
6393
6394         return rval;
6395 }
6396
6397 int
6398 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6399 {
6400         int rval = QLA_SUCCESS;
6401         struct qla_hw_data *ha = vha->hw;
6402         uint32_t drv_presence;
6403
6404         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6405         if (rval == QLA_SUCCESS) {
6406                 drv_presence &= ~(1 << ha->portnum);
6407                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6408                     drv_presence);
6409         }
6410
6411         return rval;
6412 }
6413
6414 int
6415 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
6416 {
6417         int rval = QLA_SUCCESS;
6418
6419         qla83xx_idc_lock(vha, 0);
6420         rval = __qla83xx_clear_drv_presence(vha);
6421         qla83xx_idc_unlock(vha, 0);
6422
6423         return rval;
6424 }
6425
6426 static void
6427 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
6428 {
6429         struct qla_hw_data *ha = vha->hw;
6430         uint32_t drv_ack, drv_presence;
6431         unsigned long ack_timeout;
6432
6433         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
6434         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
6435         while (1) {
6436                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6437                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6438                 if ((drv_ack & drv_presence) == drv_presence)
6439                         break;
6440
6441                 if (time_after_eq(jiffies, ack_timeout)) {
6442                         ql_log(ql_log_warn, vha, 0xb067,
6443                             "RESET ACK TIMEOUT! drv_presence=0x%x "
6444                             "drv_ack=0x%x\n", drv_presence, drv_ack);
6445                         /*
6446                          * The function(s) which did not ack in time are forced
6447                          * to withdraw any further participation in the IDC
6448                          * reset.
6449                          */
6450                         if (drv_ack != drv_presence)
6451                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
6452                                     drv_ack);
6453                         break;
6454                 }
6455
6456                 qla83xx_idc_unlock(vha, 0);
6457                 msleep(1000);
6458                 qla83xx_idc_lock(vha, 0);
6459         }
6460
6461         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
6462         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
6463 }
6464
6465 static int
6466 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
6467 {
6468         int rval = QLA_SUCCESS;
6469         uint32_t idc_control;
6470
6471         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
6472         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
6473
6474         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
6475         __qla83xx_get_idc_control(vha, &idc_control);
6476         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
6477         __qla83xx_set_idc_control(vha, 0);
6478
6479         qla83xx_idc_unlock(vha, 0);
6480         rval = qla83xx_restart_nic_firmware(vha);
6481         qla83xx_idc_lock(vha, 0);
6482
6483         if (rval != QLA_SUCCESS) {
6484                 ql_log(ql_log_fatal, vha, 0xb06a,
6485                     "Failed to restart NIC f/w.\n");
6486                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
6487                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
6488         } else {
6489                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
6490                     "Success in restarting nic f/w.\n");
6491                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
6492                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
6493         }
6494
6495         return rval;
6496 }
6497
6498 /* Assumes idc_lock always held on entry */
6499 int
6500 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
6501 {
6502         struct qla_hw_data *ha = base_vha->hw;
6503         int rval = QLA_SUCCESS;
6504         unsigned long dev_init_timeout;
6505         uint32_t dev_state;
6506
6507         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
6508         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
6509
6510         while (1) {
6511
6512                 if (time_after_eq(jiffies, dev_init_timeout)) {
6513                         ql_log(ql_log_warn, base_vha, 0xb06e,
6514                             "Initialization TIMEOUT!\n");
6515                         /* Init timeout. Disable further NIC Core
6516                          * communication.
6517                          */
6518                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
6519                                 QLA8XXX_DEV_FAILED);
6520                         ql_log(ql_log_info, base_vha, 0xb06f,
6521                             "HW State: FAILED.\n");
6522                 }
6523
6524                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6525                 switch (dev_state) {
6526                 case QLA8XXX_DEV_READY:
6527                         if (ha->flags.nic_core_reset_owner)
6528                                 qla83xx_idc_audit(base_vha,
6529                                     IDC_AUDIT_COMPLETION);
6530                         ha->flags.nic_core_reset_owner = 0;
6531                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
6532                             "Reset_owner reset by 0x%x.\n",
6533                             ha->portnum);
6534                         goto exit;
6535                 case QLA8XXX_DEV_COLD:
6536                         if (ha->flags.nic_core_reset_owner)
6537                                 rval = qla83xx_device_bootstrap(base_vha);
6538                         else {
6539                         /* Wait for AEN to change device-state */
6540                                 qla83xx_idc_unlock(base_vha, 0);
6541                                 msleep(1000);
6542                                 qla83xx_idc_lock(base_vha, 0);
6543                         }
6544                         break;
6545                 case QLA8XXX_DEV_INITIALIZING:
6546                         /* Wait for AEN to change device-state */
6547                         qla83xx_idc_unlock(base_vha, 0);
6548                         msleep(1000);
6549                         qla83xx_idc_lock(base_vha, 0);
6550                         break;
6551                 case QLA8XXX_DEV_NEED_RESET:
6552                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
6553                                 qla83xx_need_reset_handler(base_vha);
6554                         else {
6555                                 /* Wait for AEN to change device-state */
6556                                 qla83xx_idc_unlock(base_vha, 0);
6557                                 msleep(1000);
6558                                 qla83xx_idc_lock(base_vha, 0);
6559                         }
6560                         /* reset timeout value after need reset handler */
6561                         dev_init_timeout = jiffies +
6562                             (ha->fcoe_dev_init_timeout * HZ);
6563                         break;
6564                 case QLA8XXX_DEV_NEED_QUIESCENT:
6565                         /* XXX: DEBUG for now */
6566                         qla83xx_idc_unlock(base_vha, 0);
6567                         msleep(1000);
6568                         qla83xx_idc_lock(base_vha, 0);
6569                         break;
6570                 case QLA8XXX_DEV_QUIESCENT:
6571                         /* XXX: DEBUG for now */
6572                         if (ha->flags.quiesce_owner)
6573                                 goto exit;
6574
6575                         qla83xx_idc_unlock(base_vha, 0);
6576                         msleep(1000);
6577                         qla83xx_idc_lock(base_vha, 0);
6578                         dev_init_timeout = jiffies +
6579                             (ha->fcoe_dev_init_timeout * HZ);
6580                         break;
6581                 case QLA8XXX_DEV_FAILED:
6582                         if (ha->flags.nic_core_reset_owner)
6583                                 qla83xx_idc_audit(base_vha,
6584                                     IDC_AUDIT_COMPLETION);
6585                         ha->flags.nic_core_reset_owner = 0;
6586                         __qla83xx_clear_drv_presence(base_vha);
6587                         qla83xx_idc_unlock(base_vha, 0);
6588                         qla8xxx_dev_failed_handler(base_vha);
6589                         rval = QLA_FUNCTION_FAILED;
6590                         qla83xx_idc_lock(base_vha, 0);
6591                         goto exit;
6592                 case QLA8XXX_BAD_VALUE:
6593                         qla83xx_idc_unlock(base_vha, 0);
6594                         msleep(1000);
6595                         qla83xx_idc_lock(base_vha, 0);
6596                         break;
6597                 default:
6598                         ql_log(ql_log_warn, base_vha, 0xb071,
6599                             "Unknown Device State: %x.\n", dev_state);
6600                         qla83xx_idc_unlock(base_vha, 0);
6601                         qla8xxx_dev_failed_handler(base_vha);
6602                         rval = QLA_FUNCTION_FAILED;
6603                         qla83xx_idc_lock(base_vha, 0);
6604                         goto exit;
6605                 }
6606         }
6607
6608 exit:
6609         return rval;
6610 }
6611
6612 void
6613 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6614 {
6615         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6616             board_disable);
6617         struct pci_dev *pdev = ha->pdev;
6618         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6619
6620         ql_log(ql_log_warn, base_vha, 0x015b,
6621             "Disabling adapter.\n");
6622
6623         if (!atomic_read(&pdev->enable_cnt)) {
6624                 ql_log(ql_log_info, base_vha, 0xfffc,
6625                     "PCI device disabled, no action req for PCI error=%lx\n",
6626                     base_vha->pci_flags);
6627                 return;
6628         }
6629
6630         /*
6631          * if UNLOADING flag is already set, then continue unload,
6632          * where it was set first.
6633          */
6634         if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
6635                 return;
6636
6637         qla2x00_wait_for_sess_deletion(base_vha);
6638
6639         qla2x00_delete_all_vps(ha, base_vha);
6640
6641         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6642
6643         qla2x00_dfs_remove(base_vha);
6644
6645         qla84xx_put_chip(base_vha);
6646
6647         if (base_vha->timer_active)
6648                 qla2x00_stop_timer(base_vha);
6649
6650         base_vha->flags.online = 0;
6651
6652         qla2x00_destroy_deferred_work(ha);
6653
6654         /*
6655          * Do not try to stop beacon blink as it will issue a mailbox
6656          * command.
6657          */
6658         qla2x00_free_sysfs_attr(base_vha, false);
6659
6660         fc_remove_host(base_vha->host);
6661
6662         scsi_remove_host(base_vha->host);
6663
6664         base_vha->flags.init_done = 0;
6665         qla25xx_delete_queues(base_vha);
6666         qla2x00_free_fcports(base_vha);
6667         qla2x00_free_irqs(base_vha);
6668         qla2x00_mem_free(ha);
6669         qla82xx_md_free(base_vha);
6670         qla2x00_free_queues(ha);
6671
6672         qla2x00_unmap_iobases(ha);
6673
6674         pci_release_selected_regions(ha->pdev, ha->bars);
6675         pci_disable_pcie_error_reporting(pdev);
6676         pci_disable_device(pdev);
6677
6678         /*
6679          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6680          */
6681 }
6682
6683 /**************************************************************************
6684 * qla2x00_do_dpc
6685 *   This kernel thread is a task that is schedule by the interrupt handler
6686 *   to perform the background processing for interrupts.
6687 *
6688 * Notes:
6689 * This task always run in the context of a kernel thread.  It
6690 * is kick-off by the driver's detect code and starts up
6691 * up one per adapter. It immediately goes to sleep and waits for
6692 * some fibre event.  When either the interrupt handler or
6693 * the timer routine detects a event it will one of the task
6694 * bits then wake us up.
6695 **************************************************************************/
6696 static int
6697 qla2x00_do_dpc(void *data)
6698 {
6699         scsi_qla_host_t *base_vha;
6700         struct qla_hw_data *ha;
6701         uint32_t online;
6702         struct qla_qpair *qpair;
6703
6704         ha = (struct qla_hw_data *)data;
6705         base_vha = pci_get_drvdata(ha->pdev);
6706
6707         set_user_nice(current, MIN_NICE);
6708
6709         set_current_state(TASK_INTERRUPTIBLE);
6710         while (!kthread_should_stop()) {
6711                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6712                     "DPC handler sleeping.\n");
6713
6714                 schedule();
6715
6716                 if (test_and_clear_bit(DO_EEH_RECOVERY, &base_vha->dpc_flags))
6717                         qla_pci_set_eeh_busy(base_vha);
6718
6719                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6720                         goto end_loop;
6721
6722                 if (ha->flags.eeh_busy) {
6723                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6724                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6725                         goto end_loop;
6726                 }
6727
6728                 ha->dpc_active = 1;
6729
6730                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6731                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6732                     base_vha->dpc_flags);
6733
6734                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6735                         break;
6736
6737                 if (IS_P3P_TYPE(ha)) {
6738                         if (IS_QLA8044(ha)) {
6739                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6740                                         &base_vha->dpc_flags)) {
6741                                         qla8044_idc_lock(ha);
6742                                         qla8044_wr_direct(base_vha,
6743                                                 QLA8044_CRB_DEV_STATE_INDEX,
6744                                                 QLA8XXX_DEV_FAILED);
6745                                         qla8044_idc_unlock(ha);
6746                                         ql_log(ql_log_info, base_vha, 0x4004,
6747                                                 "HW State: FAILED.\n");
6748                                         qla8044_device_state_handler(base_vha);
6749                                         continue;
6750                                 }
6751
6752                         } else {
6753                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6754                                         &base_vha->dpc_flags)) {
6755                                         qla82xx_idc_lock(ha);
6756                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6757                                                 QLA8XXX_DEV_FAILED);
6758                                         qla82xx_idc_unlock(ha);
6759                                         ql_log(ql_log_info, base_vha, 0x0151,
6760                                                 "HW State: FAILED.\n");
6761                                         qla82xx_device_state_handler(base_vha);
6762                                         continue;
6763                                 }
6764                         }
6765
6766                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6767                                 &base_vha->dpc_flags)) {
6768
6769                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6770                                     "FCoE context reset scheduled.\n");
6771                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6772                                         &base_vha->dpc_flags))) {
6773                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6774                                                 /* FCoE-ctx reset failed.
6775                                                  * Escalate to chip-reset
6776                                                  */
6777                                                 set_bit(ISP_ABORT_NEEDED,
6778                                                         &base_vha->dpc_flags);
6779                                         }
6780                                         clear_bit(ABORT_ISP_ACTIVE,
6781                                                 &base_vha->dpc_flags);
6782                                 }
6783
6784                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6785                                     "FCoE context reset end.\n");
6786                         }
6787                 } else if (IS_QLAFX00(ha)) {
6788                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6789                                 &base_vha->dpc_flags)) {
6790                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6791                                     "Firmware Reset Recovery\n");
6792                                 if (qlafx00_reset_initialize(base_vha)) {
6793                                         /* Failed. Abort isp later. */
6794                                         if (!test_bit(UNLOADING,
6795                                             &base_vha->dpc_flags)) {
6796                                                 set_bit(ISP_UNRECOVERABLE,
6797                                                     &base_vha->dpc_flags);
6798                                                 ql_dbg(ql_dbg_dpc, base_vha,
6799                                                     0x4021,
6800                                                     "Reset Recovery Failed\n");
6801                                         }
6802                                 }
6803                         }
6804
6805                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6806                                 &base_vha->dpc_flags)) {
6807                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6808                                     "ISPFx00 Target Scan scheduled\n");
6809                                 if (qlafx00_rescan_isp(base_vha)) {
6810                                         if (!test_bit(UNLOADING,
6811                                             &base_vha->dpc_flags))
6812                                                 set_bit(ISP_UNRECOVERABLE,
6813                                                     &base_vha->dpc_flags);
6814                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6815                                             "ISPFx00 Target Scan Failed\n");
6816                                 }
6817                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6818                                     "ISPFx00 Target Scan End\n");
6819                         }
6820                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6821                                 &base_vha->dpc_flags)) {
6822                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6823                                     "ISPFx00 Host Info resend scheduled\n");
6824                                 qlafx00_fx_disc(base_vha,
6825                                     &base_vha->hw->mr.fcport,
6826                                     FXDISC_REG_HOST_INFO);
6827                         }
6828                 }
6829
6830                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6831                     &base_vha->dpc_flags)) {
6832                         /* Semantic:
6833                          *  - NO-OP -- await next ISP-ABORT. Preferred method
6834                          *             to minimize disruptions that will occur
6835                          *             when a forced chip-reset occurs.
6836                          *  - Force -- ISP-ABORT scheduled.
6837                          */
6838                         /* set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); */
6839                 }
6840
6841                 if (test_and_clear_bit
6842                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6843                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6844                         bool do_reset = true;
6845
6846                         switch (base_vha->qlini_mode) {
6847                         case QLA2XXX_INI_MODE_ENABLED:
6848                                 break;
6849                         case QLA2XXX_INI_MODE_DISABLED:
6850                                 if (!qla_tgt_mode_enabled(base_vha) &&
6851                                     !ha->flags.fw_started)
6852                                         do_reset = false;
6853                                 break;
6854                         case QLA2XXX_INI_MODE_DUAL:
6855                                 if (!qla_dual_mode_enabled(base_vha) &&
6856                                     !ha->flags.fw_started)
6857                                         do_reset = false;
6858                                 break;
6859                         default:
6860                                 break;
6861                         }
6862
6863                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6864                             &base_vha->dpc_flags))) {
6865                                 base_vha->flags.online = 1;
6866                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6867                                     "ISP abort scheduled.\n");
6868                                 if (ha->isp_ops->abort_isp(base_vha)) {
6869                                         /* failed. retry later */
6870                                         set_bit(ISP_ABORT_NEEDED,
6871                                             &base_vha->dpc_flags);
6872                                 }
6873                                 clear_bit(ABORT_ISP_ACTIVE,
6874                                                 &base_vha->dpc_flags);
6875                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6876                                     "ISP abort end.\n");
6877                         }
6878                 }
6879
6880                 if (test_bit(PROCESS_PUREX_IOCB, &base_vha->dpc_flags)) {
6881                         if (atomic_read(&base_vha->loop_state) == LOOP_READY) {
6882                                 qla24xx_process_purex_list
6883                                         (&base_vha->purex_list);
6884                                 clear_bit(PROCESS_PUREX_IOCB,
6885                                     &base_vha->dpc_flags);
6886                         }
6887                 }
6888
6889                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6890                     &base_vha->dpc_flags)) {
6891                         qla2x00_update_fcports(base_vha);
6892                 }
6893
6894                 if (IS_QLAFX00(ha))
6895                         goto loop_resync_check;
6896
6897                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6898                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6899                             "Quiescence mode scheduled.\n");
6900                         if (IS_P3P_TYPE(ha)) {
6901                                 if (IS_QLA82XX(ha))
6902                                         qla82xx_device_state_handler(base_vha);
6903                                 if (IS_QLA8044(ha))
6904                                         qla8044_device_state_handler(base_vha);
6905                                 clear_bit(ISP_QUIESCE_NEEDED,
6906                                     &base_vha->dpc_flags);
6907                                 if (!ha->flags.quiesce_owner) {
6908                                         qla2x00_perform_loop_resync(base_vha);
6909                                         if (IS_QLA82XX(ha)) {
6910                                                 qla82xx_idc_lock(ha);
6911                                                 qla82xx_clear_qsnt_ready(
6912                                                     base_vha);
6913                                                 qla82xx_idc_unlock(ha);
6914                                         } else if (IS_QLA8044(ha)) {
6915                                                 qla8044_idc_lock(ha);
6916                                                 qla8044_clear_qsnt_ready(
6917                                                     base_vha);
6918                                                 qla8044_idc_unlock(ha);
6919                                         }
6920                                 }
6921                         } else {
6922                                 clear_bit(ISP_QUIESCE_NEEDED,
6923                                     &base_vha->dpc_flags);
6924                                 qla2x00_quiesce_io(base_vha);
6925                         }
6926                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6927                             "Quiescence mode end.\n");
6928                 }
6929
6930                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6931                                 &base_vha->dpc_flags) &&
6932                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6933
6934                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6935                             "Reset marker scheduled.\n");
6936                         qla2x00_rst_aen(base_vha);
6937                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6938                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6939                             "Reset marker end.\n");
6940                 }
6941
6942                 /* Retry each device up to login retry count */
6943                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6944                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6945                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6946
6947                         if (!base_vha->relogin_jif ||
6948                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6949                                 base_vha->relogin_jif = jiffies + HZ;
6950                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6951
6952                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6953                                     "Relogin scheduled.\n");
6954                                 qla24xx_post_relogin_work(base_vha);
6955                         }
6956                 }
6957 loop_resync_check:
6958                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6959                     &base_vha->dpc_flags)) {
6960
6961                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6962                             "Loop resync scheduled.\n");
6963
6964                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6965                             &base_vha->dpc_flags))) {
6966
6967                                 qla2x00_loop_resync(base_vha);
6968
6969                                 clear_bit(LOOP_RESYNC_ACTIVE,
6970                                                 &base_vha->dpc_flags);
6971                         }
6972
6973                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6974                             "Loop resync end.\n");
6975                 }
6976
6977                 if (IS_QLAFX00(ha))
6978                         goto intr_on_check;
6979
6980                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6981                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6982                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6983                         qla2xxx_flash_npiv_conf(base_vha);
6984                 }
6985
6986 intr_on_check:
6987                 if (!ha->interrupts_on)
6988                         ha->isp_ops->enable_intrs(ha);
6989
6990                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6991                                         &base_vha->dpc_flags)) {
6992                         if (ha->beacon_blink_led == 1)
6993                                 ha->isp_ops->beacon_blink(base_vha);
6994                 }
6995
6996                 /* qpair online check */
6997                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6998                     &base_vha->dpc_flags)) {
6999                         if (ha->flags.eeh_busy ||
7000                             ha->flags.pci_channel_io_perm_failure)
7001                                 online = 0;
7002                         else
7003                                 online = 1;
7004
7005                         mutex_lock(&ha->mq_lock);
7006                         list_for_each_entry(qpair, &base_vha->qp_list,
7007                             qp_list_elem)
7008                         qpair->online = online;
7009                         mutex_unlock(&ha->mq_lock);
7010                 }
7011
7012                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
7013                                        &base_vha->dpc_flags)) {
7014                         u16 threshold = ha->nvme_last_rptd_aen + ha->last_zio_threshold;
7015
7016                         if (threshold > ha->orig_fw_xcb_count)
7017                                 threshold = ha->orig_fw_xcb_count;
7018
7019                         ql_log(ql_log_info, base_vha, 0xffffff,
7020                                "SET ZIO Activity exchange threshold to %d.\n",
7021                                threshold);
7022                         if (qla27xx_set_zio_threshold(base_vha, threshold)) {
7023                                 ql_log(ql_log_info, base_vha, 0xffffff,
7024                                        "Unable to SET ZIO Activity exchange threshold to %d.\n",
7025                                        threshold);
7026                         }
7027                 }
7028
7029                 if (!IS_QLAFX00(ha))
7030                         qla2x00_do_dpc_all_vps(base_vha);
7031
7032                 if (test_and_clear_bit(N2N_LINK_RESET,
7033                         &base_vha->dpc_flags)) {
7034                         qla2x00_lip_reset(base_vha);
7035                 }
7036
7037                 if (test_bit(HEARTBEAT_CHK, &base_vha->dpc_flags)) {
7038                         /*
7039                          * if there is a mb in progress then that's
7040                          * enough of a check to see if fw is still ticking.
7041                          */
7042                         if (!ha->flags.mbox_busy && base_vha->flags.init_done)
7043                                 qla_no_op_mb(base_vha);
7044
7045                         clear_bit(HEARTBEAT_CHK, &base_vha->dpc_flags);
7046                 }
7047
7048                 ha->dpc_active = 0;
7049 end_loop:
7050                 set_current_state(TASK_INTERRUPTIBLE);
7051         } /* End of while(1) */
7052         __set_current_state(TASK_RUNNING);
7053
7054         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
7055             "DPC handler exiting.\n");
7056
7057         /*
7058          * Make sure that nobody tries to wake us up again.
7059          */
7060         ha->dpc_active = 0;
7061
7062         /* Cleanup any residual CTX SRBs. */
7063         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
7064
7065         return 0;
7066 }
7067
7068 void
7069 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
7070 {
7071         struct qla_hw_data *ha = vha->hw;
7072         struct task_struct *t = ha->dpc_thread;
7073
7074         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
7075                 wake_up_process(t);
7076 }
7077
7078 /*
7079 *  qla2x00_rst_aen
7080 *      Processes asynchronous reset.
7081 *
7082 * Input:
7083 *      ha  = adapter block pointer.
7084 */
7085 static void
7086 qla2x00_rst_aen(scsi_qla_host_t *vha)
7087 {
7088         if (vha->flags.online && !vha->flags.reset_active &&
7089             !atomic_read(&vha->loop_down_timer) &&
7090             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
7091                 do {
7092                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7093
7094                         /*
7095                          * Issue marker command only when we are going to start
7096                          * the I/O.
7097                          */
7098                         vha->marker_needed = 1;
7099                 } while (!atomic_read(&vha->loop_down_timer) &&
7100                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
7101         }
7102 }
7103
7104 static bool qla_do_heartbeat(struct scsi_qla_host *vha)
7105 {
7106         u64 cmd_cnt, prev_cmd_cnt;
7107         bool do_hb = false;
7108         struct qla_hw_data *ha = vha->hw;
7109         int i;
7110
7111         /* if cmds are still pending down in fw, then do hb */
7112         if (ha->base_qpair->cmd_cnt != ha->base_qpair->cmd_completion_cnt) {
7113                 do_hb = true;
7114                 goto skip;
7115         }
7116
7117         for (i = 0; i < ha->max_qpairs; i++) {
7118                 if (ha->queue_pair_map[i] &&
7119                     ha->queue_pair_map[i]->cmd_cnt !=
7120                     ha->queue_pair_map[i]->cmd_completion_cnt) {
7121                         do_hb = true;
7122                         break;
7123                 }
7124         }
7125
7126 skip:
7127         prev_cmd_cnt = ha->prev_cmd_cnt;
7128         cmd_cnt = ha->base_qpair->cmd_cnt;
7129         for (i = 0; i < ha->max_qpairs; i++) {
7130                 if (ha->queue_pair_map[i])
7131                         cmd_cnt += ha->queue_pair_map[i]->cmd_cnt;
7132         }
7133         ha->prev_cmd_cnt = cmd_cnt;
7134
7135         if (!do_hb && ((cmd_cnt - prev_cmd_cnt) > 50))
7136                 /*
7137                  * IOs are completing before periodic hb check.
7138                  * IOs seems to be running, do hb for sanity check.
7139                  */
7140                 do_hb = true;
7141
7142         return do_hb;
7143 }
7144
7145 static void qla_heart_beat(struct scsi_qla_host *vha)
7146 {
7147         if (vha->vp_idx)
7148                 return;
7149
7150         if (vha->hw->flags.eeh_busy || qla2x00_chip_is_down(vha))
7151                 return;
7152
7153         if (qla_do_heartbeat(vha)) {
7154                 set_bit(HEARTBEAT_CHK, &vha->dpc_flags);
7155                 qla2xxx_wake_dpc(vha);
7156         }
7157 }
7158
7159 /**************************************************************************
7160 *   qla2x00_timer
7161 *
7162 * Description:
7163 *   One second timer
7164 *
7165 * Context: Interrupt
7166 ***************************************************************************/
7167 void
7168 qla2x00_timer(struct timer_list *t)
7169 {
7170         scsi_qla_host_t *vha = from_timer(vha, t, timer);
7171         unsigned long   cpu_flags = 0;
7172         int             start_dpc = 0;
7173         int             index;
7174         srb_t           *sp;
7175         uint16_t        w;
7176         struct qla_hw_data *ha = vha->hw;
7177         struct req_que *req;
7178         unsigned long flags;
7179         fc_port_t *fcport = NULL;
7180
7181         if (ha->flags.eeh_busy) {
7182                 ql_dbg(ql_dbg_timer, vha, 0x6000,
7183                     "EEH = %d, restarting timer.\n",
7184                     ha->flags.eeh_busy);
7185                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
7186                 return;
7187         }
7188
7189         /*
7190          * Hardware read to raise pending EEH errors during mailbox waits. If
7191          * the read returns -1 then disable the board.
7192          */
7193         if (!pci_channel_offline(ha->pdev)) {
7194                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
7195                 qla2x00_check_reg16_for_disconnect(vha, w);
7196         }
7197
7198         /* Make sure qla82xx_watchdog is run only for physical port */
7199         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
7200                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
7201                         start_dpc++;
7202                 if (IS_QLA82XX(ha))
7203                         qla82xx_watchdog(vha);
7204                 else if (IS_QLA8044(ha))
7205                         qla8044_watchdog(vha);
7206         }
7207
7208         if (!vha->vp_idx && IS_QLAFX00(ha))
7209                 qlafx00_timer_routine(vha);
7210
7211         if (vha->link_down_time < QLA2XX_MAX_LINK_DOWN_TIME)
7212                 vha->link_down_time++;
7213
7214         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
7215         list_for_each_entry(fcport, &vha->vp_fcports, list) {
7216                 if (fcport->tgt_link_down_time < QLA2XX_MAX_LINK_DOWN_TIME)
7217                         fcport->tgt_link_down_time++;
7218         }
7219         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
7220
7221         /* Loop down handler. */
7222         if (atomic_read(&vha->loop_down_timer) > 0 &&
7223             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
7224             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
7225                 && vha->flags.online) {
7226
7227                 if (atomic_read(&vha->loop_down_timer) ==
7228                     vha->loop_down_abort_time) {
7229
7230                         ql_log(ql_log_info, vha, 0x6008,
7231                             "Loop down - aborting the queues before time expires.\n");
7232
7233                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
7234                                 atomic_set(&vha->loop_state, LOOP_DEAD);
7235
7236                         /*
7237                          * Schedule an ISP abort to return any FCP2-device
7238                          * commands.
7239                          */
7240                         /* NPIV - scan physical port only */
7241                         if (!vha->vp_idx) {
7242                                 spin_lock_irqsave(&ha->hardware_lock,
7243                                     cpu_flags);
7244                                 req = ha->req_q_map[0];
7245                                 for (index = 1;
7246                                     index < req->num_outstanding_cmds;
7247                                     index++) {
7248                                         fc_port_t *sfcp;
7249
7250                                         sp = req->outstanding_cmds[index];
7251                                         if (!sp)
7252                                                 continue;
7253                                         if (sp->cmd_type != TYPE_SRB)
7254                                                 continue;
7255                                         if (sp->type != SRB_SCSI_CMD)
7256                                                 continue;
7257                                         sfcp = sp->fcport;
7258                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
7259                                                 continue;
7260
7261                                         if (IS_QLA82XX(ha))
7262                                                 set_bit(FCOE_CTX_RESET_NEEDED,
7263                                                         &vha->dpc_flags);
7264                                         else
7265                                                 set_bit(ISP_ABORT_NEEDED,
7266                                                         &vha->dpc_flags);
7267                                         break;
7268                                 }
7269                                 spin_unlock_irqrestore(&ha->hardware_lock,
7270                                                                 cpu_flags);
7271                         }
7272                         start_dpc++;
7273                 }
7274
7275                 /* if the loop has been down for 4 minutes, reinit adapter */
7276                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
7277                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
7278                                 ql_log(ql_log_warn, vha, 0x6009,
7279                                     "Loop down - aborting ISP.\n");
7280
7281                                 if (IS_QLA82XX(ha))
7282                                         set_bit(FCOE_CTX_RESET_NEEDED,
7283                                                 &vha->dpc_flags);
7284                                 else
7285                                         set_bit(ISP_ABORT_NEEDED,
7286                                                 &vha->dpc_flags);
7287                         }
7288                 }
7289                 ql_dbg(ql_dbg_timer, vha, 0x600a,
7290                     "Loop down - seconds remaining %d.\n",
7291                     atomic_read(&vha->loop_down_timer));
7292         }
7293         /* Check if beacon LED needs to be blinked for physical host only */
7294         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
7295                 /* There is no beacon_blink function for ISP82xx */
7296                 if (!IS_P3P_TYPE(ha)) {
7297                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
7298                         start_dpc++;
7299                 }
7300         }
7301
7302         /* Process any deferred work. */
7303         if (!list_empty(&vha->work_list)) {
7304                 unsigned long flags;
7305                 bool q = false;
7306
7307                 spin_lock_irqsave(&vha->work_lock, flags);
7308                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
7309                         q = true;
7310                 spin_unlock_irqrestore(&vha->work_lock, flags);
7311                 if (q)
7312                         queue_work(vha->hw->wq, &vha->iocb_work);
7313         }
7314
7315         /*
7316          * FC-NVME
7317          * see if the active AEN count has changed from what was last reported.
7318          */
7319         index = atomic_read(&ha->nvme_active_aen_cnt);
7320         if (!vha->vp_idx &&
7321             (index != ha->nvme_last_rptd_aen) &&
7322             ha->zio_mode == QLA_ZIO_MODE_6 &&
7323             !ha->flags.host_shutting_down) {
7324                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
7325                 ql_log(ql_log_info, vha, 0x3002,
7326                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
7327                     ha->nvme_last_rptd_aen);
7328                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7329                 start_dpc++;
7330         }
7331
7332         if (!vha->vp_idx &&
7333             atomic_read(&ha->zio_threshold) != ha->last_zio_threshold &&
7334             IS_ZIO_THRESHOLD_CAPABLE(ha)) {
7335                 ql_log(ql_log_info, vha, 0x3002,
7336                     "Sched: Set ZIO exchange threshold to %d.\n",
7337                     ha->last_zio_threshold);
7338                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
7339                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
7340                 start_dpc++;
7341         }
7342
7343         /* Schedule the DPC routine if needed */
7344         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
7345             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
7346             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
7347             start_dpc ||
7348             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
7349             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
7350             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
7351             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
7352             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
7353             test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
7354             test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags))) {
7355                 ql_dbg(ql_dbg_timer, vha, 0x600b,
7356                     "isp_abort_needed=%d loop_resync_needed=%d "
7357                     "fcport_update_needed=%d start_dpc=%d "
7358                     "reset_marker_needed=%d",
7359                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
7360                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
7361                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
7362                     start_dpc,
7363                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
7364                 ql_dbg(ql_dbg_timer, vha, 0x600c,
7365                     "beacon_blink_needed=%d isp_unrecoverable=%d "
7366                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
7367                     "relogin_needed=%d, Process_purex_iocb=%d.\n",
7368                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
7369                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
7370                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
7371                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
7372                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
7373                     test_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags));
7374                 qla2xxx_wake_dpc(vha);
7375         }
7376
7377         qla_heart_beat(vha);
7378
7379         qla2x00_restart_timer(vha, WATCH_INTERVAL);
7380 }
7381
7382 /* Firmware interface routines. */
7383
7384 #define FW_ISP21XX      0
7385 #define FW_ISP22XX      1
7386 #define FW_ISP2300      2
7387 #define FW_ISP2322      3
7388 #define FW_ISP24XX      4
7389 #define FW_ISP25XX      5
7390 #define FW_ISP81XX      6
7391 #define FW_ISP82XX      7
7392 #define FW_ISP2031      8
7393 #define FW_ISP8031      9
7394 #define FW_ISP27XX      10
7395 #define FW_ISP28XX      11
7396
7397 #define FW_FILE_ISP21XX "ql2100_fw.bin"
7398 #define FW_FILE_ISP22XX "ql2200_fw.bin"
7399 #define FW_FILE_ISP2300 "ql2300_fw.bin"
7400 #define FW_FILE_ISP2322 "ql2322_fw.bin"
7401 #define FW_FILE_ISP24XX "ql2400_fw.bin"
7402 #define FW_FILE_ISP25XX "ql2500_fw.bin"
7403 #define FW_FILE_ISP81XX "ql8100_fw.bin"
7404 #define FW_FILE_ISP82XX "ql8200_fw.bin"
7405 #define FW_FILE_ISP2031 "ql2600_fw.bin"
7406 #define FW_FILE_ISP8031 "ql8300_fw.bin"
7407 #define FW_FILE_ISP27XX "ql2700_fw.bin"
7408 #define FW_FILE_ISP28XX "ql2800_fw.bin"
7409
7410
7411 static DEFINE_MUTEX(qla_fw_lock);
7412
7413 static struct fw_blob qla_fw_blobs[] = {
7414         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
7415         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
7416         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
7417         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
7418         { .name = FW_FILE_ISP24XX, },
7419         { .name = FW_FILE_ISP25XX, },
7420         { .name = FW_FILE_ISP81XX, },
7421         { .name = FW_FILE_ISP82XX, },
7422         { .name = FW_FILE_ISP2031, },
7423         { .name = FW_FILE_ISP8031, },
7424         { .name = FW_FILE_ISP27XX, },
7425         { .name = FW_FILE_ISP28XX, },
7426         { .name = NULL, },
7427 };
7428
7429 struct fw_blob *
7430 qla2x00_request_firmware(scsi_qla_host_t *vha)
7431 {
7432         struct qla_hw_data *ha = vha->hw;
7433         struct fw_blob *blob;
7434
7435         if (IS_QLA2100(ha)) {
7436                 blob = &qla_fw_blobs[FW_ISP21XX];
7437         } else if (IS_QLA2200(ha)) {
7438                 blob = &qla_fw_blobs[FW_ISP22XX];
7439         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
7440                 blob = &qla_fw_blobs[FW_ISP2300];
7441         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
7442                 blob = &qla_fw_blobs[FW_ISP2322];
7443         } else if (IS_QLA24XX_TYPE(ha)) {
7444                 blob = &qla_fw_blobs[FW_ISP24XX];
7445         } else if (IS_QLA25XX(ha)) {
7446                 blob = &qla_fw_blobs[FW_ISP25XX];
7447         } else if (IS_QLA81XX(ha)) {
7448                 blob = &qla_fw_blobs[FW_ISP81XX];
7449         } else if (IS_QLA82XX(ha)) {
7450                 blob = &qla_fw_blobs[FW_ISP82XX];
7451         } else if (IS_QLA2031(ha)) {
7452                 blob = &qla_fw_blobs[FW_ISP2031];
7453         } else if (IS_QLA8031(ha)) {
7454                 blob = &qla_fw_blobs[FW_ISP8031];
7455         } else if (IS_QLA27XX(ha)) {
7456                 blob = &qla_fw_blobs[FW_ISP27XX];
7457         } else if (IS_QLA28XX(ha)) {
7458                 blob = &qla_fw_blobs[FW_ISP28XX];
7459         } else {
7460                 return NULL;
7461         }
7462
7463         if (!blob->name)
7464                 return NULL;
7465
7466         mutex_lock(&qla_fw_lock);
7467         if (blob->fw)
7468                 goto out;
7469
7470         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
7471                 ql_log(ql_log_warn, vha, 0x0063,
7472                     "Failed to load firmware image (%s).\n", blob->name);
7473                 blob->fw = NULL;
7474                 blob = NULL;
7475         }
7476
7477 out:
7478         mutex_unlock(&qla_fw_lock);
7479         return blob;
7480 }
7481
7482 static void
7483 qla2x00_release_firmware(void)
7484 {
7485         struct fw_blob *blob;
7486
7487         mutex_lock(&qla_fw_lock);
7488         for (blob = qla_fw_blobs; blob->name; blob++)
7489                 release_firmware(blob->fw);
7490         mutex_unlock(&qla_fw_lock);
7491 }
7492
7493 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
7494 {
7495         struct qla_hw_data *ha = vha->hw;
7496         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
7497         struct qla_qpair *qpair = NULL;
7498         struct scsi_qla_host *vp;
7499         fc_port_t *fcport;
7500         int i;
7501         unsigned long flags;
7502
7503         ql_dbg(ql_dbg_aer, vha, 0x9000,
7504                "%s\n", __func__);
7505         ha->chip_reset++;
7506
7507         ha->base_qpair->chip_reset = ha->chip_reset;
7508         for (i = 0; i < ha->max_qpairs; i++) {
7509                 if (ha->queue_pair_map[i])
7510                         ha->queue_pair_map[i]->chip_reset =
7511                             ha->base_qpair->chip_reset;
7512         }
7513
7514         /*
7515          * purge mailbox might take a while. Slot Reset/chip reset
7516          * will take care of the purge
7517          */
7518
7519         mutex_lock(&ha->mq_lock);
7520         ha->base_qpair->online = 0;
7521         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7522                 qpair->online = 0;
7523         wmb();
7524         mutex_unlock(&ha->mq_lock);
7525
7526         qla2x00_mark_all_devices_lost(vha);
7527
7528         spin_lock_irqsave(&ha->vport_slock, flags);
7529         list_for_each_entry(vp, &ha->vp_list, list) {
7530                 atomic_inc(&vp->vref_count);
7531                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7532                 qla2x00_mark_all_devices_lost(vp);
7533                 spin_lock_irqsave(&ha->vport_slock, flags);
7534                 atomic_dec(&vp->vref_count);
7535         }
7536         spin_unlock_irqrestore(&ha->vport_slock, flags);
7537
7538         /* Clear all async request states across all VPs. */
7539         list_for_each_entry(fcport, &vha->vp_fcports, list)
7540                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7541
7542         spin_lock_irqsave(&ha->vport_slock, flags);
7543         list_for_each_entry(vp, &ha->vp_list, list) {
7544                 atomic_inc(&vp->vref_count);
7545                 spin_unlock_irqrestore(&ha->vport_slock, flags);
7546                 list_for_each_entry(fcport, &vp->vp_fcports, list)
7547                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7548                 spin_lock_irqsave(&ha->vport_slock, flags);
7549                 atomic_dec(&vp->vref_count);
7550         }
7551         spin_unlock_irqrestore(&ha->vport_slock, flags);
7552 }
7553
7554
7555 static pci_ers_result_t
7556 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
7557 {
7558         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
7559         struct qla_hw_data *ha = vha->hw;
7560         pci_ers_result_t ret = PCI_ERS_RESULT_NEED_RESET;
7561
7562         ql_log(ql_log_warn, vha, 0x9000,
7563                "PCI error detected, state %x.\n", state);
7564         ha->pci_error_state = QLA_PCI_ERR_DETECTED;
7565
7566         if (!atomic_read(&pdev->enable_cnt)) {
7567                 ql_log(ql_log_info, vha, 0xffff,
7568                         "PCI device is disabled,state %x\n", state);
7569                 ret = PCI_ERS_RESULT_NEED_RESET;
7570                 goto out;
7571         }
7572
7573         switch (state) {
7574         case pci_channel_io_normal:
7575                 ha->flags.eeh_busy = 0;
7576                 if (ql2xmqsupport || ql2xnvmeenable) {
7577                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7578                         qla2xxx_wake_dpc(vha);
7579                 }
7580                 ret = PCI_ERS_RESULT_CAN_RECOVER;
7581                 break;
7582         case pci_channel_io_frozen:
7583                 qla_pci_set_eeh_busy(vha);
7584                 ret = PCI_ERS_RESULT_NEED_RESET;
7585                 break;
7586         case pci_channel_io_perm_failure:
7587                 ha->flags.pci_channel_io_perm_failure = 1;
7588                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
7589                 if (ql2xmqsupport || ql2xnvmeenable) {
7590                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
7591                         qla2xxx_wake_dpc(vha);
7592                 }
7593                 ret = PCI_ERS_RESULT_DISCONNECT;
7594         }
7595 out:
7596         ql_dbg(ql_dbg_aer, vha, 0x600d,
7597                "PCI error detected returning [%x].\n", ret);
7598         return ret;
7599 }
7600
7601 static pci_ers_result_t
7602 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
7603 {
7604         int risc_paused = 0;
7605         uint32_t stat;
7606         unsigned long flags;
7607         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7608         struct qla_hw_data *ha = base_vha->hw;
7609         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7610         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
7611
7612         ql_log(ql_log_warn, base_vha, 0x9000,
7613                "mmio enabled\n");
7614
7615         ha->pci_error_state = QLA_PCI_MMIO_ENABLED;
7616         if (IS_QLA82XX(ha))
7617                 return PCI_ERS_RESULT_RECOVERED;
7618
7619         spin_lock_irqsave(&ha->hardware_lock, flags);
7620         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
7621                 stat = rd_reg_word(&reg->hccr);
7622                 if (stat & HCCR_RISC_PAUSE)
7623                         risc_paused = 1;
7624         } else if (IS_QLA23XX(ha)) {
7625                 stat = rd_reg_dword(&reg->u.isp2300.host_status);
7626                 if (stat & HSR_RISC_PAUSED)
7627                         risc_paused = 1;
7628         } else if (IS_FWI2_CAPABLE(ha)) {
7629                 stat = rd_reg_dword(&reg24->host_status);
7630                 if (stat & HSRX_RISC_PAUSED)
7631                         risc_paused = 1;
7632         }
7633         spin_unlock_irqrestore(&ha->hardware_lock, flags);
7634
7635         if (risc_paused) {
7636                 ql_log(ql_log_info, base_vha, 0x9003,
7637                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
7638                 qla2xxx_dump_fw(base_vha);
7639         }
7640         /* set PCI_ERS_RESULT_NEED_RESET to trigger call to qla2xxx_pci_slot_reset */
7641         ql_dbg(ql_dbg_aer, base_vha, 0x600d,
7642                "mmio enabled returning.\n");
7643         return PCI_ERS_RESULT_NEED_RESET;
7644 }
7645
7646 static pci_ers_result_t
7647 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
7648 {
7649         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
7650         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7651         struct qla_hw_data *ha = base_vha->hw;
7652         int rc;
7653         struct qla_qpair *qpair = NULL;
7654
7655         ql_log(ql_log_warn, base_vha, 0x9004,
7656                "Slot Reset.\n");
7657
7658         ha->pci_error_state = QLA_PCI_SLOT_RESET;
7659         /* Workaround: qla2xxx driver which access hardware earlier
7660          * needs error state to be pci_channel_io_online.
7661          * Otherwise mailbox command timesout.
7662          */
7663         pdev->error_state = pci_channel_io_normal;
7664
7665         pci_restore_state(pdev);
7666
7667         /* pci_restore_state() clears the saved_state flag of the device
7668          * save restored state which resets saved_state flag
7669          */
7670         pci_save_state(pdev);
7671
7672         if (ha->mem_only)
7673                 rc = pci_enable_device_mem(pdev);
7674         else
7675                 rc = pci_enable_device(pdev);
7676
7677         if (rc) {
7678                 ql_log(ql_log_warn, base_vha, 0x9005,
7679                     "Can't re-enable PCI device after reset.\n");
7680                 goto exit_slot_reset;
7681         }
7682
7683
7684         if (ha->isp_ops->pci_config(base_vha))
7685                 goto exit_slot_reset;
7686
7687         mutex_lock(&ha->mq_lock);
7688         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7689                 qpair->online = 1;
7690         mutex_unlock(&ha->mq_lock);
7691
7692         ha->flags.eeh_busy = 0;
7693         base_vha->flags.online = 1;
7694         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7695         ha->isp_ops->abort_isp(base_vha);
7696         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7697
7698         if (qla2x00_isp_reg_stat(ha)) {
7699                 ha->flags.eeh_busy = 1;
7700                 qla_pci_error_cleanup(base_vha);
7701                 ql_log(ql_log_warn, base_vha, 0x9005,
7702                        "Device unable to recover from PCI error.\n");
7703         } else {
7704                 ret =  PCI_ERS_RESULT_RECOVERED;
7705         }
7706
7707 exit_slot_reset:
7708         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7709             "Slot Reset returning %x.\n", ret);
7710
7711         return ret;
7712 }
7713
7714 static void
7715 qla2xxx_pci_resume(struct pci_dev *pdev)
7716 {
7717         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7718         struct qla_hw_data *ha = base_vha->hw;
7719         int ret;
7720
7721         ql_log(ql_log_warn, base_vha, 0x900f,
7722                "Pci Resume.\n");
7723
7724
7725         ret = qla2x00_wait_for_hba_online(base_vha);
7726         if (ret != QLA_SUCCESS) {
7727                 ql_log(ql_log_fatal, base_vha, 0x9002,
7728                     "The device failed to resume I/O from slot/link_reset.\n");
7729         }
7730         ha->pci_error_state = QLA_PCI_RESUME;
7731         ql_dbg(ql_dbg_aer, base_vha, 0x600d,
7732                "Pci Resume returning.\n");
7733 }
7734
7735 void qla_pci_set_eeh_busy(struct scsi_qla_host *vha)
7736 {
7737         struct qla_hw_data *ha = vha->hw;
7738         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7739         bool do_cleanup = false;
7740         unsigned long flags;
7741
7742         if (ha->flags.eeh_busy)
7743                 return;
7744
7745         spin_lock_irqsave(&base_vha->work_lock, flags);
7746         if (!ha->flags.eeh_busy) {
7747                 ha->flags.eeh_busy = 1;
7748                 do_cleanup = true;
7749         }
7750         spin_unlock_irqrestore(&base_vha->work_lock, flags);
7751
7752         if (do_cleanup)
7753                 qla_pci_error_cleanup(base_vha);
7754 }
7755
7756 /*
7757  * this routine will schedule a task to pause IO from interrupt context
7758  * if caller sees a PCIE error event (register read = 0xf's)
7759  */
7760 void qla_schedule_eeh_work(struct scsi_qla_host *vha)
7761 {
7762         struct qla_hw_data *ha = vha->hw;
7763         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7764
7765         if (ha->flags.eeh_busy)
7766                 return;
7767
7768         set_bit(DO_EEH_RECOVERY, &base_vha->dpc_flags);
7769         qla2xxx_wake_dpc(base_vha);
7770 }
7771
7772 static void
7773 qla_pci_reset_prepare(struct pci_dev *pdev)
7774 {
7775         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7776         struct qla_hw_data *ha = base_vha->hw;
7777         struct qla_qpair *qpair;
7778
7779         ql_log(ql_log_warn, base_vha, 0xffff,
7780             "%s.\n", __func__);
7781
7782         /*
7783          * PCI FLR/function reset is about to reset the
7784          * slot. Stop the chip to stop all DMA access.
7785          * It is assumed that pci_reset_done will be called
7786          * after FLR to resume Chip operation.
7787          */
7788         ha->flags.eeh_busy = 1;
7789         mutex_lock(&ha->mq_lock);
7790         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7791                 qpair->online = 0;
7792         mutex_unlock(&ha->mq_lock);
7793
7794         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7795         qla2x00_abort_isp_cleanup(base_vha);
7796         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7797 }
7798
7799 static void
7800 qla_pci_reset_done(struct pci_dev *pdev)
7801 {
7802         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7803         struct qla_hw_data *ha = base_vha->hw;
7804         struct qla_qpair *qpair;
7805
7806         ql_log(ql_log_warn, base_vha, 0xffff,
7807             "%s.\n", __func__);
7808
7809         /*
7810          * FLR just completed by PCI layer. Resume adapter
7811          */
7812         ha->flags.eeh_busy = 0;
7813         mutex_lock(&ha->mq_lock);
7814         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7815                 qpair->online = 1;
7816         mutex_unlock(&ha->mq_lock);
7817
7818         base_vha->flags.online = 1;
7819         ha->isp_ops->abort_isp(base_vha);
7820         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7821 }
7822
7823 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7824 {
7825         int rc;
7826         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7827         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7828
7829         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7830                 rc = blk_mq_map_queues(qmap);
7831         else
7832                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7833         return rc;
7834 }
7835
7836 struct scsi_host_template qla2xxx_driver_template = {
7837         .module                 = THIS_MODULE,
7838         .name                   = QLA2XXX_DRIVER_NAME,
7839         .queuecommand           = qla2xxx_queuecommand,
7840
7841         .eh_timed_out           = fc_eh_timed_out,
7842         .eh_abort_handler       = qla2xxx_eh_abort,
7843         .eh_should_retry_cmd    = fc_eh_should_retry_cmd,
7844         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7845         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7846         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7847         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7848
7849         .slave_configure        = qla2xxx_slave_configure,
7850
7851         .slave_alloc            = qla2xxx_slave_alloc,
7852         .slave_destroy          = qla2xxx_slave_destroy,
7853         .scan_finished          = qla2xxx_scan_finished,
7854         .scan_start             = qla2xxx_scan_start,
7855         .change_queue_depth     = scsi_change_queue_depth,
7856         .map_queues             = qla2xxx_map_queues,
7857         .this_id                = -1,
7858         .cmd_per_lun            = 3,
7859         .sg_tablesize           = SG_ALL,
7860
7861         .max_sectors            = 0xFFFF,
7862         .shost_attrs            = qla2x00_host_attrs,
7863
7864         .supported_mode         = MODE_INITIATOR,
7865         .track_queue_depth      = 1,
7866         .cmd_size               = sizeof(srb_t),
7867 };
7868
7869 static const struct pci_error_handlers qla2xxx_err_handler = {
7870         .error_detected = qla2xxx_pci_error_detected,
7871         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7872         .slot_reset = qla2xxx_pci_slot_reset,
7873         .resume = qla2xxx_pci_resume,
7874         .reset_prepare = qla_pci_reset_prepare,
7875         .reset_done = qla_pci_reset_done,
7876 };
7877
7878 static struct pci_device_id qla2xxx_pci_tbl[] = {
7879         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7880         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7881         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7882         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7883         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7884         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7885         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7886         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7887         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7888         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7889         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7890         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7891         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7892         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7893         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7894         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7895         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7896         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7897         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7898         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7899         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7900         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7901         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7902         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7903         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7904         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7905         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7906         { 0 },
7907 };
7908 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
7909
7910 static struct pci_driver qla2xxx_pci_driver = {
7911         .name           = QLA2XXX_DRIVER_NAME,
7912         .driver         = {
7913                 .owner          = THIS_MODULE,
7914         },
7915         .id_table       = qla2xxx_pci_tbl,
7916         .probe          = qla2x00_probe_one,
7917         .remove         = qla2x00_remove_one,
7918         .shutdown       = qla2x00_shutdown,
7919         .err_handler    = &qla2xxx_err_handler,
7920 };
7921
7922 static const struct file_operations apidev_fops = {
7923         .owner = THIS_MODULE,
7924         .llseek = noop_llseek,
7925 };
7926
7927 /**
7928  * qla2x00_module_init - Module initialization.
7929  **/
7930 static int __init
7931 qla2x00_module_init(void)
7932 {
7933         int ret = 0;
7934
7935         BUILD_BUG_ON(sizeof(cmd_a64_entry_t) != 64);
7936         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
7937         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
7938         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
7939         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
7940         BUILD_BUG_ON(sizeof(mrk_entry_t) != 64);
7941         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
7942         BUILD_BUG_ON(sizeof(request_t) != 64);
7943         BUILD_BUG_ON(sizeof(struct abort_entry_24xx) != 64);
7944         BUILD_BUG_ON(sizeof(struct abort_iocb_entry_fx00) != 64);
7945         BUILD_BUG_ON(sizeof(struct abts_entry_24xx) != 64);
7946         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
7947         BUILD_BUG_ON(sizeof(struct access_chip_rsp_84xx) != 64);
7948         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
7949         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
7950         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
7951         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
7952         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
7953         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
7954         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
7955         BUILD_BUG_ON(sizeof(struct ct_fdmi1_hba_attributes) != 2344);
7956         BUILD_BUG_ON(sizeof(struct ct_fdmi2_hba_attributes) != 4424);
7957         BUILD_BUG_ON(sizeof(struct ct_fdmi2_port_attributes) != 4164);
7958         BUILD_BUG_ON(sizeof(struct ct_fdmi_hba_attr) != 260);
7959         BUILD_BUG_ON(sizeof(struct ct_fdmi_port_attr) != 260);
7960         BUILD_BUG_ON(sizeof(struct ct_rsp_hdr) != 16);
7961         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
7962         BUILD_BUG_ON(sizeof(struct device_reg_24xx) != 256);
7963         BUILD_BUG_ON(sizeof(struct device_reg_25xxmq) != 24);
7964         BUILD_BUG_ON(sizeof(struct device_reg_2xxx) != 256);
7965         BUILD_BUG_ON(sizeof(struct device_reg_82xx) != 1288);
7966         BUILD_BUG_ON(sizeof(struct device_reg_fx00) != 216);
7967         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
7968         BUILD_BUG_ON(sizeof(struct els_sts_entry_24xx) != 64);
7969         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
7970         BUILD_BUG_ON(sizeof(struct imm_ntfy_from_isp) != 64);
7971         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
7972         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
7973         BUILD_BUG_ON(sizeof(struct logio_entry_24xx) != 64);
7974         BUILD_BUG_ON(sizeof(struct mbx_entry) != 64);
7975         BUILD_BUG_ON(sizeof(struct mid_init_cb_24xx) != 5252);
7976         BUILD_BUG_ON(sizeof(struct mrk_entry_24xx) != 64);
7977         BUILD_BUG_ON(sizeof(struct nvram_24xx) != 512);
7978         BUILD_BUG_ON(sizeof(struct nvram_81xx) != 512);
7979         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
7980         BUILD_BUG_ON(sizeof(struct pt_ls4_rx_unsol) != 64);
7981         BUILD_BUG_ON(sizeof(struct purex_entry_24xx) != 64);
7982         BUILD_BUG_ON(sizeof(struct qla2100_fw_dump) != 123634);
7983         BUILD_BUG_ON(sizeof(struct qla2300_fw_dump) != 136100);
7984         BUILD_BUG_ON(sizeof(struct qla24xx_fw_dump) != 37976);
7985         BUILD_BUG_ON(sizeof(struct qla25xx_fw_dump) != 39228);
7986         BUILD_BUG_ON(sizeof(struct qla2xxx_fce_chain) != 52);
7987         BUILD_BUG_ON(sizeof(struct qla2xxx_fw_dump) != 136172);
7988         BUILD_BUG_ON(sizeof(struct qla2xxx_mq_chain) != 524);
7989         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_chain) != 8);
7990         BUILD_BUG_ON(sizeof(struct qla2xxx_mqueue_header) != 12);
7991         BUILD_BUG_ON(sizeof(struct qla2xxx_offld_chain) != 24);
7992         BUILD_BUG_ON(sizeof(struct qla81xx_fw_dump) != 39420);
7993         BUILD_BUG_ON(sizeof(struct qla82xx_uri_data_desc) != 28);
7994         BUILD_BUG_ON(sizeof(struct qla82xx_uri_table_desc) != 32);
7995         BUILD_BUG_ON(sizeof(struct qla83xx_fw_dump) != 51196);
7996         BUILD_BUG_ON(sizeof(struct qla_fcp_prio_cfg) != FCP_PRIO_CFG_SIZE);
7997         BUILD_BUG_ON(sizeof(struct qla_fdt_layout) != 128);
7998         BUILD_BUG_ON(sizeof(struct qla_flt_header) != 8);
7999         BUILD_BUG_ON(sizeof(struct qla_flt_region) != 16);
8000         BUILD_BUG_ON(sizeof(struct qla_npiv_entry) != 24);
8001         BUILD_BUG_ON(sizeof(struct qla_npiv_header) != 16);
8002         BUILD_BUG_ON(sizeof(struct rdp_rsp_payload) != 336);
8003         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
8004         BUILD_BUG_ON(sizeof(struct sts_entry_24xx) != 64);
8005         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry) != 64);
8006         BUILD_BUG_ON(sizeof(struct tsk_mgmt_entry_fx00) != 64);
8007         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
8008         BUILD_BUG_ON(sizeof(struct verify_chip_rsp_84xx) != 52);
8009         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
8010         BUILD_BUG_ON(sizeof(struct vp_config_entry_24xx) != 64);
8011         BUILD_BUG_ON(sizeof(struct vp_ctrl_entry_24xx) != 64);
8012         BUILD_BUG_ON(sizeof(struct vp_rpt_id_entry_24xx) != 64);
8013         BUILD_BUG_ON(sizeof(sts21_entry_t) != 64);
8014         BUILD_BUG_ON(sizeof(sts22_entry_t) != 64);
8015         BUILD_BUG_ON(sizeof(sts_cont_entry_t) != 64);
8016         BUILD_BUG_ON(sizeof(sts_entry_t) != 64);
8017         BUILD_BUG_ON(sizeof(sw_info_t) != 32);
8018         BUILD_BUG_ON(sizeof(target_id_t) != 2);
8019
8020         /* Allocate cache for SRBs. */
8021         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
8022             SLAB_HWCACHE_ALIGN, NULL);
8023         if (srb_cachep == NULL) {
8024                 ql_log(ql_log_fatal, NULL, 0x0001,
8025                     "Unable to allocate SRB cache...Failing load!.\n");
8026                 return -ENOMEM;
8027         }
8028
8029         /* Initialize target kmem_cache and mem_pools */
8030         ret = qlt_init();
8031         if (ret < 0) {
8032                 goto destroy_cache;
8033         } else if (ret > 0) {
8034                 /*
8035                  * If initiator mode is explictly disabled by qlt_init(),
8036                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
8037                  * performing scsi_scan_target() during LOOP UP event.
8038                  */
8039                 qla2xxx_transport_functions.disable_target_scan = 1;
8040                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
8041         }
8042
8043         /* Derive version string. */
8044         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
8045         if (ql2xextended_error_logging)
8046                 strcat(qla2x00_version_str, "-debug");
8047         if (ql2xextended_error_logging == 1)
8048                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
8049
8050         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
8051                 qla_insert_tgt_attrs();
8052
8053         qla2xxx_transport_template =
8054             fc_attach_transport(&qla2xxx_transport_functions);
8055         if (!qla2xxx_transport_template) {
8056                 ql_log(ql_log_fatal, NULL, 0x0002,
8057                     "fc_attach_transport failed...Failing load!.\n");
8058                 ret = -ENODEV;
8059                 goto qlt_exit;
8060         }
8061
8062         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
8063         if (apidev_major < 0) {
8064                 ql_log(ql_log_fatal, NULL, 0x0003,
8065                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
8066         }
8067
8068         qla2xxx_transport_vport_template =
8069             fc_attach_transport(&qla2xxx_transport_vport_functions);
8070         if (!qla2xxx_transport_vport_template) {
8071                 ql_log(ql_log_fatal, NULL, 0x0004,
8072                     "fc_attach_transport vport failed...Failing load!.\n");
8073                 ret = -ENODEV;
8074                 goto unreg_chrdev;
8075         }
8076         ql_log(ql_log_info, NULL, 0x0005,
8077             "QLogic Fibre Channel HBA Driver: %s.\n",
8078             qla2x00_version_str);
8079         ret = pci_register_driver(&qla2xxx_pci_driver);
8080         if (ret) {
8081                 ql_log(ql_log_fatal, NULL, 0x0006,
8082                     "pci_register_driver failed...ret=%d Failing load!.\n",
8083                     ret);
8084                 goto release_vport_transport;
8085         }
8086         return ret;
8087
8088 release_vport_transport:
8089         fc_release_transport(qla2xxx_transport_vport_template);
8090
8091 unreg_chrdev:
8092         if (apidev_major >= 0)
8093                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8094         fc_release_transport(qla2xxx_transport_template);
8095
8096 qlt_exit:
8097         qlt_exit();
8098
8099 destroy_cache:
8100         kmem_cache_destroy(srb_cachep);
8101         return ret;
8102 }
8103
8104 /**
8105  * qla2x00_module_exit - Module cleanup.
8106  **/
8107 static void __exit
8108 qla2x00_module_exit(void)
8109 {
8110         pci_unregister_driver(&qla2xxx_pci_driver);
8111         qla2x00_release_firmware();
8112         kmem_cache_destroy(ctx_cachep);
8113         fc_release_transport(qla2xxx_transport_vport_template);
8114         if (apidev_major >= 0)
8115                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
8116         fc_release_transport(qla2xxx_transport_template);
8117         qlt_exit();
8118         kmem_cache_destroy(srb_cachep);
8119 }
8120
8121 module_init(qla2x00_module_init);
8122 module_exit(qla2x00_module_exit);
8123
8124 MODULE_AUTHOR("QLogic Corporation");
8125 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
8126 MODULE_LICENSE("GPL");
8127 MODULE_FIRMWARE(FW_FILE_ISP21XX);
8128 MODULE_FIRMWARE(FW_FILE_ISP22XX);
8129 MODULE_FIRMWARE(FW_FILE_ISP2300);
8130 MODULE_FIRMWARE(FW_FILE_ISP2322);
8131 MODULE_FIRMWARE(FW_FILE_ISP24XX);
8132 MODULE_FIRMWARE(FW_FILE_ISP25XX);