Merge tag 'leds-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux...
[linux-2.6-microblaze.git] / drivers / scsi / qla2xxx / qla_mr.c
1 /*
2  * QLogic Fibre Channel HBA Driver
3  * Copyright (c)  2003-2014 QLogic Corporation
4  *
5  * See LICENSE.qla2xxx for copyright and licensing details.
6  */
7 #include "qla_def.h"
8 #include <linux/delay.h>
9 #include <linux/ktime.h>
10 #include <linux/pci.h>
11 #include <linux/ratelimit.h>
12 #include <linux/vmalloc.h>
13 #include <scsi/scsi_tcq.h>
14 #include <linux/utsname.h>
15
16
17 /* QLAFX00 specific Mailbox implementation functions */
18
19 /*
20  * qlafx00_mailbox_command
21  *      Issue mailbox command and waits for completion.
22  *
23  * Input:
24  *      ha = adapter block pointer.
25  *      mcp = driver internal mbx struct pointer.
26  *
27  * Output:
28  *      mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
29  *
30  * Returns:
31  *      0 : QLA_SUCCESS = cmd performed success
32  *      1 : QLA_FUNCTION_FAILED   (error encountered)
33  *      6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
34  *
35  * Context:
36  *      Kernel context.
37  */
38 static int
39 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
40
41 {
42         int             rval;
43         unsigned long    flags = 0;
44         device_reg_t *reg;
45         uint8_t         abort_active;
46         uint8_t         io_lock_on;
47         uint16_t        command = 0;
48         uint32_t        *iptr;
49         uint32_t __iomem *optr;
50         uint32_t        cnt;
51         uint32_t        mboxes;
52         unsigned long   wait_time;
53         struct qla_hw_data *ha = vha->hw;
54         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
55
56         if (ha->pdev->error_state == pci_channel_io_perm_failure) {
57                 ql_log(ql_log_warn, vha, 0x115c,
58                     "PCI channel failed permanently, exiting.\n");
59                 return QLA_FUNCTION_TIMEOUT;
60         }
61
62         if (vha->device_flags & DFLG_DEV_FAILED) {
63                 ql_log(ql_log_warn, vha, 0x115f,
64                     "Device in failed state, exiting.\n");
65                 return QLA_FUNCTION_TIMEOUT;
66         }
67
68         reg = ha->iobase;
69         io_lock_on = base_vha->flags.init_done;
70
71         rval = QLA_SUCCESS;
72         abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
73
74         if (ha->flags.pci_channel_io_perm_failure) {
75                 ql_log(ql_log_warn, vha, 0x1175,
76                     "Perm failure on EEH timeout MBX, exiting.\n");
77                 return QLA_FUNCTION_TIMEOUT;
78         }
79
80         if (ha->flags.isp82xx_fw_hung) {
81                 /* Setting Link-Down error */
82                 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83                 ql_log(ql_log_warn, vha, 0x1176,
84                     "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85                 rval = QLA_FUNCTION_FAILED;
86                 goto premature_exit;
87         }
88
89         /*
90          * Wait for active mailbox commands to finish by waiting at most tov
91          * seconds. This is to serialize actual issuing of mailbox cmds during
92          * non ISP abort time.
93          */
94         if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
95                 /* Timeout occurred. Return error. */
96                 ql_log(ql_log_warn, vha, 0x1177,
97                     "Cmd access timeout, cmd=0x%x, Exiting.\n",
98                     mcp->mb[0]);
99                 return QLA_FUNCTION_TIMEOUT;
100         }
101
102         ha->flags.mbox_busy = 1;
103         /* Save mailbox command for debug */
104         ha->mcp32 = mcp;
105
106         ql_dbg(ql_dbg_mbx, vha, 0x1178,
107             "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108
109         spin_lock_irqsave(&ha->hardware_lock, flags);
110
111         /* Load mailbox registers. */
112         optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
113
114         iptr = mcp->mb;
115         command = mcp->mb[0];
116         mboxes = mcp->out_mb;
117
118         for (cnt = 0; cnt < ha->mbx_count; cnt++) {
119                 if (mboxes & BIT_0)
120                         WRT_REG_DWORD(optr, *iptr);
121
122                 mboxes >>= 1;
123                 optr++;
124                 iptr++;
125         }
126
127         /* Issue set host interrupt command to send cmd out. */
128         ha->flags.mbox_int = 0;
129         clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
130
131         ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
132             (uint8_t *)mcp->mb, 16);
133         ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
134             ((uint8_t *)mcp->mb + 0x10), 16);
135         ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
136             ((uint8_t *)mcp->mb + 0x20), 8);
137
138         /* Unlock mbx registers and wait for interrupt */
139         ql_dbg(ql_dbg_mbx, vha, 0x1179,
140             "Going to unlock irq & waiting for interrupts. "
141             "jiffies=%lx.\n", jiffies);
142
143         /* Wait for mbx cmd completion until timeout */
144         if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
145                 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
146
147                 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
148                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
149
150                 WARN_ON_ONCE(wait_for_completion_timeout(&ha->mbx_intr_comp,
151                                                          mcp->tov * HZ) != 0);
152         } else {
153                 ql_dbg(ql_dbg_mbx, vha, 0x112c,
154                     "Cmd=%x Polling Mode.\n", command);
155
156                 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
157                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
158
159                 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
160                 while (!ha->flags.mbox_int) {
161                         if (time_after(jiffies, wait_time))
162                                 break;
163
164                         /* Check for pending interrupts. */
165                         qla2x00_poll(ha->rsp_q_map[0]);
166
167                         if (!ha->flags.mbox_int &&
168                             !(IS_QLA2200(ha) &&
169                             command == MBC_LOAD_RISC_RAM_EXTENDED))
170                                 usleep_range(10000, 11000);
171                 } /* while */
172                 ql_dbg(ql_dbg_mbx, vha, 0x112d,
173                     "Waited %d sec.\n",
174                     (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
175         }
176
177         /* Check whether we timed out */
178         if (ha->flags.mbox_int) {
179                 uint32_t *iptr2;
180
181                 ql_dbg(ql_dbg_mbx, vha, 0x112e,
182                     "Cmd=%x completed.\n", command);
183
184                 /* Got interrupt. Clear the flag. */
185                 ha->flags.mbox_int = 0;
186                 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
187
188                 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
189                         rval = QLA_FUNCTION_FAILED;
190
191                 /* Load return mailbox registers. */
192                 iptr2 = mcp->mb;
193                 iptr = (uint32_t *)&ha->mailbox_out32[0];
194                 mboxes = mcp->in_mb;
195                 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
196                         if (mboxes & BIT_0)
197                                 *iptr2 = *iptr;
198
199                         mboxes >>= 1;
200                         iptr2++;
201                         iptr++;
202                 }
203         } else {
204
205                 rval = QLA_FUNCTION_TIMEOUT;
206         }
207
208         ha->flags.mbox_busy = 0;
209
210         /* Clean up */
211         ha->mcp32 = NULL;
212
213         if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
214                 ql_dbg(ql_dbg_mbx, vha, 0x113a,
215                     "checking for additional resp interrupt.\n");
216
217                 /* polling mode for non isp_abort commands. */
218                 qla2x00_poll(ha->rsp_q_map[0]);
219         }
220
221         if (rval == QLA_FUNCTION_TIMEOUT &&
222             mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
223                 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
224                     ha->flags.eeh_busy) {
225                         /* not in dpc. schedule it for dpc to take over. */
226                         ql_dbg(ql_dbg_mbx, vha, 0x115d,
227                             "Timeout, schedule isp_abort_needed.\n");
228
229                         if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
230                             !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
231                             !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
232
233                                 ql_log(ql_log_info, base_vha, 0x115e,
234                                     "Mailbox cmd timeout occurred, cmd=0x%x, "
235                                     "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
236                                     "abort.\n", command, mcp->mb[0],
237                                     ha->flags.eeh_busy);
238                                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
239                                 qla2xxx_wake_dpc(vha);
240                         }
241                 } else if (!abort_active) {
242                         /* call abort directly since we are in the DPC thread */
243                         ql_dbg(ql_dbg_mbx, vha, 0x1160,
244                             "Timeout, calling abort_isp.\n");
245
246                         if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
247                             !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
248                             !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
249
250                                 ql_log(ql_log_info, base_vha, 0x1161,
251                                     "Mailbox cmd timeout occurred, cmd=0x%x, "
252                                     "mb[0]=0x%x. Scheduling ISP abort ",
253                                     command, mcp->mb[0]);
254
255                                 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
256                                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
257                                 if (ha->isp_ops->abort_isp(vha)) {
258                                         /* Failed. retry later. */
259                                         set_bit(ISP_ABORT_NEEDED,
260                                             &vha->dpc_flags);
261                                 }
262                                 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
263                                 ql_dbg(ql_dbg_mbx, vha, 0x1162,
264                                     "Finished abort_isp.\n");
265                         }
266                 }
267         }
268
269 premature_exit:
270         /* Allow next mbx cmd to come in. */
271         complete(&ha->mbx_cmd_comp);
272
273         if (rval) {
274                 ql_log(ql_log_warn, base_vha, 0x1163,
275                        "**** Failed=%x mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
276                        rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
277                        command);
278         } else {
279                 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
280         }
281
282         return rval;
283 }
284
285 /*
286  * qlafx00_driver_shutdown
287  *      Indicate a driver shutdown to firmware.
288  *
289  * Input:
290  *      ha = adapter block pointer.
291  *
292  * Returns:
293  *      local function return status code.
294  *
295  * Context:
296  *      Kernel context.
297  */
298 int
299 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
300 {
301         int rval;
302         struct mbx_cmd_32 mc;
303         struct mbx_cmd_32 *mcp = &mc;
304
305         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
306             "Entered %s.\n", __func__);
307
308         mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
309         mcp->out_mb = MBX_0;
310         mcp->in_mb = MBX_0;
311         if (tmo)
312                 mcp->tov = tmo;
313         else
314                 mcp->tov = MBX_TOV_SECONDS;
315         mcp->flags = 0;
316         rval = qlafx00_mailbox_command(vha, mcp);
317
318         if (rval != QLA_SUCCESS) {
319                 ql_dbg(ql_dbg_mbx, vha, 0x1167,
320                     "Failed=%x.\n", rval);
321         } else {
322                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
323                     "Done %s.\n", __func__);
324         }
325
326         return rval;
327 }
328
329 /*
330  * qlafx00_get_firmware_state
331  *      Get adapter firmware state.
332  *
333  * Input:
334  *      ha = adapter block pointer.
335  *      TARGET_QUEUE_LOCK must be released.
336  *      ADAPTER_STATE_LOCK must be released.
337  *
338  * Returns:
339  *      qla7xxx local function return status code.
340  *
341  * Context:
342  *      Kernel context.
343  */
344 static int
345 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
346 {
347         int rval;
348         struct mbx_cmd_32 mc;
349         struct mbx_cmd_32 *mcp = &mc;
350
351         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
352             "Entered %s.\n", __func__);
353
354         mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
355         mcp->out_mb = MBX_0;
356         mcp->in_mb = MBX_1|MBX_0;
357         mcp->tov = MBX_TOV_SECONDS;
358         mcp->flags = 0;
359         rval = qlafx00_mailbox_command(vha, mcp);
360
361         /* Return firmware states. */
362         states[0] = mcp->mb[1];
363
364         if (rval != QLA_SUCCESS) {
365                 ql_dbg(ql_dbg_mbx, vha, 0x116a,
366                     "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
367         } else {
368                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
369                     "Done %s.\n", __func__);
370         }
371         return rval;
372 }
373
374 /*
375  * qlafx00_init_firmware
376  *      Initialize adapter firmware.
377  *
378  * Input:
379  *      ha = adapter block pointer.
380  *      dptr = Initialization control block pointer.
381  *      size = size of initialization control block.
382  *      TARGET_QUEUE_LOCK must be released.
383  *      ADAPTER_STATE_LOCK must be released.
384  *
385  * Returns:
386  *      qlafx00 local function return status code.
387  *
388  * Context:
389  *      Kernel context.
390  */
391 int
392 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
393 {
394         int rval;
395         struct mbx_cmd_32 mc;
396         struct mbx_cmd_32 *mcp = &mc;
397         struct qla_hw_data *ha = vha->hw;
398
399         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
400             "Entered %s.\n", __func__);
401
402         mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
403
404         mcp->mb[1] = 0;
405         mcp->mb[2] = MSD(ha->init_cb_dma);
406         mcp->mb[3] = LSD(ha->init_cb_dma);
407
408         mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
409         mcp->in_mb = MBX_0;
410         mcp->buf_size = size;
411         mcp->flags = MBX_DMA_OUT;
412         mcp->tov = MBX_TOV_SECONDS;
413         rval = qlafx00_mailbox_command(vha, mcp);
414
415         if (rval != QLA_SUCCESS) {
416                 ql_dbg(ql_dbg_mbx, vha, 0x116d,
417                     "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
418         } else {
419                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
420                     "Done %s.\n", __func__);
421         }
422         return rval;
423 }
424
425 /*
426  * qlafx00_mbx_reg_test
427  */
428 static int
429 qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
430 {
431         int rval;
432         struct mbx_cmd_32 mc;
433         struct mbx_cmd_32 *mcp = &mc;
434
435         ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
436             "Entered %s.\n", __func__);
437
438
439         mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
440         mcp->mb[1] = 0xAAAA;
441         mcp->mb[2] = 0x5555;
442         mcp->mb[3] = 0xAA55;
443         mcp->mb[4] = 0x55AA;
444         mcp->mb[5] = 0xA5A5;
445         mcp->mb[6] = 0x5A5A;
446         mcp->mb[7] = 0x2525;
447         mcp->mb[8] = 0xBBBB;
448         mcp->mb[9] = 0x6666;
449         mcp->mb[10] = 0xBB66;
450         mcp->mb[11] = 0x66BB;
451         mcp->mb[12] = 0xB6B6;
452         mcp->mb[13] = 0x6B6B;
453         mcp->mb[14] = 0x3636;
454         mcp->mb[15] = 0xCCCC;
455
456
457         mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
458                         MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
459         mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
460                         MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
461         mcp->buf_size = 0;
462         mcp->flags = MBX_DMA_OUT;
463         mcp->tov = MBX_TOV_SECONDS;
464         rval = qlafx00_mailbox_command(vha, mcp);
465         if (rval == QLA_SUCCESS) {
466                 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
467                     mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
468                         rval = QLA_FUNCTION_FAILED;
469                 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
470                     mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
471                         rval = QLA_FUNCTION_FAILED;
472                 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
473                     mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
474                         rval = QLA_FUNCTION_FAILED;
475                 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
476                     mcp->mb[31] != 0xCCCC)
477                         rval = QLA_FUNCTION_FAILED;
478         }
479
480         if (rval != QLA_SUCCESS) {
481                 ql_dbg(ql_dbg_mbx, vha, 0x1170,
482                     "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
483         } else {
484                 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
485                     "Done %s.\n", __func__);
486         }
487         return rval;
488 }
489
490 /**
491  * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
492  * @vha: HA context
493  *
494  * Returns 0 on success.
495  */
496 int
497 qlafx00_pci_config(scsi_qla_host_t *vha)
498 {
499         uint16_t w;
500         struct qla_hw_data *ha = vha->hw;
501
502         pci_set_master(ha->pdev);
503         pci_try_set_mwi(ha->pdev);
504
505         pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
506         w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
507         w &= ~PCI_COMMAND_INTX_DISABLE;
508         pci_write_config_word(ha->pdev, PCI_COMMAND, w);
509
510         /* PCIe -- adjust Maximum Read Request Size (2048). */
511         if (pci_is_pcie(ha->pdev))
512                 pcie_set_readrq(ha->pdev, 2048);
513
514         ha->chip_revision = ha->pdev->revision;
515
516         return QLA_SUCCESS;
517 }
518
519 /**
520  * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
521  * @vha: HA context
522  *
523  */
524 static inline void
525 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
526 {
527         unsigned long flags = 0;
528         struct qla_hw_data *ha = vha->hw;
529         int i, core;
530         uint32_t cnt;
531         uint32_t reg_val;
532
533         spin_lock_irqsave(&ha->hardware_lock, flags);
534
535         QLAFX00_SET_HBA_SOC_REG(ha, 0x80004, 0);
536         QLAFX00_SET_HBA_SOC_REG(ha, 0x82004, 0);
537
538         /* stop the XOR DMA engines */
539         QLAFX00_SET_HBA_SOC_REG(ha, 0x60920, 0x02);
540         QLAFX00_SET_HBA_SOC_REG(ha, 0x60924, 0x02);
541         QLAFX00_SET_HBA_SOC_REG(ha, 0xf0920, 0x02);
542         QLAFX00_SET_HBA_SOC_REG(ha, 0xf0924, 0x02);
543
544         /* stop the IDMA engines */
545         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60840);
546         reg_val &= ~(1<<12);
547         QLAFX00_SET_HBA_SOC_REG(ha, 0x60840, reg_val);
548
549         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60844);
550         reg_val &= ~(1<<12);
551         QLAFX00_SET_HBA_SOC_REG(ha, 0x60844, reg_val);
552
553         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60848);
554         reg_val &= ~(1<<12);
555         QLAFX00_SET_HBA_SOC_REG(ha, 0x60848, reg_val);
556
557         reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x6084C);
558         reg_val &= ~(1<<12);
559         QLAFX00_SET_HBA_SOC_REG(ha, 0x6084C, reg_val);
560
561         for (i = 0; i < 100000; i++) {
562                 if ((QLAFX00_GET_HBA_SOC_REG(ha, 0xd0000) & 0x10000000) == 0 &&
563                     (QLAFX00_GET_HBA_SOC_REG(ha, 0x10600) & 0x1) == 0)
564                         break;
565                 udelay(100);
566         }
567
568         /* Set all 4 cores in reset */
569         for (i = 0; i < 4; i++) {
570                 QLAFX00_SET_HBA_SOC_REG(ha,
571                     (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
572                 QLAFX00_SET_HBA_SOC_REG(ha,
573                     (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
574         }
575
576         /* Reset all units in Fabric */
577         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x011f0101));
578
579         /* */
580         QLAFX00_SET_HBA_SOC_REG(ha, 0x10610, 1);
581         QLAFX00_SET_HBA_SOC_REG(ha, 0x10600, 0);
582
583         /* Set all 4 core Memory Power Down Registers */
584         for (i = 0; i < 5; i++) {
585                 QLAFX00_SET_HBA_SOC_REG(ha,
586                     (SOC_PWR_MANAGEMENT_PWR_DOWN_REG + 4*i), (0x0));
587         }
588
589         /* Reset all interrupt control registers */
590         for (i = 0; i < 115; i++) {
591                 QLAFX00_SET_HBA_SOC_REG(ha,
592                     (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
593         }
594
595         /* Reset Timers control registers. per core */
596         for (core = 0; core < 4; core++)
597                 for (i = 0; i < 8; i++)
598                         QLAFX00_SET_HBA_SOC_REG(ha,
599                             (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
600
601         /* Reset per core IRQ ack register */
602         for (core = 0; core < 4; core++)
603                 QLAFX00_SET_HBA_SOC_REG(ha,
604                     (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
605
606         /* Set Fabric control and config to defaults */
607         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
608         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
609
610         /* Kick in Fabric units */
611         QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
612
613         /* Kick in Core0 to start boot process */
614         QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
615
616         spin_unlock_irqrestore(&ha->hardware_lock, flags);
617
618         /* Wait 10secs for soft-reset to complete. */
619         for (cnt = 10; cnt; cnt--) {
620                 msleep(1000);
621                 barrier();
622         }
623 }
624
625 /**
626  * qlafx00_soft_reset() - Soft Reset ISPFx00.
627  * @vha: HA context
628  *
629  * Returns 0 on success.
630  */
631 int
632 qlafx00_soft_reset(scsi_qla_host_t *vha)
633 {
634         struct qla_hw_data *ha = vha->hw;
635         int rval = QLA_FUNCTION_FAILED;
636
637         if (unlikely(pci_channel_offline(ha->pdev) &&
638             ha->flags.pci_channel_io_perm_failure))
639                 return rval;
640
641         ha->isp_ops->disable_intrs(ha);
642         qlafx00_soc_cpu_reset(vha);
643
644         return QLA_SUCCESS;
645 }
646
647 /**
648  * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
649  * @vha: HA context
650  *
651  * Returns 0 on success.
652  */
653 int
654 qlafx00_chip_diag(scsi_qla_host_t *vha)
655 {
656         int rval = 0;
657         struct qla_hw_data *ha = vha->hw;
658         struct req_que *req = ha->req_q_map[0];
659
660         ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
661
662         rval = qlafx00_mbx_reg_test(vha);
663         if (rval) {
664                 ql_log(ql_log_warn, vha, 0x1165,
665                     "Failed mailbox send register test\n");
666         } else {
667                 /* Flag a successful rval */
668                 rval = QLA_SUCCESS;
669         }
670         return rval;
671 }
672
673 void
674 qlafx00_config_rings(struct scsi_qla_host *vha)
675 {
676         struct qla_hw_data *ha = vha->hw;
677         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
678
679         WRT_REG_DWORD(&reg->req_q_in, 0);
680         WRT_REG_DWORD(&reg->req_q_out, 0);
681
682         WRT_REG_DWORD(&reg->rsp_q_in, 0);
683         WRT_REG_DWORD(&reg->rsp_q_out, 0);
684
685         /* PCI posting */
686         RD_REG_DWORD(&reg->rsp_q_out);
687 }
688
689 char *
690 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len)
691 {
692         struct qla_hw_data *ha = vha->hw;
693
694         if (pci_is_pcie(ha->pdev))
695                 strlcpy(str, "PCIe iSA", str_len);
696         return str;
697 }
698
699 char *
700 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
701 {
702         struct qla_hw_data *ha = vha->hw;
703
704         snprintf(str, size, "%s", ha->mr.fw_version);
705         return str;
706 }
707
708 void
709 qlafx00_enable_intrs(struct qla_hw_data *ha)
710 {
711         unsigned long flags = 0;
712
713         spin_lock_irqsave(&ha->hardware_lock, flags);
714         ha->interrupts_on = 1;
715         QLAFX00_ENABLE_ICNTRL_REG(ha);
716         spin_unlock_irqrestore(&ha->hardware_lock, flags);
717 }
718
719 void
720 qlafx00_disable_intrs(struct qla_hw_data *ha)
721 {
722         unsigned long flags = 0;
723
724         spin_lock_irqsave(&ha->hardware_lock, flags);
725         ha->interrupts_on = 0;
726         QLAFX00_DISABLE_ICNTRL_REG(ha);
727         spin_unlock_irqrestore(&ha->hardware_lock, flags);
728 }
729
730 int
731 qlafx00_abort_target(fc_port_t *fcport, uint64_t l, int tag)
732 {
733         return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
734 }
735
736 int
737 qlafx00_lun_reset(fc_port_t *fcport, uint64_t l, int tag)
738 {
739         return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
740 }
741
742 int
743 qlafx00_loop_reset(scsi_qla_host_t *vha)
744 {
745         int ret;
746         struct fc_port *fcport;
747         struct qla_hw_data *ha = vha->hw;
748
749         if (ql2xtargetreset) {
750                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
751                         if (fcport->port_type != FCT_TARGET)
752                                 continue;
753
754                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
755                         if (ret != QLA_SUCCESS) {
756                                 ql_dbg(ql_dbg_taskm, vha, 0x803d,
757                                     "Bus Reset failed: Reset=%d "
758                                     "d_id=%x.\n", ret, fcport->d_id.b24);
759                         }
760                 }
761         }
762         return QLA_SUCCESS;
763 }
764
765 int
766 qlafx00_iospace_config(struct qla_hw_data *ha)
767 {
768         if (pci_request_selected_regions(ha->pdev, ha->bars,
769             QLA2XXX_DRIVER_NAME)) {
770                 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
771                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
772                     pci_name(ha->pdev));
773                 goto iospace_error_exit;
774         }
775
776         /* Use MMIO operations for all accesses. */
777         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
778                 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
779                     "Invalid pci I/O region size (%s).\n",
780                     pci_name(ha->pdev));
781                 goto iospace_error_exit;
782         }
783         if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
784                 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
785                     "Invalid PCI mem BAR0 region size (%s), aborting\n",
786                         pci_name(ha->pdev));
787                 goto iospace_error_exit;
788         }
789
790         ha->cregbase =
791             ioremap(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
792         if (!ha->cregbase) {
793                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
794                     "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
795                 goto iospace_error_exit;
796         }
797
798         if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
799                 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
800                     "region #2 not an MMIO resource (%s), aborting\n",
801                     pci_name(ha->pdev));
802                 goto iospace_error_exit;
803         }
804         if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
805                 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
806                     "Invalid PCI mem BAR2 region size (%s), aborting\n",
807                         pci_name(ha->pdev));
808                 goto iospace_error_exit;
809         }
810
811         ha->iobase =
812             ioremap(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
813         if (!ha->iobase) {
814                 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
815                     "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
816                 goto iospace_error_exit;
817         }
818
819         /* Determine queue resources */
820         ha->max_req_queues = ha->max_rsp_queues = 1;
821
822         ql_log_pci(ql_log_info, ha->pdev, 0x012c,
823             "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
824             ha->bars, ha->cregbase, ha->iobase);
825
826         return 0;
827
828 iospace_error_exit:
829         return -ENOMEM;
830 }
831
832 static void
833 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
834 {
835         struct qla_hw_data *ha = vha->hw;
836         struct req_que *req = ha->req_q_map[0];
837         struct rsp_que *rsp = ha->rsp_q_map[0];
838
839         req->length_fx00 = req->length;
840         req->ring_fx00 = req->ring;
841         req->dma_fx00 = req->dma;
842
843         rsp->length_fx00 = rsp->length;
844         rsp->ring_fx00 = rsp->ring;
845         rsp->dma_fx00 = rsp->dma;
846
847         ql_dbg(ql_dbg_init, vha, 0x012d,
848             "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
849             "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
850             req->length_fx00, (u64)req->dma_fx00);
851
852         ql_dbg(ql_dbg_init, vha, 0x012e,
853             "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
854             "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
855             rsp->length_fx00, (u64)rsp->dma_fx00);
856 }
857
858 static int
859 qlafx00_config_queues(struct scsi_qla_host *vha)
860 {
861         struct qla_hw_data *ha = vha->hw;
862         struct req_que *req = ha->req_q_map[0];
863         struct rsp_que *rsp = ha->rsp_q_map[0];
864         dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
865
866         req->length = ha->req_que_len;
867         req->ring = (void __force *)ha->iobase + ha->req_que_off;
868         req->dma = bar2_hdl + ha->req_que_off;
869         if ((!req->ring) || (req->length == 0)) {
870                 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
871                     "Unable to allocate memory for req_ring\n");
872                 return QLA_FUNCTION_FAILED;
873         }
874
875         ql_dbg(ql_dbg_init, vha, 0x0130,
876             "req: %p req_ring pointer %p req len 0x%x "
877             "req off 0x%x\n, req->dma: 0x%llx",
878             req, req->ring, req->length,
879             ha->req_que_off, (u64)req->dma);
880
881         rsp->length = ha->rsp_que_len;
882         rsp->ring = (void __force *)ha->iobase + ha->rsp_que_off;
883         rsp->dma = bar2_hdl + ha->rsp_que_off;
884         if ((!rsp->ring) || (rsp->length == 0)) {
885                 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
886                     "Unable to allocate memory for rsp_ring\n");
887                 return QLA_FUNCTION_FAILED;
888         }
889
890         ql_dbg(ql_dbg_init, vha, 0x0132,
891             "rsp: %p rsp_ring pointer %p rsp len 0x%x "
892             "rsp off 0x%x, rsp->dma: 0x%llx\n",
893             rsp, rsp->ring, rsp->length,
894             ha->rsp_que_off, (u64)rsp->dma);
895
896         return QLA_SUCCESS;
897 }
898
899 static int
900 qlafx00_init_fw_ready(scsi_qla_host_t *vha)
901 {
902         int rval = 0;
903         unsigned long wtime;
904         uint16_t wait_time;     /* Wait time */
905         struct qla_hw_data *ha = vha->hw;
906         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
907         uint32_t aenmbx, aenmbx7 = 0;
908         uint32_t pseudo_aen;
909         uint32_t state[5];
910         bool done = false;
911
912         /* 30 seconds wait - Adjust if required */
913         wait_time = 30;
914
915         pseudo_aen = RD_REG_DWORD(&reg->pseudoaen);
916         if (pseudo_aen == 1) {
917                 aenmbx7 = RD_REG_DWORD(&reg->initval7);
918                 ha->mbx_intr_code = MSW(aenmbx7);
919                 ha->rqstq_intr_code = LSW(aenmbx7);
920                 rval = qlafx00_driver_shutdown(vha, 10);
921                 if (rval != QLA_SUCCESS)
922                         qlafx00_soft_reset(vha);
923         }
924
925         /* wait time before firmware ready */
926         wtime = jiffies + (wait_time * HZ);
927         do {
928                 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
929                 barrier();
930                 ql_dbg(ql_dbg_mbx, vha, 0x0133,
931                     "aenmbx: 0x%x\n", aenmbx);
932
933                 switch (aenmbx) {
934                 case MBA_FW_NOT_STARTED:
935                 case MBA_FW_STARTING:
936                         break;
937
938                 case MBA_SYSTEM_ERR:
939                 case MBA_REQ_TRANSFER_ERR:
940                 case MBA_RSP_TRANSFER_ERR:
941                 case MBA_FW_INIT_FAILURE:
942                         qlafx00_soft_reset(vha);
943                         break;
944
945                 case MBA_FW_RESTART_CMPLT:
946                         /* Set the mbx and rqstq intr code */
947                         aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
948                         ha->mbx_intr_code = MSW(aenmbx7);
949                         ha->rqstq_intr_code = LSW(aenmbx7);
950                         ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
951                         ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
952                         ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
953                         ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
954                         WRT_REG_DWORD(&reg->aenmailbox0, 0);
955                         RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
956                         ql_dbg(ql_dbg_init, vha, 0x0134,
957                             "f/w returned mbx_intr_code: 0x%x, "
958                             "rqstq_intr_code: 0x%x\n",
959                             ha->mbx_intr_code, ha->rqstq_intr_code);
960                         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
961                         rval = QLA_SUCCESS;
962                         done = true;
963                         break;
964
965                 default:
966                         if ((aenmbx & 0xFF00) == MBA_FW_INIT_INPROGRESS)
967                                 break;
968
969                         /* If fw is apparently not ready. In order to continue,
970                          * we might need to issue Mbox cmd, but the problem is
971                          * that the DoorBell vector values that come with the
972                          * 8060 AEN are most likely gone by now (and thus no
973                          * bell would be rung on the fw side when mbox cmd is
974                          * issued). We have to therefore grab the 8060 AEN
975                          * shadow regs (filled in by FW when the last 8060
976                          * AEN was being posted).
977                          * Do the following to determine what is needed in
978                          * order to get the FW ready:
979                          * 1. reload the 8060 AEN values from the shadow regs
980                          * 2. clear int status to get rid of possible pending
981                          *    interrupts
982                          * 3. issue Get FW State Mbox cmd to determine fw state
983                          * Set the mbx and rqstq intr code from Shadow Regs
984                          */
985                         aenmbx7 = RD_REG_DWORD(&reg->initval7);
986                         ha->mbx_intr_code = MSW(aenmbx7);
987                         ha->rqstq_intr_code = LSW(aenmbx7);
988                         ha->req_que_off = RD_REG_DWORD(&reg->initval1);
989                         ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
990                         ha->req_que_len = RD_REG_DWORD(&reg->initval5);
991                         ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
992                         ql_dbg(ql_dbg_init, vha, 0x0135,
993                             "f/w returned mbx_intr_code: 0x%x, "
994                             "rqstq_intr_code: 0x%x\n",
995                             ha->mbx_intr_code, ha->rqstq_intr_code);
996                         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
997
998                         /* Get the FW state */
999                         rval = qlafx00_get_firmware_state(vha, state);
1000                         if (rval != QLA_SUCCESS) {
1001                                 /* Retry if timer has not expired */
1002                                 break;
1003                         }
1004
1005                         if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
1006                                 /* Firmware is waiting to be
1007                                  * initialized by driver
1008                                  */
1009                                 rval = QLA_SUCCESS;
1010                                 done = true;
1011                                 break;
1012                         }
1013
1014                         /* Issue driver shutdown and wait until f/w recovers.
1015                          * Driver should continue to poll until 8060 AEN is
1016                          * received indicating firmware recovery.
1017                          */
1018                         ql_dbg(ql_dbg_init, vha, 0x0136,
1019                             "Sending Driver shutdown fw_state 0x%x\n",
1020                             state[0]);
1021
1022                         rval = qlafx00_driver_shutdown(vha, 10);
1023                         if (rval != QLA_SUCCESS) {
1024                                 rval = QLA_FUNCTION_FAILED;
1025                                 break;
1026                         }
1027                         msleep(500);
1028
1029                         wtime = jiffies + (wait_time * HZ);
1030                         break;
1031                 }
1032
1033                 if (!done) {
1034                         if (time_after_eq(jiffies, wtime)) {
1035                                 ql_dbg(ql_dbg_init, vha, 0x0137,
1036                                     "Init f/w failed: aen[7]: 0x%x\n",
1037                                     RD_REG_DWORD(&reg->aenmailbox7));
1038                                 rval = QLA_FUNCTION_FAILED;
1039                                 done = true;
1040                                 break;
1041                         }
1042                         /* Delay for a while */
1043                         msleep(500);
1044                 }
1045         } while (!done);
1046
1047         if (rval)
1048                 ql_dbg(ql_dbg_init, vha, 0x0138,
1049                     "%s **** FAILED ****.\n", __func__);
1050         else
1051                 ql_dbg(ql_dbg_init, vha, 0x0139,
1052                     "%s **** SUCCESS ****.\n", __func__);
1053
1054         return rval;
1055 }
1056
1057 /*
1058  * qlafx00_fw_ready() - Waits for firmware ready.
1059  * @ha: HA context
1060  *
1061  * Returns 0 on success.
1062  */
1063 int
1064 qlafx00_fw_ready(scsi_qla_host_t *vha)
1065 {
1066         int             rval;
1067         unsigned long   wtime;
1068         uint16_t        wait_time;      /* Wait time if loop is coming ready */
1069         uint32_t        state[5];
1070
1071         rval = QLA_SUCCESS;
1072
1073         wait_time = 10;
1074
1075         /* wait time before firmware ready */
1076         wtime = jiffies + (wait_time * HZ);
1077
1078         /* Wait for ISP to finish init */
1079         if (!vha->flags.init_done)
1080                 ql_dbg(ql_dbg_init, vha, 0x013a,
1081                     "Waiting for init to complete...\n");
1082
1083         do {
1084                 rval = qlafx00_get_firmware_state(vha, state);
1085
1086                 if (rval == QLA_SUCCESS) {
1087                         if (state[0] == FSTATE_FX00_INITIALIZED) {
1088                                 ql_dbg(ql_dbg_init, vha, 0x013b,
1089                                     "fw_state=%x\n", state[0]);
1090                                 rval = QLA_SUCCESS;
1091                                         break;
1092                         }
1093                 }
1094                 rval = QLA_FUNCTION_FAILED;
1095
1096                 if (time_after_eq(jiffies, wtime))
1097                         break;
1098
1099                 /* Delay for a while */
1100                 msleep(500);
1101
1102                 ql_dbg(ql_dbg_init, vha, 0x013c,
1103                     "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1104         } while (1);
1105
1106
1107         if (rval)
1108                 ql_dbg(ql_dbg_init, vha, 0x013d,
1109                     "Firmware ready **** FAILED ****.\n");
1110         else
1111                 ql_dbg(ql_dbg_init, vha, 0x013e,
1112                     "Firmware ready **** SUCCESS ****.\n");
1113
1114         return rval;
1115 }
1116
1117 static int
1118 qlafx00_find_all_targets(scsi_qla_host_t *vha,
1119         struct list_head *new_fcports)
1120 {
1121         int             rval;
1122         uint16_t        tgt_id;
1123         fc_port_t       *fcport, *new_fcport;
1124         int             found;
1125         struct qla_hw_data *ha = vha->hw;
1126
1127         rval = QLA_SUCCESS;
1128
1129         if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1130                 return QLA_FUNCTION_FAILED;
1131
1132         if ((atomic_read(&vha->loop_down_timer) ||
1133              STATE_TRANSITION(vha))) {
1134                 atomic_set(&vha->loop_down_timer, 0);
1135                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1136                 return QLA_FUNCTION_FAILED;
1137         }
1138
1139         ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1140             "Listing Target bit map...\n");
1141         ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha, 0x2089,
1142             ha->gid_list, 32);
1143
1144         /* Allocate temporary rmtport for any new rmtports discovered. */
1145         new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1146         if (new_fcport == NULL)
1147                 return QLA_MEMORY_ALLOC_FAILED;
1148
1149         for_each_set_bit(tgt_id, (void *)ha->gid_list,
1150             QLAFX00_TGT_NODE_LIST_SIZE) {
1151
1152                 /* Send get target node info */
1153                 new_fcport->tgt_id = tgt_id;
1154                 rval = qlafx00_fx_disc(vha, new_fcport,
1155                     FXDISC_GET_TGT_NODE_INFO);
1156                 if (rval != QLA_SUCCESS) {
1157                         ql_log(ql_log_warn, vha, 0x208a,
1158                             "Target info scan failed -- assuming zero-entry "
1159                             "result...\n");
1160                         continue;
1161                 }
1162
1163                 /* Locate matching device in database. */
1164                 found = 0;
1165                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1166                         if (memcmp(new_fcport->port_name,
1167                             fcport->port_name, WWN_SIZE))
1168                                 continue;
1169
1170                         found++;
1171
1172                         /*
1173                          * If tgt_id is same and state FCS_ONLINE, nothing
1174                          * changed.
1175                          */
1176                         if (fcport->tgt_id == new_fcport->tgt_id &&
1177                             atomic_read(&fcport->state) == FCS_ONLINE)
1178                                 break;
1179
1180                         /*
1181                          * Tgt ID changed or device was marked to be updated.
1182                          */
1183                         ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1184                             "TGT-ID Change(%s): Present tgt id: "
1185                             "0x%x state: 0x%x "
1186                             "wwnn = %llx wwpn = %llx.\n",
1187                             __func__, fcport->tgt_id,
1188                             atomic_read(&fcport->state),
1189                             (unsigned long long)wwn_to_u64(fcport->node_name),
1190                             (unsigned long long)wwn_to_u64(fcport->port_name));
1191
1192                         ql_log(ql_log_info, vha, 0x208c,
1193                             "TGT-ID Announce(%s): Discovered tgt "
1194                             "id 0x%x wwnn = %llx "
1195                             "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1196                             (unsigned long long)
1197                             wwn_to_u64(new_fcport->node_name),
1198                             (unsigned long long)
1199                             wwn_to_u64(new_fcport->port_name));
1200
1201                         if (atomic_read(&fcport->state) != FCS_ONLINE) {
1202                                 fcport->old_tgt_id = fcport->tgt_id;
1203                                 fcport->tgt_id = new_fcport->tgt_id;
1204                                 ql_log(ql_log_info, vha, 0x208d,
1205                                    "TGT-ID: New fcport Added: %p\n", fcport);
1206                                 qla2x00_update_fcport(vha, fcport);
1207                         } else {
1208                                 ql_log(ql_log_info, vha, 0x208e,
1209                                     " Existing TGT-ID %x did not get "
1210                                     " offline event from firmware.\n",
1211                                     fcport->old_tgt_id);
1212                                 qla2x00_mark_device_lost(vha, fcport, 0);
1213                                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1214                                 qla2x00_free_fcport(new_fcport);
1215                                 return rval;
1216                         }
1217                         break;
1218                 }
1219
1220                 if (found)
1221                         continue;
1222
1223                 /* If device was not in our fcports list, then add it. */
1224                 list_add_tail(&new_fcport->list, new_fcports);
1225
1226                 /* Allocate a new replacement fcport. */
1227                 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1228                 if (new_fcport == NULL)
1229                         return QLA_MEMORY_ALLOC_FAILED;
1230         }
1231
1232         qla2x00_free_fcport(new_fcport);
1233         return rval;
1234 }
1235
1236 /*
1237  * qlafx00_configure_all_targets
1238  *      Setup target devices with node ID's.
1239  *
1240  * Input:
1241  *      ha = adapter block pointer.
1242  *
1243  * Returns:
1244  *      0 = success.
1245  *      BIT_0 = error
1246  */
1247 static int
1248 qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1249 {
1250         int rval;
1251         fc_port_t *fcport, *rmptemp;
1252         LIST_HEAD(new_fcports);
1253
1254         rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1255             FXDISC_GET_TGT_NODE_LIST);
1256         if (rval != QLA_SUCCESS) {
1257                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1258                 return rval;
1259         }
1260
1261         rval = qlafx00_find_all_targets(vha, &new_fcports);
1262         if (rval != QLA_SUCCESS) {
1263                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1264                 return rval;
1265         }
1266
1267         /*
1268          * Delete all previous devices marked lost.
1269          */
1270         list_for_each_entry(fcport, &vha->vp_fcports, list) {
1271                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1272                         break;
1273
1274                 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1275                         if (fcport->port_type != FCT_INITIATOR)
1276                                 qla2x00_mark_device_lost(vha, fcport, 0);
1277                 }
1278         }
1279
1280         /*
1281          * Add the new devices to our devices list.
1282          */
1283         list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1284                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1285                         break;
1286
1287                 qla2x00_update_fcport(vha, fcport);
1288                 list_move_tail(&fcport->list, &vha->vp_fcports);
1289                 ql_log(ql_log_info, vha, 0x208f,
1290                     "Attach new target id 0x%x wwnn = %llx "
1291                     "wwpn = %llx.\n",
1292                     fcport->tgt_id,
1293                     (unsigned long long)wwn_to_u64(fcport->node_name),
1294                     (unsigned long long)wwn_to_u64(fcport->port_name));
1295         }
1296
1297         /* Free all new device structures not processed. */
1298         list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1299                 list_del(&fcport->list);
1300                 qla2x00_free_fcport(fcport);
1301         }
1302
1303         return rval;
1304 }
1305
1306 /*
1307  * qlafx00_configure_devices
1308  *      Updates Fibre Channel Device Database with what is actually on loop.
1309  *
1310  * Input:
1311  *      ha                = adapter block pointer.
1312  *
1313  * Returns:
1314  *      0 = success.
1315  *      1 = error.
1316  *      2 = database was full and device was not configured.
1317  */
1318 int
1319 qlafx00_configure_devices(scsi_qla_host_t *vha)
1320 {
1321         int  rval;
1322         unsigned long flags;
1323
1324         rval = QLA_SUCCESS;
1325
1326         flags = vha->dpc_flags;
1327
1328         ql_dbg(ql_dbg_disc, vha, 0x2090,
1329             "Configure devices -- dpc flags =0x%lx\n", flags);
1330
1331         rval = qlafx00_configure_all_targets(vha);
1332
1333         if (rval == QLA_SUCCESS) {
1334                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1335                         rval = QLA_FUNCTION_FAILED;
1336                 } else {
1337                         atomic_set(&vha->loop_state, LOOP_READY);
1338                         ql_log(ql_log_info, vha, 0x2091,
1339                             "Device Ready\n");
1340                 }
1341         }
1342
1343         if (rval) {
1344                 ql_dbg(ql_dbg_disc, vha, 0x2092,
1345                     "%s *** FAILED ***.\n", __func__);
1346         } else {
1347                 ql_dbg(ql_dbg_disc, vha, 0x2093,
1348                     "%s: exiting normally.\n", __func__);
1349         }
1350         return rval;
1351 }
1352
1353 static void
1354 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
1355 {
1356         struct qla_hw_data *ha = vha->hw;
1357         fc_port_t *fcport;
1358
1359         vha->flags.online = 0;
1360         ha->mr.fw_hbt_en = 0;
1361
1362         if (!critemp) {
1363                 ha->flags.chip_reset_done = 0;
1364                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1365                 vha->qla_stats.total_isp_aborts++;
1366                 ql_log(ql_log_info, vha, 0x013f,
1367                     "Performing ISP error recovery - ha = %p.\n", ha);
1368                 ha->isp_ops->reset_chip(vha);
1369         }
1370
1371         if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1372                 atomic_set(&vha->loop_state, LOOP_DOWN);
1373                 atomic_set(&vha->loop_down_timer,
1374                     QLAFX00_LOOP_DOWN_TIME);
1375         } else {
1376                 if (!atomic_read(&vha->loop_down_timer))
1377                         atomic_set(&vha->loop_down_timer,
1378                             QLAFX00_LOOP_DOWN_TIME);
1379         }
1380
1381         /* Clear all async request states across all VPs. */
1382         list_for_each_entry(fcport, &vha->vp_fcports, list) {
1383                 fcport->flags = 0;
1384                 if (atomic_read(&fcport->state) == FCS_ONLINE)
1385                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1386         }
1387
1388         if (!ha->flags.eeh_busy) {
1389                 if (critemp) {
1390                         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1391                 } else {
1392                         /* Requeue all commands in outstanding command list. */
1393                         qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1394                 }
1395         }
1396
1397         qla2x00_free_irqs(vha);
1398         if (critemp)
1399                 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1400         else
1401                 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1402
1403         /* Clear the Interrupts */
1404         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1405
1406         ql_log(ql_log_info, vha, 0x0140,
1407             "%s Done done - ha=%p.\n", __func__, ha);
1408 }
1409
1410 /**
1411  * qlafx00_init_response_q_entries() - Initializes response queue entries.
1412  * @rsp: response queue
1413  *
1414  * Beginning of request ring has initialization control block already built
1415  * by nvram config routine.
1416  *
1417  * Returns 0 on success.
1418  */
1419 void
1420 qlafx00_init_response_q_entries(struct rsp_que *rsp)
1421 {
1422         uint16_t cnt;
1423         response_t *pkt;
1424
1425         rsp->ring_ptr = rsp->ring;
1426         rsp->ring_index    = 0;
1427         rsp->status_srb = NULL;
1428         pkt = rsp->ring_ptr;
1429         for (cnt = 0; cnt < rsp->length; cnt++) {
1430                 pkt->signature = RESPONSE_PROCESSED;
1431                 WRT_REG_DWORD((void __force __iomem *)&pkt->signature,
1432                     RESPONSE_PROCESSED);
1433                 pkt++;
1434         }
1435 }
1436
1437 int
1438 qlafx00_rescan_isp(scsi_qla_host_t *vha)
1439 {
1440         uint32_t status = QLA_FUNCTION_FAILED;
1441         struct qla_hw_data *ha = vha->hw;
1442         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1443         uint32_t aenmbx7;
1444
1445         qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1446
1447         aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1448         ha->mbx_intr_code = MSW(aenmbx7);
1449         ha->rqstq_intr_code = LSW(aenmbx7);
1450         ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1451         ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1452         ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1453         ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1454
1455         ql_dbg(ql_dbg_disc, vha, 0x2094,
1456             "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1457             " Req que offset 0x%x Rsp que offset 0x%x\n",
1458             ha->mbx_intr_code, ha->rqstq_intr_code,
1459             ha->req_que_off, ha->rsp_que_len);
1460
1461         /* Clear the Interrupts */
1462         QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1463
1464         status = qla2x00_init_rings(vha);
1465         if (!status) {
1466                 vha->flags.online = 1;
1467
1468                 /* if no cable then assume it's good */
1469                 if ((vha->device_flags & DFLG_NO_CABLE))
1470                         status = 0;
1471                 /* Register system information */
1472                 if (qlafx00_fx_disc(vha,
1473                     &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1474                         ql_dbg(ql_dbg_disc, vha, 0x2095,
1475                             "failed to register host info\n");
1476         }
1477         scsi_unblock_requests(vha->host);
1478         return status;
1479 }
1480
1481 void
1482 qlafx00_timer_routine(scsi_qla_host_t *vha)
1483 {
1484         struct qla_hw_data *ha = vha->hw;
1485         uint32_t fw_heart_beat;
1486         uint32_t aenmbx0;
1487         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1488         uint32_t tempc;
1489
1490         /* Check firmware health */
1491         if (ha->mr.fw_hbt_cnt)
1492                 ha->mr.fw_hbt_cnt--;
1493         else {
1494                 if ((!ha->flags.mr_reset_hdlr_active) &&
1495                     (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1496                     (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1497                     (ha->mr.fw_hbt_en)) {
1498                         fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1499                         if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1500                                 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1501                                 ha->mr.fw_hbt_miss_cnt = 0;
1502                         } else {
1503                                 ha->mr.fw_hbt_miss_cnt++;
1504                                 if (ha->mr.fw_hbt_miss_cnt ==
1505                                     QLAFX00_HEARTBEAT_MISS_CNT) {
1506                                         set_bit(ISP_ABORT_NEEDED,
1507                                             &vha->dpc_flags);
1508                                         qla2xxx_wake_dpc(vha);
1509                                         ha->mr.fw_hbt_miss_cnt = 0;
1510                                 }
1511                         }
1512                 }
1513                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1514         }
1515
1516         if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1517                 /* Reset recovery to be performed in timer routine */
1518                 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1519                 if (ha->mr.fw_reset_timer_exp) {
1520                         set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1521                         qla2xxx_wake_dpc(vha);
1522                         ha->mr.fw_reset_timer_exp = 0;
1523                 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1524                         /* Wake up DPC to rescan the targets */
1525                         set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1526                         clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1527                         qla2xxx_wake_dpc(vha);
1528                         ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1529                 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1530                     (!ha->mr.fw_hbt_en)) {
1531                         ha->mr.fw_hbt_en = 1;
1532                 } else if (!ha->mr.fw_reset_timer_tick) {
1533                         if (aenmbx0 == ha->mr.old_aenmbx0_state)
1534                                 ha->mr.fw_reset_timer_exp = 1;
1535                         ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1536                 } else if (aenmbx0 == 0xFFFFFFFF) {
1537                         uint32_t data0, data1;
1538
1539                         data0 = QLAFX00_RD_REG(ha,
1540                             QLAFX00_BAR1_BASE_ADDR_REG);
1541                         data1 = QLAFX00_RD_REG(ha,
1542                             QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1543
1544                         data0 &= 0xffff0000;
1545                         data1 &= 0x0000ffff;
1546
1547                         QLAFX00_WR_REG(ha,
1548                             QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1549                             (data0 | data1));
1550                 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1551                         ha->mr.fw_reset_timer_tick =
1552                             QLAFX00_MAX_RESET_INTERVAL;
1553                 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1554                         ha->mr.fw_reset_timer_tick =
1555                             QLAFX00_MAX_RESET_INTERVAL;
1556                 }
1557                 if (ha->mr.old_aenmbx0_state != aenmbx0) {
1558                         ha->mr.old_aenmbx0_state = aenmbx0;
1559                         ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1560                 }
1561                 ha->mr.fw_reset_timer_tick--;
1562         }
1563         if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1564                 /*
1565                  * Critical temperature recovery to be
1566                  * performed in timer routine
1567                  */
1568                 if (ha->mr.fw_critemp_timer_tick == 0) {
1569                         tempc = QLAFX00_GET_TEMPERATURE(ha);
1570                         ql_dbg(ql_dbg_timer, vha, 0x6012,
1571                             "ISPFx00(%s): Critical temp timer, "
1572                             "current SOC temperature: %d\n",
1573                             __func__, tempc);
1574                         if (tempc < ha->mr.critical_temperature) {
1575                                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1576                                 clear_bit(FX00_CRITEMP_RECOVERY,
1577                                     &vha->dpc_flags);
1578                                 qla2xxx_wake_dpc(vha);
1579                         }
1580                         ha->mr.fw_critemp_timer_tick =
1581                             QLAFX00_CRITEMP_INTERVAL;
1582                 } else {
1583                         ha->mr.fw_critemp_timer_tick--;
1584                 }
1585         }
1586         if (ha->mr.host_info_resend) {
1587                 /*
1588                  * Incomplete host info might be sent to firmware
1589                  * durinng system boot - info should be resend
1590                  */
1591                 if (ha->mr.hinfo_resend_timer_tick == 0) {
1592                         ha->mr.host_info_resend = false;
1593                         set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags);
1594                         ha->mr.hinfo_resend_timer_tick =
1595                             QLAFX00_HINFO_RESEND_INTERVAL;
1596                         qla2xxx_wake_dpc(vha);
1597                 } else {
1598                         ha->mr.hinfo_resend_timer_tick--;
1599                 }
1600         }
1601
1602 }
1603
1604 /*
1605  *  qlfx00a_reset_initialize
1606  *      Re-initialize after a iSA device reset.
1607  *
1608  * Input:
1609  *      ha  = adapter block pointer.
1610  *
1611  * Returns:
1612  *      0 = success
1613  */
1614 int
1615 qlafx00_reset_initialize(scsi_qla_host_t *vha)
1616 {
1617         struct qla_hw_data *ha = vha->hw;
1618
1619         if (vha->device_flags & DFLG_DEV_FAILED) {
1620                 ql_dbg(ql_dbg_init, vha, 0x0142,
1621                     "Device in failed state\n");
1622                 return QLA_SUCCESS;
1623         }
1624
1625         ha->flags.mr_reset_hdlr_active = 1;
1626
1627         if (vha->flags.online) {
1628                 scsi_block_requests(vha->host);
1629                 qlafx00_abort_isp_cleanup(vha, false);
1630         }
1631
1632         ql_log(ql_log_info, vha, 0x0143,
1633             "(%s): succeeded.\n", __func__);
1634         ha->flags.mr_reset_hdlr_active = 0;
1635         return QLA_SUCCESS;
1636 }
1637
1638 /*
1639  *  qlafx00_abort_isp
1640  *      Resets ISP and aborts all outstanding commands.
1641  *
1642  * Input:
1643  *      ha  = adapter block pointer.
1644  *
1645  * Returns:
1646  *      0 = success
1647  */
1648 int
1649 qlafx00_abort_isp(scsi_qla_host_t *vha)
1650 {
1651         struct qla_hw_data *ha = vha->hw;
1652
1653         if (vha->flags.online) {
1654                 if (unlikely(pci_channel_offline(ha->pdev) &&
1655                     ha->flags.pci_channel_io_perm_failure)) {
1656                         clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1657                         return QLA_SUCCESS;
1658                 }
1659
1660                 scsi_block_requests(vha->host);
1661                 qlafx00_abort_isp_cleanup(vha, false);
1662         } else {
1663                 scsi_block_requests(vha->host);
1664                 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1665                 vha->qla_stats.total_isp_aborts++;
1666                 ha->isp_ops->reset_chip(vha);
1667                 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1668                 /* Clear the Interrupts */
1669                 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1670         }
1671
1672         ql_log(ql_log_info, vha, 0x0145,
1673             "(%s): succeeded.\n", __func__);
1674
1675         return QLA_SUCCESS;
1676 }
1677
1678 static inline fc_port_t*
1679 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1680 {
1681         fc_port_t       *fcport;
1682
1683         /* Check for matching device in remote port list. */
1684         list_for_each_entry(fcport, &vha->vp_fcports, list) {
1685                 if (fcport->tgt_id == tgt_id) {
1686                         ql_dbg(ql_dbg_async, vha, 0x5072,
1687                             "Matching fcport(%p) found with TGT-ID: 0x%x "
1688                             "and Remote TGT_ID: 0x%x\n",
1689                             fcport, fcport->tgt_id, tgt_id);
1690                         return fcport;
1691                 }
1692         }
1693         return NULL;
1694 }
1695
1696 static void
1697 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1698 {
1699         fc_port_t       *fcport;
1700
1701         ql_log(ql_log_info, vha, 0x5073,
1702             "Detach TGT-ID: 0x%x\n", tgt_id);
1703
1704         fcport = qlafx00_get_fcport(vha, tgt_id);
1705         if (!fcport)
1706                 return;
1707
1708         qla2x00_mark_device_lost(vha, fcport, 0);
1709
1710         return;
1711 }
1712
1713 int
1714 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1715 {
1716         int rval = 0;
1717         uint32_t aen_code, aen_data;
1718
1719         aen_code = FCH_EVT_VENDOR_UNIQUE;
1720         aen_data = evt->u.aenfx.evtcode;
1721
1722         switch (evt->u.aenfx.evtcode) {
1723         case QLAFX00_MBA_PORT_UPDATE:           /* Port database update */
1724                 if (evt->u.aenfx.mbx[1] == 0) {
1725                         if (evt->u.aenfx.mbx[2] == 1) {
1726                                 if (!vha->flags.fw_tgt_reported)
1727                                         vha->flags.fw_tgt_reported = 1;
1728                                 atomic_set(&vha->loop_down_timer, 0);
1729                                 atomic_set(&vha->loop_state, LOOP_UP);
1730                                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1731                                 qla2xxx_wake_dpc(vha);
1732                         } else if (evt->u.aenfx.mbx[2] == 2) {
1733                                 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1734                         }
1735                 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1736                         if (evt->u.aenfx.mbx[2] == 1) {
1737                                 if (!vha->flags.fw_tgt_reported)
1738                                         vha->flags.fw_tgt_reported = 1;
1739                                 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1740                         } else if (evt->u.aenfx.mbx[2] == 2) {
1741                                 vha->device_flags |= DFLG_NO_CABLE;
1742                                 qla2x00_mark_all_devices_lost(vha);
1743                         }
1744                 }
1745                 break;
1746         case QLAFX00_MBA_LINK_UP:
1747                 aen_code = FCH_EVT_LINKUP;
1748                 aen_data = 0;
1749                 break;
1750         case QLAFX00_MBA_LINK_DOWN:
1751                 aen_code = FCH_EVT_LINKDOWN;
1752                 aen_data = 0;
1753                 break;
1754         case QLAFX00_MBA_TEMP_CRIT:     /* Critical temperature event */
1755                 ql_log(ql_log_info, vha, 0x5082,
1756                     "Process critical temperature event "
1757                     "aenmb[0]: %x\n",
1758                     evt->u.aenfx.evtcode);
1759                 scsi_block_requests(vha->host);
1760                 qlafx00_abort_isp_cleanup(vha, true);
1761                 scsi_unblock_requests(vha->host);
1762                 break;
1763         }
1764
1765         fc_host_post_event(vha->host, fc_get_event_number(),
1766             aen_code, aen_data);
1767
1768         return rval;
1769 }
1770
1771 static void
1772 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1773 {
1774         u64 port_name = 0, node_name = 0;
1775
1776         port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1777         node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1778
1779         fc_host_node_name(vha->host) = node_name;
1780         fc_host_port_name(vha->host) = port_name;
1781         if (!pinfo->port_type)
1782                 vha->hw->current_topology = ISP_CFG_F;
1783         if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1784                 atomic_set(&vha->loop_state, LOOP_READY);
1785         else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1786                 atomic_set(&vha->loop_state, LOOP_DOWN);
1787         vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1788 }
1789
1790 static void
1791 qla2x00_fxdisc_iocb_timeout(void *data)
1792 {
1793         srb_t *sp = data;
1794         struct srb_iocb *lio = &sp->u.iocb_cmd;
1795
1796         complete(&lio->u.fxiocb.fxiocb_comp);
1797 }
1798
1799 static void qla2x00_fxdisc_sp_done(srb_t *sp, int res)
1800 {
1801         struct srb_iocb *lio = &sp->u.iocb_cmd;
1802
1803         complete(&lio->u.fxiocb.fxiocb_comp);
1804 }
1805
1806 int
1807 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
1808 {
1809         srb_t *sp;
1810         struct srb_iocb *fdisc;
1811         int rval = QLA_FUNCTION_FAILED;
1812         struct qla_hw_data *ha = vha->hw;
1813         struct host_system_info *phost_info;
1814         struct register_host_info *preg_hsi;
1815         struct new_utsname *p_sysid = NULL;
1816
1817         sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1818         if (!sp)
1819                 goto done;
1820
1821         sp->type = SRB_FXIOCB_DCMD;
1822         sp->name = "fxdisc";
1823
1824         fdisc = &sp->u.iocb_cmd;
1825         fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1826         qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1827
1828         switch (fx_type) {
1829         case FXDISC_GET_CONFIG_INFO:
1830         fdisc->u.fxiocb.flags =
1831                     SRB_FXDISC_RESP_DMA_VALID;
1832                 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1833                 break;
1834         case FXDISC_GET_PORT_INFO:
1835                 fdisc->u.fxiocb.flags =
1836                     SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1837                 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
1838                 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
1839                 break;
1840         case FXDISC_GET_TGT_NODE_INFO:
1841                 fdisc->u.fxiocb.flags =
1842                     SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1843                 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
1844                 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
1845                 break;
1846         case FXDISC_GET_TGT_NODE_LIST:
1847                 fdisc->u.fxiocb.flags =
1848                     SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1849                 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1850                 break;
1851         case FXDISC_REG_HOST_INFO:
1852                 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1853                 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1854                 p_sysid = utsname();
1855                 if (!p_sysid) {
1856                         ql_log(ql_log_warn, vha, 0x303c,
1857                             "Not able to get the system information\n");
1858                         goto done_free_sp;
1859                 }
1860                 break;
1861         case FXDISC_ABORT_IOCTL:
1862         default:
1863                 break;
1864         }
1865
1866         if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1867                 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1868                     fdisc->u.fxiocb.req_len,
1869                     &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1870                 if (!fdisc->u.fxiocb.req_addr)
1871                         goto done_free_sp;
1872
1873                 if (fx_type == FXDISC_REG_HOST_INFO) {
1874                         preg_hsi = (struct register_host_info *)
1875                                 fdisc->u.fxiocb.req_addr;
1876                         phost_info = &preg_hsi->hsi;
1877                         memset(preg_hsi, 0, sizeof(struct register_host_info));
1878                         phost_info->os_type = OS_TYPE_LINUX;
1879                         strlcpy(phost_info->sysname, p_sysid->sysname,
1880                                 sizeof(phost_info->sysname));
1881                         strlcpy(phost_info->nodename, p_sysid->nodename,
1882                                 sizeof(phost_info->nodename));
1883                         if (!strcmp(phost_info->nodename, "(none)"))
1884                                 ha->mr.host_info_resend = true;
1885                         strlcpy(phost_info->release, p_sysid->release,
1886                                 sizeof(phost_info->release));
1887                         strlcpy(phost_info->version, p_sysid->version,
1888                                 sizeof(phost_info->version));
1889                         strlcpy(phost_info->machine, p_sysid->machine,
1890                                 sizeof(phost_info->machine));
1891                         strlcpy(phost_info->domainname, p_sysid->domainname,
1892                                 sizeof(phost_info->domainname));
1893                         strlcpy(phost_info->hostdriver, QLA2XXX_VERSION,
1894                                 sizeof(phost_info->hostdriver));
1895                         preg_hsi->utc = (uint64_t)ktime_get_real_seconds();
1896                         ql_dbg(ql_dbg_init, vha, 0x0149,
1897                             "ISP%04X: Host registration with firmware\n",
1898                             ha->pdev->device);
1899                         ql_dbg(ql_dbg_init, vha, 0x014a,
1900                             "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1901                             phost_info->os_type,
1902                             phost_info->sysname,
1903                             phost_info->nodename);
1904                         ql_dbg(ql_dbg_init, vha, 0x014b,
1905                             "release = '%s', version = '%s'\n",
1906                             phost_info->release,
1907                             phost_info->version);
1908                         ql_dbg(ql_dbg_init, vha, 0x014c,
1909                             "machine = '%s' "
1910                             "domainname = '%s', hostdriver = '%s'\n",
1911                             phost_info->machine,
1912                             phost_info->domainname,
1913                             phost_info->hostdriver);
1914                         ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1915                             phost_info, sizeof(*phost_info));
1916                 }
1917         }
1918
1919         if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1920                 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1921                     fdisc->u.fxiocb.rsp_len,
1922                     &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1923                 if (!fdisc->u.fxiocb.rsp_addr)
1924                         goto done_unmap_req;
1925         }
1926
1927         fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
1928         sp->done = qla2x00_fxdisc_sp_done;
1929
1930         rval = qla2x00_start_sp(sp);
1931         if (rval != QLA_SUCCESS)
1932                 goto done_unmap_dma;
1933
1934         wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1935
1936         if (fx_type == FXDISC_GET_CONFIG_INFO) {
1937                 struct config_info_data *pinfo =
1938                     (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
1939                 strlcpy(vha->hw->model_number, pinfo->model_num,
1940                         ARRAY_SIZE(vha->hw->model_number));
1941                 strlcpy(vha->hw->model_desc, pinfo->model_description,
1942                         ARRAY_SIZE(vha->hw->model_desc));
1943                 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1944                     sizeof(vha->hw->mr.symbolic_name));
1945                 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1946                     sizeof(vha->hw->mr.serial_num));
1947                 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1948                     sizeof(vha->hw->mr.hw_version));
1949                 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1950                     sizeof(vha->hw->mr.fw_version));
1951                 strim(vha->hw->mr.fw_version);
1952                 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1953                     sizeof(vha->hw->mr.uboot_version));
1954                 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1955                     sizeof(vha->hw->mr.fru_serial_num));
1956                 vha->hw->mr.critical_temperature =
1957                     (pinfo->nominal_temp_value) ?
1958                     pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD;
1959                 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities &
1960                     QLAFX00_EXTENDED_IO_EN_MASK) != 0;
1961         } else if (fx_type == FXDISC_GET_PORT_INFO) {
1962                 struct port_info_data *pinfo =
1963                     (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1964                 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1965                 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1966                 vha->d_id.b.domain = pinfo->port_id[0];
1967                 vha->d_id.b.area = pinfo->port_id[1];
1968                 vha->d_id.b.al_pa = pinfo->port_id[2];
1969                 qlafx00_update_host_attr(vha, pinfo);
1970                 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
1971                     pinfo, 16);
1972         } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1973                 struct qlafx00_tgt_node_info *pinfo =
1974                     (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1975                 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1976                 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1977                 fcport->port_type = FCT_TARGET;
1978                 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
1979                     pinfo, 16);
1980         } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1981                 struct qlafx00_tgt_node_info *pinfo =
1982                     (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1983                 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
1984                     pinfo, 16);
1985                 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
1986         } else if (fx_type == FXDISC_ABORT_IOCTL)
1987                 fdisc->u.fxiocb.result =
1988                     (fdisc->u.fxiocb.result ==
1989                         cpu_to_le32(QLAFX00_IOCTL_ICOB_ABORT_SUCCESS)) ?
1990                     cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED);
1991
1992         rval = le32_to_cpu(fdisc->u.fxiocb.result);
1993
1994 done_unmap_dma:
1995         if (fdisc->u.fxiocb.rsp_addr)
1996                 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
1997                     fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
1998
1999 done_unmap_req:
2000         if (fdisc->u.fxiocb.req_addr)
2001                 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
2002                     fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
2003 done_free_sp:
2004         sp->free(sp);
2005 done:
2006         return rval;
2007 }
2008
2009 /*
2010  * qlafx00_initialize_adapter
2011  *      Initialize board.
2012  *
2013  * Input:
2014  *      ha = adapter block pointer.
2015  *
2016  * Returns:
2017  *      0 = success
2018  */
2019 int
2020 qlafx00_initialize_adapter(scsi_qla_host_t *vha)
2021 {
2022         int     rval;
2023         struct qla_hw_data *ha = vha->hw;
2024         uint32_t tempc;
2025
2026         /* Clear adapter flags. */
2027         vha->flags.online = 0;
2028         ha->flags.chip_reset_done = 0;
2029         vha->flags.reset_active = 0;
2030         ha->flags.pci_channel_io_perm_failure = 0;
2031         ha->flags.eeh_busy = 0;
2032         atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2033         atomic_set(&vha->loop_state, LOOP_DOWN);
2034         vha->device_flags = DFLG_NO_CABLE;
2035         vha->dpc_flags = 0;
2036         vha->flags.management_server_logged_in = 0;
2037         ha->isp_abort_cnt = 0;
2038         ha->beacon_blink_led = 0;
2039
2040         set_bit(0, ha->req_qid_map);
2041         set_bit(0, ha->rsp_qid_map);
2042
2043         ql_dbg(ql_dbg_init, vha, 0x0147,
2044             "Configuring PCI space...\n");
2045
2046         rval = ha->isp_ops->pci_config(vha);
2047         if (rval) {
2048                 ql_log(ql_log_warn, vha, 0x0148,
2049                     "Unable to configure PCI space.\n");
2050                 return rval;
2051         }
2052
2053         rval = qlafx00_init_fw_ready(vha);
2054         if (rval != QLA_SUCCESS)
2055                 return rval;
2056
2057         qlafx00_save_queue_ptrs(vha);
2058
2059         rval = qlafx00_config_queues(vha);
2060         if (rval != QLA_SUCCESS)
2061                 return rval;
2062
2063         /*
2064          * Allocate the array of outstanding commands
2065          * now that we know the firmware resources.
2066          */
2067         rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2068         if (rval != QLA_SUCCESS)
2069                 return rval;
2070
2071         rval = qla2x00_init_rings(vha);
2072         ha->flags.chip_reset_done = 1;
2073
2074         tempc = QLAFX00_GET_TEMPERATURE(ha);
2075         ql_dbg(ql_dbg_init, vha, 0x0152,
2076             "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2077             __func__, tempc);
2078
2079         return rval;
2080 }
2081
2082 uint32_t
2083 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2084                       char *buf)
2085 {
2086         scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2087         int rval = QLA_FUNCTION_FAILED;
2088         uint32_t state[1];
2089
2090         if (qla2x00_reset_active(vha))
2091                 ql_log(ql_log_warn, vha, 0x70ce,
2092                     "ISP reset active.\n");
2093         else if (!vha->hw->flags.eeh_busy) {
2094                 rval = qlafx00_get_firmware_state(vha, state);
2095         }
2096         if (rval != QLA_SUCCESS)
2097                 memset(state, -1, sizeof(state));
2098
2099         return state[0];
2100 }
2101
2102 void
2103 qlafx00_get_host_speed(struct Scsi_Host *shost)
2104 {
2105         struct qla_hw_data *ha = ((struct scsi_qla_host *)
2106                                         (shost_priv(shost)))->hw;
2107         u32 speed = FC_PORTSPEED_UNKNOWN;
2108
2109         switch (ha->link_data_rate) {
2110         case QLAFX00_PORT_SPEED_2G:
2111                 speed = FC_PORTSPEED_2GBIT;
2112                 break;
2113         case QLAFX00_PORT_SPEED_4G:
2114                 speed = FC_PORTSPEED_4GBIT;
2115                 break;
2116         case QLAFX00_PORT_SPEED_8G:
2117                 speed = FC_PORTSPEED_8GBIT;
2118                 break;
2119         case QLAFX00_PORT_SPEED_10G:
2120                 speed = FC_PORTSPEED_10GBIT;
2121                 break;
2122         }
2123         fc_host_speed(shost) = speed;
2124 }
2125
2126 /** QLAFX00 specific ISR implementation functions */
2127
2128 static inline void
2129 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2130                      uint32_t sense_len, struct rsp_que *rsp, int res)
2131 {
2132         struct scsi_qla_host *vha = sp->vha;
2133         struct scsi_cmnd *cp = GET_CMD_SP(sp);
2134         uint32_t track_sense_len;
2135
2136         SET_FW_SENSE_LEN(sp, sense_len);
2137
2138         if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2139                 sense_len = SCSI_SENSE_BUFFERSIZE;
2140
2141         SET_CMD_SENSE_LEN(sp, sense_len);
2142         SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2143         track_sense_len = sense_len;
2144
2145         if (sense_len > par_sense_len)
2146                 sense_len = par_sense_len;
2147
2148         memcpy(cp->sense_buffer, sense_data, sense_len);
2149
2150         SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2151
2152         SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2153         track_sense_len -= sense_len;
2154         SET_CMD_SENSE_LEN(sp, track_sense_len);
2155
2156         ql_dbg(ql_dbg_io, vha, 0x304d,
2157             "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2158             sense_len, par_sense_len, track_sense_len);
2159         if (GET_FW_SENSE_LEN(sp) > 0) {
2160                 rsp->status_srb = sp;
2161                 cp->result = res;
2162         }
2163
2164         if (sense_len) {
2165                 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2166                     "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2167                     sp->vha->host_no, cp->device->id, cp->device->lun,
2168                     cp);
2169                 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2170                     cp->sense_buffer, sense_len);
2171         }
2172 }
2173
2174 static void
2175 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2176                       struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
2177                       __le16 sstatus, __le16 cpstatus)
2178 {
2179         struct srb_iocb *tmf;
2180
2181         tmf = &sp->u.iocb_cmd;
2182         if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2183             (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2184                 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
2185         tmf->u.tmf.comp_status = cpstatus;
2186         sp->done(sp, 0);
2187 }
2188
2189 static void
2190 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2191                          struct abort_iocb_entry_fx00 *pkt)
2192 {
2193         const char func[] = "ABT_IOCB";
2194         srb_t *sp;
2195         struct srb_iocb *abt;
2196
2197         sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2198         if (!sp)
2199                 return;
2200
2201         abt = &sp->u.iocb_cmd;
2202         abt->u.abt.comp_status = pkt->tgt_id_sts;
2203         sp->done(sp, 0);
2204 }
2205
2206 static void
2207 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2208                          struct ioctl_iocb_entry_fx00 *pkt)
2209 {
2210         const char func[] = "IOSB_IOCB";
2211         srb_t *sp;
2212         struct bsg_job *bsg_job;
2213         struct fc_bsg_reply *bsg_reply;
2214         struct srb_iocb *iocb_job;
2215         int res = 0;
2216         struct qla_mt_iocb_rsp_fx00 fstatus;
2217         uint8_t *fw_sts_ptr;
2218
2219         sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2220         if (!sp)
2221                 return;
2222
2223         if (sp->type == SRB_FXIOCB_DCMD) {
2224                 iocb_job = &sp->u.iocb_cmd;
2225                 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2226                 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2227                 iocb_job->u.fxiocb.result = pkt->status;
2228                 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2229                         iocb_job->u.fxiocb.req_data =
2230                             pkt->dataword_r;
2231         } else {
2232                 bsg_job = sp->u.bsg_job;
2233                 bsg_reply = bsg_job->reply;
2234
2235                 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2236
2237                 fstatus.reserved_1 = pkt->reserved_0;
2238                 fstatus.func_type = pkt->comp_func_num;
2239                 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2240                 fstatus.ioctl_data = pkt->dataword_r;
2241                 fstatus.adapid = pkt->adapid;
2242                 fstatus.reserved_2 = pkt->dataword_r_extra;
2243                 fstatus.res_count = pkt->residuallen;
2244                 fstatus.status = pkt->status;
2245                 fstatus.seq_number = pkt->seq_no;
2246                 memcpy(fstatus.reserved_3,
2247                     pkt->reserved_2, 20 * sizeof(uint8_t));
2248
2249                 fw_sts_ptr = bsg_job->reply + sizeof(struct fc_bsg_reply);
2250
2251                 memcpy(fw_sts_ptr, &fstatus, sizeof(fstatus));
2252                 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2253                         sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2254
2255                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2256                     sp->vha, 0x5080, pkt, sizeof(*pkt));
2257
2258                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2259                     sp->vha, 0x5074,
2260                     fw_sts_ptr, sizeof(fstatus));
2261
2262                 res = bsg_reply->result = DID_OK << 16;
2263                 bsg_reply->reply_payload_rcv_len =
2264                     bsg_job->reply_payload.payload_len;
2265         }
2266         sp->done(sp, res);
2267 }
2268
2269 /**
2270  * qlafx00_status_entry() - Process a Status IOCB entry.
2271  * @vha: SCSI driver HA context
2272  * @rsp: response queue
2273  * @pkt: Entry pointer
2274  */
2275 static void
2276 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2277 {
2278         srb_t           *sp;
2279         fc_port_t       *fcport;
2280         struct scsi_cmnd *cp;
2281         struct sts_entry_fx00 *sts;
2282         __le16          comp_status;
2283         __le16          scsi_status;
2284         __le16          lscsi_status;
2285         int32_t         resid;
2286         uint32_t        sense_len, par_sense_len, rsp_info_len, resid_len,
2287             fw_resid_len;
2288         uint8_t         *rsp_info = NULL, *sense_data = NULL;
2289         struct qla_hw_data *ha = vha->hw;
2290         uint32_t hindex, handle;
2291         uint16_t que;
2292         struct req_que *req;
2293         int logit = 1;
2294         int res = 0;
2295
2296         sts = (struct sts_entry_fx00 *) pkt;
2297
2298         comp_status = sts->comp_status;
2299         scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
2300         hindex = sts->handle;
2301         handle = LSW(hindex);
2302
2303         que = MSW(hindex);
2304         req = ha->req_q_map[que];
2305
2306         /* Validate handle. */
2307         if (handle < req->num_outstanding_cmds)
2308                 sp = req->outstanding_cmds[handle];
2309         else
2310                 sp = NULL;
2311
2312         if (sp == NULL) {
2313                 ql_dbg(ql_dbg_io, vha, 0x3034,
2314                     "Invalid status handle (0x%x).\n", handle);
2315
2316                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2317                 qla2xxx_wake_dpc(vha);
2318                 return;
2319         }
2320
2321         if (sp->type == SRB_TM_CMD) {
2322                 req->outstanding_cmds[handle] = NULL;
2323                 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2324                     scsi_status, comp_status);
2325                 return;
2326         }
2327
2328         /* Fast path completion. */
2329         if (comp_status == CS_COMPLETE && scsi_status == 0) {
2330                 qla2x00_process_completed_request(vha, req, handle);
2331                 return;
2332         }
2333
2334         req->outstanding_cmds[handle] = NULL;
2335         cp = GET_CMD_SP(sp);
2336         if (cp == NULL) {
2337                 ql_dbg(ql_dbg_io, vha, 0x3048,
2338                     "Command already returned (0x%x/%p).\n",
2339                     handle, sp);
2340
2341                 return;
2342         }
2343
2344         lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
2345
2346         fcport = sp->fcport;
2347
2348         sense_len = par_sense_len = rsp_info_len = resid_len =
2349                 fw_resid_len = 0;
2350         if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2351                 sense_len = sts->sense_len;
2352         if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2353             | (uint16_t)SS_RESIDUAL_OVER)))
2354                 resid_len = le32_to_cpu(sts->residual_len);
2355         if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
2356                 fw_resid_len = le32_to_cpu(sts->residual_len);
2357         rsp_info = sense_data = sts->data;
2358         par_sense_len = sizeof(sts->data);
2359
2360         /* Check for overrun. */
2361         if (comp_status == CS_COMPLETE &&
2362             scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2363                 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
2364
2365         /*
2366          * Based on Host and scsi status generate status code for Linux
2367          */
2368         switch (le16_to_cpu(comp_status)) {
2369         case CS_COMPLETE:
2370         case CS_QUEUE_FULL:
2371                 if (scsi_status == 0) {
2372                         res = DID_OK << 16;
2373                         break;
2374                 }
2375                 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2376                     | (uint16_t)SS_RESIDUAL_OVER))) {
2377                         resid = resid_len;
2378                         scsi_set_resid(cp, resid);
2379
2380                         if (!lscsi_status &&
2381                             ((unsigned)(scsi_bufflen(cp) - resid) <
2382                              cp->underflow)) {
2383                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2384                                     "Mid-layer underflow "
2385                                     "detected (0x%x of 0x%x bytes).\n",
2386                                     resid, scsi_bufflen(cp));
2387
2388                                 res = DID_ERROR << 16;
2389                                 break;
2390                         }
2391                 }
2392                 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2393
2394                 if (lscsi_status ==
2395                     cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2396                         ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2397                             "QUEUE FULL detected.\n");
2398                         break;
2399                 }
2400                 logit = 0;
2401                 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2402                         break;
2403
2404                 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2405                 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2406                         break;
2407
2408                 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2409                     rsp, res);
2410                 break;
2411
2412         case CS_DATA_UNDERRUN:
2413                 /* Use F/W calculated residual length. */
2414                 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2415                         resid = fw_resid_len;
2416                 else
2417                         resid = resid_len;
2418                 scsi_set_resid(cp, resid);
2419                 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
2420                         if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2421                             && fw_resid_len != resid_len) {
2422                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2423                                     "Dropped frame(s) detected "
2424                                     "(0x%x of 0x%x bytes).\n",
2425                                     resid, scsi_bufflen(cp));
2426
2427                                 res = DID_ERROR << 16 |
2428                                     le16_to_cpu(lscsi_status);
2429                                 goto check_scsi_status;
2430                         }
2431
2432                         if (!lscsi_status &&
2433                             ((unsigned)(scsi_bufflen(cp) - resid) <
2434                             cp->underflow)) {
2435                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2436                                     "Mid-layer underflow "
2437                                     "detected (0x%x of 0x%x bytes, "
2438                                     "cp->underflow: 0x%x).\n",
2439                                     resid, scsi_bufflen(cp), cp->underflow);
2440
2441                                 res = DID_ERROR << 16;
2442                                 break;
2443                         }
2444                 } else if (lscsi_status !=
2445                     cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2446                     lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
2447                         /*
2448                          * scsi status of task set and busy are considered
2449                          * to be task not completed.
2450                          */
2451
2452                         ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2453                             "Dropped frame(s) detected (0x%x "
2454                             "of 0x%x bytes).\n", resid,
2455                             scsi_bufflen(cp));
2456
2457                         res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
2458                         goto check_scsi_status;
2459                 } else {
2460                         ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2461                             "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2462                             scsi_status, lscsi_status);
2463                 }
2464
2465                 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2466                 logit = 0;
2467
2468 check_scsi_status:
2469                 /*
2470                  * Check to see if SCSI Status is non zero. If so report SCSI
2471                  * Status.
2472                  */
2473                 if (lscsi_status != 0) {
2474                         if (lscsi_status ==
2475                             cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2476                                 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2477                                     "QUEUE FULL detected.\n");
2478                                 logit = 1;
2479                                 break;
2480                         }
2481                         if (lscsi_status !=
2482                             cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2483                                 break;
2484
2485                         memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2486                         if (!(scsi_status &
2487                             cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2488                                 break;
2489
2490                         qlafx00_handle_sense(sp, sense_data, par_sense_len,
2491                             sense_len, rsp, res);
2492                 }
2493                 break;
2494
2495         case CS_PORT_LOGGED_OUT:
2496         case CS_PORT_CONFIG_CHG:
2497         case CS_PORT_BUSY:
2498         case CS_INCOMPLETE:
2499         case CS_PORT_UNAVAILABLE:
2500         case CS_TIMEOUT:
2501         case CS_RESET:
2502
2503                 /*
2504                  * We are going to have the fc class block the rport
2505                  * while we try to recover so instruct the mid layer
2506                  * to requeue until the class decides how to handle this.
2507                  */
2508                 res = DID_TRANSPORT_DISRUPTED << 16;
2509
2510                 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2511                     "Port down status: port-state=0x%x.\n",
2512                     atomic_read(&fcport->state));
2513
2514                 if (atomic_read(&fcport->state) == FCS_ONLINE)
2515                         qla2x00_mark_device_lost(fcport->vha, fcport, 1);
2516                 break;
2517
2518         case CS_ABORTED:
2519                 res = DID_RESET << 16;
2520                 break;
2521
2522         default:
2523                 res = DID_ERROR << 16;
2524                 break;
2525         }
2526
2527         if (logit)
2528                 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
2529                     "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
2530                     "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2531                     "rsp_info=%p resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2532                     "par_sense_len=0x%x, rsp_info_len=0x%x\n",
2533                     comp_status, scsi_status, res, vha->host_no,
2534                     cp->device->id, cp->device->lun, fcport->tgt_id,
2535                     lscsi_status, cp->cmnd, scsi_bufflen(cp),
2536                     rsp_info, resid_len, fw_resid_len, sense_len,
2537                     par_sense_len, rsp_info_len);
2538
2539         if (rsp->status_srb == NULL)
2540                 sp->done(sp, res);
2541         else
2542                 WARN_ON_ONCE(true);
2543 }
2544
2545 /**
2546  * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2547  * @rsp: response queue
2548  * @pkt: Entry pointer
2549  *
2550  * Extended sense data.
2551  */
2552 static void
2553 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2554 {
2555         uint8_t sense_sz = 0;
2556         struct qla_hw_data *ha = rsp->hw;
2557         struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2558         srb_t *sp = rsp->status_srb;
2559         struct scsi_cmnd *cp;
2560         uint32_t sense_len;
2561         uint8_t *sense_ptr;
2562
2563         if (!sp) {
2564                 ql_dbg(ql_dbg_io, vha, 0x3037,
2565                     "no SP, sp = %p\n", sp);
2566                 return;
2567         }
2568
2569         if (!GET_FW_SENSE_LEN(sp)) {
2570                 ql_dbg(ql_dbg_io, vha, 0x304b,
2571                     "no fw sense data, sp = %p\n", sp);
2572                 return;
2573         }
2574         cp = GET_CMD_SP(sp);
2575         if (cp == NULL) {
2576                 ql_log(ql_log_warn, vha, 0x303b,
2577                     "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2578
2579                 rsp->status_srb = NULL;
2580                 return;
2581         }
2582
2583         if (!GET_CMD_SENSE_LEN(sp)) {
2584                 ql_dbg(ql_dbg_io, vha, 0x304c,
2585                     "no sense data, sp = %p\n", sp);
2586         } else {
2587                 sense_len = GET_CMD_SENSE_LEN(sp);
2588                 sense_ptr = GET_CMD_SENSE_PTR(sp);
2589                 ql_dbg(ql_dbg_io, vha, 0x304f,
2590                     "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2591                     sp, sense_len, sense_ptr);
2592
2593                 if (sense_len > sizeof(pkt->data))
2594                         sense_sz = sizeof(pkt->data);
2595                 else
2596                         sense_sz = sense_len;
2597
2598                 /* Move sense data. */
2599                 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2600                     pkt, sizeof(*pkt));
2601                 memcpy(sense_ptr, pkt->data, sense_sz);
2602                 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2603                     sense_ptr, sense_sz);
2604
2605                 sense_len -= sense_sz;
2606                 sense_ptr += sense_sz;
2607
2608                 SET_CMD_SENSE_PTR(sp, sense_ptr);
2609                 SET_CMD_SENSE_LEN(sp, sense_len);
2610         }
2611         sense_len = GET_FW_SENSE_LEN(sp);
2612         sense_len = (sense_len > sizeof(pkt->data)) ?
2613             (sense_len - sizeof(pkt->data)) : 0;
2614         SET_FW_SENSE_LEN(sp, sense_len);
2615
2616         /* Place command on done queue. */
2617         if (sense_len == 0) {
2618                 rsp->status_srb = NULL;
2619                 sp->done(sp, cp->result);
2620         } else {
2621                 WARN_ON_ONCE(true);
2622         }
2623 }
2624
2625 /**
2626  * qlafx00_multistatus_entry() - Process Multi response queue entries.
2627  * @vha: SCSI driver HA context
2628  * @rsp: response queue
2629  * @pkt: received packet
2630  */
2631 static void
2632 qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2633         struct rsp_que *rsp, void *pkt)
2634 {
2635         srb_t           *sp;
2636         struct multi_sts_entry_fx00 *stsmfx;
2637         struct qla_hw_data *ha = vha->hw;
2638         uint32_t handle, hindex, handle_count, i;
2639         uint16_t que;
2640         struct req_que *req;
2641         __le32 *handle_ptr;
2642
2643         stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2644
2645         handle_count = stsmfx->handle_count;
2646
2647         if (handle_count > MAX_HANDLE_COUNT) {
2648                 ql_dbg(ql_dbg_io, vha, 0x3035,
2649                     "Invalid handle count (0x%x).\n", handle_count);
2650                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2651                 qla2xxx_wake_dpc(vha);
2652                 return;
2653         }
2654
2655         handle_ptr =  &stsmfx->handles[0];
2656
2657         for (i = 0; i < handle_count; i++) {
2658                 hindex = le32_to_cpu(*handle_ptr);
2659                 handle = LSW(hindex);
2660                 que = MSW(hindex);
2661                 req = ha->req_q_map[que];
2662
2663                 /* Validate handle. */
2664                 if (handle < req->num_outstanding_cmds)
2665                         sp = req->outstanding_cmds[handle];
2666                 else
2667                         sp = NULL;
2668
2669                 if (sp == NULL) {
2670                         ql_dbg(ql_dbg_io, vha, 0x3044,
2671                             "Invalid status handle (0x%x).\n", handle);
2672                         set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2673                         qla2xxx_wake_dpc(vha);
2674                         return;
2675                 }
2676                 qla2x00_process_completed_request(vha, req, handle);
2677                 handle_ptr++;
2678         }
2679 }
2680
2681 /**
2682  * qlafx00_error_entry() - Process an error entry.
2683  * @vha: SCSI driver HA context
2684  * @rsp: response queue
2685  * @pkt: Entry pointer
2686  */
2687 static void
2688 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2689                     struct sts_entry_fx00 *pkt)
2690 {
2691         srb_t *sp;
2692         struct qla_hw_data *ha = vha->hw;
2693         const char func[] = "ERROR-IOCB";
2694         uint16_t que = 0;
2695         struct req_que *req = NULL;
2696         int res = DID_ERROR << 16;
2697
2698         req = ha->req_q_map[que];
2699
2700         sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2701         if (sp) {
2702                 sp->done(sp, res);
2703                 return;
2704         }
2705
2706         set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2707         qla2xxx_wake_dpc(vha);
2708 }
2709
2710 /**
2711  * qlafx00_process_response_queue() - Process response queue entries.
2712  * @vha: SCSI driver HA context
2713  * @rsp: response queue
2714  */
2715 static void
2716 qlafx00_process_response_queue(struct scsi_qla_host *vha,
2717         struct rsp_que *rsp)
2718 {
2719         struct sts_entry_fx00 *pkt;
2720         response_t *lptr;
2721         uint16_t lreq_q_in = 0;
2722         uint16_t lreq_q_out = 0;
2723
2724         lreq_q_in = RD_REG_DWORD(rsp->rsp_q_in);
2725         lreq_q_out = rsp->ring_index;
2726
2727         while (lreq_q_in != lreq_q_out) {
2728                 lptr = rsp->ring_ptr;
2729                 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2730                     sizeof(rsp->rsp_pkt));
2731                 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2732
2733                 rsp->ring_index++;
2734                 lreq_q_out++;
2735                 if (rsp->ring_index == rsp->length) {
2736                         lreq_q_out = 0;
2737                         rsp->ring_index = 0;
2738                         rsp->ring_ptr = rsp->ring;
2739                 } else {
2740                         rsp->ring_ptr++;
2741                 }
2742
2743                 if (pkt->entry_status != 0 &&
2744                     pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2745                         ql_dbg(ql_dbg_async, vha, 0x507f,
2746                                "type of error status in response: 0x%x\n",
2747                                pkt->entry_status);
2748                         qlafx00_error_entry(vha, rsp,
2749                                             (struct sts_entry_fx00 *)pkt);
2750                         continue;
2751                 }
2752
2753                 switch (pkt->entry_type) {
2754                 case STATUS_TYPE_FX00:
2755                         qlafx00_status_entry(vha, rsp, pkt);
2756                         break;
2757
2758                 case STATUS_CONT_TYPE_FX00:
2759                         qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2760                         break;
2761
2762                 case MULTI_STATUS_TYPE_FX00:
2763                         qlafx00_multistatus_entry(vha, rsp, pkt);
2764                         break;
2765
2766                 case ABORT_IOCB_TYPE_FX00:
2767                         qlafx00_abort_iocb_entry(vha, rsp->req,
2768                            (struct abort_iocb_entry_fx00 *)pkt);
2769                         break;
2770
2771                 case IOCTL_IOSB_TYPE_FX00:
2772                         qlafx00_ioctl_iosb_entry(vha, rsp->req,
2773                             (struct ioctl_iocb_entry_fx00 *)pkt);
2774                         break;
2775                 default:
2776                         /* Type Not Supported. */
2777                         ql_dbg(ql_dbg_async, vha, 0x5081,
2778                             "Received unknown response pkt type %x "
2779                             "entry status=%x.\n",
2780                             pkt->entry_type, pkt->entry_status);
2781                         break;
2782                 }
2783         }
2784
2785         /* Adjust ring index */
2786         WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2787 }
2788
2789 /**
2790  * qlafx00_async_event() - Process aynchronous events.
2791  * @vha: SCSI driver HA context
2792  */
2793 static void
2794 qlafx00_async_event(scsi_qla_host_t *vha)
2795 {
2796         struct qla_hw_data *ha = vha->hw;
2797         struct device_reg_fx00 __iomem *reg;
2798         int data_size = 1;
2799
2800         reg = &ha->iobase->ispfx00;
2801         /* Setup to process RIO completion. */
2802         switch (ha->aenmb[0]) {
2803         case QLAFX00_MBA_SYSTEM_ERR:            /* System Error */
2804                 ql_log(ql_log_warn, vha, 0x5079,
2805                     "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2806                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2807                 break;
2808
2809         case QLAFX00_MBA_SHUTDOWN_RQSTD:        /* Shutdown requested */
2810                 ql_dbg(ql_dbg_async, vha, 0x5076,
2811                     "Asynchronous FW shutdown requested.\n");
2812                 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2813                 qla2xxx_wake_dpc(vha);
2814                 break;
2815
2816         case QLAFX00_MBA_PORT_UPDATE:           /* Port database update */
2817                 ha->aenmb[1] = RD_REG_DWORD(&reg->aenmailbox1);
2818                 ha->aenmb[2] = RD_REG_DWORD(&reg->aenmailbox2);
2819                 ha->aenmb[3] = RD_REG_DWORD(&reg->aenmailbox3);
2820                 ql_dbg(ql_dbg_async, vha, 0x5077,
2821                     "Asynchronous port Update received "
2822                     "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2823                     ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2824                 data_size = 4;
2825                 break;
2826
2827         case QLAFX00_MBA_TEMP_OVER:     /* Over temperature event */
2828                 ql_log(ql_log_info, vha, 0x5085,
2829                     "Asynchronous over temperature event received "
2830                     "aenmb[0]: %x\n",
2831                     ha->aenmb[0]);
2832                 break;
2833
2834         case QLAFX00_MBA_TEMP_NORM:     /* Normal temperature event */
2835                 ql_log(ql_log_info, vha, 0x5086,
2836                     "Asynchronous normal temperature event received "
2837                     "aenmb[0]: %x\n",
2838                     ha->aenmb[0]);
2839                 break;
2840
2841         case QLAFX00_MBA_TEMP_CRIT:     /* Critical temperature event */
2842                 ql_log(ql_log_info, vha, 0x5083,
2843                     "Asynchronous critical temperature event received "
2844                     "aenmb[0]: %x\n",
2845                 ha->aenmb[0]);
2846                 break;
2847
2848         default:
2849                 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2850                 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2851                 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2852                 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2853                 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2854                 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2855                 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2856                 ql_dbg(ql_dbg_async, vha, 0x5078,
2857                     "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2858                     ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2859                     ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2860                 break;
2861         }
2862         qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2863             (uint32_t *)ha->aenmb, data_size);
2864 }
2865
2866 /**
2867  * qlafx00x_mbx_completion() - Process mailbox command completions.
2868  * @vha: SCSI driver HA context
2869  * @mb0: value to be written into mailbox register 0
2870  */
2871 static void
2872 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2873 {
2874         uint16_t        cnt;
2875         uint32_t __iomem *wptr;
2876         struct qla_hw_data *ha = vha->hw;
2877         struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2878
2879         if (!ha->mcp32)
2880                 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2881
2882         /* Load return mailbox registers. */
2883         ha->flags.mbox_int = 1;
2884         ha->mailbox_out32[0] = mb0;
2885         wptr = (uint32_t __iomem *)&reg->mailbox17;
2886
2887         for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2888                 ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr);
2889                 wptr++;
2890         }
2891 }
2892
2893 /**
2894  * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
2895  * @irq: interrupt number
2896  * @dev_id: SCSI driver HA context
2897  *
2898  * Called by system whenever the host adapter generates an interrupt.
2899  *
2900  * Returns handled flag.
2901  */
2902 irqreturn_t
2903 qlafx00_intr_handler(int irq, void *dev_id)
2904 {
2905         scsi_qla_host_t *vha;
2906         struct qla_hw_data *ha;
2907         struct device_reg_fx00 __iomem *reg;
2908         int             status;
2909         unsigned long   iter;
2910         uint32_t        stat;
2911         uint32_t        mb[8];
2912         struct rsp_que *rsp;
2913         unsigned long   flags;
2914         uint32_t clr_intr = 0;
2915         uint32_t intr_stat = 0;
2916
2917         rsp = (struct rsp_que *) dev_id;
2918         if (!rsp) {
2919                 ql_log(ql_log_info, NULL, 0x507d,
2920                     "%s: NULL response queue pointer.\n", __func__);
2921                 return IRQ_NONE;
2922         }
2923
2924         ha = rsp->hw;
2925         reg = &ha->iobase->ispfx00;
2926         status = 0;
2927
2928         if (unlikely(pci_channel_offline(ha->pdev)))
2929                 return IRQ_HANDLED;
2930
2931         spin_lock_irqsave(&ha->hardware_lock, flags);
2932         vha = pci_get_drvdata(ha->pdev);
2933         for (iter = 50; iter--; clr_intr = 0) {
2934                 stat = QLAFX00_RD_INTR_REG(ha);
2935                 if (qla2x00_check_reg32_for_disconnect(vha, stat))
2936                         break;
2937                 intr_stat = stat & QLAFX00_HST_INT_STS_BITS;
2938                 if (!intr_stat)
2939                         break;
2940
2941                 if (stat & QLAFX00_INTR_MB_CMPLT) {
2942                         mb[0] = RD_REG_WORD(&reg->mailbox16);
2943                         qlafx00_mbx_completion(vha, mb[0]);
2944                         status |= MBX_INTERRUPT;
2945                         clr_intr |= QLAFX00_INTR_MB_CMPLT;
2946                 }
2947                 if (intr_stat & QLAFX00_INTR_ASYNC_CMPLT) {
2948                         ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
2949                         qlafx00_async_event(vha);
2950                         clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
2951                 }
2952                 if (intr_stat & QLAFX00_INTR_RSP_CMPLT) {
2953                         qlafx00_process_response_queue(vha, rsp);
2954                         clr_intr |= QLAFX00_INTR_RSP_CMPLT;
2955                 }
2956
2957                 QLAFX00_CLR_INTR_REG(ha, clr_intr);
2958                 QLAFX00_RD_INTR_REG(ha);
2959         }
2960
2961         qla2x00_handle_mbx_completion(ha, status);
2962         spin_unlock_irqrestore(&ha->hardware_lock, flags);
2963
2964         return IRQ_HANDLED;
2965 }
2966
2967 /** QLAFX00 specific IOCB implementation functions */
2968
2969 static inline cont_a64_entry_t *
2970 qlafx00_prep_cont_type1_iocb(struct req_que *req,
2971                              cont_a64_entry_t *lcont_pkt)
2972 {
2973         cont_a64_entry_t *cont_pkt;
2974
2975         /* Adjust ring index. */
2976         req->ring_index++;
2977         if (req->ring_index == req->length) {
2978                 req->ring_index = 0;
2979                 req->ring_ptr = req->ring;
2980         } else {
2981                 req->ring_ptr++;
2982         }
2983
2984         cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
2985
2986         /* Load packet defaults. */
2987         lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
2988
2989         return cont_pkt;
2990 }
2991
2992 static inline void
2993 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
2994                          uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
2995 {
2996         uint16_t        avail_dsds;
2997         struct dsd64    *cur_dsd;
2998         scsi_qla_host_t *vha;
2999         struct scsi_cmnd *cmd;
3000         struct scatterlist *sg;
3001         int i, cont;
3002         struct req_que *req;
3003         cont_a64_entry_t lcont_pkt;
3004         cont_a64_entry_t *cont_pkt;
3005
3006         vha = sp->vha;
3007         req = vha->req;
3008
3009         cmd = GET_CMD_SP(sp);
3010         cont = 0;
3011         cont_pkt = NULL;
3012
3013         /* Update entry type to indicate Command Type 3 IOCB */
3014         lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
3015
3016         /* No data transfer */
3017         if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
3018                 lcmd_pkt->byte_count = cpu_to_le32(0);
3019                 return;
3020         }
3021
3022         /* Set transfer direction */
3023         if (cmd->sc_data_direction == DMA_TO_DEVICE) {
3024                 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
3025                 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
3026         } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
3027                 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
3028                 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
3029         }
3030
3031         /* One DSD is available in the Command Type 3 IOCB */
3032         avail_dsds = 1;
3033         cur_dsd = &lcmd_pkt->dsd;
3034
3035         /* Load data segments */
3036         scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3037                 /* Allocate additional continuation packets? */
3038                 if (avail_dsds == 0) {
3039                         /*
3040                          * Five DSDs are available in the Continuation
3041                          * Type 1 IOCB.
3042                          */
3043                         memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3044                         cont_pkt =
3045                             qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
3046                         cur_dsd = lcont_pkt.dsd;
3047                         avail_dsds = 5;
3048                         cont = 1;
3049                 }
3050
3051                 append_dsd64(&cur_dsd, sg);
3052                 avail_dsds--;
3053                 if (avail_dsds == 0 && cont == 1) {
3054                         cont = 0;
3055                         memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3056                             sizeof(lcont_pkt));
3057                 }
3058
3059         }
3060         if (avail_dsds != 0 && cont == 1) {
3061                 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3062                     sizeof(lcont_pkt));
3063         }
3064 }
3065
3066 /**
3067  * qlafx00_start_scsi() - Send a SCSI command to the ISP
3068  * @sp: command to send to the ISP
3069  *
3070  * Returns non-zero if a failure occurred, else zero.
3071  */
3072 int
3073 qlafx00_start_scsi(srb_t *sp)
3074 {
3075         int             nseg;
3076         unsigned long   flags;
3077         uint32_t        handle;
3078         uint16_t        cnt;
3079         uint16_t        req_cnt;
3080         uint16_t        tot_dsds;
3081         struct req_que *req = NULL;
3082         struct rsp_que *rsp = NULL;
3083         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3084         struct scsi_qla_host *vha = sp->vha;
3085         struct qla_hw_data *ha = vha->hw;
3086         struct cmd_type_7_fx00 *cmd_pkt;
3087         struct cmd_type_7_fx00 lcmd_pkt;
3088         struct scsi_lun llun;
3089
3090         /* Setup device pointers. */
3091         rsp = ha->rsp_q_map[0];
3092         req = vha->req;
3093
3094         /* So we know we haven't pci_map'ed anything yet */
3095         tot_dsds = 0;
3096
3097         /* Acquire ring specific lock */
3098         spin_lock_irqsave(&ha->hardware_lock, flags);
3099
3100         handle = qla2xxx_get_next_handle(req);
3101         if (handle == 0)
3102                 goto queuing_error;
3103
3104         /* Map the sg table so we have an accurate count of sg entries needed */
3105         if (scsi_sg_count(cmd)) {
3106                 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3107                     scsi_sg_count(cmd), cmd->sc_data_direction);
3108                 if (unlikely(!nseg))
3109                         goto queuing_error;
3110         } else
3111                 nseg = 0;
3112
3113         tot_dsds = nseg;
3114         req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3115         if (req->cnt < (req_cnt + 2)) {
3116                 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3117
3118                 if (req->ring_index < cnt)
3119                         req->cnt = cnt - req->ring_index;
3120                 else
3121                         req->cnt = req->length -
3122                                 (req->ring_index - cnt);
3123                 if (req->cnt < (req_cnt + 2))
3124                         goto queuing_error;
3125         }
3126
3127         /* Build command packet. */
3128         req->current_outstanding_cmd = handle;
3129         req->outstanding_cmds[handle] = sp;
3130         sp->handle = handle;
3131         cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3132         req->cnt -= req_cnt;
3133
3134         cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3135
3136         memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3137
3138         lcmd_pkt.handle = make_handle(req->id, sp->handle);
3139         lcmd_pkt.reserved_0 = 0;
3140         lcmd_pkt.port_path_ctrl = 0;
3141         lcmd_pkt.reserved_1 = 0;
3142         lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3143         lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3144
3145         int_to_scsilun(cmd->device->lun, &llun);
3146         host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3147             sizeof(lcmd_pkt.lun));
3148
3149         /* Load SCSI command packet. */
3150         host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3151         lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3152
3153         /* Build IOCB segments */
3154         qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3155
3156         /* Set total data segment count. */
3157         lcmd_pkt.entry_count = (uint8_t)req_cnt;
3158
3159         /* Specify response queue number where completion should happen */
3160         lcmd_pkt.entry_status = (uint8_t) rsp->id;
3161
3162         ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3163             cmd->cmnd, cmd->cmd_len);
3164         ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3165             &lcmd_pkt, sizeof(lcmd_pkt));
3166
3167         memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3168         wmb();
3169
3170         /* Adjust ring index. */
3171         req->ring_index++;
3172         if (req->ring_index == req->length) {
3173                 req->ring_index = 0;
3174                 req->ring_ptr = req->ring;
3175         } else
3176                 req->ring_ptr++;
3177
3178         sp->flags |= SRB_DMA_VALID;
3179
3180         /* Set chip new ring index. */
3181         WRT_REG_DWORD(req->req_q_in, req->ring_index);
3182         QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3183
3184         spin_unlock_irqrestore(&ha->hardware_lock, flags);
3185         return QLA_SUCCESS;
3186
3187 queuing_error:
3188         if (tot_dsds)
3189                 scsi_dma_unmap(cmd);
3190
3191         spin_unlock_irqrestore(&ha->hardware_lock, flags);
3192
3193         return QLA_FUNCTION_FAILED;
3194 }
3195
3196 void
3197 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3198 {
3199         struct srb_iocb *fxio = &sp->u.iocb_cmd;
3200         scsi_qla_host_t *vha = sp->vha;
3201         struct req_que *req = vha->req;
3202         struct tsk_mgmt_entry_fx00 tm_iocb;
3203         struct scsi_lun llun;
3204
3205         memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3206         tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3207         tm_iocb.entry_count = 1;
3208         tm_iocb.handle = cpu_to_le32(make_handle(req->id, sp->handle));
3209         tm_iocb.reserved_0 = 0;
3210         tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3211         tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
3212         if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
3213                 int_to_scsilun(fxio->u.tmf.lun, &llun);
3214                 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3215                     sizeof(struct scsi_lun));
3216         }
3217
3218         memcpy((void *)ptm_iocb, &tm_iocb,
3219             sizeof(struct tsk_mgmt_entry_fx00));
3220         wmb();
3221 }
3222
3223 void
3224 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3225 {
3226         struct srb_iocb *fxio = &sp->u.iocb_cmd;
3227         scsi_qla_host_t *vha = sp->vha;
3228         struct req_que *req = vha->req;
3229         struct abort_iocb_entry_fx00 abt_iocb;
3230
3231         memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3232         abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3233         abt_iocb.entry_count = 1;
3234         abt_iocb.handle = cpu_to_le32(make_handle(req->id, sp->handle));
3235         abt_iocb.abort_handle =
3236             cpu_to_le32(make_handle(req->id, fxio->u.abt.cmd_hndl));
3237         abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3238         abt_iocb.req_que_no = cpu_to_le16(req->id);
3239
3240         memcpy((void *)pabt_iocb, &abt_iocb,
3241             sizeof(struct abort_iocb_entry_fx00));
3242         wmb();
3243 }
3244
3245 void
3246 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3247 {
3248         struct srb_iocb *fxio = &sp->u.iocb_cmd;
3249         struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3250         struct bsg_job *bsg_job;
3251         struct fc_bsg_request *bsg_request;
3252         struct fxdisc_entry_fx00 fx_iocb;
3253         uint8_t entry_cnt = 1;
3254
3255         memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3256         fx_iocb.entry_type = FX00_IOCB_TYPE;
3257         fx_iocb.handle = cpu_to_le32(sp->handle);
3258         fx_iocb.entry_count = entry_cnt;
3259
3260         if (sp->type == SRB_FXIOCB_DCMD) {
3261                 fx_iocb.func_num =
3262                     sp->u.iocb_cmd.u.fxiocb.req_func_type;
3263                 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3264                 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3265                 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3266                 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3267                 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
3268
3269                 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3270                         fx_iocb.req_dsdcnt = cpu_to_le16(1);
3271                         fx_iocb.req_xfrcnt =
3272                             cpu_to_le16(fxio->u.fxiocb.req_len);
3273                         put_unaligned_le64(fxio->u.fxiocb.req_dma_handle,
3274                                            &fx_iocb.dseg_rq.address);
3275                         fx_iocb.dseg_rq.length =
3276                             cpu_to_le32(fxio->u.fxiocb.req_len);
3277                 }
3278
3279                 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3280                         fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3281                         fx_iocb.rsp_xfrcnt =
3282                             cpu_to_le16(fxio->u.fxiocb.rsp_len);
3283                         put_unaligned_le64(fxio->u.fxiocb.rsp_dma_handle,
3284                                            &fx_iocb.dseg_rsp.address);
3285                         fx_iocb.dseg_rsp.length =
3286                             cpu_to_le32(fxio->u.fxiocb.rsp_len);
3287                 }
3288
3289                 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
3290                         fx_iocb.dataword = fxio->u.fxiocb.req_data;
3291                 }
3292                 fx_iocb.flags = fxio->u.fxiocb.flags;
3293         } else {
3294                 struct scatterlist *sg;
3295
3296                 bsg_job = sp->u.bsg_job;
3297                 bsg_request = bsg_job->request;
3298                 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3299                         &bsg_request->rqst_data.h_vendor.vendor_cmd[1];
3300
3301                 fx_iocb.func_num = piocb_rqst->func_type;
3302                 fx_iocb.adapid = piocb_rqst->adapid;
3303                 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3304                 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3305                 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3306                 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3307                 fx_iocb.dataword = piocb_rqst->dataword;
3308                 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3309                 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
3310
3311                 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3312                         int avail_dsds, tot_dsds;
3313                         cont_a64_entry_t lcont_pkt;
3314                         cont_a64_entry_t *cont_pkt = NULL;
3315                         struct dsd64 *cur_dsd;
3316                         int index = 0, cont = 0;
3317
3318                         fx_iocb.req_dsdcnt =
3319                             cpu_to_le16(bsg_job->request_payload.sg_cnt);
3320                         tot_dsds =
3321                             bsg_job->request_payload.sg_cnt;
3322                         cur_dsd = &fx_iocb.dseg_rq;
3323                         avail_dsds = 1;
3324                         for_each_sg(bsg_job->request_payload.sg_list, sg,
3325                             tot_dsds, index) {
3326                                 /* Allocate additional continuation packets? */
3327                                 if (avail_dsds == 0) {
3328                                         /*
3329                                          * Five DSDs are available in the Cont.
3330                                          * Type 1 IOCB.
3331                                          */
3332                                         memset(&lcont_pkt, 0,
3333                                             REQUEST_ENTRY_SIZE);
3334                                         cont_pkt =
3335                                             qlafx00_prep_cont_type1_iocb(
3336                                                 sp->vha->req, &lcont_pkt);
3337                                         cur_dsd = lcont_pkt.dsd;
3338                                         avail_dsds = 5;
3339                                         cont = 1;
3340                                         entry_cnt++;
3341                                 }
3342
3343                                 append_dsd64(&cur_dsd, sg);
3344                                 avail_dsds--;
3345
3346                                 if (avail_dsds == 0 && cont == 1) {
3347                                         cont = 0;
3348                                         memcpy_toio(
3349                                             (void __iomem *)cont_pkt,
3350                                             &lcont_pkt, REQUEST_ENTRY_SIZE);
3351                                         ql_dump_buffer(
3352                                             ql_dbg_user + ql_dbg_verbose,
3353                                             sp->vha, 0x3042,
3354                                             (uint8_t *)&lcont_pkt,
3355                                              REQUEST_ENTRY_SIZE);
3356                                 }
3357                         }
3358                         if (avail_dsds != 0 && cont == 1) {
3359                                 memcpy_toio((void __iomem *)cont_pkt,
3360                                     &lcont_pkt, REQUEST_ENTRY_SIZE);
3361                                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3362                                     sp->vha, 0x3043,
3363                                     (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3364                         }
3365                 }
3366
3367                 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3368                         int avail_dsds, tot_dsds;
3369                         cont_a64_entry_t lcont_pkt;
3370                         cont_a64_entry_t *cont_pkt = NULL;
3371                         struct dsd64 *cur_dsd;
3372                         int index = 0, cont = 0;
3373
3374                         fx_iocb.rsp_dsdcnt =
3375                            cpu_to_le16(bsg_job->reply_payload.sg_cnt);
3376                         tot_dsds = bsg_job->reply_payload.sg_cnt;
3377                         cur_dsd = &fx_iocb.dseg_rsp;
3378                         avail_dsds = 1;
3379
3380                         for_each_sg(bsg_job->reply_payload.sg_list, sg,
3381                             tot_dsds, index) {
3382                                 /* Allocate additional continuation packets? */
3383                                 if (avail_dsds == 0) {
3384                                         /*
3385                                         * Five DSDs are available in the Cont.
3386                                         * Type 1 IOCB.
3387                                         */
3388                                         memset(&lcont_pkt, 0,
3389                                             REQUEST_ENTRY_SIZE);
3390                                         cont_pkt =
3391                                             qlafx00_prep_cont_type1_iocb(
3392                                                 sp->vha->req, &lcont_pkt);
3393                                         cur_dsd = lcont_pkt.dsd;
3394                                         avail_dsds = 5;
3395                                         cont = 1;
3396                                         entry_cnt++;
3397                                 }
3398
3399                                 append_dsd64(&cur_dsd, sg);
3400                                 avail_dsds--;
3401
3402                                 if (avail_dsds == 0 && cont == 1) {
3403                                         cont = 0;
3404                                         memcpy_toio((void __iomem *)cont_pkt,
3405                                             &lcont_pkt,
3406                                             REQUEST_ENTRY_SIZE);
3407                                         ql_dump_buffer(
3408                                             ql_dbg_user + ql_dbg_verbose,
3409                                             sp->vha, 0x3045,
3410                                             (uint8_t *)&lcont_pkt,
3411                                             REQUEST_ENTRY_SIZE);
3412                                 }
3413                         }
3414                         if (avail_dsds != 0 && cont == 1) {
3415                                 memcpy_toio((void __iomem *)cont_pkt,
3416                                     &lcont_pkt, REQUEST_ENTRY_SIZE);
3417                                 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3418                                     sp->vha, 0x3046,
3419                                     (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3420                         }
3421                 }
3422
3423                 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
3424                         fx_iocb.dataword = piocb_rqst->dataword;
3425                 fx_iocb.flags = piocb_rqst->flags;
3426                 fx_iocb.entry_count = entry_cnt;
3427         }
3428
3429         ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3430             sp->vha, 0x3047, &fx_iocb, sizeof(fx_iocb));
3431
3432         memcpy_toio((void __iomem *)pfxiocb, &fx_iocb, sizeof(fx_iocb));
3433         wmb();
3434 }