2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
8 #include "qla_target.h"
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
13 static struct mb_cmd_name {
17 {MBC_GET_PORT_DATABASE, "GPDB"},
18 {MBC_GET_ID_LIST, "GIDList"},
19 {MBC_GET_LINK_PRIV_STATS, "Stats"},
20 {MBC_GET_RESOURCE_COUNTS, "ResCnt"},
23 static const char *mb_to_str(uint16_t cmd)
26 struct mb_cmd_name *e;
28 for (i = 0; i < ARRAY_SIZE(mb_str); i++) {
36 static struct rom_cmd {
40 { MBC_EXECUTE_FIRMWARE },
41 { MBC_READ_RAM_WORD },
42 { MBC_MAILBOX_REGISTER_TEST },
43 { MBC_VERIFY_CHECKSUM },
44 { MBC_GET_FIRMWARE_VERSION },
45 { MBC_LOAD_RISC_RAM },
46 { MBC_DUMP_RISC_RAM },
47 { MBC_LOAD_RISC_RAM_EXTENDED },
48 { MBC_DUMP_RISC_RAM_EXTENDED },
49 { MBC_WRITE_RAM_WORD_EXTENDED },
50 { MBC_READ_RAM_EXTENDED },
51 { MBC_GET_RESOURCE_COUNTS },
52 { MBC_SET_FIRMWARE_OPTION },
53 { MBC_MID_INITIALIZE_FIRMWARE },
54 { MBC_GET_FIRMWARE_STATE },
55 { MBC_GET_MEM_OFFLOAD_CNTRL_STAT },
56 { MBC_GET_RETRY_COUNT },
57 { MBC_TRACE_CONTROL },
58 { MBC_INITIALIZE_MULTIQ },
59 { MBC_IOCB_COMMAND_A64 },
60 { MBC_GET_ADAPTER_LOOP_ID },
62 { MBC_SET_RNID_PARAMS },
63 { MBC_GET_RNID_PARAMS },
64 { MBC_GET_SET_ZIO_THRESHOLD },
67 static int is_rom_cmd(uint16_t cmd)
72 for (i = 0; i < ARRAY_SIZE(rom_cmds); i++) {
82 * qla2x00_mailbox_command
83 * Issue mailbox command and waits for completion.
86 * ha = adapter block pointer.
87 * mcp = driver internal mbx struct pointer.
90 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
93 * 0 : QLA_SUCCESS = cmd performed success
94 * 1 : QLA_FUNCTION_FAILED (error encountered)
95 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
101 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
104 unsigned long flags = 0;
106 uint8_t abort_active;
108 uint16_t command = 0;
110 __le16 __iomem *optr;
113 unsigned long wait_time;
114 struct qla_hw_data *ha = vha->hw;
115 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
119 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
121 if (ha->pdev->error_state == pci_channel_io_perm_failure) {
122 ql_log(ql_log_warn, vha, 0x1001,
123 "PCI channel failed permanently, exiting.\n");
124 return QLA_FUNCTION_TIMEOUT;
127 if (vha->device_flags & DFLG_DEV_FAILED) {
128 ql_log(ql_log_warn, vha, 0x1002,
129 "Device in failed state, exiting.\n");
130 return QLA_FUNCTION_TIMEOUT;
133 /* if PCI error, then avoid mbx processing.*/
134 if (test_bit(PFLG_DISCONNECTED, &base_vha->dpc_flags) &&
135 test_bit(UNLOADING, &base_vha->dpc_flags)) {
136 ql_log(ql_log_warn, vha, 0xd04e,
137 "PCI error, exiting.\n");
138 return QLA_FUNCTION_TIMEOUT;
142 io_lock_on = base_vha->flags.init_done;
145 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
146 chip_reset = ha->chip_reset;
148 if (ha->flags.pci_channel_io_perm_failure) {
149 ql_log(ql_log_warn, vha, 0x1003,
150 "Perm failure on EEH timeout MBX, exiting.\n");
151 return QLA_FUNCTION_TIMEOUT;
154 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
155 /* Setting Link-Down error */
156 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
157 ql_log(ql_log_warn, vha, 0x1004,
158 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
159 return QLA_FUNCTION_TIMEOUT;
162 /* check if ISP abort is active and return cmd with timeout */
163 if ((test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
164 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
165 test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) &&
166 !is_rom_cmd(mcp->mb[0])) {
167 ql_log(ql_log_info, vha, 0x1005,
168 "Cmd 0x%x aborted with timeout since ISP Abort is pending\n",
170 return QLA_FUNCTION_TIMEOUT;
173 atomic_inc(&ha->num_pend_mbx_stage1);
175 * Wait for active mailbox commands to finish by waiting at most tov
176 * seconds. This is to serialize actual issuing of mailbox cmds during
177 * non ISP abort time.
179 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
180 /* Timeout occurred. Return error. */
181 ql_log(ql_log_warn, vha, 0xd035,
182 "Cmd access timeout, cmd=0x%x, Exiting.\n",
184 atomic_dec(&ha->num_pend_mbx_stage1);
185 return QLA_FUNCTION_TIMEOUT;
187 atomic_dec(&ha->num_pend_mbx_stage1);
188 if (ha->flags.purge_mbox || chip_reset != ha->chip_reset) {
194 /* Save mailbox command for debug */
197 ql_dbg(ql_dbg_mbx, vha, 0x1006,
198 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
200 spin_lock_irqsave(&ha->hardware_lock, flags);
202 if (ha->flags.purge_mbox || chip_reset != ha->chip_reset ||
203 ha->flags.mbox_busy) {
205 spin_unlock_irqrestore(&ha->hardware_lock, flags);
208 ha->flags.mbox_busy = 1;
210 /* Load mailbox registers. */
212 optr = ®->isp82.mailbox_in[0];
213 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
214 optr = ®->isp24.mailbox0;
216 optr = MAILBOX_REG(ha, ®->isp, 0);
219 command = mcp->mb[0];
220 mboxes = mcp->out_mb;
222 ql_dbg(ql_dbg_mbx, vha, 0x1111,
223 "Mailbox registers (OUT):\n");
224 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
225 if (IS_QLA2200(ha) && cnt == 8)
226 optr = MAILBOX_REG(ha, ®->isp, 8);
227 if (mboxes & BIT_0) {
228 ql_dbg(ql_dbg_mbx, vha, 0x1112,
229 "mbox[%d]<-0x%04x\n", cnt, *iptr);
230 wrt_reg_word(optr, *iptr);
238 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
239 "I/O Address = %p.\n", optr);
241 /* Issue set host interrupt command to send cmd out. */
242 ha->flags.mbox_int = 0;
243 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
245 /* Unlock mbx registers and wait for interrupt */
246 ql_dbg(ql_dbg_mbx, vha, 0x100f,
247 "Going to unlock irq & waiting for interrupts. "
248 "jiffies=%lx.\n", jiffies);
250 /* Wait for mbx cmd completion until timeout */
251 atomic_inc(&ha->num_pend_mbx_stage2);
252 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
253 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
256 wrt_reg_dword(®->isp82.hint, HINT_MBX_INT_PENDING);
257 else if (IS_FWI2_CAPABLE(ha))
258 wrt_reg_dword(®->isp24.hccr, HCCRX_SET_HOST_INT);
260 wrt_reg_word(®->isp.hccr, HCCR_SET_HOST_INT);
261 spin_unlock_irqrestore(&ha->hardware_lock, flags);
264 atomic_inc(&ha->num_pend_mbx_stage3);
265 if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
267 if (chip_reset != ha->chip_reset) {
268 spin_lock_irqsave(&ha->hardware_lock, flags);
269 ha->flags.mbox_busy = 0;
270 spin_unlock_irqrestore(&ha->hardware_lock,
272 atomic_dec(&ha->num_pend_mbx_stage2);
273 atomic_dec(&ha->num_pend_mbx_stage3);
277 ql_dbg(ql_dbg_mbx, vha, 0x117a,
278 "cmd=%x Timeout.\n", command);
279 spin_lock_irqsave(&ha->hardware_lock, flags);
280 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
281 spin_unlock_irqrestore(&ha->hardware_lock, flags);
283 } else if (ha->flags.purge_mbox ||
284 chip_reset != ha->chip_reset) {
285 spin_lock_irqsave(&ha->hardware_lock, flags);
286 ha->flags.mbox_busy = 0;
287 spin_unlock_irqrestore(&ha->hardware_lock, flags);
288 atomic_dec(&ha->num_pend_mbx_stage2);
289 atomic_dec(&ha->num_pend_mbx_stage3);
293 atomic_dec(&ha->num_pend_mbx_stage3);
295 if (time_after(jiffies, wait_time + 5 * HZ))
296 ql_log(ql_log_warn, vha, 0x1015, "cmd=0x%x, waited %d msecs\n",
297 command, jiffies_to_msecs(jiffies - wait_time));
299 ql_dbg(ql_dbg_mbx, vha, 0x1011,
300 "Cmd=%x Polling Mode.\n", command);
302 if (IS_P3P_TYPE(ha)) {
303 if (rd_reg_dword(®->isp82.hint) &
304 HINT_MBX_INT_PENDING) {
305 ha->flags.mbox_busy = 0;
306 spin_unlock_irqrestore(&ha->hardware_lock,
308 atomic_dec(&ha->num_pend_mbx_stage2);
309 ql_dbg(ql_dbg_mbx, vha, 0x1012,
310 "Pending mailbox timeout, exiting.\n");
311 rval = QLA_FUNCTION_TIMEOUT;
314 wrt_reg_dword(®->isp82.hint, HINT_MBX_INT_PENDING);
315 } else if (IS_FWI2_CAPABLE(ha))
316 wrt_reg_dword(®->isp24.hccr, HCCRX_SET_HOST_INT);
318 wrt_reg_word(®->isp.hccr, HCCR_SET_HOST_INT);
319 spin_unlock_irqrestore(&ha->hardware_lock, flags);
321 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
322 while (!ha->flags.mbox_int) {
323 if (ha->flags.purge_mbox ||
324 chip_reset != ha->chip_reset) {
325 spin_lock_irqsave(&ha->hardware_lock, flags);
326 ha->flags.mbox_busy = 0;
327 spin_unlock_irqrestore(&ha->hardware_lock,
329 atomic_dec(&ha->num_pend_mbx_stage2);
334 if (time_after(jiffies, wait_time))
338 * Check if it's UNLOADING, cause we cannot poll in
339 * this case, or else a NULL pointer dereference
342 if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)))
343 return QLA_FUNCTION_TIMEOUT;
345 /* Check for pending interrupts. */
346 qla2x00_poll(ha->rsp_q_map[0]);
348 if (!ha->flags.mbox_int &&
350 command == MBC_LOAD_RISC_RAM_EXTENDED))
353 ql_dbg(ql_dbg_mbx, vha, 0x1013,
355 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
357 atomic_dec(&ha->num_pend_mbx_stage2);
359 /* Check whether we timed out */
360 if (ha->flags.mbox_int) {
363 ql_dbg(ql_dbg_mbx, vha, 0x1014,
364 "Cmd=%x completed.\n", command);
366 /* Got interrupt. Clear the flag. */
367 ha->flags.mbox_int = 0;
368 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
370 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
371 spin_lock_irqsave(&ha->hardware_lock, flags);
372 ha->flags.mbox_busy = 0;
373 spin_unlock_irqrestore(&ha->hardware_lock, flags);
375 /* Setting Link-Down error */
376 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
378 rval = QLA_FUNCTION_FAILED;
379 ql_log(ql_log_warn, vha, 0xd048,
380 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
384 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE) {
385 ql_dbg(ql_dbg_mbx, vha, 0x11ff,
386 "mb_out[0] = %#x <> %#x\n", ha->mailbox_out[0],
387 MBS_COMMAND_COMPLETE);
388 rval = QLA_FUNCTION_FAILED;
391 /* Load return mailbox registers. */
393 iptr = (uint16_t *)&ha->mailbox_out[0];
396 ql_dbg(ql_dbg_mbx, vha, 0x1113,
397 "Mailbox registers (IN):\n");
398 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
399 if (mboxes & BIT_0) {
401 ql_dbg(ql_dbg_mbx, vha, 0x1114,
402 "mbox[%d]->0x%04x\n", cnt, *iptr2);
412 uint32_t ictrl, host_status, hccr;
415 if (IS_FWI2_CAPABLE(ha)) {
416 mb[0] = rd_reg_word(®->isp24.mailbox0);
417 mb[1] = rd_reg_word(®->isp24.mailbox1);
418 mb[2] = rd_reg_word(®->isp24.mailbox2);
419 mb[3] = rd_reg_word(®->isp24.mailbox3);
420 mb[7] = rd_reg_word(®->isp24.mailbox7);
421 ictrl = rd_reg_dword(®->isp24.ictrl);
422 host_status = rd_reg_dword(®->isp24.host_status);
423 hccr = rd_reg_dword(®->isp24.hccr);
425 ql_log(ql_log_warn, vha, 0xd04c,
426 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
427 "mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n",
428 command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3],
429 mb[7], host_status, hccr);
432 mb[0] = RD_MAILBOX_REG(ha, ®->isp, 0);
433 ictrl = rd_reg_word(®->isp.ictrl);
434 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
435 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
436 "mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]);
438 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
440 /* Capture FW dump only, if PCI device active */
441 if (!pci_channel_offline(vha->hw->pdev)) {
442 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
443 if (w == 0xffff || ictrl == 0xffffffff ||
444 (chip_reset != ha->chip_reset)) {
445 /* This is special case if there is unload
446 * of driver happening and if PCI device go
447 * into bad state due to PCI error condition
448 * then only PCI ERR flag would be set.
449 * we will do premature exit for above case.
451 spin_lock_irqsave(&ha->hardware_lock, flags);
452 ha->flags.mbox_busy = 0;
453 spin_unlock_irqrestore(&ha->hardware_lock,
455 rval = QLA_FUNCTION_TIMEOUT;
459 /* Attempt to capture firmware dump for further
460 * anallysis of the current formware state. we do not
461 * need to do this if we are intentionally generating
464 if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
465 qla2xxx_dump_fw(vha);
466 rval = QLA_FUNCTION_TIMEOUT;
469 spin_lock_irqsave(&ha->hardware_lock, flags);
470 ha->flags.mbox_busy = 0;
471 spin_unlock_irqrestore(&ha->hardware_lock, flags);
476 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
477 ql_dbg(ql_dbg_mbx, vha, 0x101a,
478 "Checking for additional resp interrupt.\n");
480 /* polling mode for non isp_abort commands. */
481 qla2x00_poll(ha->rsp_q_map[0]);
484 if (rval == QLA_FUNCTION_TIMEOUT &&
485 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
486 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
487 ha->flags.eeh_busy) {
488 /* not in dpc. schedule it for dpc to take over. */
489 ql_dbg(ql_dbg_mbx, vha, 0x101b,
490 "Timeout, schedule isp_abort_needed.\n");
492 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
493 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
494 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
495 if (IS_QLA82XX(ha)) {
496 ql_dbg(ql_dbg_mbx, vha, 0x112a,
497 "disabling pause transmit on port "
500 QLA82XX_CRB_NIU + 0x98,
501 CRB_NIU_XG_PAUSE_CTL_P0|
502 CRB_NIU_XG_PAUSE_CTL_P1);
504 ql_log(ql_log_info, base_vha, 0x101c,
505 "Mailbox cmd timeout occurred, cmd=0x%x, "
506 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
507 "abort.\n", command, mcp->mb[0],
509 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
510 qla2xxx_wake_dpc(vha);
512 } else if (current == ha->dpc_thread) {
513 /* call abort directly since we are in the DPC thread */
514 ql_dbg(ql_dbg_mbx, vha, 0x101d,
515 "Timeout, calling abort_isp.\n");
517 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
518 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
519 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
520 if (IS_QLA82XX(ha)) {
521 ql_dbg(ql_dbg_mbx, vha, 0x112b,
522 "disabling pause transmit on port "
525 QLA82XX_CRB_NIU + 0x98,
526 CRB_NIU_XG_PAUSE_CTL_P0|
527 CRB_NIU_XG_PAUSE_CTL_P1);
529 ql_log(ql_log_info, base_vha, 0x101e,
530 "Mailbox cmd timeout occurred, cmd=0x%x, "
531 "mb[0]=0x%x. Scheduling ISP abort ",
532 command, mcp->mb[0]);
533 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
534 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
535 /* Allow next mbx cmd to come in. */
536 complete(&ha->mbx_cmd_comp);
537 if (ha->isp_ops->abort_isp(vha)) {
538 /* Failed. retry later. */
539 set_bit(ISP_ABORT_NEEDED,
542 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
543 ql_dbg(ql_dbg_mbx, vha, 0x101f,
544 "Finished abort_isp.\n");
551 /* Allow next mbx cmd to come in. */
552 complete(&ha->mbx_cmd_comp);
555 if (rval == QLA_ABORTED) {
556 ql_log(ql_log_info, vha, 0xd035,
557 "Chip Reset in progress. Purging Mbox cmd=0x%x.\n",
560 if (ql2xextended_error_logging & (ql_dbg_disc|ql_dbg_mbx)) {
561 pr_warn("%s [%s]-%04x:%ld: **** Failed=%x", QL_MSGHDR,
562 dev_name(&ha->pdev->dev), 0x1020+0x800,
566 for (i = 0; i < ha->mbx_count && cnt; i++, mboxes >>= 1)
567 if (mboxes & BIT_0) {
568 printk(" mb[%u]=%x", i, mcp->mb[i]);
571 pr_warn(" cmd=%x ****\n", command);
573 if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha))) {
574 ql_dbg(ql_dbg_mbx, vha, 0x1198,
575 "host_status=%#x intr_ctrl=%#x intr_status=%#x\n",
576 rd_reg_dword(®->isp24.host_status),
577 rd_reg_dword(®->isp24.ictrl),
578 rd_reg_dword(®->isp24.istatus));
580 ql_dbg(ql_dbg_mbx, vha, 0x1206,
581 "ctrl_status=%#x ictrl=%#x istatus=%#x\n",
582 rd_reg_word(®->isp.ctrl_status),
583 rd_reg_word(®->isp.ictrl),
584 rd_reg_word(®->isp.istatus));
587 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
594 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
595 uint32_t risc_code_size)
598 struct qla_hw_data *ha = vha->hw;
600 mbx_cmd_t *mcp = &mc;
602 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
603 "Entered %s.\n", __func__);
605 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
606 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
607 mcp->mb[8] = MSW(risc_addr);
608 mcp->out_mb = MBX_8|MBX_0;
610 mcp->mb[0] = MBC_LOAD_RISC_RAM;
613 mcp->mb[1] = LSW(risc_addr);
614 mcp->mb[2] = MSW(req_dma);
615 mcp->mb[3] = LSW(req_dma);
616 mcp->mb[6] = MSW(MSD(req_dma));
617 mcp->mb[7] = LSW(MSD(req_dma));
618 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
619 if (IS_FWI2_CAPABLE(ha)) {
620 mcp->mb[4] = MSW(risc_code_size);
621 mcp->mb[5] = LSW(risc_code_size);
622 mcp->out_mb |= MBX_5|MBX_4;
624 mcp->mb[4] = LSW(risc_code_size);
625 mcp->out_mb |= MBX_4;
628 mcp->in_mb = MBX_1|MBX_0;
629 mcp->tov = MBX_TOV_SECONDS;
631 rval = qla2x00_mailbox_command(vha, mcp);
633 if (rval != QLA_SUCCESS) {
634 ql_dbg(ql_dbg_mbx, vha, 0x1023,
635 "Failed=%x mb[0]=%x mb[1]=%x.\n",
636 rval, mcp->mb[0], mcp->mb[1]);
638 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
639 "Done %s.\n", __func__);
645 #define NVME_ENABLE_FLAG BIT_3
649 * Start adapter firmware.
652 * ha = adapter block pointer.
653 * TARGET_QUEUE_LOCK must be released.
654 * ADAPTER_STATE_LOCK must be released.
657 * qla2x00 local function return status code.
663 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
666 struct qla_hw_data *ha = vha->hw;
668 mbx_cmd_t *mcp = &mc;
670 #define EXE_FW_FORCE_SEMAPHORE BIT_7
673 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
674 "Entered %s.\n", __func__);
677 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
680 if (IS_FWI2_CAPABLE(ha)) {
681 mcp->mb[1] = MSW(risc_addr);
682 mcp->mb[2] = LSW(risc_addr);
688 if (ha->flags.lr_detected) {
690 if (IS_BPM_RANGE_CAPABLE(ha))
692 ha->lr_distance << LR_DIST_FW_POS;
695 if (ql2xnvmeenable && (IS_QLA27XX(ha) || IS_QLA28XX(ha)))
696 mcp->mb[4] |= NVME_ENABLE_FLAG;
698 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
699 struct nvram_81xx *nv = ha->nvram;
700 /* set minimum speed if specified in nvram */
701 if (nv->min_supported_speed >= 2 &&
702 nv->min_supported_speed <= 5) {
704 mcp->mb[11] |= nv->min_supported_speed & 0xF;
705 mcp->out_mb |= MBX_11;
707 vha->min_supported_speed =
708 nv->min_supported_speed;
712 if (ha->flags.exlogins_enabled)
713 mcp->mb[4] |= ENABLE_EXTENDED_LOGIN;
715 if (ha->flags.exchoffld_enabled)
716 mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD;
719 mcp->mb[11] |= EXE_FW_FORCE_SEMAPHORE;
721 mcp->out_mb |= MBX_4 | MBX_3 | MBX_2 | MBX_1 | MBX_11;
722 mcp->in_mb |= MBX_3 | MBX_2 | MBX_1;
724 mcp->mb[1] = LSW(risc_addr);
725 mcp->out_mb |= MBX_1;
726 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
728 mcp->out_mb |= MBX_2;
732 mcp->tov = MBX_TOV_SECONDS;
734 rval = qla2x00_mailbox_command(vha, mcp);
736 if (rval != QLA_SUCCESS) {
737 if (IS_QLA28XX(ha) && rval == QLA_COMMAND_ERROR &&
738 mcp->mb[1] == 0x27 && retry) {
741 ql_dbg(ql_dbg_async, vha, 0x1026,
742 "Exe FW: force semaphore.\n");
746 ql_dbg(ql_dbg_mbx, vha, 0x1026,
747 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
751 if (!IS_FWI2_CAPABLE(ha))
754 ha->fw_ability_mask = mcp->mb[3] << 16 | mcp->mb[2];
755 ql_dbg(ql_dbg_mbx, vha, 0x119a,
756 "fw_ability_mask=%x.\n", ha->fw_ability_mask);
757 ql_dbg(ql_dbg_mbx, vha, 0x1027, "exchanges=%x.\n", mcp->mb[1]);
758 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
759 ha->max_supported_speed = mcp->mb[2] & (BIT_0|BIT_1);
760 ql_dbg(ql_dbg_mbx, vha, 0x119b, "max_supported_speed=%s.\n",
761 ha->max_supported_speed == 0 ? "16Gps" :
762 ha->max_supported_speed == 1 ? "32Gps" :
763 ha->max_supported_speed == 2 ? "64Gps" : "unknown");
764 if (vha->min_supported_speed) {
765 ha->min_supported_speed = mcp->mb[5] &
766 (BIT_0 | BIT_1 | BIT_2);
767 ql_dbg(ql_dbg_mbx, vha, 0x119c,
768 "min_supported_speed=%s.\n",
769 ha->min_supported_speed == 6 ? "64Gps" :
770 ha->min_supported_speed == 5 ? "32Gps" :
771 ha->min_supported_speed == 4 ? "16Gps" :
772 ha->min_supported_speed == 3 ? "8Gps" :
773 ha->min_supported_speed == 2 ? "4Gps" : "unknown");
778 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
779 "Done %s.\n", __func__);
785 * qla_get_exlogin_status
786 * Get extended login status
787 * uses the memory offload control/status Mailbox
790 * ha: adapter state pointer.
791 * fwopt: firmware options
794 * qla2x00 local function status
799 #define FETCH_XLOGINS_STAT 0x8
801 qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
802 uint16_t *ex_logins_cnt)
806 mbx_cmd_t *mcp = &mc;
808 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f,
809 "Entered %s\n", __func__);
811 memset(mcp->mb, 0 , sizeof(mcp->mb));
812 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
813 mcp->mb[1] = FETCH_XLOGINS_STAT;
814 mcp->out_mb = MBX_1|MBX_0;
815 mcp->in_mb = MBX_10|MBX_4|MBX_0;
816 mcp->tov = MBX_TOV_SECONDS;
819 rval = qla2x00_mailbox_command(vha, mcp);
820 if (rval != QLA_SUCCESS) {
821 ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval);
823 *buf_sz = mcp->mb[4];
824 *ex_logins_cnt = mcp->mb[10];
826 ql_log(ql_log_info, vha, 0x1190,
827 "buffer size 0x%x, exchange login count=%d\n",
828 mcp->mb[4], mcp->mb[10]);
830 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116,
831 "Done %s.\n", __func__);
838 * qla_set_exlogin_mem_cfg
839 * set extended login memory configuration
840 * Mbx needs to be issues before init_cb is set
843 * ha: adapter state pointer.
844 * buffer: buffer pointer
845 * phys_addr: physical address of buffer
846 * size: size of buffer
847 * TARGET_QUEUE_LOCK must be released
848 * ADAPTER_STATE_LOCK must be release
851 * qla2x00 local funxtion status code.
856 #define CONFIG_XLOGINS_MEM 0x3
858 qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
862 mbx_cmd_t *mcp = &mc;
863 struct qla_hw_data *ha = vha->hw;
865 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
866 "Entered %s.\n", __func__);
868 memset(mcp->mb, 0 , sizeof(mcp->mb));
869 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
870 mcp->mb[1] = CONFIG_XLOGINS_MEM;
871 mcp->mb[2] = MSW(phys_addr);
872 mcp->mb[3] = LSW(phys_addr);
873 mcp->mb[6] = MSW(MSD(phys_addr));
874 mcp->mb[7] = LSW(MSD(phys_addr));
875 mcp->mb[8] = MSW(ha->exlogin_size);
876 mcp->mb[9] = LSW(ha->exlogin_size);
877 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
878 mcp->in_mb = MBX_11|MBX_0;
879 mcp->tov = MBX_TOV_SECONDS;
881 rval = qla2x00_mailbox_command(vha, mcp);
882 if (rval != QLA_SUCCESS) {
884 ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
886 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
887 "Done %s.\n", __func__);
894 * qla_get_exchoffld_status
895 * Get exchange offload status
896 * uses the memory offload control/status Mailbox
899 * ha: adapter state pointer.
900 * fwopt: firmware options
903 * qla2x00 local function status
908 #define FETCH_XCHOFFLD_STAT 0x2
910 qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
911 uint16_t *ex_logins_cnt)
915 mbx_cmd_t *mcp = &mc;
917 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019,
918 "Entered %s\n", __func__);
920 memset(mcp->mb, 0 , sizeof(mcp->mb));
921 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
922 mcp->mb[1] = FETCH_XCHOFFLD_STAT;
923 mcp->out_mb = MBX_1|MBX_0;
924 mcp->in_mb = MBX_10|MBX_4|MBX_0;
925 mcp->tov = MBX_TOV_SECONDS;
928 rval = qla2x00_mailbox_command(vha, mcp);
929 if (rval != QLA_SUCCESS) {
930 ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval);
932 *buf_sz = mcp->mb[4];
933 *ex_logins_cnt = mcp->mb[10];
935 ql_log(ql_log_info, vha, 0x118e,
936 "buffer size 0x%x, exchange offload count=%d\n",
937 mcp->mb[4], mcp->mb[10]);
939 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156,
940 "Done %s.\n", __func__);
947 * qla_set_exchoffld_mem_cfg
948 * Set exchange offload memory configuration
949 * Mbx needs to be issues before init_cb is set
952 * ha: adapter state pointer.
953 * buffer: buffer pointer
954 * phys_addr: physical address of buffer
955 * size: size of buffer
956 * TARGET_QUEUE_LOCK must be released
957 * ADAPTER_STATE_LOCK must be release
960 * qla2x00 local funxtion status code.
965 #define CONFIG_XCHOFFLD_MEM 0x3
967 qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha)
971 mbx_cmd_t *mcp = &mc;
972 struct qla_hw_data *ha = vha->hw;
974 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157,
975 "Entered %s.\n", __func__);
977 memset(mcp->mb, 0 , sizeof(mcp->mb));
978 mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
979 mcp->mb[1] = CONFIG_XCHOFFLD_MEM;
980 mcp->mb[2] = MSW(ha->exchoffld_buf_dma);
981 mcp->mb[3] = LSW(ha->exchoffld_buf_dma);
982 mcp->mb[6] = MSW(MSD(ha->exchoffld_buf_dma));
983 mcp->mb[7] = LSW(MSD(ha->exchoffld_buf_dma));
984 mcp->mb[8] = MSW(ha->exchoffld_size);
985 mcp->mb[9] = LSW(ha->exchoffld_size);
986 mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
987 mcp->in_mb = MBX_11|MBX_0;
988 mcp->tov = MBX_TOV_SECONDS;
990 rval = qla2x00_mailbox_command(vha, mcp);
991 if (rval != QLA_SUCCESS) {
993 ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval);
995 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
996 "Done %s.\n", __func__);
1003 * qla2x00_get_fw_version
1004 * Get firmware version.
1007 * ha: adapter state pointer.
1008 * major: pointer for major number.
1009 * minor: pointer for minor number.
1010 * subminor: pointer for subminor number.
1013 * qla2x00 local function return status code.
1019 qla2x00_get_fw_version(scsi_qla_host_t *vha)
1023 mbx_cmd_t *mcp = &mc;
1024 struct qla_hw_data *ha = vha->hw;
1026 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
1027 "Entered %s.\n", __func__);
1029 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
1030 mcp->out_mb = MBX_0;
1031 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1032 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
1033 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
1034 if (IS_FWI2_CAPABLE(ha))
1035 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
1036 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
1038 MBX_25|MBX_24|MBX_23|MBX_22|MBX_21|MBX_20|MBX_19|MBX_18|
1039 MBX_14|MBX_13|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7;
1042 mcp->tov = MBX_TOV_SECONDS;
1043 rval = qla2x00_mailbox_command(vha, mcp);
1044 if (rval != QLA_SUCCESS)
1047 /* Return mailbox data. */
1048 ha->fw_major_version = mcp->mb[1];
1049 ha->fw_minor_version = mcp->mb[2];
1050 ha->fw_subminor_version = mcp->mb[3];
1051 ha->fw_attributes = mcp->mb[6];
1052 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
1053 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
1055 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
1057 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
1058 ha->mpi_version[0] = mcp->mb[10] & 0xff;
1059 ha->mpi_version[1] = mcp->mb[11] >> 8;
1060 ha->mpi_version[2] = mcp->mb[11] & 0xff;
1061 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
1062 ha->phy_version[0] = mcp->mb[8] & 0xff;
1063 ha->phy_version[1] = mcp->mb[9] >> 8;
1064 ha->phy_version[2] = mcp->mb[9] & 0xff;
1067 if (IS_FWI2_CAPABLE(ha)) {
1068 ha->fw_attributes_h = mcp->mb[15];
1069 ha->fw_attributes_ext[0] = mcp->mb[16];
1070 ha->fw_attributes_ext[1] = mcp->mb[17];
1071 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
1072 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
1073 __func__, mcp->mb[15], mcp->mb[6]);
1074 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
1075 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
1076 __func__, mcp->mb[17], mcp->mb[16]);
1078 if (ha->fw_attributes_h & 0x4)
1079 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d,
1080 "%s: Firmware supports Extended Login 0x%x\n",
1081 __func__, ha->fw_attributes_h);
1083 if (ha->fw_attributes_h & 0x8)
1084 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191,
1085 "%s: Firmware supports Exchange Offload 0x%x\n",
1086 __func__, ha->fw_attributes_h);
1089 * FW supports nvme and driver load parameter requested nvme.
1090 * BIT 26 of fw_attributes indicates NVMe support.
1092 if ((ha->fw_attributes_h &
1093 (FW_ATTR_H_NVME | FW_ATTR_H_NVME_UPDATED)) &&
1095 if (ha->fw_attributes_h & FW_ATTR_H_NVME_FBURST)
1096 vha->flags.nvme_first_burst = 1;
1098 vha->flags.nvme_enabled = 1;
1099 ql_log(ql_log_info, vha, 0xd302,
1100 "%s: FC-NVMe is Enabled (0x%x)\n",
1101 __func__, ha->fw_attributes_h);
1105 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1106 ha->serdes_version[0] = mcp->mb[7] & 0xff;
1107 ha->serdes_version[1] = mcp->mb[8] >> 8;
1108 ha->serdes_version[2] = mcp->mb[8] & 0xff;
1109 ha->mpi_version[0] = mcp->mb[10] & 0xff;
1110 ha->mpi_version[1] = mcp->mb[11] >> 8;
1111 ha->mpi_version[2] = mcp->mb[11] & 0xff;
1112 ha->pep_version[0] = mcp->mb[13] & 0xff;
1113 ha->pep_version[1] = mcp->mb[14] >> 8;
1114 ha->pep_version[2] = mcp->mb[14] & 0xff;
1115 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
1116 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
1117 ha->fw_ddr_ram_start = (mcp->mb[23] << 16) | mcp->mb[22];
1118 ha->fw_ddr_ram_end = (mcp->mb[25] << 16) | mcp->mb[24];
1119 if (IS_QLA28XX(ha)) {
1120 if (mcp->mb[16] & BIT_10)
1121 ha->flags.secure_fw = 1;
1123 ql_log(ql_log_info, vha, 0xffff,
1124 "Secure Flash Update in FW: %s\n",
1125 (ha->flags.secure_fw) ? "Supported" :
1129 if (ha->flags.scm_supported_a &&
1130 (ha->fw_attributes_ext[0] & FW_ATTR_EXT0_SCM_SUPPORTED)) {
1131 ha->flags.scm_supported_f = 1;
1132 memset(ha->sf_init_cb, 0, sizeof(struct init_sf_cb));
1133 ha->sf_init_cb->flags |= BIT_13;
1135 ql_log(ql_log_info, vha, 0x11a3, "SCM in FW: %s\n",
1136 (ha->flags.scm_supported_f) ? "Supported" :
1141 if (rval != QLA_SUCCESS) {
1143 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
1146 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
1147 "Done %s.\n", __func__);
1153 * qla2x00_get_fw_options
1154 * Set firmware options.
1157 * ha = adapter block pointer.
1158 * fwopt = pointer for firmware options.
1161 * qla2x00 local function return status code.
1167 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
1171 mbx_cmd_t *mcp = &mc;
1173 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
1174 "Entered %s.\n", __func__);
1176 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
1177 mcp->out_mb = MBX_0;
1178 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1179 mcp->tov = MBX_TOV_SECONDS;
1181 rval = qla2x00_mailbox_command(vha, mcp);
1183 if (rval != QLA_SUCCESS) {
1185 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
1187 fwopts[0] = mcp->mb[0];
1188 fwopts[1] = mcp->mb[1];
1189 fwopts[2] = mcp->mb[2];
1190 fwopts[3] = mcp->mb[3];
1192 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
1193 "Done %s.\n", __func__);
1201 * qla2x00_set_fw_options
1202 * Set firmware options.
1205 * ha = adapter block pointer.
1206 * fwopt = pointer for firmware options.
1209 * qla2x00 local function return status code.
1215 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
1219 mbx_cmd_t *mcp = &mc;
1221 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
1222 "Entered %s.\n", __func__);
1224 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
1225 mcp->mb[1] = fwopts[1];
1226 mcp->mb[2] = fwopts[2];
1227 mcp->mb[3] = fwopts[3];
1228 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1230 if (IS_FWI2_CAPABLE(vha->hw)) {
1231 mcp->in_mb |= MBX_1;
1232 mcp->mb[10] = fwopts[10];
1233 mcp->out_mb |= MBX_10;
1235 mcp->mb[10] = fwopts[10];
1236 mcp->mb[11] = fwopts[11];
1237 mcp->mb[12] = 0; /* Undocumented, but used */
1238 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
1240 mcp->tov = MBX_TOV_SECONDS;
1242 rval = qla2x00_mailbox_command(vha, mcp);
1244 fwopts[0] = mcp->mb[0];
1246 if (rval != QLA_SUCCESS) {
1248 ql_dbg(ql_dbg_mbx, vha, 0x1030,
1249 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
1252 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
1253 "Done %s.\n", __func__);
1260 * qla2x00_mbx_reg_test
1261 * Mailbox register wrap test.
1264 * ha = adapter block pointer.
1265 * TARGET_QUEUE_LOCK must be released.
1266 * ADAPTER_STATE_LOCK must be released.
1269 * qla2x00 local function return status code.
1275 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
1279 mbx_cmd_t *mcp = &mc;
1281 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
1282 "Entered %s.\n", __func__);
1284 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
1285 mcp->mb[1] = 0xAAAA;
1286 mcp->mb[2] = 0x5555;
1287 mcp->mb[3] = 0xAA55;
1288 mcp->mb[4] = 0x55AA;
1289 mcp->mb[5] = 0xA5A5;
1290 mcp->mb[6] = 0x5A5A;
1291 mcp->mb[7] = 0x2525;
1292 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1293 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1294 mcp->tov = MBX_TOV_SECONDS;
1296 rval = qla2x00_mailbox_command(vha, mcp);
1298 if (rval == QLA_SUCCESS) {
1299 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
1300 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
1301 rval = QLA_FUNCTION_FAILED;
1302 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
1303 mcp->mb[7] != 0x2525)
1304 rval = QLA_FUNCTION_FAILED;
1307 if (rval != QLA_SUCCESS) {
1309 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
1312 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
1313 "Done %s.\n", __func__);
1320 * qla2x00_verify_checksum
1321 * Verify firmware checksum.
1324 * ha = adapter block pointer.
1325 * TARGET_QUEUE_LOCK must be released.
1326 * ADAPTER_STATE_LOCK must be released.
1329 * qla2x00 local function return status code.
1335 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
1339 mbx_cmd_t *mcp = &mc;
1341 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
1342 "Entered %s.\n", __func__);
1344 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1345 mcp->out_mb = MBX_0;
1347 if (IS_FWI2_CAPABLE(vha->hw)) {
1348 mcp->mb[1] = MSW(risc_addr);
1349 mcp->mb[2] = LSW(risc_addr);
1350 mcp->out_mb |= MBX_2|MBX_1;
1351 mcp->in_mb |= MBX_2|MBX_1;
1353 mcp->mb[1] = LSW(risc_addr);
1354 mcp->out_mb |= MBX_1;
1355 mcp->in_mb |= MBX_1;
1358 mcp->tov = MBX_TOV_SECONDS;
1360 rval = qla2x00_mailbox_command(vha, mcp);
1362 if (rval != QLA_SUCCESS) {
1363 ql_dbg(ql_dbg_mbx, vha, 0x1036,
1364 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
1365 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
1367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
1368 "Done %s.\n", __func__);
1375 * qla2x00_issue_iocb
1376 * Issue IOCB using mailbox command
1379 * ha = adapter state pointer.
1380 * buffer = buffer pointer.
1381 * phys_addr = physical address of buffer.
1382 * size = size of buffer.
1383 * TARGET_QUEUE_LOCK must be released.
1384 * ADAPTER_STATE_LOCK must be released.
1387 * qla2x00 local function return status code.
1393 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
1394 dma_addr_t phys_addr, size_t size, uint32_t tov)
1398 mbx_cmd_t *mcp = &mc;
1400 if (!vha->hw->flags.fw_started)
1401 return QLA_INVALID_COMMAND;
1403 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
1404 "Entered %s.\n", __func__);
1406 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
1408 mcp->mb[2] = MSW(LSD(phys_addr));
1409 mcp->mb[3] = LSW(LSD(phys_addr));
1410 mcp->mb[6] = MSW(MSD(phys_addr));
1411 mcp->mb[7] = LSW(MSD(phys_addr));
1412 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1413 mcp->in_mb = MBX_1|MBX_0;
1416 rval = qla2x00_mailbox_command(vha, mcp);
1418 if (rval != QLA_SUCCESS) {
1420 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
1422 sts_entry_t *sts_entry = buffer;
1424 /* Mask reserved bits. */
1425 sts_entry->entry_status &=
1426 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
1427 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
1428 "Done %s (status=%x).\n", __func__,
1429 sts_entry->entry_status);
1436 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
1439 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
1444 * qla2x00_abort_command
1445 * Abort command aborts a specified IOCB.
1448 * ha = adapter block pointer.
1449 * sp = SB structure pointer.
1452 * qla2x00 local function return status code.
1458 qla2x00_abort_command(srb_t *sp)
1460 unsigned long flags = 0;
1462 uint32_t handle = 0;
1464 mbx_cmd_t *mcp = &mc;
1465 fc_port_t *fcport = sp->fcport;
1466 scsi_qla_host_t *vha = fcport->vha;
1467 struct qla_hw_data *ha = vha->hw;
1468 struct req_que *req;
1469 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
1471 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
1472 "Entered %s.\n", __func__);
1475 req = sp->qpair->req;
1479 spin_lock_irqsave(&ha->hardware_lock, flags);
1480 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1481 if (req->outstanding_cmds[handle] == sp)
1484 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1486 if (handle == req->num_outstanding_cmds) {
1487 /* command not found */
1488 return QLA_FUNCTION_FAILED;
1491 mcp->mb[0] = MBC_ABORT_COMMAND;
1492 if (HAS_EXTENDED_IDS(ha))
1493 mcp->mb[1] = fcport->loop_id;
1495 mcp->mb[1] = fcport->loop_id << 8;
1496 mcp->mb[2] = (uint16_t)handle;
1497 mcp->mb[3] = (uint16_t)(handle >> 16);
1498 mcp->mb[6] = (uint16_t)cmd->device->lun;
1499 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1501 mcp->tov = MBX_TOV_SECONDS;
1503 rval = qla2x00_mailbox_command(vha, mcp);
1505 if (rval != QLA_SUCCESS) {
1506 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
1508 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
1509 "Done %s.\n", __func__);
1516 qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
1520 mbx_cmd_t *mcp = &mc;
1521 scsi_qla_host_t *vha;
1525 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
1526 "Entered %s.\n", __func__);
1528 mcp->mb[0] = MBC_ABORT_TARGET;
1529 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
1530 if (HAS_EXTENDED_IDS(vha->hw)) {
1531 mcp->mb[1] = fcport->loop_id;
1533 mcp->out_mb |= MBX_10;
1535 mcp->mb[1] = fcport->loop_id << 8;
1537 mcp->mb[2] = vha->hw->loop_reset_delay;
1538 mcp->mb[9] = vha->vp_idx;
1541 mcp->tov = MBX_TOV_SECONDS;
1543 rval = qla2x00_mailbox_command(vha, mcp);
1544 if (rval != QLA_SUCCESS) {
1545 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
1546 "Failed=%x.\n", rval);
1549 /* Issue marker IOCB. */
1550 rval2 = qla2x00_marker(vha, vha->hw->base_qpair, fcport->loop_id, 0,
1552 if (rval2 != QLA_SUCCESS) {
1553 ql_dbg(ql_dbg_mbx, vha, 0x1040,
1554 "Failed to issue marker IOCB (%x).\n", rval2);
1556 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
1557 "Done %s.\n", __func__);
1564 qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1568 mbx_cmd_t *mcp = &mc;
1569 scsi_qla_host_t *vha;
1573 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1574 "Entered %s.\n", __func__);
1576 mcp->mb[0] = MBC_LUN_RESET;
1577 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1578 if (HAS_EXTENDED_IDS(vha->hw))
1579 mcp->mb[1] = fcport->loop_id;
1581 mcp->mb[1] = fcport->loop_id << 8;
1582 mcp->mb[2] = (u32)l;
1584 mcp->mb[9] = vha->vp_idx;
1587 mcp->tov = MBX_TOV_SECONDS;
1589 rval = qla2x00_mailbox_command(vha, mcp);
1590 if (rval != QLA_SUCCESS) {
1591 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1594 /* Issue marker IOCB. */
1595 rval2 = qla2x00_marker(vha, vha->hw->base_qpair, fcport->loop_id, l,
1597 if (rval2 != QLA_SUCCESS) {
1598 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1599 "Failed to issue marker IOCB (%x).\n", rval2);
1601 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1602 "Done %s.\n", __func__);
1609 * qla2x00_get_adapter_id
1610 * Get adapter ID and topology.
1613 * ha = adapter block pointer.
1614 * id = pointer for loop ID.
1615 * al_pa = pointer for AL_PA.
1616 * area = pointer for area.
1617 * domain = pointer for domain.
1618 * top = pointer for topology.
1619 * TARGET_QUEUE_LOCK must be released.
1620 * ADAPTER_STATE_LOCK must be released.
1623 * qla2x00 local function return status code.
1629 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1630 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1634 mbx_cmd_t *mcp = &mc;
1636 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1637 "Entered %s.\n", __func__);
1639 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1640 mcp->mb[9] = vha->vp_idx;
1641 mcp->out_mb = MBX_9|MBX_0;
1642 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1643 if (IS_CNA_CAPABLE(vha->hw))
1644 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1645 if (IS_FWI2_CAPABLE(vha->hw))
1646 mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1647 if (IS_QLA27XX(vha->hw) || IS_QLA28XX(vha->hw)) {
1648 mcp->in_mb |= MBX_15;
1649 mcp->out_mb |= MBX_7|MBX_21|MBX_22|MBX_23;
1652 mcp->tov = MBX_TOV_SECONDS;
1654 rval = qla2x00_mailbox_command(vha, mcp);
1655 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1656 rval = QLA_COMMAND_ERROR;
1657 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1658 rval = QLA_INVALID_COMMAND;
1662 *al_pa = LSB(mcp->mb[2]);
1663 *area = MSB(mcp->mb[2]);
1664 *domain = LSB(mcp->mb[3]);
1666 *sw_cap = mcp->mb[7];
1668 if (rval != QLA_SUCCESS) {
1670 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1672 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1673 "Done %s.\n", __func__);
1675 if (IS_CNA_CAPABLE(vha->hw)) {
1676 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1677 vha->fcoe_fcf_idx = mcp->mb[10];
1678 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1679 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1680 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1681 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1682 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1683 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1685 /* If FA-WWN supported */
1686 if (IS_FAWWN_CAPABLE(vha->hw)) {
1687 if (mcp->mb[7] & BIT_14) {
1688 vha->port_name[0] = MSB(mcp->mb[16]);
1689 vha->port_name[1] = LSB(mcp->mb[16]);
1690 vha->port_name[2] = MSB(mcp->mb[17]);
1691 vha->port_name[3] = LSB(mcp->mb[17]);
1692 vha->port_name[4] = MSB(mcp->mb[18]);
1693 vha->port_name[5] = LSB(mcp->mb[18]);
1694 vha->port_name[6] = MSB(mcp->mb[19]);
1695 vha->port_name[7] = LSB(mcp->mb[19]);
1696 fc_host_port_name(vha->host) =
1697 wwn_to_u64(vha->port_name);
1698 ql_dbg(ql_dbg_mbx, vha, 0x10ca,
1699 "FA-WWN acquired %016llx\n",
1700 wwn_to_u64(vha->port_name));
1704 if (IS_QLA27XX(vha->hw) || IS_QLA28XX(vha->hw)) {
1705 vha->bbcr = mcp->mb[15];
1706 if (mcp->mb[7] & SCM_EDC_ACC_RECEIVED) {
1707 ql_log(ql_log_info, vha, 0x11a4,
1708 "SCM: EDC ELS completed, flags 0x%x\n",
1711 if (mcp->mb[7] & SCM_RDF_ACC_RECEIVED) {
1712 vha->hw->flags.scm_enabled = 1;
1713 vha->scm_fabric_connection_flags |=
1714 SCM_FLAG_RDF_COMPLETED;
1715 ql_log(ql_log_info, vha, 0x11a5,
1716 "SCM: RDF ELS completed, flags 0x%x\n",
1726 * qla2x00_get_retry_cnt
1727 * Get current firmware login retry count and delay.
1730 * ha = adapter block pointer.
1731 * retry_cnt = pointer to login retry count.
1732 * tov = pointer to login timeout value.
1735 * qla2x00 local function return status code.
1741 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1747 mbx_cmd_t *mcp = &mc;
1749 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1750 "Entered %s.\n", __func__);
1752 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1753 mcp->out_mb = MBX_0;
1754 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1755 mcp->tov = MBX_TOV_SECONDS;
1757 rval = qla2x00_mailbox_command(vha, mcp);
1759 if (rval != QLA_SUCCESS) {
1761 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1762 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1764 /* Convert returned data and check our values. */
1765 *r_a_tov = mcp->mb[3] / 2;
1766 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1767 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1768 /* Update to the larger values */
1769 *retry_cnt = (uint8_t)mcp->mb[1];
1773 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1774 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1781 * qla2x00_init_firmware
1782 * Initialize adapter firmware.
1785 * ha = adapter block pointer.
1786 * dptr = Initialization control block pointer.
1787 * size = size of initialization control block.
1788 * TARGET_QUEUE_LOCK must be released.
1789 * ADAPTER_STATE_LOCK must be released.
1792 * qla2x00 local function return status code.
1798 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1802 mbx_cmd_t *mcp = &mc;
1803 struct qla_hw_data *ha = vha->hw;
1805 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1806 "Entered %s.\n", __func__);
1808 if (IS_P3P_TYPE(ha) && ql2xdbwr)
1809 qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr,
1810 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1812 if (ha->flags.npiv_supported)
1813 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1815 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1818 mcp->mb[2] = MSW(ha->init_cb_dma);
1819 mcp->mb[3] = LSW(ha->init_cb_dma);
1820 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1821 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1822 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1823 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1825 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1826 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1827 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1828 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1829 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1830 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1833 if (ha->flags.scm_supported_f) {
1834 mcp->mb[1] |= BIT_1;
1835 mcp->mb[16] = MSW(ha->sf_init_cb_dma);
1836 mcp->mb[17] = LSW(ha->sf_init_cb_dma);
1837 mcp->mb[18] = MSW(MSD(ha->sf_init_cb_dma));
1838 mcp->mb[19] = LSW(MSD(ha->sf_init_cb_dma));
1839 mcp->mb[15] = sizeof(*ha->sf_init_cb);
1840 mcp->out_mb |= MBX_19|MBX_18|MBX_17|MBX_16|MBX_15;
1843 /* 1 and 2 should normally be captured. */
1844 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1845 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
1846 /* mb3 is additional info about the installed SFP. */
1847 mcp->in_mb |= MBX_3;
1848 mcp->buf_size = size;
1849 mcp->flags = MBX_DMA_OUT;
1850 mcp->tov = MBX_TOV_SECONDS;
1851 rval = qla2x00_mailbox_command(vha, mcp);
1853 if (rval != QLA_SUCCESS) {
1855 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1856 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x.\n",
1857 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1859 ql_dbg(ql_dbg_mbx, vha, 0x104d, "init_cb:\n");
1860 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha,
1861 0x0104d, ha->init_cb, sizeof(*ha->init_cb));
1863 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1864 ql_dbg(ql_dbg_mbx, vha, 0x104d, "ex_init_cb:\n");
1865 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha,
1866 0x0104d, ha->ex_init_cb, sizeof(*ha->ex_init_cb));
1869 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1870 if (mcp->mb[2] == 6 || mcp->mb[3] == 2)
1871 ql_dbg(ql_dbg_mbx, vha, 0x119d,
1872 "Invalid SFP/Validation Failed\n");
1874 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1875 "Done %s.\n", __func__);
1883 * qla2x00_get_port_database
1884 * Issue normal/enhanced get port database mailbox command
1885 * and copy device name as necessary.
1888 * ha = adapter state pointer.
1889 * dev = structure pointer.
1890 * opt = enhanced cmd option byte.
1893 * qla2x00 local function return status code.
1899 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1903 mbx_cmd_t *mcp = &mc;
1904 port_database_t *pd;
1905 struct port_database_24xx *pd24;
1907 struct qla_hw_data *ha = vha->hw;
1909 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1910 "Entered %s.\n", __func__);
1913 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1915 ql_log(ql_log_warn, vha, 0x1050,
1916 "Failed to allocate port database structure.\n");
1918 return QLA_MEMORY_ALLOC_FAILED;
1921 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1922 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1923 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1924 mcp->mb[2] = MSW(pd_dma);
1925 mcp->mb[3] = LSW(pd_dma);
1926 mcp->mb[6] = MSW(MSD(pd_dma));
1927 mcp->mb[7] = LSW(MSD(pd_dma));
1928 mcp->mb[9] = vha->vp_idx;
1929 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1931 if (IS_FWI2_CAPABLE(ha)) {
1932 mcp->mb[1] = fcport->loop_id;
1934 mcp->out_mb |= MBX_10|MBX_1;
1935 mcp->in_mb |= MBX_1;
1936 } else if (HAS_EXTENDED_IDS(ha)) {
1937 mcp->mb[1] = fcport->loop_id;
1939 mcp->out_mb |= MBX_10|MBX_1;
1941 mcp->mb[1] = fcport->loop_id << 8 | opt;
1942 mcp->out_mb |= MBX_1;
1944 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1945 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1946 mcp->flags = MBX_DMA_IN;
1947 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1948 rval = qla2x00_mailbox_command(vha, mcp);
1949 if (rval != QLA_SUCCESS)
1952 if (IS_FWI2_CAPABLE(ha)) {
1954 u8 current_login_state, last_login_state;
1956 pd24 = (struct port_database_24xx *) pd;
1958 /* Check for logged in state. */
1959 if (NVME_TARGET(ha, fcport)) {
1960 current_login_state = pd24->current_login_state >> 4;
1961 last_login_state = pd24->last_login_state >> 4;
1963 current_login_state = pd24->current_login_state & 0xf;
1964 last_login_state = pd24->last_login_state & 0xf;
1966 fcport->current_login_state = pd24->current_login_state;
1967 fcport->last_login_state = pd24->last_login_state;
1969 /* Check for logged in state. */
1970 if (current_login_state != PDS_PRLI_COMPLETE &&
1971 last_login_state != PDS_PRLI_COMPLETE) {
1972 ql_dbg(ql_dbg_mbx, vha, 0x119a,
1973 "Unable to verify login-state (%x/%x) for loop_id %x.\n",
1974 current_login_state, last_login_state,
1976 rval = QLA_FUNCTION_FAILED;
1982 if (fcport->loop_id == FC_NO_LOOP_ID ||
1983 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1984 memcmp(fcport->port_name, pd24->port_name, 8))) {
1985 /* We lost the device mid way. */
1986 rval = QLA_NOT_LOGGED_IN;
1990 /* Names are little-endian. */
1991 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1992 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1994 /* Get port_id of device. */
1995 fcport->d_id.b.domain = pd24->port_id[0];
1996 fcport->d_id.b.area = pd24->port_id[1];
1997 fcport->d_id.b.al_pa = pd24->port_id[2];
1998 fcport->d_id.b.rsvd_1 = 0;
2000 /* If not target must be initiator or unknown type. */
2001 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
2002 fcport->port_type = FCT_INITIATOR;
2004 fcport->port_type = FCT_TARGET;
2006 /* Passback COS information. */
2007 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
2008 FC_COS_CLASS2 : FC_COS_CLASS3;
2010 if (pd24->prli_svc_param_word_3[0] & BIT_7)
2011 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
2015 /* Check for logged in state. */
2016 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
2017 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
2018 ql_dbg(ql_dbg_mbx, vha, 0x100a,
2019 "Unable to verify login-state (%x/%x) - "
2020 "portid=%02x%02x%02x.\n", pd->master_state,
2021 pd->slave_state, fcport->d_id.b.domain,
2022 fcport->d_id.b.area, fcport->d_id.b.al_pa);
2023 rval = QLA_FUNCTION_FAILED;
2027 if (fcport->loop_id == FC_NO_LOOP_ID ||
2028 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
2029 memcmp(fcport->port_name, pd->port_name, 8))) {
2030 /* We lost the device mid way. */
2031 rval = QLA_NOT_LOGGED_IN;
2035 /* Names are little-endian. */
2036 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
2037 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
2039 /* Get port_id of device. */
2040 fcport->d_id.b.domain = pd->port_id[0];
2041 fcport->d_id.b.area = pd->port_id[3];
2042 fcport->d_id.b.al_pa = pd->port_id[2];
2043 fcport->d_id.b.rsvd_1 = 0;
2045 /* If not target must be initiator or unknown type. */
2046 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
2047 fcport->port_type = FCT_INITIATOR;
2049 fcport->port_type = FCT_TARGET;
2051 /* Passback COS information. */
2052 fcport->supported_classes = (pd->options & BIT_4) ?
2053 FC_COS_CLASS2 : FC_COS_CLASS3;
2057 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
2060 if (rval != QLA_SUCCESS) {
2061 ql_dbg(ql_dbg_mbx, vha, 0x1052,
2062 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
2063 mcp->mb[0], mcp->mb[1]);
2065 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
2066 "Done %s.\n", __func__);
2073 qla24xx_get_port_database(scsi_qla_host_t *vha, u16 nport_handle,
2074 struct port_database_24xx *pdb)
2077 mbx_cmd_t *mcp = &mc;
2081 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1115,
2082 "Entered %s.\n", __func__);
2084 memset(pdb, 0, sizeof(*pdb));
2086 pdb_dma = dma_map_single(&vha->hw->pdev->dev, pdb,
2087 sizeof(*pdb), DMA_FROM_DEVICE);
2089 ql_log(ql_log_warn, vha, 0x1116, "Failed to map dma buffer.\n");
2090 return QLA_MEMORY_ALLOC_FAILED;
2093 mcp->mb[0] = MBC_GET_PORT_DATABASE;
2094 mcp->mb[1] = nport_handle;
2095 mcp->mb[2] = MSW(LSD(pdb_dma));
2096 mcp->mb[3] = LSW(LSD(pdb_dma));
2097 mcp->mb[6] = MSW(MSD(pdb_dma));
2098 mcp->mb[7] = LSW(MSD(pdb_dma));
2101 mcp->out_mb = MBX_10|MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2102 mcp->in_mb = MBX_1|MBX_0;
2103 mcp->buf_size = sizeof(*pdb);
2104 mcp->flags = MBX_DMA_IN;
2105 mcp->tov = vha->hw->login_timeout * 2;
2106 rval = qla2x00_mailbox_command(vha, mcp);
2108 if (rval != QLA_SUCCESS) {
2109 ql_dbg(ql_dbg_mbx, vha, 0x111a,
2110 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2111 rval, mcp->mb[0], mcp->mb[1]);
2113 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111b,
2114 "Done %s.\n", __func__);
2117 dma_unmap_single(&vha->hw->pdev->dev, pdb_dma,
2118 sizeof(*pdb), DMA_FROM_DEVICE);
2124 * qla2x00_get_firmware_state
2125 * Get adapter firmware state.
2128 * ha = adapter block pointer.
2129 * dptr = pointer for firmware state.
2130 * TARGET_QUEUE_LOCK must be released.
2131 * ADAPTER_STATE_LOCK must be released.
2134 * qla2x00 local function return status code.
2140 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
2144 mbx_cmd_t *mcp = &mc;
2145 struct qla_hw_data *ha = vha->hw;
2147 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
2148 "Entered %s.\n", __func__);
2150 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
2151 mcp->out_mb = MBX_0;
2152 if (IS_FWI2_CAPABLE(vha->hw))
2153 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2155 mcp->in_mb = MBX_1|MBX_0;
2156 mcp->tov = MBX_TOV_SECONDS;
2158 rval = qla2x00_mailbox_command(vha, mcp);
2160 /* Return firmware states. */
2161 states[0] = mcp->mb[1];
2162 if (IS_FWI2_CAPABLE(vha->hw)) {
2163 states[1] = mcp->mb[2];
2164 states[2] = mcp->mb[3]; /* SFP info */
2165 states[3] = mcp->mb[4];
2166 states[4] = mcp->mb[5];
2167 states[5] = mcp->mb[6]; /* DPORT status */
2170 if (rval != QLA_SUCCESS) {
2172 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
2174 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
2175 if (mcp->mb[2] == 6 || mcp->mb[3] == 2)
2176 ql_dbg(ql_dbg_mbx, vha, 0x119e,
2177 "Invalid SFP/Validation Failed\n");
2179 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
2180 "Done %s.\n", __func__);
2187 * qla2x00_get_port_name
2188 * Issue get port name mailbox command.
2189 * Returned name is in big endian format.
2192 * ha = adapter block pointer.
2193 * loop_id = loop ID of device.
2194 * name = pointer for name.
2195 * TARGET_QUEUE_LOCK must be released.
2196 * ADAPTER_STATE_LOCK must be released.
2199 * qla2x00 local function return status code.
2205 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
2210 mbx_cmd_t *mcp = &mc;
2212 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
2213 "Entered %s.\n", __func__);
2215 mcp->mb[0] = MBC_GET_PORT_NAME;
2216 mcp->mb[9] = vha->vp_idx;
2217 mcp->out_mb = MBX_9|MBX_1|MBX_0;
2218 if (HAS_EXTENDED_IDS(vha->hw)) {
2219 mcp->mb[1] = loop_id;
2221 mcp->out_mb |= MBX_10;
2223 mcp->mb[1] = loop_id << 8 | opt;
2226 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2227 mcp->tov = MBX_TOV_SECONDS;
2229 rval = qla2x00_mailbox_command(vha, mcp);
2231 if (rval != QLA_SUCCESS) {
2233 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
2236 /* This function returns name in big endian. */
2237 name[0] = MSB(mcp->mb[2]);
2238 name[1] = LSB(mcp->mb[2]);
2239 name[2] = MSB(mcp->mb[3]);
2240 name[3] = LSB(mcp->mb[3]);
2241 name[4] = MSB(mcp->mb[6]);
2242 name[5] = LSB(mcp->mb[6]);
2243 name[6] = MSB(mcp->mb[7]);
2244 name[7] = LSB(mcp->mb[7]);
2247 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
2248 "Done %s.\n", __func__);
2255 * qla24xx_link_initialization
2256 * Issue link initialization mailbox command.
2259 * ha = adapter block pointer.
2260 * TARGET_QUEUE_LOCK must be released.
2261 * ADAPTER_STATE_LOCK must be released.
2264 * qla2x00 local function return status code.
2270 qla24xx_link_initialize(scsi_qla_host_t *vha)
2274 mbx_cmd_t *mcp = &mc;
2276 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
2277 "Entered %s.\n", __func__);
2279 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
2280 return QLA_FUNCTION_FAILED;
2282 mcp->mb[0] = MBC_LINK_INITIALIZATION;
2284 if (vha->hw->operating_mode == LOOP)
2285 mcp->mb[1] |= BIT_6;
2287 mcp->mb[1] |= BIT_5;
2290 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2292 mcp->tov = MBX_TOV_SECONDS;
2294 rval = qla2x00_mailbox_command(vha, mcp);
2296 if (rval != QLA_SUCCESS) {
2297 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
2299 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
2300 "Done %s.\n", __func__);
2308 * Issue LIP reset mailbox command.
2311 * ha = adapter block pointer.
2312 * TARGET_QUEUE_LOCK must be released.
2313 * ADAPTER_STATE_LOCK must be released.
2316 * qla2x00 local function return status code.
2322 qla2x00_lip_reset(scsi_qla_host_t *vha)
2326 mbx_cmd_t *mcp = &mc;
2328 ql_dbg(ql_dbg_disc, vha, 0x105a,
2329 "Entered %s.\n", __func__);
2331 if (IS_CNA_CAPABLE(vha->hw)) {
2332 /* Logout across all FCFs. */
2333 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2336 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2337 } else if (IS_FWI2_CAPABLE(vha->hw)) {
2338 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2341 mcp->mb[3] = vha->hw->loop_reset_delay;
2342 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2344 mcp->mb[0] = MBC_LIP_RESET;
2345 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2346 if (HAS_EXTENDED_IDS(vha->hw)) {
2347 mcp->mb[1] = 0x00ff;
2349 mcp->out_mb |= MBX_10;
2351 mcp->mb[1] = 0xff00;
2353 mcp->mb[2] = vha->hw->loop_reset_delay;
2357 mcp->tov = MBX_TOV_SECONDS;
2359 rval = qla2x00_mailbox_command(vha, mcp);
2361 if (rval != QLA_SUCCESS) {
2363 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
2366 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
2367 "Done %s.\n", __func__);
2378 * ha = adapter block pointer.
2379 * sns = pointer for command.
2380 * cmd_size = command size.
2381 * buf_size = response/command size.
2382 * TARGET_QUEUE_LOCK must be released.
2383 * ADAPTER_STATE_LOCK must be released.
2386 * qla2x00 local function return status code.
2392 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
2393 uint16_t cmd_size, size_t buf_size)
2397 mbx_cmd_t *mcp = &mc;
2399 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
2400 "Entered %s.\n", __func__);
2402 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
2403 "Retry cnt=%d ratov=%d total tov=%d.\n",
2404 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
2406 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
2407 mcp->mb[1] = cmd_size;
2408 mcp->mb[2] = MSW(sns_phys_address);
2409 mcp->mb[3] = LSW(sns_phys_address);
2410 mcp->mb[6] = MSW(MSD(sns_phys_address));
2411 mcp->mb[7] = LSW(MSD(sns_phys_address));
2412 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2413 mcp->in_mb = MBX_0|MBX_1;
2414 mcp->buf_size = buf_size;
2415 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
2416 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
2417 rval = qla2x00_mailbox_command(vha, mcp);
2419 if (rval != QLA_SUCCESS) {
2421 ql_dbg(ql_dbg_mbx, vha, 0x105f,
2422 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2423 rval, mcp->mb[0], mcp->mb[1]);
2426 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
2427 "Done %s.\n", __func__);
2434 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2435 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2439 struct logio_entry_24xx *lg;
2442 struct qla_hw_data *ha = vha->hw;
2443 struct req_que *req;
2445 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
2446 "Entered %s.\n", __func__);
2448 if (vha->vp_idx && vha->qpair)
2449 req = vha->qpair->req;
2451 req = ha->req_q_map[0];
2453 lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2455 ql_log(ql_log_warn, vha, 0x1062,
2456 "Failed to allocate login IOCB.\n");
2457 return QLA_MEMORY_ALLOC_FAILED;
2460 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2461 lg->entry_count = 1;
2462 lg->handle = make_handle(req->id, lg->handle);
2463 lg->nport_handle = cpu_to_le16(loop_id);
2464 lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
2466 lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
2468 lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
2469 lg->port_id[0] = al_pa;
2470 lg->port_id[1] = area;
2471 lg->port_id[2] = domain;
2472 lg->vp_index = vha->vp_idx;
2473 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2474 (ha->r_a_tov / 10 * 2) + 2);
2475 if (rval != QLA_SUCCESS) {
2476 ql_dbg(ql_dbg_mbx, vha, 0x1063,
2477 "Failed to issue login IOCB (%x).\n", rval);
2478 } else if (lg->entry_status != 0) {
2479 ql_dbg(ql_dbg_mbx, vha, 0x1064,
2480 "Failed to complete IOCB -- error status (%x).\n",
2482 rval = QLA_FUNCTION_FAILED;
2483 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2484 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2485 iop[1] = le32_to_cpu(lg->io_parameter[1]);
2487 ql_dbg(ql_dbg_mbx, vha, 0x1065,
2488 "Failed to complete IOCB -- completion status (%x) "
2489 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2493 case LSC_SCODE_PORTID_USED:
2494 mb[0] = MBS_PORT_ID_USED;
2495 mb[1] = LSW(iop[1]);
2497 case LSC_SCODE_NPORT_USED:
2498 mb[0] = MBS_LOOP_ID_USED;
2500 case LSC_SCODE_NOLINK:
2501 case LSC_SCODE_NOIOCB:
2502 case LSC_SCODE_NOXCB:
2503 case LSC_SCODE_CMD_FAILED:
2504 case LSC_SCODE_NOFABRIC:
2505 case LSC_SCODE_FW_NOT_READY:
2506 case LSC_SCODE_NOT_LOGGED_IN:
2507 case LSC_SCODE_NOPCB:
2508 case LSC_SCODE_ELS_REJECT:
2509 case LSC_SCODE_CMD_PARAM_ERR:
2510 case LSC_SCODE_NONPORT:
2511 case LSC_SCODE_LOGGED_IN:
2512 case LSC_SCODE_NOFLOGI_ACC:
2514 mb[0] = MBS_COMMAND_ERROR;
2518 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
2519 "Done %s.\n", __func__);
2521 iop[0] = le32_to_cpu(lg->io_parameter[0]);
2523 mb[0] = MBS_COMMAND_COMPLETE;
2525 if (iop[0] & BIT_4) {
2531 /* Passback COS information. */
2533 if (lg->io_parameter[7] || lg->io_parameter[8])
2534 mb[10] |= BIT_0; /* Class 2. */
2535 if (lg->io_parameter[9] || lg->io_parameter[10])
2536 mb[10] |= BIT_1; /* Class 3. */
2537 if (lg->io_parameter[0] & cpu_to_le32(BIT_7))
2538 mb[10] |= BIT_7; /* Confirmed Completion
2543 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2549 * qla2x00_login_fabric
2550 * Issue login fabric port mailbox command.
2553 * ha = adapter block pointer.
2554 * loop_id = device loop ID.
2555 * domain = device domain.
2556 * area = device area.
2557 * al_pa = device AL_PA.
2558 * status = pointer for return status.
2559 * opt = command options.
2560 * TARGET_QUEUE_LOCK must be released.
2561 * ADAPTER_STATE_LOCK must be released.
2564 * qla2x00 local function return status code.
2570 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2571 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
2575 mbx_cmd_t *mcp = &mc;
2576 struct qla_hw_data *ha = vha->hw;
2578 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
2579 "Entered %s.\n", __func__);
2581 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
2582 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2583 if (HAS_EXTENDED_IDS(ha)) {
2584 mcp->mb[1] = loop_id;
2586 mcp->out_mb |= MBX_10;
2588 mcp->mb[1] = (loop_id << 8) | opt;
2590 mcp->mb[2] = domain;
2591 mcp->mb[3] = area << 8 | al_pa;
2593 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
2594 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2596 rval = qla2x00_mailbox_command(vha, mcp);
2598 /* Return mailbox statuses. */
2605 /* COS retrieved from Get-Port-Database mailbox command. */
2609 if (rval != QLA_SUCCESS) {
2610 /* RLU tmp code: need to change main mailbox_command function to
2611 * return ok even when the mailbox completion value is not
2612 * SUCCESS. The caller needs to be responsible to interpret
2613 * the return values of this mailbox command if we're not
2614 * to change too much of the existing code.
2616 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2617 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2618 mcp->mb[0] == 0x4006)
2622 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2623 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2624 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2627 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2628 "Done %s.\n", __func__);
2635 * qla2x00_login_local_device
2636 * Issue login loop port mailbox command.
2639 * ha = adapter block pointer.
2640 * loop_id = device loop ID.
2641 * opt = command options.
2644 * Return status code.
2651 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2652 uint16_t *mb_ret, uint8_t opt)
2656 mbx_cmd_t *mcp = &mc;
2657 struct qla_hw_data *ha = vha->hw;
2659 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2660 "Entered %s.\n", __func__);
2662 if (IS_FWI2_CAPABLE(ha))
2663 return qla24xx_login_fabric(vha, fcport->loop_id,
2664 fcport->d_id.b.domain, fcport->d_id.b.area,
2665 fcport->d_id.b.al_pa, mb_ret, opt);
2667 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2668 if (HAS_EXTENDED_IDS(ha))
2669 mcp->mb[1] = fcport->loop_id;
2671 mcp->mb[1] = fcport->loop_id << 8;
2673 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2674 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2675 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2677 rval = qla2x00_mailbox_command(vha, mcp);
2679 /* Return mailbox statuses. */
2680 if (mb_ret != NULL) {
2681 mb_ret[0] = mcp->mb[0];
2682 mb_ret[1] = mcp->mb[1];
2683 mb_ret[6] = mcp->mb[6];
2684 mb_ret[7] = mcp->mb[7];
2687 if (rval != QLA_SUCCESS) {
2688 /* AV tmp code: need to change main mailbox_command function to
2689 * return ok even when the mailbox completion value is not
2690 * SUCCESS. The caller needs to be responsible to interpret
2691 * the return values of this mailbox command if we're not
2692 * to change too much of the existing code.
2694 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2697 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2698 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2699 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2702 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2703 "Done %s.\n", __func__);
2710 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2711 uint8_t area, uint8_t al_pa)
2714 struct logio_entry_24xx *lg;
2716 struct qla_hw_data *ha = vha->hw;
2717 struct req_que *req;
2719 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2720 "Entered %s.\n", __func__);
2722 lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2724 ql_log(ql_log_warn, vha, 0x106e,
2725 "Failed to allocate logout IOCB.\n");
2726 return QLA_MEMORY_ALLOC_FAILED;
2730 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2731 lg->entry_count = 1;
2732 lg->handle = make_handle(req->id, lg->handle);
2733 lg->nport_handle = cpu_to_le16(loop_id);
2735 cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2737 lg->port_id[0] = al_pa;
2738 lg->port_id[1] = area;
2739 lg->port_id[2] = domain;
2740 lg->vp_index = vha->vp_idx;
2741 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2742 (ha->r_a_tov / 10 * 2) + 2);
2743 if (rval != QLA_SUCCESS) {
2744 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2745 "Failed to issue logout IOCB (%x).\n", rval);
2746 } else if (lg->entry_status != 0) {
2747 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2748 "Failed to complete IOCB -- error status (%x).\n",
2750 rval = QLA_FUNCTION_FAILED;
2751 } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2752 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2753 "Failed to complete IOCB -- completion status (%x) "
2754 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2755 le32_to_cpu(lg->io_parameter[0]),
2756 le32_to_cpu(lg->io_parameter[1]));
2759 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2760 "Done %s.\n", __func__);
2763 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2769 * qla2x00_fabric_logout
2770 * Issue logout fabric port mailbox command.
2773 * ha = adapter block pointer.
2774 * loop_id = device loop ID.
2775 * TARGET_QUEUE_LOCK must be released.
2776 * ADAPTER_STATE_LOCK must be released.
2779 * qla2x00 local function return status code.
2785 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2786 uint8_t area, uint8_t al_pa)
2790 mbx_cmd_t *mcp = &mc;
2792 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2793 "Entered %s.\n", __func__);
2795 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2796 mcp->out_mb = MBX_1|MBX_0;
2797 if (HAS_EXTENDED_IDS(vha->hw)) {
2798 mcp->mb[1] = loop_id;
2800 mcp->out_mb |= MBX_10;
2802 mcp->mb[1] = loop_id << 8;
2805 mcp->in_mb = MBX_1|MBX_0;
2806 mcp->tov = MBX_TOV_SECONDS;
2808 rval = qla2x00_mailbox_command(vha, mcp);
2810 if (rval != QLA_SUCCESS) {
2812 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2813 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2816 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2817 "Done %s.\n", __func__);
2824 * qla2x00_full_login_lip
2825 * Issue full login LIP mailbox command.
2828 * ha = adapter block pointer.
2829 * TARGET_QUEUE_LOCK must be released.
2830 * ADAPTER_STATE_LOCK must be released.
2833 * qla2x00 local function return status code.
2839 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2843 mbx_cmd_t *mcp = &mc;
2845 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2846 "Entered %s.\n", __func__);
2848 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2849 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_4 : 0;
2852 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2854 mcp->tov = MBX_TOV_SECONDS;
2856 rval = qla2x00_mailbox_command(vha, mcp);
2858 if (rval != QLA_SUCCESS) {
2860 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2863 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2864 "Done %s.\n", __func__);
2871 * qla2x00_get_id_list
2874 * ha = adapter block pointer.
2877 * qla2x00 local function return status code.
2883 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2888 mbx_cmd_t *mcp = &mc;
2890 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2891 "Entered %s.\n", __func__);
2893 if (id_list == NULL)
2894 return QLA_FUNCTION_FAILED;
2896 mcp->mb[0] = MBC_GET_ID_LIST;
2897 mcp->out_mb = MBX_0;
2898 if (IS_FWI2_CAPABLE(vha->hw)) {
2899 mcp->mb[2] = MSW(id_list_dma);
2900 mcp->mb[3] = LSW(id_list_dma);
2901 mcp->mb[6] = MSW(MSD(id_list_dma));
2902 mcp->mb[7] = LSW(MSD(id_list_dma));
2904 mcp->mb[9] = vha->vp_idx;
2905 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2907 mcp->mb[1] = MSW(id_list_dma);
2908 mcp->mb[2] = LSW(id_list_dma);
2909 mcp->mb[3] = MSW(MSD(id_list_dma));
2910 mcp->mb[6] = LSW(MSD(id_list_dma));
2911 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2913 mcp->in_mb = MBX_1|MBX_0;
2914 mcp->tov = MBX_TOV_SECONDS;
2916 rval = qla2x00_mailbox_command(vha, mcp);
2918 if (rval != QLA_SUCCESS) {
2920 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2922 *entries = mcp->mb[1];
2923 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2924 "Done %s.\n", __func__);
2931 * qla2x00_get_resource_cnts
2932 * Get current firmware resource counts.
2935 * ha = adapter block pointer.
2938 * qla2x00 local function return status code.
2944 qla2x00_get_resource_cnts(scsi_qla_host_t *vha)
2946 struct qla_hw_data *ha = vha->hw;
2949 mbx_cmd_t *mcp = &mc;
2951 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2952 "Entered %s.\n", __func__);
2954 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2955 mcp->out_mb = MBX_0;
2956 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2957 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
2958 IS_QLA27XX(ha) || IS_QLA28XX(ha))
2959 mcp->in_mb |= MBX_12;
2960 mcp->tov = MBX_TOV_SECONDS;
2962 rval = qla2x00_mailbox_command(vha, mcp);
2964 if (rval != QLA_SUCCESS) {
2966 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2967 "Failed mb[0]=%x.\n", mcp->mb[0]);
2969 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2970 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2971 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2972 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2973 mcp->mb[11], mcp->mb[12]);
2975 ha->orig_fw_tgt_xcb_count = mcp->mb[1];
2976 ha->cur_fw_tgt_xcb_count = mcp->mb[2];
2977 ha->cur_fw_xcb_count = mcp->mb[3];
2978 ha->orig_fw_xcb_count = mcp->mb[6];
2979 ha->cur_fw_iocb_count = mcp->mb[7];
2980 ha->orig_fw_iocb_count = mcp->mb[10];
2981 if (ha->flags.npiv_supported)
2982 ha->max_npiv_vports = mcp->mb[11];
2983 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
2985 ha->fw_max_fcf_count = mcp->mb[12];
2992 * qla2x00_get_fcal_position_map
2993 * Get FCAL (LILP) position map using mailbox command
2996 * ha = adapter state pointer.
2997 * pos_map = buffer pointer (can be NULL).
3000 * qla2x00 local function return status code.
3006 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
3010 mbx_cmd_t *mcp = &mc;
3012 dma_addr_t pmap_dma;
3013 struct qla_hw_data *ha = vha->hw;
3015 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
3016 "Entered %s.\n", __func__);
3018 pmap = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
3020 ql_log(ql_log_warn, vha, 0x1080,
3021 "Memory alloc failed.\n");
3022 return QLA_MEMORY_ALLOC_FAILED;
3025 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
3026 mcp->mb[2] = MSW(pmap_dma);
3027 mcp->mb[3] = LSW(pmap_dma);
3028 mcp->mb[6] = MSW(MSD(pmap_dma));
3029 mcp->mb[7] = LSW(MSD(pmap_dma));
3030 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
3031 mcp->in_mb = MBX_1|MBX_0;
3032 mcp->buf_size = FCAL_MAP_SIZE;
3033 mcp->flags = MBX_DMA_IN;
3034 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
3035 rval = qla2x00_mailbox_command(vha, mcp);
3037 if (rval == QLA_SUCCESS) {
3038 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
3039 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
3040 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
3041 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
3045 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
3047 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
3049 if (rval != QLA_SUCCESS) {
3050 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
3052 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
3053 "Done %s.\n", __func__);
3060 * qla2x00_get_link_status
3063 * ha = adapter block pointer.
3064 * loop_id = device loop ID.
3065 * ret_buf = pointer to link status return buffer.
3069 * BIT_0 = mem alloc error.
3070 * BIT_1 = mailbox error.
3073 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
3074 struct link_statistics *stats, dma_addr_t stats_dma)
3078 mbx_cmd_t *mcp = &mc;
3079 uint32_t *iter = (uint32_t *)stats;
3080 ushort dwords = offsetof(typeof(*stats), link_up_cnt)/sizeof(*iter);
3081 struct qla_hw_data *ha = vha->hw;
3083 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
3084 "Entered %s.\n", __func__);
3086 mcp->mb[0] = MBC_GET_LINK_STATUS;
3087 mcp->mb[2] = MSW(LSD(stats_dma));
3088 mcp->mb[3] = LSW(LSD(stats_dma));
3089 mcp->mb[6] = MSW(MSD(stats_dma));
3090 mcp->mb[7] = LSW(MSD(stats_dma));
3091 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
3093 if (IS_FWI2_CAPABLE(ha)) {
3094 mcp->mb[1] = loop_id;
3097 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
3098 mcp->in_mb |= MBX_1;
3099 } else if (HAS_EXTENDED_IDS(ha)) {
3100 mcp->mb[1] = loop_id;
3102 mcp->out_mb |= MBX_10|MBX_1;
3104 mcp->mb[1] = loop_id << 8;
3105 mcp->out_mb |= MBX_1;
3107 mcp->tov = MBX_TOV_SECONDS;
3108 mcp->flags = IOCTL_CMD;
3109 rval = qla2x00_mailbox_command(vha, mcp);
3111 if (rval == QLA_SUCCESS) {
3112 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3113 ql_dbg(ql_dbg_mbx, vha, 0x1085,
3114 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3115 rval = QLA_FUNCTION_FAILED;
3117 /* Re-endianize - firmware data is le32. */
3118 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
3119 "Done %s.\n", __func__);
3120 for ( ; dwords--; iter++)
3125 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
3132 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
3133 dma_addr_t stats_dma, uint16_t options)
3137 mbx_cmd_t *mcp = &mc;
3138 uint32_t *iter = (uint32_t *)stats;
3139 ushort dwords = sizeof(*stats)/sizeof(*iter);
3141 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
3142 "Entered %s.\n", __func__);
3144 memset(&mc, 0, sizeof(mc));
3145 mc.mb[0] = MBC_GET_LINK_PRIV_STATS;
3146 mc.mb[2] = MSW(LSD(stats_dma));
3147 mc.mb[3] = LSW(LSD(stats_dma));
3148 mc.mb[6] = MSW(MSD(stats_dma));
3149 mc.mb[7] = LSW(MSD(stats_dma));
3151 mc.mb[9] = vha->vp_idx;
3152 mc.mb[10] = options;
3154 rval = qla24xx_send_mb_cmd(vha, &mc);
3156 if (rval == QLA_SUCCESS) {
3157 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3158 ql_dbg(ql_dbg_mbx, vha, 0x1089,
3159 "Failed mb[0]=%x.\n", mcp->mb[0]);
3160 rval = QLA_FUNCTION_FAILED;
3162 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
3163 "Done %s.\n", __func__);
3164 /* Re-endianize - firmware data is le32. */
3165 for ( ; dwords--; iter++)
3170 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
3177 qla24xx_abort_command(srb_t *sp)
3180 unsigned long flags = 0;
3182 struct abort_entry_24xx *abt;
3185 fc_port_t *fcport = sp->fcport;
3186 struct scsi_qla_host *vha = fcport->vha;
3187 struct qla_hw_data *ha = vha->hw;
3188 struct req_que *req = vha->req;
3189 struct qla_qpair *qpair = sp->qpair;
3191 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
3192 "Entered %s.\n", __func__);
3195 req = sp->qpair->req;
3197 return QLA_FUNCTION_FAILED;
3199 if (ql2xasynctmfenable)
3200 return qla24xx_async_abort_command(sp);
3202 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
3203 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
3204 if (req->outstanding_cmds[handle] == sp)
3207 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
3208 if (handle == req->num_outstanding_cmds) {
3209 /* Command not found. */
3210 return QLA_FUNCTION_FAILED;
3213 abt = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
3215 ql_log(ql_log_warn, vha, 0x108d,
3216 "Failed to allocate abort IOCB.\n");
3217 return QLA_MEMORY_ALLOC_FAILED;
3220 abt->entry_type = ABORT_IOCB_TYPE;
3221 abt->entry_count = 1;
3222 abt->handle = make_handle(req->id, abt->handle);
3223 abt->nport_handle = cpu_to_le16(fcport->loop_id);
3224 abt->handle_to_abort = make_handle(req->id, handle);
3225 abt->port_id[0] = fcport->d_id.b.al_pa;
3226 abt->port_id[1] = fcport->d_id.b.area;
3227 abt->port_id[2] = fcport->d_id.b.domain;
3228 abt->vp_index = fcport->vha->vp_idx;
3230 abt->req_que_no = cpu_to_le16(req->id);
3232 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
3233 if (rval != QLA_SUCCESS) {
3234 ql_dbg(ql_dbg_mbx, vha, 0x108e,
3235 "Failed to issue IOCB (%x).\n", rval);
3236 } else if (abt->entry_status != 0) {
3237 ql_dbg(ql_dbg_mbx, vha, 0x108f,
3238 "Failed to complete IOCB -- error status (%x).\n",
3240 rval = QLA_FUNCTION_FAILED;
3241 } else if (abt->nport_handle != cpu_to_le16(0)) {
3242 ql_dbg(ql_dbg_mbx, vha, 0x1090,
3243 "Failed to complete IOCB -- completion status (%x).\n",
3244 le16_to_cpu(abt->nport_handle));
3245 if (abt->nport_handle == cpu_to_le16(CS_IOCB_ERROR))
3246 rval = QLA_FUNCTION_PARAMETER_ERROR;
3248 rval = QLA_FUNCTION_FAILED;
3250 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
3251 "Done %s.\n", __func__);
3254 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
3259 struct tsk_mgmt_cmd {
3261 struct tsk_mgmt_entry tsk;
3262 struct sts_entry_24xx sts;
3267 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
3268 uint64_t l, int tag)
3271 struct tsk_mgmt_cmd *tsk;
3272 struct sts_entry_24xx *sts;
3274 scsi_qla_host_t *vha;
3275 struct qla_hw_data *ha;
3276 struct req_que *req;
3277 struct qla_qpair *qpair;
3283 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
3284 "Entered %s.\n", __func__);
3286 if (vha->vp_idx && vha->qpair) {
3292 tsk = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
3294 ql_log(ql_log_warn, vha, 0x1093,
3295 "Failed to allocate task management IOCB.\n");
3296 return QLA_MEMORY_ALLOC_FAILED;
3299 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
3300 tsk->p.tsk.entry_count = 1;
3301 tsk->p.tsk.handle = make_handle(req->id, tsk->p.tsk.handle);
3302 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
3303 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
3304 tsk->p.tsk.control_flags = cpu_to_le32(type);
3305 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
3306 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
3307 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
3308 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
3309 if (type == TCF_LUN_RESET) {
3310 int_to_scsilun(l, &tsk->p.tsk.lun);
3311 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
3312 sizeof(tsk->p.tsk.lun));
3316 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
3317 if (rval != QLA_SUCCESS) {
3318 ql_dbg(ql_dbg_mbx, vha, 0x1094,
3319 "Failed to issue %s reset IOCB (%x).\n", name, rval);
3320 } else if (sts->entry_status != 0) {
3321 ql_dbg(ql_dbg_mbx, vha, 0x1095,
3322 "Failed to complete IOCB -- error status (%x).\n",
3324 rval = QLA_FUNCTION_FAILED;
3325 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
3326 ql_dbg(ql_dbg_mbx, vha, 0x1096,
3327 "Failed to complete IOCB -- completion status (%x).\n",
3328 le16_to_cpu(sts->comp_status));
3329 rval = QLA_FUNCTION_FAILED;
3330 } else if (le16_to_cpu(sts->scsi_status) &
3331 SS_RESPONSE_INFO_LEN_VALID) {
3332 if (le32_to_cpu(sts->rsp_data_len) < 4) {
3333 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
3334 "Ignoring inconsistent data length -- not enough "
3335 "response info (%d).\n",
3336 le32_to_cpu(sts->rsp_data_len));
3337 } else if (sts->data[3]) {
3338 ql_dbg(ql_dbg_mbx, vha, 0x1098,
3339 "Failed to complete IOCB -- response (%x).\n",
3341 rval = QLA_FUNCTION_FAILED;
3345 /* Issue marker IOCB. */
3346 rval2 = qla2x00_marker(vha, ha->base_qpair, fcport->loop_id, l,
3347 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
3348 if (rval2 != QLA_SUCCESS) {
3349 ql_dbg(ql_dbg_mbx, vha, 0x1099,
3350 "Failed to issue marker IOCB (%x).\n", rval2);
3352 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
3353 "Done %s.\n", __func__);
3356 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
3362 qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
3364 struct qla_hw_data *ha = fcport->vha->hw;
3366 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3367 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
3369 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
3373 qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
3375 struct qla_hw_data *ha = fcport->vha->hw;
3377 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
3378 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
3380 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
3384 qla2x00_system_error(scsi_qla_host_t *vha)
3388 mbx_cmd_t *mcp = &mc;
3389 struct qla_hw_data *ha = vha->hw;
3391 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
3392 return QLA_FUNCTION_FAILED;
3394 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
3395 "Entered %s.\n", __func__);
3397 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
3398 mcp->out_mb = MBX_0;
3402 rval = qla2x00_mailbox_command(vha, mcp);
3404 if (rval != QLA_SUCCESS) {
3405 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
3407 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
3408 "Done %s.\n", __func__);
3415 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
3419 mbx_cmd_t *mcp = &mc;
3421 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3422 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
3423 return QLA_FUNCTION_FAILED;
3425 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
3426 "Entered %s.\n", __func__);
3428 mcp->mb[0] = MBC_WRITE_SERDES;
3430 if (IS_QLA2031(vha->hw))
3431 mcp->mb[2] = data & 0xff;
3436 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
3438 mcp->tov = MBX_TOV_SECONDS;
3440 rval = qla2x00_mailbox_command(vha, mcp);
3442 if (rval != QLA_SUCCESS) {
3443 ql_dbg(ql_dbg_mbx, vha, 0x1183,
3444 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3446 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
3447 "Done %s.\n", __func__);
3454 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
3458 mbx_cmd_t *mcp = &mc;
3460 if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3461 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
3462 return QLA_FUNCTION_FAILED;
3464 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
3465 "Entered %s.\n", __func__);
3467 mcp->mb[0] = MBC_READ_SERDES;
3470 mcp->out_mb = MBX_3|MBX_1|MBX_0;
3471 mcp->in_mb = MBX_1|MBX_0;
3472 mcp->tov = MBX_TOV_SECONDS;
3474 rval = qla2x00_mailbox_command(vha, mcp);
3476 if (IS_QLA2031(vha->hw))
3477 *data = mcp->mb[1] & 0xff;
3481 if (rval != QLA_SUCCESS) {
3482 ql_dbg(ql_dbg_mbx, vha, 0x1186,
3483 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3485 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
3486 "Done %s.\n", __func__);
3493 qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
3497 mbx_cmd_t *mcp = &mc;
3499 if (!IS_QLA8044(vha->hw))
3500 return QLA_FUNCTION_FAILED;
3502 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x11a0,
3503 "Entered %s.\n", __func__);
3505 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3506 mcp->mb[1] = HCS_WRITE_SERDES;
3507 mcp->mb[3] = LSW(addr);
3508 mcp->mb[4] = MSW(addr);
3509 mcp->mb[5] = LSW(data);
3510 mcp->mb[6] = MSW(data);
3511 mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
3513 mcp->tov = MBX_TOV_SECONDS;
3515 rval = qla2x00_mailbox_command(vha, mcp);
3517 if (rval != QLA_SUCCESS) {
3518 ql_dbg(ql_dbg_mbx, vha, 0x11a1,
3519 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3521 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
3522 "Done %s.\n", __func__);
3529 qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
3533 mbx_cmd_t *mcp = &mc;
3535 if (!IS_QLA8044(vha->hw))
3536 return QLA_FUNCTION_FAILED;
3538 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
3539 "Entered %s.\n", __func__);
3541 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
3542 mcp->mb[1] = HCS_READ_SERDES;
3543 mcp->mb[3] = LSW(addr);
3544 mcp->mb[4] = MSW(addr);
3545 mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
3546 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3547 mcp->tov = MBX_TOV_SECONDS;
3549 rval = qla2x00_mailbox_command(vha, mcp);
3551 *data = mcp->mb[2] << 16 | mcp->mb[1];
3553 if (rval != QLA_SUCCESS) {
3554 ql_dbg(ql_dbg_mbx, vha, 0x118a,
3555 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3557 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
3558 "Done %s.\n", __func__);
3565 * qla2x00_set_serdes_params() -
3567 * @sw_em_1g: serial link options
3568 * @sw_em_2g: serial link options
3569 * @sw_em_4g: serial link options
3574 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3575 uint16_t sw_em_2g, uint16_t sw_em_4g)
3579 mbx_cmd_t *mcp = &mc;
3581 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
3582 "Entered %s.\n", __func__);
3584 mcp->mb[0] = MBC_SERDES_PARAMS;
3586 mcp->mb[2] = sw_em_1g | BIT_15;
3587 mcp->mb[3] = sw_em_2g | BIT_15;
3588 mcp->mb[4] = sw_em_4g | BIT_15;
3589 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3591 mcp->tov = MBX_TOV_SECONDS;
3593 rval = qla2x00_mailbox_command(vha, mcp);
3595 if (rval != QLA_SUCCESS) {
3597 ql_dbg(ql_dbg_mbx, vha, 0x109f,
3598 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3601 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
3602 "Done %s.\n", __func__);
3609 qla2x00_stop_firmware(scsi_qla_host_t *vha)
3613 mbx_cmd_t *mcp = &mc;
3615 if (!IS_FWI2_CAPABLE(vha->hw))
3616 return QLA_FUNCTION_FAILED;
3618 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
3619 "Entered %s.\n", __func__);
3621 mcp->mb[0] = MBC_STOP_FIRMWARE;
3623 mcp->out_mb = MBX_1|MBX_0;
3627 rval = qla2x00_mailbox_command(vha, mcp);
3629 if (rval != QLA_SUCCESS) {
3630 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3631 if (mcp->mb[0] == MBS_INVALID_COMMAND)
3632 rval = QLA_INVALID_COMMAND;
3634 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
3635 "Done %s.\n", __func__);
3642 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3647 mbx_cmd_t *mcp = &mc;
3649 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
3650 "Entered %s.\n", __func__);
3652 if (!IS_FWI2_CAPABLE(vha->hw))
3653 return QLA_FUNCTION_FAILED;
3655 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3656 return QLA_FUNCTION_FAILED;
3658 mcp->mb[0] = MBC_TRACE_CONTROL;
3659 mcp->mb[1] = TC_EFT_ENABLE;
3660 mcp->mb[2] = LSW(eft_dma);
3661 mcp->mb[3] = MSW(eft_dma);
3662 mcp->mb[4] = LSW(MSD(eft_dma));
3663 mcp->mb[5] = MSW(MSD(eft_dma));
3664 mcp->mb[6] = buffers;
3665 mcp->mb[7] = TC_AEN_DISABLE;
3666 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3667 mcp->in_mb = MBX_1|MBX_0;
3668 mcp->tov = MBX_TOV_SECONDS;
3670 rval = qla2x00_mailbox_command(vha, mcp);
3671 if (rval != QLA_SUCCESS) {
3672 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
3673 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3674 rval, mcp->mb[0], mcp->mb[1]);
3676 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
3677 "Done %s.\n", __func__);
3684 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3688 mbx_cmd_t *mcp = &mc;
3690 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
3691 "Entered %s.\n", __func__);
3693 if (!IS_FWI2_CAPABLE(vha->hw))
3694 return QLA_FUNCTION_FAILED;
3696 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3697 return QLA_FUNCTION_FAILED;
3699 mcp->mb[0] = MBC_TRACE_CONTROL;
3700 mcp->mb[1] = TC_EFT_DISABLE;
3701 mcp->out_mb = MBX_1|MBX_0;
3702 mcp->in_mb = MBX_1|MBX_0;
3703 mcp->tov = MBX_TOV_SECONDS;
3705 rval = qla2x00_mailbox_command(vha, mcp);
3706 if (rval != QLA_SUCCESS) {
3707 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3708 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3709 rval, mcp->mb[0], mcp->mb[1]);
3711 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3712 "Done %s.\n", __func__);
3719 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3720 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3724 mbx_cmd_t *mcp = &mc;
3726 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3727 "Entered %s.\n", __func__);
3729 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3730 !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw) &&
3731 !IS_QLA28XX(vha->hw))
3732 return QLA_FUNCTION_FAILED;
3734 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3735 return QLA_FUNCTION_FAILED;
3737 mcp->mb[0] = MBC_TRACE_CONTROL;
3738 mcp->mb[1] = TC_FCE_ENABLE;
3739 mcp->mb[2] = LSW(fce_dma);
3740 mcp->mb[3] = MSW(fce_dma);
3741 mcp->mb[4] = LSW(MSD(fce_dma));
3742 mcp->mb[5] = MSW(MSD(fce_dma));
3743 mcp->mb[6] = buffers;
3744 mcp->mb[7] = TC_AEN_DISABLE;
3746 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3747 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3748 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3750 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3751 mcp->tov = MBX_TOV_SECONDS;
3753 rval = qla2x00_mailbox_command(vha, mcp);
3754 if (rval != QLA_SUCCESS) {
3755 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3756 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3757 rval, mcp->mb[0], mcp->mb[1]);
3759 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3760 "Done %s.\n", __func__);
3763 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3772 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3776 mbx_cmd_t *mcp = &mc;
3778 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3779 "Entered %s.\n", __func__);
3781 if (!IS_FWI2_CAPABLE(vha->hw))
3782 return QLA_FUNCTION_FAILED;
3784 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3785 return QLA_FUNCTION_FAILED;
3787 mcp->mb[0] = MBC_TRACE_CONTROL;
3788 mcp->mb[1] = TC_FCE_DISABLE;
3789 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3790 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3791 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3793 mcp->tov = MBX_TOV_SECONDS;
3795 rval = qla2x00_mailbox_command(vha, mcp);
3796 if (rval != QLA_SUCCESS) {
3797 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3798 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3799 rval, mcp->mb[0], mcp->mb[1]);
3801 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3802 "Done %s.\n", __func__);
3805 *wr = (uint64_t) mcp->mb[5] << 48 |
3806 (uint64_t) mcp->mb[4] << 32 |
3807 (uint64_t) mcp->mb[3] << 16 |
3808 (uint64_t) mcp->mb[2];
3810 *rd = (uint64_t) mcp->mb[9] << 48 |
3811 (uint64_t) mcp->mb[8] << 32 |
3812 (uint64_t) mcp->mb[7] << 16 |
3813 (uint64_t) mcp->mb[6];
3820 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3821 uint16_t *port_speed, uint16_t *mb)
3825 mbx_cmd_t *mcp = &mc;
3827 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3828 "Entered %s.\n", __func__);
3830 if (!IS_IIDMA_CAPABLE(vha->hw))
3831 return QLA_FUNCTION_FAILED;
3833 mcp->mb[0] = MBC_PORT_PARAMS;
3834 mcp->mb[1] = loop_id;
3835 mcp->mb[2] = mcp->mb[3] = 0;
3836 mcp->mb[9] = vha->vp_idx;
3837 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3838 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3839 mcp->tov = MBX_TOV_SECONDS;
3841 rval = qla2x00_mailbox_command(vha, mcp);
3843 /* Return mailbox statuses. */
3850 if (rval != QLA_SUCCESS) {
3851 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3853 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3854 "Done %s.\n", __func__);
3856 *port_speed = mcp->mb[3];
3863 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3864 uint16_t port_speed, uint16_t *mb)
3868 mbx_cmd_t *mcp = &mc;
3870 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3871 "Entered %s.\n", __func__);
3873 if (!IS_IIDMA_CAPABLE(vha->hw))
3874 return QLA_FUNCTION_FAILED;
3876 mcp->mb[0] = MBC_PORT_PARAMS;
3877 mcp->mb[1] = loop_id;
3879 mcp->mb[3] = port_speed & 0x3F;
3880 mcp->mb[9] = vha->vp_idx;
3881 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3882 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3883 mcp->tov = MBX_TOV_SECONDS;
3885 rval = qla2x00_mailbox_command(vha, mcp);
3887 /* Return mailbox statuses. */
3894 if (rval != QLA_SUCCESS) {
3895 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3896 "Failed=%x.\n", rval);
3898 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3899 "Done %s.\n", __func__);
3906 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3907 struct vp_rpt_id_entry_24xx *rptid_entry)
3909 struct qla_hw_data *ha = vha->hw;
3910 scsi_qla_host_t *vp = NULL;
3911 unsigned long flags;
3914 struct fc_port *fcport;
3916 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3917 "Entered %s.\n", __func__);
3919 if (rptid_entry->entry_status != 0)
3922 id.b.domain = rptid_entry->port_id[2];
3923 id.b.area = rptid_entry->port_id[1];
3924 id.b.al_pa = rptid_entry->port_id[0];
3926 ha->flags.n2n_ae = 0;
3928 if (rptid_entry->format == 0) {
3930 ql_dbg(ql_dbg_async, vha, 0x10b7,
3931 "Format 0 : Number of VPs setup %d, number of "
3932 "VPs acquired %d.\n", rptid_entry->vp_setup,
3933 rptid_entry->vp_acquired);
3934 ql_dbg(ql_dbg_async, vha, 0x10b8,
3935 "Primary port id %02x%02x%02x.\n",
3936 rptid_entry->port_id[2], rptid_entry->port_id[1],
3937 rptid_entry->port_id[0]);
3938 ha->current_topology = ISP_CFG_NL;
3939 qlt_update_host_map(vha, id);
3941 } else if (rptid_entry->format == 1) {
3943 ql_dbg(ql_dbg_async, vha, 0x10b9,
3944 "Format 1: VP[%d] enabled - status %d - with "
3945 "port id %02x%02x%02x.\n", rptid_entry->vp_idx,
3946 rptid_entry->vp_status,
3947 rptid_entry->port_id[2], rptid_entry->port_id[1],
3948 rptid_entry->port_id[0]);
3949 ql_dbg(ql_dbg_async, vha, 0x5075,
3950 "Format 1: Remote WWPN %8phC.\n",
3951 rptid_entry->u.f1.port_name);
3953 ql_dbg(ql_dbg_async, vha, 0x5075,
3954 "Format 1: WWPN %8phC.\n",
3957 switch (rptid_entry->u.f1.flags & TOPO_MASK) {
3959 ha->current_topology = ISP_CFG_N;
3960 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
3961 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3962 fcport->scan_state = QLA_FCPORT_SCAN;
3963 fcport->n2n_flag = 0;
3966 if (wwn_to_u64(vha->port_name) >
3967 wwn_to_u64(rptid_entry->u.f1.port_name)) {
3969 vha->d_id.b.al_pa = 1;
3970 ha->flags.n2n_bigger = 1;
3973 ql_dbg(ql_dbg_async, vha, 0x5075,
3974 "Format 1: assign local id %x remote id %x\n",
3975 vha->d_id.b24, id.b24);
3977 ql_dbg(ql_dbg_async, vha, 0x5075,
3978 "Format 1: Remote login - Waiting for WWPN %8phC.\n",
3979 rptid_entry->u.f1.port_name);
3980 ha->flags.n2n_bigger = 0;
3983 fcport = qla2x00_find_fcport_by_wwpn(vha,
3984 rptid_entry->u.f1.port_name, 1);
3985 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
3989 fcport->plogi_nack_done_deadline = jiffies + HZ;
3990 fcport->dm_login_expire = jiffies + 2*HZ;
3991 fcport->scan_state = QLA_FCPORT_FOUND;
3992 fcport->n2n_flag = 1;
3993 fcport->keep_nport_handle = 1;
3994 fcport->fc4_type = FS_FC4TYPE_FCP;
3995 if (vha->flags.nvme_enabled)
3996 fcport->fc4_type |= FS_FC4TYPE_NVME;
3998 if (wwn_to_u64(vha->port_name) >
3999 wwn_to_u64(fcport->port_name)) {
4003 switch (fcport->disc_state) {
4005 set_bit(RELOGIN_NEEDED,
4008 case DSC_DELETE_PEND:
4011 qlt_schedule_sess_for_deletion(fcport);
4015 qla24xx_post_newsess_work(vha, &id,
4016 rptid_entry->u.f1.port_name,
4017 rptid_entry->u.f1.node_name,
4022 /* if our portname is higher then initiate N2N login */
4024 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags);
4028 ha->current_topology = ISP_CFG_FL;
4031 ha->current_topology = ISP_CFG_F;
4037 ha->flags.gpsc_supported = 1;
4038 ha->current_topology = ISP_CFG_F;
4039 /* buffer to buffer credit flag */
4040 vha->flags.bbcr_enable = (rptid_entry->u.f1.bbcr & 0xf) != 0;
4042 if (rptid_entry->vp_idx == 0) {
4043 if (rptid_entry->vp_status == VP_STAT_COMPL) {
4044 /* FA-WWN is only for physical port */
4045 if (qla_ini_mode_enabled(vha) &&
4046 ha->flags.fawwpn_enabled &&
4047 (rptid_entry->u.f1.flags &
4049 memcpy(vha->port_name,
4050 rptid_entry->u.f1.port_name,
4054 qlt_update_host_map(vha, id);
4057 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
4058 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
4060 if (rptid_entry->vp_status != VP_STAT_COMPL &&
4061 rptid_entry->vp_status != VP_STAT_ID_CHG) {
4062 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
4063 "Could not acquire ID for VP[%d].\n",
4064 rptid_entry->vp_idx);
4069 spin_lock_irqsave(&ha->vport_slock, flags);
4070 list_for_each_entry(vp, &ha->vp_list, list) {
4071 if (rptid_entry->vp_idx == vp->vp_idx) {
4076 spin_unlock_irqrestore(&ha->vport_slock, flags);
4081 qlt_update_host_map(vp, id);
4084 * Cannot configure here as we are still sitting on the
4085 * response queue. Handle it in dpc context.
4087 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
4088 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
4089 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
4091 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
4092 qla2xxx_wake_dpc(vha);
4093 } else if (rptid_entry->format == 2) {
4094 ql_dbg(ql_dbg_async, vha, 0x505f,
4095 "RIDA: format 2/N2N Primary port id %02x%02x%02x.\n",
4096 rptid_entry->port_id[2], rptid_entry->port_id[1],
4097 rptid_entry->port_id[0]);
4099 ql_dbg(ql_dbg_async, vha, 0x5075,
4100 "N2N: Remote WWPN %8phC.\n",
4101 rptid_entry->u.f2.port_name);
4103 /* N2N. direct connect */
4104 ha->current_topology = ISP_CFG_N;
4105 ha->flags.rida_fmt2 = 1;
4106 vha->d_id.b.domain = rptid_entry->port_id[2];
4107 vha->d_id.b.area = rptid_entry->port_id[1];
4108 vha->d_id.b.al_pa = rptid_entry->port_id[0];
4110 ha->flags.n2n_ae = 1;
4111 spin_lock_irqsave(&ha->vport_slock, flags);
4112 qlt_update_vp_map(vha, SET_AL_PA);
4113 spin_unlock_irqrestore(&ha->vport_slock, flags);
4115 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4116 fcport->scan_state = QLA_FCPORT_SCAN;
4117 fcport->n2n_flag = 0;
4120 fcport = qla2x00_find_fcport_by_wwpn(vha,
4121 rptid_entry->u.f2.port_name, 1);
4124 fcport->login_retry = vha->hw->login_retry_count;
4125 fcport->plogi_nack_done_deadline = jiffies + HZ;
4126 fcport->scan_state = QLA_FCPORT_FOUND;
4127 fcport->keep_nport_handle = 1;
4128 fcport->n2n_flag = 1;
4129 fcport->d_id.b.domain =
4130 rptid_entry->u.f2.remote_nport_id[2];
4131 fcport->d_id.b.area =
4132 rptid_entry->u.f2.remote_nport_id[1];
4133 fcport->d_id.b.al_pa =
4134 rptid_entry->u.f2.remote_nport_id[0];
4140 * qla24xx_modify_vp_config
4141 * Change VP configuration for vha
4144 * vha = adapter block pointer.
4147 * qla2xxx local function return status code.
4153 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
4156 struct vp_config_entry_24xx *vpmod;
4157 dma_addr_t vpmod_dma;
4158 struct qla_hw_data *ha = vha->hw;
4159 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4161 /* This can be called by the parent */
4163 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
4164 "Entered %s.\n", __func__);
4166 vpmod = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
4168 ql_log(ql_log_warn, vha, 0x10bc,
4169 "Failed to allocate modify VP IOCB.\n");
4170 return QLA_MEMORY_ALLOC_FAILED;
4173 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
4174 vpmod->entry_count = 1;
4175 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
4176 vpmod->vp_count = 1;
4177 vpmod->vp_index1 = vha->vp_idx;
4178 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
4180 qlt_modify_vp_config(vha, vpmod);
4182 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
4183 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
4184 vpmod->entry_count = 1;
4186 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
4187 if (rval != QLA_SUCCESS) {
4188 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
4189 "Failed to issue VP config IOCB (%x).\n", rval);
4190 } else if (vpmod->comp_status != 0) {
4191 ql_dbg(ql_dbg_mbx, vha, 0x10be,
4192 "Failed to complete IOCB -- error status (%x).\n",
4193 vpmod->comp_status);
4194 rval = QLA_FUNCTION_FAILED;
4195 } else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) {
4196 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
4197 "Failed to complete IOCB -- completion status (%x).\n",
4198 le16_to_cpu(vpmod->comp_status));
4199 rval = QLA_FUNCTION_FAILED;
4202 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
4203 "Done %s.\n", __func__);
4204 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
4206 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
4212 * qla2x00_send_change_request
4213 * Receive or disable RSCN request from fabric controller
4216 * ha = adapter block pointer
4217 * format = registration format:
4219 * 1 - Fabric detected registration
4220 * 2 - N_port detected registration
4221 * 3 - Full registration
4222 * FF - clear registration
4223 * vp_idx = Virtual port index
4226 * qla2x00 local function return status code.
4233 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
4238 mbx_cmd_t *mcp = &mc;
4240 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
4241 "Entered %s.\n", __func__);
4243 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
4244 mcp->mb[1] = format;
4245 mcp->mb[9] = vp_idx;
4246 mcp->out_mb = MBX_9|MBX_1|MBX_0;
4247 mcp->in_mb = MBX_0|MBX_1;
4248 mcp->tov = MBX_TOV_SECONDS;
4250 rval = qla2x00_mailbox_command(vha, mcp);
4252 if (rval == QLA_SUCCESS) {
4253 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
4263 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
4268 mbx_cmd_t *mcp = &mc;
4270 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
4271 "Entered %s.\n", __func__);
4273 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
4274 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
4275 mcp->mb[8] = MSW(addr);
4276 mcp->out_mb = MBX_8|MBX_0;
4278 mcp->mb[0] = MBC_DUMP_RISC_RAM;
4279 mcp->out_mb = MBX_0;
4281 mcp->mb[1] = LSW(addr);
4282 mcp->mb[2] = MSW(req_dma);
4283 mcp->mb[3] = LSW(req_dma);
4284 mcp->mb[6] = MSW(MSD(req_dma));
4285 mcp->mb[7] = LSW(MSD(req_dma));
4286 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
4287 if (IS_FWI2_CAPABLE(vha->hw)) {
4288 mcp->mb[4] = MSW(size);
4289 mcp->mb[5] = LSW(size);
4290 mcp->out_mb |= MBX_5|MBX_4;
4292 mcp->mb[4] = LSW(size);
4293 mcp->out_mb |= MBX_4;
4297 mcp->tov = MBX_TOV_SECONDS;
4299 rval = qla2x00_mailbox_command(vha, mcp);
4301 if (rval != QLA_SUCCESS) {
4302 ql_dbg(ql_dbg_mbx, vha, 0x1008,
4303 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4305 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
4306 "Done %s.\n", __func__);
4311 /* 84XX Support **************************************************************/
4313 struct cs84xx_mgmt_cmd {
4315 struct verify_chip_entry_84xx req;
4316 struct verify_chip_rsp_84xx rsp;
4321 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
4324 struct cs84xx_mgmt_cmd *mn;
4327 unsigned long flags;
4328 struct qla_hw_data *ha = vha->hw;
4330 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
4331 "Entered %s.\n", __func__);
4333 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
4335 return QLA_MEMORY_ALLOC_FAILED;
4339 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
4340 /* Diagnostic firmware? */
4341 /* options |= MENLO_DIAG_FW; */
4342 /* We update the firmware with only one data sequence. */
4343 options |= VCO_END_OF_DATA;
4347 memset(mn, 0, sizeof(*mn));
4348 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
4349 mn->p.req.entry_count = 1;
4350 mn->p.req.options = cpu_to_le16(options);
4352 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
4353 "Dump of Verify Request.\n");
4354 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
4357 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
4358 if (rval != QLA_SUCCESS) {
4359 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
4360 "Failed to issue verify IOCB (%x).\n", rval);
4364 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
4365 "Dump of Verify Response.\n");
4366 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
4369 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
4370 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
4371 le16_to_cpu(mn->p.rsp.failure_code) : 0;
4372 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
4373 "cs=%x fc=%x.\n", status[0], status[1]);
4375 if (status[0] != CS_COMPLETE) {
4376 rval = QLA_FUNCTION_FAILED;
4377 if (!(options & VCO_DONT_UPDATE_FW)) {
4378 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
4379 "Firmware update failed. Retrying "
4380 "without update firmware.\n");
4381 options |= VCO_DONT_UPDATE_FW;
4382 options &= ~VCO_FORCE_UPDATE;
4386 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
4387 "Firmware updated to %x.\n",
4388 le32_to_cpu(mn->p.rsp.fw_ver));
4390 /* NOTE: we only update OP firmware. */
4391 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
4392 ha->cs84xx->op_fw_version =
4393 le32_to_cpu(mn->p.rsp.fw_ver);
4394 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
4400 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
4402 if (rval != QLA_SUCCESS) {
4403 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
4404 "Failed=%x.\n", rval);
4406 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
4407 "Done %s.\n", __func__);
4414 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
4417 unsigned long flags;
4419 mbx_cmd_t *mcp = &mc;
4420 struct qla_hw_data *ha = vha->hw;
4422 if (!ha->flags.fw_started)
4425 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
4426 "Entered %s.\n", __func__);
4428 if (IS_SHADOW_REG_CAPABLE(ha))
4429 req->options |= BIT_13;
4431 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4432 mcp->mb[1] = req->options;
4433 mcp->mb[2] = MSW(LSD(req->dma));
4434 mcp->mb[3] = LSW(LSD(req->dma));
4435 mcp->mb[6] = MSW(MSD(req->dma));
4436 mcp->mb[7] = LSW(MSD(req->dma));
4437 mcp->mb[5] = req->length;
4439 mcp->mb[10] = req->rsp->id;
4440 mcp->mb[12] = req->qos;
4441 mcp->mb[11] = req->vp_idx;
4442 mcp->mb[13] = req->rid;
4443 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
4446 mcp->mb[4] = req->id;
4447 /* que in ptr index */
4449 /* que out ptr index */
4450 mcp->mb[9] = *req->out_ptr = 0;
4451 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
4452 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4454 mcp->flags = MBX_DMA_OUT;
4455 mcp->tov = MBX_TOV_SECONDS * 2;
4457 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4459 mcp->in_mb |= MBX_1;
4460 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4461 mcp->out_mb |= MBX_15;
4462 /* debug q create issue in SR-IOV */
4463 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4466 spin_lock_irqsave(&ha->hardware_lock, flags);
4467 if (!(req->options & BIT_0)) {
4468 wrt_reg_dword(req->req_q_in, 0);
4469 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4470 wrt_reg_dword(req->req_q_out, 0);
4472 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4474 rval = qla2x00_mailbox_command(vha, mcp);
4475 if (rval != QLA_SUCCESS) {
4476 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
4477 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4479 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
4480 "Done %s.\n", __func__);
4487 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
4490 unsigned long flags;
4492 mbx_cmd_t *mcp = &mc;
4493 struct qla_hw_data *ha = vha->hw;
4495 if (!ha->flags.fw_started)
4498 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
4499 "Entered %s.\n", __func__);
4501 if (IS_SHADOW_REG_CAPABLE(ha))
4502 rsp->options |= BIT_13;
4504 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4505 mcp->mb[1] = rsp->options;
4506 mcp->mb[2] = MSW(LSD(rsp->dma));
4507 mcp->mb[3] = LSW(LSD(rsp->dma));
4508 mcp->mb[6] = MSW(MSD(rsp->dma));
4509 mcp->mb[7] = LSW(MSD(rsp->dma));
4510 mcp->mb[5] = rsp->length;
4511 mcp->mb[14] = rsp->msix->entry;
4512 mcp->mb[13] = rsp->rid;
4513 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
4516 mcp->mb[4] = rsp->id;
4517 /* que in ptr index */
4518 mcp->mb[8] = *rsp->in_ptr = 0;
4519 /* que out ptr index */
4521 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
4522 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4524 mcp->flags = MBX_DMA_OUT;
4525 mcp->tov = MBX_TOV_SECONDS * 2;
4527 if (IS_QLA81XX(ha)) {
4528 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
4529 mcp->in_mb |= MBX_1;
4530 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4531 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
4532 mcp->in_mb |= MBX_1;
4533 /* debug q create issue in SR-IOV */
4534 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
4537 spin_lock_irqsave(&ha->hardware_lock, flags);
4538 if (!(rsp->options & BIT_0)) {
4539 wrt_reg_dword(rsp->rsp_q_out, 0);
4540 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4541 wrt_reg_dword(rsp->rsp_q_in, 0);
4544 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4546 rval = qla2x00_mailbox_command(vha, mcp);
4547 if (rval != QLA_SUCCESS) {
4548 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
4549 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4551 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
4552 "Done %s.\n", __func__);
4559 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
4563 mbx_cmd_t *mcp = &mc;
4565 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
4566 "Entered %s.\n", __func__);
4568 mcp->mb[0] = MBC_IDC_ACK;
4569 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4570 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4572 mcp->tov = MBX_TOV_SECONDS;
4574 rval = qla2x00_mailbox_command(vha, mcp);
4576 if (rval != QLA_SUCCESS) {
4577 ql_dbg(ql_dbg_mbx, vha, 0x10da,
4578 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4580 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
4581 "Done %s.\n", __func__);
4588 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
4592 mbx_cmd_t *mcp = &mc;
4594 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
4595 "Entered %s.\n", __func__);
4597 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4598 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
4599 return QLA_FUNCTION_FAILED;
4601 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4602 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
4603 mcp->out_mb = MBX_1|MBX_0;
4604 mcp->in_mb = MBX_1|MBX_0;
4605 mcp->tov = MBX_TOV_SECONDS;
4607 rval = qla2x00_mailbox_command(vha, mcp);
4609 if (rval != QLA_SUCCESS) {
4610 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
4611 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4612 rval, mcp->mb[0], mcp->mb[1]);
4614 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
4615 "Done %s.\n", __func__);
4616 *sector_size = mcp->mb[1];
4623 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
4627 mbx_cmd_t *mcp = &mc;
4629 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4630 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
4631 return QLA_FUNCTION_FAILED;
4633 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
4634 "Entered %s.\n", __func__);
4636 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4637 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
4638 FAC_OPT_CMD_WRITE_PROTECT;
4639 mcp->out_mb = MBX_1|MBX_0;
4640 mcp->in_mb = MBX_1|MBX_0;
4641 mcp->tov = MBX_TOV_SECONDS;
4643 rval = qla2x00_mailbox_command(vha, mcp);
4645 if (rval != QLA_SUCCESS) {
4646 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
4647 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4648 rval, mcp->mb[0], mcp->mb[1]);
4650 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
4651 "Done %s.\n", __func__);
4658 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
4662 mbx_cmd_t *mcp = &mc;
4664 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4665 !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
4666 return QLA_FUNCTION_FAILED;
4668 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4669 "Entered %s.\n", __func__);
4671 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4672 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
4673 mcp->mb[2] = LSW(start);
4674 mcp->mb[3] = MSW(start);
4675 mcp->mb[4] = LSW(finish);
4676 mcp->mb[5] = MSW(finish);
4677 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4678 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4679 mcp->tov = MBX_TOV_SECONDS;
4681 rval = qla2x00_mailbox_command(vha, mcp);
4683 if (rval != QLA_SUCCESS) {
4684 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4685 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4686 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4688 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4689 "Done %s.\n", __func__);
4696 qla81xx_fac_semaphore_access(scsi_qla_host_t *vha, int lock)
4698 int rval = QLA_SUCCESS;
4700 mbx_cmd_t *mcp = &mc;
4701 struct qla_hw_data *ha = vha->hw;
4703 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
4704 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4707 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4708 "Entered %s.\n", __func__);
4710 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4711 mcp->mb[1] = (lock ? FAC_OPT_CMD_LOCK_SEMAPHORE :
4712 FAC_OPT_CMD_UNLOCK_SEMAPHORE);
4713 mcp->out_mb = MBX_1|MBX_0;
4714 mcp->in_mb = MBX_1|MBX_0;
4715 mcp->tov = MBX_TOV_SECONDS;
4717 rval = qla2x00_mailbox_command(vha, mcp);
4719 if (rval != QLA_SUCCESS) {
4720 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4721 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4722 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4724 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4725 "Done %s.\n", __func__);
4732 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
4736 mbx_cmd_t *mcp = &mc;
4738 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
4739 "Entered %s.\n", __func__);
4741 mcp->mb[0] = MBC_RESTART_MPI_FW;
4742 mcp->out_mb = MBX_0;
4743 mcp->in_mb = MBX_0|MBX_1;
4744 mcp->tov = MBX_TOV_SECONDS;
4746 rval = qla2x00_mailbox_command(vha, mcp);
4748 if (rval != QLA_SUCCESS) {
4749 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
4750 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4751 rval, mcp->mb[0], mcp->mb[1]);
4753 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
4754 "Done %s.\n", __func__);
4761 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4765 mbx_cmd_t *mcp = &mc;
4769 struct qla_hw_data *ha = vha->hw;
4771 if (!IS_P3P_TYPE(ha))
4772 return QLA_FUNCTION_FAILED;
4774 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
4775 "Entered %s.\n", __func__);
4777 str = (__force __le16 *)version;
4778 len = strlen(version);
4780 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4781 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
4782 mcp->out_mb = MBX_1|MBX_0;
4783 for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4784 mcp->mb[i] = le16_to_cpup(str);
4785 mcp->out_mb |= 1<<i;
4787 for (; i < 16; i++) {
4789 mcp->out_mb |= 1<<i;
4791 mcp->in_mb = MBX_1|MBX_0;
4792 mcp->tov = MBX_TOV_SECONDS;
4794 rval = qla2x00_mailbox_command(vha, mcp);
4796 if (rval != QLA_SUCCESS) {
4797 ql_dbg(ql_dbg_mbx, vha, 0x117c,
4798 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4800 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
4801 "Done %s.\n", __func__);
4808 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4812 mbx_cmd_t *mcp = &mc;
4817 struct qla_hw_data *ha = vha->hw;
4819 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
4821 return QLA_FUNCTION_FAILED;
4823 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4824 "Entered %s.\n", __func__);
4826 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4828 ql_log(ql_log_warn, vha, 0x117f,
4829 "Failed to allocate driver version param.\n");
4830 return QLA_MEMORY_ALLOC_FAILED;
4833 memcpy(str, "\x7\x3\x11\x0", 4);
4835 len = dwlen * 4 - 4;
4836 memset(str + 4, 0, len);
4837 if (len > strlen(version))
4838 len = strlen(version);
4839 memcpy(str + 4, version, len);
4841 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4842 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4843 mcp->mb[2] = MSW(LSD(str_dma));
4844 mcp->mb[3] = LSW(LSD(str_dma));
4845 mcp->mb[6] = MSW(MSD(str_dma));
4846 mcp->mb[7] = LSW(MSD(str_dma));
4847 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4848 mcp->in_mb = MBX_1|MBX_0;
4849 mcp->tov = MBX_TOV_SECONDS;
4851 rval = qla2x00_mailbox_command(vha, mcp);
4853 if (rval != QLA_SUCCESS) {
4854 ql_dbg(ql_dbg_mbx, vha, 0x1180,
4855 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4857 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4858 "Done %s.\n", __func__);
4861 dma_pool_free(ha->s_dma_pool, str, str_dma);
4867 qla24xx_get_port_login_templ(scsi_qla_host_t *vha, dma_addr_t buf_dma,
4868 void *buf, uint16_t bufsiz)
4872 mbx_cmd_t *mcp = &mc;
4875 if (!IS_FWI2_CAPABLE(vha->hw))
4876 return QLA_FUNCTION_FAILED;
4878 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4879 "Entered %s.\n", __func__);
4881 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4882 mcp->mb[1] = RNID_TYPE_PORT_LOGIN << 8;
4883 mcp->mb[2] = MSW(buf_dma);
4884 mcp->mb[3] = LSW(buf_dma);
4885 mcp->mb[6] = MSW(MSD(buf_dma));
4886 mcp->mb[7] = LSW(MSD(buf_dma));
4887 mcp->mb[8] = bufsiz/4;
4888 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4889 mcp->in_mb = MBX_1|MBX_0;
4890 mcp->tov = MBX_TOV_SECONDS;
4892 rval = qla2x00_mailbox_command(vha, mcp);
4894 if (rval != QLA_SUCCESS) {
4895 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4896 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4898 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4899 "Done %s.\n", __func__);
4900 bp = (uint32_t *) buf;
4901 for (i = 0; i < (bufsiz-4)/4; i++, bp++)
4902 *bp = le32_to_cpu((__force __le32)*bp);
4908 #define PUREX_CMD_COUNT 2
4910 qla25xx_set_els_cmds_supported(scsi_qla_host_t *vha)
4914 mbx_cmd_t *mcp = &mc;
4915 uint8_t *els_cmd_map;
4916 dma_addr_t els_cmd_map_dma;
4917 uint8_t cmd_opcode[PUREX_CMD_COUNT];
4918 uint8_t i, index, purex_bit;
4919 struct qla_hw_data *ha = vha->hw;
4921 if (!IS_QLA25XX(ha) && !IS_QLA2031(ha) &&
4922 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4925 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1197,
4926 "Entered %s.\n", __func__);
4928 els_cmd_map = dma_alloc_coherent(&ha->pdev->dev, ELS_CMD_MAP_SIZE,
4929 &els_cmd_map_dma, GFP_KERNEL);
4931 ql_log(ql_log_warn, vha, 0x7101,
4932 "Failed to allocate RDP els command param.\n");
4933 return QLA_MEMORY_ALLOC_FAILED;
4936 memset(els_cmd_map, 0, ELS_CMD_MAP_SIZE);
4938 /* List of Purex ELS */
4939 cmd_opcode[0] = ELS_FPIN;
4940 cmd_opcode[1] = ELS_RDP;
4942 for (i = 0; i < PUREX_CMD_COUNT; i++) {
4943 index = cmd_opcode[i] / 8;
4944 purex_bit = cmd_opcode[i] % 8;
4945 els_cmd_map[index] |= 1 << purex_bit;
4948 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4949 mcp->mb[1] = RNID_TYPE_ELS_CMD << 8;
4950 mcp->mb[2] = MSW(LSD(els_cmd_map_dma));
4951 mcp->mb[3] = LSW(LSD(els_cmd_map_dma));
4952 mcp->mb[6] = MSW(MSD(els_cmd_map_dma));
4953 mcp->mb[7] = LSW(MSD(els_cmd_map_dma));
4954 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4955 mcp->in_mb = MBX_1|MBX_0;
4956 mcp->tov = MBX_TOV_SECONDS;
4957 mcp->flags = MBX_DMA_OUT;
4958 mcp->buf_size = ELS_CMD_MAP_SIZE;
4959 rval = qla2x00_mailbox_command(vha, mcp);
4961 if (rval != QLA_SUCCESS) {
4962 ql_dbg(ql_dbg_mbx, vha, 0x118d,
4963 "Failed=%x (%x,%x).\n", rval, mcp->mb[0], mcp->mb[1]);
4965 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
4966 "Done %s.\n", __func__);
4969 dma_free_coherent(&ha->pdev->dev, DMA_POOL_SIZE,
4970 els_cmd_map, els_cmd_map_dma);
4976 qla24xx_get_buffer_credits(scsi_qla_host_t *vha, struct buffer_credit_24xx *bbc,
4980 mbx_cmd_t *mcp = &mc;
4983 if (!IS_FWI2_CAPABLE(vha->hw))
4984 return QLA_FUNCTION_FAILED;
4986 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118e,
4987 "Entered %s.\n", __func__);
4989 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4990 mcp->mb[1] = RNID_BUFFER_CREDITS << 8;
4991 mcp->mb[2] = MSW(LSD(bbc_dma));
4992 mcp->mb[3] = LSW(LSD(bbc_dma));
4993 mcp->mb[6] = MSW(MSD(bbc_dma));
4994 mcp->mb[7] = LSW(MSD(bbc_dma));
4995 mcp->mb[8] = sizeof(*bbc) / sizeof(*bbc->parameter);
4996 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4997 mcp->in_mb = MBX_1|MBX_0;
4998 mcp->buf_size = sizeof(*bbc);
4999 mcp->flags = MBX_DMA_IN;
5000 mcp->tov = MBX_TOV_SECONDS;
5001 rval = qla2x00_mailbox_command(vha, mcp);
5003 if (rval != QLA_SUCCESS) {
5004 ql_dbg(ql_dbg_mbx, vha, 0x118f,
5005 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
5007 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1190,
5008 "Done %s.\n", __func__);
5015 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
5019 mbx_cmd_t *mcp = &mc;
5021 if (!IS_FWI2_CAPABLE(vha->hw))
5022 return QLA_FUNCTION_FAILED;
5024 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
5025 "Entered %s.\n", __func__);
5027 mcp->mb[0] = MBC_GET_RNID_PARAMS;
5028 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
5029 mcp->out_mb = MBX_1|MBX_0;
5030 mcp->in_mb = MBX_1|MBX_0;
5031 mcp->tov = MBX_TOV_SECONDS;
5033 rval = qla2x00_mailbox_command(vha, mcp);
5036 if (rval != QLA_SUCCESS) {
5037 ql_dbg(ql_dbg_mbx, vha, 0x115a,
5038 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
5040 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
5041 "Done %s.\n", __func__);
5048 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
5049 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
5053 mbx_cmd_t *mcp = &mc;
5054 struct qla_hw_data *ha = vha->hw;
5056 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
5057 "Entered %s.\n", __func__);
5059 if (!IS_FWI2_CAPABLE(ha))
5060 return QLA_FUNCTION_FAILED;
5065 mcp->mb[0] = MBC_READ_SFP;
5067 mcp->mb[2] = MSW(LSD(sfp_dma));
5068 mcp->mb[3] = LSW(LSD(sfp_dma));
5069 mcp->mb[6] = MSW(MSD(sfp_dma));
5070 mcp->mb[7] = LSW(MSD(sfp_dma));
5074 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
5075 mcp->in_mb = MBX_1|MBX_0;
5076 mcp->tov = MBX_TOV_SECONDS;
5078 rval = qla2x00_mailbox_command(vha, mcp);
5083 if (rval != QLA_SUCCESS) {
5084 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
5085 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5086 if (mcp->mb[0] == MBS_COMMAND_ERROR && mcp->mb[1] == 0x22) {
5087 /* sfp is not there */
5088 rval = QLA_INTERFACE_ERROR;
5091 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
5092 "Done %s.\n", __func__);
5099 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
5100 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
5104 mbx_cmd_t *mcp = &mc;
5105 struct qla_hw_data *ha = vha->hw;
5107 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
5108 "Entered %s.\n", __func__);
5110 if (!IS_FWI2_CAPABLE(ha))
5111 return QLA_FUNCTION_FAILED;
5119 mcp->mb[0] = MBC_WRITE_SFP;
5121 mcp->mb[2] = MSW(LSD(sfp_dma));
5122 mcp->mb[3] = LSW(LSD(sfp_dma));
5123 mcp->mb[6] = MSW(MSD(sfp_dma));
5124 mcp->mb[7] = LSW(MSD(sfp_dma));
5128 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
5129 mcp->in_mb = MBX_1|MBX_0;
5130 mcp->tov = MBX_TOV_SECONDS;
5132 rval = qla2x00_mailbox_command(vha, mcp);
5134 if (rval != QLA_SUCCESS) {
5135 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
5136 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5138 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
5139 "Done %s.\n", __func__);
5146 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
5147 uint16_t size_in_bytes, uint16_t *actual_size)
5151 mbx_cmd_t *mcp = &mc;
5153 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
5154 "Entered %s.\n", __func__);
5156 if (!IS_CNA_CAPABLE(vha->hw))
5157 return QLA_FUNCTION_FAILED;
5159 mcp->mb[0] = MBC_GET_XGMAC_STATS;
5160 mcp->mb[2] = MSW(stats_dma);
5161 mcp->mb[3] = LSW(stats_dma);
5162 mcp->mb[6] = MSW(MSD(stats_dma));
5163 mcp->mb[7] = LSW(MSD(stats_dma));
5164 mcp->mb[8] = size_in_bytes >> 2;
5165 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
5166 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5167 mcp->tov = MBX_TOV_SECONDS;
5169 rval = qla2x00_mailbox_command(vha, mcp);
5171 if (rval != QLA_SUCCESS) {
5172 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
5173 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
5174 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
5176 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
5177 "Done %s.\n", __func__);
5180 *actual_size = mcp->mb[2] << 2;
5187 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
5192 mbx_cmd_t *mcp = &mc;
5194 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
5195 "Entered %s.\n", __func__);
5197 if (!IS_CNA_CAPABLE(vha->hw))
5198 return QLA_FUNCTION_FAILED;
5200 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
5202 mcp->mb[2] = MSW(tlv_dma);
5203 mcp->mb[3] = LSW(tlv_dma);
5204 mcp->mb[6] = MSW(MSD(tlv_dma));
5205 mcp->mb[7] = LSW(MSD(tlv_dma));
5207 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
5208 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5209 mcp->tov = MBX_TOV_SECONDS;
5211 rval = qla2x00_mailbox_command(vha, mcp);
5213 if (rval != QLA_SUCCESS) {
5214 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
5215 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
5216 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
5218 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
5219 "Done %s.\n", __func__);
5226 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
5230 mbx_cmd_t *mcp = &mc;
5232 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
5233 "Entered %s.\n", __func__);
5235 if (!IS_FWI2_CAPABLE(vha->hw))
5236 return QLA_FUNCTION_FAILED;
5238 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
5239 mcp->mb[1] = LSW(risc_addr);
5240 mcp->mb[8] = MSW(risc_addr);
5241 mcp->out_mb = MBX_8|MBX_1|MBX_0;
5242 mcp->in_mb = MBX_3|MBX_2|MBX_0;
5243 mcp->tov = MBX_TOV_SECONDS;
5245 rval = qla2x00_mailbox_command(vha, mcp);
5246 if (rval != QLA_SUCCESS) {
5247 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
5248 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5250 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
5251 "Done %s.\n", __func__);
5252 *data = mcp->mb[3] << 16 | mcp->mb[2];
5259 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
5264 mbx_cmd_t *mcp = &mc;
5266 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
5267 "Entered %s.\n", __func__);
5269 memset(mcp->mb, 0 , sizeof(mcp->mb));
5270 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
5271 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
5273 /* transfer count */
5274 mcp->mb[10] = LSW(mreq->transfer_size);
5275 mcp->mb[11] = MSW(mreq->transfer_size);
5277 /* send data address */
5278 mcp->mb[14] = LSW(mreq->send_dma);
5279 mcp->mb[15] = MSW(mreq->send_dma);
5280 mcp->mb[20] = LSW(MSD(mreq->send_dma));
5281 mcp->mb[21] = MSW(MSD(mreq->send_dma));
5283 /* receive data address */
5284 mcp->mb[16] = LSW(mreq->rcv_dma);
5285 mcp->mb[17] = MSW(mreq->rcv_dma);
5286 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
5287 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
5289 /* Iteration count */
5290 mcp->mb[18] = LSW(mreq->iteration_count);
5291 mcp->mb[19] = MSW(mreq->iteration_count);
5293 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
5294 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
5295 if (IS_CNA_CAPABLE(vha->hw))
5296 mcp->out_mb |= MBX_2;
5297 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
5299 mcp->buf_size = mreq->transfer_size;
5300 mcp->tov = MBX_TOV_SECONDS;
5301 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5303 rval = qla2x00_mailbox_command(vha, mcp);
5305 if (rval != QLA_SUCCESS) {
5306 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
5307 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
5308 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
5309 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
5311 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
5312 "Done %s.\n", __func__);
5315 /* Copy mailbox information */
5316 memcpy( mresp, mcp->mb, 64);
5321 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
5326 mbx_cmd_t *mcp = &mc;
5327 struct qla_hw_data *ha = vha->hw;
5329 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
5330 "Entered %s.\n", __func__);
5332 memset(mcp->mb, 0 , sizeof(mcp->mb));
5333 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
5334 /* BIT_6 specifies 64bit address */
5335 mcp->mb[1] = mreq->options | BIT_15 | BIT_6;
5336 if (IS_CNA_CAPABLE(ha)) {
5337 mcp->mb[2] = vha->fcoe_fcf_idx;
5339 mcp->mb[16] = LSW(mreq->rcv_dma);
5340 mcp->mb[17] = MSW(mreq->rcv_dma);
5341 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
5342 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
5344 mcp->mb[10] = LSW(mreq->transfer_size);
5346 mcp->mb[14] = LSW(mreq->send_dma);
5347 mcp->mb[15] = MSW(mreq->send_dma);
5348 mcp->mb[20] = LSW(MSD(mreq->send_dma));
5349 mcp->mb[21] = MSW(MSD(mreq->send_dma));
5351 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
5352 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
5353 if (IS_CNA_CAPABLE(ha))
5354 mcp->out_mb |= MBX_2;
5357 if (IS_CNA_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
5358 IS_QLA2031(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
5359 mcp->in_mb |= MBX_1;
5360 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
5362 mcp->in_mb |= MBX_3;
5364 mcp->tov = MBX_TOV_SECONDS;
5365 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5366 mcp->buf_size = mreq->transfer_size;
5368 rval = qla2x00_mailbox_command(vha, mcp);
5370 if (rval != QLA_SUCCESS) {
5371 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
5372 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5373 rval, mcp->mb[0], mcp->mb[1]);
5375 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
5376 "Done %s.\n", __func__);
5379 /* Copy mailbox information */
5380 memcpy(mresp, mcp->mb, 64);
5385 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
5389 mbx_cmd_t *mcp = &mc;
5391 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
5392 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
5394 mcp->mb[0] = MBC_ISP84XX_RESET;
5395 mcp->mb[1] = enable_diagnostic;
5396 mcp->out_mb = MBX_1|MBX_0;
5397 mcp->in_mb = MBX_1|MBX_0;
5398 mcp->tov = MBX_TOV_SECONDS;
5399 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5400 rval = qla2x00_mailbox_command(vha, mcp);
5402 if (rval != QLA_SUCCESS)
5403 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
5405 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
5406 "Done %s.\n", __func__);
5412 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
5416 mbx_cmd_t *mcp = &mc;
5418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
5419 "Entered %s.\n", __func__);
5421 if (!IS_FWI2_CAPABLE(vha->hw))
5422 return QLA_FUNCTION_FAILED;
5424 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
5425 mcp->mb[1] = LSW(risc_addr);
5426 mcp->mb[2] = LSW(data);
5427 mcp->mb[3] = MSW(data);
5428 mcp->mb[8] = MSW(risc_addr);
5429 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
5430 mcp->in_mb = MBX_1|MBX_0;
5431 mcp->tov = MBX_TOV_SECONDS;
5433 rval = qla2x00_mailbox_command(vha, mcp);
5434 if (rval != QLA_SUCCESS) {
5435 ql_dbg(ql_dbg_mbx, vha, 0x1101,
5436 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5437 rval, mcp->mb[0], mcp->mb[1]);
5439 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
5440 "Done %s.\n", __func__);
5447 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
5450 uint32_t stat, timer;
5452 struct qla_hw_data *ha = vha->hw;
5453 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
5457 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
5458 "Entered %s.\n", __func__);
5460 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
5462 /* Write the MBC data to the registers */
5463 wrt_reg_word(®->mailbox0, MBC_WRITE_MPI_REGISTER);
5464 wrt_reg_word(®->mailbox1, mb[0]);
5465 wrt_reg_word(®->mailbox2, mb[1]);
5466 wrt_reg_word(®->mailbox3, mb[2]);
5467 wrt_reg_word(®->mailbox4, mb[3]);
5469 wrt_reg_dword(®->hccr, HCCRX_SET_HOST_INT);
5471 /* Poll for MBC interrupt */
5472 for (timer = 6000000; timer; timer--) {
5473 /* Check for pending interrupts. */
5474 stat = rd_reg_dword(®->host_status);
5475 if (stat & HSRX_RISC_INT) {
5478 if (stat == 0x1 || stat == 0x2 ||
5479 stat == 0x10 || stat == 0x11) {
5480 set_bit(MBX_INTERRUPT,
5481 &ha->mbx_cmd_flags);
5482 mb0 = rd_reg_word(®->mailbox0);
5483 wrt_reg_dword(®->hccr,
5484 HCCRX_CLR_RISC_INT);
5485 rd_reg_dword(®->hccr);
5492 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
5493 rval = mb0 & MBS_MASK;
5495 rval = QLA_FUNCTION_FAILED;
5497 if (rval != QLA_SUCCESS) {
5498 ql_dbg(ql_dbg_mbx, vha, 0x1104,
5499 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
5501 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
5502 "Done %s.\n", __func__);
5508 /* Set the specified data rate */
5510 qla2x00_set_data_rate(scsi_qla_host_t *vha, uint16_t mode)
5514 mbx_cmd_t *mcp = &mc;
5515 struct qla_hw_data *ha = vha->hw;
5518 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
5519 "Entered %s speed:0x%x mode:0x%x.\n", __func__, ha->set_data_rate,
5522 if (!IS_FWI2_CAPABLE(ha))
5523 return QLA_FUNCTION_FAILED;
5525 memset(mcp, 0, sizeof(*mcp));
5526 switch (ha->set_data_rate) {
5527 case PORT_SPEED_AUTO:
5528 case PORT_SPEED_4GB:
5529 case PORT_SPEED_8GB:
5530 case PORT_SPEED_16GB:
5531 case PORT_SPEED_32GB:
5532 val = ha->set_data_rate;
5535 ql_log(ql_log_warn, vha, 0x1199,
5536 "Unrecognized speed setting:%d. Setting Autoneg\n",
5538 val = ha->set_data_rate = PORT_SPEED_AUTO;
5542 mcp->mb[0] = MBC_DATA_RATE;
5546 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5547 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5548 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
5549 mcp->in_mb |= MBX_4|MBX_3;
5550 mcp->tov = MBX_TOV_SECONDS;
5552 rval = qla2x00_mailbox_command(vha, mcp);
5553 if (rval != QLA_SUCCESS) {
5554 ql_dbg(ql_dbg_mbx, vha, 0x1107,
5555 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5557 if (mcp->mb[1] != 0x7)
5558 ql_dbg(ql_dbg_mbx, vha, 0x1179,
5559 "Speed set:0x%x\n", mcp->mb[1]);
5561 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
5562 "Done %s.\n", __func__);
5569 qla2x00_get_data_rate(scsi_qla_host_t *vha)
5573 mbx_cmd_t *mcp = &mc;
5574 struct qla_hw_data *ha = vha->hw;
5576 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
5577 "Entered %s.\n", __func__);
5579 if (!IS_FWI2_CAPABLE(ha))
5580 return QLA_FUNCTION_FAILED;
5582 mcp->mb[0] = MBC_DATA_RATE;
5583 mcp->mb[1] = QLA_GET_DATA_RATE;
5584 mcp->out_mb = MBX_1|MBX_0;
5585 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5586 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
5587 mcp->in_mb |= MBX_3;
5588 mcp->tov = MBX_TOV_SECONDS;
5590 rval = qla2x00_mailbox_command(vha, mcp);
5591 if (rval != QLA_SUCCESS) {
5592 ql_dbg(ql_dbg_mbx, vha, 0x1107,
5593 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5595 if (mcp->mb[1] != 0x7)
5596 ha->link_data_rate = mcp->mb[1];
5598 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
5599 if (mcp->mb[4] & BIT_0)
5600 ql_log(ql_log_info, vha, 0x11a2,
5601 "FEC=enabled (data rate).\n");
5604 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
5605 "Done %s.\n", __func__);
5606 if (mcp->mb[1] != 0x7)
5607 ha->link_data_rate = mcp->mb[1];
5614 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5618 mbx_cmd_t *mcp = &mc;
5619 struct qla_hw_data *ha = vha->hw;
5621 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
5622 "Entered %s.\n", __func__);
5624 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
5625 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
5626 return QLA_FUNCTION_FAILED;
5627 mcp->mb[0] = MBC_GET_PORT_CONFIG;
5628 mcp->out_mb = MBX_0;
5629 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5630 mcp->tov = MBX_TOV_SECONDS;
5633 rval = qla2x00_mailbox_command(vha, mcp);
5635 if (rval != QLA_SUCCESS) {
5636 ql_dbg(ql_dbg_mbx, vha, 0x110a,
5637 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5639 /* Copy all bits to preserve original value */
5640 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
5642 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
5643 "Done %s.\n", __func__);
5649 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
5653 mbx_cmd_t *mcp = &mc;
5655 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
5656 "Entered %s.\n", __func__);
5658 mcp->mb[0] = MBC_SET_PORT_CONFIG;
5659 /* Copy all bits to preserve original setting */
5660 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
5661 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5663 mcp->tov = MBX_TOV_SECONDS;
5665 rval = qla2x00_mailbox_command(vha, mcp);
5667 if (rval != QLA_SUCCESS) {
5668 ql_dbg(ql_dbg_mbx, vha, 0x110d,
5669 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5671 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
5672 "Done %s.\n", __func__);
5679 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
5684 mbx_cmd_t *mcp = &mc;
5685 struct qla_hw_data *ha = vha->hw;
5687 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
5688 "Entered %s.\n", __func__);
5690 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
5691 return QLA_FUNCTION_FAILED;
5693 mcp->mb[0] = MBC_PORT_PARAMS;
5694 mcp->mb[1] = loop_id;
5695 if (ha->flags.fcp_prio_enabled)
5699 mcp->mb[4] = priority & 0xf;
5700 mcp->mb[9] = vha->vp_idx;
5701 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5702 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5703 mcp->tov = MBX_TOV_SECONDS;
5705 rval = qla2x00_mailbox_command(vha, mcp);
5713 if (rval != QLA_SUCCESS) {
5714 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
5716 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
5717 "Done %s.\n", __func__);
5724 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
5726 int rval = QLA_FUNCTION_FAILED;
5727 struct qla_hw_data *ha = vha->hw;
5730 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
5731 ql_dbg(ql_dbg_mbx, vha, 0x1150,
5732 "Thermal not supported by this card.\n");
5736 if (IS_QLA25XX(ha)) {
5737 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5738 ha->pdev->subsystem_device == 0x0175) {
5739 rval = qla2x00_read_sfp(vha, 0, &byte,
5740 0x98, 0x1, 1, BIT_13|BIT_0);
5744 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
5745 ha->pdev->subsystem_device == 0x338e) {
5746 rval = qla2x00_read_sfp(vha, 0, &byte,
5747 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
5751 ql_dbg(ql_dbg_mbx, vha, 0x10c9,
5752 "Thermal not supported by this card.\n");
5756 if (IS_QLA82XX(ha)) {
5757 *temp = qla82xx_read_temperature(vha);
5760 } else if (IS_QLA8044(ha)) {
5761 *temp = qla8044_read_temperature(vha);
5766 rval = qla2x00_read_asic_temperature(vha, temp);
5771 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
5774 struct qla_hw_data *ha = vha->hw;
5776 mbx_cmd_t *mcp = &mc;
5778 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
5779 "Entered %s.\n", __func__);
5781 if (!IS_FWI2_CAPABLE(ha))
5782 return QLA_FUNCTION_FAILED;
5784 memset(mcp, 0, sizeof(mbx_cmd_t));
5785 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5788 mcp->out_mb = MBX_1|MBX_0;
5790 mcp->tov = MBX_TOV_SECONDS;
5793 rval = qla2x00_mailbox_command(vha, mcp);
5794 if (rval != QLA_SUCCESS) {
5795 ql_dbg(ql_dbg_mbx, vha, 0x1016,
5796 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5798 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
5799 "Done %s.\n", __func__);
5806 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
5809 struct qla_hw_data *ha = vha->hw;
5811 mbx_cmd_t *mcp = &mc;
5813 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
5814 "Entered %s.\n", __func__);
5816 if (!IS_P3P_TYPE(ha))
5817 return QLA_FUNCTION_FAILED;
5819 memset(mcp, 0, sizeof(mbx_cmd_t));
5820 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5823 mcp->out_mb = MBX_1|MBX_0;
5825 mcp->tov = MBX_TOV_SECONDS;
5828 rval = qla2x00_mailbox_command(vha, mcp);
5829 if (rval != QLA_SUCCESS) {
5830 ql_dbg(ql_dbg_mbx, vha, 0x100c,
5831 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5833 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
5834 "Done %s.\n", __func__);
5841 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
5843 struct qla_hw_data *ha = vha->hw;
5845 mbx_cmd_t *mcp = &mc;
5846 int rval = QLA_FUNCTION_FAILED;
5848 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
5849 "Entered %s.\n", __func__);
5851 memset(mcp->mb, 0 , sizeof(mcp->mb));
5852 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5853 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5854 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
5855 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
5857 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5858 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
5859 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5861 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5862 mcp->tov = MBX_TOV_SECONDS;
5863 rval = qla2x00_mailbox_command(vha, mcp);
5865 /* Always copy back return mailbox values. */
5866 if (rval != QLA_SUCCESS) {
5867 ql_dbg(ql_dbg_mbx, vha, 0x1120,
5868 "mailbox command FAILED=0x%x, subcode=%x.\n",
5869 (mcp->mb[1] << 16) | mcp->mb[0],
5870 (mcp->mb[3] << 16) | mcp->mb[2]);
5872 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
5873 "Done %s.\n", __func__);
5874 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
5875 if (!ha->md_template_size) {
5876 ql_dbg(ql_dbg_mbx, vha, 0x1122,
5877 "Null template size obtained.\n");
5878 rval = QLA_FUNCTION_FAILED;
5885 qla82xx_md_get_template(scsi_qla_host_t *vha)
5887 struct qla_hw_data *ha = vha->hw;
5889 mbx_cmd_t *mcp = &mc;
5890 int rval = QLA_FUNCTION_FAILED;
5892 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
5893 "Entered %s.\n", __func__);
5895 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5896 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5897 if (!ha->md_tmplt_hdr) {
5898 ql_log(ql_log_warn, vha, 0x1124,
5899 "Unable to allocate memory for Minidump template.\n");
5903 memset(mcp->mb, 0 , sizeof(mcp->mb));
5904 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5905 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5906 mcp->mb[2] = LSW(RQST_TMPLT);
5907 mcp->mb[3] = MSW(RQST_TMPLT);
5908 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
5909 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
5910 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
5911 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
5912 mcp->mb[8] = LSW(ha->md_template_size);
5913 mcp->mb[9] = MSW(ha->md_template_size);
5915 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5916 mcp->tov = MBX_TOV_SECONDS;
5917 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5918 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5919 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5920 rval = qla2x00_mailbox_command(vha, mcp);
5922 if (rval != QLA_SUCCESS) {
5923 ql_dbg(ql_dbg_mbx, vha, 0x1125,
5924 "mailbox command FAILED=0x%x, subcode=%x.\n",
5925 ((mcp->mb[1] << 16) | mcp->mb[0]),
5926 ((mcp->mb[3] << 16) | mcp->mb[2]));
5928 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
5929 "Done %s.\n", __func__);
5934 qla8044_md_get_template(scsi_qla_host_t *vha)
5936 struct qla_hw_data *ha = vha->hw;
5938 mbx_cmd_t *mcp = &mc;
5939 int rval = QLA_FUNCTION_FAILED;
5940 int offset = 0, size = MINIDUMP_SIZE_36K;
5942 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
5943 "Entered %s.\n", __func__);
5945 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5946 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5947 if (!ha->md_tmplt_hdr) {
5948 ql_log(ql_log_warn, vha, 0xb11b,
5949 "Unable to allocate memory for Minidump template.\n");
5953 memset(mcp->mb, 0 , sizeof(mcp->mb));
5954 while (offset < ha->md_template_size) {
5955 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5956 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5957 mcp->mb[2] = LSW(RQST_TMPLT);
5958 mcp->mb[3] = MSW(RQST_TMPLT);
5959 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
5960 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
5961 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
5962 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
5963 mcp->mb[8] = LSW(size);
5964 mcp->mb[9] = MSW(size);
5965 mcp->mb[10] = offset & 0x0000FFFF;
5966 mcp->mb[11] = offset & 0xFFFF0000;
5967 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5968 mcp->tov = MBX_TOV_SECONDS;
5969 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5970 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5971 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5972 rval = qla2x00_mailbox_command(vha, mcp);
5974 if (rval != QLA_SUCCESS) {
5975 ql_dbg(ql_dbg_mbx, vha, 0xb11c,
5976 "mailbox command FAILED=0x%x, subcode=%x.\n",
5977 ((mcp->mb[1] << 16) | mcp->mb[0]),
5978 ((mcp->mb[3] << 16) | mcp->mb[2]));
5981 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
5982 "Done %s.\n", __func__);
5983 offset = offset + size;
5989 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5992 struct qla_hw_data *ha = vha->hw;
5994 mbx_cmd_t *mcp = &mc;
5996 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5997 return QLA_FUNCTION_FAILED;
5999 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
6000 "Entered %s.\n", __func__);
6002 memset(mcp, 0, sizeof(mbx_cmd_t));
6003 mcp->mb[0] = MBC_SET_LED_CONFIG;
6004 mcp->mb[1] = led_cfg[0];
6005 mcp->mb[2] = led_cfg[1];
6006 if (IS_QLA8031(ha)) {
6007 mcp->mb[3] = led_cfg[2];
6008 mcp->mb[4] = led_cfg[3];
6009 mcp->mb[5] = led_cfg[4];
6010 mcp->mb[6] = led_cfg[5];
6013 mcp->out_mb = MBX_2|MBX_1|MBX_0;
6015 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
6017 mcp->tov = MBX_TOV_SECONDS;
6020 rval = qla2x00_mailbox_command(vha, mcp);
6021 if (rval != QLA_SUCCESS) {
6022 ql_dbg(ql_dbg_mbx, vha, 0x1134,
6023 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6025 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
6026 "Done %s.\n", __func__);
6033 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
6036 struct qla_hw_data *ha = vha->hw;
6038 mbx_cmd_t *mcp = &mc;
6040 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
6041 return QLA_FUNCTION_FAILED;
6043 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
6044 "Entered %s.\n", __func__);
6046 memset(mcp, 0, sizeof(mbx_cmd_t));
6047 mcp->mb[0] = MBC_GET_LED_CONFIG;
6049 mcp->out_mb = MBX_0;
6050 mcp->in_mb = MBX_2|MBX_1|MBX_0;
6052 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
6053 mcp->tov = MBX_TOV_SECONDS;
6056 rval = qla2x00_mailbox_command(vha, mcp);
6057 if (rval != QLA_SUCCESS) {
6058 ql_dbg(ql_dbg_mbx, vha, 0x1137,
6059 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6061 led_cfg[0] = mcp->mb[1];
6062 led_cfg[1] = mcp->mb[2];
6063 if (IS_QLA8031(ha)) {
6064 led_cfg[2] = mcp->mb[3];
6065 led_cfg[3] = mcp->mb[4];
6066 led_cfg[4] = mcp->mb[5];
6067 led_cfg[5] = mcp->mb[6];
6069 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
6070 "Done %s.\n", __func__);
6077 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
6080 struct qla_hw_data *ha = vha->hw;
6082 mbx_cmd_t *mcp = &mc;
6084 if (!IS_P3P_TYPE(ha))
6085 return QLA_FUNCTION_FAILED;
6087 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
6088 "Entered %s.\n", __func__);
6090 memset(mcp, 0, sizeof(mbx_cmd_t));
6091 mcp->mb[0] = MBC_SET_LED_CONFIG;
6097 mcp->out_mb = MBX_7|MBX_0;
6099 mcp->tov = MBX_TOV_SECONDS;
6102 rval = qla2x00_mailbox_command(vha, mcp);
6103 if (rval != QLA_SUCCESS) {
6104 ql_dbg(ql_dbg_mbx, vha, 0x1128,
6105 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6107 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
6108 "Done %s.\n", __func__);
6115 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
6118 struct qla_hw_data *ha = vha->hw;
6120 mbx_cmd_t *mcp = &mc;
6122 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
6123 return QLA_FUNCTION_FAILED;
6125 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
6126 "Entered %s.\n", __func__);
6128 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
6129 mcp->mb[1] = LSW(reg);
6130 mcp->mb[2] = MSW(reg);
6131 mcp->mb[3] = LSW(data);
6132 mcp->mb[4] = MSW(data);
6133 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
6135 mcp->in_mb = MBX_1|MBX_0;
6136 mcp->tov = MBX_TOV_SECONDS;
6138 rval = qla2x00_mailbox_command(vha, mcp);
6140 if (rval != QLA_SUCCESS) {
6141 ql_dbg(ql_dbg_mbx, vha, 0x1131,
6142 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6144 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
6145 "Done %s.\n", __func__);
6152 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
6155 struct qla_hw_data *ha = vha->hw;
6157 mbx_cmd_t *mcp = &mc;
6159 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
6160 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
6161 "Implicit LOGO Unsupported.\n");
6162 return QLA_FUNCTION_FAILED;
6166 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
6167 "Entering %s.\n", __func__);
6169 /* Perform Implicit LOGO. */
6170 mcp->mb[0] = MBC_PORT_LOGOUT;
6171 mcp->mb[1] = fcport->loop_id;
6172 mcp->mb[10] = BIT_15;
6173 mcp->out_mb = MBX_10|MBX_1|MBX_0;
6175 mcp->tov = MBX_TOV_SECONDS;
6177 rval = qla2x00_mailbox_command(vha, mcp);
6178 if (rval != QLA_SUCCESS)
6179 ql_dbg(ql_dbg_mbx, vha, 0x113d,
6180 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6182 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
6183 "Done %s.\n", __func__);
6189 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
6193 mbx_cmd_t *mcp = &mc;
6194 struct qla_hw_data *ha = vha->hw;
6195 unsigned long retry_max_time = jiffies + (2 * HZ);
6197 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
6198 return QLA_FUNCTION_FAILED;
6200 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
6203 mcp->mb[0] = MBC_READ_REMOTE_REG;
6204 mcp->mb[1] = LSW(reg);
6205 mcp->mb[2] = MSW(reg);
6206 mcp->out_mb = MBX_2|MBX_1|MBX_0;
6207 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
6208 mcp->tov = MBX_TOV_SECONDS;
6210 rval = qla2x00_mailbox_command(vha, mcp);
6212 if (rval != QLA_SUCCESS) {
6213 ql_dbg(ql_dbg_mbx, vha, 0x114c,
6214 "Failed=%x mb[0]=%x mb[1]=%x.\n",
6215 rval, mcp->mb[0], mcp->mb[1]);
6217 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
6218 if (*data == QLA8XXX_BAD_VALUE) {
6220 * During soft-reset CAMRAM register reads might
6221 * return 0xbad0bad0. So retry for MAX of 2 sec
6222 * while reading camram registers.
6224 if (time_after(jiffies, retry_max_time)) {
6225 ql_dbg(ql_dbg_mbx, vha, 0x1141,
6226 "Failure to read CAMRAM register. "
6227 "data=0x%x.\n", *data);
6228 return QLA_FUNCTION_FAILED;
6233 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
6240 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
6244 mbx_cmd_t *mcp = &mc;
6245 struct qla_hw_data *ha = vha->hw;
6247 if (!IS_QLA83XX(ha))
6248 return QLA_FUNCTION_FAILED;
6250 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
6252 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
6253 mcp->out_mb = MBX_0;
6254 mcp->in_mb = MBX_1|MBX_0;
6255 mcp->tov = MBX_TOV_SECONDS;
6257 rval = qla2x00_mailbox_command(vha, mcp);
6259 if (rval != QLA_SUCCESS) {
6260 ql_dbg(ql_dbg_mbx, vha, 0x1144,
6261 "Failed=%x mb[0]=%x mb[1]=%x.\n",
6262 rval, mcp->mb[0], mcp->mb[1]);
6263 qla2xxx_dump_fw(vha);
6265 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
6272 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
6273 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
6277 mbx_cmd_t *mcp = &mc;
6278 uint8_t subcode = (uint8_t)options;
6279 struct qla_hw_data *ha = vha->hw;
6281 if (!IS_QLA8031(ha))
6282 return QLA_FUNCTION_FAILED;
6284 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
6286 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
6287 mcp->mb[1] = options;
6288 mcp->out_mb = MBX_1|MBX_0;
6289 if (subcode & BIT_2) {
6290 mcp->mb[2] = LSW(start_addr);
6291 mcp->mb[3] = MSW(start_addr);
6292 mcp->mb[4] = LSW(end_addr);
6293 mcp->mb[5] = MSW(end_addr);
6294 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
6296 mcp->in_mb = MBX_2|MBX_1|MBX_0;
6297 if (!(subcode & (BIT_2 | BIT_5)))
6298 mcp->in_mb |= MBX_4|MBX_3;
6299 mcp->tov = MBX_TOV_SECONDS;
6301 rval = qla2x00_mailbox_command(vha, mcp);
6303 if (rval != QLA_SUCCESS) {
6304 ql_dbg(ql_dbg_mbx, vha, 0x1147,
6305 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
6306 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
6308 qla2xxx_dump_fw(vha);
6310 if (subcode & BIT_5)
6311 *sector_size = mcp->mb[1];
6312 else if (subcode & (BIT_6 | BIT_7)) {
6313 ql_dbg(ql_dbg_mbx, vha, 0x1148,
6314 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
6315 } else if (subcode & (BIT_3 | BIT_4)) {
6316 ql_dbg(ql_dbg_mbx, vha, 0x1149,
6317 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
6319 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
6326 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
6331 mbx_cmd_t *mcp = &mc;
6333 if (!IS_MCTP_CAPABLE(vha->hw))
6334 return QLA_FUNCTION_FAILED;
6336 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
6337 "Entered %s.\n", __func__);
6339 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
6340 mcp->mb[1] = LSW(addr);
6341 mcp->mb[2] = MSW(req_dma);
6342 mcp->mb[3] = LSW(req_dma);
6343 mcp->mb[4] = MSW(size);
6344 mcp->mb[5] = LSW(size);
6345 mcp->mb[6] = MSW(MSD(req_dma));
6346 mcp->mb[7] = LSW(MSD(req_dma));
6347 mcp->mb[8] = MSW(addr);
6348 /* Setting RAM ID to valid */
6349 /* For MCTP RAM ID is 0x40 */
6350 mcp->mb[10] = BIT_7 | 0x40;
6352 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
6356 mcp->tov = MBX_TOV_SECONDS;
6358 rval = qla2x00_mailbox_command(vha, mcp);
6360 if (rval != QLA_SUCCESS) {
6361 ql_dbg(ql_dbg_mbx, vha, 0x114e,
6362 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6364 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
6365 "Done %s.\n", __func__);
6372 qla26xx_dport_diagnostics(scsi_qla_host_t *vha,
6373 void *dd_buf, uint size, uint options)
6377 mbx_cmd_t *mcp = &mc;
6380 if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw) &&
6381 !IS_QLA28XX(vha->hw))
6382 return QLA_FUNCTION_FAILED;
6384 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x119f,
6385 "Entered %s.\n", __func__);
6387 dd_dma = dma_map_single(&vha->hw->pdev->dev,
6388 dd_buf, size, DMA_FROM_DEVICE);
6389 if (dma_mapping_error(&vha->hw->pdev->dev, dd_dma)) {
6390 ql_log(ql_log_warn, vha, 0x1194, "Failed to map dma buffer.\n");
6391 return QLA_MEMORY_ALLOC_FAILED;
6394 memset(dd_buf, 0, size);
6396 mcp->mb[0] = MBC_DPORT_DIAGNOSTICS;
6397 mcp->mb[1] = options;
6398 mcp->mb[2] = MSW(LSD(dd_dma));
6399 mcp->mb[3] = LSW(LSD(dd_dma));
6400 mcp->mb[6] = MSW(MSD(dd_dma));
6401 mcp->mb[7] = LSW(MSD(dd_dma));
6403 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
6404 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
6405 mcp->buf_size = size;
6406 mcp->flags = MBX_DMA_IN;
6407 mcp->tov = MBX_TOV_SECONDS * 4;
6408 rval = qla2x00_mailbox_command(vha, mcp);
6410 if (rval != QLA_SUCCESS) {
6411 ql_dbg(ql_dbg_mbx, vha, 0x1195, "Failed=%x.\n", rval);
6413 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1196,
6414 "Done %s.\n", __func__);
6417 dma_unmap_single(&vha->hw->pdev->dev, dd_dma,
6418 size, DMA_FROM_DEVICE);
6423 static void qla2x00_async_mb_sp_done(srb_t *sp, int res)
6425 sp->u.iocb_cmd.u.mbx.rc = res;
6427 complete(&sp->u.iocb_cmd.u.mbx.comp);
6428 /* don't free sp here. Let the caller do the free */
6432 * This mailbox uses the iocb interface to send MB command.
6433 * This allows non-critial (non chip setup) command to go
6436 int qla24xx_send_mb_cmd(struct scsi_qla_host *vha, mbx_cmd_t *mcp)
6438 int rval = QLA_FUNCTION_FAILED;
6442 if (!vha->hw->flags.fw_started)
6445 sp = qla2x00_get_sp(vha, NULL, GFP_KERNEL);
6449 sp->type = SRB_MB_IOCB;
6450 sp->name = mb_to_str(mcp->mb[0]);
6452 c = &sp->u.iocb_cmd;
6453 c->timeout = qla2x00_async_iocb_timeout;
6454 init_completion(&c->u.mbx.comp);
6456 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
6458 memcpy(sp->u.iocb_cmd.u.mbx.out_mb, mcp->mb, SIZEOF_IOCB_MB_REG);
6460 sp->done = qla2x00_async_mb_sp_done;
6462 rval = qla2x00_start_sp(sp);
6463 if (rval != QLA_SUCCESS) {
6464 ql_dbg(ql_dbg_mbx, vha, 0x1018,
6465 "%s: %s Failed submission. %x.\n",
6466 __func__, sp->name, rval);
6470 ql_dbg(ql_dbg_mbx, vha, 0x113f, "MB:%s hndl %x submitted\n",
6471 sp->name, sp->handle);
6473 wait_for_completion(&c->u.mbx.comp);
6474 memcpy(mcp->mb, sp->u.iocb_cmd.u.mbx.in_mb, SIZEOF_IOCB_MB_REG);
6478 case QLA_FUNCTION_TIMEOUT:
6479 ql_dbg(ql_dbg_mbx, vha, 0x1140, "%s: %s Timeout. %x.\n",
6480 __func__, sp->name, rval);
6483 ql_dbg(ql_dbg_mbx, vha, 0x119d, "%s: %s done.\n",
6484 __func__, sp->name);
6487 ql_dbg(ql_dbg_mbx, vha, 0x119e, "%s: %s Failed. %x.\n",
6488 __func__, sp->name, rval);
6500 * NOTE: Do not call this routine from DPC thread
6502 int qla24xx_gpdb_wait(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
6504 int rval = QLA_FUNCTION_FAILED;
6506 struct port_database_24xx *pd;
6507 struct qla_hw_data *ha = vha->hw;
6510 if (!vha->hw->flags.fw_started)
6513 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
6515 ql_log(ql_log_warn, vha, 0xd047,
6516 "Failed to allocate port database structure.\n");
6520 memset(&mc, 0, sizeof(mc));
6521 mc.mb[0] = MBC_GET_PORT_DATABASE;
6522 mc.mb[1] = fcport->loop_id;
6523 mc.mb[2] = MSW(pd_dma);
6524 mc.mb[3] = LSW(pd_dma);
6525 mc.mb[6] = MSW(MSD(pd_dma));
6526 mc.mb[7] = LSW(MSD(pd_dma));
6527 mc.mb[9] = vha->vp_idx;
6530 rval = qla24xx_send_mb_cmd(vha, &mc);
6531 if (rval != QLA_SUCCESS) {
6532 ql_dbg(ql_dbg_mbx, vha, 0x1193,
6533 "%s: %8phC fail\n", __func__, fcport->port_name);
6537 rval = __qla24xx_parse_gpdb(vha, fcport, pd);
6539 ql_dbg(ql_dbg_mbx, vha, 0x1197, "%s: %8phC done\n",
6540 __func__, fcport->port_name);
6544 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
6549 int __qla24xx_parse_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport,
6550 struct port_database_24xx *pd)
6552 int rval = QLA_SUCCESS;
6554 u8 current_login_state, last_login_state;
6556 if (NVME_TARGET(vha->hw, fcport)) {
6557 current_login_state = pd->current_login_state >> 4;
6558 last_login_state = pd->last_login_state >> 4;
6560 current_login_state = pd->current_login_state & 0xf;
6561 last_login_state = pd->last_login_state & 0xf;
6564 /* Check for logged in state. */
6565 if (current_login_state != PDS_PRLI_COMPLETE) {
6566 ql_dbg(ql_dbg_mbx, vha, 0x119a,
6567 "Unable to verify login-state (%x/%x) for loop_id %x.\n",
6568 current_login_state, last_login_state, fcport->loop_id);
6569 rval = QLA_FUNCTION_FAILED;
6573 if (fcport->loop_id == FC_NO_LOOP_ID ||
6574 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
6575 memcmp(fcport->port_name, pd->port_name, 8))) {
6576 /* We lost the device mid way. */
6577 rval = QLA_NOT_LOGGED_IN;
6581 /* Names are little-endian. */
6582 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
6583 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
6585 /* Get port_id of device. */
6586 fcport->d_id.b.domain = pd->port_id[0];
6587 fcport->d_id.b.area = pd->port_id[1];
6588 fcport->d_id.b.al_pa = pd->port_id[2];
6589 fcport->d_id.b.rsvd_1 = 0;
6591 if (NVME_TARGET(vha->hw, fcport)) {
6592 fcport->port_type = FCT_NVME;
6593 if ((pd->prli_svc_param_word_3[0] & BIT_5) == 0)
6594 fcport->port_type |= FCT_NVME_INITIATOR;
6595 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
6596 fcport->port_type |= FCT_NVME_TARGET;
6597 if ((pd->prli_svc_param_word_3[0] & BIT_3) == 0)
6598 fcport->port_type |= FCT_NVME_DISCOVERY;
6600 /* If not target must be initiator or unknown type. */
6601 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
6602 fcport->port_type = FCT_INITIATOR;
6604 fcport->port_type = FCT_TARGET;
6606 /* Passback COS information. */
6607 fcport->supported_classes = (pd->flags & PDF_CLASS_2) ?
6608 FC_COS_CLASS2 : FC_COS_CLASS3;
6610 if (pd->prli_svc_param_word_3[0] & BIT_7) {
6611 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
6612 fcport->conf_compl_supported = 1;
6620 * qla24xx_gidlist__wait
6621 * NOTE: don't call this routine from DPC thread.
6623 int qla24xx_gidlist_wait(struct scsi_qla_host *vha,
6624 void *id_list, dma_addr_t id_list_dma, uint16_t *entries)
6626 int rval = QLA_FUNCTION_FAILED;
6629 if (!vha->hw->flags.fw_started)
6632 memset(&mc, 0, sizeof(mc));
6633 mc.mb[0] = MBC_GET_ID_LIST;
6634 mc.mb[2] = MSW(id_list_dma);
6635 mc.mb[3] = LSW(id_list_dma);
6636 mc.mb[6] = MSW(MSD(id_list_dma));
6637 mc.mb[7] = LSW(MSD(id_list_dma));
6639 mc.mb[9] = vha->vp_idx;
6641 rval = qla24xx_send_mb_cmd(vha, &mc);
6642 if (rval != QLA_SUCCESS) {
6643 ql_dbg(ql_dbg_mbx, vha, 0x119b,
6644 "%s: fail\n", __func__);
6646 *entries = mc.mb[1];
6647 ql_dbg(ql_dbg_mbx, vha, 0x119c,
6648 "%s: done\n", __func__);
6654 int qla27xx_set_zio_threshold(scsi_qla_host_t *vha, uint16_t value)
6658 mbx_cmd_t *mcp = &mc;
6660 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1200,
6661 "Entered %s\n", __func__);
6663 memset(mcp->mb, 0 , sizeof(mcp->mb));
6664 mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD;
6667 mcp->out_mb = MBX_2 | MBX_1 | MBX_0;
6668 mcp->in_mb = MBX_2 | MBX_0;
6669 mcp->tov = MBX_TOV_SECONDS;
6672 rval = qla2x00_mailbox_command(vha, mcp);
6674 ql_dbg(ql_dbg_mbx, vha, 0x1201, "%s %x\n",
6675 (rval != QLA_SUCCESS) ? "Failed" : "Done", rval);
6680 int qla27xx_get_zio_threshold(scsi_qla_host_t *vha, uint16_t *value)
6684 mbx_cmd_t *mcp = &mc;
6686 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1203,
6687 "Entered %s\n", __func__);
6689 memset(mcp->mb, 0, sizeof(mcp->mb));
6690 mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD;
6692 mcp->out_mb = MBX_1 | MBX_0;
6693 mcp->in_mb = MBX_2 | MBX_0;
6694 mcp->tov = MBX_TOV_SECONDS;
6697 rval = qla2x00_mailbox_command(vha, mcp);
6698 if (rval == QLA_SUCCESS)
6701 ql_dbg(ql_dbg_mbx, vha, 0x1205, "%s %x\n",
6702 (rval != QLA_SUCCESS) ? "Failed" : "Done", rval);
6708 qla2x00_read_sfp_dev(struct scsi_qla_host *vha, char *buf, int count)
6710 struct qla_hw_data *ha = vha->hw;
6711 uint16_t iter, addr, offset;
6712 dma_addr_t phys_addr;
6716 memset(ha->sfp_data, 0, SFP_DEV_SIZE);
6718 phys_addr = ha->sfp_data_dma;
6719 sfp_data = ha->sfp_data;
6722 for (iter = 0; iter < SFP_DEV_SIZE / SFP_BLOCK_SIZE; iter++) {
6724 /* Skip to next device address. */
6729 rval = qla2x00_read_sfp(vha, phys_addr, sfp_data,
6730 addr, offset, SFP_BLOCK_SIZE, BIT_1);
6731 if (rval != QLA_SUCCESS) {
6732 ql_log(ql_log_warn, vha, 0x706d,
6733 "Unable to read SFP data (%x/%x/%x).\n", rval,
6739 if (buf && (c < count)) {
6742 if ((count - c) >= SFP_BLOCK_SIZE)
6743 sz = SFP_BLOCK_SIZE;
6747 memcpy(buf, sfp_data, sz);
6748 buf += SFP_BLOCK_SIZE;
6751 phys_addr += SFP_BLOCK_SIZE;
6752 sfp_data += SFP_BLOCK_SIZE;
6753 offset += SFP_BLOCK_SIZE;
6759 int qla24xx_res_count_wait(struct scsi_qla_host *vha,
6760 uint16_t *out_mb, int out_mb_sz)
6762 int rval = QLA_FUNCTION_FAILED;
6765 if (!vha->hw->flags.fw_started)
6768 memset(&mc, 0, sizeof(mc));
6769 mc.mb[0] = MBC_GET_RESOURCE_COUNTS;
6771 rval = qla24xx_send_mb_cmd(vha, &mc);
6772 if (rval != QLA_SUCCESS) {
6773 ql_dbg(ql_dbg_mbx, vha, 0xffff,
6774 "%s: fail\n", __func__);
6776 if (out_mb_sz <= SIZEOF_IOCB_MB_REG)
6777 memcpy(out_mb, mc.mb, out_mb_sz);
6779 memcpy(out_mb, mc.mb, SIZEOF_IOCB_MB_REG);
6781 ql_dbg(ql_dbg_mbx, vha, 0xffff,
6782 "%s: done\n", __func__);
6788 int qla28xx_secure_flash_update(scsi_qla_host_t *vha, uint16_t opts,
6789 uint16_t region, uint32_t len, dma_addr_t sfub_dma_addr,
6794 mbx_cmd_t *mcp = &mc;
6796 mcp->mb[0] = MBC_SECURE_FLASH_UPDATE;
6798 mcp->mb[2] = region;
6799 mcp->mb[3] = MSW(len);
6800 mcp->mb[4] = LSW(len);
6801 mcp->mb[5] = MSW(sfub_dma_addr);
6802 mcp->mb[6] = LSW(sfub_dma_addr);
6803 mcp->mb[7] = MSW(MSD(sfub_dma_addr));
6804 mcp->mb[8] = LSW(MSD(sfub_dma_addr));
6805 mcp->mb[9] = sfub_len;
6807 MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
6808 mcp->in_mb = MBX_2|MBX_1|MBX_0;
6809 mcp->tov = MBX_TOV_SECONDS;
6811 rval = qla2x00_mailbox_command(vha, mcp);
6813 if (rval != QLA_SUCCESS) {
6814 ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s(%ld): failed rval 0x%x, %x %x %x",
6815 __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1],
6822 int qla2xxx_write_remote_register(scsi_qla_host_t *vha, uint32_t addr,
6827 mbx_cmd_t *mcp = &mc;
6829 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
6830 "Entered %s.\n", __func__);
6832 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
6833 mcp->mb[1] = LSW(addr);
6834 mcp->mb[2] = MSW(addr);
6835 mcp->mb[3] = LSW(data);
6836 mcp->mb[4] = MSW(data);
6837 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
6838 mcp->in_mb = MBX_1|MBX_0;
6839 mcp->tov = MBX_TOV_SECONDS;
6841 rval = qla2x00_mailbox_command(vha, mcp);
6843 if (rval != QLA_SUCCESS) {
6844 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
6845 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6847 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
6848 "Done %s.\n", __func__);
6854 int qla2xxx_read_remote_register(scsi_qla_host_t *vha, uint32_t addr,
6859 mbx_cmd_t *mcp = &mc;
6861 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
6862 "Entered %s.\n", __func__);
6864 mcp->mb[0] = MBC_READ_REMOTE_REG;
6865 mcp->mb[1] = LSW(addr);
6866 mcp->mb[2] = MSW(addr);
6867 mcp->out_mb = MBX_2|MBX_1|MBX_0;
6868 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
6869 mcp->tov = MBX_TOV_SECONDS;
6871 rval = qla2x00_mailbox_command(vha, mcp);
6873 *data = (uint32_t)((((uint32_t)mcp->mb[4]) << 16) | mcp->mb[3]);
6875 if (rval != QLA_SUCCESS) {
6876 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
6877 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
6879 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
6880 "Done %s.\n", __func__);
6887 ql26xx_led_config(scsi_qla_host_t *vha, uint16_t options, uint16_t *led)
6889 struct qla_hw_data *ha = vha->hw;
6891 mbx_cmd_t *mcp = &mc;
6894 if (!IS_QLA2031(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
6895 return QLA_FUNCTION_FAILED;
6897 ql_dbg(ql_dbg_mbx, vha, 0x7070, "Entered %s (options=%x).\n",
6900 mcp->mb[0] = MBC_SET_GET_FC_LED_CONFIG;
6901 mcp->mb[1] = options;
6902 mcp->out_mb = MBX_1|MBX_0;
6903 mcp->in_mb = MBX_1|MBX_0;
6904 if (options & BIT_0) {
6905 if (options & BIT_1) {
6906 mcp->mb[2] = led[2];
6907 mcp->out_mb |= MBX_2;
6909 if (options & BIT_2) {
6910 mcp->mb[3] = led[0];
6911 mcp->out_mb |= MBX_3;
6913 if (options & BIT_3) {
6914 mcp->mb[4] = led[1];
6915 mcp->out_mb |= MBX_4;
6918 mcp->in_mb |= MBX_4|MBX_3|MBX_2;
6920 mcp->tov = MBX_TOV_SECONDS;
6922 rval = qla2x00_mailbox_command(vha, mcp);
6924 ql_dbg(ql_dbg_mbx, vha, 0x7071, "Failed %s %x (mb=%x,%x)\n",
6925 __func__, rval, mcp->mb[0], mcp->mb[1]);
6929 if (options & BIT_0) {
6930 ha->beacon_blink_led = 0;
6931 ql_dbg(ql_dbg_mbx, vha, 0x7072, "Done %s\n", __func__);
6933 led[2] = mcp->mb[2];
6934 led[0] = mcp->mb[3];
6935 led[1] = mcp->mb[4];
6936 ql_dbg(ql_dbg_mbx, vha, 0x7073, "Done %s (led=%x,%x,%x)\n",
6937 __func__, led[0], led[1], led[2]);