1 // SPDX-License-Identifier: GPL-2.0-only
3 * Marvell 88SE64xx/88SE94xx main function
5 * Copyright 2007 Red Hat, Inc.
6 * Copyright 2008 Marvell. <kewei@marvell.com>
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
12 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
14 if (task->lldd_task) {
15 struct mvs_slot_info *slot;
16 slot = task->lldd_task;
17 *tag = slot->slot_tag;
23 void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
25 void *bitmap = mvi->tags;
26 clear_bit(tag, bitmap);
29 void mvs_tag_free(struct mvs_info *mvi, u32 tag)
31 mvs_tag_clear(mvi, tag);
34 void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
36 void *bitmap = mvi->tags;
40 inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
42 unsigned int index, tag;
43 void *bitmap = mvi->tags;
45 index = find_first_zero_bit(bitmap, mvi->tags_num);
47 if (tag >= mvi->tags_num)
48 return -SAS_QUEUE_FULL;
49 mvs_tag_set(mvi, tag);
54 void mvs_tag_init(struct mvs_info *mvi)
57 for (i = 0; i < mvi->tags_num; ++i)
58 mvs_tag_clear(mvi, i);
61 static struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
63 unsigned long i = 0, j = 0, hi = 0;
64 struct sas_ha_struct *sha = dev->port->ha;
65 struct mvs_info *mvi = NULL;
66 struct asd_sas_phy *phy;
68 while (sha->sas_port[i]) {
69 if (sha->sas_port[i] == dev->port) {
70 spin_lock(&sha->sas_port[i]->phy_list_lock);
71 phy = container_of(sha->sas_port[i]->phy_list.next,
72 struct asd_sas_phy, port_phy_el);
73 spin_unlock(&sha->sas_port[i]->phy_list_lock);
75 while (sha->sas_phy[j]) {
76 if (sha->sas_phy[j] == phy)
84 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
85 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
91 static int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
93 unsigned long i = 0, j = 0, n = 0, num = 0;
94 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
95 struct mvs_info *mvi = mvi_dev->mvi_info;
96 struct sas_ha_struct *sha = dev->port->ha;
98 while (sha->sas_port[i]) {
99 if (sha->sas_port[i] == dev->port) {
100 struct asd_sas_phy *phy;
102 spin_lock(&sha->sas_port[i]->phy_list_lock);
103 list_for_each_entry(phy,
104 &sha->sas_port[i]->phy_list, port_phy_el) {
106 while (sha->sas_phy[j]) {
107 if (sha->sas_phy[j] == phy)
111 phyno[n] = (j >= mvi->chip->n_phy) ?
112 (j - mvi->chip->n_phy) : j;
116 spin_unlock(&sha->sas_port[i]->phy_list_lock);
124 struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
128 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
129 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
132 if (mvi->devices[dev_no].taskfileset == reg_set)
133 return &mvi->devices[dev_no];
138 static inline void mvs_free_reg_set(struct mvs_info *mvi,
139 struct mvs_device *dev)
142 mv_printk("device has been free.\n");
145 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
147 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
150 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
151 struct mvs_device *dev)
153 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
155 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
158 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
161 for_each_phy(phy_mask, phy_mask, no) {
164 MVS_CHIP_DISP->phy_reset(mvi, no, hard);
168 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
171 int rc = 0, phy_id = sas_phy->id;
173 struct sas_ha_struct *sha = sas_phy->ha;
174 struct mvs_info *mvi = NULL;
176 while (sha->sas_phy[i]) {
177 if (sha->sas_phy[i] == sas_phy)
181 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
182 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
185 case PHY_FUNC_SET_LINK_RATE:
186 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
189 case PHY_FUNC_HARD_RESET:
190 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
191 if (tmp & PHY_RST_HARD)
193 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
196 case PHY_FUNC_LINK_RESET:
197 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
198 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
201 case PHY_FUNC_DISABLE:
202 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
204 case PHY_FUNC_RELEASE_SPINUP_HOLD:
212 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
213 u32 off_hi, u64 sas_addr)
215 u32 lo = (u32)sas_addr;
216 u32 hi = (u32)(sas_addr>>32);
218 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
219 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
220 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
221 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
224 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i, gfp_t gfp_flags)
226 struct mvs_phy *phy = &mvi->phy[i];
227 struct asd_sas_phy *sas_phy = &phy->sas_phy;
229 if (!phy->phy_attached)
232 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
233 && phy->phy_type & PORT_TYPE_SAS) {
237 sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags);
240 struct sas_phy *sphy = sas_phy->phy;
242 sphy->negotiated_linkrate = sas_phy->linkrate;
243 sphy->minimum_linkrate = phy->minimum_linkrate;
244 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
245 sphy->maximum_linkrate = phy->maximum_linkrate;
246 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
249 if (phy->phy_type & PORT_TYPE_SAS) {
250 struct sas_identify_frame *id;
252 id = (struct sas_identify_frame *)phy->frame_rcvd;
253 id->dev_type = phy->identify.device_type;
254 id->initiator_bits = SAS_PROTOCOL_ALL;
255 id->target_bits = phy->identify.target_port_protocols;
257 /* direct attached SAS device */
258 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
259 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
260 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);
262 } else if (phy->phy_type & PORT_TYPE_SATA) {
265 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
267 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
269 sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags);
272 void mvs_scan_start(struct Scsi_Host *shost)
275 unsigned short core_nr;
276 struct mvs_info *mvi;
277 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
278 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
280 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
282 for (j = 0; j < core_nr; j++) {
283 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
284 for (i = 0; i < mvi->chip->n_phy; ++i)
285 mvs_bytes_dmaed(mvi, i, GFP_KERNEL);
287 mvs_prv->scan_finished = 1;
290 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
292 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
293 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
295 if (mvs_prv->scan_finished == 0)
302 static int mvs_task_prep_smp(struct mvs_info *mvi,
303 struct mvs_task_exec_info *tei)
306 struct sas_ha_struct *sha = mvi->sas;
307 struct sas_task *task = tei->task;
308 struct mvs_cmd_hdr *hdr = tei->hdr;
309 struct domain_device *dev = task->dev;
310 struct asd_sas_port *sas_port = dev->port;
311 struct sas_phy *sphy = dev->phy;
312 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number];
313 struct scatterlist *sg_req, *sg_resp;
314 u32 req_len, resp_len, tag = tei->tag;
317 dma_addr_t buf_tmp_dma;
319 struct mvs_slot_info *slot = &mvi->slot_info[tag];
320 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
323 * DMA-map SMP request, response buffers
325 sg_req = &task->smp_task.smp_req;
326 elem = dma_map_sg(mvi->dev, sg_req, 1, DMA_TO_DEVICE);
329 req_len = sg_dma_len(sg_req);
331 sg_resp = &task->smp_task.smp_resp;
332 elem = dma_map_sg(mvi->dev, sg_resp, 1, DMA_FROM_DEVICE);
337 resp_len = SB_RFB_MAX;
339 /* must be in dwords */
340 if ((req_len & 0x3) || (resp_len & 0x3)) {
346 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
349 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
351 buf_tmp_dma = slot->buf_dma;
353 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
355 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
357 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
359 buf_tmp += MVS_OAF_SZ;
360 buf_tmp_dma += MVS_OAF_SZ;
362 /* region 3: PRD table *********************************** */
365 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
369 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
373 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
374 slot->response = buf_tmp;
375 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
376 if (mvi->flags & MVF_FLAG_SOC)
377 hdr->reserved[0] = 0;
380 * Fill in TX ring and command slot header
382 slot->tx = mvi->tx_prod;
383 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
385 (MVS_PHY_ID << TXQ_PHY_SHIFT));
388 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
389 hdr->tags = cpu_to_le32(tag);
392 /* generate open address frame hdr (first 12 bytes) */
393 /* initiator, SMP, ftype 1h */
394 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
395 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
396 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
397 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
399 /* fill in PRD (scatter/gather) table, if any */
400 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
405 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
408 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
413 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
415 struct ata_queued_cmd *qc = task->uldd_task;
418 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
419 qc->tf.command == ATA_CMD_FPDMA_READ ||
420 qc->tf.command == ATA_CMD_FPDMA_RECV ||
421 qc->tf.command == ATA_CMD_FPDMA_SEND ||
422 qc->tf.command == ATA_CMD_NCQ_NON_DATA) {
431 static int mvs_task_prep_ata(struct mvs_info *mvi,
432 struct mvs_task_exec_info *tei)
434 struct sas_task *task = tei->task;
435 struct domain_device *dev = task->dev;
436 struct mvs_device *mvi_dev = dev->lldd_dev;
437 struct mvs_cmd_hdr *hdr = tei->hdr;
438 struct asd_sas_port *sas_port = dev->port;
439 struct mvs_slot_info *slot;
441 u32 tag = tei->tag, hdr_tag;
444 u8 *buf_cmd, *buf_oaf;
445 dma_addr_t buf_tmp_dma;
446 u32 i, req_len, resp_len;
447 const u32 max_resp_len = SB_RFB_MAX;
449 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
450 mv_dprintk("Have not enough regiset for dev %d.\n",
454 slot = &mvi->slot_info[tag];
455 slot->tx = mvi->tx_prod;
456 del_q = TXQ_MODE_I | tag |
457 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
458 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) |
459 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
460 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
462 if (task->data_dir == DMA_FROM_DEVICE)
463 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
465 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
467 if (task->ata_task.use_ncq)
469 if (dev->sata_dev.class == ATA_DEV_ATAPI) {
470 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
474 hdr->flags = cpu_to_le32(flags);
476 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
477 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
481 hdr->tags = cpu_to_le32(hdr_tag);
483 hdr->data_len = cpu_to_le32(task->total_xfer_len);
486 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
489 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
490 buf_cmd = buf_tmp = slot->buf;
491 buf_tmp_dma = slot->buf_dma;
493 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
495 buf_tmp += MVS_ATA_CMD_SZ;
496 buf_tmp_dma += MVS_ATA_CMD_SZ;
498 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
499 /* used for STP. unused for SATA? */
501 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
503 buf_tmp += MVS_OAF_SZ;
504 buf_tmp_dma += MVS_OAF_SZ;
506 /* region 3: PRD table ********************************************* */
510 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
513 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
518 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
519 slot->response = buf_tmp;
520 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
521 if (mvi->flags & MVF_FLAG_SOC)
522 hdr->reserved[0] = 0;
524 req_len = sizeof(struct host_to_dev_fis);
525 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
526 sizeof(struct mvs_err_info) - i;
528 /* request, response lengths */
529 resp_len = min(resp_len, max_resp_len);
530 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
532 if (likely(!task->ata_task.device_control_reg_update))
533 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
534 /* fill in command FIS and ATAPI CDB */
535 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
536 if (dev->sata_dev.class == ATA_DEV_ATAPI)
537 memcpy(buf_cmd + STP_ATAPI_CMD,
538 task->ata_task.atapi_packet, 16);
540 /* generate open address frame hdr (first 12 bytes) */
541 /* initiator, STP, ftype 1h */
542 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
543 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
544 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
545 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
547 /* fill in PRD (scatter/gather) table, if any */
548 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
550 if (task->data_dir == DMA_FROM_DEVICE)
551 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
552 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
557 static int mvs_task_prep_ssp(struct mvs_info *mvi,
558 struct mvs_task_exec_info *tei, int is_tmf,
559 struct mvs_tmf_task *tmf)
561 struct sas_task *task = tei->task;
562 struct mvs_cmd_hdr *hdr = tei->hdr;
563 struct mvs_port *port = tei->port;
564 struct domain_device *dev = task->dev;
565 struct mvs_device *mvi_dev = dev->lldd_dev;
566 struct asd_sas_port *sas_port = dev->port;
567 struct mvs_slot_info *slot;
569 struct ssp_frame_hdr *ssp_hdr;
571 u8 *buf_cmd, *buf_oaf, fburst = 0;
572 dma_addr_t buf_tmp_dma;
574 u32 resp_len, req_len, i, tag = tei->tag;
575 const u32 max_resp_len = SB_RFB_MAX;
578 slot = &mvi->slot_info[tag];
580 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
581 sas_port->phy_mask) & TXQ_PHY_MASK;
583 slot->tx = mvi->tx_prod;
584 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
585 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
586 (phy_mask << TXQ_PHY_SHIFT));
589 if (task->ssp_task.enable_first_burst) {
594 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
596 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
598 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
599 hdr->tags = cpu_to_le32(tag);
600 hdr->data_len = cpu_to_le32(task->total_xfer_len);
603 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
606 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
607 buf_cmd = buf_tmp = slot->buf;
608 buf_tmp_dma = slot->buf_dma;
610 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
612 buf_tmp += MVS_SSP_CMD_SZ;
613 buf_tmp_dma += MVS_SSP_CMD_SZ;
615 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
617 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
619 buf_tmp += MVS_OAF_SZ;
620 buf_tmp_dma += MVS_OAF_SZ;
622 /* region 3: PRD table ********************************************* */
625 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
629 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
633 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
634 slot->response = buf_tmp;
635 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
636 if (mvi->flags & MVF_FLAG_SOC)
637 hdr->reserved[0] = 0;
639 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
640 sizeof(struct mvs_err_info) - i;
641 resp_len = min(resp_len, max_resp_len);
643 req_len = sizeof(struct ssp_frame_hdr) + 28;
645 /* request, response lengths */
646 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
648 /* generate open address frame hdr (first 12 bytes) */
649 /* initiator, SSP, ftype 1h */
650 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
651 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
652 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
653 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
655 /* fill in SSP frame header (Command Table.SSP frame header) */
656 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
659 ssp_hdr->frame_type = SSP_TASK;
661 ssp_hdr->frame_type = SSP_COMMAND;
663 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
664 HASHED_SAS_ADDR_SIZE);
665 memcpy(ssp_hdr->hashed_src_addr,
666 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
667 ssp_hdr->tag = cpu_to_be16(tag);
669 /* fill in IU for TASK and Command Frame */
670 buf_cmd += sizeof(*ssp_hdr);
671 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
673 if (ssp_hdr->frame_type != SSP_TASK) {
674 buf_cmd[9] = fburst | task->ssp_task.task_attr |
675 (task->ssp_task.task_prio << 3);
676 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd,
677 task->ssp_task.cmd->cmd_len);
679 buf_cmd[10] = tmf->tmf;
684 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
686 tmf->tag_of_task_to_be_managed & 0xff;
692 /* fill in PRD (scatter/gather) table, if any */
693 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
697 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED)))
698 static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
699 struct mvs_tmf_task *tmf, int *pass)
701 struct domain_device *dev = task->dev;
702 struct mvs_device *mvi_dev = dev->lldd_dev;
703 struct mvs_task_exec_info tei;
704 struct mvs_slot_info *slot;
705 u32 tag = 0xdeadbeef, n_elem = 0;
709 struct task_status_struct *tsm = &task->task_status;
711 tsm->resp = SAS_TASK_UNDELIVERED;
712 tsm->stat = SAS_PHY_DOWN;
714 * libsas will use dev->port, should
715 * not call task_done for sata
717 if (dev->dev_type != SAS_SATA_DEV)
718 task->task_done(task);
722 if (DEV_IS_GONE(mvi_dev)) {
724 mv_dprintk("device %d not ready.\n",
727 mv_dprintk("device %016llx not ready.\n",
728 SAS_ADDR(dev->sas_addr));
733 tei.port = dev->port->lldd_port;
734 if (tei.port && !tei.port->port_attached && !tmf) {
735 if (sas_protocol_ata(task->task_proto)) {
736 struct task_status_struct *ts = &task->task_status;
737 mv_dprintk("SATA/STP port %d does not attach"
738 "device.\n", dev->port->id);
739 ts->resp = SAS_TASK_COMPLETE;
740 ts->stat = SAS_PHY_DOWN;
742 task->task_done(task);
745 struct task_status_struct *ts = &task->task_status;
746 mv_dprintk("SAS port %d does not attach"
747 "device.\n", dev->port->id);
748 ts->resp = SAS_TASK_UNDELIVERED;
749 ts->stat = SAS_PHY_DOWN;
750 task->task_done(task);
755 if (!sas_protocol_ata(task->task_proto)) {
756 if (task->num_scatter) {
757 n_elem = dma_map_sg(mvi->dev,
767 n_elem = task->num_scatter;
770 rc = mvs_tag_alloc(mvi, &tag);
774 slot = &mvi->slot_info[tag];
776 task->lldd_task = NULL;
777 slot->n_elem = n_elem;
778 slot->slot_tag = tag;
780 slot->buf = dma_pool_zalloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
787 tei.hdr = &mvi->slot[tag];
790 switch (task->task_proto) {
791 case SAS_PROTOCOL_SMP:
792 rc = mvs_task_prep_smp(mvi, &tei);
794 case SAS_PROTOCOL_SSP:
795 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
797 case SAS_PROTOCOL_SATA:
798 case SAS_PROTOCOL_STP:
799 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
800 rc = mvs_task_prep_ata(mvi, &tei);
803 dev_printk(KERN_ERR, mvi->dev,
804 "unknown sas_task proto: 0x%x\n",
811 mv_dprintk("rc is %x\n", rc);
812 goto err_out_slot_buf;
815 slot->port = tei.port;
816 task->lldd_task = slot;
817 list_add_tail(&slot->entry, &tei.port->list);
818 spin_lock(&task->task_state_lock);
819 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
820 spin_unlock(&task->task_state_lock);
822 mvi_dev->running_req++;
824 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
829 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
831 mvs_tag_free(mvi, tag);
834 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
835 if (!sas_protocol_ata(task->task_proto))
837 dma_unmap_sg(mvi->dev, task->scatter, n_elem,
843 static int mvs_task_exec(struct sas_task *task, gfp_t gfp_flags,
844 struct completion *completion, int is_tmf,
845 struct mvs_tmf_task *tmf)
847 struct mvs_info *mvi = NULL;
850 unsigned long flags = 0;
852 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
854 spin_lock_irqsave(&mvi->lock, flags);
855 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
857 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
860 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
861 (MVS_CHIP_SLOT_SZ - 1));
862 spin_unlock_irqrestore(&mvi->lock, flags);
867 int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags)
869 return mvs_task_exec(task, gfp_flags, NULL, 0, NULL);
872 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
874 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
875 mvs_tag_clear(mvi, slot_idx);
878 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
879 struct mvs_slot_info *slot, u32 slot_idx)
885 if (!sas_protocol_ata(task->task_proto))
887 dma_unmap_sg(mvi->dev, task->scatter,
888 slot->n_elem, task->data_dir);
890 switch (task->task_proto) {
891 case SAS_PROTOCOL_SMP:
892 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
894 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
898 case SAS_PROTOCOL_SATA:
899 case SAS_PROTOCOL_STP:
900 case SAS_PROTOCOL_SSP:
907 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
910 list_del_init(&slot->entry);
911 task->lldd_task = NULL;
914 slot->slot_tag = 0xFFFFFFFF;
915 mvs_slot_free(mvi, slot_idx);
918 static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
920 struct mvs_phy *phy = &mvi->phy[phy_no];
921 struct mvs_port *port = phy->port;
924 for_each_phy(port->wide_port_phymap, j, no) {
926 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
928 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
929 port->wide_port_phymap);
931 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
933 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
939 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
942 struct mvs_phy *phy = &mvi->phy[i];
943 struct mvs_port *port = phy->port;
945 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
946 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
948 phy->phy_attached = 1;
953 if (phy->phy_type & PORT_TYPE_SAS) {
954 port->wide_port_phymap &= ~(1U << i);
955 if (!port->wide_port_phymap)
956 port->port_attached = 0;
957 mvs_update_wideport(mvi, i);
958 } else if (phy->phy_type & PORT_TYPE_SATA)
959 port->port_attached = 0;
961 phy->phy_attached = 0;
962 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
967 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
969 u32 *s = (u32 *) buf;
974 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
975 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
977 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
978 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
980 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
981 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
983 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
984 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
986 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
987 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
992 static u32 mvs_is_sig_fis_received(u32 irq_status)
994 return irq_status & PHYEV_SIG_FIS;
997 static void mvs_sig_remove_timer(struct mvs_phy *phy)
999 if (phy->timer.function)
1000 del_timer(&phy->timer);
1001 phy->timer.function = NULL;
1004 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
1006 struct mvs_phy *phy = &mvi->phy[i];
1007 struct sas_identify_frame *id;
1009 id = (struct sas_identify_frame *)phy->frame_rcvd;
1012 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
1013 phy->phy_status = mvs_is_phy_ready(mvi, i);
1016 if (phy->phy_status) {
1018 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
1020 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1022 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1023 if (phy->phy_type & PORT_TYPE_SATA) {
1024 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1025 if (mvs_is_sig_fis_received(phy->irq_status)) {
1026 mvs_sig_remove_timer(phy);
1027 phy->phy_attached = 1;
1028 phy->att_dev_sas_addr =
1029 i + mvi->id * mvi->chip->n_phy;
1031 sas_phy->oob_mode = SATA_OOB_MODE;
1032 phy->frame_rcvd_size =
1033 sizeof(struct dev_to_host_fis);
1034 mvs_get_d2h_reg(mvi, i, id);
1037 dev_printk(KERN_DEBUG, mvi->dev,
1038 "Phy%d : No sig fis\n", i);
1039 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1040 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1041 tmp | PHYEV_SIG_FIS);
1042 phy->phy_attached = 0;
1043 phy->phy_type &= ~PORT_TYPE_SATA;
1046 } else if (phy->phy_type & PORT_TYPE_SAS
1047 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1048 phy->phy_attached = 1;
1049 phy->identify.device_type =
1050 phy->att_dev_info & PORT_DEV_TYPE_MASK;
1052 if (phy->identify.device_type == SAS_END_DEVICE)
1053 phy->identify.target_port_protocols =
1055 else if (phy->identify.device_type != SAS_PHY_UNUSED)
1056 phy->identify.target_port_protocols =
1059 sas_phy->oob_mode = SAS_OOB_MODE;
1060 phy->frame_rcvd_size =
1061 sizeof(struct sas_identify_frame);
1063 memcpy(sas_phy->attached_sas_addr,
1064 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
1066 if (MVS_CHIP_DISP->phy_work_around)
1067 MVS_CHIP_DISP->phy_work_around(mvi, i);
1069 mv_dprintk("phy %d attach dev info is %x\n",
1070 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
1071 mv_dprintk("phy %d attach sas addr is %llx\n",
1072 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
1075 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
1078 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
1080 struct sas_ha_struct *sas_ha = sas_phy->ha;
1081 struct mvs_info *mvi = NULL; int i = 0, hi;
1082 struct mvs_phy *phy = sas_phy->lldd_phy;
1083 struct asd_sas_port *sas_port = sas_phy->port;
1084 struct mvs_port *port;
1085 unsigned long flags = 0;
1089 while (sas_ha->sas_phy[i]) {
1090 if (sas_ha->sas_phy[i] == sas_phy)
1094 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1095 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
1096 if (i >= mvi->chip->n_phy)
1097 port = &mvi->port[i - mvi->chip->n_phy];
1099 port = &mvi->port[i];
1101 spin_lock_irqsave(&mvi->lock, flags);
1102 port->port_attached = 1;
1104 sas_port->lldd_port = port;
1105 if (phy->phy_type & PORT_TYPE_SAS) {
1106 port->wide_port_phymap = sas_port->phy_mask;
1107 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
1108 mvs_update_wideport(mvi, sas_phy->id);
1110 /* direct attached SAS device */
1111 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
1112 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
1113 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);
1117 spin_unlock_irqrestore(&mvi->lock, flags);
1120 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
1122 struct domain_device *dev;
1123 struct mvs_phy *phy = sas_phy->lldd_phy;
1124 struct mvs_info *mvi = phy->mvi;
1125 struct asd_sas_port *port = sas_phy->port;
1128 while (phy != &mvi->phy[phy_no]) {
1130 if (phy_no >= MVS_MAX_PHYS)
1133 list_for_each_entry(dev, &port->dev_list, dev_list_node)
1134 mvs_do_release_task(phy->mvi, phy_no, dev);
1139 void mvs_port_formed(struct asd_sas_phy *sas_phy)
1141 mvs_port_notify_formed(sas_phy, 1);
1144 void mvs_port_deformed(struct asd_sas_phy *sas_phy)
1146 mvs_port_notify_deformed(sas_phy, 1);
1149 static struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1152 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1153 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) {
1154 mvi->devices[dev].device_id = dev;
1155 return &mvi->devices[dev];
1159 if (dev == MVS_MAX_DEVICES)
1160 mv_printk("max support %d devices, ignore ..\n",
1166 static void mvs_free_dev(struct mvs_device *mvi_dev)
1168 u32 id = mvi_dev->device_id;
1169 memset(mvi_dev, 0, sizeof(*mvi_dev));
1170 mvi_dev->device_id = id;
1171 mvi_dev->dev_type = SAS_PHY_UNUSED;
1172 mvi_dev->dev_status = MVS_DEV_NORMAL;
1173 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1176 static int mvs_dev_found_notify(struct domain_device *dev, int lock)
1178 unsigned long flags = 0;
1180 struct mvs_info *mvi = NULL;
1181 struct domain_device *parent_dev = dev->parent;
1182 struct mvs_device *mvi_device;
1184 mvi = mvs_find_dev_mvi(dev);
1187 spin_lock_irqsave(&mvi->lock, flags);
1189 mvi_device = mvs_alloc_dev(mvi);
1194 dev->lldd_dev = mvi_device;
1195 mvi_device->dev_status = MVS_DEV_NORMAL;
1196 mvi_device->dev_type = dev->dev_type;
1197 mvi_device->mvi_info = mvi;
1198 mvi_device->sas_device = dev;
1199 if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
1201 u8 phy_num = parent_dev->ex_dev.num_phys;
1203 for (phy_id = 0; phy_id < phy_num; phy_id++) {
1204 phy = &parent_dev->ex_dev.ex_phy[phy_id];
1205 if (SAS_ADDR(phy->attached_sas_addr) ==
1206 SAS_ADDR(dev->sas_addr)) {
1207 mvi_device->attached_phy = phy_id;
1212 if (phy_id == phy_num) {
1213 mv_printk("Error: no attached dev:%016llx"
1215 SAS_ADDR(dev->sas_addr),
1216 SAS_ADDR(parent_dev->sas_addr));
1223 spin_unlock_irqrestore(&mvi->lock, flags);
1227 int mvs_dev_found(struct domain_device *dev)
1229 return mvs_dev_found_notify(dev, 1);
1232 static void mvs_dev_gone_notify(struct domain_device *dev)
1234 unsigned long flags = 0;
1235 struct mvs_device *mvi_dev = dev->lldd_dev;
1236 struct mvs_info *mvi;
1239 mv_dprintk("found dev has gone.\n");
1243 mvi = mvi_dev->mvi_info;
1245 spin_lock_irqsave(&mvi->lock, flags);
1247 mv_dprintk("found dev[%d:%x] is gone.\n",
1248 mvi_dev->device_id, mvi_dev->dev_type);
1249 mvs_release_task(mvi, dev);
1250 mvs_free_reg_set(mvi, mvi_dev);
1251 mvs_free_dev(mvi_dev);
1253 dev->lldd_dev = NULL;
1254 mvi_dev->sas_device = NULL;
1256 spin_unlock_irqrestore(&mvi->lock, flags);
1260 void mvs_dev_gone(struct domain_device *dev)
1262 mvs_dev_gone_notify(dev);
1265 static void mvs_task_done(struct sas_task *task)
1267 if (!del_timer(&task->slow_task->timer))
1269 complete(&task->slow_task->completion);
1272 static void mvs_tmf_timedout(struct timer_list *t)
1274 struct sas_task_slow *slow = from_timer(slow, t, timer);
1275 struct sas_task *task = slow->task;
1277 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1278 complete(&task->slow_task->completion);
1281 #define MVS_TASK_TIMEOUT 20
1282 static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1283 void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1286 struct sas_task *task = NULL;
1288 for (retry = 0; retry < 3; retry++) {
1289 task = sas_alloc_slow_task(GFP_KERNEL);
1294 task->task_proto = dev->tproto;
1296 memcpy(&task->ssp_task, parameter, para_len);
1297 task->task_done = mvs_task_done;
1299 task->slow_task->timer.function = mvs_tmf_timedout;
1300 task->slow_task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1301 add_timer(&task->slow_task->timer);
1303 res = mvs_task_exec(task, GFP_KERNEL, NULL, 1, tmf);
1306 del_timer(&task->slow_task->timer);
1307 mv_printk("executing internal task failed:%d\n", res);
1311 wait_for_completion(&task->slow_task->completion);
1312 res = TMF_RESP_FUNC_FAILED;
1313 /* Even TMF timed out, return direct. */
1314 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1315 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1316 mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1321 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1322 task->task_status.stat == SAS_SAM_STAT_GOOD) {
1323 res = TMF_RESP_FUNC_COMPLETE;
1327 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1328 task->task_status.stat == SAS_DATA_UNDERRUN) {
1329 /* no error, but return the number of bytes of
1331 res = task->task_status.residual;
1335 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1336 task->task_status.stat == SAS_DATA_OVERRUN) {
1337 mv_dprintk("blocked task error.\n");
1341 mv_dprintk(" task to dev %016llx response: 0x%x "
1343 SAS_ADDR(dev->sas_addr),
1344 task->task_status.resp,
1345 task->task_status.stat);
1346 sas_free_task(task);
1352 BUG_ON(retry == 3 && task != NULL);
1353 sas_free_task(task);
1357 static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1358 u8 *lun, struct mvs_tmf_task *tmf)
1360 struct sas_ssp_task ssp_task;
1361 if (!(dev->tproto & SAS_PROTOCOL_SSP))
1362 return TMF_RESP_FUNC_ESUPP;
1364 memcpy(ssp_task.LUN, lun, 8);
1366 return mvs_exec_internal_tmf_task(dev, &ssp_task,
1367 sizeof(ssp_task), tmf);
1371 /* Standard mandates link reset for ATA (type 0)
1372 and hard reset for SSP (type 1) , only for RECOVERY */
1373 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1376 struct sas_phy *phy = sas_get_local_phy(dev);
1377 int reset_type = (dev->dev_type == SAS_SATA_DEV ||
1378 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1379 rc = sas_phy_reset(phy, reset_type);
1380 sas_put_local_phy(phy);
1385 /* mandatory SAM-3 */
1386 int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1388 unsigned long flags;
1389 int rc = TMF_RESP_FUNC_FAILED;
1390 struct mvs_tmf_task tmf_task;
1391 struct mvs_device * mvi_dev = dev->lldd_dev;
1392 struct mvs_info *mvi = mvi_dev->mvi_info;
1394 tmf_task.tmf = TMF_LU_RESET;
1395 mvi_dev->dev_status = MVS_DEV_EH;
1396 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1397 if (rc == TMF_RESP_FUNC_COMPLETE) {
1398 spin_lock_irqsave(&mvi->lock, flags);
1399 mvs_release_task(mvi, dev);
1400 spin_unlock_irqrestore(&mvi->lock, flags);
1402 /* If failed, fall-through I_T_Nexus reset */
1403 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1404 mvi_dev->device_id, rc);
1408 int mvs_I_T_nexus_reset(struct domain_device *dev)
1410 unsigned long flags;
1411 int rc = TMF_RESP_FUNC_FAILED;
1412 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1413 struct mvs_info *mvi = mvi_dev->mvi_info;
1415 if (mvi_dev->dev_status != MVS_DEV_EH)
1416 return TMF_RESP_FUNC_COMPLETE;
1418 mvi_dev->dev_status = MVS_DEV_NORMAL;
1419 rc = mvs_debug_I_T_nexus_reset(dev);
1420 mv_printk("%s for device[%x]:rc= %d\n",
1421 __func__, mvi_dev->device_id, rc);
1423 spin_lock_irqsave(&mvi->lock, flags);
1424 mvs_release_task(mvi, dev);
1425 spin_unlock_irqrestore(&mvi->lock, flags);
1429 /* optional SAM-3 */
1430 int mvs_query_task(struct sas_task *task)
1433 struct scsi_lun lun;
1434 struct mvs_tmf_task tmf_task;
1435 int rc = TMF_RESP_FUNC_FAILED;
1437 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1438 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1439 struct domain_device *dev = task->dev;
1440 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1441 struct mvs_info *mvi = mvi_dev->mvi_info;
1443 int_to_scsilun(cmnd->device->lun, &lun);
1444 rc = mvs_find_tag(mvi, task, &tag);
1446 rc = TMF_RESP_FUNC_FAILED;
1450 tmf_task.tmf = TMF_QUERY_TASK;
1451 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1453 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1455 /* The task is still in Lun, release it then */
1456 case TMF_RESP_FUNC_SUCC:
1457 /* The task is not in Lun or failed, reset the phy */
1458 case TMF_RESP_FUNC_FAILED:
1459 case TMF_RESP_FUNC_COMPLETE:
1463 mv_printk("%s:rc= %d\n", __func__, rc);
1467 /* mandatory SAM-3, still need free task/slot info */
1468 int mvs_abort_task(struct sas_task *task)
1470 struct scsi_lun lun;
1471 struct mvs_tmf_task tmf_task;
1472 struct domain_device *dev = task->dev;
1473 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1474 struct mvs_info *mvi;
1475 int rc = TMF_RESP_FUNC_FAILED;
1476 unsigned long flags;
1480 mv_printk("Device has removed\n");
1481 return TMF_RESP_FUNC_FAILED;
1484 mvi = mvi_dev->mvi_info;
1486 spin_lock_irqsave(&task->task_state_lock, flags);
1487 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1488 spin_unlock_irqrestore(&task->task_state_lock, flags);
1489 rc = TMF_RESP_FUNC_COMPLETE;
1492 spin_unlock_irqrestore(&task->task_state_lock, flags);
1493 mvi_dev->dev_status = MVS_DEV_EH;
1494 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1495 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1497 int_to_scsilun(cmnd->device->lun, &lun);
1498 rc = mvs_find_tag(mvi, task, &tag);
1500 mv_printk("No such tag in %s\n", __func__);
1501 rc = TMF_RESP_FUNC_FAILED;
1505 tmf_task.tmf = TMF_ABORT_TASK;
1506 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1508 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1510 /* if successful, clear the task and callback forwards.*/
1511 if (rc == TMF_RESP_FUNC_COMPLETE) {
1513 struct mvs_slot_info *slot;
1515 if (task->lldd_task) {
1516 slot = task->lldd_task;
1517 slot_no = (u32) (slot - mvi->slot_info);
1518 spin_lock_irqsave(&mvi->lock, flags);
1519 mvs_slot_complete(mvi, slot_no, 1);
1520 spin_unlock_irqrestore(&mvi->lock, flags);
1524 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1525 task->task_proto & SAS_PROTOCOL_STP) {
1526 if (SAS_SATA_DEV == dev->dev_type) {
1527 struct mvs_slot_info *slot = task->lldd_task;
1528 u32 slot_idx = (u32)(slot - mvi->slot_info);
1529 mv_dprintk("mvs_abort_task() mvi=%p task=%p "
1530 "slot=%p slot_idx=x%x\n",
1531 mvi, task, slot, slot_idx);
1532 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1533 mvs_slot_task_free(mvi, task, slot, slot_idx);
1534 rc = TMF_RESP_FUNC_COMPLETE;
1540 if (rc != TMF_RESP_FUNC_COMPLETE)
1541 mv_printk("%s:rc= %d\n", __func__, rc);
1545 int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
1548 struct mvs_tmf_task tmf_task;
1550 tmf_task.tmf = TMF_ABORT_TASK_SET;
1551 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1556 int mvs_clear_aca(struct domain_device *dev, u8 *lun)
1558 int rc = TMF_RESP_FUNC_FAILED;
1559 struct mvs_tmf_task tmf_task;
1561 tmf_task.tmf = TMF_CLEAR_ACA;
1562 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1567 int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1569 int rc = TMF_RESP_FUNC_FAILED;
1570 struct mvs_tmf_task tmf_task;
1572 tmf_task.tmf = TMF_CLEAR_TASK_SET;
1573 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1578 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1579 u32 slot_idx, int err)
1581 struct mvs_device *mvi_dev = task->dev->lldd_dev;
1582 struct task_status_struct *tstat = &task->task_status;
1583 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
1584 int stat = SAM_STAT_GOOD;
1587 resp->frame_len = sizeof(struct dev_to_host_fis);
1588 memcpy(&resp->ending_fis[0],
1589 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1590 sizeof(struct dev_to_host_fis));
1591 tstat->buf_valid_size = sizeof(*resp);
1592 if (unlikely(err)) {
1593 if (unlikely(err & CMD_ISS_STPD))
1594 stat = SAS_OPEN_REJECT;
1596 stat = SAS_PROTO_RESPONSE;
1602 static void mvs_set_sense(u8 *buffer, int len, int d_sense,
1603 int key, int asc, int ascq)
1605 memset(buffer, 0, len);
1608 /* Descriptor format */
1610 mv_printk("Length %d of sense buffer too small to "
1611 "fit sense %x:%x:%x", len, key, asc, ascq);
1614 buffer[0] = 0x72; /* Response Code */
1616 buffer[1] = key; /* Sense Key */
1618 buffer[2] = asc; /* ASC */
1620 buffer[3] = ascq; /* ASCQ */
1623 mv_printk("Length %d of sense buffer too small to "
1624 "fit sense %x:%x:%x", len, key, asc, ascq);
1627 buffer[0] = 0x70; /* Response Code */
1629 buffer[2] = key; /* Sense Key */
1631 buffer[7] = 0x0a; /* Additional Sense Length */
1633 buffer[12] = asc; /* ASC */
1635 buffer[13] = ascq; /* ASCQ */
1641 static void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
1642 u8 key, u8 asc, u8 asc_q)
1645 iu->response_data_len = 0;
1646 iu->sense_data_len = 17;
1648 mvs_set_sense(iu->sense_data, 17, 0,
1652 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1655 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1657 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
1658 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
1660 enum mvs_port_type type = PORT_TYPE_SAS;
1662 if (err_dw0 & CMD_ISS_STPD)
1663 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1665 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1667 stat = SAM_STAT_CHECK_CONDITION;
1668 switch (task->task_proto) {
1669 case SAS_PROTOCOL_SSP:
1671 stat = SAS_ABORTED_TASK;
1672 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1673 struct ssp_response_iu *iu = slot->response +
1674 sizeof(struct mvs_err_info);
1675 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1676 sas_ssp_task_response(mvi->dev, task, iu);
1677 stat = SAM_STAT_CHECK_CONDITION;
1679 if (err_dw1 & bit(31))
1680 mv_printk("reuse same slot, retry command.\n");
1683 case SAS_PROTOCOL_SMP:
1684 stat = SAM_STAT_CHECK_CONDITION;
1687 case SAS_PROTOCOL_SATA:
1688 case SAS_PROTOCOL_STP:
1689 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1691 task->ata_task.use_ncq = 0;
1692 stat = SAS_PROTO_RESPONSE;
1693 mvs_sata_done(mvi, task, slot_idx, err_dw0);
1703 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
1705 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1706 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1707 struct sas_task *task = slot->task;
1708 struct mvs_device *mvi_dev = NULL;
1709 struct task_status_struct *tstat;
1710 struct domain_device *dev;
1714 enum exec_status sts;
1716 if (unlikely(!task || !task->lldd_task || !task->dev))
1719 tstat = &task->task_status;
1721 mvi_dev = dev->lldd_dev;
1723 spin_lock(&task->task_state_lock);
1724 task->task_state_flags &=
1725 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1726 task->task_state_flags |= SAS_TASK_STATE_DONE;
1728 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1729 spin_unlock(&task->task_state_lock);
1731 memset(tstat, 0, sizeof(*tstat));
1732 tstat->resp = SAS_TASK_COMPLETE;
1734 if (unlikely(aborted)) {
1735 tstat->stat = SAS_ABORTED_TASK;
1736 if (mvi_dev && mvi_dev->running_req)
1737 mvi_dev->running_req--;
1738 if (sas_protocol_ata(task->task_proto))
1739 mvs_free_reg_set(mvi, mvi_dev);
1741 mvs_slot_task_free(mvi, task, slot, slot_idx);
1745 /* when no device attaching, go ahead and complete by error handling*/
1746 if (unlikely(!mvi_dev || flags)) {
1748 mv_dprintk("port has not device.\n");
1749 tstat->stat = SAS_PHY_DOWN;
1754 * error info record present; slot->response is 32 bit aligned but may
1755 * not be 64 bit aligned, so check for zero in two 32 bit reads
1757 if (unlikely((rx_desc & RXQ_ERR)
1758 && (*((u32 *)slot->response)
1759 || *(((u32 *)slot->response) + 1)))) {
1760 mv_dprintk("port %d slot %d rx_desc %X has error info"
1761 "%016llX.\n", slot->port->sas_port.id, slot_idx,
1762 rx_desc, get_unaligned_le64(slot->response));
1763 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
1764 tstat->resp = SAS_TASK_COMPLETE;
1768 switch (task->task_proto) {
1769 case SAS_PROTOCOL_SSP:
1770 /* hw says status == 0, datapres == 0 */
1771 if (rx_desc & RXQ_GOOD) {
1772 tstat->stat = SAS_SAM_STAT_GOOD;
1773 tstat->resp = SAS_TASK_COMPLETE;
1775 /* response frame present */
1776 else if (rx_desc & RXQ_RSP) {
1777 struct ssp_response_iu *iu = slot->response +
1778 sizeof(struct mvs_err_info);
1779 sas_ssp_task_response(mvi->dev, task, iu);
1781 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION;
1784 case SAS_PROTOCOL_SMP: {
1785 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
1786 tstat->stat = SAS_SAM_STAT_GOOD;
1787 to = kmap_atomic(sg_page(sg_resp));
1788 memcpy(to + sg_resp->offset,
1789 slot->response + sizeof(struct mvs_err_info),
1790 sg_dma_len(sg_resp));
1795 case SAS_PROTOCOL_SATA:
1796 case SAS_PROTOCOL_STP:
1797 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1798 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1803 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION;
1806 if (!slot->port->port_attached) {
1807 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1808 tstat->stat = SAS_PHY_DOWN;
1813 if (mvi_dev && mvi_dev->running_req) {
1814 mvi_dev->running_req--;
1815 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
1816 mvs_free_reg_set(mvi, mvi_dev);
1818 mvs_slot_task_free(mvi, task, slot, slot_idx);
1821 spin_unlock(&mvi->lock);
1822 if (task->task_done)
1823 task->task_done(task);
1825 spin_lock(&mvi->lock);
1830 void mvs_do_release_task(struct mvs_info *mvi,
1831 int phy_no, struct domain_device *dev)
1834 struct mvs_phy *phy;
1835 struct mvs_port *port;
1836 struct mvs_slot_info *slot, *slot2;
1838 phy = &mvi->phy[phy_no];
1842 /* clean cmpl queue in case request is already finished */
1843 mvs_int_rx(mvi, false);
1847 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1848 struct sas_task *task;
1849 slot_idx = (u32) (slot - mvi->slot_info);
1852 if (dev && task->dev != dev)
1855 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1856 slot_idx, slot->slot_tag, task);
1857 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1859 mvs_slot_complete(mvi, slot_idx, 1);
1863 void mvs_release_task(struct mvs_info *mvi,
1864 struct domain_device *dev)
1866 int i, phyno[WIDE_PORT_MAX_PHY], num;
1867 num = mvs_find_dev_phyno(dev, phyno);
1868 for (i = 0; i < num; i++)
1869 mvs_do_release_task(mvi, phyno[i], dev);
1872 static void mvs_phy_disconnected(struct mvs_phy *phy)
1874 phy->phy_attached = 0;
1875 phy->att_dev_info = 0;
1876 phy->att_dev_sas_addr = 0;
1879 static void mvs_work_queue(struct work_struct *work)
1881 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1882 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1883 struct mvs_info *mvi = mwq->mvi;
1884 unsigned long flags;
1885 u32 phy_no = (unsigned long) mwq->data;
1886 struct mvs_phy *phy = &mvi->phy[phy_no];
1887 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1889 spin_lock_irqsave(&mvi->lock, flags);
1890 if (mwq->handler & PHY_PLUG_EVENT) {
1892 if (phy->phy_event & PHY_PLUG_OUT) {
1895 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1896 phy->phy_event &= ~PHY_PLUG_OUT;
1897 if (!(tmp & PHY_READY_MASK)) {
1898 sas_phy_disconnected(sas_phy);
1899 mvs_phy_disconnected(phy);
1900 sas_notify_phy_event(sas_phy,
1901 PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC);
1902 mv_dprintk("phy%d Removed Device\n", phy_no);
1904 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1905 mvs_update_phyinfo(mvi, phy_no, 1);
1906 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
1907 mvs_port_notify_formed(sas_phy, 0);
1908 mv_dprintk("phy%d Attached Device\n", phy_no);
1911 } else if (mwq->handler & EXP_BRCT_CHG) {
1912 phy->phy_event &= ~EXP_BRCT_CHG;
1913 sas_notify_port_event(sas_phy,
1914 PORTE_BROADCAST_RCVD, GFP_ATOMIC);
1915 mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
1917 list_del(&mwq->entry);
1918 spin_unlock_irqrestore(&mvi->lock, flags);
1922 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
1927 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
1931 mwq->handler = handler;
1932 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
1933 list_add_tail(&mwq->entry, &mvi->wq_list);
1934 schedule_delayed_work(&mwq->work_q, HZ * 2);
1941 static void mvs_sig_time_out(struct timer_list *t)
1943 struct mvs_phy *phy = from_timer(phy, t, timer);
1944 struct mvs_info *mvi = phy->mvi;
1947 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
1948 if (&mvi->phy[phy_no] == phy) {
1949 mv_dprintk("Get signature time out, reset phy %d\n",
1950 phy_no+mvi->id*mvi->chip->n_phy);
1951 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
1956 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
1959 struct mvs_phy *phy = &mvi->phy[phy_no];
1961 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
1962 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
1963 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
1964 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
1965 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
1969 * events is port event now ,
1970 * we need check the interrupt status which belongs to per port.
1973 if (phy->irq_status & PHYEV_DCDR_ERR) {
1974 mv_dprintk("phy %d STP decoding error.\n",
1975 phy_no + mvi->id*mvi->chip->n_phy);
1978 if (phy->irq_status & PHYEV_POOF) {
1980 if (!(phy->phy_event & PHY_PLUG_OUT)) {
1981 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
1983 mvs_do_release_task(mvi, phy_no, NULL);
1984 phy->phy_event |= PHY_PLUG_OUT;
1985 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
1986 mvs_handle_event(mvi,
1987 (void *)(unsigned long)phy_no,
1989 ready = mvs_is_phy_ready(mvi, phy_no);
1990 if (ready || dev_sata) {
1991 if (MVS_CHIP_DISP->stp_reset)
1992 MVS_CHIP_DISP->stp_reset(mvi,
1995 MVS_CHIP_DISP->phy_reset(mvi,
1996 phy_no, MVS_SOFT_RESET);
2002 if (phy->irq_status & PHYEV_COMWAKE) {
2003 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
2004 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2005 tmp | PHYEV_SIG_FIS);
2006 if (phy->timer.function == NULL) {
2007 phy->timer.function = mvs_sig_time_out;
2008 phy->timer.expires = jiffies + 5*HZ;
2009 add_timer(&phy->timer);
2012 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2013 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
2014 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2015 if (phy->phy_status) {
2017 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2018 if (phy->phy_type & PORT_TYPE_SATA) {
2019 tmp = MVS_CHIP_DISP->read_port_irq_mask(
2021 tmp &= ~PHYEV_SIG_FIS;
2022 MVS_CHIP_DISP->write_port_irq_mask(mvi,
2025 mvs_update_phyinfo(mvi, phy_no, 0);
2026 if (phy->phy_type & PORT_TYPE_SAS) {
2027 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
2031 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
2032 /* whether driver is going to handle hot plug */
2033 if (phy->phy_event & PHY_PLUG_OUT) {
2034 mvs_port_notify_formed(&phy->sas_phy, 0);
2035 phy->phy_event &= ~PHY_PLUG_OUT;
2038 mv_dprintk("plugin interrupt but phy%d is gone\n",
2039 phy_no + mvi->id*mvi->chip->n_phy);
2041 } else if (phy->irq_status & PHYEV_BROAD_CH) {
2042 mv_dprintk("phy %d broadcast change.\n",
2043 phy_no + mvi->id*mvi->chip->n_phy);
2044 mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
2049 int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
2051 u32 rx_prod_idx, rx_desc;
2054 /* the first dword in the RX ring is special: it contains
2055 * a mirror of the hardware's RX producer index, so that
2056 * we don't have to stall the CPU reading that register.
2057 * The actual RX ring is offset by one dword, due to this.
2059 rx_prod_idx = mvi->rx_cons;
2060 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2061 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
2064 /* The CMPL_Q may come late, read from register and try again
2065 * note: if coalescing is enabled,
2066 * it will need to read from register every time for sure
2068 if (unlikely(mvi->rx_cons == rx_prod_idx))
2069 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2071 if (mvi->rx_cons == rx_prod_idx)
2074 while (mvi->rx_cons != rx_prod_idx) {
2075 /* increment our internal RX consumer pointer */
2076 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2077 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2079 if (likely(rx_desc & RXQ_DONE))
2080 mvs_slot_complete(mvi, rx_desc, 0);
2081 if (rx_desc & RXQ_ATTN) {
2083 } else if (rx_desc & RXQ_ERR) {
2084 if (!(rx_desc & RXQ_DONE))
2085 mvs_slot_complete(mvi, rx_desc, 0);
2086 } else if (rx_desc & RXQ_SLOT_RESET) {
2087 mvs_slot_free(mvi, rx_desc);
2091 if (attn && self_clear)
2092 MVS_CHIP_DISP->int_full(mvi);
2096 int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index,
2097 u8 reg_count, u8 *write_data)
2099 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
2100 struct mvs_info *mvi = mvs_prv->mvi[0];
2102 if (MVS_CHIP_DISP->gpio_write) {
2103 return MVS_CHIP_DISP->gpio_write(mvs_prv, reg_type,
2104 reg_index, reg_count, write_data);