2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
49 #include "mpi/mpi2_type.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 #include "mpi/mpi2_image.h"
60 #include <scsi/scsi.h>
61 #include <scsi/scsi_cmnd.h>
62 #include <scsi/scsi_device.h>
63 #include <scsi/scsi_host.h>
64 #include <scsi/scsi_tcq.h>
65 #include <scsi/scsi_transport_sas.h>
66 #include <scsi/scsi_dbg.h>
67 #include <scsi/scsi_eh.h>
68 #include <linux/pci.h>
69 #include <linux/poll.h>
70 #include <linux/irq_poll.h>
72 #include "mpt3sas_debug.h"
73 #include "mpt3sas_trigger_diag.h"
75 /* driver versioning info */
76 #define MPT3SAS_DRIVER_NAME "mpt3sas"
77 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
78 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
79 #define MPT3SAS_DRIVER_VERSION "28.100.00.00"
80 #define MPT3SAS_MAJOR_VERSION 28
81 #define MPT3SAS_MINOR_VERSION 100
82 #define MPT3SAS_BUILD_VERSION 0
83 #define MPT3SAS_RELEASE_VERSION 00
85 #define MPT2SAS_DRIVER_NAME "mpt2sas"
86 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
87 #define MPT2SAS_DRIVER_VERSION "20.102.00.00"
88 #define MPT2SAS_MAJOR_VERSION 20
89 #define MPT2SAS_MINOR_VERSION 102
90 #define MPT2SAS_BUILD_VERSION 0
91 #define MPT2SAS_RELEASE_VERSION 00
94 * Set MPT3SAS_SG_DEPTH value based on user input.
96 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
97 #define MPT_MIN_PHYS_SEGMENTS 16
98 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
100 #define MCPU_MAX_CHAINS_PER_IO 3
102 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
103 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
105 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
108 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
109 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
111 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
117 #define MPT3SAS_SATA_QUEUE_DEPTH 32
118 #define MPT3SAS_SAS_QUEUE_DEPTH 254
119 #define MPT3SAS_RAID_QUEUE_DEPTH 128
120 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
122 #define MPT3SAS_RAID_MAX_SECTORS 8192
123 #define MPT3SAS_HOST_PAGE_SIZE_4K 12
124 #define MPT3SAS_NVME_QUEUE_DEPTH 128
125 #define MPT_NAME_LENGTH 32 /* generic length of strings */
126 #define MPT_STRING_LENGTH 64
127 #define MPI_FRAME_START_OFFSET 256
128 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/
130 #define MPT_MAX_CALLBACKS 32
132 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
133 /* reserved for issuing internally framed scsi io cmds */
134 #define INTERNAL_SCSIIO_CMDS_COUNT 3
136 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
138 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
140 #define MAX_CHAIN_ELEMT_SZ 16
141 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8
143 #define FW_IMG_HDR_READ_TIMEOUT 15
145 #define IOC_OPERATIONAL_WAIT_COUNT 10
150 #define NVME_PRP_SIZE 8 /* PRP size */
151 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
152 #define NVME_TASK_ABORT_MIN_TIMEOUT 6
153 #define NVME_TASK_ABORT_MAX_TIMEOUT 60
154 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
155 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */
157 struct mpt3sas_nvme_cmd {
166 #define ioc_err(ioc, fmt, ...) \
167 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
168 #define ioc_notice(ioc, fmt, ...) \
169 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
170 #define ioc_warn(ioc, fmt, ...) \
171 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
172 #define ioc_info(ioc, fmt, ...) \
173 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
176 * WarpDrive Specific Log codes
179 #define MPT2_WARPDRIVE_LOGENTRY (0x8002)
180 #define MPT2_WARPDRIVE_LC_SSDT (0x41)
181 #define MPT2_WARPDRIVE_LC_SSDLW (0x43)
182 #define MPT2_WARPDRIVE_LC_SSDLF (0x44)
183 #define MPT2_WARPDRIVE_LC_BRMF (0x4D)
186 * per target private data
188 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
189 #define MPT_TARGET_FLAGS_VOLUME 0x02
190 #define MPT_TARGET_FLAGS_DELETED 0x04
191 #define MPT_TARGET_FASTPATH_IO 0x08
192 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
194 #define SAS2_PCI_DEVICE_B0_REVISION (0x01)
195 #define SAS3_PCI_DEVICE_C0_REVISION (0x02)
197 /* Atlas PCIe Switch Management Port */
198 #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
203 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \
204 "Intel(R) Integrated RAID Module RMS25JB080"
205 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \
206 "Intel(R) Integrated RAID Module RMS25JB040"
207 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \
208 "Intel(R) Integrated RAID Module RMS25KB080"
209 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \
210 "Intel(R) Integrated RAID Module RMS25KB040"
211 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \
212 "Intel(R) Integrated RAID Module RMS25LB040"
213 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \
214 "Intel(R) Integrated RAID Module RMS25LB080"
215 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \
216 "Intel Integrated RAID Module RMS2LL080"
217 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \
218 "Intel Integrated RAID Module RMS2LL040"
219 #define MPT2SAS_INTEL_RS25GB008_BRANDING \
220 "Intel(R) RAID Controller RS25GB008"
221 #define MPT2SAS_INTEL_SSD910_BRANDING \
222 "Intel(R) SSD 910 Series"
224 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \
225 "Intel(R) Integrated RAID Module RMS3JC080"
226 #define MPT3SAS_INTEL_RS3GC008_BRANDING \
227 "Intel(R) RAID Controller RS3GC008"
228 #define MPT3SAS_INTEL_RS3FC044_BRANDING \
229 "Intel(R) RAID Controller RS3FC044"
230 #define MPT3SAS_INTEL_RS3UC080_BRANDING \
231 "Intel(R) RAID Controller RS3UC080"
236 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
237 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
238 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
239 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
240 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
241 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
242 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
243 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
244 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
245 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700
247 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
248 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
249 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
250 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
255 #define MPT2SAS_DELL_BRANDING_SIZE 32
257 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
258 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
259 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
260 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
261 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
262 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
263 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
265 #define MPT3SAS_DELL_12G_HBA_BRANDING \
271 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
272 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
273 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
274 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
275 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
276 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
277 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
279 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
284 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
285 "Cisco 9300-8E 12G SAS HBA"
286 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
287 "Cisco 9300-8i 12G SAS HBA"
288 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
289 "Cisco 12G Modular SAS Pass through Controller"
290 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
291 "UCS C3X60 12G SAS Pass through Controller"
295 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
296 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
297 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
298 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
301 * status bits for ioc->diag_buffer_status
303 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
304 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
305 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
310 #define MPT2SAS_HP_3PAR_SSVID 0x1590
312 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
313 "HP H220 Host Bus Adapter"
314 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
315 "HP H221 Host Bus Adapter"
316 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
317 "HP H222 Host Bus Adapter"
318 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
319 "HP H220i Host Bus Adapter"
320 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
321 "HP H210i Host Bus Adapter"
326 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
327 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
328 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
329 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
330 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
333 * Combined Reply Queue constants,
334 * There are twelve Supplemental Reply Post Host Index Registers
335 * and each register is at offset 0x10 bytes from the previous one.
337 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
338 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
339 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
340 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
342 /* OEM Identifiers */
343 #define MFG10_OEM_ID_INVALID (0x00000000)
344 #define MFG10_OEM_ID_DELL (0x00000001)
345 #define MFG10_OEM_ID_FSC (0x00000002)
346 #define MFG10_OEM_ID_SUN (0x00000003)
347 #define MFG10_OEM_ID_IBM (0x00000004)
350 #define MFG10_GF0_OCE_DISABLED (0x00000001)
351 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
352 #define MFG10_GF0_R10_DISPLAY (0x00000004)
353 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
354 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
356 #define VIRTUAL_IO_FAILED_RETRY (0x32010081)
358 /* OEM Specific Flags will come from OEM specific header files */
359 struct Mpi2ManufacturingPage10_t {
360 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
361 U8 OEMIdentifier; /* 04h */
362 U8 Reserved1; /* 05h */
363 U16 Reserved2; /* 08h */
364 U32 Reserved3; /* 0Ch */
365 U32 GenericFlags0; /* 10h */
366 U32 GenericFlags1; /* 14h */
367 U32 Reserved4; /* 18h */
368 U32 OEMSpecificFlags0; /* 1Ch */
369 U32 OEMSpecificFlags1; /* 20h */
370 U32 Reserved5[18]; /* 24h - 60h*/
374 /* Miscellaneous options */
375 struct Mpi2ManufacturingPage11_t {
376 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
377 __le32 Reserved1; /* 04h */
378 u8 Reserved2; /* 08h */
379 u8 EEDPTagMode; /* 09h */
380 u8 Reserved3; /* 0Ah */
381 u8 Reserved4; /* 0Bh */
382 __le32 Reserved5[8]; /* 0Ch-2Ch */
383 u16 AddlFlags2; /* 2Ch */
384 u8 AddlFlags3; /* 2Eh */
385 u8 Reserved6; /* 2Fh */
386 __le32 Reserved7[7]; /* 30h - 4Bh */
387 u8 NVMeAbortTO; /* 4Ch */
388 u8 Reserved8; /* 4Dh */
389 u16 Reserved9; /* 4Eh */
390 __le32 Reserved10[4]; /* 50h - 60h */
394 * struct MPT3SAS_TARGET - starget private hostdata
395 * @starget: starget object
396 * @sas_address: target sas address
397 * @raid_device: raid_device pointer to access volume data
398 * @handle: device handle
399 * @num_luns: number luns
400 * @flags: MPT_TARGET_FLAGS_XXX flags
401 * @deleted: target flaged for deletion
402 * @tm_busy: target is busy with TM request.
403 * @sas_dev: The sas_device associated with this target
404 * @pcie_dev: The pcie device associated with this target
406 struct MPT3SAS_TARGET {
407 struct scsi_target *starget;
409 struct _raid_device *raid_device;
415 struct _sas_device *sas_dev;
416 struct _pcie_device *pcie_dev;
421 * per device private data
423 #define MPT_DEVICE_FLAGS_INIT 0x01
425 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
426 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
427 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
428 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
431 * struct MPT3SAS_DEVICE - sdev private hostdata
432 * @sas_target: starget private hostdata
434 * @flags: MPT_DEVICE_XXX flags
435 * @configured_lun: lun is configured
436 * @block: device is in SDEV_BLOCK state
437 * @tlr_snoop_check: flag used in determining whether to disable TLR
438 * @eedp_enable: eedp support enable bit
439 * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
440 * @eedp_block_length: block size
441 * @ata_command_pending: SATL passthrough outstanding for device
443 struct MPT3SAS_DEVICE {
444 struct MPT3SAS_TARGET *sas_target;
450 u8 ignore_delay_remove;
451 /* Iopriority Command Handling */
454 * Bug workaround for SATL handling: the mpt2/3sas firmware
455 * doesn't return BUSY or TASK_SET_FULL for subsequent
456 * commands while a SATL pass through is in operation as the
457 * spec requires, it simply does nothing with them until the
458 * pass through completes, causing them possibly to timeout if
459 * the passthrough is a long executing command (like format or
460 * secure erase). This variable allows us to do the right
461 * thing while a SATL command is pending.
463 unsigned long ata_command_pending;
467 #define MPT3_CMD_NOT_USED 0x8000 /* free */
468 #define MPT3_CMD_COMPLETE 0x0001 /* completed */
469 #define MPT3_CMD_PENDING 0x0002 /* pending */
470 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
471 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
474 * struct _internal_cmd - internal commands struct
477 * @reply: reply message pointer
479 * @status: MPT3_CMD_XXX status
480 * @smid: system message id
482 struct _internal_cmd {
484 struct completion done;
494 * struct _sas_device - attached device information
495 * @list: sas device list
496 * @starget: starget object
497 * @sas_address: device sas address
498 * @device_name: retrieved from the SAS IDENTIFY frame.
499 * @handle: device handle
500 * @sas_address_parent: sas address of parent expander or sas host
501 * @enclosure_handle: enclosure handle
502 * @enclosure_logical_id: enclosure logical identifier
503 * @volume_handle: volume handle (valid when hidden raid member)
504 * @volume_wwid: volume unique identifier
505 * @device_info: bitfield provides detailed info about the device
507 * @channel: target channel
508 * @slot: number number
509 * @phy: phy identifier provided in sas device page 0
510 * @responding: used in _scsih_sas_device_mark_responding
511 * @fast_path: fast path feature enable bit
512 * @pfa_led_on: flag for PFA LED status
513 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
515 * @chassis_slot: chassis slot
516 * @is_chassis_slot_valid: chassis slot valid or not
519 struct list_head list;
520 struct scsi_target *starget;
524 u64 sas_address_parent;
525 u16 enclosure_handle;
526 u64 enclosure_logical_id;
537 u8 pend_sas_rphy_add;
540 u8 is_chassis_slot_valid;
541 u8 connector_name[5];
542 struct kref refcount;
545 static inline void sas_device_get(struct _sas_device *s)
547 kref_get(&s->refcount);
550 static inline void sas_device_free(struct kref *r)
552 kfree(container_of(r, struct _sas_device, refcount));
555 static inline void sas_device_put(struct _sas_device *s)
557 kref_put(&s->refcount, sas_device_free);
561 * struct _pcie_device - attached PCIe device information
562 * @list: pcie device list
563 * @starget: starget object
565 * @handle: device handle
566 * @device_info: bitfield provides detailed info about the device
568 * @channel: target channel
570 * @port_num: port number
571 * @responding: used in _scsih_pcie_device_mark_responding
572 * @fast_path: fast path feature enable bit
573 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
575 * @enclosure_handle: enclosure handle
576 * @enclosure_logical_id: enclosure logical identifier
577 * @enclosure_level: The level of device's enclosure from the controller
578 * @connector_name: ASCII value of the Connector's name
579 * @serial_number: pointer of serial number string allocated runtime
580 * @refcount: reference count for deletion
582 struct _pcie_device {
583 struct list_head list;
584 struct scsi_target *starget;
595 u16 enclosure_handle;
596 u64 enclosure_logical_id;
598 u8 connector_name[4];
601 struct kref refcount;
604 * pcie_device_get - Increment the pcie device reference count
606 * @p: pcie_device object
608 * When ever this function called it will increment the
609 * reference count of the pcie device for which this function called.
612 static inline void pcie_device_get(struct _pcie_device *p)
614 kref_get(&p->refcount);
618 * pcie_device_free - Release the pcie device object
621 * Free's the pcie device object. It will be called when reference count
624 static inline void pcie_device_free(struct kref *r)
626 kfree(container_of(r, struct _pcie_device, refcount));
630 * pcie_device_put - Decrement the pcie device reference count
632 * @p: pcie_device object
634 * When ever this function called it will decrement the
635 * reference count of the pcie device for which this function called.
637 * When refernce count reaches to Zero, this will call pcie_device_free to the
638 * pcie_device object.
640 static inline void pcie_device_put(struct _pcie_device *p)
642 kref_put(&p->refcount, pcie_device_free);
645 * struct _raid_device - raid volume link list
646 * @list: sas device list
647 * @starget: starget object
648 * @sdev: scsi device struct (volumes are single lun)
649 * @wwid: unique identifier for the volume
650 * @handle: device handle
651 * @block_size: Block size of the volume
653 * @channel: target channel
654 * @volume_type: the raid level
655 * @device_info: bitfield provides detailed info about the hidden components
656 * @num_pds: number of hidden raid components
657 * @responding: used in _scsih_raid_device_mark_responding
658 * @percent_complete: resync percent complete
659 * @direct_io_enabled: Whether direct io to PDs are allowed or not
660 * @stripe_exponent: X where 2powX is the stripe sz in blocks
661 * @block_exponent: X where 2powX is the block sz in bytes
662 * @max_lba: Maximum number of LBA in the volume
663 * @stripe_sz: Stripe Size of the volume
664 * @device_info: Device info of the volume member disk
665 * @pd_handle: Array of handles of the physical drives for direct I/O in le16
667 #define MPT_MAX_WARPDRIVE_PDS 8
668 struct _raid_device {
669 struct list_head list;
670 struct scsi_target *starget;
671 struct scsi_device *sdev;
681 u8 direct_io_enabled;
687 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
691 * struct _boot_device - boot device info
693 * @channel: sas, raid, or pcie channel
694 * @device: holds pointer for struct _sas_device, struct _raid_device or
695 * struct _pcie_device
697 struct _boot_device {
703 * struct _sas_port - wide/narrow sas port information
704 * @port_list: list of ports belonging to expander
705 * @num_phys: number of phys belonging to this port
706 * @remote_identify: attached device identification
707 * @rphy: sas transport rphy object
708 * @port: sas transport wide/narrow port object
709 * @phy_list: _sas_phy list objects belonging to this port
712 struct list_head port_list;
714 struct sas_identify remote_identify;
715 struct sas_rphy *rphy;
716 struct sas_port *port;
717 struct list_head phy_list;
721 * struct _sas_phy - phy information
722 * @port_siblings: list of phys belonging to a port
723 * @identify: phy identification
724 * @remote_identify: attached device identification
725 * @phy: sas transport phy object
726 * @phy_id: unique phy id
727 * @handle: device handle for this phy
728 * @attached_handle: device handle for attached device
729 * @phy_belongs_to_port: port has been created for this phy
732 struct list_head port_siblings;
733 struct sas_identify identify;
734 struct sas_identify remote_identify;
739 u8 phy_belongs_to_port;
743 * struct _sas_node - sas_host/expander information
744 * @list: list of expanders
745 * @parent_dev: parent device class
746 * @num_phys: number phys belonging to this sas_host/expander
747 * @sas_address: sas address of this sas_host/expander
748 * @handle: handle for this sas_host/expander
749 * @sas_address_parent: sas address of parent expander or sas host
750 * @enclosure_handle: handle for this a member of an enclosure
751 * @device_info: bitwise defining capabilities of this sas_host/expander
752 * @responding: used in _scsih_expander_device_mark_responding
753 * @phy: a list of phys that make up this sas_host/expander
754 * @sas_port_list: list of ports attached to this sas_host/expander
757 struct list_head list;
758 struct device *parent_dev;
762 u64 sas_address_parent;
763 u16 enclosure_handle;
764 u64 enclosure_logical_id;
766 struct _sas_phy *phy;
767 struct list_head sas_port_list;
772 * struct _enclosure_node - enclosure information
773 * @list: list of enclosures
774 * @pg0: enclosure pg0;
776 struct _enclosure_node {
777 struct list_head list;
778 Mpi2SasEnclosurePage0_t pg0;
782 * enum reset_type - reset state
783 * @FORCE_BIG_HAMMER: issue diagnostic reset
784 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
792 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
793 * @pcie_sgl: PCIe native SGL for NVMe devices
794 * @pcie_sgl_dma: physical address
796 struct pcie_sg_list {
798 dma_addr_t pcie_sgl_dma;
802 * struct chain_tracker - firmware chain tracker
803 * @chain_buffer: chain buffer
804 * @chain_buffer_dma: physical address
805 * @tracker_list: list of free request (ioc->free_chain_list)
807 struct chain_tracker {
809 dma_addr_t chain_buffer_dma;
812 struct chain_lookup {
813 struct chain_tracker *chains_per_smid;
814 atomic_t chain_offset;
818 * struct scsiio_tracker - scsi mf request tracker
819 * @smid: system message id
820 * @cb_idx: callback index
821 * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
822 * @chain_list: list of associated firmware chain tracker
823 * @msix_io: IO's msix
825 struct scsiio_tracker {
829 struct pcie_sg_list pcie_sg_list;
830 struct list_head chain_list;
835 * struct request_tracker - firmware request tracker
836 * @smid: system message id
837 * @cb_idx: callback index
838 * @tracker_list: list of free request (ioc->free_list)
840 struct request_tracker {
843 struct list_head tracker_list;
847 * struct _tr_list - target reset list
848 * @handle: device handle
849 * @state: state machine
852 struct list_head list;
858 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
859 * @handle: device handle
862 struct list_head list;
867 * struct _event_ack_list - delayed event acknowledgment list
869 * @EventContext: used to track the event uniquely
871 struct _event_ack_list {
872 struct list_head list;
878 * struct adapter_reply_queue - the reply queue struct
879 * @ioc: per adapter object
880 * @msix_index: msix index into vector table
881 * @vector: irq vector
882 * @reply_post_host_index: head index in the pool where FW completes IO
883 * @reply_post_free: reply post base virt address
884 * @name: the name registered to request_irq()
885 * @busy: isr is actively processing replies on another cpu
886 * @os_irq: irq number
887 * @irqpoll: irq_poll object
888 * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
891 struct adapter_reply_queue {
892 struct MPT3SAS_ADAPTER *ioc;
894 u32 reply_post_host_index;
895 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
896 char name[MPT_NAME_LENGTH];
899 struct irq_poll irqpoll;
900 bool irq_poll_scheduled;
901 bool irq_line_enable;
902 struct list_head list;
905 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
908 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
909 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
910 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
911 dma_addr_t data_out_dma, size_t data_out_sz,
912 dma_addr_t data_in_dma, size_t data_in_sz);
913 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
917 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
918 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
919 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
922 /* To support atomic and non atomic descriptors*/
923 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
925 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
926 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
928 /* IOC Facts and Port Facts converted from little endian to cpu */
929 union mpi3_version_union {
930 MPI2_VERSION_STRUCT Struct;
934 struct mpt3sas_facts {
950 union mpi3_version_union FWVersion;
951 u16 IOCRequestFrameSize;
952 u16 IOCMaxChainSegmentSize;
958 u16 HighPriorityCredit;
959 u16 MaxReplyDescriptorPostQueueDepth;
963 u16 MaxPersistentEntries;
965 u8 CurrentHostPageSize;
968 struct mpt3sas_port_facts {
973 u16 MaxPostedCmdBuffers;
976 struct reply_post_struct {
977 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
978 dma_addr_t reply_post_free_dma;
981 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
983 * struct MPT3SAS_ADAPTER - per adapter struct
985 * @shost: shost object
986 * @id: unique adapter id
987 * @cpu_count: number online cpus
988 * @name: generic ioc string
989 * @tmp_string: tmp string used for logging
990 * @pdev: pci pdev object
991 * @pio_chip: physical io register space
992 * @chip: memory mapped register space
993 * @chip_phys: physical addrss prior to mapping
994 * @logging_level: see mpt3sas_debug.h
995 * @fwfault_debug: debuging FW timeouts
996 * @ir_firmware: IR firmware present
997 * @bars: bitmask of BAR's that must be configured
998 * @mask_interrupts: ignore interrupt
999 * @dma_mask: used to set the consistent dma mask
1000 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
1001 * pci resource handling
1002 * @fault_reset_work_q_name: fw fault work queue
1003 * @fault_reset_work_q: ""
1004 * @fault_reset_work: ""
1005 * @firmware_event_name: fw event work queue
1006 * @firmware_event_thread: ""
1008 * @fw_event_list: list of fw events
1009 * @aen_event_read_flag: event log was read
1010 * @broadcast_aen_busy: broadcast aen waiting to be serviced
1011 * @shost_recovery: host reset in progress
1012 * @ioc_reset_in_progress_lock:
1013 * @ioc_link_reset_in_progress: phy/hard reset in progress
1014 * @ignore_loginfos: ignore loginfos during task management
1015 * @remove_host: flag for when driver unloads, to avoid sending dev resets
1016 * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1017 * @wait_for_discovery_to_complete: flag set at driver load time when
1018 * waiting on reporting devices
1019 * @is_driver_loading: flag set at driver load time
1020 * @port_enable_failed: flag set when port enable has failed
1021 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1022 * @start_scan_failed: means port enable failed, return's the ioc_status
1023 * @msix_enable: flag indicating msix is enabled
1024 * @msix_vector_count: number msix vectors
1025 * @cpu_msix_table: table for mapping cpus to msix index
1026 * @cpu_msix_table_sz: table size
1027 * @total_io_cnt: Gives total IO count, used to load balance the interrupts
1028 * @msix_load_balance: Enables load balancing of interrupts across
1029 * the multiple MSIXs
1030 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1031 * @thresh_hold: Max number of reply descriptors processed
1032 * before updating Host Index
1033 * @scsi_io_cb_idx: shost generated commands
1034 * @tm_cb_idx: task management commands
1035 * @scsih_cb_idx: scsih internal commands
1036 * @transport_cb_idx: transport internal commands
1037 * @ctl_cb_idx: clt internal commands
1038 * @base_cb_idx: base internal commands
1039 * @config_cb_idx: base internal commands
1040 * @tm_tr_cb_idx : device removal target reset handshake
1041 * @tm_tr_volume_cb_idx : volume removal target reset
1048 * @base_add_sg_single: handler for either 32/64 bit sgl's
1049 * @event_type: bits indicating which events to log
1050 * @event_context: unique id for each logged event
1051 * @event_log: event log pointer
1052 * @event_masks: events that are masked
1053 * @facts: static facts data
1054 * @pfacts: static port facts data
1055 * @manu_pg0: static manufacturing page 0
1056 * @manu_pg10: static manufacturing page 10
1057 * @manu_pg11: static manufacturing page 11
1058 * @bios_pg2: static bios page 2
1059 * @bios_pg3: static bios page 3
1060 * @ioc_pg8: static ioc page 8
1061 * @iounit_pg0: static iounit page 0
1062 * @iounit_pg1: static iounit page 1
1063 * @iounit_pg8: static iounit page 8
1064 * @sas_hba: sas host object
1065 * @sas_expander_list: expander object list
1066 * @enclosure_list: enclosure object list
1068 * @sas_device_list: sas device object list
1069 * @sas_device_init_list: sas device object list (used only at init time)
1071 * @pcie_device_list: pcie device object list
1072 * @pcie_device_init_list: pcie device object list (used only at init time)
1073 * @pcie_device_lock:
1074 * @io_missing_delay: time for IO completed by fw when PDR enabled
1075 * @device_missing_delay: time for device missing by fw when PDR enabled
1076 * @sas_id : used for setting volume target IDs
1077 * @pcie_target_id: used for setting pcie target IDs
1078 * @blocking_handles: bitmask used to identify which devices need blocking
1079 * @pd_handles : bitmask for PD handles
1080 * @pd_handles_sz : size of pd_handle bitmask
1081 * @config_page_sz: config page size
1082 * @config_page: reserve memory for config page payload
1084 * @hba_queue_depth: hba request queue depth
1085 * @sge_size: sg element size for either 32/64 bit
1086 * @scsiio_depth: SCSI_IO queue depth
1087 * @request_sz: per request frame size
1088 * @request: pool of request frames
1091 * @scsi_lookup: firmware request tracker list
1092 * @scsi_lookup_lock:
1093 * @free_list: free list of request
1094 * @pending_io_count:
1096 * @chain: pool of chains
1098 * @max_sges_in_main_message: number sg elements in main message
1099 * @max_sges_in_chain_message: number sg elements per chain
1100 * @chains_needed_per_io: max chains per io
1101 * @chain_depth: total chains allocated
1102 * @chain_segment_sz: gives the max number of
1103 * SGEs accommodate on single chain buffer
1104 * @hi_priority_smid:
1107 * @hi_priority_depth:
1115 * @internal_free_list:
1116 * @sense: pool of sense
1119 * @reply_depth: hba reply queue depth:
1120 * @reply_sz: per reply frame size:
1121 * @reply: pool of replys:
1124 * @reply_free_queue_depth: reply free depth
1125 * @reply_free: pool for reply free queue (32 bit addr)
1127 * @reply_free_dma_pool:
1128 * @reply_free_host_index: tail index in pool to insert free replys
1129 * @reply_post_queue_depth: reply post queue depth
1130 * @reply_post_struct: struct for reply_post_free physical & virt address
1131 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1132 * @rdpq_array_enable: rdpq_array support is enabled in the driver
1133 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1134 * is assigned only ones
1135 * @reply_queue_count: number of reply queue's
1136 * @reply_queue_list: link list contaning the reply queue info
1137 * @msix96_vector: 96 MSI-X vector support
1138 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1139 * @delayed_tr_list: target reset link list
1140 * @delayed_tr_volume_list: volume target reset link list
1142 * @delayed_event_ack_list:
1143 * @temp_sensors_count: flag to carry the number of temperature sensors
1144 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1145 * pci resource handling. PCI resource freeing will lead to free
1146 * vital hardware/memory resource, which might be in use by cli/sysfs
1147 * path functions resulting in Null pointer reference followed by kernel
1148 * crash. To avoid the above race condition we use mutex syncrhonization
1149 * which ensures the syncrhonization between cli/sysfs_show path.
1151 struct MPT3SAS_ADAPTER {
1152 struct list_head list;
1153 struct Scsi_Host *shost;
1156 char name[MPT_NAME_LENGTH];
1157 char driver_name[MPT_NAME_LENGTH - 8];
1158 char tmp_string[MPT_STRING_LENGTH];
1159 struct pci_dev *pdev;
1160 Mpi2SystemInterfaceRegs_t __iomem *chip;
1161 phys_addr_t chip_phys;
1169 /* fw fault handler */
1170 char fault_reset_work_q_name[20];
1171 struct workqueue_struct *fault_reset_work_q;
1172 struct delayed_work fault_reset_work;
1174 /* fw event handler */
1175 char firmware_event_name[20];
1176 struct workqueue_struct *firmware_event_thread;
1177 spinlock_t fw_event_lock;
1178 struct list_head fw_event_list;
1181 int aen_event_read_flag;
1182 u8 broadcast_aen_busy;
1183 u16 broadcast_aen_pending;
1185 u8 got_task_abort_from_ioctl;
1187 struct mutex reset_in_progress_mutex;
1188 spinlock_t ioc_reset_in_progress_lock;
1189 u8 ioc_link_reset_in_progress;
1193 u8 pci_error_recovery;
1194 u8 wait_for_discovery_to_complete;
1195 u8 is_driver_loading;
1196 u8 port_enable_failed;
1198 u16 start_scan_failed;
1201 u16 msix_vector_count;
1203 u16 cpu_msix_table_sz;
1204 resource_size_t __iomem **reply_post_host_index;
1205 u32 ioc_reset_count;
1206 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1207 u32 non_operational_loop;
1208 atomic64_t total_io_cnt;
1209 bool msix_load_balance;
1212 /* internal commands, callback index */
1215 u8 transport_cb_idx;
1219 u8 port_enable_cb_idx;
1222 u8 tm_tr_volume_cb_idx;
1223 u8 tm_sas_control_cb_idx;
1224 struct _internal_cmd base_cmds;
1225 struct _internal_cmd port_enable_cmds;
1226 struct _internal_cmd transport_cmds;
1227 struct _internal_cmd scsih_cmds;
1228 struct _internal_cmd tm_cmds;
1229 struct _internal_cmd ctl_cmds;
1230 struct _internal_cmd config_cmds;
1232 MPT_ADD_SGE base_add_sg_single;
1234 /* function ptr for either IEEE or MPI sg elements */
1235 MPT_BUILD_SG_SCMD build_sg_scmd;
1236 MPT_BUILD_SG build_sg;
1237 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1239 u16 hba_mpi_version_belonged;
1241 /* function ptr for MPI sg elements only */
1242 MPT_BUILD_SG build_sg_mpi;
1243 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1245 /* function ptr for NVMe PRP elements only */
1246 NVME_BUILD_PRP build_nvme_prp;
1249 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1252 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1254 u8 tm_custom_handling;
1255 u8 nvme_abort_timeout;
1258 /* static config pages */
1259 struct mpt3sas_facts facts;
1260 struct mpt3sas_port_facts *pfacts;
1261 Mpi2ManufacturingPage0_t manu_pg0;
1262 struct Mpi2ManufacturingPage10_t manu_pg10;
1263 struct Mpi2ManufacturingPage11_t manu_pg11;
1264 Mpi2BiosPage2_t bios_pg2;
1265 Mpi2BiosPage3_t bios_pg3;
1266 Mpi2IOCPage8_t ioc_pg8;
1267 Mpi2IOUnitPage0_t iounit_pg0;
1268 Mpi2IOUnitPage1_t iounit_pg1;
1269 Mpi2IOUnitPage8_t iounit_pg8;
1271 struct _boot_device req_boot_device;
1272 struct _boot_device req_alt_boot_device;
1273 struct _boot_device current_boot_device;
1275 /* sas hba, expander, and device list */
1276 struct _sas_node sas_hba;
1277 struct list_head sas_expander_list;
1278 struct list_head enclosure_list;
1279 spinlock_t sas_node_lock;
1280 struct list_head sas_device_list;
1281 struct list_head sas_device_init_list;
1282 spinlock_t sas_device_lock;
1283 struct list_head pcie_device_list;
1284 struct list_head pcie_device_init_list;
1285 spinlock_t pcie_device_lock;
1287 struct list_head raid_device_list;
1288 spinlock_t raid_device_lock;
1289 u8 io_missing_delay;
1290 u16 device_missing_delay;
1294 void *blocking_handles;
1298 void *pend_os_device_add;
1299 u16 pend_os_device_add_sz;
1304 dma_addr_t config_page_dma;
1307 /* scsiio request */
1308 u16 hba_queue_depth;
1313 dma_addr_t request_dma;
1315 struct pcie_sg_list *pcie_sg_lookup;
1316 spinlock_t scsi_lookup_lock;
1317 int pending_io_count;
1318 wait_queue_head_t reset_wq;
1321 struct dma_pool *pcie_sgl_dma_pool;
1322 /* Host Page Size */
1326 struct chain_lookup *chain_lookup;
1327 struct list_head free_chain_list;
1328 struct dma_pool *chain_dma_pool;
1330 u16 max_sges_in_main_message;
1331 u16 max_sges_in_chain_message;
1332 u16 chains_needed_per_io;
1334 u16 chain_segment_sz;
1335 u16 chains_per_prp_buffer;
1337 /* hi-priority queue */
1338 u16 hi_priority_smid;
1340 dma_addr_t hi_priority_dma;
1341 u16 hi_priority_depth;
1342 struct request_tracker *hpr_lookup;
1343 struct list_head hpr_free_list;
1345 /* internal queue */
1348 dma_addr_t internal_dma;
1350 struct request_tracker *internal_lookup;
1351 struct list_head internal_free_list;
1355 dma_addr_t sense_dma;
1356 struct dma_pool *sense_dma_pool;
1361 dma_addr_t reply_dma;
1362 u32 reply_dma_max_address;
1363 u32 reply_dma_min_address;
1364 struct dma_pool *reply_dma_pool;
1366 /* reply free queue */
1367 u16 reply_free_queue_depth;
1369 dma_addr_t reply_free_dma;
1370 struct dma_pool *reply_free_dma_pool;
1371 u32 reply_free_host_index;
1373 /* reply post queue */
1374 u16 reply_post_queue_depth;
1375 struct reply_post_struct *reply_post;
1376 u8 rdpq_array_capable;
1377 u8 rdpq_array_enable;
1378 u8 rdpq_array_enable_assigned;
1379 struct dma_pool *reply_post_free_dma_pool;
1380 struct dma_pool *reply_post_free_array_dma_pool;
1381 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1382 dma_addr_t reply_post_free_array_dma;
1383 u8 reply_queue_count;
1384 struct list_head reply_queue_list;
1386 u8 combined_reply_queue;
1387 u8 combined_reply_index_count;
1388 /* reply post register index */
1389 resource_size_t **replyPostRegisterIndex;
1391 struct list_head delayed_tr_list;
1392 struct list_head delayed_tr_volume_list;
1393 struct list_head delayed_sc_list;
1394 struct list_head delayed_event_ack_list;
1395 u8 temp_sensors_count;
1396 struct mutex pci_access_mutex;
1398 /* diag buffer support */
1399 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1400 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1401 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1402 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1403 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1404 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1405 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1406 u32 ring_buffer_offset;
1409 u8 is_mcpu_endpoint;
1411 u8 mfg_pg10_hide_flag;
1413 spinlock_t diag_trigger_lock;
1414 u8 diag_trigger_active;
1415 BASE_READ_REG base_readl;
1416 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1417 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1418 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1419 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1420 void *device_remove_in_progress;
1421 u16 device_remove_in_progress_sz;
1424 PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1428 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1432 /* base shared API */
1433 extern struct list_head mpt3sas_ioc_list;
1434 extern char driver_name[MPT_NAME_LENGTH];
1435 /* spinlock on list operations over IOCs
1436 * Case: when multiple warpdrive cards(IOCs) are in use
1437 * Each IOC will added to the ioc list structure on initialization.
1438 * Watchdog threads run at regular intervals to check IOC for any
1439 * fault conditions which will trigger the dead_ioc thread to
1440 * deallocate pci resource, resulting deleting the IOC netry from list,
1441 * this deletion need to protected by spinlock to enusre that
1442 * ioc removal is syncrhonized, if not synchronized it might lead to
1443 * list_del corruption as the ioc list is traversed in cli path.
1445 extern spinlock_t gioc_lock;
1447 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1448 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1450 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1451 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1452 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1453 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1454 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1455 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1456 enum reset_type type);
1458 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1459 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1460 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1462 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1463 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1464 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
1466 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1468 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1470 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1471 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1472 /* hi-priority queue */
1473 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1474 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1475 struct scsi_cmnd *scmd);
1476 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1477 struct scsiio_tracker *st);
1479 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1480 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1481 void mpt3sas_base_initialize_callback_handler(void);
1482 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1483 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1485 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1487 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1488 u8 msix_index, u32 reply);
1489 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1492 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1494 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1495 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1496 Mpi2SasIoUnitControlReply_t *mpi_reply,
1497 Mpi2SasIoUnitControlRequest_t *mpi_request);
1498 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1499 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1501 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1504 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1506 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1507 u16 device_missing_delay, u8 io_missing_delay);
1509 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1512 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1514 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1515 u8 status, void *mpi_request, int sz);
1516 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1518 /* scsih shared API */
1519 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1521 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1523 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1524 void mpt3sas_scsih_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1525 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1527 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun,
1528 u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method);
1529 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1530 u64 lun, u8 type, u16 smid_task, u16 msix_task,
1531 u8 timeout, u8 tr_method);
1533 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1534 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1535 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1536 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1538 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1541 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1542 struct MPT3SAS_ADAPTER *ioc, u16 handle);
1543 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1544 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1545 struct _sas_device *mpt3sas_get_sdev_by_addr(
1546 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1547 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1548 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1549 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1551 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1554 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1555 struct _raid_device *
1556 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1558 /* config shared API */
1559 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1561 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1563 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1564 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1565 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1566 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1568 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1569 Mpi2ConfigReply_t *mpi_reply,
1570 struct Mpi2ManufacturingPage10_t *config_page);
1572 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1573 Mpi2ConfigReply_t *mpi_reply,
1574 struct Mpi2ManufacturingPage11_t *config_page);
1575 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1576 Mpi2ConfigReply_t *mpi_reply,
1577 struct Mpi2ManufacturingPage11_t *config_page);
1579 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1580 *mpi_reply, Mpi2BiosPage2_t *config_page);
1581 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1582 *mpi_reply, Mpi2BiosPage3_t *config_page);
1583 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1584 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1585 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1586 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1587 u32 form, u32 handle);
1588 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1589 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1590 u32 form, u32 handle);
1591 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1592 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1593 u32 form, u32 handle);
1594 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1595 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1596 u32 form, u32 handle);
1597 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1598 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1600 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1601 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1602 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1603 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1604 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1605 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1606 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1607 *mpi_reply, Mpi2IOUnitPage8_t *config_page);
1608 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1609 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1611 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1612 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1614 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1615 *mpi_reply, Mpi2IOCPage8_t *config_page);
1616 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1617 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1618 u32 form, u32 handle);
1619 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1620 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1621 u32 phy_number, u16 handle);
1622 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1623 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1624 u32 form, u32 handle);
1625 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1626 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1627 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1628 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1629 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1630 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1632 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1634 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1635 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1636 u32 handle, u16 sz);
1637 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1638 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1639 u32 form, u32 form_specific);
1640 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1641 u16 *volume_handle);
1642 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1643 u16 volume_handle, u64 *wwid);
1645 /* ctl shared API */
1646 extern struct device_attribute *mpt3sas_host_attrs[];
1647 extern struct device_attribute *mpt3sas_dev_attrs[];
1648 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1649 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1650 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1652 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1653 void mpt3sas_ctl_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1654 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1655 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1656 u8 msix_index, u32 reply);
1657 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1658 Mpi2EventNotificationReply_t *mpi_reply);
1660 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1661 u8 bits_to_register);
1662 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1665 /* transport shared API */
1666 extern struct scsi_transport_template *mpt3sas_transport_template;
1667 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1669 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1670 u16 handle, u64 sas_address);
1671 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1672 u64 sas_address_parent);
1673 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1674 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1675 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1676 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1677 struct device *parent_dev);
1678 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1679 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1680 extern struct sas_function_template mpt3sas_transport_functions;
1681 extern struct scsi_transport_template *mpt3sas_transport_template;
1682 /* trigger data externs */
1683 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1684 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1685 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1686 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1687 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1688 u32 tigger_bitmask);
1689 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1690 u16 log_entry_qualifier);
1691 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1693 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1696 /* warpdrive APIs */
1697 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1698 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1699 struct _raid_device *raid_device);
1701 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1702 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
1704 /* NCQ Prio Handling Check */
1705 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1707 #endif /* MPT3SAS_BASE_H_INCLUDED */