1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2009-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
10 * This program is free software; you can redistribute it and/or *
11 * modify it under the terms of version 2 of the GNU General *
12 * Public License as published by the Free Software Foundation. *
13 * This program is distributed in the hope that it will be useful. *
14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
18 * TO BE LEGALLY INVALID. See the GNU General Public License for *
19 * more details, a copy of which can be found in the file COPYING *
20 * included with this package. *
21 *******************************************************************/
23 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100
24 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000
25 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10
26 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000
27 #define LPFC_RPI_LOW_WATER_MARK 10
29 #define LPFC_UNREG_FCF 1
30 #define LPFC_SKIP_UNREG_FCF 0
32 /* Amount of time in seconds for waiting FCF rediscovery to complete */
33 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */
35 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
36 #define LPFC_NEMBED_MBOX_SGL_CNT 254
38 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */
39 #define LPFC_HBA_IO_CHAN_MIN 0
40 #define LPFC_HBA_IO_CHAN_MAX 32
41 #define LPFC_FCP_IO_CHAN_DEF 4
42 #define LPFC_NVME_IO_CHAN_DEF 0
44 /* Common buffer size to accomidate SCSI and NVME IO buffers */
45 #define LPFC_COMMON_IO_BUF_SZ 768
47 /* Number of channels used for Flash Optimized Fabric (FOF) operations */
49 #define LPFC_FOF_IO_CHAN_NUM 1
52 * Provide the default FCF Record attributes used by the driver
53 * when nonFIP mode is configured and there is no other default
54 * FCF Record attributes.
56 #define LPFC_FCOE_FCF_DEF_INDEX 0
57 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
58 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
60 #define LPFC_FCOE_NULL_VID 0xFFF
61 #define LPFC_FCOE_IGNORE_VID 0xFFFF
63 /* First 3 bytes of default FCF MAC is specified by FC_MAP */
64 #define LPFC_FCOE_FCF_MAC3 0xFF
65 #define LPFC_FCOE_FCF_MAC4 0xFF
66 #define LPFC_FCOE_FCF_MAC5 0xFE
67 #define LPFC_FCOE_FCF_MAP0 0x0E
68 #define LPFC_FCOE_FCF_MAP1 0xFC
69 #define LPFC_FCOE_FCF_MAP2 0x00
70 #define LPFC_FCOE_MAX_RCV_SIZE 0x800
71 #define LPFC_FCOE_FKA_ADV_PER 0
72 #define LPFC_FCOE_FIP_PRIORITY 0x80
74 #define sli4_sid_from_fc_hdr(fc_hdr) \
75 ((fc_hdr)->fh_s_id[0] << 16 | \
76 (fc_hdr)->fh_s_id[1] << 8 | \
79 #define sli4_did_from_fc_hdr(fc_hdr) \
80 ((fc_hdr)->fh_d_id[0] << 16 | \
81 (fc_hdr)->fh_d_id[1] << 8 | \
84 #define sli4_fctl_from_fc_hdr(fc_hdr) \
85 ((fc_hdr)->fh_f_ctl[0] << 16 | \
86 (fc_hdr)->fh_f_ctl[1] << 8 | \
87 (fc_hdr)->fh_f_ctl[2])
89 #define sli4_type_from_fc_hdr(fc_hdr) \
92 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000
94 #define INT_FW_UPGRADE 0
95 #define RUN_FW_UPGRADE 1
97 enum lpfc_sli4_queue_type {
109 /* The queue sub-type defines the functional purpose of the queue */
110 enum lpfc_sli4_queue_subtype {
123 struct lpfc_eqe *eqe;
124 struct lpfc_cqe *cqe;
125 struct lpfc_mcqe *mcqe;
126 struct lpfc_wcqe_complete *wcqe_complete;
127 struct lpfc_wcqe_release *wcqe_release;
128 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
129 struct lpfc_rcqe_complete *rcqe_complete;
130 struct lpfc_mqe *mqe;
132 union lpfc_wqe128 *wqe128;
133 struct lpfc_rqe *rqe;
138 uint16_t entry_count; /* Current number of RQ slots */
139 uint16_t buffer_count; /* Current number of buffers posted */
140 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */
141 /* Callback for HBQ buffer allocation */
142 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *);
143 /* Callback for HBQ buffer free */
144 void (*rqb_free_buffer)(struct lpfc_hba *,
145 struct rqb_dmabuf *);
149 struct list_head list;
150 struct list_head wq_list;
151 struct list_head wqfull_list;
152 enum lpfc_sli4_queue_type type;
153 enum lpfc_sli4_queue_subtype subtype;
154 struct lpfc_hba *phba;
155 struct list_head child_list;
156 struct list_head page_list;
157 struct list_head sgl_list;
158 uint32_t entry_count; /* Number of entries to support on the queue */
159 uint32_t entry_size; /* Size of each queue entry. */
160 uint32_t entry_repost; /* Count of entries before doorbell is rung */
161 #define LPFC_EQ_REPOST 8
162 #define LPFC_MQ_REPOST 8
163 #define LPFC_CQ_REPOST 64
164 #define LPFC_RQ_REPOST 64
165 #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 /* For WQs */
166 uint32_t queue_id; /* Queue ID assigned by the hardware */
167 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */
168 uint32_t host_index; /* The host's index for putting or getting */
169 uint32_t hba_index; /* The last known hba index for get or put */
171 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */
172 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */
175 uint16_t page_count; /* Number of pages allocated for this queue */
176 uint16_t page_size; /* size of page allocated for this queue */
177 #define LPFC_EXPANDED_PAGE_SIZE 16384
178 #define LPFC_DEFAULT_PAGE_SIZE 4096
179 uint16_t chann; /* IO channel this queue is associated with */
181 #define LPFC_DB_RING_FORMAT 0x01
182 #define LPFC_DB_LIST_FORMAT 0x02
184 #define HBA_NVMET_WQFULL 0x1 /* We hit WQ Full condition for NVMET */
185 void __iomem *db_regaddr;
188 void __iomem *dpp_regaddr;
195 /* defines for EQ stats */
196 #define EQ_max_eqe q_cnt_1
197 #define EQ_no_entry q_cnt_2
198 #define EQ_cqe_cnt q_cnt_3
199 #define EQ_processed q_cnt_4
201 /* defines for CQ stats */
202 #define CQ_mbox q_cnt_1
203 #define CQ_max_cqe q_cnt_1
204 #define CQ_release_wqe q_cnt_2
205 #define CQ_xri_aborted q_cnt_3
206 #define CQ_wq q_cnt_4
208 /* defines for WQ stats */
209 #define WQ_overflow q_cnt_1
210 #define WQ_posted q_cnt_4
212 /* defines for RQ stats */
213 #define RQ_no_posted_buf q_cnt_1
214 #define RQ_no_buf_found q_cnt_2
215 #define RQ_buf_posted q_cnt_3
216 #define RQ_rcv_buf q_cnt_4
218 struct work_struct irqwork;
219 struct work_struct spwork;
221 uint64_t isr_timestamp;
223 struct lpfc_queue *assoc_qp;
224 union sli4_qe qe[1]; /* array to index entries (must be last) */
227 struct lpfc_sli4_link {
234 uint16_t logical_speed;
238 struct lpfc_fcf_rec {
239 uint8_t fabric_name[8];
240 uint8_t switch_name[8];
247 #define BOOT_ENABLE 0x01
248 #define RECORD_VALID 0x02
251 struct lpfc_fcf_pri_rec {
253 #define LPFC_FCF_ON_PRI_LIST 0x0001
254 #define LPFC_FCF_FLOGI_FAILED 0x0002
259 struct lpfc_fcf_pri {
260 struct list_head list;
261 struct lpfc_fcf_pri_rec fcf_rec;
265 * Maximum FCF table index, it is for driver internal book keeping, it
266 * just needs to be no less than the supported HBA's FCF table size.
268 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32
273 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */
274 #define FCF_REGISTERED 0x02 /* FCF registered with FW */
275 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */
276 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */
277 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */
278 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */
279 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */
280 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC)
281 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */
282 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */
283 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */
284 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT)
285 uint16_t fcf_redisc_attempted;
287 uint32_t eligible_fcf_cnt;
288 struct lpfc_fcf_rec current_rec;
289 struct lpfc_fcf_rec failover_rec;
290 struct list_head fcf_pri_list;
291 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX];
292 uint32_t current_fcf_scan_pri;
293 struct timer_list redisc_wait;
294 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */
298 #define LPFC_REGION23_SIGNATURE "RG23"
299 #define LPFC_REGION23_VERSION 1
300 #define LPFC_REGION23_LAST_REC 0xff
301 #define DRIVER_SPECIFIC_TYPE 0xA2
302 #define LINUX_DRIVER_ID 0x20
303 #define PORT_STE_TYPE 0x1
305 struct lpfc_fip_param_hdr {
307 #define FCOE_PARAM_TYPE 0xA0
309 #define FCOE_PARAM_LENGTH 2
310 uint8_t parm_version;
311 #define FIPP_VERSION 0x01
313 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6
314 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3
315 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags
316 #define FIPP_MODE_ON 0x1
317 #define FIPP_MODE_OFF 0x0
318 #define FIPP_VLAN_VALID 0x1
321 struct lpfc_fcoe_params {
328 struct lpfc_fcf_conn_hdr {
330 #define FCOE_CONN_TBL_TYPE 0xA1
331 uint8_t length; /* words */
335 struct lpfc_fcf_conn_rec {
337 #define FCFCNCT_VALID 0x0001
338 #define FCFCNCT_BOOT 0x0002
339 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */
340 #define FCFCNCT_FBNM_VALID 0x0008
341 #define FCFCNCT_SWNM_VALID 0x0010
342 #define FCFCNCT_VLAN_VALID 0x0020
343 #define FCFCNCT_AM_VALID 0x0040
344 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */
345 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */
348 uint8_t fabric_name[8];
349 uint8_t switch_name[8];
352 struct lpfc_fcf_conn_entry {
353 struct list_head list;
354 struct lpfc_fcf_conn_rec conn_rec;
358 * Define the host's bootstrap mailbox. This structure contains
359 * the member attributes needed to create, use, and destroy the
360 * bootstrap mailbox region.
362 * The macro definitions for the bmbx data structure are defined
363 * in lpfc_hw4.h with the register definition.
366 struct lpfc_dmabuf *dmabuf;
367 struct dma_address dma_address;
373 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
375 #define LPFC_EQE_SIZE_4B 4
376 #define LPFC_EQE_SIZE_16B 16
377 #define LPFC_CQE_SIZE 16
378 #define LPFC_WQE_SIZE 64
379 #define LPFC_WQE128_SIZE 128
380 #define LPFC_MQE_SIZE 256
381 #define LPFC_RQE_SIZE 8
383 #define LPFC_EQE_DEF_COUNT 1024
384 #define LPFC_CQE_DEF_COUNT 1024
385 #define LPFC_CQE_EXP_COUNT 4096
386 #define LPFC_WQE_DEF_COUNT 256
387 #define LPFC_WQE_EXP_COUNT 1024
388 #define LPFC_MQE_DEF_COUNT 16
389 #define LPFC_RQE_DEF_COUNT 512
391 #define LPFC_QUEUE_NOARM false
392 #define LPFC_QUEUE_REARM true
396 * SLI4 CT field defines
398 #define SLI4_CT_RPI 0
399 #define SLI4_CT_VPI 1
400 #define SLI4_CT_VFI 2
401 #define SLI4_CT_FCFI 3
404 * SLI4 specific data structures
406 struct lpfc_max_cfg_param {
428 /* SLI4 HBA multi-fcp queue handler struct */
429 #define LPFC_SLI4_HANDLER_NAME_SZ 16
430 struct lpfc_hba_eq_hdl {
432 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ];
433 struct lpfc_hba *phba;
434 atomic_t hba_eq_in_use;
435 struct cpumask *cpumask;
436 /* CPU affinitsed to or 0xffffffff if multiple */
438 #define LPFC_MULTI_CPU_AFFINITY 0xffffffff
441 /*BB Credit recovery value*/
442 struct lpfc_bbscn_params {
444 #define lpfc_bbscn_min_SHIFT 0
445 #define lpfc_bbscn_min_MASK 0x0000000F
446 #define lpfc_bbscn_min_WORD word0
447 #define lpfc_bbscn_max_SHIFT 4
448 #define lpfc_bbscn_max_MASK 0x0000000F
449 #define lpfc_bbscn_max_WORD word0
450 #define lpfc_bbscn_def_SHIFT 8
451 #define lpfc_bbscn_def_MASK 0x0000000F
452 #define lpfc_bbscn_def_WORD word0
455 /* Port Capabilities for SLI4 Parameters */
456 struct lpfc_pc_sli4_params {
461 uint32_t featurelevel_1;
462 uint32_t featurelevel_2;
463 uint32_t proto_types;
464 #define LPFC_SLI4_PROTO_FCOE 0x0000001
465 #define LPFC_SLI4_PROTO_FC 0x0000002
466 #define LPFC_SLI4_PROTO_NIC 0x0000004
467 #define LPFC_SLI4_PROTO_ISCSI 0x0000008
468 #define LPFC_SLI4_PROTO_RDMA 0x0000010
469 uint32_t sge_supp_len;
471 uint32_t rq_db_window;
472 uint32_t loopbk_scope;
473 uint32_t oas_supported;
474 uint32_t eq_pages_max;
476 uint32_t cq_pages_max;
478 uint32_t mq_pages_max;
480 uint32_t mq_elem_cnt;
481 uint32_t wq_pages_max;
483 uint32_t rq_pages_max;
485 uint32_t hdr_pages_max;
487 uint32_t hdr_pp_align;
488 uint32_t sgl_pages_max;
489 uint32_t sgl_pp_align;
498 #define LPFC_WQ_SZ64_SUPPORT 1
499 #define LPFC_WQ_SZ128_SUPPORT 2
503 #define LPFC_CQ_4K_PAGE_SZ 0x1
504 #define LPFC_CQ_16K_PAGE_SZ 0x4
505 #define LPFC_WQ_4K_PAGE_SZ 0x1
506 #define LPFC_WQ_16K_PAGE_SZ 0x4
513 struct lpfc_sli4_lnk_info {
515 #define LPFC_LNK_DAT_INVAL 0
516 #define LPFC_LNK_DAT_VAL 1
518 #define LPFC_LNK_GE 0x0 /* FCoE */
519 #define LPFC_LNK_FC 0x1 /* FC */
524 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \
525 LPFC_FOF_IO_CHAN_NUM)
527 /* Used for IRQ vector to CPU mapping */
528 struct lpfc_vector_map_info {
534 #define LPFC_VECTOR_MAP_EMPTY 0xffff
536 /* SLI4 HBA data structure entries */
537 struct lpfc_sli4_hba {
538 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
539 * config space registers
541 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
544 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
547 void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for
552 /* IF Type 0, BAR 0 PCI cfg space reg mem map */
553 void __iomem *UERRLOregaddr;
554 void __iomem *UERRHIregaddr;
555 void __iomem *UEMASKLOregaddr;
556 void __iomem *UEMASKHIregaddr;
559 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */
560 void __iomem *STATUSregaddr;
561 void __iomem *CTRLregaddr;
562 void __iomem *ERR1regaddr;
563 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1
564 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2
565 void __iomem *ERR2regaddr;
566 #define SLIPORT_ERR2_REG_FW_RESTART 0x0
567 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1
568 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2
569 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3
570 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4
571 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5
572 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6
573 void __iomem *EQDregaddr;
577 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */
578 void __iomem *PSMPHRregaddr;
580 /* Well-known SLI INTF register memory map. */
581 void __iomem *SLIINTFregaddr;
583 /* IF type 0, BAR 1 function CSR register memory map */
584 void __iomem *ISRregaddr; /* HST_ISR register */
585 void __iomem *IMRregaddr; /* HST_IMR register */
586 void __iomem *ISCRregaddr; /* HST_ISCR register */
587 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */
588 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */
589 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */
590 void __iomem *CQDBregaddr; /* CQ_DOORBELL register */
591 void __iomem *EQDBregaddr; /* EQ_DOORBELL register */
592 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */
593 void __iomem *BMBXregaddr; /* BootStrap MBX register */
599 struct lpfc_register sli_intf;
600 struct lpfc_pc_sli4_params pc_sli4_params;
601 struct lpfc_bbscn_params bbscn_params;
602 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */
604 void (*sli4_eq_clr_intr)(struct lpfc_queue *q);
605 uint32_t (*sli4_eq_release)(struct lpfc_queue *q, bool arm);
606 uint32_t (*sli4_cq_release)(struct lpfc_queue *q, bool arm);
608 /* Pointers to the constructed SLI4 queues */
609 struct lpfc_queue **hba_eq; /* Event queues for HBA */
610 struct lpfc_queue **fcp_cq; /* Fast-path FCP compl queue */
611 struct lpfc_queue **nvme_cq; /* Fast-path NVME compl queue */
612 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */
613 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */
614 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */
615 struct lpfc_queue **fcp_wq; /* Fast-path FCP work queue */
616 struct lpfc_queue **nvme_wq; /* Fast-path NVME work queue */
617 uint16_t *fcp_cq_map;
618 uint16_t *nvme_cq_map;
619 struct list_head lpfc_wq_list;
621 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
622 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */
623 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */
624 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
625 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
626 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */
627 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
628 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
630 struct lpfc_name wwnn;
631 struct lpfc_name wwpn;
633 uint32_t fw_func_mode; /* FW function protocol mode */
634 uint32_t ulp0_mode; /* ULP0 protocol mode */
635 uint32_t ulp1_mode; /* ULP1 protocol mode */
637 /* Optimized Access Storage specific queues/structures */
638 uint64_t oas_next_lun;
639 uint8_t oas_next_tgt_wwpn[8];
640 uint8_t oas_next_vpt_wwpn[8];
642 /* Setup information for various queue parameters */
653 #define LPFC_SP_EQ_MAX_INTR_SEC 10000
654 #define LPFC_FP_EQ_MAX_INTR_SEC 10000
656 uint32_t intr_enable;
657 struct lpfc_bmbx bmbx;
658 struct lpfc_max_cfg_param max_cfg_param;
659 uint16_t extents_in_use; /* must allocate resource extents. */
660 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */
661 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
663 uint16_t common_xri_max;
664 uint16_t common_xri_cnt;
665 uint16_t common_xri_start;
666 uint16_t els_xri_cnt;
667 uint16_t nvmet_xri_cnt;
668 uint16_t nvmet_io_wait_cnt;
669 uint16_t nvmet_io_wait_total;
670 struct list_head lpfc_els_sgl_list;
671 struct list_head lpfc_abts_els_sgl_list;
672 struct list_head lpfc_nvmet_sgl_list;
673 struct list_head lpfc_abts_nvmet_ctx_list;
674 struct list_head lpfc_abts_scsi_buf_list;
675 struct list_head lpfc_abts_nvme_buf_list;
676 struct list_head lpfc_nvmet_io_wait_list;
677 struct lpfc_nvmet_ctx_info *nvmet_ctx_info;
678 struct lpfc_sglq **lpfc_sglq_active_list;
679 struct list_head lpfc_rpi_hdr_list;
680 unsigned long *rpi_bmask;
683 struct list_head lpfc_rpi_blk_list;
684 unsigned long *xri_bmask;
686 struct list_head lpfc_xri_blk_list;
687 unsigned long *vfi_bmask;
690 struct list_head lpfc_vfi_blk_list;
691 struct lpfc_sli4_flags sli4_flags;
692 struct list_head sp_queue_event;
693 struct list_head sp_cqe_event_pool;
694 struct list_head sp_asynce_work_queue;
695 struct list_head sp_fcp_xri_aborted_work_queue;
696 struct list_head sp_els_xri_aborted_work_queue;
697 struct list_head sp_unsol_work_queue;
698 struct lpfc_sli4_link link_state;
699 struct lpfc_sli4_lnk_info lnk_info;
700 uint32_t pport_name_sta;
701 #define LPFC_SLI4_PPNAME_NON 0
702 #define LPFC_SLI4_PPNAME_GET 1
704 spinlock_t abts_nvme_buf_list_lock; /* list of aborted SCSI IOs */
705 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
706 spinlock_t sgl_list_lock; /* list of aborted els IOs */
707 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */
708 uint32_t physical_port;
710 /* CPU to vector mapping information */
711 struct lpfc_vector_map_info *cpu_map;
712 uint16_t num_online_cpu;
713 uint16_t num_present_cpu;
714 uint16_t curr_disp_cpu;
716 #define lpfc_conf_trunk_port0_WORD conf_trunk
717 #define lpfc_conf_trunk_port0_SHIFT 0
718 #define lpfc_conf_trunk_port0_MASK 0x1
719 #define lpfc_conf_trunk_port1_WORD conf_trunk
720 #define lpfc_conf_trunk_port1_SHIFT 1
721 #define lpfc_conf_trunk_port1_MASK 0x1
722 #define lpfc_conf_trunk_port2_WORD conf_trunk
723 #define lpfc_conf_trunk_port2_SHIFT 2
724 #define lpfc_conf_trunk_port2_MASK 0x1
725 #define lpfc_conf_trunk_port3_WORD conf_trunk
726 #define lpfc_conf_trunk_port3_SHIFT 3
727 #define lpfc_conf_trunk_port3_MASK 0x1
736 enum lpfc_sgl_state {
743 /* lpfc_sglqs are used in double linked lists */
744 struct list_head list;
745 struct list_head clist;
746 enum lpfc_sge_type buff_type; /* is this a scsi sgl */
747 enum lpfc_sgl_state state;
748 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */
749 uint16_t iotag; /* pre-assigned IO tag */
750 uint16_t sli4_lxritag; /* logical pre-assigned xri. */
751 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
752 struct sli4_sge *sgl; /* pre-assigned SGL */
753 void *virt; /* virtual address. */
754 dma_addr_t phys; /* physical address */
757 struct lpfc_rpi_hdr {
758 struct list_head list;
760 struct lpfc_dmabuf *dmabuf;
766 struct lpfc_rsrc_blks {
767 struct list_head list;
773 struct lpfc_rdp_context {
774 struct lpfc_nodelist *ndlp;
777 READ_LNK_VAR link_stat;
778 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE];
779 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE];
780 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int);
783 struct lpfc_lcb_context {
791 struct lpfc_nodelist *ndlp;
796 * SLI4 specific function prototypes
798 int lpfc_pci_function_reset(struct lpfc_hba *);
799 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *);
800 int lpfc_sli4_hba_setup(struct lpfc_hba *);
801 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
802 uint8_t, uint32_t, bool);
803 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
804 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
805 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
806 struct lpfc_mbx_sge *);
807 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *,
810 void lpfc_sli4_hba_reset(struct lpfc_hba *);
811 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
813 void lpfc_sli4_queue_free(struct lpfc_queue *);
814 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t);
815 int lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
816 uint32_t numq, uint32_t imax);
817 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
818 struct lpfc_queue *, uint32_t, uint32_t);
819 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
820 struct lpfc_queue **eqp, uint32_t type,
822 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
823 struct lpfc_queue *, uint32_t);
824 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
825 struct lpfc_queue *, uint32_t);
826 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
827 struct lpfc_queue *, struct lpfc_queue *, uint32_t);
828 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
829 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
831 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
832 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
833 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
834 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
835 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
836 struct lpfc_queue *);
837 int lpfc_sli4_queue_setup(struct lpfc_hba *);
838 void lpfc_sli4_queue_unset(struct lpfc_hba *);
839 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
840 int lpfc_repost_common_sgl_list(struct lpfc_hba *phba);
841 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
842 void lpfc_sli4_free_xri(struct lpfc_hba *, int);
843 int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
844 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
845 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
846 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
847 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
848 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
849 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
850 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
851 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
852 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
853 int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
854 void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
855 void lpfc_sli4_remove_rpis(struct lpfc_hba *);
856 void lpfc_sli4_async_event_proc(struct lpfc_hba *);
857 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
858 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *,
859 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *);
860 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
861 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
862 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
863 struct sli4_wcqe_xri_aborted *);
864 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba,
865 struct sli4_wcqe_xri_aborted *axri);
866 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba,
867 struct sli4_wcqe_xri_aborted *axri);
868 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
869 struct sli4_wcqe_xri_aborted *);
870 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *);
871 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *);
872 int lpfc_sli4_brdreset(struct lpfc_hba *);
873 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
874 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
875 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
876 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba);
877 int lpfc_sli4_init_vpi(struct lpfc_vport *);
878 inline void lpfc_sli4_eq_clr_intr(struct lpfc_queue *);
879 uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
880 uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
881 inline void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q);
882 uint32_t lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm);
883 uint32_t lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm);
884 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
885 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
886 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
887 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
888 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
889 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
890 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
891 int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
892 int lpfc_sli4_post_status_check(struct lpfc_hba *);
893 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
894 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
895 void lpfc_sli4_ras_dma_free(struct lpfc_hba *phba);