2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
65 static unsigned int ata_dev_init_params(struct ata_port *ap,
66 struct ata_device *dev);
67 static void ata_set_mode(struct ata_port *ap);
68 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
69 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
70 static int fgb(u32 bitmap);
71 static int ata_choose_xfer_mode(const struct ata_port *ap,
73 unsigned int *xfer_shift_out);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 int atapi_enabled = 0;
79 module_param(atapi_enabled, int, 0444);
80 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82 MODULE_AUTHOR("Jeff Garzik");
83 MODULE_DESCRIPTION("Library module for ATA devices");
84 MODULE_LICENSE("GPL");
85 MODULE_VERSION(DRV_VERSION);
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
98 * Inherited from caller.
101 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
120 fis[13] = tf->hob_nsect;
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
138 * Inherited from caller.
141 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
156 tf->hob_nsect = fis[13];
159 static const u8 ata_rw_cmds[] = {
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
186 ATA_CMD_WRITE_FUA_EXT
190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
193 * Examine the device configuration and tf->flags to calculate
194 * the proper read/write commands and protocol to use.
199 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
205 int index, fua, lba48, write;
207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
213 index = dev->multi_count ? 0 : 8;
214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
217 index = dev->multi_count ? 0 : 8;
219 tf->protocol = ATA_PROT_DMA;
223 cmd = ata_rw_cmds[index + fua + lba48 + write];
231 static const char * const xfer_mode_str[] = {
251 * ata_udma_string - convert UDMA bit offset to string
252 * @mask: mask of bits supported; only highest bit counts.
254 * Determine string which represents the highest speed
255 * (highest bit in @udma_mask).
261 * Constant C string representing highest speed listed in
262 * @udma_mask, or the constant C string "<n/a>".
265 static const char *ata_mode_string(unsigned int mask)
269 for (i = 7; i >= 0; i--)
272 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
275 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
282 return xfer_mode_str[i];
286 * ata_pio_devchk - PATA device presence detection
287 * @ap: ATA channel to examine
288 * @device: Device to examine (starting at zero)
290 * This technique was originally described in
291 * Hale Landis's ATADRVR (www.ata-atapi.com), and
292 * later found its way into the ATA/ATAPI spec.
294 * Write a pattern to the ATA shadow registers,
295 * and if a device is present, it will respond by
296 * correctly storing and echoing back the
297 * ATA shadow register contents.
303 static unsigned int ata_pio_devchk(struct ata_port *ap,
306 struct ata_ioports *ioaddr = &ap->ioaddr;
309 ap->ops->dev_select(ap, device);
311 outb(0x55, ioaddr->nsect_addr);
312 outb(0xaa, ioaddr->lbal_addr);
314 outb(0xaa, ioaddr->nsect_addr);
315 outb(0x55, ioaddr->lbal_addr);
317 outb(0x55, ioaddr->nsect_addr);
318 outb(0xaa, ioaddr->lbal_addr);
320 nsect = inb(ioaddr->nsect_addr);
321 lbal = inb(ioaddr->lbal_addr);
323 if ((nsect == 0x55) && (lbal == 0xaa))
324 return 1; /* we found a device */
326 return 0; /* nothing found */
330 * ata_mmio_devchk - PATA device presence detection
331 * @ap: ATA channel to examine
332 * @device: Device to examine (starting at zero)
334 * This technique was originally described in
335 * Hale Landis's ATADRVR (www.ata-atapi.com), and
336 * later found its way into the ATA/ATAPI spec.
338 * Write a pattern to the ATA shadow registers,
339 * and if a device is present, it will respond by
340 * correctly storing and echoing back the
341 * ATA shadow register contents.
347 static unsigned int ata_mmio_devchk(struct ata_port *ap,
350 struct ata_ioports *ioaddr = &ap->ioaddr;
353 ap->ops->dev_select(ap, device);
355 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
356 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
358 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
359 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
361 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
362 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
364 nsect = readb((void __iomem *) ioaddr->nsect_addr);
365 lbal = readb((void __iomem *) ioaddr->lbal_addr);
367 if ((nsect == 0x55) && (lbal == 0xaa))
368 return 1; /* we found a device */
370 return 0; /* nothing found */
374 * ata_devchk - PATA device presence detection
375 * @ap: ATA channel to examine
376 * @device: Device to examine (starting at zero)
378 * Dispatch ATA device presence detection, depending
379 * on whether we are using PIO or MMIO to talk to the
380 * ATA shadow registers.
386 static unsigned int ata_devchk(struct ata_port *ap,
389 if (ap->flags & ATA_FLAG_MMIO)
390 return ata_mmio_devchk(ap, device);
391 return ata_pio_devchk(ap, device);
395 * ata_dev_classify - determine device type based on ATA-spec signature
396 * @tf: ATA taskfile register set for device to be identified
398 * Determine from taskfile register contents whether a device is
399 * ATA or ATAPI, as per "Signature and persistence" section
400 * of ATA/PI spec (volume 1, sect 5.14).
406 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
407 * the event of failure.
410 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
412 /* Apple's open source Darwin code hints that some devices only
413 * put a proper signature into the LBA mid/high registers,
414 * So, we only check those. It's sufficient for uniqueness.
417 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
418 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
419 DPRINTK("found ATA device by sig\n");
423 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
424 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
425 DPRINTK("found ATAPI device by sig\n");
426 return ATA_DEV_ATAPI;
429 DPRINTK("unknown device\n");
430 return ATA_DEV_UNKNOWN;
434 * ata_dev_try_classify - Parse returned ATA device signature
435 * @ap: ATA channel to examine
436 * @device: Device to examine (starting at zero)
437 * @r_err: Value of error register on completion
439 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
440 * an ATA/ATAPI-defined set of values is placed in the ATA
441 * shadow registers, indicating the results of device detection
444 * Select the ATA device, and read the values from the ATA shadow
445 * registers. Then parse according to the Error register value,
446 * and the spec-defined values examined by ata_dev_classify().
452 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
456 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
458 struct ata_taskfile tf;
462 ap->ops->dev_select(ap, device);
464 memset(&tf, 0, sizeof(tf));
466 ap->ops->tf_read(ap, &tf);
471 /* see if device passed diags */
474 else if ((device == 0) && (err == 0x81))
479 /* determine if device is ATA or ATAPI */
480 class = ata_dev_classify(&tf);
482 if (class == ATA_DEV_UNKNOWN)
484 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
490 * ata_id_string - Convert IDENTIFY DEVICE page into string
491 * @id: IDENTIFY DEVICE results we will examine
492 * @s: string into which data is output
493 * @ofs: offset into identify device page
494 * @len: length of string to return. must be an even number.
496 * The strings in the IDENTIFY DEVICE page are broken up into
497 * 16-bit chunks. Run through the string, and output each
498 * 8-bit chunk linearly, regardless of platform.
504 void ata_id_string(const u16 *id, unsigned char *s,
505 unsigned int ofs, unsigned int len)
524 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
525 * @id: IDENTIFY DEVICE results we will examine
526 * @s: string into which data is output
527 * @ofs: offset into identify device page
528 * @len: length of string to return. must be an odd number.
530 * This function is identical to ata_id_string except that it
531 * trims trailing spaces and terminates the resulting string with
532 * null. @len must be actual maximum length (even number) + 1.
537 void ata_id_c_string(const u16 *id, unsigned char *s,
538 unsigned int ofs, unsigned int len)
544 ata_id_string(id, s, ofs, len - 1);
546 p = s + strnlen(s, len - 1);
547 while (p > s && p[-1] == ' ')
552 static u64 ata_id_n_sectors(const u16 *id)
554 if (ata_id_has_lba(id)) {
555 if (ata_id_has_lba48(id))
556 return ata_id_u64(id, 100);
558 return ata_id_u32(id, 60);
560 if (ata_id_current_chs_valid(id))
561 return ata_id_u32(id, 57);
563 return id[1] * id[3] * id[6];
568 * ata_noop_dev_select - Select device 0/1 on ATA bus
569 * @ap: ATA channel to manipulate
570 * @device: ATA device (numbered from zero) to select
572 * This function performs no actual function.
574 * May be used as the dev_select() entry in ata_port_operations.
579 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
585 * ata_std_dev_select - Select device 0/1 on ATA bus
586 * @ap: ATA channel to manipulate
587 * @device: ATA device (numbered from zero) to select
589 * Use the method defined in the ATA specification to
590 * make either device 0, or device 1, active on the
591 * ATA channel. Works with both PIO and MMIO.
593 * May be used as the dev_select() entry in ata_port_operations.
599 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
604 tmp = ATA_DEVICE_OBS;
606 tmp = ATA_DEVICE_OBS | ATA_DEV1;
608 if (ap->flags & ATA_FLAG_MMIO) {
609 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
611 outb(tmp, ap->ioaddr.device_addr);
613 ata_pause(ap); /* needed; also flushes, for mmio */
617 * ata_dev_select - Select device 0/1 on ATA bus
618 * @ap: ATA channel to manipulate
619 * @device: ATA device (numbered from zero) to select
620 * @wait: non-zero to wait for Status register BSY bit to clear
621 * @can_sleep: non-zero if context allows sleeping
623 * Use the method defined in the ATA specification to
624 * make either device 0, or device 1, active on the
627 * This is a high-level version of ata_std_dev_select(),
628 * which additionally provides the services of inserting
629 * the proper pauses and status polling, where needed.
635 void ata_dev_select(struct ata_port *ap, unsigned int device,
636 unsigned int wait, unsigned int can_sleep)
638 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
639 ap->id, device, wait);
644 ap->ops->dev_select(ap, device);
647 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
654 * ata_dump_id - IDENTIFY DEVICE info debugging output
655 * @id: IDENTIFY DEVICE page to dump
657 * Dump selected 16-bit words from the given IDENTIFY DEVICE
664 static inline void ata_dump_id(const u16 *id)
666 DPRINTK("49==0x%04x "
676 DPRINTK("80==0x%04x "
686 DPRINTK("88==0x%04x "
693 * Compute the PIO modes available for this device. This is not as
694 * trivial as it seems if we must consider early devices correctly.
696 * FIXME: pre IDE drive timing (do we care ?).
699 static unsigned int ata_pio_modes(const struct ata_device *adev)
703 /* Usual case. Word 53 indicates word 64 is valid */
704 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
705 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
711 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
712 number for the maximum. Turn it into a mask and return it */
713 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
715 /* But wait.. there's more. Design your standards by committee and
716 you too can get a free iordy field to process. However its the
717 speeds not the modes that are supported... Note drivers using the
718 timing API will get this right anyway */
722 ata_queue_packet_task(struct ata_port *ap)
724 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
725 queue_work(ata_wq, &ap->packet_task);
729 ata_queue_pio_task(struct ata_port *ap)
731 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
732 queue_work(ata_wq, &ap->pio_task);
736 ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
738 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
739 queue_delayed_work(ata_wq, &ap->pio_task, delay);
743 * ata_flush_pio_tasks - Flush pio_task and packet_task
744 * @ap: the target ata_port
746 * After this function completes, pio_task and packet_task are
747 * guranteed not to be running or scheduled.
750 * Kernel thread context (may sleep)
753 static void ata_flush_pio_tasks(struct ata_port *ap)
760 spin_lock_irqsave(&ap->host_set->lock, flags);
761 ap->flags |= ATA_FLAG_FLUSH_PIO_TASK;
762 spin_unlock_irqrestore(&ap->host_set->lock, flags);
764 DPRINTK("flush #1\n");
765 flush_workqueue(ata_wq);
768 * At this point, if a task is running, it's guaranteed to see
769 * the FLUSH flag; thus, it will never queue pio tasks again.
772 tmp |= cancel_delayed_work(&ap->pio_task);
773 tmp |= cancel_delayed_work(&ap->packet_task);
775 DPRINTK("flush #2\n");
776 flush_workqueue(ata_wq);
779 spin_lock_irqsave(&ap->host_set->lock, flags);
780 ap->flags &= ~ATA_FLAG_FLUSH_PIO_TASK;
781 spin_unlock_irqrestore(&ap->host_set->lock, flags);
786 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
788 struct completion *waiting = qc->private_data;
790 qc->ap->ops->tf_read(qc->ap, &qc->tf);
795 * ata_exec_internal - execute libata internal command
796 * @ap: Port to which the command is sent
797 * @dev: Device to which the command is sent
798 * @tf: Taskfile registers for the command and the result
799 * @dma_dir: Data tranfer direction of the command
800 * @buf: Data buffer of the command
801 * @buflen: Length of data buffer
803 * Executes libata internal command with timeout. @tf contains
804 * command on entry and result on return. Timeout and error
805 * conditions are reported via return value. No recovery action
806 * is taken after a command times out. It's caller's duty to
807 * clean up after timeout.
810 * None. Should be called with kernel context, might sleep.
814 ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
815 struct ata_taskfile *tf,
816 int dma_dir, void *buf, unsigned int buflen)
818 u8 command = tf->command;
819 struct ata_queued_cmd *qc;
820 DECLARE_COMPLETION(wait);
822 unsigned int err_mask;
824 spin_lock_irqsave(&ap->host_set->lock, flags);
826 qc = ata_qc_new_init(ap, dev);
830 qc->dma_dir = dma_dir;
831 if (dma_dir != DMA_NONE) {
832 ata_sg_init_one(qc, buf, buflen);
833 qc->nsect = buflen / ATA_SECT_SIZE;
836 qc->private_data = &wait;
837 qc->complete_fn = ata_qc_complete_internal;
839 qc->err_mask = ata_qc_issue(qc);
843 spin_unlock_irqrestore(&ap->host_set->lock, flags);
845 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
846 spin_lock_irqsave(&ap->host_set->lock, flags);
848 /* We're racing with irq here. If we lose, the
849 * following test prevents us from completing the qc
850 * again. If completion irq occurs after here but
851 * before the caller cleans up, it will result in a
852 * spurious interrupt. We can live with that.
854 if (qc->flags & ATA_QCFLAG_ACTIVE) {
855 qc->err_mask = AC_ERR_TIMEOUT;
857 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
861 spin_unlock_irqrestore(&ap->host_set->lock, flags);
865 err_mask = qc->err_mask;
873 * ata_pio_need_iordy - check if iordy needed
876 * Check if the current speed of the device requires IORDY. Used
877 * by various controllers for chip configuration.
880 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
883 int speed = adev->pio_mode - XFER_PIO_0;
890 /* If we have no drive specific rule, then PIO 2 is non IORDY */
892 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
893 pio = adev->id[ATA_ID_EIDE_PIO];
894 /* Is the speed faster than the drive allows non IORDY ? */
896 /* This is cycle times not frequency - watch the logic! */
897 if (pio > 240) /* PIO2 is 240nS per cycle */
906 * ata_dev_read_id - Read ID data from the specified device
907 * @ap: port on which target device resides
908 * @dev: target device
909 * @p_class: pointer to class of the target device (may be changed)
910 * @post_reset: is this read ID post-reset?
911 * @id: buffer to fill IDENTIFY page into
913 * Read ID data from the specified device. ATA_CMD_ID_ATA is
914 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
915 * devices. This function also takes care of EDD signature
916 * misreporting (to be removed once EDD support is gone) and
917 * issues ATA_CMD_INIT_DEV_PARAMS for pre-ATA4 drives.
920 * Kernel thread context (may sleep)
923 * 0 on success, -errno otherwise.
925 static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
926 unsigned int *p_class, int post_reset, u16 *id)
928 unsigned int class = *p_class;
929 unsigned int using_edd;
930 struct ata_taskfile tf;
931 unsigned int err_mask = 0;
935 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
937 if (ap->ops->probe_reset ||
938 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
943 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
946 ata_tf_init(ap, &tf, dev->devno);
950 tf.command = ATA_CMD_ID_ATA;
953 tf.command = ATA_CMD_ID_ATAPI;
957 reason = "unsupported class";
961 tf.protocol = ATA_PROT_PIO;
963 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
964 id, sizeof(id[0]) * ATA_ID_WORDS);
968 reason = "I/O error";
970 if (err_mask & ~AC_ERR_DEV)
974 * arg! EDD works for all test cases, but seems to return
975 * the ATA signature for some ATAPI devices. Until the
976 * reason for this is found and fixed, we fix up the mess
977 * here. If IDENTIFY DEVICE returns command aborted
978 * (as ATAPI devices do), then we issue an
979 * IDENTIFY PACKET DEVICE.
981 * ATA software reset (SRST, the default) does not appear
982 * to have this problem.
984 if ((using_edd) && (class == ATA_DEV_ATA)) {
986 if (err & ATA_ABORTED) {
987 class = ATA_DEV_ATAPI;
994 swap_buf_le16(id, ATA_ID_WORDS);
996 /* print device capabilities */
997 printk(KERN_DEBUG "ata%u: dev %u cfg "
998 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1000 id[49], id[82], id[83], id[84], id[85], id[86], id[87], id[88]);
1003 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1005 reason = "device reports illegal type";
1009 if (post_reset && class == ATA_DEV_ATA) {
1011 * The exact sequence expected by certain pre-ATA4 drives is:
1014 * INITIALIZE DEVICE PARAMETERS
1016 * Some drives were very specific about that exact sequence.
1018 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1019 err_mask = ata_dev_init_params(ap, dev);
1022 reason = "INIT_DEV_PARAMS failed";
1026 /* current CHS translation info (id[53-58]) might be
1027 * changed. reread the identify device info.
1038 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1039 ap->id, dev->devno, reason);
1045 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1046 * @ap: port on which device we wish to probe resides
1047 * @device: device bus address, starting at zero
1049 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1050 * command, and read back the 512-byte device information page.
1051 * The device information page is fed to us via the standard
1052 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1053 * using standard PIO-IN paths)
1055 * After reading the device information page, we use several
1056 * bits of information from it to initialize data structures
1057 * that will be used during the lifetime of the ata_device.
1058 * Other data from the info page is used to disqualify certain
1059 * older ATA devices we do not wish to support.
1062 * Inherited from caller. Some functions called by this function
1063 * obtain the host_set lock.
1066 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1068 struct ata_device *dev = &ap->device[device];
1069 unsigned long xfer_modes;
1072 if (!ata_dev_present(dev)) {
1073 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1078 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1080 rc = ata_dev_read_id(ap, dev, &dev->class, 1, dev->id);
1085 * common ATA, ATAPI feature tests
1088 /* we require DMA support (bits 8 of word 49) */
1089 if (!ata_id_has_dma(dev->id)) {
1090 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1094 /* quick-n-dirty find max transfer mode; for printk only */
1095 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1097 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1099 xfer_modes = ata_pio_modes(dev);
1101 ata_dump_id(dev->id);
1103 /* ATA-specific feature tests */
1104 if (dev->class == ATA_DEV_ATA) {
1105 dev->n_sectors = ata_id_n_sectors(dev->id);
1107 if (ata_id_has_lba(dev->id)) {
1108 dev->flags |= ATA_DFLAG_LBA;
1110 if (ata_id_has_lba48(dev->id))
1111 dev->flags |= ATA_DFLAG_LBA48;
1113 /* print device info to dmesg */
1114 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1116 ata_id_major_version(dev->id),
1117 ata_mode_string(xfer_modes),
1118 (unsigned long long)dev->n_sectors,
1119 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1123 /* Default translation */
1124 dev->cylinders = dev->id[1];
1125 dev->heads = dev->id[3];
1126 dev->sectors = dev->id[6];
1128 if (ata_id_current_chs_valid(dev->id)) {
1129 /* Current CHS translation is valid. */
1130 dev->cylinders = dev->id[54];
1131 dev->heads = dev->id[55];
1132 dev->sectors = dev->id[56];
1135 /* print device info to dmesg */
1136 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1138 ata_id_major_version(dev->id),
1139 ata_mode_string(xfer_modes),
1140 (unsigned long long)dev->n_sectors,
1141 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1148 /* ATAPI-specific feature tests */
1149 else if (dev->class == ATA_DEV_ATAPI) {
1150 rc = atapi_cdb_len(dev->id);
1151 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1152 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1155 dev->cdb_len = (unsigned int) rc;
1157 /* print device info to dmesg */
1158 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1160 ata_mode_string(xfer_modes));
1163 ap->host->max_cmd_len = 0;
1164 for (i = 0; i < ATA_MAX_DEVICES; i++)
1165 ap->host->max_cmd_len = max_t(unsigned int,
1166 ap->host->max_cmd_len,
1167 ap->device[i].cdb_len);
1169 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1173 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1176 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1177 DPRINTK("EXIT, err\n");
1181 static inline u8 ata_dev_knobble(const struct ata_port *ap,
1182 struct ata_device *dev)
1184 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1188 * ata_dev_config - Run device specific handlers & check for SATA->PATA bridges
1195 void ata_dev_config(struct ata_port *ap, unsigned int i)
1197 /* limit bridge transfers to udma5, 200 sectors */
1198 if (ata_dev_knobble(ap, &ap->device[i])) {
1199 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1201 ap->udma_mask &= ATA_UDMA5;
1202 ap->device[i].max_sectors = ATA_MAX_SECTORS;
1205 if (ap->ops->dev_config)
1206 ap->ops->dev_config(ap, &ap->device[i]);
1210 * ata_bus_probe - Reset and probe ATA bus
1213 * Master ATA bus probing function. Initiates a hardware-dependent
1214 * bus reset, then attempts to identify any devices found on
1218 * PCI/etc. bus probe sem.
1221 * Zero on success, non-zero on error.
1224 static int ata_bus_probe(struct ata_port *ap)
1226 unsigned int i, found = 0;
1228 if (ap->ops->probe_reset) {
1229 unsigned int classes[ATA_MAX_DEVICES];
1234 rc = ap->ops->probe_reset(ap, classes);
1236 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1237 if (classes[i] == ATA_DEV_UNKNOWN)
1238 classes[i] = ATA_DEV_NONE;
1239 ap->device[i].class = classes[i];
1242 printk(KERN_ERR "ata%u: probe reset failed, "
1243 "disabling port\n", ap->id);
1244 ata_port_disable(ap);
1247 ap->ops->phy_reset(ap);
1249 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1252 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1253 ata_dev_identify(ap, i);
1254 if (ata_dev_present(&ap->device[i])) {
1256 ata_dev_config(ap,i);
1260 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1261 goto err_out_disable;
1264 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1265 goto err_out_disable;
1270 ap->ops->port_disable(ap);
1276 * ata_port_probe - Mark port as enabled
1277 * @ap: Port for which we indicate enablement
1279 * Modify @ap data structure such that the system
1280 * thinks that the entire port is enabled.
1282 * LOCKING: host_set lock, or some other form of
1286 void ata_port_probe(struct ata_port *ap)
1288 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1292 * sata_print_link_status - Print SATA link status
1293 * @ap: SATA port to printk link status about
1295 * This function prints link speed and status of a SATA link.
1300 static void sata_print_link_status(struct ata_port *ap)
1305 if (!ap->ops->scr_read)
1308 sstatus = scr_read(ap, SCR_STATUS);
1310 if (sata_dev_present(ap)) {
1311 tmp = (sstatus >> 4) & 0xf;
1314 else if (tmp & (1 << 1))
1317 speed = "<unknown>";
1318 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1319 ap->id, speed, sstatus);
1321 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1327 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1328 * @ap: SATA port associated with target SATA PHY.
1330 * This function issues commands to standard SATA Sxxx
1331 * PHY registers, to wake up the phy (and device), and
1332 * clear any reset condition.
1335 * PCI/etc. bus probe sem.
1338 void __sata_phy_reset(struct ata_port *ap)
1341 unsigned long timeout = jiffies + (HZ * 5);
1343 if (ap->flags & ATA_FLAG_SATA_RESET) {
1344 /* issue phy wake/reset */
1345 scr_write_flush(ap, SCR_CONTROL, 0x301);
1346 /* Couldn't find anything in SATA I/II specs, but
1347 * AHCI-1.1 10.4.2 says at least 1 ms. */
1350 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1352 /* wait for phy to become ready, if necessary */
1355 sstatus = scr_read(ap, SCR_STATUS);
1356 if ((sstatus & 0xf) != 1)
1358 } while (time_before(jiffies, timeout));
1360 /* print link status */
1361 sata_print_link_status(ap);
1363 /* TODO: phy layer with polling, timeouts, etc. */
1364 if (sata_dev_present(ap))
1367 ata_port_disable(ap);
1369 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1372 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1373 ata_port_disable(ap);
1377 ap->cbl = ATA_CBL_SATA;
1381 * sata_phy_reset - Reset SATA bus.
1382 * @ap: SATA port associated with target SATA PHY.
1384 * This function resets the SATA bus, and then probes
1385 * the bus for devices.
1388 * PCI/etc. bus probe sem.
1391 void sata_phy_reset(struct ata_port *ap)
1393 __sata_phy_reset(ap);
1394 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1400 * ata_port_disable - Disable port.
1401 * @ap: Port to be disabled.
1403 * Modify @ap data structure such that the system
1404 * thinks that the entire port is disabled, and should
1405 * never attempt to probe or communicate with devices
1408 * LOCKING: host_set lock, or some other form of
1412 void ata_port_disable(struct ata_port *ap)
1414 ap->device[0].class = ATA_DEV_NONE;
1415 ap->device[1].class = ATA_DEV_NONE;
1416 ap->flags |= ATA_FLAG_PORT_DISABLED;
1420 * This mode timing computation functionality is ported over from
1421 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1424 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1425 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1426 * for PIO 5, which is a nonstandard extension and UDMA6, which
1427 * is currently supported only by Maxtor drives.
1430 static const struct ata_timing ata_timing[] = {
1432 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1433 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1434 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1435 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1437 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1438 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1439 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1441 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1443 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1444 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1445 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1447 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1448 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1449 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1451 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1452 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1453 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1455 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1456 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1457 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1459 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1464 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1465 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1467 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1469 q->setup = EZ(t->setup * 1000, T);
1470 q->act8b = EZ(t->act8b * 1000, T);
1471 q->rec8b = EZ(t->rec8b * 1000, T);
1472 q->cyc8b = EZ(t->cyc8b * 1000, T);
1473 q->active = EZ(t->active * 1000, T);
1474 q->recover = EZ(t->recover * 1000, T);
1475 q->cycle = EZ(t->cycle * 1000, T);
1476 q->udma = EZ(t->udma * 1000, UT);
1479 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1480 struct ata_timing *m, unsigned int what)
1482 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1483 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1484 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1485 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1486 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1487 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1488 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1489 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1492 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1494 const struct ata_timing *t;
1496 for (t = ata_timing; t->mode != speed; t++)
1497 if (t->mode == 0xFF)
1502 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1503 struct ata_timing *t, int T, int UT)
1505 const struct ata_timing *s;
1506 struct ata_timing p;
1512 if (!(s = ata_timing_find_mode(speed)))
1515 memcpy(t, s, sizeof(*s));
1518 * If the drive is an EIDE drive, it can tell us it needs extended
1519 * PIO/MW_DMA cycle timing.
1522 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1523 memset(&p, 0, sizeof(p));
1524 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1525 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1526 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1527 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1528 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1530 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1534 * Convert the timing to bus clock counts.
1537 ata_timing_quantize(t, t, T, UT);
1540 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1541 * S.M.A.R.T * and some other commands. We have to ensure that the
1542 * DMA cycle timing is slower/equal than the fastest PIO timing.
1545 if (speed > XFER_PIO_4) {
1546 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1547 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1551 * Lengthen active & recovery time so that cycle time is correct.
1554 if (t->act8b + t->rec8b < t->cyc8b) {
1555 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1556 t->rec8b = t->cyc8b - t->act8b;
1559 if (t->active + t->recover < t->cycle) {
1560 t->active += (t->cycle - (t->active + t->recover)) / 2;
1561 t->recover = t->cycle - t->active;
1567 static const struct {
1570 } xfer_mode_classes[] = {
1571 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1572 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1573 { ATA_SHIFT_PIO, XFER_PIO_0 },
1576 static u8 base_from_shift(unsigned int shift)
1580 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1581 if (xfer_mode_classes[i].shift == shift)
1582 return xfer_mode_classes[i].base;
1587 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1592 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1595 if (dev->xfer_shift == ATA_SHIFT_PIO)
1596 dev->flags |= ATA_DFLAG_PIO;
1598 ata_dev_set_xfermode(ap, dev);
1600 base = base_from_shift(dev->xfer_shift);
1601 ofs = dev->xfer_mode - base;
1602 idx = ofs + dev->xfer_shift;
1603 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1605 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1606 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1608 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1609 ap->id, dev->devno, xfer_mode_str[idx]);
1612 static int ata_host_set_pio(struct ata_port *ap)
1618 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1621 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1625 base = base_from_shift(ATA_SHIFT_PIO);
1626 xfer_mode = base + x;
1628 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1629 (int)base, (int)xfer_mode, mask, x);
1631 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1632 struct ata_device *dev = &ap->device[i];
1633 if (ata_dev_present(dev)) {
1634 dev->pio_mode = xfer_mode;
1635 dev->xfer_mode = xfer_mode;
1636 dev->xfer_shift = ATA_SHIFT_PIO;
1637 if (ap->ops->set_piomode)
1638 ap->ops->set_piomode(ap, dev);
1645 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1646 unsigned int xfer_shift)
1650 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1651 struct ata_device *dev = &ap->device[i];
1652 if (ata_dev_present(dev)) {
1653 dev->dma_mode = xfer_mode;
1654 dev->xfer_mode = xfer_mode;
1655 dev->xfer_shift = xfer_shift;
1656 if (ap->ops->set_dmamode)
1657 ap->ops->set_dmamode(ap, dev);
1663 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1664 * @ap: port on which timings will be programmed
1666 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1669 * PCI/etc. bus probe sem.
1671 static void ata_set_mode(struct ata_port *ap)
1673 unsigned int xfer_shift;
1677 /* step 1: always set host PIO timings */
1678 rc = ata_host_set_pio(ap);
1682 /* step 2: choose the best data xfer mode */
1683 xfer_mode = xfer_shift = 0;
1684 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1688 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1689 if (xfer_shift != ATA_SHIFT_PIO)
1690 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1692 /* step 4: update devices' xfer mode */
1693 ata_dev_set_mode(ap, &ap->device[0]);
1694 ata_dev_set_mode(ap, &ap->device[1]);
1696 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1699 if (ap->ops->post_set_mode)
1700 ap->ops->post_set_mode(ap);
1705 ata_port_disable(ap);
1709 * ata_tf_to_host - issue ATA taskfile to host controller
1710 * @ap: port to which command is being issued
1711 * @tf: ATA taskfile register set
1713 * Issues ATA taskfile register set to ATA host controller,
1714 * with proper synchronization with interrupt handler and
1718 * spin_lock_irqsave(host_set lock)
1721 static inline void ata_tf_to_host(struct ata_port *ap,
1722 const struct ata_taskfile *tf)
1724 ap->ops->tf_load(ap, tf);
1725 ap->ops->exec_command(ap, tf);
1729 * ata_busy_sleep - sleep until BSY clears, or timeout
1730 * @ap: port containing status register to be polled
1731 * @tmout_pat: impatience timeout
1732 * @tmout: overall timeout
1734 * Sleep until ATA Status register bit BSY clears,
1735 * or a timeout occurs.
1740 unsigned int ata_busy_sleep (struct ata_port *ap,
1741 unsigned long tmout_pat, unsigned long tmout)
1743 unsigned long timer_start, timeout;
1746 status = ata_busy_wait(ap, ATA_BUSY, 300);
1747 timer_start = jiffies;
1748 timeout = timer_start + tmout_pat;
1749 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1751 status = ata_busy_wait(ap, ATA_BUSY, 3);
1754 if (status & ATA_BUSY)
1755 printk(KERN_WARNING "ata%u is slow to respond, "
1756 "please be patient\n", ap->id);
1758 timeout = timer_start + tmout;
1759 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1761 status = ata_chk_status(ap);
1764 if (status & ATA_BUSY) {
1765 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1766 ap->id, tmout / HZ);
1773 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1775 struct ata_ioports *ioaddr = &ap->ioaddr;
1776 unsigned int dev0 = devmask & (1 << 0);
1777 unsigned int dev1 = devmask & (1 << 1);
1778 unsigned long timeout;
1780 /* if device 0 was found in ata_devchk, wait for its
1784 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1786 /* if device 1 was found in ata_devchk, wait for
1787 * register access, then wait for BSY to clear
1789 timeout = jiffies + ATA_TMOUT_BOOT;
1793 ap->ops->dev_select(ap, 1);
1794 if (ap->flags & ATA_FLAG_MMIO) {
1795 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1796 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1798 nsect = inb(ioaddr->nsect_addr);
1799 lbal = inb(ioaddr->lbal_addr);
1801 if ((nsect == 1) && (lbal == 1))
1803 if (time_after(jiffies, timeout)) {
1807 msleep(50); /* give drive a breather */
1810 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1812 /* is all this really necessary? */
1813 ap->ops->dev_select(ap, 0);
1815 ap->ops->dev_select(ap, 1);
1817 ap->ops->dev_select(ap, 0);
1821 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1822 * @ap: Port to reset and probe
1824 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1825 * probe the bus. Not often used these days.
1828 * PCI/etc. bus probe sem.
1829 * Obtains host_set lock.
1833 static unsigned int ata_bus_edd(struct ata_port *ap)
1835 struct ata_taskfile tf;
1836 unsigned long flags;
1838 /* set up execute-device-diag (bus reset) taskfile */
1839 /* also, take interrupts to a known state (disabled) */
1840 DPRINTK("execute-device-diag\n");
1841 ata_tf_init(ap, &tf, 0);
1843 tf.command = ATA_CMD_EDD;
1844 tf.protocol = ATA_PROT_NODATA;
1847 spin_lock_irqsave(&ap->host_set->lock, flags);
1848 ata_tf_to_host(ap, &tf);
1849 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1851 /* spec says at least 2ms. but who knows with those
1852 * crazy ATAPI devices...
1856 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1859 static unsigned int ata_bus_softreset(struct ata_port *ap,
1860 unsigned int devmask)
1862 struct ata_ioports *ioaddr = &ap->ioaddr;
1864 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1866 /* software reset. causes dev0 to be selected */
1867 if (ap->flags & ATA_FLAG_MMIO) {
1868 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1869 udelay(20); /* FIXME: flush */
1870 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1871 udelay(20); /* FIXME: flush */
1872 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1874 outb(ap->ctl, ioaddr->ctl_addr);
1876 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1878 outb(ap->ctl, ioaddr->ctl_addr);
1881 /* spec mandates ">= 2ms" before checking status.
1882 * We wait 150ms, because that was the magic delay used for
1883 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1884 * between when the ATA command register is written, and then
1885 * status is checked. Because waiting for "a while" before
1886 * checking status is fine, post SRST, we perform this magic
1887 * delay here as well.
1891 ata_bus_post_reset(ap, devmask);
1897 * ata_bus_reset - reset host port and associated ATA channel
1898 * @ap: port to reset
1900 * This is typically the first time we actually start issuing
1901 * commands to the ATA channel. We wait for BSY to clear, then
1902 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1903 * result. Determine what devices, if any, are on the channel
1904 * by looking at the device 0/1 error register. Look at the signature
1905 * stored in each device's taskfile registers, to determine if
1906 * the device is ATA or ATAPI.
1909 * PCI/etc. bus probe sem.
1910 * Obtains host_set lock.
1913 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1916 void ata_bus_reset(struct ata_port *ap)
1918 struct ata_ioports *ioaddr = &ap->ioaddr;
1919 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1921 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1923 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1925 /* determine if device 0/1 are present */
1926 if (ap->flags & ATA_FLAG_SATA_RESET)
1929 dev0 = ata_devchk(ap, 0);
1931 dev1 = ata_devchk(ap, 1);
1935 devmask |= (1 << 0);
1937 devmask |= (1 << 1);
1939 /* select device 0 again */
1940 ap->ops->dev_select(ap, 0);
1942 /* issue bus reset */
1943 if (ap->flags & ATA_FLAG_SRST)
1944 rc = ata_bus_softreset(ap, devmask);
1945 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1946 /* set up device control */
1947 if (ap->flags & ATA_FLAG_MMIO)
1948 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1950 outb(ap->ctl, ioaddr->ctl_addr);
1951 rc = ata_bus_edd(ap);
1958 * determine by signature whether we have ATA or ATAPI devices
1960 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1961 if ((slave_possible) && (err != 0x81))
1962 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1964 /* re-enable interrupts */
1965 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1968 /* is double-select really necessary? */
1969 if (ap->device[1].class != ATA_DEV_NONE)
1970 ap->ops->dev_select(ap, 1);
1971 if (ap->device[0].class != ATA_DEV_NONE)
1972 ap->ops->dev_select(ap, 0);
1974 /* if no devices were detected, disable this port */
1975 if ((ap->device[0].class == ATA_DEV_NONE) &&
1976 (ap->device[1].class == ATA_DEV_NONE))
1979 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1980 /* set up device control for ATA_FLAG_SATA_RESET */
1981 if (ap->flags & ATA_FLAG_MMIO)
1982 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1984 outb(ap->ctl, ioaddr->ctl_addr);
1991 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1992 ap->ops->port_disable(ap);
1997 static int sata_phy_resume(struct ata_port *ap)
1999 unsigned long timeout = jiffies + (HZ * 5);
2002 scr_write_flush(ap, SCR_CONTROL, 0x300);
2004 /* Wait for phy to become ready, if necessary. */
2007 sstatus = scr_read(ap, SCR_STATUS);
2008 if ((sstatus & 0xf) != 1)
2010 } while (time_before(jiffies, timeout));
2016 * ata_std_probeinit - initialize probing
2017 * @ap: port to be probed
2019 * @ap is about to be probed. Initialize it. This function is
2020 * to be used as standard callback for ata_drive_probe_reset().
2022 * NOTE!!! Do not use this function as probeinit if a low level
2023 * driver implements only hardreset. Just pass NULL as probeinit
2024 * in that case. Using this function is probably okay but doing
2025 * so makes reset sequence different from the original
2026 * ->phy_reset implementation and Jeff nervous. :-P
2028 extern void ata_std_probeinit(struct ata_port *ap)
2030 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
2031 sata_phy_resume(ap);
2032 if (sata_dev_present(ap))
2033 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2038 * ata_std_softreset - reset host port via ATA SRST
2039 * @ap: port to reset
2040 * @verbose: fail verbosely
2041 * @classes: resulting classes of attached devices
2043 * Reset host port using ATA SRST. This function is to be used
2044 * as standard callback for ata_drive_*_reset() functions.
2047 * Kernel thread context (may sleep)
2050 * 0 on success, -errno otherwise.
2052 int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2054 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2055 unsigned int devmask = 0, err_mask;
2060 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2061 classes[0] = ATA_DEV_NONE;
2065 /* determine if device 0/1 are present */
2066 if (ata_devchk(ap, 0))
2067 devmask |= (1 << 0);
2068 if (slave_possible && ata_devchk(ap, 1))
2069 devmask |= (1 << 1);
2071 /* select device 0 again */
2072 ap->ops->dev_select(ap, 0);
2074 /* issue bus reset */
2075 DPRINTK("about to softreset, devmask=%x\n", devmask);
2076 err_mask = ata_bus_softreset(ap, devmask);
2079 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2082 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2087 /* determine by signature whether we have ATA or ATAPI devices */
2088 classes[0] = ata_dev_try_classify(ap, 0, &err);
2089 if (slave_possible && err != 0x81)
2090 classes[1] = ata_dev_try_classify(ap, 1, &err);
2093 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2098 * sata_std_hardreset - reset host port via SATA phy reset
2099 * @ap: port to reset
2100 * @verbose: fail verbosely
2101 * @class: resulting class of attached device
2103 * SATA phy-reset host port using DET bits of SControl register.
2104 * This function is to be used as standard callback for
2105 * ata_drive_*_reset().
2108 * Kernel thread context (may sleep)
2111 * 0 on success, -errno otherwise.
2113 int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2117 /* Issue phy wake/reset */
2118 scr_write_flush(ap, SCR_CONTROL, 0x301);
2121 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2122 * 10.4.2 says at least 1 ms.
2126 /* Bring phy back */
2127 sata_phy_resume(ap);
2129 /* TODO: phy layer with polling, timeouts, etc. */
2130 if (!sata_dev_present(ap)) {
2131 *class = ATA_DEV_NONE;
2132 DPRINTK("EXIT, link offline\n");
2136 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2138 printk(KERN_ERR "ata%u: COMRESET failed "
2139 "(device not ready)\n", ap->id);
2141 DPRINTK("EXIT, device not ready\n");
2145 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2147 *class = ata_dev_try_classify(ap, 0, NULL);
2149 DPRINTK("EXIT, class=%u\n", *class);
2154 * ata_std_postreset - standard postreset callback
2155 * @ap: the target ata_port
2156 * @classes: classes of attached devices
2158 * This function is invoked after a successful reset. Note that
2159 * the device might have been reset more than once using
2160 * different reset methods before postreset is invoked.
2162 * This function is to be used as standard callback for
2163 * ata_drive_*_reset().
2166 * Kernel thread context (may sleep)
2168 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2172 /* set cable type if it isn't already set */
2173 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2174 ap->cbl = ATA_CBL_SATA;
2176 /* print link status */
2177 if (ap->cbl == ATA_CBL_SATA)
2178 sata_print_link_status(ap);
2180 /* re-enable interrupts */
2181 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2184 /* is double-select really necessary? */
2185 if (classes[0] != ATA_DEV_NONE)
2186 ap->ops->dev_select(ap, 1);
2187 if (classes[1] != ATA_DEV_NONE)
2188 ap->ops->dev_select(ap, 0);
2190 /* bail out if no device is present */
2191 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2192 DPRINTK("EXIT, no device\n");
2196 /* set up device control */
2197 if (ap->ioaddr.ctl_addr) {
2198 if (ap->flags & ATA_FLAG_MMIO)
2199 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2201 outb(ap->ctl, ap->ioaddr.ctl_addr);
2208 * ata_std_probe_reset - standard probe reset method
2209 * @ap: prot to perform probe-reset
2210 * @classes: resulting classes of attached devices
2212 * The stock off-the-shelf ->probe_reset method.
2215 * Kernel thread context (may sleep)
2218 * 0 on success, -errno otherwise.
2220 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2222 ata_reset_fn_t hardreset;
2225 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
2226 hardreset = sata_std_hardreset;
2228 return ata_drive_probe_reset(ap, ata_std_probeinit,
2229 ata_std_softreset, hardreset,
2230 ata_std_postreset, classes);
2233 static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2234 ata_postreset_fn_t postreset,
2235 unsigned int *classes)
2239 for (i = 0; i < ATA_MAX_DEVICES; i++)
2240 classes[i] = ATA_DEV_UNKNOWN;
2242 rc = reset(ap, 0, classes);
2246 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2247 * is complete and convert all ATA_DEV_UNKNOWN to
2250 for (i = 0; i < ATA_MAX_DEVICES; i++)
2251 if (classes[i] != ATA_DEV_UNKNOWN)
2254 if (i < ATA_MAX_DEVICES)
2255 for (i = 0; i < ATA_MAX_DEVICES; i++)
2256 if (classes[i] == ATA_DEV_UNKNOWN)
2257 classes[i] = ATA_DEV_NONE;
2260 postreset(ap, classes);
2262 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2266 * ata_drive_probe_reset - Perform probe reset with given methods
2267 * @ap: port to reset
2268 * @probeinit: probeinit method (can be NULL)
2269 * @softreset: softreset method (can be NULL)
2270 * @hardreset: hardreset method (can be NULL)
2271 * @postreset: postreset method (can be NULL)
2272 * @classes: resulting classes of attached devices
2274 * Reset the specified port and classify attached devices using
2275 * given methods. This function prefers softreset but tries all
2276 * possible reset sequences to reset and classify devices. This
2277 * function is intended to be used for constructing ->probe_reset
2278 * callback by low level drivers.
2280 * Reset methods should follow the following rules.
2282 * - Return 0 on sucess, -errno on failure.
2283 * - If classification is supported, fill classes[] with
2284 * recognized class codes.
2285 * - If classification is not supported, leave classes[] alone.
2286 * - If verbose is non-zero, print error message on failure;
2287 * otherwise, shut up.
2290 * Kernel thread context (may sleep)
2293 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2294 * if classification fails, and any error code from reset
2297 int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2298 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2299 ata_postreset_fn_t postreset, unsigned int *classes)
2307 rc = do_probe_reset(ap, softreset, postreset, classes);
2315 rc = do_probe_reset(ap, hardreset, postreset, classes);
2316 if (rc == 0 || rc != -ENODEV)
2320 rc = do_probe_reset(ap, softreset, postreset, classes);
2325 static void ata_pr_blacklisted(const struct ata_port *ap,
2326 const struct ata_device *dev)
2328 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2329 ap->id, dev->devno);
2332 static const char * const ata_dma_blacklist [] = {
2351 "Toshiba CD-ROM XM-6202B",
2352 "TOSHIBA CD-ROM XM-1702BC",
2354 "E-IDE CD-ROM CR-840",
2357 "SAMSUNG CD-ROM SC-148C",
2358 "SAMSUNG CD-ROM SC",
2360 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2364 static int ata_dma_blacklisted(const struct ata_device *dev)
2366 unsigned char model_num[41];
2369 ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num));
2371 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2372 if (!strcmp(ata_dma_blacklist[i], model_num))
2378 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2380 const struct ata_device *master, *slave;
2383 master = &ap->device[0];
2384 slave = &ap->device[1];
2386 WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave));
2388 if (shift == ATA_SHIFT_UDMA) {
2389 mask = ap->udma_mask;
2390 if (ata_dev_present(master)) {
2391 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2392 if (ata_dma_blacklisted(master)) {
2394 ata_pr_blacklisted(ap, master);
2397 if (ata_dev_present(slave)) {
2398 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2399 if (ata_dma_blacklisted(slave)) {
2401 ata_pr_blacklisted(ap, slave);
2405 else if (shift == ATA_SHIFT_MWDMA) {
2406 mask = ap->mwdma_mask;
2407 if (ata_dev_present(master)) {
2408 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2409 if (ata_dma_blacklisted(master)) {
2411 ata_pr_blacklisted(ap, master);
2414 if (ata_dev_present(slave)) {
2415 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2416 if (ata_dma_blacklisted(slave)) {
2418 ata_pr_blacklisted(ap, slave);
2422 else if (shift == ATA_SHIFT_PIO) {
2423 mask = ap->pio_mask;
2424 if (ata_dev_present(master)) {
2425 /* spec doesn't return explicit support for
2426 * PIO0-2, so we fake it
2428 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2433 if (ata_dev_present(slave)) {
2434 /* spec doesn't return explicit support for
2435 * PIO0-2, so we fake it
2437 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2444 mask = 0xffffffff; /* shut up compiler warning */
2451 /* find greatest bit */
2452 static int fgb(u32 bitmap)
2457 for (i = 0; i < 32; i++)
2458 if (bitmap & (1 << i))
2465 * ata_choose_xfer_mode - attempt to find best transfer mode
2466 * @ap: Port for which an xfer mode will be selected
2467 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2468 * @xfer_shift_out: (output) bit shift that selects this mode
2470 * Based on host and device capabilities, determine the
2471 * maximum transfer mode that is amenable to all.
2474 * PCI/etc. bus probe sem.
2477 * Zero on success, negative on error.
2480 static int ata_choose_xfer_mode(const struct ata_port *ap,
2482 unsigned int *xfer_shift_out)
2484 unsigned int mask, shift;
2487 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2488 shift = xfer_mode_classes[i].shift;
2489 mask = ata_get_mode_mask(ap, shift);
2493 *xfer_mode_out = xfer_mode_classes[i].base + x;
2494 *xfer_shift_out = shift;
2503 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2504 * @ap: Port associated with device @dev
2505 * @dev: Device to which command will be sent
2507 * Issue SET FEATURES - XFER MODE command to device @dev
2511 * PCI/etc. bus probe sem.
2514 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2516 struct ata_taskfile tf;
2518 /* set up set-features taskfile */
2519 DPRINTK("set features - xfer mode\n");
2521 ata_tf_init(ap, &tf, dev->devno);
2522 tf.command = ATA_CMD_SET_FEATURES;
2523 tf.feature = SETFEATURES_XFER;
2524 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2525 tf.protocol = ATA_PROT_NODATA;
2526 tf.nsect = dev->xfer_mode;
2528 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2529 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2531 ata_port_disable(ap);
2538 * ata_dev_reread_id - Reread the device identify device info
2539 * @ap: port where the device is
2540 * @dev: device to reread the identify device info
2545 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2547 struct ata_taskfile tf;
2549 ata_tf_init(ap, &tf, dev->devno);
2551 if (dev->class == ATA_DEV_ATA) {
2552 tf.command = ATA_CMD_ID_ATA;
2553 DPRINTK("do ATA identify\n");
2555 tf.command = ATA_CMD_ID_ATAPI;
2556 DPRINTK("do ATAPI identify\n");
2559 tf.flags |= ATA_TFLAG_DEVICE;
2560 tf.protocol = ATA_PROT_PIO;
2562 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2563 dev->id, sizeof(dev->id)))
2566 swap_buf_le16(dev->id, ATA_ID_WORDS);
2568 ata_dump_id(dev->id);
2574 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
2575 ata_port_disable(ap);
2579 * ata_dev_init_params - Issue INIT DEV PARAMS command
2580 * @ap: Port associated with device @dev
2581 * @dev: Device to which command will be sent
2584 * Kernel thread context (may sleep)
2587 * 0 on success, AC_ERR_* mask otherwise.
2590 static unsigned int ata_dev_init_params(struct ata_port *ap,
2591 struct ata_device *dev)
2593 struct ata_taskfile tf;
2594 unsigned int err_mask;
2595 u16 sectors = dev->id[6];
2596 u16 heads = dev->id[3];
2598 /* Number of sectors per track 1-255. Number of heads 1-16 */
2599 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2602 /* set up init dev params taskfile */
2603 DPRINTK("init dev params \n");
2605 ata_tf_init(ap, &tf, dev->devno);
2606 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2607 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2608 tf.protocol = ATA_PROT_NODATA;
2610 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2612 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
2614 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2619 * ata_sg_clean - Unmap DMA memory associated with command
2620 * @qc: Command containing DMA memory to be released
2622 * Unmap all mapped DMA memory associated with this command.
2625 * spin_lock_irqsave(host_set lock)
2628 static void ata_sg_clean(struct ata_queued_cmd *qc)
2630 struct ata_port *ap = qc->ap;
2631 struct scatterlist *sg = qc->__sg;
2632 int dir = qc->dma_dir;
2633 void *pad_buf = NULL;
2635 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2636 WARN_ON(sg == NULL);
2638 if (qc->flags & ATA_QCFLAG_SINGLE)
2639 WARN_ON(qc->n_elem > 1);
2641 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2643 /* if we padded the buffer out to 32-bit bound, and data
2644 * xfer direction is from-device, we must copy from the
2645 * pad buffer back into the supplied buffer
2647 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2648 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2650 if (qc->flags & ATA_QCFLAG_SG) {
2652 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2653 /* restore last sg */
2654 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2656 struct scatterlist *psg = &qc->pad_sgent;
2657 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2658 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2659 kunmap_atomic(addr, KM_IRQ0);
2663 dma_unmap_single(ap->host_set->dev,
2664 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2667 sg->length += qc->pad_len;
2669 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2670 pad_buf, qc->pad_len);
2673 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2678 * ata_fill_sg - Fill PCI IDE PRD table
2679 * @qc: Metadata associated with taskfile to be transferred
2681 * Fill PCI IDE PRD (scatter-gather) table with segments
2682 * associated with the current disk command.
2685 * spin_lock_irqsave(host_set lock)
2688 static void ata_fill_sg(struct ata_queued_cmd *qc)
2690 struct ata_port *ap = qc->ap;
2691 struct scatterlist *sg;
2694 WARN_ON(qc->__sg == NULL);
2695 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
2698 ata_for_each_sg(sg, qc) {
2702 /* determine if physical DMA addr spans 64K boundary.
2703 * Note h/w doesn't support 64-bit, so we unconditionally
2704 * truncate dma_addr_t to u32.
2706 addr = (u32) sg_dma_address(sg);
2707 sg_len = sg_dma_len(sg);
2710 offset = addr & 0xffff;
2712 if ((offset + sg_len) > 0x10000)
2713 len = 0x10000 - offset;
2715 ap->prd[idx].addr = cpu_to_le32(addr);
2716 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2717 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2726 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2729 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2730 * @qc: Metadata associated with taskfile to check
2732 * Allow low-level driver to filter ATA PACKET commands, returning
2733 * a status indicating whether or not it is OK to use DMA for the
2734 * supplied PACKET command.
2737 * spin_lock_irqsave(host_set lock)
2739 * RETURNS: 0 when ATAPI DMA can be used
2742 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2744 struct ata_port *ap = qc->ap;
2745 int rc = 0; /* Assume ATAPI DMA is OK by default */
2747 if (ap->ops->check_atapi_dma)
2748 rc = ap->ops->check_atapi_dma(qc);
2753 * ata_qc_prep - Prepare taskfile for submission
2754 * @qc: Metadata associated with taskfile to be prepared
2756 * Prepare ATA taskfile for submission.
2759 * spin_lock_irqsave(host_set lock)
2761 void ata_qc_prep(struct ata_queued_cmd *qc)
2763 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2770 * ata_sg_init_one - Associate command with memory buffer
2771 * @qc: Command to be associated
2772 * @buf: Memory buffer
2773 * @buflen: Length of memory buffer, in bytes.
2775 * Initialize the data-related elements of queued_cmd @qc
2776 * to point to a single memory buffer, @buf of byte length @buflen.
2779 * spin_lock_irqsave(host_set lock)
2782 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2784 struct scatterlist *sg;
2786 qc->flags |= ATA_QCFLAG_SINGLE;
2788 memset(&qc->sgent, 0, sizeof(qc->sgent));
2789 qc->__sg = &qc->sgent;
2791 qc->orig_n_elem = 1;
2795 sg_init_one(sg, buf, buflen);
2799 * ata_sg_init - Associate command with scatter-gather table.
2800 * @qc: Command to be associated
2801 * @sg: Scatter-gather table.
2802 * @n_elem: Number of elements in s/g table.
2804 * Initialize the data-related elements of queued_cmd @qc
2805 * to point to a scatter-gather table @sg, containing @n_elem
2809 * spin_lock_irqsave(host_set lock)
2812 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2813 unsigned int n_elem)
2815 qc->flags |= ATA_QCFLAG_SG;
2817 qc->n_elem = n_elem;
2818 qc->orig_n_elem = n_elem;
2822 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2823 * @qc: Command with memory buffer to be mapped.
2825 * DMA-map the memory buffer associated with queued_cmd @qc.
2828 * spin_lock_irqsave(host_set lock)
2831 * Zero on success, negative on error.
2834 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2836 struct ata_port *ap = qc->ap;
2837 int dir = qc->dma_dir;
2838 struct scatterlist *sg = qc->__sg;
2839 dma_addr_t dma_address;
2842 /* we must lengthen transfers to end on a 32-bit boundary */
2843 qc->pad_len = sg->length & 3;
2845 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2846 struct scatterlist *psg = &qc->pad_sgent;
2848 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
2850 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2852 if (qc->tf.flags & ATA_TFLAG_WRITE)
2853 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2856 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2857 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2859 sg->length -= qc->pad_len;
2860 if (sg->length == 0)
2863 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2864 sg->length, qc->pad_len);
2872 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2874 if (dma_mapping_error(dma_address)) {
2876 sg->length += qc->pad_len;
2880 sg_dma_address(sg) = dma_address;
2881 sg_dma_len(sg) = sg->length;
2884 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2885 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2891 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2892 * @qc: Command with scatter-gather table to be mapped.
2894 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2897 * spin_lock_irqsave(host_set lock)
2900 * Zero on success, negative on error.
2904 static int ata_sg_setup(struct ata_queued_cmd *qc)
2906 struct ata_port *ap = qc->ap;
2907 struct scatterlist *sg = qc->__sg;
2908 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2909 int n_elem, pre_n_elem, dir, trim_sg = 0;
2911 VPRINTK("ENTER, ata%u\n", ap->id);
2912 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
2914 /* we must lengthen transfers to end on a 32-bit boundary */
2915 qc->pad_len = lsg->length & 3;
2917 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2918 struct scatterlist *psg = &qc->pad_sgent;
2919 unsigned int offset;
2921 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
2923 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2926 * psg->page/offset are used to copy to-be-written
2927 * data in this function or read data in ata_sg_clean.
2929 offset = lsg->offset + lsg->length - qc->pad_len;
2930 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2931 psg->offset = offset_in_page(offset);
2933 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2934 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2935 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2936 kunmap_atomic(addr, KM_IRQ0);
2939 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2940 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2942 lsg->length -= qc->pad_len;
2943 if (lsg->length == 0)
2946 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2947 qc->n_elem - 1, lsg->length, qc->pad_len);
2950 pre_n_elem = qc->n_elem;
2951 if (trim_sg && pre_n_elem)
2960 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
2962 /* restore last sg */
2963 lsg->length += qc->pad_len;
2967 DPRINTK("%d sg elements mapped\n", n_elem);
2970 qc->n_elem = n_elem;
2976 * ata_poll_qc_complete - turn irq back on and finish qc
2977 * @qc: Command to complete
2978 * @err_mask: ATA status register content
2981 * None. (grabs host lock)
2984 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
2986 struct ata_port *ap = qc->ap;
2987 unsigned long flags;
2989 spin_lock_irqsave(&ap->host_set->lock, flags);
2990 ap->flags &= ~ATA_FLAG_NOINTR;
2992 ata_qc_complete(qc);
2993 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2997 * ata_pio_poll - poll using PIO, depending on current state
2998 * @ap: the target ata_port
3001 * None. (executing in kernel thread context)
3004 * timeout value to use
3007 static unsigned long ata_pio_poll(struct ata_port *ap)
3009 struct ata_queued_cmd *qc;
3011 unsigned int poll_state = HSM_ST_UNKNOWN;
3012 unsigned int reg_state = HSM_ST_UNKNOWN;
3014 qc = ata_qc_from_tag(ap, ap->active_tag);
3015 WARN_ON(qc == NULL);
3017 switch (ap->hsm_task_state) {
3020 poll_state = HSM_ST_POLL;
3024 case HSM_ST_LAST_POLL:
3025 poll_state = HSM_ST_LAST_POLL;
3026 reg_state = HSM_ST_LAST;
3033 status = ata_chk_status(ap);
3034 if (status & ATA_BUSY) {
3035 if (time_after(jiffies, ap->pio_task_timeout)) {
3036 qc->err_mask |= AC_ERR_TIMEOUT;
3037 ap->hsm_task_state = HSM_ST_TMOUT;
3040 ap->hsm_task_state = poll_state;
3041 return ATA_SHORT_PAUSE;
3044 ap->hsm_task_state = reg_state;
3049 * ata_pio_complete - check if drive is busy or idle
3050 * @ap: the target ata_port
3053 * None. (executing in kernel thread context)
3056 * Non-zero if qc completed, zero otherwise.
3059 static int ata_pio_complete (struct ata_port *ap)
3061 struct ata_queued_cmd *qc;
3065 * This is purely heuristic. This is a fast path. Sometimes when
3066 * we enter, BSY will be cleared in a chk-status or two. If not,
3067 * the drive is probably seeking or something. Snooze for a couple
3068 * msecs, then chk-status again. If still busy, fall back to
3069 * HSM_ST_POLL state.
3071 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3072 if (drv_stat & ATA_BUSY) {
3074 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3075 if (drv_stat & ATA_BUSY) {
3076 ap->hsm_task_state = HSM_ST_LAST_POLL;
3077 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3082 qc = ata_qc_from_tag(ap, ap->active_tag);
3083 WARN_ON(qc == NULL);
3085 drv_stat = ata_wait_idle(ap);
3086 if (!ata_ok(drv_stat)) {
3087 qc->err_mask |= __ac_err_mask(drv_stat);
3088 ap->hsm_task_state = HSM_ST_ERR;
3092 ap->hsm_task_state = HSM_ST_IDLE;
3094 WARN_ON(qc->err_mask);
3095 ata_poll_qc_complete(qc);
3097 /* another command may start at this point */
3104 * swap_buf_le16 - swap halves of 16-bit words in place
3105 * @buf: Buffer to swap
3106 * @buf_words: Number of 16-bit words in buffer.
3108 * Swap halves of 16-bit words if needed to convert from
3109 * little-endian byte order to native cpu byte order, or
3113 * Inherited from caller.
3115 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3120 for (i = 0; i < buf_words; i++)
3121 buf[i] = le16_to_cpu(buf[i]);
3122 #endif /* __BIG_ENDIAN */
3126 * ata_mmio_data_xfer - Transfer data by MMIO
3127 * @ap: port to read/write
3129 * @buflen: buffer length
3130 * @write_data: read/write
3132 * Transfer data from/to the device data register by MMIO.
3135 * Inherited from caller.
3138 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3139 unsigned int buflen, int write_data)
3142 unsigned int words = buflen >> 1;
3143 u16 *buf16 = (u16 *) buf;
3144 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3146 /* Transfer multiple of 2 bytes */
3148 for (i = 0; i < words; i++)
3149 writew(le16_to_cpu(buf16[i]), mmio);
3151 for (i = 0; i < words; i++)
3152 buf16[i] = cpu_to_le16(readw(mmio));
3155 /* Transfer trailing 1 byte, if any. */
3156 if (unlikely(buflen & 0x01)) {
3157 u16 align_buf[1] = { 0 };
3158 unsigned char *trailing_buf = buf + buflen - 1;
3161 memcpy(align_buf, trailing_buf, 1);
3162 writew(le16_to_cpu(align_buf[0]), mmio);
3164 align_buf[0] = cpu_to_le16(readw(mmio));
3165 memcpy(trailing_buf, align_buf, 1);
3171 * ata_pio_data_xfer - Transfer data by PIO
3172 * @ap: port to read/write
3174 * @buflen: buffer length
3175 * @write_data: read/write
3177 * Transfer data from/to the device data register by PIO.
3180 * Inherited from caller.
3183 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3184 unsigned int buflen, int write_data)
3186 unsigned int words = buflen >> 1;
3188 /* Transfer multiple of 2 bytes */
3190 outsw(ap->ioaddr.data_addr, buf, words);
3192 insw(ap->ioaddr.data_addr, buf, words);
3194 /* Transfer trailing 1 byte, if any. */
3195 if (unlikely(buflen & 0x01)) {
3196 u16 align_buf[1] = { 0 };
3197 unsigned char *trailing_buf = buf + buflen - 1;
3200 memcpy(align_buf, trailing_buf, 1);
3201 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3203 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3204 memcpy(trailing_buf, align_buf, 1);
3210 * ata_data_xfer - Transfer data from/to the data register.
3211 * @ap: port to read/write
3213 * @buflen: buffer length
3214 * @do_write: read/write
3216 * Transfer data from/to the device data register.
3219 * Inherited from caller.
3222 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3223 unsigned int buflen, int do_write)
3225 /* Make the crap hardware pay the costs not the good stuff */
3226 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3227 unsigned long flags;
3228 local_irq_save(flags);
3229 if (ap->flags & ATA_FLAG_MMIO)
3230 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3232 ata_pio_data_xfer(ap, buf, buflen, do_write);
3233 local_irq_restore(flags);
3235 if (ap->flags & ATA_FLAG_MMIO)
3236 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3238 ata_pio_data_xfer(ap, buf, buflen, do_write);
3243 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3244 * @qc: Command on going
3246 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3249 * Inherited from caller.
3252 static void ata_pio_sector(struct ata_queued_cmd *qc)
3254 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3255 struct scatterlist *sg = qc->__sg;
3256 struct ata_port *ap = qc->ap;
3258 unsigned int offset;
3261 if (qc->cursect == (qc->nsect - 1))
3262 ap->hsm_task_state = HSM_ST_LAST;
3264 page = sg[qc->cursg].page;
3265 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3267 /* get the current page and offset */
3268 page = nth_page(page, (offset >> PAGE_SHIFT));
3269 offset %= PAGE_SIZE;
3271 buf = kmap(page) + offset;
3276 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3281 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3283 /* do the actual data transfer */
3284 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3285 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3291 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3292 * @qc: Command on going
3293 * @bytes: number of bytes
3295 * Transfer Transfer data from/to the ATAPI device.
3298 * Inherited from caller.
3302 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3304 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3305 struct scatterlist *sg = qc->__sg;
3306 struct ata_port *ap = qc->ap;
3309 unsigned int offset, count;
3311 if (qc->curbytes + bytes >= qc->nbytes)
3312 ap->hsm_task_state = HSM_ST_LAST;
3315 if (unlikely(qc->cursg >= qc->n_elem)) {
3317 * The end of qc->sg is reached and the device expects
3318 * more data to transfer. In order not to overrun qc->sg
3319 * and fulfill length specified in the byte count register,
3320 * - for read case, discard trailing data from the device
3321 * - for write case, padding zero data to the device
3323 u16 pad_buf[1] = { 0 };
3324 unsigned int words = bytes >> 1;
3327 if (words) /* warning if bytes > 1 */
3328 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3331 for (i = 0; i < words; i++)
3332 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3334 ap->hsm_task_state = HSM_ST_LAST;
3338 sg = &qc->__sg[qc->cursg];
3341 offset = sg->offset + qc->cursg_ofs;
3343 /* get the current page and offset */
3344 page = nth_page(page, (offset >> PAGE_SHIFT));
3345 offset %= PAGE_SIZE;
3347 /* don't overrun current sg */
3348 count = min(sg->length - qc->cursg_ofs, bytes);
3350 /* don't cross page boundaries */
3351 count = min(count, (unsigned int)PAGE_SIZE - offset);
3353 buf = kmap(page) + offset;
3356 qc->curbytes += count;
3357 qc->cursg_ofs += count;
3359 if (qc->cursg_ofs == sg->length) {
3364 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3366 /* do the actual data transfer */
3367 ata_data_xfer(ap, buf, count, do_write);
3376 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3377 * @qc: Command on going
3379 * Transfer Transfer data from/to the ATAPI device.
3382 * Inherited from caller.
3385 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3387 struct ata_port *ap = qc->ap;
3388 struct ata_device *dev = qc->dev;
3389 unsigned int ireason, bc_lo, bc_hi, bytes;
3390 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3392 ap->ops->tf_read(ap, &qc->tf);
3393 ireason = qc->tf.nsect;
3394 bc_lo = qc->tf.lbam;
3395 bc_hi = qc->tf.lbah;
3396 bytes = (bc_hi << 8) | bc_lo;
3398 /* shall be cleared to zero, indicating xfer of data */
3399 if (ireason & (1 << 0))
3402 /* make sure transfer direction matches expected */
3403 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3404 if (do_write != i_write)
3407 __atapi_pio_bytes(qc, bytes);
3412 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3413 ap->id, dev->devno);
3414 qc->err_mask |= AC_ERR_HSM;
3415 ap->hsm_task_state = HSM_ST_ERR;
3419 * ata_pio_block - start PIO on a block
3420 * @ap: the target ata_port
3423 * None. (executing in kernel thread context)
3426 static void ata_pio_block(struct ata_port *ap)
3428 struct ata_queued_cmd *qc;
3432 * This is purely heuristic. This is a fast path.
3433 * Sometimes when we enter, BSY will be cleared in
3434 * a chk-status or two. If not, the drive is probably seeking
3435 * or something. Snooze for a couple msecs, then
3436 * chk-status again. If still busy, fall back to
3437 * HSM_ST_POLL state.
3439 status = ata_busy_wait(ap, ATA_BUSY, 5);
3440 if (status & ATA_BUSY) {
3442 status = ata_busy_wait(ap, ATA_BUSY, 10);
3443 if (status & ATA_BUSY) {
3444 ap->hsm_task_state = HSM_ST_POLL;
3445 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3450 qc = ata_qc_from_tag(ap, ap->active_tag);
3451 WARN_ON(qc == NULL);
3454 if (status & (ATA_ERR | ATA_DF)) {
3455 qc->err_mask |= AC_ERR_DEV;
3456 ap->hsm_task_state = HSM_ST_ERR;
3460 /* transfer data if any */
3461 if (is_atapi_taskfile(&qc->tf)) {
3462 /* DRQ=0 means no more data to transfer */
3463 if ((status & ATA_DRQ) == 0) {
3464 ap->hsm_task_state = HSM_ST_LAST;
3468 atapi_pio_bytes(qc);
3470 /* handle BSY=0, DRQ=0 as error */
3471 if ((status & ATA_DRQ) == 0) {
3472 qc->err_mask |= AC_ERR_HSM;
3473 ap->hsm_task_state = HSM_ST_ERR;
3481 static void ata_pio_error(struct ata_port *ap)
3483 struct ata_queued_cmd *qc;
3485 qc = ata_qc_from_tag(ap, ap->active_tag);
3486 WARN_ON(qc == NULL);
3488 if (qc->tf.command != ATA_CMD_PACKET)
3489 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3491 /* make sure qc->err_mask is available to
3492 * know what's wrong and recover
3494 WARN_ON(qc->err_mask == 0);
3496 ap->hsm_task_state = HSM_ST_IDLE;
3498 ata_poll_qc_complete(qc);
3501 static void ata_pio_task(void *_data)
3503 struct ata_port *ap = _data;
3504 unsigned long timeout;
3511 switch (ap->hsm_task_state) {
3520 qc_completed = ata_pio_complete(ap);
3524 case HSM_ST_LAST_POLL:
3525 timeout = ata_pio_poll(ap);
3535 ata_queue_delayed_pio_task(ap, timeout);
3536 else if (!qc_completed)
3541 * ata_qc_timeout - Handle timeout of queued command
3542 * @qc: Command that timed out
3544 * Some part of the kernel (currently, only the SCSI layer)
3545 * has noticed that the active command on port @ap has not
3546 * completed after a specified length of time. Handle this
3547 * condition by disabling DMA (if necessary) and completing
3548 * transactions, with error if necessary.
3550 * This also handles the case of the "lost interrupt", where
3551 * for some reason (possibly hardware bug, possibly driver bug)
3552 * an interrupt was not delivered to the driver, even though the
3553 * transaction completed successfully.
3556 * Inherited from SCSI layer (none, can sleep)
3559 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3561 struct ata_port *ap = qc->ap;
3562 struct ata_host_set *host_set = ap->host_set;
3563 u8 host_stat = 0, drv_stat;
3564 unsigned long flags;
3568 ata_flush_pio_tasks(ap);
3569 ap->hsm_task_state = HSM_ST_IDLE;
3571 spin_lock_irqsave(&host_set->lock, flags);
3573 switch (qc->tf.protocol) {
3576 case ATA_PROT_ATAPI_DMA:
3577 host_stat = ap->ops->bmdma_status(ap);
3579 /* before we do anything else, clear DMA-Start bit */
3580 ap->ops->bmdma_stop(qc);
3586 drv_stat = ata_chk_status(ap);
3588 /* ack bmdma irq events */
3589 ap->ops->irq_clear(ap);
3591 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3592 ap->id, qc->tf.command, drv_stat, host_stat);
3594 /* complete taskfile transaction */
3595 qc->err_mask |= ac_err_mask(drv_stat);
3599 spin_unlock_irqrestore(&host_set->lock, flags);
3601 ata_eh_qc_complete(qc);
3607 * ata_eng_timeout - Handle timeout of queued command
3608 * @ap: Port on which timed-out command is active
3610 * Some part of the kernel (currently, only the SCSI layer)
3611 * has noticed that the active command on port @ap has not
3612 * completed after a specified length of time. Handle this
3613 * condition by disabling DMA (if necessary) and completing
3614 * transactions, with error if necessary.
3616 * This also handles the case of the "lost interrupt", where
3617 * for some reason (possibly hardware bug, possibly driver bug)
3618 * an interrupt was not delivered to the driver, even though the
3619 * transaction completed successfully.
3622 * Inherited from SCSI layer (none, can sleep)
3625 void ata_eng_timeout(struct ata_port *ap)
3629 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
3635 * ata_qc_new - Request an available ATA command, for queueing
3636 * @ap: Port associated with device @dev
3637 * @dev: Device from whom we request an available command structure
3643 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3645 struct ata_queued_cmd *qc = NULL;
3648 for (i = 0; i < ATA_MAX_QUEUE; i++)
3649 if (!test_and_set_bit(i, &ap->qactive)) {
3650 qc = ata_qc_from_tag(ap, i);
3661 * ata_qc_new_init - Request an available ATA command, and initialize it
3662 * @ap: Port associated with device @dev
3663 * @dev: Device from whom we request an available command structure
3669 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3670 struct ata_device *dev)
3672 struct ata_queued_cmd *qc;
3674 qc = ata_qc_new(ap);
3687 * ata_qc_free - free unused ata_queued_cmd
3688 * @qc: Command to complete
3690 * Designed to free unused ata_queued_cmd object
3691 * in case something prevents using it.
3694 * spin_lock_irqsave(host_set lock)
3696 void ata_qc_free(struct ata_queued_cmd *qc)
3698 struct ata_port *ap = qc->ap;
3701 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3705 if (likely(ata_tag_valid(tag))) {
3706 if (tag == ap->active_tag)
3707 ap->active_tag = ATA_TAG_POISON;
3708 qc->tag = ATA_TAG_POISON;
3709 clear_bit(tag, &ap->qactive);
3713 void __ata_qc_complete(struct ata_queued_cmd *qc)
3715 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3716 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3718 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3721 /* atapi: mark qc as inactive to prevent the interrupt handler
3722 * from completing the command twice later, before the error handler
3723 * is called. (when rc != 0 and atapi request sense is needed)
3725 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3727 /* call completion callback */
3728 qc->complete_fn(qc);
3731 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3733 struct ata_port *ap = qc->ap;
3735 switch (qc->tf.protocol) {
3737 case ATA_PROT_ATAPI_DMA:
3740 case ATA_PROT_ATAPI:
3742 case ATA_PROT_PIO_MULT:
3743 if (ap->flags & ATA_FLAG_PIO_DMA)
3756 * ata_qc_issue - issue taskfile to device
3757 * @qc: command to issue to device
3759 * Prepare an ATA command to submission to device.
3760 * This includes mapping the data into a DMA-able
3761 * area, filling in the S/G table, and finally
3762 * writing the taskfile to hardware, starting the command.
3765 * spin_lock_irqsave(host_set lock)
3768 * Zero on success, AC_ERR_* mask on failure
3771 unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
3773 struct ata_port *ap = qc->ap;
3775 if (ata_should_dma_map(qc)) {
3776 if (qc->flags & ATA_QCFLAG_SG) {
3777 if (ata_sg_setup(qc))
3779 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3780 if (ata_sg_setup_one(qc))
3784 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3787 ap->ops->qc_prep(qc);
3789 qc->ap->active_tag = qc->tag;
3790 qc->flags |= ATA_QCFLAG_ACTIVE;
3792 return ap->ops->qc_issue(qc);
3795 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3796 return AC_ERR_SYSTEM;
3801 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3802 * @qc: command to issue to device
3804 * Using various libata functions and hooks, this function
3805 * starts an ATA command. ATA commands are grouped into
3806 * classes called "protocols", and issuing each type of protocol
3807 * is slightly different.
3809 * May be used as the qc_issue() entry in ata_port_operations.
3812 * spin_lock_irqsave(host_set lock)
3815 * Zero on success, AC_ERR_* mask on failure
3818 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3820 struct ata_port *ap = qc->ap;
3822 ata_dev_select(ap, qc->dev->devno, 1, 0);
3824 switch (qc->tf.protocol) {
3825 case ATA_PROT_NODATA:
3826 ata_tf_to_host(ap, &qc->tf);
3830 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3831 ap->ops->bmdma_setup(qc); /* set up bmdma */
3832 ap->ops->bmdma_start(qc); /* initiate bmdma */
3835 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3836 ata_qc_set_polling(qc);
3837 ata_tf_to_host(ap, &qc->tf);
3838 ap->hsm_task_state = HSM_ST;
3839 ata_queue_pio_task(ap);
3842 case ATA_PROT_ATAPI:
3843 ata_qc_set_polling(qc);
3844 ata_tf_to_host(ap, &qc->tf);
3845 ata_queue_packet_task(ap);
3848 case ATA_PROT_ATAPI_NODATA:
3849 ap->flags |= ATA_FLAG_NOINTR;
3850 ata_tf_to_host(ap, &qc->tf);
3851 ata_queue_packet_task(ap);
3854 case ATA_PROT_ATAPI_DMA:
3855 ap->flags |= ATA_FLAG_NOINTR;
3856 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3857 ap->ops->bmdma_setup(qc); /* set up bmdma */
3858 ata_queue_packet_task(ap);
3863 return AC_ERR_SYSTEM;
3870 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3871 * @qc: Info associated with this ATA transaction.
3874 * spin_lock_irqsave(host_set lock)
3877 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3879 struct ata_port *ap = qc->ap;
3880 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3882 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3884 /* load PRD table addr. */
3885 mb(); /* make sure PRD table writes are visible to controller */
3886 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3888 /* specify data direction, triple-check start bit is clear */
3889 dmactl = readb(mmio + ATA_DMA_CMD);
3890 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3892 dmactl |= ATA_DMA_WR;
3893 writeb(dmactl, mmio + ATA_DMA_CMD);
3895 /* issue r/w command */
3896 ap->ops->exec_command(ap, &qc->tf);
3900 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3901 * @qc: Info associated with this ATA transaction.
3904 * spin_lock_irqsave(host_set lock)
3907 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3909 struct ata_port *ap = qc->ap;
3910 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3913 /* start host DMA transaction */
3914 dmactl = readb(mmio + ATA_DMA_CMD);
3915 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3917 /* Strictly, one may wish to issue a readb() here, to
3918 * flush the mmio write. However, control also passes
3919 * to the hardware at this point, and it will interrupt
3920 * us when we are to resume control. So, in effect,
3921 * we don't care when the mmio write flushes.
3922 * Further, a read of the DMA status register _immediately_
3923 * following the write may not be what certain flaky hardware
3924 * is expected, so I think it is best to not add a readb()
3925 * without first all the MMIO ATA cards/mobos.
3926 * Or maybe I'm just being paranoid.
3931 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3932 * @qc: Info associated with this ATA transaction.
3935 * spin_lock_irqsave(host_set lock)
3938 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3940 struct ata_port *ap = qc->ap;
3941 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3944 /* load PRD table addr. */
3945 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3947 /* specify data direction, triple-check start bit is clear */
3948 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3949 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3951 dmactl |= ATA_DMA_WR;
3952 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3954 /* issue r/w command */
3955 ap->ops->exec_command(ap, &qc->tf);
3959 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3960 * @qc: Info associated with this ATA transaction.
3963 * spin_lock_irqsave(host_set lock)
3966 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3968 struct ata_port *ap = qc->ap;
3971 /* start host DMA transaction */
3972 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3973 outb(dmactl | ATA_DMA_START,
3974 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3979 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3980 * @qc: Info associated with this ATA transaction.
3982 * Writes the ATA_DMA_START flag to the DMA command register.
3984 * May be used as the bmdma_start() entry in ata_port_operations.
3987 * spin_lock_irqsave(host_set lock)
3989 void ata_bmdma_start(struct ata_queued_cmd *qc)
3991 if (qc->ap->flags & ATA_FLAG_MMIO)
3992 ata_bmdma_start_mmio(qc);
3994 ata_bmdma_start_pio(qc);
3999 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4000 * @qc: Info associated with this ATA transaction.
4002 * Writes address of PRD table to device's PRD Table Address
4003 * register, sets the DMA control register, and calls
4004 * ops->exec_command() to start the transfer.
4006 * May be used as the bmdma_setup() entry in ata_port_operations.
4009 * spin_lock_irqsave(host_set lock)
4011 void ata_bmdma_setup(struct ata_queued_cmd *qc)
4013 if (qc->ap->flags & ATA_FLAG_MMIO)
4014 ata_bmdma_setup_mmio(qc);
4016 ata_bmdma_setup_pio(qc);
4021 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
4022 * @ap: Port associated with this ATA transaction.
4024 * Clear interrupt and error flags in DMA status register.
4026 * May be used as the irq_clear() entry in ata_port_operations.
4029 * spin_lock_irqsave(host_set lock)
4032 void ata_bmdma_irq_clear(struct ata_port *ap)
4034 if (ap->flags & ATA_FLAG_MMIO) {
4035 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4036 writeb(readb(mmio), mmio);
4038 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4039 outb(inb(addr), addr);
4046 * ata_bmdma_status - Read PCI IDE BMDMA status
4047 * @ap: Port associated with this ATA transaction.
4049 * Read and return BMDMA status register.
4051 * May be used as the bmdma_status() entry in ata_port_operations.
4054 * spin_lock_irqsave(host_set lock)
4057 u8 ata_bmdma_status(struct ata_port *ap)
4060 if (ap->flags & ATA_FLAG_MMIO) {
4061 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4062 host_stat = readb(mmio + ATA_DMA_STATUS);
4064 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
4070 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
4071 * @qc: Command we are ending DMA for
4073 * Clears the ATA_DMA_START flag in the dma control register
4075 * May be used as the bmdma_stop() entry in ata_port_operations.
4078 * spin_lock_irqsave(host_set lock)
4081 void ata_bmdma_stop(struct ata_queued_cmd *qc)
4083 struct ata_port *ap = qc->ap;
4084 if (ap->flags & ATA_FLAG_MMIO) {
4085 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4087 /* clear start/stop bit */
4088 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4089 mmio + ATA_DMA_CMD);
4091 /* clear start/stop bit */
4092 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4093 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4096 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4097 ata_altstatus(ap); /* dummy read */
4101 * ata_host_intr - Handle host interrupt for given (port, task)
4102 * @ap: Port on which interrupt arrived (possibly...)
4103 * @qc: Taskfile currently active in engine
4105 * Handle host interrupt for given queued command. Currently,
4106 * only DMA interrupts are handled. All other commands are
4107 * handled via polling with interrupts disabled (nIEN bit).
4110 * spin_lock_irqsave(host_set lock)
4113 * One if interrupt was handled, zero if not (shared irq).
4116 inline unsigned int ata_host_intr (struct ata_port *ap,
4117 struct ata_queued_cmd *qc)
4119 u8 status, host_stat;
4121 switch (qc->tf.protocol) {
4124 case ATA_PROT_ATAPI_DMA:
4125 case ATA_PROT_ATAPI:
4126 /* check status of DMA engine */
4127 host_stat = ap->ops->bmdma_status(ap);
4128 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4130 /* if it's not our irq... */
4131 if (!(host_stat & ATA_DMA_INTR))
4134 /* before we do anything else, clear DMA-Start bit */
4135 ap->ops->bmdma_stop(qc);
4139 case ATA_PROT_ATAPI_NODATA:
4140 case ATA_PROT_NODATA:
4141 /* check altstatus */
4142 status = ata_altstatus(ap);
4143 if (status & ATA_BUSY)
4146 /* check main status, clearing INTRQ */
4147 status = ata_chk_status(ap);
4148 if (unlikely(status & ATA_BUSY))
4150 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4151 ap->id, qc->tf.protocol, status);
4153 /* ack bmdma irq events */
4154 ap->ops->irq_clear(ap);
4156 /* complete taskfile transaction */
4157 qc->err_mask |= ac_err_mask(status);
4158 ata_qc_complete(qc);
4165 return 1; /* irq handled */
4168 ap->stats.idle_irq++;
4171 if ((ap->stats.idle_irq % 1000) == 0) {
4173 ata_irq_ack(ap, 0); /* debug trap */
4174 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4177 return 0; /* irq not handled */
4181 * ata_interrupt - Default ATA host interrupt handler
4182 * @irq: irq line (unused)
4183 * @dev_instance: pointer to our ata_host_set information structure
4186 * Default interrupt handler for PCI IDE devices. Calls
4187 * ata_host_intr() for each port that is not disabled.
4190 * Obtains host_set lock during operation.
4193 * IRQ_NONE or IRQ_HANDLED.
4196 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4198 struct ata_host_set *host_set = dev_instance;
4200 unsigned int handled = 0;
4201 unsigned long flags;
4203 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4204 spin_lock_irqsave(&host_set->lock, flags);
4206 for (i = 0; i < host_set->n_ports; i++) {
4207 struct ata_port *ap;
4209 ap = host_set->ports[i];
4211 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4212 struct ata_queued_cmd *qc;
4214 qc = ata_qc_from_tag(ap, ap->active_tag);
4215 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4216 (qc->flags & ATA_QCFLAG_ACTIVE))
4217 handled |= ata_host_intr(ap, qc);
4221 spin_unlock_irqrestore(&host_set->lock, flags);
4223 return IRQ_RETVAL(handled);
4227 * atapi_packet_task - Write CDB bytes to hardware
4228 * @_data: Port to which ATAPI device is attached.
4230 * When device has indicated its readiness to accept
4231 * a CDB, this function is called. Send the CDB.
4232 * If DMA is to be performed, exit immediately.
4233 * Otherwise, we are in polling mode, so poll
4234 * status under operation succeeds or fails.
4237 * Kernel thread context (may sleep)
4240 static void atapi_packet_task(void *_data)
4242 struct ata_port *ap = _data;
4243 struct ata_queued_cmd *qc;
4246 qc = ata_qc_from_tag(ap, ap->active_tag);
4247 WARN_ON(qc == NULL);
4248 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4250 /* sleep-wait for BSY to clear */
4251 DPRINTK("busy wait\n");
4252 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
4253 qc->err_mask |= AC_ERR_TIMEOUT;
4257 /* make sure DRQ is set */
4258 status = ata_chk_status(ap);
4259 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
4260 qc->err_mask |= AC_ERR_HSM;
4265 DPRINTK("send cdb\n");
4266 WARN_ON(qc->dev->cdb_len < 12);
4268 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4269 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4270 unsigned long flags;
4272 /* Once we're done issuing command and kicking bmdma,
4273 * irq handler takes over. To not lose irq, we need
4274 * to clear NOINTR flag before sending cdb, but
4275 * interrupt handler shouldn't be invoked before we're
4276 * finished. Hence, the following locking.
4278 spin_lock_irqsave(&ap->host_set->lock, flags);
4279 ap->flags &= ~ATA_FLAG_NOINTR;
4280 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4281 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4282 ap->ops->bmdma_start(qc); /* initiate bmdma */
4283 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4285 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4287 /* PIO commands are handled by polling */
4288 ap->hsm_task_state = HSM_ST;
4289 ata_queue_pio_task(ap);
4295 ata_poll_qc_complete(qc);
4300 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4301 * without filling any other registers
4303 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4306 struct ata_taskfile tf;
4309 ata_tf_init(ap, &tf, dev->devno);
4312 tf.flags |= ATA_TFLAG_DEVICE;
4313 tf.protocol = ATA_PROT_NODATA;
4315 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4317 printk(KERN_ERR "%s: ata command failed: %d\n",
4323 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4327 if (!ata_try_flush_cache(dev))
4330 if (ata_id_has_flush_ext(dev->id))
4331 cmd = ATA_CMD_FLUSH_EXT;
4333 cmd = ATA_CMD_FLUSH;
4335 return ata_do_simple_cmd(ap, dev, cmd);
4338 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4340 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4343 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4345 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4349 * ata_device_resume - wakeup a previously suspended devices
4350 * @ap: port the device is connected to
4351 * @dev: the device to resume
4353 * Kick the drive back into action, by sending it an idle immediate
4354 * command and making sure its transfer mode matches between drive
4358 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4360 if (ap->flags & ATA_FLAG_SUSPENDED) {
4361 ap->flags &= ~ATA_FLAG_SUSPENDED;
4364 if (!ata_dev_present(dev))
4366 if (dev->class == ATA_DEV_ATA)
4367 ata_start_drive(ap, dev);
4373 * ata_device_suspend - prepare a device for suspend
4374 * @ap: port the device is connected to
4375 * @dev: the device to suspend
4377 * Flush the cache on the drive, if appropriate, then issue a
4378 * standbynow command.
4380 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4382 if (!ata_dev_present(dev))
4384 if (dev->class == ATA_DEV_ATA)
4385 ata_flush_cache(ap, dev);
4387 ata_standby_drive(ap, dev);
4388 ap->flags |= ATA_FLAG_SUSPENDED;
4393 * ata_port_start - Set port up for dma.
4394 * @ap: Port to initialize
4396 * Called just after data structures for each port are
4397 * initialized. Allocates space for PRD table.
4399 * May be used as the port_start() entry in ata_port_operations.
4402 * Inherited from caller.
4405 int ata_port_start (struct ata_port *ap)
4407 struct device *dev = ap->host_set->dev;
4410 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4414 rc = ata_pad_alloc(ap, dev);
4416 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4420 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4427 * ata_port_stop - Undo ata_port_start()
4428 * @ap: Port to shut down
4430 * Frees the PRD table.
4432 * May be used as the port_stop() entry in ata_port_operations.
4435 * Inherited from caller.
4438 void ata_port_stop (struct ata_port *ap)
4440 struct device *dev = ap->host_set->dev;
4442 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4443 ata_pad_free(ap, dev);
4446 void ata_host_stop (struct ata_host_set *host_set)
4448 if (host_set->mmio_base)
4449 iounmap(host_set->mmio_base);
4454 * ata_host_remove - Unregister SCSI host structure with upper layers
4455 * @ap: Port to unregister
4456 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4459 * Inherited from caller.
4462 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4464 struct Scsi_Host *sh = ap->host;
4469 scsi_remove_host(sh);
4471 ap->ops->port_stop(ap);
4475 * ata_host_init - Initialize an ata_port structure
4476 * @ap: Structure to initialize
4477 * @host: associated SCSI mid-layer structure
4478 * @host_set: Collection of hosts to which @ap belongs
4479 * @ent: Probe information provided by low-level driver
4480 * @port_no: Port number associated with this ata_port
4482 * Initialize a new ata_port structure, and its associated
4486 * Inherited from caller.
4489 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4490 struct ata_host_set *host_set,
4491 const struct ata_probe_ent *ent, unsigned int port_no)
4497 host->max_channel = 1;
4498 host->unique_id = ata_unique_id++;
4499 host->max_cmd_len = 12;
4501 ap->flags = ATA_FLAG_PORT_DISABLED;
4502 ap->id = host->unique_id;
4504 ap->ctl = ATA_DEVCTL_OBS;
4505 ap->host_set = host_set;
4506 ap->port_no = port_no;
4508 ent->legacy_mode ? ent->hard_port_no : port_no;
4509 ap->pio_mask = ent->pio_mask;
4510 ap->mwdma_mask = ent->mwdma_mask;
4511 ap->udma_mask = ent->udma_mask;
4512 ap->flags |= ent->host_flags;
4513 ap->ops = ent->port_ops;
4514 ap->cbl = ATA_CBL_NONE;
4515 ap->active_tag = ATA_TAG_POISON;
4516 ap->last_ctl = 0xFF;
4518 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4519 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4520 INIT_LIST_HEAD(&ap->eh_done_q);
4522 for (i = 0; i < ATA_MAX_DEVICES; i++)
4523 ap->device[i].devno = i;
4526 ap->stats.unhandled_irq = 1;
4527 ap->stats.idle_irq = 1;
4530 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4534 * ata_host_add - Attach low-level ATA driver to system
4535 * @ent: Information provided by low-level driver
4536 * @host_set: Collections of ports to which we add
4537 * @port_no: Port number associated with this host
4539 * Attach low-level ATA driver to system.
4542 * PCI/etc. bus probe sem.
4545 * New ata_port on success, for NULL on error.
4548 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4549 struct ata_host_set *host_set,
4550 unsigned int port_no)
4552 struct Scsi_Host *host;
4553 struct ata_port *ap;
4557 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4561 ap = (struct ata_port *) &host->hostdata[0];
4563 ata_host_init(ap, host, host_set, ent, port_no);
4565 rc = ap->ops->port_start(ap);
4572 scsi_host_put(host);
4577 * ata_device_add - Register hardware device with ATA and SCSI layers
4578 * @ent: Probe information describing hardware device to be registered
4580 * This function processes the information provided in the probe
4581 * information struct @ent, allocates the necessary ATA and SCSI
4582 * host information structures, initializes them, and registers
4583 * everything with requisite kernel subsystems.
4585 * This function requests irqs, probes the ATA bus, and probes
4589 * PCI/etc. bus probe sem.
4592 * Number of ports registered. Zero on error (no ports registered).
4595 int ata_device_add(const struct ata_probe_ent *ent)
4597 unsigned int count = 0, i;
4598 struct device *dev = ent->dev;
4599 struct ata_host_set *host_set;
4602 /* alloc a container for our list of ATA ports (buses) */
4603 host_set = kzalloc(sizeof(struct ata_host_set) +
4604 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4607 spin_lock_init(&host_set->lock);
4609 host_set->dev = dev;
4610 host_set->n_ports = ent->n_ports;
4611 host_set->irq = ent->irq;
4612 host_set->mmio_base = ent->mmio_base;
4613 host_set->private_data = ent->private_data;
4614 host_set->ops = ent->port_ops;
4616 /* register each port bound to this device */
4617 for (i = 0; i < ent->n_ports; i++) {
4618 struct ata_port *ap;
4619 unsigned long xfer_mode_mask;
4621 ap = ata_host_add(ent, host_set, i);
4625 host_set->ports[i] = ap;
4626 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4627 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4628 (ap->pio_mask << ATA_SHIFT_PIO);
4630 /* print per-port info to dmesg */
4631 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4632 "bmdma 0x%lX irq %lu\n",
4634 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4635 ata_mode_string(xfer_mode_mask),
4636 ap->ioaddr.cmd_addr,
4637 ap->ioaddr.ctl_addr,
4638 ap->ioaddr.bmdma_addr,
4642 host_set->ops->irq_clear(ap);
4649 /* obtain irq, that is shared between channels */
4650 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4651 DRV_NAME, host_set))
4654 /* perform each probe synchronously */
4655 DPRINTK("probe begin\n");
4656 for (i = 0; i < count; i++) {
4657 struct ata_port *ap;
4660 ap = host_set->ports[i];
4662 DPRINTK("ata%u: bus probe begin\n", ap->id);
4663 rc = ata_bus_probe(ap);
4664 DPRINTK("ata%u: bus probe end\n", ap->id);
4667 /* FIXME: do something useful here?
4668 * Current libata behavior will
4669 * tear down everything when
4670 * the module is removed
4671 * or the h/w is unplugged.
4675 rc = scsi_add_host(ap->host, dev);
4677 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4679 /* FIXME: do something useful here */
4680 /* FIXME: handle unconditional calls to
4681 * scsi_scan_host and ata_host_remove, below,
4687 /* probes are done, now scan each port's disk(s) */
4688 DPRINTK("host probe begin\n");
4689 for (i = 0; i < count; i++) {
4690 struct ata_port *ap = host_set->ports[i];
4692 ata_scsi_scan_host(ap);
4695 dev_set_drvdata(dev, host_set);
4697 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4698 return ent->n_ports; /* success */
4701 for (i = 0; i < count; i++) {
4702 ata_host_remove(host_set->ports[i], 1);
4703 scsi_host_put(host_set->ports[i]->host);
4707 VPRINTK("EXIT, returning 0\n");
4712 * ata_host_set_remove - PCI layer callback for device removal
4713 * @host_set: ATA host set that was removed
4715 * Unregister all objects associated with this host set. Free those
4719 * Inherited from calling layer (may sleep).
4722 void ata_host_set_remove(struct ata_host_set *host_set)
4724 struct ata_port *ap;
4727 for (i = 0; i < host_set->n_ports; i++) {
4728 ap = host_set->ports[i];
4729 scsi_remove_host(ap->host);
4732 free_irq(host_set->irq, host_set);
4734 for (i = 0; i < host_set->n_ports; i++) {
4735 ap = host_set->ports[i];
4737 ata_scsi_release(ap->host);
4739 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4740 struct ata_ioports *ioaddr = &ap->ioaddr;
4742 if (ioaddr->cmd_addr == 0x1f0)
4743 release_region(0x1f0, 8);
4744 else if (ioaddr->cmd_addr == 0x170)
4745 release_region(0x170, 8);
4748 scsi_host_put(ap->host);
4751 if (host_set->ops->host_stop)
4752 host_set->ops->host_stop(host_set);
4758 * ata_scsi_release - SCSI layer callback hook for host unload
4759 * @host: libata host to be unloaded
4761 * Performs all duties necessary to shut down a libata port...
4762 * Kill port kthread, disable port, and release resources.
4765 * Inherited from SCSI layer.
4771 int ata_scsi_release(struct Scsi_Host *host)
4773 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4777 ap->ops->port_disable(ap);
4778 ata_host_remove(ap, 0);
4785 * ata_std_ports - initialize ioaddr with standard port offsets.
4786 * @ioaddr: IO address structure to be initialized
4788 * Utility function which initializes data_addr, error_addr,
4789 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4790 * device_addr, status_addr, and command_addr to standard offsets
4791 * relative to cmd_addr.
4793 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4796 void ata_std_ports(struct ata_ioports *ioaddr)
4798 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4799 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4800 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4801 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4802 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4803 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4804 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4805 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4806 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4807 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4813 void ata_pci_host_stop (struct ata_host_set *host_set)
4815 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4817 pci_iounmap(pdev, host_set->mmio_base);
4821 * ata_pci_remove_one - PCI layer callback for device removal
4822 * @pdev: PCI device that was removed
4824 * PCI layer indicates to libata via this hook that
4825 * hot-unplug or module unload event has occurred.
4826 * Handle this by unregistering all objects associated
4827 * with this PCI device. Free those objects. Then finally
4828 * release PCI resources and disable device.
4831 * Inherited from PCI layer (may sleep).
4834 void ata_pci_remove_one (struct pci_dev *pdev)
4836 struct device *dev = pci_dev_to_dev(pdev);
4837 struct ata_host_set *host_set = dev_get_drvdata(dev);
4839 ata_host_set_remove(host_set);
4840 pci_release_regions(pdev);
4841 pci_disable_device(pdev);
4842 dev_set_drvdata(dev, NULL);
4845 /* move to PCI subsystem */
4846 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4848 unsigned long tmp = 0;
4850 switch (bits->width) {
4853 pci_read_config_byte(pdev, bits->reg, &tmp8);
4859 pci_read_config_word(pdev, bits->reg, &tmp16);
4865 pci_read_config_dword(pdev, bits->reg, &tmp32);
4876 return (tmp == bits->val) ? 1 : 0;
4879 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4881 pci_save_state(pdev);
4882 pci_disable_device(pdev);
4883 pci_set_power_state(pdev, PCI_D3hot);
4887 int ata_pci_device_resume(struct pci_dev *pdev)
4889 pci_set_power_state(pdev, PCI_D0);
4890 pci_restore_state(pdev);
4891 pci_enable_device(pdev);
4892 pci_set_master(pdev);
4895 #endif /* CONFIG_PCI */
4898 static int __init ata_init(void)
4900 ata_wq = create_workqueue("ata");
4904 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4908 static void __exit ata_exit(void)
4910 destroy_workqueue(ata_wq);
4913 module_init(ata_init);
4914 module_exit(ata_exit);
4916 static unsigned long ratelimit_time;
4917 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4919 int ata_ratelimit(void)
4922 unsigned long flags;
4924 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4926 if (time_after(jiffies, ratelimit_time)) {
4928 ratelimit_time = jiffies + (HZ/5);
4932 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4938 * libata is essentially a library of internal helper functions for
4939 * low-level ATA host controller drivers. As such, the API/ABI is
4940 * likely to change as new drivers are added and updated.
4941 * Do not depend on ABI/API stability.
4944 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4945 EXPORT_SYMBOL_GPL(ata_std_ports);
4946 EXPORT_SYMBOL_GPL(ata_device_add);
4947 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4948 EXPORT_SYMBOL_GPL(ata_sg_init);
4949 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4950 EXPORT_SYMBOL_GPL(__ata_qc_complete);
4951 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4952 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4953 EXPORT_SYMBOL_GPL(ata_tf_load);
4954 EXPORT_SYMBOL_GPL(ata_tf_read);
4955 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4956 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4957 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4958 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4959 EXPORT_SYMBOL_GPL(ata_check_status);
4960 EXPORT_SYMBOL_GPL(ata_altstatus);
4961 EXPORT_SYMBOL_GPL(ata_exec_command);
4962 EXPORT_SYMBOL_GPL(ata_port_start);
4963 EXPORT_SYMBOL_GPL(ata_port_stop);
4964 EXPORT_SYMBOL_GPL(ata_host_stop);
4965 EXPORT_SYMBOL_GPL(ata_interrupt);
4966 EXPORT_SYMBOL_GPL(ata_qc_prep);
4967 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4968 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4969 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4970 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4971 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4972 EXPORT_SYMBOL_GPL(ata_port_probe);
4973 EXPORT_SYMBOL_GPL(sata_phy_reset);
4974 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4975 EXPORT_SYMBOL_GPL(ata_bus_reset);
4976 EXPORT_SYMBOL_GPL(ata_std_probeinit);
4977 EXPORT_SYMBOL_GPL(ata_std_softreset);
4978 EXPORT_SYMBOL_GPL(sata_std_hardreset);
4979 EXPORT_SYMBOL_GPL(ata_std_postreset);
4980 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
4981 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
4982 EXPORT_SYMBOL_GPL(ata_port_disable);
4983 EXPORT_SYMBOL_GPL(ata_ratelimit);
4984 EXPORT_SYMBOL_GPL(ata_busy_sleep);
4985 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4986 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4987 EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
4988 EXPORT_SYMBOL_GPL(ata_scsi_error);
4989 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4990 EXPORT_SYMBOL_GPL(ata_scsi_release);
4991 EXPORT_SYMBOL_GPL(ata_host_intr);
4992 EXPORT_SYMBOL_GPL(ata_dev_classify);
4993 EXPORT_SYMBOL_GPL(ata_id_string);
4994 EXPORT_SYMBOL_GPL(ata_id_c_string);
4995 EXPORT_SYMBOL_GPL(ata_dev_config);
4996 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4997 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
4998 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5000 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5001 EXPORT_SYMBOL_GPL(ata_timing_compute);
5002 EXPORT_SYMBOL_GPL(ata_timing_merge);
5005 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5006 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5007 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5008 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5009 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5010 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5011 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5012 #endif /* CONFIG_PCI */
5014 EXPORT_SYMBOL_GPL(ata_device_suspend);
5015 EXPORT_SYMBOL_GPL(ata_device_resume);
5016 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5017 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);