2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static unsigned int ata_busy_sleep (struct ata_port *ap,
65 unsigned long tmout_pat,
67 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
68 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
69 static void ata_set_mode(struct ata_port *ap);
70 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
71 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
72 static int fgb(u32 bitmap);
73 static int ata_choose_xfer_mode(const struct ata_port *ap,
75 unsigned int *xfer_shift_out);
77 static unsigned int ata_unique_id = 1;
78 static struct workqueue_struct *ata_wq;
80 int atapi_enabled = 0;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
84 MODULE_AUTHOR("Jeff Garzik");
85 MODULE_DESCRIPTION("Library module for ATA devices");
86 MODULE_LICENSE("GPL");
87 MODULE_VERSION(DRV_VERSION);
90 * ata_tf_load_pio - send taskfile registers to host controller
91 * @ap: Port to which output is sent
92 * @tf: ATA taskfile register set
94 * Outputs ATA taskfile to standard ATA host controller.
97 * Inherited from caller.
100 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
102 struct ata_ioports *ioaddr = &ap->ioaddr;
103 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
105 if (tf->ctl != ap->last_ctl) {
106 outb(tf->ctl, ioaddr->ctl_addr);
107 ap->last_ctl = tf->ctl;
111 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
112 outb(tf->hob_feature, ioaddr->feature_addr);
113 outb(tf->hob_nsect, ioaddr->nsect_addr);
114 outb(tf->hob_lbal, ioaddr->lbal_addr);
115 outb(tf->hob_lbam, ioaddr->lbam_addr);
116 outb(tf->hob_lbah, ioaddr->lbah_addr);
117 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
126 outb(tf->feature, ioaddr->feature_addr);
127 outb(tf->nsect, ioaddr->nsect_addr);
128 outb(tf->lbal, ioaddr->lbal_addr);
129 outb(tf->lbam, ioaddr->lbam_addr);
130 outb(tf->lbah, ioaddr->lbah_addr);
131 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
139 if (tf->flags & ATA_TFLAG_DEVICE) {
140 outb(tf->device, ioaddr->device_addr);
141 VPRINTK("device 0x%X\n", tf->device);
148 * ata_tf_load_mmio - send taskfile registers to host controller
149 * @ap: Port to which output is sent
150 * @tf: ATA taskfile register set
152 * Outputs ATA taskfile to standard ATA host controller using MMIO.
155 * Inherited from caller.
158 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
160 struct ata_ioports *ioaddr = &ap->ioaddr;
161 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
163 if (tf->ctl != ap->last_ctl) {
164 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
165 ap->last_ctl = tf->ctl;
169 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
170 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
171 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
172 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
173 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
174 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
175 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
184 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
185 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
186 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
187 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
188 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
189 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
197 if (tf->flags & ATA_TFLAG_DEVICE) {
198 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
199 VPRINTK("device 0x%X\n", tf->device);
207 * ata_tf_load - send taskfile registers to host controller
208 * @ap: Port to which output is sent
209 * @tf: ATA taskfile register set
211 * Outputs ATA taskfile to standard ATA host controller using MMIO
212 * or PIO as indicated by the ATA_FLAG_MMIO flag.
213 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
214 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
215 * hob_lbal, hob_lbam, and hob_lbah.
217 * This function waits for idle (!BUSY and !DRQ) after writing
218 * registers. If the control register has a new value, this
219 * function also waits for idle after writing control and before
220 * writing the remaining registers.
222 * May be used as the tf_load() entry in ata_port_operations.
225 * Inherited from caller.
227 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
229 if (ap->flags & ATA_FLAG_MMIO)
230 ata_tf_load_mmio(ap, tf);
232 ata_tf_load_pio(ap, tf);
236 * ata_exec_command_pio - issue ATA command to host controller
237 * @ap: port to which command is being issued
238 * @tf: ATA taskfile register set
240 * Issues PIO write to ATA command register, with proper
241 * synchronization with interrupt handler / other threads.
244 * spin_lock_irqsave(host_set lock)
247 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
249 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
251 outb(tf->command, ap->ioaddr.command_addr);
257 * ata_exec_command_mmio - issue ATA command to host controller
258 * @ap: port to which command is being issued
259 * @tf: ATA taskfile register set
261 * Issues MMIO write to ATA command register, with proper
262 * synchronization with interrupt handler / other threads.
265 * spin_lock_irqsave(host_set lock)
268 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
270 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
272 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
278 * ata_exec_command - issue ATA command to host controller
279 * @ap: port to which command is being issued
280 * @tf: ATA taskfile register set
282 * Issues PIO/MMIO write to ATA command register, with proper
283 * synchronization with interrupt handler / other threads.
286 * spin_lock_irqsave(host_set lock)
288 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
290 if (ap->flags & ATA_FLAG_MMIO)
291 ata_exec_command_mmio(ap, tf);
293 ata_exec_command_pio(ap, tf);
297 * ata_tf_to_host - issue ATA taskfile to host controller
298 * @ap: port to which command is being issued
299 * @tf: ATA taskfile register set
301 * Issues ATA taskfile register set to ATA host controller,
302 * with proper synchronization with interrupt handler and
306 * spin_lock_irqsave(host_set lock)
309 static inline void ata_tf_to_host(struct ata_port *ap,
310 const struct ata_taskfile *tf)
312 ap->ops->tf_load(ap, tf);
313 ap->ops->exec_command(ap, tf);
317 * ata_tf_read_pio - input device's ATA taskfile shadow registers
318 * @ap: Port from which input is read
319 * @tf: ATA taskfile register set for storing input
321 * Reads ATA taskfile registers for currently-selected device
325 * Inherited from caller.
328 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
330 struct ata_ioports *ioaddr = &ap->ioaddr;
332 tf->command = ata_check_status(ap);
333 tf->feature = inb(ioaddr->error_addr);
334 tf->nsect = inb(ioaddr->nsect_addr);
335 tf->lbal = inb(ioaddr->lbal_addr);
336 tf->lbam = inb(ioaddr->lbam_addr);
337 tf->lbah = inb(ioaddr->lbah_addr);
338 tf->device = inb(ioaddr->device_addr);
340 if (tf->flags & ATA_TFLAG_LBA48) {
341 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
342 tf->hob_feature = inb(ioaddr->error_addr);
343 tf->hob_nsect = inb(ioaddr->nsect_addr);
344 tf->hob_lbal = inb(ioaddr->lbal_addr);
345 tf->hob_lbam = inb(ioaddr->lbam_addr);
346 tf->hob_lbah = inb(ioaddr->lbah_addr);
351 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
352 * @ap: Port from which input is read
353 * @tf: ATA taskfile register set for storing input
355 * Reads ATA taskfile registers for currently-selected device
359 * Inherited from caller.
362 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
364 struct ata_ioports *ioaddr = &ap->ioaddr;
366 tf->command = ata_check_status(ap);
367 tf->feature = readb((void __iomem *)ioaddr->error_addr);
368 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
369 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
370 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
371 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
372 tf->device = readb((void __iomem *)ioaddr->device_addr);
374 if (tf->flags & ATA_TFLAG_LBA48) {
375 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
376 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
377 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
378 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
379 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
380 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
386 * ata_tf_read - input device's ATA taskfile shadow registers
387 * @ap: Port from which input is read
388 * @tf: ATA taskfile register set for storing input
390 * Reads ATA taskfile registers for currently-selected device
393 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
394 * is set, also reads the hob registers.
396 * May be used as the tf_read() entry in ata_port_operations.
399 * Inherited from caller.
401 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
403 if (ap->flags & ATA_FLAG_MMIO)
404 ata_tf_read_mmio(ap, tf);
406 ata_tf_read_pio(ap, tf);
410 * ata_check_status_pio - Read device status reg & clear interrupt
411 * @ap: port where the device is
413 * Reads ATA taskfile status register for currently-selected device
414 * and return its value. This also clears pending interrupts
418 * Inherited from caller.
420 static u8 ata_check_status_pio(struct ata_port *ap)
422 return inb(ap->ioaddr.status_addr);
426 * ata_check_status_mmio - Read device status reg & clear interrupt
427 * @ap: port where the device is
429 * Reads ATA taskfile status register for currently-selected device
430 * via MMIO and return its value. This also clears pending interrupts
434 * Inherited from caller.
436 static u8 ata_check_status_mmio(struct ata_port *ap)
438 return readb((void __iomem *) ap->ioaddr.status_addr);
443 * ata_check_status - Read device status reg & clear interrupt
444 * @ap: port where the device is
446 * Reads ATA taskfile status register for currently-selected device
447 * and return its value. This also clears pending interrupts
450 * May be used as the check_status() entry in ata_port_operations.
453 * Inherited from caller.
455 u8 ata_check_status(struct ata_port *ap)
457 if (ap->flags & ATA_FLAG_MMIO)
458 return ata_check_status_mmio(ap);
459 return ata_check_status_pio(ap);
464 * ata_altstatus - Read device alternate status reg
465 * @ap: port where the device is
467 * Reads ATA taskfile alternate status register for
468 * currently-selected device and return its value.
470 * Note: may NOT be used as the check_altstatus() entry in
471 * ata_port_operations.
474 * Inherited from caller.
476 u8 ata_altstatus(struct ata_port *ap)
478 if (ap->ops->check_altstatus)
479 return ap->ops->check_altstatus(ap);
481 if (ap->flags & ATA_FLAG_MMIO)
482 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
483 return inb(ap->ioaddr.altstatus_addr);
488 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
489 * @tf: Taskfile to convert
490 * @fis: Buffer into which data will output
491 * @pmp: Port multiplier port
493 * Converts a standard ATA taskfile to a Serial ATA
494 * FIS structure (Register - Host to Device).
497 * Inherited from caller.
500 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
502 fis[0] = 0x27; /* Register - Host to Device FIS */
503 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
504 bit 7 indicates Command FIS */
505 fis[2] = tf->command;
506 fis[3] = tf->feature;
513 fis[8] = tf->hob_lbal;
514 fis[9] = tf->hob_lbam;
515 fis[10] = tf->hob_lbah;
516 fis[11] = tf->hob_feature;
519 fis[13] = tf->hob_nsect;
530 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
531 * @fis: Buffer from which data will be input
532 * @tf: Taskfile to output
534 * Converts a serial ATA FIS structure to a standard ATA taskfile.
537 * Inherited from caller.
540 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
542 tf->command = fis[2]; /* status */
543 tf->feature = fis[3]; /* error */
550 tf->hob_lbal = fis[8];
551 tf->hob_lbam = fis[9];
552 tf->hob_lbah = fis[10];
555 tf->hob_nsect = fis[13];
558 static const u8 ata_rw_cmds[] = {
562 ATA_CMD_READ_MULTI_EXT,
563 ATA_CMD_WRITE_MULTI_EXT,
567 ATA_CMD_WRITE_MULTI_FUA_EXT,
571 ATA_CMD_PIO_READ_EXT,
572 ATA_CMD_PIO_WRITE_EXT,
585 ATA_CMD_WRITE_FUA_EXT
589 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
590 * @qc: command to examine and configure
592 * Examine the device configuration and tf->flags to calculate
593 * the proper read/write commands and protocol to use.
598 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
600 struct ata_taskfile *tf = &qc->tf;
601 struct ata_device *dev = qc->dev;
604 int index, fua, lba48, write;
606 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
607 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
608 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
610 if (dev->flags & ATA_DFLAG_PIO) {
611 tf->protocol = ATA_PROT_PIO;
612 index = dev->multi_count ? 0 : 8;
613 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
614 /* Unable to use DMA due to host limitation */
615 tf->protocol = ATA_PROT_PIO;
616 index = dev->multi_count ? 0 : 4;
618 tf->protocol = ATA_PROT_DMA;
622 cmd = ata_rw_cmds[index + fua + lba48 + write];
630 static const char * const xfer_mode_str[] = {
650 * ata_udma_string - convert UDMA bit offset to string
651 * @mask: mask of bits supported; only highest bit counts.
653 * Determine string which represents the highest speed
654 * (highest bit in @udma_mask).
660 * Constant C string representing highest speed listed in
661 * @udma_mask, or the constant C string "<n/a>".
664 static const char *ata_mode_string(unsigned int mask)
668 for (i = 7; i >= 0; i--)
671 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
674 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
681 return xfer_mode_str[i];
685 * ata_pio_devchk - PATA device presence detection
686 * @ap: ATA channel to examine
687 * @device: Device to examine (starting at zero)
689 * This technique was originally described in
690 * Hale Landis's ATADRVR (www.ata-atapi.com), and
691 * later found its way into the ATA/ATAPI spec.
693 * Write a pattern to the ATA shadow registers,
694 * and if a device is present, it will respond by
695 * correctly storing and echoing back the
696 * ATA shadow register contents.
702 static unsigned int ata_pio_devchk(struct ata_port *ap,
705 struct ata_ioports *ioaddr = &ap->ioaddr;
708 ap->ops->dev_select(ap, device);
710 outb(0x55, ioaddr->nsect_addr);
711 outb(0xaa, ioaddr->lbal_addr);
713 outb(0xaa, ioaddr->nsect_addr);
714 outb(0x55, ioaddr->lbal_addr);
716 outb(0x55, ioaddr->nsect_addr);
717 outb(0xaa, ioaddr->lbal_addr);
719 nsect = inb(ioaddr->nsect_addr);
720 lbal = inb(ioaddr->lbal_addr);
722 if ((nsect == 0x55) && (lbal == 0xaa))
723 return 1; /* we found a device */
725 return 0; /* nothing found */
729 * ata_mmio_devchk - PATA device presence detection
730 * @ap: ATA channel to examine
731 * @device: Device to examine (starting at zero)
733 * This technique was originally described in
734 * Hale Landis's ATADRVR (www.ata-atapi.com), and
735 * later found its way into the ATA/ATAPI spec.
737 * Write a pattern to the ATA shadow registers,
738 * and if a device is present, it will respond by
739 * correctly storing and echoing back the
740 * ATA shadow register contents.
746 static unsigned int ata_mmio_devchk(struct ata_port *ap,
749 struct ata_ioports *ioaddr = &ap->ioaddr;
752 ap->ops->dev_select(ap, device);
754 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
755 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
757 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
758 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
760 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
761 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
763 nsect = readb((void __iomem *) ioaddr->nsect_addr);
764 lbal = readb((void __iomem *) ioaddr->lbal_addr);
766 if ((nsect == 0x55) && (lbal == 0xaa))
767 return 1; /* we found a device */
769 return 0; /* nothing found */
773 * ata_devchk - PATA device presence detection
774 * @ap: ATA channel to examine
775 * @device: Device to examine (starting at zero)
777 * Dispatch ATA device presence detection, depending
778 * on whether we are using PIO or MMIO to talk to the
779 * ATA shadow registers.
785 static unsigned int ata_devchk(struct ata_port *ap,
788 if (ap->flags & ATA_FLAG_MMIO)
789 return ata_mmio_devchk(ap, device);
790 return ata_pio_devchk(ap, device);
794 * ata_dev_classify - determine device type based on ATA-spec signature
795 * @tf: ATA taskfile register set for device to be identified
797 * Determine from taskfile register contents whether a device is
798 * ATA or ATAPI, as per "Signature and persistence" section
799 * of ATA/PI spec (volume 1, sect 5.14).
805 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
806 * the event of failure.
809 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
811 /* Apple's open source Darwin code hints that some devices only
812 * put a proper signature into the LBA mid/high registers,
813 * So, we only check those. It's sufficient for uniqueness.
816 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
817 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
818 DPRINTK("found ATA device by sig\n");
822 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
823 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
824 DPRINTK("found ATAPI device by sig\n");
825 return ATA_DEV_ATAPI;
828 DPRINTK("unknown device\n");
829 return ATA_DEV_UNKNOWN;
833 * ata_dev_try_classify - Parse returned ATA device signature
834 * @ap: ATA channel to examine
835 * @device: Device to examine (starting at zero)
837 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
838 * an ATA/ATAPI-defined set of values is placed in the ATA
839 * shadow registers, indicating the results of device detection
842 * Select the ATA device, and read the values from the ATA shadow
843 * registers. Then parse according to the Error register value,
844 * and the spec-defined values examined by ata_dev_classify().
850 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
852 struct ata_device *dev = &ap->device[device];
853 struct ata_taskfile tf;
857 ap->ops->dev_select(ap, device);
859 memset(&tf, 0, sizeof(tf));
861 ap->ops->tf_read(ap, &tf);
864 dev->class = ATA_DEV_NONE;
866 /* see if device passed diags */
869 else if ((device == 0) && (err == 0x81))
874 /* determine if device if ATA or ATAPI */
875 class = ata_dev_classify(&tf);
876 if (class == ATA_DEV_UNKNOWN)
878 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
887 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
888 * @id: IDENTIFY DEVICE results we will examine
889 * @s: string into which data is output
890 * @ofs: offset into identify device page
891 * @len: length of string to return. must be an even number.
893 * The strings in the IDENTIFY DEVICE page are broken up into
894 * 16-bit chunks. Run through the string, and output each
895 * 8-bit chunk linearly, regardless of platform.
901 void ata_dev_id_string(const u16 *id, unsigned char *s,
902 unsigned int ofs, unsigned int len)
922 * ata_noop_dev_select - Select device 0/1 on ATA bus
923 * @ap: ATA channel to manipulate
924 * @device: ATA device (numbered from zero) to select
926 * This function performs no actual function.
928 * May be used as the dev_select() entry in ata_port_operations.
933 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
939 * ata_std_dev_select - Select device 0/1 on ATA bus
940 * @ap: ATA channel to manipulate
941 * @device: ATA device (numbered from zero) to select
943 * Use the method defined in the ATA specification to
944 * make either device 0, or device 1, active on the
945 * ATA channel. Works with both PIO and MMIO.
947 * May be used as the dev_select() entry in ata_port_operations.
953 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
958 tmp = ATA_DEVICE_OBS;
960 tmp = ATA_DEVICE_OBS | ATA_DEV1;
962 if (ap->flags & ATA_FLAG_MMIO) {
963 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
965 outb(tmp, ap->ioaddr.device_addr);
967 ata_pause(ap); /* needed; also flushes, for mmio */
971 * ata_dev_select - Select device 0/1 on ATA bus
972 * @ap: ATA channel to manipulate
973 * @device: ATA device (numbered from zero) to select
974 * @wait: non-zero to wait for Status register BSY bit to clear
975 * @can_sleep: non-zero if context allows sleeping
977 * Use the method defined in the ATA specification to
978 * make either device 0, or device 1, active on the
981 * This is a high-level version of ata_std_dev_select(),
982 * which additionally provides the services of inserting
983 * the proper pauses and status polling, where needed.
989 void ata_dev_select(struct ata_port *ap, unsigned int device,
990 unsigned int wait, unsigned int can_sleep)
992 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
993 ap->id, device, wait);
998 ap->ops->dev_select(ap, device);
1001 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1008 * ata_dump_id - IDENTIFY DEVICE info debugging output
1009 * @dev: Device whose IDENTIFY DEVICE page we will dump
1011 * Dump selected 16-bit words from a detected device's
1012 * IDENTIFY PAGE page.
1018 static inline void ata_dump_id(const struct ata_device *dev)
1020 DPRINTK("49==0x%04x "
1030 DPRINTK("80==0x%04x "
1040 DPRINTK("88==0x%04x "
1047 * Compute the PIO modes available for this device. This is not as
1048 * trivial as it seems if we must consider early devices correctly.
1050 * FIXME: pre IDE drive timing (do we care ?).
1053 static unsigned int ata_pio_modes(const struct ata_device *adev)
1057 /* Usual case. Word 53 indicates word 64 is valid */
1058 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1059 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1065 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
1066 number for the maximum. Turn it into a mask and return it */
1067 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
1069 /* But wait.. there's more. Design your standards by committee and
1070 you too can get a free iordy field to process. However its the
1071 speeds not the modes that are supported... Note drivers using the
1072 timing API will get this right anyway */
1075 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1077 struct completion *waiting = qc->private_data;
1079 qc->ap->ops->tf_read(qc->ap, &qc->tf);
1084 * ata_exec_internal - execute libata internal command
1085 * @ap: Port to which the command is sent
1086 * @dev: Device to which the command is sent
1087 * @tf: Taskfile registers for the command and the result
1088 * @dma_dir: Data tranfer direction of the command
1089 * @buf: Data buffer of the command
1090 * @buflen: Length of data buffer
1092 * Executes libata internal command with timeout. @tf contains
1093 * command on entry and result on return. Timeout and error
1094 * conditions are reported via return value. No recovery action
1095 * is taken after a command times out. It's caller's duty to
1096 * clean up after timeout.
1099 * None. Should be called with kernel context, might sleep.
1103 ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
1104 struct ata_taskfile *tf,
1105 int dma_dir, void *buf, unsigned int buflen)
1107 u8 command = tf->command;
1108 struct ata_queued_cmd *qc;
1109 DECLARE_COMPLETION(wait);
1110 unsigned long flags;
1111 unsigned int err_mask;
1113 spin_lock_irqsave(&ap->host_set->lock, flags);
1115 qc = ata_qc_new_init(ap, dev);
1119 qc->dma_dir = dma_dir;
1120 if (dma_dir != DMA_NONE) {
1121 ata_sg_init_one(qc, buf, buflen);
1122 qc->nsect = buflen / ATA_SECT_SIZE;
1125 qc->private_data = &wait;
1126 qc->complete_fn = ata_qc_complete_internal;
1128 qc->err_mask = ata_qc_issue(qc);
1130 ata_qc_complete(qc);
1132 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1134 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1135 spin_lock_irqsave(&ap->host_set->lock, flags);
1137 /* We're racing with irq here. If we lose, the
1138 * following test prevents us from completing the qc
1139 * again. If completion irq occurs after here but
1140 * before the caller cleans up, it will result in a
1141 * spurious interrupt. We can live with that.
1143 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1144 qc->err_mask = AC_ERR_TIMEOUT;
1145 ata_qc_complete(qc);
1146 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1150 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1154 err_mask = qc->err_mask;
1162 * ata_pio_need_iordy - check if iordy needed
1165 * Check if the current speed of the device requires IORDY. Used
1166 * by various controllers for chip configuration.
1169 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1172 int speed = adev->pio_mode - XFER_PIO_0;
1179 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1181 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1182 pio = adev->id[ATA_ID_EIDE_PIO];
1183 /* Is the speed faster than the drive allows non IORDY ? */
1185 /* This is cycle times not frequency - watch the logic! */
1186 if (pio > 240) /* PIO2 is 240nS per cycle */
1195 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1196 * @ap: port on which device we wish to probe resides
1197 * @device: device bus address, starting at zero
1199 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1200 * command, and read back the 512-byte device information page.
1201 * The device information page is fed to us via the standard
1202 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1203 * using standard PIO-IN paths)
1205 * After reading the device information page, we use several
1206 * bits of information from it to initialize data structures
1207 * that will be used during the lifetime of the ata_device.
1208 * Other data from the info page is used to disqualify certain
1209 * older ATA devices we do not wish to support.
1212 * Inherited from caller. Some functions called by this function
1213 * obtain the host_set lock.
1216 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1218 struct ata_device *dev = &ap->device[device];
1219 unsigned int major_version;
1221 unsigned long xfer_modes;
1222 unsigned int using_edd;
1223 struct ata_taskfile tf;
1224 unsigned int err_mask;
1227 if (!ata_dev_present(dev)) {
1228 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1233 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1238 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1240 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1241 dev->class == ATA_DEV_NONE);
1243 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1246 ata_tf_init(ap, &tf, device);
1248 if (dev->class == ATA_DEV_ATA) {
1249 tf.command = ATA_CMD_ID_ATA;
1250 DPRINTK("do ATA identify\n");
1252 tf.command = ATA_CMD_ID_ATAPI;
1253 DPRINTK("do ATAPI identify\n");
1256 tf.protocol = ATA_PROT_PIO;
1258 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
1259 dev->id, sizeof(dev->id));
1262 if (err_mask & ~AC_ERR_DEV)
1266 * arg! EDD works for all test cases, but seems to return
1267 * the ATA signature for some ATAPI devices. Until the
1268 * reason for this is found and fixed, we fix up the mess
1269 * here. If IDENTIFY DEVICE returns command aborted
1270 * (as ATAPI devices do), then we issue an
1271 * IDENTIFY PACKET DEVICE.
1273 * ATA software reset (SRST, the default) does not appear
1274 * to have this problem.
1276 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
1277 u8 err = tf.feature;
1278 if (err & ATA_ABORTED) {
1279 dev->class = ATA_DEV_ATAPI;
1286 swap_buf_le16(dev->id, ATA_ID_WORDS);
1288 /* print device capabilities */
1289 printk(KERN_DEBUG "ata%u: dev %u cfg "
1290 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1291 ap->id, device, dev->id[49],
1292 dev->id[82], dev->id[83], dev->id[84],
1293 dev->id[85], dev->id[86], dev->id[87],
1297 * common ATA, ATAPI feature tests
1300 /* we require DMA support (bits 8 of word 49) */
1301 if (!ata_id_has_dma(dev->id)) {
1302 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1306 /* quick-n-dirty find max transfer mode; for printk only */
1307 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1309 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1311 xfer_modes = ata_pio_modes(dev);
1315 /* ATA-specific feature tests */
1316 if (dev->class == ATA_DEV_ATA) {
1317 if (!ata_id_is_ata(dev->id)) /* sanity check */
1320 /* get major version */
1321 tmp = dev->id[ATA_ID_MAJOR_VER];
1322 for (major_version = 14; major_version >= 1; major_version--)
1323 if (tmp & (1 << major_version))
1327 * The exact sequence expected by certain pre-ATA4 drives is:
1330 * INITIALIZE DEVICE PARAMETERS
1332 * Some drives were very specific about that exact sequence.
1334 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1335 ata_dev_init_params(ap, dev);
1337 /* current CHS translation info (id[53-58]) might be
1338 * changed. reread the identify device info.
1340 ata_dev_reread_id(ap, dev);
1343 if (ata_id_has_lba(dev->id)) {
1344 dev->flags |= ATA_DFLAG_LBA;
1346 if (ata_id_has_lba48(dev->id)) {
1347 dev->flags |= ATA_DFLAG_LBA48;
1348 dev->n_sectors = ata_id_u64(dev->id, 100);
1350 dev->n_sectors = ata_id_u32(dev->id, 60);
1353 /* print device info to dmesg */
1354 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1357 ata_mode_string(xfer_modes),
1358 (unsigned long long)dev->n_sectors,
1359 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1363 /* Default translation */
1364 dev->cylinders = dev->id[1];
1365 dev->heads = dev->id[3];
1366 dev->sectors = dev->id[6];
1367 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1369 if (ata_id_current_chs_valid(dev->id)) {
1370 /* Current CHS translation is valid. */
1371 dev->cylinders = dev->id[54];
1372 dev->heads = dev->id[55];
1373 dev->sectors = dev->id[56];
1375 dev->n_sectors = ata_id_u32(dev->id, 57);
1378 /* print device info to dmesg */
1379 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1382 ata_mode_string(xfer_modes),
1383 (unsigned long long)dev->n_sectors,
1384 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1388 ap->host->max_cmd_len = 16;
1391 /* ATAPI-specific feature tests */
1392 else if (dev->class == ATA_DEV_ATAPI) {
1393 if (ata_id_is_ata(dev->id)) /* sanity check */
1396 rc = atapi_cdb_len(dev->id);
1397 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1398 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1401 ap->cdb_len = (unsigned int) rc;
1402 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1404 /* print device info to dmesg */
1405 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1407 ata_mode_string(xfer_modes));
1410 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1414 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1417 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1418 DPRINTK("EXIT, err\n");
1422 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1424 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1428 * ata_dev_config - Run device specific handlers and check for
1429 * SATA->PATA bridges
1436 void ata_dev_config(struct ata_port *ap, unsigned int i)
1438 /* limit bridge transfers to udma5, 200 sectors */
1439 if (ata_dev_knobble(ap)) {
1440 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1441 ap->id, ap->device->devno);
1442 ap->udma_mask &= ATA_UDMA5;
1443 ap->host->max_sectors = ATA_MAX_SECTORS;
1444 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1445 ap->device[i].flags |= ATA_DFLAG_LOCK_SECTORS;
1448 if (ap->ops->dev_config)
1449 ap->ops->dev_config(ap, &ap->device[i]);
1453 * ata_bus_probe - Reset and probe ATA bus
1456 * Master ATA bus probing function. Initiates a hardware-dependent
1457 * bus reset, then attempts to identify any devices found on
1461 * PCI/etc. bus probe sem.
1464 * Zero on success, non-zero on error.
1467 static int ata_bus_probe(struct ata_port *ap)
1469 unsigned int i, found = 0;
1471 ap->ops->phy_reset(ap);
1472 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1475 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1476 ata_dev_identify(ap, i);
1477 if (ata_dev_present(&ap->device[i])) {
1479 ata_dev_config(ap,i);
1483 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1484 goto err_out_disable;
1487 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1488 goto err_out_disable;
1493 ap->ops->port_disable(ap);
1499 * ata_port_probe - Mark port as enabled
1500 * @ap: Port for which we indicate enablement
1502 * Modify @ap data structure such that the system
1503 * thinks that the entire port is enabled.
1505 * LOCKING: host_set lock, or some other form of
1509 void ata_port_probe(struct ata_port *ap)
1511 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1515 * sata_print_link_status - Print SATA link status
1516 * @ap: SATA port to printk link status about
1518 * This function prints link speed and status of a SATA link.
1523 static void sata_print_link_status(struct ata_port *ap)
1528 if (!ap->ops->scr_read)
1531 sstatus = scr_read(ap, SCR_STATUS);
1533 if (sata_dev_present(ap)) {
1534 tmp = (sstatus >> 4) & 0xf;
1537 else if (tmp & (1 << 1))
1540 speed = "<unknown>";
1541 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1542 ap->id, speed, sstatus);
1544 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1550 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1551 * @ap: SATA port associated with target SATA PHY.
1553 * This function issues commands to standard SATA Sxxx
1554 * PHY registers, to wake up the phy (and device), and
1555 * clear any reset condition.
1558 * PCI/etc. bus probe sem.
1561 void __sata_phy_reset(struct ata_port *ap)
1564 unsigned long timeout = jiffies + (HZ * 5);
1566 if (ap->flags & ATA_FLAG_SATA_RESET) {
1567 /* issue phy wake/reset */
1568 scr_write_flush(ap, SCR_CONTROL, 0x301);
1569 /* Couldn't find anything in SATA I/II specs, but
1570 * AHCI-1.1 10.4.2 says at least 1 ms. */
1573 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1575 /* wait for phy to become ready, if necessary */
1578 sstatus = scr_read(ap, SCR_STATUS);
1579 if ((sstatus & 0xf) != 1)
1581 } while (time_before(jiffies, timeout));
1583 /* print link status */
1584 sata_print_link_status(ap);
1586 /* TODO: phy layer with polling, timeouts, etc. */
1587 if (sata_dev_present(ap))
1590 ata_port_disable(ap);
1592 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1595 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1596 ata_port_disable(ap);
1600 ap->cbl = ATA_CBL_SATA;
1604 * sata_phy_reset - Reset SATA bus.
1605 * @ap: SATA port associated with target SATA PHY.
1607 * This function resets the SATA bus, and then probes
1608 * the bus for devices.
1611 * PCI/etc. bus probe sem.
1614 void sata_phy_reset(struct ata_port *ap)
1616 __sata_phy_reset(ap);
1617 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1623 * ata_port_disable - Disable port.
1624 * @ap: Port to be disabled.
1626 * Modify @ap data structure such that the system
1627 * thinks that the entire port is disabled, and should
1628 * never attempt to probe or communicate with devices
1631 * LOCKING: host_set lock, or some other form of
1635 void ata_port_disable(struct ata_port *ap)
1637 ap->device[0].class = ATA_DEV_NONE;
1638 ap->device[1].class = ATA_DEV_NONE;
1639 ap->flags |= ATA_FLAG_PORT_DISABLED;
1643 * This mode timing computation functionality is ported over from
1644 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1647 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1648 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1649 * for PIO 5, which is a nonstandard extension and UDMA6, which
1650 * is currently supported only by Maxtor drives.
1653 static const struct ata_timing ata_timing[] = {
1655 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1656 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1657 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1658 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1660 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1661 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1662 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1664 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1666 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1667 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1668 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1670 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1671 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1672 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1674 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1675 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1676 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1678 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1679 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1680 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1682 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1687 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1688 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1690 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1692 q->setup = EZ(t->setup * 1000, T);
1693 q->act8b = EZ(t->act8b * 1000, T);
1694 q->rec8b = EZ(t->rec8b * 1000, T);
1695 q->cyc8b = EZ(t->cyc8b * 1000, T);
1696 q->active = EZ(t->active * 1000, T);
1697 q->recover = EZ(t->recover * 1000, T);
1698 q->cycle = EZ(t->cycle * 1000, T);
1699 q->udma = EZ(t->udma * 1000, UT);
1702 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1703 struct ata_timing *m, unsigned int what)
1705 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1706 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1707 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1708 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1709 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1710 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1711 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1712 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1715 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1717 const struct ata_timing *t;
1719 for (t = ata_timing; t->mode != speed; t++)
1720 if (t->mode == 0xFF)
1725 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1726 struct ata_timing *t, int T, int UT)
1728 const struct ata_timing *s;
1729 struct ata_timing p;
1735 if (!(s = ata_timing_find_mode(speed)))
1738 memcpy(t, s, sizeof(*s));
1741 * If the drive is an EIDE drive, it can tell us it needs extended
1742 * PIO/MW_DMA cycle timing.
1745 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1746 memset(&p, 0, sizeof(p));
1747 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1748 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1749 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1750 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1751 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1753 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1757 * Convert the timing to bus clock counts.
1760 ata_timing_quantize(t, t, T, UT);
1763 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1764 * and some other commands. We have to ensure that the DMA cycle timing is
1765 * slower/equal than the fastest PIO timing.
1768 if (speed > XFER_PIO_4) {
1769 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1770 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1774 * Lenghten active & recovery time so that cycle time is correct.
1777 if (t->act8b + t->rec8b < t->cyc8b) {
1778 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1779 t->rec8b = t->cyc8b - t->act8b;
1782 if (t->active + t->recover < t->cycle) {
1783 t->active += (t->cycle - (t->active + t->recover)) / 2;
1784 t->recover = t->cycle - t->active;
1790 static const struct {
1793 } xfer_mode_classes[] = {
1794 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1795 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1796 { ATA_SHIFT_PIO, XFER_PIO_0 },
1799 static u8 base_from_shift(unsigned int shift)
1803 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1804 if (xfer_mode_classes[i].shift == shift)
1805 return xfer_mode_classes[i].base;
1810 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1815 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1818 if (dev->xfer_shift == ATA_SHIFT_PIO)
1819 dev->flags |= ATA_DFLAG_PIO;
1821 ata_dev_set_xfermode(ap, dev);
1823 base = base_from_shift(dev->xfer_shift);
1824 ofs = dev->xfer_mode - base;
1825 idx = ofs + dev->xfer_shift;
1826 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1828 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1829 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1831 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1832 ap->id, dev->devno, xfer_mode_str[idx]);
1835 static int ata_host_set_pio(struct ata_port *ap)
1841 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1844 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1848 base = base_from_shift(ATA_SHIFT_PIO);
1849 xfer_mode = base + x;
1851 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1852 (int)base, (int)xfer_mode, mask, x);
1854 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1855 struct ata_device *dev = &ap->device[i];
1856 if (ata_dev_present(dev)) {
1857 dev->pio_mode = xfer_mode;
1858 dev->xfer_mode = xfer_mode;
1859 dev->xfer_shift = ATA_SHIFT_PIO;
1860 if (ap->ops->set_piomode)
1861 ap->ops->set_piomode(ap, dev);
1868 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1869 unsigned int xfer_shift)
1873 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1874 struct ata_device *dev = &ap->device[i];
1875 if (ata_dev_present(dev)) {
1876 dev->dma_mode = xfer_mode;
1877 dev->xfer_mode = xfer_mode;
1878 dev->xfer_shift = xfer_shift;
1879 if (ap->ops->set_dmamode)
1880 ap->ops->set_dmamode(ap, dev);
1886 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1887 * @ap: port on which timings will be programmed
1889 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1892 * PCI/etc. bus probe sem.
1895 static void ata_set_mode(struct ata_port *ap)
1897 unsigned int xfer_shift;
1901 /* step 1: always set host PIO timings */
1902 rc = ata_host_set_pio(ap);
1906 /* step 2: choose the best data xfer mode */
1907 xfer_mode = xfer_shift = 0;
1908 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1912 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1913 if (xfer_shift != ATA_SHIFT_PIO)
1914 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1916 /* step 4: update devices' xfer mode */
1917 ata_dev_set_mode(ap, &ap->device[0]);
1918 ata_dev_set_mode(ap, &ap->device[1]);
1920 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1923 if (ap->ops->post_set_mode)
1924 ap->ops->post_set_mode(ap);
1929 ata_port_disable(ap);
1933 * ata_busy_sleep - sleep until BSY clears, or timeout
1934 * @ap: port containing status register to be polled
1935 * @tmout_pat: impatience timeout
1936 * @tmout: overall timeout
1938 * Sleep until ATA Status register bit BSY clears,
1939 * or a timeout occurs.
1945 static unsigned int ata_busy_sleep (struct ata_port *ap,
1946 unsigned long tmout_pat,
1947 unsigned long tmout)
1949 unsigned long timer_start, timeout;
1952 status = ata_busy_wait(ap, ATA_BUSY, 300);
1953 timer_start = jiffies;
1954 timeout = timer_start + tmout_pat;
1955 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1957 status = ata_busy_wait(ap, ATA_BUSY, 3);
1960 if (status & ATA_BUSY)
1961 printk(KERN_WARNING "ata%u is slow to respond, "
1962 "please be patient\n", ap->id);
1964 timeout = timer_start + tmout;
1965 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1967 status = ata_chk_status(ap);
1970 if (status & ATA_BUSY) {
1971 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1972 ap->id, tmout / HZ);
1979 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1981 struct ata_ioports *ioaddr = &ap->ioaddr;
1982 unsigned int dev0 = devmask & (1 << 0);
1983 unsigned int dev1 = devmask & (1 << 1);
1984 unsigned long timeout;
1986 /* if device 0 was found in ata_devchk, wait for its
1990 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1992 /* if device 1 was found in ata_devchk, wait for
1993 * register access, then wait for BSY to clear
1995 timeout = jiffies + ATA_TMOUT_BOOT;
1999 ap->ops->dev_select(ap, 1);
2000 if (ap->flags & ATA_FLAG_MMIO) {
2001 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2002 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2004 nsect = inb(ioaddr->nsect_addr);
2005 lbal = inb(ioaddr->lbal_addr);
2007 if ((nsect == 1) && (lbal == 1))
2009 if (time_after(jiffies, timeout)) {
2013 msleep(50); /* give drive a breather */
2016 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2018 /* is all this really necessary? */
2019 ap->ops->dev_select(ap, 0);
2021 ap->ops->dev_select(ap, 1);
2023 ap->ops->dev_select(ap, 0);
2027 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
2028 * @ap: Port to reset and probe
2030 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
2031 * probe the bus. Not often used these days.
2034 * PCI/etc. bus probe sem.
2035 * Obtains host_set lock.
2039 static unsigned int ata_bus_edd(struct ata_port *ap)
2041 struct ata_taskfile tf;
2042 unsigned long flags;
2044 /* set up execute-device-diag (bus reset) taskfile */
2045 /* also, take interrupts to a known state (disabled) */
2046 DPRINTK("execute-device-diag\n");
2047 ata_tf_init(ap, &tf, 0);
2049 tf.command = ATA_CMD_EDD;
2050 tf.protocol = ATA_PROT_NODATA;
2053 spin_lock_irqsave(&ap->host_set->lock, flags);
2054 ata_tf_to_host(ap, &tf);
2055 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2057 /* spec says at least 2ms. but who knows with those
2058 * crazy ATAPI devices...
2062 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2065 static unsigned int ata_bus_softreset(struct ata_port *ap,
2066 unsigned int devmask)
2068 struct ata_ioports *ioaddr = &ap->ioaddr;
2070 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2072 /* software reset. causes dev0 to be selected */
2073 if (ap->flags & ATA_FLAG_MMIO) {
2074 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2075 udelay(20); /* FIXME: flush */
2076 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2077 udelay(20); /* FIXME: flush */
2078 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2080 outb(ap->ctl, ioaddr->ctl_addr);
2082 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2084 outb(ap->ctl, ioaddr->ctl_addr);
2087 /* spec mandates ">= 2ms" before checking status.
2088 * We wait 150ms, because that was the magic delay used for
2089 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2090 * between when the ATA command register is written, and then
2091 * status is checked. Because waiting for "a while" before
2092 * checking status is fine, post SRST, we perform this magic
2093 * delay here as well.
2097 ata_bus_post_reset(ap, devmask);
2103 * ata_bus_reset - reset host port and associated ATA channel
2104 * @ap: port to reset
2106 * This is typically the first time we actually start issuing
2107 * commands to the ATA channel. We wait for BSY to clear, then
2108 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2109 * result. Determine what devices, if any, are on the channel
2110 * by looking at the device 0/1 error register. Look at the signature
2111 * stored in each device's taskfile registers, to determine if
2112 * the device is ATA or ATAPI.
2115 * PCI/etc. bus probe sem.
2116 * Obtains host_set lock.
2119 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2122 void ata_bus_reset(struct ata_port *ap)
2124 struct ata_ioports *ioaddr = &ap->ioaddr;
2125 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2127 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2129 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2131 /* determine if device 0/1 are present */
2132 if (ap->flags & ATA_FLAG_SATA_RESET)
2135 dev0 = ata_devchk(ap, 0);
2137 dev1 = ata_devchk(ap, 1);
2141 devmask |= (1 << 0);
2143 devmask |= (1 << 1);
2145 /* select device 0 again */
2146 ap->ops->dev_select(ap, 0);
2148 /* issue bus reset */
2149 if (ap->flags & ATA_FLAG_SRST)
2150 rc = ata_bus_softreset(ap, devmask);
2151 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2152 /* set up device control */
2153 if (ap->flags & ATA_FLAG_MMIO)
2154 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2156 outb(ap->ctl, ioaddr->ctl_addr);
2157 rc = ata_bus_edd(ap);
2164 * determine by signature whether we have ATA or ATAPI devices
2166 err = ata_dev_try_classify(ap, 0);
2167 if ((slave_possible) && (err != 0x81))
2168 ata_dev_try_classify(ap, 1);
2170 /* re-enable interrupts */
2171 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2174 /* is double-select really necessary? */
2175 if (ap->device[1].class != ATA_DEV_NONE)
2176 ap->ops->dev_select(ap, 1);
2177 if (ap->device[0].class != ATA_DEV_NONE)
2178 ap->ops->dev_select(ap, 0);
2180 /* if no devices were detected, disable this port */
2181 if ((ap->device[0].class == ATA_DEV_NONE) &&
2182 (ap->device[1].class == ATA_DEV_NONE))
2185 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2186 /* set up device control for ATA_FLAG_SATA_RESET */
2187 if (ap->flags & ATA_FLAG_MMIO)
2188 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2190 outb(ap->ctl, ioaddr->ctl_addr);
2197 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2198 ap->ops->port_disable(ap);
2203 static void ata_pr_blacklisted(const struct ata_port *ap,
2204 const struct ata_device *dev)
2206 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2207 ap->id, dev->devno);
2210 static const char * const ata_dma_blacklist [] = {
2229 "Toshiba CD-ROM XM-6202B",
2230 "TOSHIBA CD-ROM XM-1702BC",
2232 "E-IDE CD-ROM CR-840",
2235 "SAMSUNG CD-ROM SC-148C",
2236 "SAMSUNG CD-ROM SC",
2238 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2242 static int ata_dma_blacklisted(const struct ata_device *dev)
2244 unsigned char model_num[40];
2249 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2252 len = strnlen(s, sizeof(model_num));
2254 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2255 while ((len > 0) && (s[len - 1] == ' ')) {
2260 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2261 if (!strncmp(ata_dma_blacklist[i], s, len))
2267 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2269 const struct ata_device *master, *slave;
2272 master = &ap->device[0];
2273 slave = &ap->device[1];
2275 assert (ata_dev_present(master) || ata_dev_present(slave));
2277 if (shift == ATA_SHIFT_UDMA) {
2278 mask = ap->udma_mask;
2279 if (ata_dev_present(master)) {
2280 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2281 if (ata_dma_blacklisted(master)) {
2283 ata_pr_blacklisted(ap, master);
2286 if (ata_dev_present(slave)) {
2287 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2288 if (ata_dma_blacklisted(slave)) {
2290 ata_pr_blacklisted(ap, slave);
2294 else if (shift == ATA_SHIFT_MWDMA) {
2295 mask = ap->mwdma_mask;
2296 if (ata_dev_present(master)) {
2297 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2298 if (ata_dma_blacklisted(master)) {
2300 ata_pr_blacklisted(ap, master);
2303 if (ata_dev_present(slave)) {
2304 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2305 if (ata_dma_blacklisted(slave)) {
2307 ata_pr_blacklisted(ap, slave);
2311 else if (shift == ATA_SHIFT_PIO) {
2312 mask = ap->pio_mask;
2313 if (ata_dev_present(master)) {
2314 /* spec doesn't return explicit support for
2315 * PIO0-2, so we fake it
2317 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2322 if (ata_dev_present(slave)) {
2323 /* spec doesn't return explicit support for
2324 * PIO0-2, so we fake it
2326 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2333 mask = 0xffffffff; /* shut up compiler warning */
2340 /* find greatest bit */
2341 static int fgb(u32 bitmap)
2346 for (i = 0; i < 32; i++)
2347 if (bitmap & (1 << i))
2354 * ata_choose_xfer_mode - attempt to find best transfer mode
2355 * @ap: Port for which an xfer mode will be selected
2356 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2357 * @xfer_shift_out: (output) bit shift that selects this mode
2359 * Based on host and device capabilities, determine the
2360 * maximum transfer mode that is amenable to all.
2363 * PCI/etc. bus probe sem.
2366 * Zero on success, negative on error.
2369 static int ata_choose_xfer_mode(const struct ata_port *ap,
2371 unsigned int *xfer_shift_out)
2373 unsigned int mask, shift;
2376 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2377 shift = xfer_mode_classes[i].shift;
2378 mask = ata_get_mode_mask(ap, shift);
2382 *xfer_mode_out = xfer_mode_classes[i].base + x;
2383 *xfer_shift_out = shift;
2392 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2393 * @ap: Port associated with device @dev
2394 * @dev: Device to which command will be sent
2396 * Issue SET FEATURES - XFER MODE command to device @dev
2400 * PCI/etc. bus probe sem.
2403 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2405 struct ata_taskfile tf;
2407 /* set up set-features taskfile */
2408 DPRINTK("set features - xfer mode\n");
2410 ata_tf_init(ap, &tf, dev->devno);
2411 tf.command = ATA_CMD_SET_FEATURES;
2412 tf.feature = SETFEATURES_XFER;
2413 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2414 tf.protocol = ATA_PROT_NODATA;
2415 tf.nsect = dev->xfer_mode;
2417 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2418 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2420 ata_port_disable(ap);
2427 * ata_dev_reread_id - Reread the device identify device info
2428 * @ap: port where the device is
2429 * @dev: device to reread the identify device info
2434 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2436 struct ata_taskfile tf;
2438 ata_tf_init(ap, &tf, dev->devno);
2440 if (dev->class == ATA_DEV_ATA) {
2441 tf.command = ATA_CMD_ID_ATA;
2442 DPRINTK("do ATA identify\n");
2444 tf.command = ATA_CMD_ID_ATAPI;
2445 DPRINTK("do ATAPI identify\n");
2448 tf.flags |= ATA_TFLAG_DEVICE;
2449 tf.protocol = ATA_PROT_PIO;
2451 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2452 dev->id, sizeof(dev->id)))
2455 swap_buf_le16(dev->id, ATA_ID_WORDS);
2463 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
2464 ata_port_disable(ap);
2468 * ata_dev_init_params - Issue INIT DEV PARAMS command
2469 * @ap: Port associated with device @dev
2470 * @dev: Device to which command will be sent
2475 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2477 struct ata_taskfile tf;
2478 u16 sectors = dev->id[6];
2479 u16 heads = dev->id[3];
2481 /* Number of sectors per track 1-255. Number of heads 1-16 */
2482 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2485 /* set up init dev params taskfile */
2486 DPRINTK("init dev params \n");
2488 ata_tf_init(ap, &tf, dev->devno);
2489 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2490 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2491 tf.protocol = ATA_PROT_NODATA;
2493 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2495 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2496 printk(KERN_ERR "ata%u: failed to init parameters, disabled\n",
2498 ata_port_disable(ap);
2505 * ata_sg_clean - Unmap DMA memory associated with command
2506 * @qc: Command containing DMA memory to be released
2508 * Unmap all mapped DMA memory associated with this command.
2511 * spin_lock_irqsave(host_set lock)
2514 static void ata_sg_clean(struct ata_queued_cmd *qc)
2516 struct ata_port *ap = qc->ap;
2517 struct scatterlist *sg = qc->__sg;
2518 int dir = qc->dma_dir;
2519 void *pad_buf = NULL;
2521 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2524 if (qc->flags & ATA_QCFLAG_SINGLE)
2525 assert(qc->n_elem == 1);
2527 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2529 /* if we padded the buffer out to 32-bit bound, and data
2530 * xfer direction is from-device, we must copy from the
2531 * pad buffer back into the supplied buffer
2533 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2534 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2536 if (qc->flags & ATA_QCFLAG_SG) {
2538 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2539 /* restore last sg */
2540 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2542 struct scatterlist *psg = &qc->pad_sgent;
2543 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2544 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2545 kunmap_atomic(addr, KM_IRQ0);
2548 if (sg_dma_len(&sg[0]) > 0)
2549 dma_unmap_single(ap->host_set->dev,
2550 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2553 sg->length += qc->pad_len;
2555 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2556 pad_buf, qc->pad_len);
2559 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2564 * ata_fill_sg - Fill PCI IDE PRD table
2565 * @qc: Metadata associated with taskfile to be transferred
2567 * Fill PCI IDE PRD (scatter-gather) table with segments
2568 * associated with the current disk command.
2571 * spin_lock_irqsave(host_set lock)
2574 static void ata_fill_sg(struct ata_queued_cmd *qc)
2576 struct ata_port *ap = qc->ap;
2577 struct scatterlist *sg;
2580 assert(qc->__sg != NULL);
2581 assert(qc->n_elem > 0);
2584 ata_for_each_sg(sg, qc) {
2588 /* determine if physical DMA addr spans 64K boundary.
2589 * Note h/w doesn't support 64-bit, so we unconditionally
2590 * truncate dma_addr_t to u32.
2592 addr = (u32) sg_dma_address(sg);
2593 sg_len = sg_dma_len(sg);
2596 offset = addr & 0xffff;
2598 if ((offset + sg_len) > 0x10000)
2599 len = 0x10000 - offset;
2601 ap->prd[idx].addr = cpu_to_le32(addr);
2602 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2603 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2612 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2615 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2616 * @qc: Metadata associated with taskfile to check
2618 * Allow low-level driver to filter ATA PACKET commands, returning
2619 * a status indicating whether or not it is OK to use DMA for the
2620 * supplied PACKET command.
2623 * spin_lock_irqsave(host_set lock)
2625 * RETURNS: 0 when ATAPI DMA can be used
2628 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2630 struct ata_port *ap = qc->ap;
2631 int rc = 0; /* Assume ATAPI DMA is OK by default */
2633 if (ap->ops->check_atapi_dma)
2634 rc = ap->ops->check_atapi_dma(qc);
2639 * ata_qc_prep - Prepare taskfile for submission
2640 * @qc: Metadata associated with taskfile to be prepared
2642 * Prepare ATA taskfile for submission.
2645 * spin_lock_irqsave(host_set lock)
2647 void ata_qc_prep(struct ata_queued_cmd *qc)
2649 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2656 * ata_sg_init_one - Associate command with memory buffer
2657 * @qc: Command to be associated
2658 * @buf: Memory buffer
2659 * @buflen: Length of memory buffer, in bytes.
2661 * Initialize the data-related elements of queued_cmd @qc
2662 * to point to a single memory buffer, @buf of byte length @buflen.
2665 * spin_lock_irqsave(host_set lock)
2668 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2670 struct scatterlist *sg;
2672 qc->flags |= ATA_QCFLAG_SINGLE;
2674 memset(&qc->sgent, 0, sizeof(qc->sgent));
2675 qc->__sg = &qc->sgent;
2677 qc->orig_n_elem = 1;
2681 sg_init_one(sg, buf, buflen);
2685 * ata_sg_init - Associate command with scatter-gather table.
2686 * @qc: Command to be associated
2687 * @sg: Scatter-gather table.
2688 * @n_elem: Number of elements in s/g table.
2690 * Initialize the data-related elements of queued_cmd @qc
2691 * to point to a scatter-gather table @sg, containing @n_elem
2695 * spin_lock_irqsave(host_set lock)
2698 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2699 unsigned int n_elem)
2701 qc->flags |= ATA_QCFLAG_SG;
2703 qc->n_elem = n_elem;
2704 qc->orig_n_elem = n_elem;
2708 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2709 * @qc: Command with memory buffer to be mapped.
2711 * DMA-map the memory buffer associated with queued_cmd @qc.
2714 * spin_lock_irqsave(host_set lock)
2717 * Zero on success, negative on error.
2720 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2722 struct ata_port *ap = qc->ap;
2723 int dir = qc->dma_dir;
2724 struct scatterlist *sg = qc->__sg;
2725 dma_addr_t dma_address;
2727 /* we must lengthen transfers to end on a 32-bit boundary */
2728 qc->pad_len = sg->length & 3;
2730 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2731 struct scatterlist *psg = &qc->pad_sgent;
2733 assert(qc->dev->class == ATA_DEV_ATAPI);
2735 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2737 if (qc->tf.flags & ATA_TFLAG_WRITE)
2738 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2741 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2742 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2744 sg->length -= qc->pad_len;
2746 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2747 sg->length, qc->pad_len);
2751 sg_dma_address(sg) = 0;
2755 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2757 if (dma_mapping_error(dma_address)) {
2759 sg->length += qc->pad_len;
2763 sg_dma_address(sg) = dma_address;
2765 sg_dma_len(sg) = sg->length;
2767 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2768 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2774 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2775 * @qc: Command with scatter-gather table to be mapped.
2777 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2780 * spin_lock_irqsave(host_set lock)
2783 * Zero on success, negative on error.
2787 static int ata_sg_setup(struct ata_queued_cmd *qc)
2789 struct ata_port *ap = qc->ap;
2790 struct scatterlist *sg = qc->__sg;
2791 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2792 int n_elem, pre_n_elem, dir, trim_sg = 0;
2794 VPRINTK("ENTER, ata%u\n", ap->id);
2795 assert(qc->flags & ATA_QCFLAG_SG);
2797 /* we must lengthen transfers to end on a 32-bit boundary */
2798 qc->pad_len = lsg->length & 3;
2800 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2801 struct scatterlist *psg = &qc->pad_sgent;
2802 unsigned int offset;
2804 assert(qc->dev->class == ATA_DEV_ATAPI);
2806 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2809 * psg->page/offset are used to copy to-be-written
2810 * data in this function or read data in ata_sg_clean.
2812 offset = lsg->offset + lsg->length - qc->pad_len;
2813 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2814 psg->offset = offset_in_page(offset);
2816 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2817 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2818 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2819 kunmap_atomic(addr, KM_IRQ0);
2822 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2823 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2825 lsg->length -= qc->pad_len;
2826 if (lsg->length == 0)
2829 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2830 qc->n_elem - 1, lsg->length, qc->pad_len);
2833 pre_n_elem = qc->n_elem;
2834 if (trim_sg && pre_n_elem)
2843 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
2845 /* restore last sg */
2846 lsg->length += qc->pad_len;
2850 DPRINTK("%d sg elements mapped\n", n_elem);
2853 qc->n_elem = n_elem;
2859 * ata_poll_qc_complete - turn irq back on and finish qc
2860 * @qc: Command to complete
2861 * @err_mask: ATA status register content
2864 * None. (grabs host lock)
2867 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
2869 struct ata_port *ap = qc->ap;
2870 unsigned long flags;
2872 spin_lock_irqsave(&ap->host_set->lock, flags);
2873 ap->flags &= ~ATA_FLAG_NOINTR;
2875 ata_qc_complete(qc);
2876 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2881 * @ap: the target ata_port
2884 * None. (executing in kernel thread context)
2887 * timeout value to use
2890 static unsigned long ata_pio_poll(struct ata_port *ap)
2892 struct ata_queued_cmd *qc;
2894 unsigned int poll_state = HSM_ST_UNKNOWN;
2895 unsigned int reg_state = HSM_ST_UNKNOWN;
2897 qc = ata_qc_from_tag(ap, ap->active_tag);
2900 switch (ap->hsm_task_state) {
2903 poll_state = HSM_ST_POLL;
2907 case HSM_ST_LAST_POLL:
2908 poll_state = HSM_ST_LAST_POLL;
2909 reg_state = HSM_ST_LAST;
2916 status = ata_chk_status(ap);
2917 if (status & ATA_BUSY) {
2918 if (time_after(jiffies, ap->pio_task_timeout)) {
2919 qc->err_mask |= AC_ERR_TIMEOUT;
2920 ap->hsm_task_state = HSM_ST_TMOUT;
2923 ap->hsm_task_state = poll_state;
2924 return ATA_SHORT_PAUSE;
2927 ap->hsm_task_state = reg_state;
2932 * ata_pio_complete - check if drive is busy or idle
2933 * @ap: the target ata_port
2936 * None. (executing in kernel thread context)
2939 * Non-zero if qc completed, zero otherwise.
2942 static int ata_pio_complete (struct ata_port *ap)
2944 struct ata_queued_cmd *qc;
2948 * This is purely heuristic. This is a fast path. Sometimes when
2949 * we enter, BSY will be cleared in a chk-status or two. If not,
2950 * the drive is probably seeking or something. Snooze for a couple
2951 * msecs, then chk-status again. If still busy, fall back to
2952 * HSM_ST_POLL state.
2954 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2955 if (drv_stat & ATA_BUSY) {
2957 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2958 if (drv_stat & ATA_BUSY) {
2959 ap->hsm_task_state = HSM_ST_LAST_POLL;
2960 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2965 qc = ata_qc_from_tag(ap, ap->active_tag);
2968 drv_stat = ata_wait_idle(ap);
2969 if (!ata_ok(drv_stat)) {
2970 qc->err_mask |= __ac_err_mask(drv_stat);
2971 ap->hsm_task_state = HSM_ST_ERR;
2975 ap->hsm_task_state = HSM_ST_IDLE;
2977 assert(qc->err_mask == 0);
2978 ata_poll_qc_complete(qc);
2980 /* another command may start at this point */
2987 * swap_buf_le16 - swap halves of 16-words in place
2988 * @buf: Buffer to swap
2989 * @buf_words: Number of 16-bit words in buffer.
2991 * Swap halves of 16-bit words if needed to convert from
2992 * little-endian byte order to native cpu byte order, or
2996 * Inherited from caller.
2998 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3003 for (i = 0; i < buf_words; i++)
3004 buf[i] = le16_to_cpu(buf[i]);
3005 #endif /* __BIG_ENDIAN */
3009 * ata_mmio_data_xfer - Transfer data by MMIO
3010 * @ap: port to read/write
3012 * @buflen: buffer length
3013 * @write_data: read/write
3015 * Transfer data from/to the device data register by MMIO.
3018 * Inherited from caller.
3021 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3022 unsigned int buflen, int write_data)
3025 unsigned int words = buflen >> 1;
3026 u16 *buf16 = (u16 *) buf;
3027 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3029 /* Transfer multiple of 2 bytes */
3031 for (i = 0; i < words; i++)
3032 writew(le16_to_cpu(buf16[i]), mmio);
3034 for (i = 0; i < words; i++)
3035 buf16[i] = cpu_to_le16(readw(mmio));
3038 /* Transfer trailing 1 byte, if any. */
3039 if (unlikely(buflen & 0x01)) {
3040 u16 align_buf[1] = { 0 };
3041 unsigned char *trailing_buf = buf + buflen - 1;
3044 memcpy(align_buf, trailing_buf, 1);
3045 writew(le16_to_cpu(align_buf[0]), mmio);
3047 align_buf[0] = cpu_to_le16(readw(mmio));
3048 memcpy(trailing_buf, align_buf, 1);
3054 * ata_pio_data_xfer - Transfer data by PIO
3055 * @ap: port to read/write
3057 * @buflen: buffer length
3058 * @write_data: read/write
3060 * Transfer data from/to the device data register by PIO.
3063 * Inherited from caller.
3066 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3067 unsigned int buflen, int write_data)
3069 unsigned int words = buflen >> 1;
3071 /* Transfer multiple of 2 bytes */
3073 outsw(ap->ioaddr.data_addr, buf, words);
3075 insw(ap->ioaddr.data_addr, buf, words);
3077 /* Transfer trailing 1 byte, if any. */
3078 if (unlikely(buflen & 0x01)) {
3079 u16 align_buf[1] = { 0 };
3080 unsigned char *trailing_buf = buf + buflen - 1;
3083 memcpy(align_buf, trailing_buf, 1);
3084 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3086 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3087 memcpy(trailing_buf, align_buf, 1);
3093 * ata_data_xfer - Transfer data from/to the data register.
3094 * @ap: port to read/write
3096 * @buflen: buffer length
3097 * @do_write: read/write
3099 * Transfer data from/to the device data register.
3102 * Inherited from caller.
3105 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3106 unsigned int buflen, int do_write)
3108 /* Make the crap hardware pay the costs not the good stuff */
3109 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3110 unsigned long flags;
3111 local_irq_save(flags);
3112 if (ap->flags & ATA_FLAG_MMIO)
3113 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3115 ata_pio_data_xfer(ap, buf, buflen, do_write);
3116 local_irq_restore(flags);
3118 if (ap->flags & ATA_FLAG_MMIO)
3119 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3121 ata_pio_data_xfer(ap, buf, buflen, do_write);
3126 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3127 * @qc: Command on going
3129 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3132 * Inherited from caller.
3135 static void ata_pio_sector(struct ata_queued_cmd *qc)
3137 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3138 struct scatterlist *sg = qc->__sg;
3139 struct ata_port *ap = qc->ap;
3141 unsigned int offset;
3144 if (qc->cursect == (qc->nsect - 1))
3145 ap->hsm_task_state = HSM_ST_LAST;
3147 page = sg[qc->cursg].page;
3148 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3150 /* get the current page and offset */
3151 page = nth_page(page, (offset >> PAGE_SHIFT));
3152 offset %= PAGE_SIZE;
3154 buf = kmap(page) + offset;
3159 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3164 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3166 /* do the actual data transfer */
3167 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3168 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3174 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3175 * @qc: Command on going
3176 * @bytes: number of bytes
3178 * Transfer Transfer data from/to the ATAPI device.
3181 * Inherited from caller.
3185 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3187 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3188 struct scatterlist *sg = qc->__sg;
3189 struct ata_port *ap = qc->ap;
3192 unsigned int offset, count;
3194 if (qc->curbytes + bytes >= qc->nbytes)
3195 ap->hsm_task_state = HSM_ST_LAST;
3198 if (unlikely(qc->cursg >= qc->n_elem)) {
3200 * The end of qc->sg is reached and the device expects
3201 * more data to transfer. In order not to overrun qc->sg
3202 * and fulfill length specified in the byte count register,
3203 * - for read case, discard trailing data from the device
3204 * - for write case, padding zero data to the device
3206 u16 pad_buf[1] = { 0 };
3207 unsigned int words = bytes >> 1;
3210 if (words) /* warning if bytes > 1 */
3211 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3214 for (i = 0; i < words; i++)
3215 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3217 ap->hsm_task_state = HSM_ST_LAST;
3221 sg = &qc->__sg[qc->cursg];
3224 offset = sg->offset + qc->cursg_ofs;
3226 /* get the current page and offset */
3227 page = nth_page(page, (offset >> PAGE_SHIFT));
3228 offset %= PAGE_SIZE;
3230 /* don't overrun current sg */
3231 count = min(sg->length - qc->cursg_ofs, bytes);
3233 /* don't cross page boundaries */
3234 count = min(count, (unsigned int)PAGE_SIZE - offset);
3236 buf = kmap(page) + offset;
3239 qc->curbytes += count;
3240 qc->cursg_ofs += count;
3242 if (qc->cursg_ofs == sg->length) {
3247 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3249 /* do the actual data transfer */
3250 ata_data_xfer(ap, buf, count, do_write);
3259 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3260 * @qc: Command on going
3262 * Transfer Transfer data from/to the ATAPI device.
3265 * Inherited from caller.
3268 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3270 struct ata_port *ap = qc->ap;
3271 struct ata_device *dev = qc->dev;
3272 unsigned int ireason, bc_lo, bc_hi, bytes;
3273 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3275 ap->ops->tf_read(ap, &qc->tf);
3276 ireason = qc->tf.nsect;
3277 bc_lo = qc->tf.lbam;
3278 bc_hi = qc->tf.lbah;
3279 bytes = (bc_hi << 8) | bc_lo;
3281 /* shall be cleared to zero, indicating xfer of data */
3282 if (ireason & (1 << 0))
3285 /* make sure transfer direction matches expected */
3286 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3287 if (do_write != i_write)
3290 __atapi_pio_bytes(qc, bytes);
3295 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3296 ap->id, dev->devno);
3297 qc->err_mask |= AC_ERR_HSM;
3298 ap->hsm_task_state = HSM_ST_ERR;
3302 * ata_pio_block - start PIO on a block
3303 * @ap: the target ata_port
3306 * None. (executing in kernel thread context)
3309 static void ata_pio_block(struct ata_port *ap)
3311 struct ata_queued_cmd *qc;
3315 * This is purely heuristic. This is a fast path.
3316 * Sometimes when we enter, BSY will be cleared in
3317 * a chk-status or two. If not, the drive is probably seeking
3318 * or something. Snooze for a couple msecs, then
3319 * chk-status again. If still busy, fall back to
3320 * HSM_ST_POLL state.
3322 status = ata_busy_wait(ap, ATA_BUSY, 5);
3323 if (status & ATA_BUSY) {
3325 status = ata_busy_wait(ap, ATA_BUSY, 10);
3326 if (status & ATA_BUSY) {
3327 ap->hsm_task_state = HSM_ST_POLL;
3328 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3333 qc = ata_qc_from_tag(ap, ap->active_tag);
3337 if (status & (ATA_ERR | ATA_DF)) {
3338 qc->err_mask |= AC_ERR_DEV;
3339 ap->hsm_task_state = HSM_ST_ERR;
3343 /* transfer data if any */
3344 if (is_atapi_taskfile(&qc->tf)) {
3345 /* DRQ=0 means no more data to transfer */
3346 if ((status & ATA_DRQ) == 0) {
3347 ap->hsm_task_state = HSM_ST_LAST;
3351 atapi_pio_bytes(qc);
3353 /* handle BSY=0, DRQ=0 as error */
3354 if ((status & ATA_DRQ) == 0) {
3355 qc->err_mask |= AC_ERR_HSM;
3356 ap->hsm_task_state = HSM_ST_ERR;
3364 static void ata_pio_error(struct ata_port *ap)
3366 struct ata_queued_cmd *qc;
3368 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3370 qc = ata_qc_from_tag(ap, ap->active_tag);
3373 /* make sure qc->err_mask is available to
3374 * know what's wrong and recover
3376 assert(qc->err_mask);
3378 ap->hsm_task_state = HSM_ST_IDLE;
3380 ata_poll_qc_complete(qc);
3383 static void ata_pio_task(void *_data)
3385 struct ata_port *ap = _data;
3386 unsigned long timeout;
3393 switch (ap->hsm_task_state) {
3402 qc_completed = ata_pio_complete(ap);
3406 case HSM_ST_LAST_POLL:
3407 timeout = ata_pio_poll(ap);
3417 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3418 else if (!qc_completed)
3423 * ata_qc_timeout - Handle timeout of queued command
3424 * @qc: Command that timed out
3426 * Some part of the kernel (currently, only the SCSI layer)
3427 * has noticed that the active command on port @ap has not
3428 * completed after a specified length of time. Handle this
3429 * condition by disabling DMA (if necessary) and completing
3430 * transactions, with error if necessary.
3432 * This also handles the case of the "lost interrupt", where
3433 * for some reason (possibly hardware bug, possibly driver bug)
3434 * an interrupt was not delivered to the driver, even though the
3435 * transaction completed successfully.
3438 * Inherited from SCSI layer (none, can sleep)
3441 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3443 struct ata_port *ap = qc->ap;
3444 struct ata_host_set *host_set = ap->host_set;
3445 u8 host_stat = 0, drv_stat;
3446 unsigned long flags;
3450 spin_lock_irqsave(&host_set->lock, flags);
3452 /* hack alert! We cannot use the supplied completion
3453 * function from inside the ->eh_strategy_handler() thread.
3454 * libata is the only user of ->eh_strategy_handler() in
3455 * any kernel, so the default scsi_done() assumes it is
3456 * not being called from the SCSI EH.
3458 qc->scsidone = scsi_finish_command;
3460 switch (qc->tf.protocol) {
3463 case ATA_PROT_ATAPI_DMA:
3464 host_stat = ap->ops->bmdma_status(ap);
3466 /* before we do anything else, clear DMA-Start bit */
3467 ap->ops->bmdma_stop(qc);
3473 drv_stat = ata_chk_status(ap);
3475 /* ack bmdma irq events */
3476 ap->ops->irq_clear(ap);
3478 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3479 ap->id, qc->tf.command, drv_stat, host_stat);
3481 /* complete taskfile transaction */
3482 qc->err_mask |= ac_err_mask(drv_stat);
3483 ata_qc_complete(qc);
3487 spin_unlock_irqrestore(&host_set->lock, flags);
3493 * ata_eng_timeout - Handle timeout of queued command
3494 * @ap: Port on which timed-out command is active
3496 * Some part of the kernel (currently, only the SCSI layer)
3497 * has noticed that the active command on port @ap has not
3498 * completed after a specified length of time. Handle this
3499 * condition by disabling DMA (if necessary) and completing
3500 * transactions, with error if necessary.
3502 * This also handles the case of the "lost interrupt", where
3503 * for some reason (possibly hardware bug, possibly driver bug)
3504 * an interrupt was not delivered to the driver, even though the
3505 * transaction completed successfully.
3508 * Inherited from SCSI layer (none, can sleep)
3511 void ata_eng_timeout(struct ata_port *ap)
3513 struct ata_queued_cmd *qc;
3517 qc = ata_qc_from_tag(ap, ap->active_tag);
3521 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3531 * ata_qc_new - Request an available ATA command, for queueing
3532 * @ap: Port associated with device @dev
3533 * @dev: Device from whom we request an available command structure
3539 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3541 struct ata_queued_cmd *qc = NULL;
3544 for (i = 0; i < ATA_MAX_QUEUE; i++)
3545 if (!test_and_set_bit(i, &ap->qactive)) {
3546 qc = ata_qc_from_tag(ap, i);
3557 * ata_qc_new_init - Request an available ATA command, and initialize it
3558 * @ap: Port associated with device @dev
3559 * @dev: Device from whom we request an available command structure
3565 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3566 struct ata_device *dev)
3568 struct ata_queued_cmd *qc;
3570 qc = ata_qc_new(ap);
3583 * ata_qc_free - free unused ata_queued_cmd
3584 * @qc: Command to complete
3586 * Designed to free unused ata_queued_cmd object
3587 * in case something prevents using it.
3590 * spin_lock_irqsave(host_set lock)
3592 void ata_qc_free(struct ata_queued_cmd *qc)
3594 struct ata_port *ap = qc->ap;
3597 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3601 if (likely(ata_tag_valid(tag))) {
3602 if (tag == ap->active_tag)
3603 ap->active_tag = ATA_TAG_POISON;
3604 qc->tag = ATA_TAG_POISON;
3605 clear_bit(tag, &ap->qactive);
3610 * ata_qc_complete - Complete an active ATA command
3611 * @qc: Command to complete
3612 * @err_mask: ATA Status register contents
3614 * Indicate to the mid and upper layers that an ATA
3615 * command has completed, with either an ok or not-ok status.
3618 * spin_lock_irqsave(host_set lock)
3621 void ata_qc_complete(struct ata_queued_cmd *qc)
3623 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3624 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3626 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3629 /* atapi: mark qc as inactive to prevent the interrupt handler
3630 * from completing the command twice later, before the error handler
3631 * is called. (when rc != 0 and atapi request sense is needed)
3633 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3635 /* call completion callback */
3636 qc->complete_fn(qc);
3639 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3641 struct ata_port *ap = qc->ap;
3643 switch (qc->tf.protocol) {
3645 case ATA_PROT_ATAPI_DMA:
3648 case ATA_PROT_ATAPI:
3650 case ATA_PROT_PIO_MULT:
3651 if (ap->flags & ATA_FLAG_PIO_DMA)
3664 * ata_qc_issue - issue taskfile to device
3665 * @qc: command to issue to device
3667 * Prepare an ATA command to submission to device.
3668 * This includes mapping the data into a DMA-able
3669 * area, filling in the S/G table, and finally
3670 * writing the taskfile to hardware, starting the command.
3673 * spin_lock_irqsave(host_set lock)
3676 * Zero on success, AC_ERR_* mask on failure
3679 unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
3681 struct ata_port *ap = qc->ap;
3683 if (ata_should_dma_map(qc)) {
3684 if (qc->flags & ATA_QCFLAG_SG) {
3685 if (ata_sg_setup(qc))
3687 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3688 if (ata_sg_setup_one(qc))
3692 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3695 ap->ops->qc_prep(qc);
3697 qc->ap->active_tag = qc->tag;
3698 qc->flags |= ATA_QCFLAG_ACTIVE;
3700 return ap->ops->qc_issue(qc);
3703 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3704 return AC_ERR_SYSTEM;
3709 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3710 * @qc: command to issue to device
3712 * Using various libata functions and hooks, this function
3713 * starts an ATA command. ATA commands are grouped into
3714 * classes called "protocols", and issuing each type of protocol
3715 * is slightly different.
3717 * May be used as the qc_issue() entry in ata_port_operations.
3720 * spin_lock_irqsave(host_set lock)
3723 * Zero on success, AC_ERR_* mask on failure
3726 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3728 struct ata_port *ap = qc->ap;
3730 ata_dev_select(ap, qc->dev->devno, 1, 0);
3732 switch (qc->tf.protocol) {
3733 case ATA_PROT_NODATA:
3734 ata_tf_to_host(ap, &qc->tf);
3738 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3739 ap->ops->bmdma_setup(qc); /* set up bmdma */
3740 ap->ops->bmdma_start(qc); /* initiate bmdma */
3743 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3744 ata_qc_set_polling(qc);
3745 ata_tf_to_host(ap, &qc->tf);
3746 ap->hsm_task_state = HSM_ST;
3747 queue_work(ata_wq, &ap->pio_task);
3750 case ATA_PROT_ATAPI:
3751 ata_qc_set_polling(qc);
3752 ata_tf_to_host(ap, &qc->tf);
3753 queue_work(ata_wq, &ap->packet_task);
3756 case ATA_PROT_ATAPI_NODATA:
3757 ap->flags |= ATA_FLAG_NOINTR;
3758 ata_tf_to_host(ap, &qc->tf);
3759 queue_work(ata_wq, &ap->packet_task);
3762 case ATA_PROT_ATAPI_DMA:
3763 ap->flags |= ATA_FLAG_NOINTR;
3764 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3765 ap->ops->bmdma_setup(qc); /* set up bmdma */
3766 queue_work(ata_wq, &ap->packet_task);
3771 return AC_ERR_SYSTEM;
3778 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3779 * @qc: Info associated with this ATA transaction.
3782 * spin_lock_irqsave(host_set lock)
3785 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3787 struct ata_port *ap = qc->ap;
3788 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3790 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3792 /* load PRD table addr. */
3793 mb(); /* make sure PRD table writes are visible to controller */
3794 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3796 /* specify data direction, triple-check start bit is clear */
3797 dmactl = readb(mmio + ATA_DMA_CMD);
3798 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3800 dmactl |= ATA_DMA_WR;
3801 writeb(dmactl, mmio + ATA_DMA_CMD);
3803 /* issue r/w command */
3804 ap->ops->exec_command(ap, &qc->tf);
3808 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3809 * @qc: Info associated with this ATA transaction.
3812 * spin_lock_irqsave(host_set lock)
3815 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3817 struct ata_port *ap = qc->ap;
3818 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3821 /* start host DMA transaction */
3822 dmactl = readb(mmio + ATA_DMA_CMD);
3823 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3825 /* Strictly, one may wish to issue a readb() here, to
3826 * flush the mmio write. However, control also passes
3827 * to the hardware at this point, and it will interrupt
3828 * us when we are to resume control. So, in effect,
3829 * we don't care when the mmio write flushes.
3830 * Further, a read of the DMA status register _immediately_
3831 * following the write may not be what certain flaky hardware
3832 * is expected, so I think it is best to not add a readb()
3833 * without first all the MMIO ATA cards/mobos.
3834 * Or maybe I'm just being paranoid.
3839 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3840 * @qc: Info associated with this ATA transaction.
3843 * spin_lock_irqsave(host_set lock)
3846 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3848 struct ata_port *ap = qc->ap;
3849 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3852 /* load PRD table addr. */
3853 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3855 /* specify data direction, triple-check start bit is clear */
3856 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3857 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3859 dmactl |= ATA_DMA_WR;
3860 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3862 /* issue r/w command */
3863 ap->ops->exec_command(ap, &qc->tf);
3867 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3868 * @qc: Info associated with this ATA transaction.
3871 * spin_lock_irqsave(host_set lock)
3874 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3876 struct ata_port *ap = qc->ap;
3879 /* start host DMA transaction */
3880 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3881 outb(dmactl | ATA_DMA_START,
3882 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3887 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3888 * @qc: Info associated with this ATA transaction.
3890 * Writes the ATA_DMA_START flag to the DMA command register.
3892 * May be used as the bmdma_start() entry in ata_port_operations.
3895 * spin_lock_irqsave(host_set lock)
3897 void ata_bmdma_start(struct ata_queued_cmd *qc)
3899 if (qc->ap->flags & ATA_FLAG_MMIO)
3900 ata_bmdma_start_mmio(qc);
3902 ata_bmdma_start_pio(qc);
3907 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3908 * @qc: Info associated with this ATA transaction.
3910 * Writes address of PRD table to device's PRD Table Address
3911 * register, sets the DMA control register, and calls
3912 * ops->exec_command() to start the transfer.
3914 * May be used as the bmdma_setup() entry in ata_port_operations.
3917 * spin_lock_irqsave(host_set lock)
3919 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3921 if (qc->ap->flags & ATA_FLAG_MMIO)
3922 ata_bmdma_setup_mmio(qc);
3924 ata_bmdma_setup_pio(qc);
3929 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3930 * @ap: Port associated with this ATA transaction.
3932 * Clear interrupt and error flags in DMA status register.
3934 * May be used as the irq_clear() entry in ata_port_operations.
3937 * spin_lock_irqsave(host_set lock)
3940 void ata_bmdma_irq_clear(struct ata_port *ap)
3942 if (ap->flags & ATA_FLAG_MMIO) {
3943 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3944 writeb(readb(mmio), mmio);
3946 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3947 outb(inb(addr), addr);
3954 * ata_bmdma_status - Read PCI IDE BMDMA status
3955 * @ap: Port associated with this ATA transaction.
3957 * Read and return BMDMA status register.
3959 * May be used as the bmdma_status() entry in ata_port_operations.
3962 * spin_lock_irqsave(host_set lock)
3965 u8 ata_bmdma_status(struct ata_port *ap)
3968 if (ap->flags & ATA_FLAG_MMIO) {
3969 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3970 host_stat = readb(mmio + ATA_DMA_STATUS);
3972 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3978 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3979 * @qc: Command we are ending DMA for
3981 * Clears the ATA_DMA_START flag in the dma control register
3983 * May be used as the bmdma_stop() entry in ata_port_operations.
3986 * spin_lock_irqsave(host_set lock)
3989 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3991 struct ata_port *ap = qc->ap;
3992 if (ap->flags & ATA_FLAG_MMIO) {
3993 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3995 /* clear start/stop bit */
3996 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3997 mmio + ATA_DMA_CMD);
3999 /* clear start/stop bit */
4000 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4001 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4004 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4005 ata_altstatus(ap); /* dummy read */
4009 * ata_host_intr - Handle host interrupt for given (port, task)
4010 * @ap: Port on which interrupt arrived (possibly...)
4011 * @qc: Taskfile currently active in engine
4013 * Handle host interrupt for given queued command. Currently,
4014 * only DMA interrupts are handled. All other commands are
4015 * handled via polling with interrupts disabled (nIEN bit).
4018 * spin_lock_irqsave(host_set lock)
4021 * One if interrupt was handled, zero if not (shared irq).
4024 inline unsigned int ata_host_intr (struct ata_port *ap,
4025 struct ata_queued_cmd *qc)
4027 u8 status, host_stat;
4029 switch (qc->tf.protocol) {
4032 case ATA_PROT_ATAPI_DMA:
4033 case ATA_PROT_ATAPI:
4034 /* check status of DMA engine */
4035 host_stat = ap->ops->bmdma_status(ap);
4036 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4038 /* if it's not our irq... */
4039 if (!(host_stat & ATA_DMA_INTR))
4042 /* before we do anything else, clear DMA-Start bit */
4043 ap->ops->bmdma_stop(qc);
4047 case ATA_PROT_ATAPI_NODATA:
4048 case ATA_PROT_NODATA:
4049 /* check altstatus */
4050 status = ata_altstatus(ap);
4051 if (status & ATA_BUSY)
4054 /* check main status, clearing INTRQ */
4055 status = ata_chk_status(ap);
4056 if (unlikely(status & ATA_BUSY))
4058 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4059 ap->id, qc->tf.protocol, status);
4061 /* ack bmdma irq events */
4062 ap->ops->irq_clear(ap);
4064 /* complete taskfile transaction */
4065 qc->err_mask |= ac_err_mask(status);
4066 ata_qc_complete(qc);
4073 return 1; /* irq handled */
4076 ap->stats.idle_irq++;
4079 if ((ap->stats.idle_irq % 1000) == 0) {
4081 ata_irq_ack(ap, 0); /* debug trap */
4082 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4085 return 0; /* irq not handled */
4089 * ata_interrupt - Default ATA host interrupt handler
4090 * @irq: irq line (unused)
4091 * @dev_instance: pointer to our ata_host_set information structure
4094 * Default interrupt handler for PCI IDE devices. Calls
4095 * ata_host_intr() for each port that is not disabled.
4098 * Obtains host_set lock during operation.
4101 * IRQ_NONE or IRQ_HANDLED.
4104 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4106 struct ata_host_set *host_set = dev_instance;
4108 unsigned int handled = 0;
4109 unsigned long flags;
4111 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4112 spin_lock_irqsave(&host_set->lock, flags);
4114 for (i = 0; i < host_set->n_ports; i++) {
4115 struct ata_port *ap;
4117 ap = host_set->ports[i];
4119 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4120 struct ata_queued_cmd *qc;
4122 qc = ata_qc_from_tag(ap, ap->active_tag);
4123 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4124 (qc->flags & ATA_QCFLAG_ACTIVE))
4125 handled |= ata_host_intr(ap, qc);
4129 spin_unlock_irqrestore(&host_set->lock, flags);
4131 return IRQ_RETVAL(handled);
4135 * atapi_packet_task - Write CDB bytes to hardware
4136 * @_data: Port to which ATAPI device is attached.
4138 * When device has indicated its readiness to accept
4139 * a CDB, this function is called. Send the CDB.
4140 * If DMA is to be performed, exit immediately.
4141 * Otherwise, we are in polling mode, so poll
4142 * status under operation succeeds or fails.
4145 * Kernel thread context (may sleep)
4148 static void atapi_packet_task(void *_data)
4150 struct ata_port *ap = _data;
4151 struct ata_queued_cmd *qc;
4154 qc = ata_qc_from_tag(ap, ap->active_tag);
4156 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4158 /* sleep-wait for BSY to clear */
4159 DPRINTK("busy wait\n");
4160 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
4161 qc->err_mask |= AC_ERR_TIMEOUT;
4165 /* make sure DRQ is set */
4166 status = ata_chk_status(ap);
4167 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
4168 qc->err_mask |= AC_ERR_HSM;
4173 DPRINTK("send cdb\n");
4174 assert(ap->cdb_len >= 12);
4176 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4177 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4178 unsigned long flags;
4180 /* Once we're done issuing command and kicking bmdma,
4181 * irq handler takes over. To not lose irq, we need
4182 * to clear NOINTR flag before sending cdb, but
4183 * interrupt handler shouldn't be invoked before we're
4184 * finished. Hence, the following locking.
4186 spin_lock_irqsave(&ap->host_set->lock, flags);
4187 ap->flags &= ~ATA_FLAG_NOINTR;
4188 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4189 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4190 ap->ops->bmdma_start(qc); /* initiate bmdma */
4191 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4193 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4195 /* PIO commands are handled by polling */
4196 ap->hsm_task_state = HSM_ST;
4197 queue_work(ata_wq, &ap->pio_task);
4203 ata_poll_qc_complete(qc);
4208 * ata_port_start - Set port up for dma.
4209 * @ap: Port to initialize
4211 * Called just after data structures for each port are
4212 * initialized. Allocates space for PRD table.
4214 * May be used as the port_start() entry in ata_port_operations.
4217 * Inherited from caller.
4221 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4222 * without filling any other registers
4224 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4227 struct ata_taskfile tf;
4230 ata_tf_init(ap, &tf, dev->devno);
4233 tf.flags |= ATA_TFLAG_DEVICE;
4234 tf.protocol = ATA_PROT_NODATA;
4236 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4238 printk(KERN_ERR "%s: ata command failed: %d\n",
4244 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4248 if (!ata_try_flush_cache(dev))
4251 if (ata_id_has_flush_ext(dev->id))
4252 cmd = ATA_CMD_FLUSH_EXT;
4254 cmd = ATA_CMD_FLUSH;
4256 return ata_do_simple_cmd(ap, dev, cmd);
4259 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4261 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4264 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4266 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4270 * ata_device_resume - wakeup a previously suspended devices
4272 * Kick the drive back into action, by sending it an idle immediate
4273 * command and making sure its transfer mode matches between drive
4277 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4279 if (ap->flags & ATA_FLAG_SUSPENDED) {
4280 ap->flags &= ~ATA_FLAG_SUSPENDED;
4283 if (!ata_dev_present(dev))
4285 if (dev->class == ATA_DEV_ATA)
4286 ata_start_drive(ap, dev);
4292 * ata_device_suspend - prepare a device for suspend
4294 * Flush the cache on the drive, if appropriate, then issue a
4295 * standbynow command.
4298 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4300 if (!ata_dev_present(dev))
4302 if (dev->class == ATA_DEV_ATA)
4303 ata_flush_cache(ap, dev);
4305 ata_standby_drive(ap, dev);
4306 ap->flags |= ATA_FLAG_SUSPENDED;
4310 int ata_port_start (struct ata_port *ap)
4312 struct device *dev = ap->host_set->dev;
4315 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4319 rc = ata_pad_alloc(ap, dev);
4321 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4325 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4332 * ata_port_stop - Undo ata_port_start()
4333 * @ap: Port to shut down
4335 * Frees the PRD table.
4337 * May be used as the port_stop() entry in ata_port_operations.
4340 * Inherited from caller.
4343 void ata_port_stop (struct ata_port *ap)
4345 struct device *dev = ap->host_set->dev;
4347 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4348 ata_pad_free(ap, dev);
4351 void ata_host_stop (struct ata_host_set *host_set)
4353 if (host_set->mmio_base)
4354 iounmap(host_set->mmio_base);
4359 * ata_host_remove - Unregister SCSI host structure with upper layers
4360 * @ap: Port to unregister
4361 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4364 * Inherited from caller.
4367 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4369 struct Scsi_Host *sh = ap->host;
4374 scsi_remove_host(sh);
4376 ap->ops->port_stop(ap);
4380 * ata_host_init - Initialize an ata_port structure
4381 * @ap: Structure to initialize
4382 * @host: associated SCSI mid-layer structure
4383 * @host_set: Collection of hosts to which @ap belongs
4384 * @ent: Probe information provided by low-level driver
4385 * @port_no: Port number associated with this ata_port
4387 * Initialize a new ata_port structure, and its associated
4391 * Inherited from caller.
4394 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4395 struct ata_host_set *host_set,
4396 const struct ata_probe_ent *ent, unsigned int port_no)
4402 host->max_channel = 1;
4403 host->unique_id = ata_unique_id++;
4404 host->max_cmd_len = 12;
4406 ap->flags = ATA_FLAG_PORT_DISABLED;
4407 ap->id = host->unique_id;
4409 ap->ctl = ATA_DEVCTL_OBS;
4410 ap->host_set = host_set;
4411 ap->port_no = port_no;
4413 ent->legacy_mode ? ent->hard_port_no : port_no;
4414 ap->pio_mask = ent->pio_mask;
4415 ap->mwdma_mask = ent->mwdma_mask;
4416 ap->udma_mask = ent->udma_mask;
4417 ap->flags |= ent->host_flags;
4418 ap->ops = ent->port_ops;
4419 ap->cbl = ATA_CBL_NONE;
4420 ap->active_tag = ATA_TAG_POISON;
4421 ap->last_ctl = 0xFF;
4423 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4424 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4426 for (i = 0; i < ATA_MAX_DEVICES; i++)
4427 ap->device[i].devno = i;
4430 ap->stats.unhandled_irq = 1;
4431 ap->stats.idle_irq = 1;
4434 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4438 * ata_host_add - Attach low-level ATA driver to system
4439 * @ent: Information provided by low-level driver
4440 * @host_set: Collections of ports to which we add
4441 * @port_no: Port number associated with this host
4443 * Attach low-level ATA driver to system.
4446 * PCI/etc. bus probe sem.
4449 * New ata_port on success, for NULL on error.
4452 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4453 struct ata_host_set *host_set,
4454 unsigned int port_no)
4456 struct Scsi_Host *host;
4457 struct ata_port *ap;
4461 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4465 ap = (struct ata_port *) &host->hostdata[0];
4467 ata_host_init(ap, host, host_set, ent, port_no);
4469 rc = ap->ops->port_start(ap);
4476 scsi_host_put(host);
4481 * ata_device_add - Register hardware device with ATA and SCSI layers
4482 * @ent: Probe information describing hardware device to be registered
4484 * This function processes the information provided in the probe
4485 * information struct @ent, allocates the necessary ATA and SCSI
4486 * host information structures, initializes them, and registers
4487 * everything with requisite kernel subsystems.
4489 * This function requests irqs, probes the ATA bus, and probes
4493 * PCI/etc. bus probe sem.
4496 * Number of ports registered. Zero on error (no ports registered).
4499 int ata_device_add(const struct ata_probe_ent *ent)
4501 unsigned int count = 0, i;
4502 struct device *dev = ent->dev;
4503 struct ata_host_set *host_set;
4506 /* alloc a container for our list of ATA ports (buses) */
4507 host_set = kzalloc(sizeof(struct ata_host_set) +
4508 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4511 spin_lock_init(&host_set->lock);
4513 host_set->dev = dev;
4514 host_set->n_ports = ent->n_ports;
4515 host_set->irq = ent->irq;
4516 host_set->mmio_base = ent->mmio_base;
4517 host_set->private_data = ent->private_data;
4518 host_set->ops = ent->port_ops;
4520 /* register each port bound to this device */
4521 for (i = 0; i < ent->n_ports; i++) {
4522 struct ata_port *ap;
4523 unsigned long xfer_mode_mask;
4525 ap = ata_host_add(ent, host_set, i);
4529 host_set->ports[i] = ap;
4530 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4531 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4532 (ap->pio_mask << ATA_SHIFT_PIO);
4534 /* print per-port info to dmesg */
4535 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4536 "bmdma 0x%lX irq %lu\n",
4538 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4539 ata_mode_string(xfer_mode_mask),
4540 ap->ioaddr.cmd_addr,
4541 ap->ioaddr.ctl_addr,
4542 ap->ioaddr.bmdma_addr,
4546 host_set->ops->irq_clear(ap);
4553 /* obtain irq, that is shared between channels */
4554 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4555 DRV_NAME, host_set))
4558 /* perform each probe synchronously */
4559 DPRINTK("probe begin\n");
4560 for (i = 0; i < count; i++) {
4561 struct ata_port *ap;
4564 ap = host_set->ports[i];
4566 DPRINTK("ata%u: probe begin\n", ap->id);
4567 rc = ata_bus_probe(ap);
4568 DPRINTK("ata%u: probe end\n", ap->id);
4571 /* FIXME: do something useful here?
4572 * Current libata behavior will
4573 * tear down everything when
4574 * the module is removed
4575 * or the h/w is unplugged.
4579 rc = scsi_add_host(ap->host, dev);
4581 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4583 /* FIXME: do something useful here */
4584 /* FIXME: handle unconditional calls to
4585 * scsi_scan_host and ata_host_remove, below,
4591 /* probes are done, now scan each port's disk(s) */
4592 DPRINTK("probe begin\n");
4593 for (i = 0; i < count; i++) {
4594 struct ata_port *ap = host_set->ports[i];
4596 ata_scsi_scan_host(ap);
4599 dev_set_drvdata(dev, host_set);
4601 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4602 return ent->n_ports; /* success */
4605 for (i = 0; i < count; i++) {
4606 ata_host_remove(host_set->ports[i], 1);
4607 scsi_host_put(host_set->ports[i]->host);
4611 VPRINTK("EXIT, returning 0\n");
4616 * ata_host_set_remove - PCI layer callback for device removal
4617 * @host_set: ATA host set that was removed
4619 * Unregister all objects associated with this host set. Free those
4623 * Inherited from calling layer (may sleep).
4626 void ata_host_set_remove(struct ata_host_set *host_set)
4628 struct ata_port *ap;
4631 for (i = 0; i < host_set->n_ports; i++) {
4632 ap = host_set->ports[i];
4633 scsi_remove_host(ap->host);
4636 free_irq(host_set->irq, host_set);
4638 for (i = 0; i < host_set->n_ports; i++) {
4639 ap = host_set->ports[i];
4641 ata_scsi_release(ap->host);
4643 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4644 struct ata_ioports *ioaddr = &ap->ioaddr;
4646 if (ioaddr->cmd_addr == 0x1f0)
4647 release_region(0x1f0, 8);
4648 else if (ioaddr->cmd_addr == 0x170)
4649 release_region(0x170, 8);
4652 scsi_host_put(ap->host);
4655 if (host_set->ops->host_stop)
4656 host_set->ops->host_stop(host_set);
4662 * ata_scsi_release - SCSI layer callback hook for host unload
4663 * @host: libata host to be unloaded
4665 * Performs all duties necessary to shut down a libata port...
4666 * Kill port kthread, disable port, and release resources.
4669 * Inherited from SCSI layer.
4675 int ata_scsi_release(struct Scsi_Host *host)
4677 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4681 ap->ops->port_disable(ap);
4682 ata_host_remove(ap, 0);
4689 * ata_std_ports - initialize ioaddr with standard port offsets.
4690 * @ioaddr: IO address structure to be initialized
4692 * Utility function which initializes data_addr, error_addr,
4693 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4694 * device_addr, status_addr, and command_addr to standard offsets
4695 * relative to cmd_addr.
4697 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4700 void ata_std_ports(struct ata_ioports *ioaddr)
4702 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4703 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4704 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4705 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4706 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4707 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4708 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4709 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4710 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4711 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4714 static struct ata_probe_ent *
4715 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4717 struct ata_probe_ent *probe_ent;
4719 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4721 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4722 kobject_name(&(dev->kobj)));
4726 INIT_LIST_HEAD(&probe_ent->node);
4727 probe_ent->dev = dev;
4729 probe_ent->sht = port->sht;
4730 probe_ent->host_flags = port->host_flags;
4731 probe_ent->pio_mask = port->pio_mask;
4732 probe_ent->mwdma_mask = port->mwdma_mask;
4733 probe_ent->udma_mask = port->udma_mask;
4734 probe_ent->port_ops = port->port_ops;
4743 void ata_pci_host_stop (struct ata_host_set *host_set)
4745 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4747 pci_iounmap(pdev, host_set->mmio_base);
4751 * ata_pci_init_native_mode - Initialize native-mode driver
4752 * @pdev: pci device to be initialized
4753 * @port: array[2] of pointers to port info structures.
4754 * @ports: bitmap of ports present
4756 * Utility function which allocates and initializes an
4757 * ata_probe_ent structure for a standard dual-port
4758 * PIO-based IDE controller. The returned ata_probe_ent
4759 * structure can be passed to ata_device_add(). The returned
4760 * ata_probe_ent structure should then be freed with kfree().
4762 * The caller need only pass the address of the primary port, the
4763 * secondary will be deduced automatically. If the device has non
4764 * standard secondary port mappings this function can be called twice,
4765 * once for each interface.
4768 struct ata_probe_ent *
4769 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4771 struct ata_probe_ent *probe_ent =
4772 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4778 probe_ent->irq = pdev->irq;
4779 probe_ent->irq_flags = SA_SHIRQ;
4780 probe_ent->private_data = port[0]->private_data;
4782 if (ports & ATA_PORT_PRIMARY) {
4783 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4784 probe_ent->port[p].altstatus_addr =
4785 probe_ent->port[p].ctl_addr =
4786 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4787 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4788 ata_std_ports(&probe_ent->port[p]);
4792 if (ports & ATA_PORT_SECONDARY) {
4793 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4794 probe_ent->port[p].altstatus_addr =
4795 probe_ent->port[p].ctl_addr =
4796 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4797 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4798 ata_std_ports(&probe_ent->port[p]);
4802 probe_ent->n_ports = p;
4806 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num)
4808 struct ata_probe_ent *probe_ent;
4810 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port);
4814 probe_ent->legacy_mode = 1;
4815 probe_ent->n_ports = 1;
4816 probe_ent->hard_port_no = port_num;
4817 probe_ent->private_data = port->private_data;
4822 probe_ent->irq = 14;
4823 probe_ent->port[0].cmd_addr = 0x1f0;
4824 probe_ent->port[0].altstatus_addr =
4825 probe_ent->port[0].ctl_addr = 0x3f6;
4828 probe_ent->irq = 15;
4829 probe_ent->port[0].cmd_addr = 0x170;
4830 probe_ent->port[0].altstatus_addr =
4831 probe_ent->port[0].ctl_addr = 0x376;
4834 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4835 ata_std_ports(&probe_ent->port[0]);
4840 * ata_pci_init_one - Initialize/register PCI IDE host controller
4841 * @pdev: Controller to be initialized
4842 * @port_info: Information from low-level host driver
4843 * @n_ports: Number of ports attached to host controller
4845 * This is a helper function which can be called from a driver's
4846 * xxx_init_one() probe function if the hardware uses traditional
4847 * IDE taskfile registers.
4849 * This function calls pci_enable_device(), reserves its register
4850 * regions, sets the dma mask, enables bus master mode, and calls
4854 * Inherited from PCI layer (may sleep).
4857 * Zero on success, negative on errno-based value on error.
4860 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4861 unsigned int n_ports)
4863 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4864 struct ata_port_info *port[2];
4866 unsigned int legacy_mode = 0;
4867 int disable_dev_on_err = 1;
4872 port[0] = port_info[0];
4874 port[1] = port_info[1];
4878 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4879 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4880 /* TODO: What if one channel is in native mode ... */
4881 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4882 mask = (1 << 2) | (1 << 0);
4883 if ((tmp8 & mask) != mask)
4884 legacy_mode = (1 << 3);
4888 if ((!legacy_mode) && (n_ports > 2)) {
4889 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4894 /* FIXME: Really for ATA it isn't safe because the device may be
4895 multi-purpose and we want to leave it alone if it was already
4896 enabled. Secondly for shared use as Arjan says we want refcounting
4898 Checking dev->is_enabled is insufficient as this is not set at
4899 boot for the primary video which is BIOS enabled
4902 rc = pci_enable_device(pdev);
4906 rc = pci_request_regions(pdev, DRV_NAME);
4908 disable_dev_on_err = 0;
4912 /* FIXME: Should use platform specific mappers for legacy port ranges */
4914 if (!request_region(0x1f0, 8, "libata")) {
4915 struct resource *conflict, res;
4917 res.end = 0x1f0 + 8 - 1;
4918 conflict = ____request_resource(&ioport_resource, &res);
4919 if (!strcmp(conflict->name, "libata"))
4920 legacy_mode |= (1 << 0);
4922 disable_dev_on_err = 0;
4923 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4926 legacy_mode |= (1 << 0);
4928 if (!request_region(0x170, 8, "libata")) {
4929 struct resource *conflict, res;
4931 res.end = 0x170 + 8 - 1;
4932 conflict = ____request_resource(&ioport_resource, &res);
4933 if (!strcmp(conflict->name, "libata"))
4934 legacy_mode |= (1 << 1);
4936 disable_dev_on_err = 0;
4937 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4940 legacy_mode |= (1 << 1);
4943 /* we have legacy mode, but all ports are unavailable */
4944 if (legacy_mode == (1 << 3)) {
4946 goto err_out_regions;
4949 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4951 goto err_out_regions;
4952 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4954 goto err_out_regions;
4957 if (legacy_mode & (1 << 0))
4958 probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0);
4959 if (legacy_mode & (1 << 1))
4960 probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1);
4963 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4965 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4967 if (!probe_ent && !probe_ent2) {
4969 goto err_out_regions;
4972 pci_set_master(pdev);
4974 /* FIXME: check ata_device_add return */
4976 if (legacy_mode & (1 << 0))
4977 ata_device_add(probe_ent);
4978 if (legacy_mode & (1 << 1))
4979 ata_device_add(probe_ent2);
4981 ata_device_add(probe_ent);
4989 if (legacy_mode & (1 << 0))
4990 release_region(0x1f0, 8);
4991 if (legacy_mode & (1 << 1))
4992 release_region(0x170, 8);
4993 pci_release_regions(pdev);
4995 if (disable_dev_on_err)
4996 pci_disable_device(pdev);
5001 * ata_pci_remove_one - PCI layer callback for device removal
5002 * @pdev: PCI device that was removed
5004 * PCI layer indicates to libata via this hook that
5005 * hot-unplug or module unload event has occurred.
5006 * Handle this by unregistering all objects associated
5007 * with this PCI device. Free those objects. Then finally
5008 * release PCI resources and disable device.
5011 * Inherited from PCI layer (may sleep).
5014 void ata_pci_remove_one (struct pci_dev *pdev)
5016 struct device *dev = pci_dev_to_dev(pdev);
5017 struct ata_host_set *host_set = dev_get_drvdata(dev);
5019 ata_host_set_remove(host_set);
5020 pci_release_regions(pdev);
5021 pci_disable_device(pdev);
5022 dev_set_drvdata(dev, NULL);
5025 /* move to PCI subsystem */
5026 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5028 unsigned long tmp = 0;
5030 switch (bits->width) {
5033 pci_read_config_byte(pdev, bits->reg, &tmp8);
5039 pci_read_config_word(pdev, bits->reg, &tmp16);
5045 pci_read_config_dword(pdev, bits->reg, &tmp32);
5056 return (tmp == bits->val) ? 1 : 0;
5059 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5061 pci_save_state(pdev);
5062 pci_disable_device(pdev);
5063 pci_set_power_state(pdev, PCI_D3hot);
5067 int ata_pci_device_resume(struct pci_dev *pdev)
5069 pci_set_power_state(pdev, PCI_D0);
5070 pci_restore_state(pdev);
5071 pci_enable_device(pdev);
5072 pci_set_master(pdev);
5075 #endif /* CONFIG_PCI */
5078 static int __init ata_init(void)
5080 ata_wq = create_workqueue("ata");
5084 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5088 static void __exit ata_exit(void)
5090 destroy_workqueue(ata_wq);
5093 module_init(ata_init);
5094 module_exit(ata_exit);
5096 static unsigned long ratelimit_time;
5097 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5099 int ata_ratelimit(void)
5102 unsigned long flags;
5104 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5106 if (time_after(jiffies, ratelimit_time)) {
5108 ratelimit_time = jiffies + (HZ/5);
5112 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5118 * libata is essentially a library of internal helper functions for
5119 * low-level ATA host controller drivers. As such, the API/ABI is
5120 * likely to change as new drivers are added and updated.
5121 * Do not depend on ABI/API stability.
5124 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5125 EXPORT_SYMBOL_GPL(ata_std_ports);
5126 EXPORT_SYMBOL_GPL(ata_device_add);
5127 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5128 EXPORT_SYMBOL_GPL(ata_sg_init);
5129 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5130 EXPORT_SYMBOL_GPL(ata_qc_complete);
5131 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5132 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5133 EXPORT_SYMBOL_GPL(ata_tf_load);
5134 EXPORT_SYMBOL_GPL(ata_tf_read);
5135 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5136 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5137 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5138 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5139 EXPORT_SYMBOL_GPL(ata_check_status);
5140 EXPORT_SYMBOL_GPL(ata_altstatus);
5141 EXPORT_SYMBOL_GPL(ata_exec_command);
5142 EXPORT_SYMBOL_GPL(ata_port_start);
5143 EXPORT_SYMBOL_GPL(ata_port_stop);
5144 EXPORT_SYMBOL_GPL(ata_host_stop);
5145 EXPORT_SYMBOL_GPL(ata_interrupt);
5146 EXPORT_SYMBOL_GPL(ata_qc_prep);
5147 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5148 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5149 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5150 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5151 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5152 EXPORT_SYMBOL_GPL(ata_port_probe);
5153 EXPORT_SYMBOL_GPL(sata_phy_reset);
5154 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5155 EXPORT_SYMBOL_GPL(ata_bus_reset);
5156 EXPORT_SYMBOL_GPL(ata_port_disable);
5157 EXPORT_SYMBOL_GPL(ata_ratelimit);
5158 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5159 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5160 EXPORT_SYMBOL_GPL(ata_scsi_error);
5161 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5162 EXPORT_SYMBOL_GPL(ata_scsi_release);
5163 EXPORT_SYMBOL_GPL(ata_host_intr);
5164 EXPORT_SYMBOL_GPL(ata_dev_classify);
5165 EXPORT_SYMBOL_GPL(ata_dev_id_string);
5166 EXPORT_SYMBOL_GPL(ata_dev_config);
5167 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5169 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5170 EXPORT_SYMBOL_GPL(ata_timing_compute);
5171 EXPORT_SYMBOL_GPL(ata_timing_merge);
5174 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5175 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5176 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5177 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5178 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5179 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5180 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5181 #endif /* CONFIG_PCI */
5183 EXPORT_SYMBOL_GPL(ata_device_suspend);
5184 EXPORT_SYMBOL_GPL(ata_device_resume);
5185 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5186 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);