drivers/scsi/arcmsr/arcmsr_hba.c

   1 /*
   2 *******************************************************************************
   3 **        O.S   : Linux
   4 **   FILE NAME  : arcmsr_hba.c
   5 **        BY    : Nick Cheng, C.L. Huang
   6 **   Description: SCSI RAID Device Driver for Areca RAID Controller
   7 *******************************************************************************
   8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
   9 **
  10 **     Web site: www.areca.com.tw
  11 **       E-mail: support@areca.com.tw
  12 **
  13 ** This program is free software; you can redistribute it and/or modify
  14 ** it under the terms of the GNU General Public License version 2 as
  15 ** published by the Free Software Foundation.
  16 ** This program is distributed in the hope that it will be useful,
  17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 ** GNU General Public License for more details.
  20 *******************************************************************************
  21 ** Redistribution and use in source and binary forms, with or without
  22 ** modification, are permitted provided that the following conditions
  23 ** are met:
  24 ** 1. Redistributions of source code must retain the above copyright
  25 **    notice, this list of conditions and the following disclaimer.
  26 ** 2. Redistributions in binary form must reproduce the above copyright
  27 **    notice, this list of conditions and the following disclaimer in the
  28 **    documentation and/or other materials provided with the distribution.
  29 ** 3. The name of the author may not be used to endorse or promote products
  30 **    derived from this software without specific prior written permission.
  31 **
  32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 *******************************************************************************
  43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  44 **     Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
  45 *******************************************************************************
  46 */
  47 #include <linux/module.h>
  48 #include <linux/reboot.h>
  49 #include <linux/spinlock.h>
  50 #include <linux/pci_ids.h>
  51 #include <linux/interrupt.h>
  52 #include <linux/moduleparam.h>
  53 #include <linux/errno.h>
  54 #include <linux/types.h>
  55 #include <linux/delay.h>
  56 #include <linux/dma-mapping.h>
  57 #include <linux/timer.h>
  58 #include <linux/slab.h>
  59 #include <linux/pci.h>
  60 #include <linux/aer.h>
  61 #include <linux/circ_buf.h>
  62 #include <asm/dma.h>
  63 #include <asm/io.h>
  64 #include <linux/uaccess.h>
  65 #include <scsi/scsi_host.h>
  66 #include <scsi/scsi.h>
  67 #include <scsi/scsi_cmnd.h>
  68 #include <scsi/scsi_tcq.h>
  69 #include <scsi/scsi_device.h>
  70 #include <scsi/scsi_transport.h>
  71 #include <scsi/scsicam.h>
  72 #include "arcmsr.h"
  73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
  74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
  75 MODULE_LICENSE("Dual BSD/GPL");
  76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  77
  78 static int msix_enable = 1;
  79 module_param(msix_enable, int, S_IRUGO);
  80 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
  81
  82 static int msi_enable = 1;
  83 module_param(msi_enable, int, S_IRUGO);
  84 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
  85
  86 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
  87 module_param(host_can_queue, int, S_IRUGO);
  88 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
  89
  90 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
  91 module_param(cmd_per_lun, int, S_IRUGO);
  92 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
  93
  94 static int set_date_time = 0;
  95 module_param(set_date_time, int, S_IRUGO);
  96 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
  97
  98 #define ARCMSR_SLEEPTIME        10
  99 #define ARCMSR_RETRYCOUNT       12
 100
 101 static wait_queue_head_t wait_q;
 102 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
 103                                         struct scsi_cmnd *cmd);
 104 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
 105 static int arcmsr_abort(struct scsi_cmnd *);
 106 static int arcmsr_bus_reset(struct scsi_cmnd *);
 107 static int arcmsr_bios_param(struct scsi_device *sdev,
 108                 struct block_device *bdev, sector_t capacity, int *info);
 109 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 110 static int arcmsr_probe(struct pci_dev *pdev,
 111                                 const struct pci_device_id *id);
 112 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
 113 static int arcmsr_resume(struct pci_dev *pdev);
 114 static void arcmsr_remove(struct pci_dev *pdev);
 115 static void arcmsr_shutdown(struct pci_dev *pdev);
 116 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
 117 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
 118 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
 119 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
 120         u32 intmask_org);
 121 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
 122 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
 123 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
 124 static void arcmsr_request_device_map(struct timer_list *t);
 125 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
 126 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
 127 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
 128 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
 129 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
 130 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
 131 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
 132 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
 133 static const char *arcmsr_info(struct Scsi_Host *);
 134 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
 135 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
 136 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
 137 static void arcmsr_set_iop_datetime(struct timer_list *);
 138 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
 139 {
 140         if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
 141                 queue_depth = ARCMSR_MAX_CMD_PERLUN;
 142         return scsi_change_queue_depth(sdev, queue_depth);
 143 }
 144
 145 static struct scsi_host_template arcmsr_scsi_host_template = {
 146         .module                 = THIS_MODULE,
 147         .name                   = "Areca SAS/SATA RAID driver",
 148         .info                   = arcmsr_info,
 149         .queuecommand           = arcmsr_queue_command,
 150         .eh_abort_handler       = arcmsr_abort,
 151         .eh_bus_reset_handler   = arcmsr_bus_reset,
 152         .bios_param             = arcmsr_bios_param,
 153         .change_queue_depth     = arcmsr_adjust_disk_queue_depth,
 154         .can_queue              = ARCMSR_DEFAULT_OUTSTANDING_CMD,
 155         .this_id                = ARCMSR_SCSI_INITIATOR_ID,
 156         .sg_tablesize           = ARCMSR_DEFAULT_SG_ENTRIES,
 157         .max_sectors            = ARCMSR_MAX_XFER_SECTORS_C,
 158         .cmd_per_lun            = ARCMSR_DEFAULT_CMD_PERLUN,
 159         .use_clustering         = ENABLE_CLUSTERING,
 160         .shost_attrs            = arcmsr_host_attrs,
 161         .no_write_same          = 1,
 162 };
 163
 164 static struct pci_device_id arcmsr_device_id_table[] = {
 165         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
 166                 .driver_data = ACB_ADAPTER_TYPE_A},
 167         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
 168                 .driver_data = ACB_ADAPTER_TYPE_A},
 169         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
 170                 .driver_data = ACB_ADAPTER_TYPE_A},
 171         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
 172                 .driver_data = ACB_ADAPTER_TYPE_A},
 173         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
 174                 .driver_data = ACB_ADAPTER_TYPE_A},
 175         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
 176                 .driver_data = ACB_ADAPTER_TYPE_B},
 177         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
 178                 .driver_data = ACB_ADAPTER_TYPE_B},
 179         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
 180                 .driver_data = ACB_ADAPTER_TYPE_B},
 181         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
 182                 .driver_data = ACB_ADAPTER_TYPE_B},
 183         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
 184                 .driver_data = ACB_ADAPTER_TYPE_A},
 185         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
 186                 .driver_data = ACB_ADAPTER_TYPE_D},
 187         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
 188                 .driver_data = ACB_ADAPTER_TYPE_A},
 189         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
 190                 .driver_data = ACB_ADAPTER_TYPE_A},
 191         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
 192                 .driver_data = ACB_ADAPTER_TYPE_A},
 193         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
 194                 .driver_data = ACB_ADAPTER_TYPE_A},
 195         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
 196                 .driver_data = ACB_ADAPTER_TYPE_A},
 197         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
 198                 .driver_data = ACB_ADAPTER_TYPE_A},
 199         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
 200                 .driver_data = ACB_ADAPTER_TYPE_A},
 201         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
 202                 .driver_data = ACB_ADAPTER_TYPE_A},
 203         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
 204                 .driver_data = ACB_ADAPTER_TYPE_A},
 205         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
 206                 .driver_data = ACB_ADAPTER_TYPE_C},
 207         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
 208                 .driver_data = ACB_ADAPTER_TYPE_E},
 209         {0, 0}, /* Terminating entry */
 210 };
 211 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
 212
 213 static struct pci_driver arcmsr_pci_driver = {
 214         .name                   = "arcmsr",
 215         .id_table               = arcmsr_device_id_table,
 216         .probe                  = arcmsr_probe,
 217         .remove                 = arcmsr_remove,
 218         .suspend                = arcmsr_suspend,
 219         .resume                 = arcmsr_resume,
 220         .shutdown               = arcmsr_shutdown,
 221 };
 222 /*
 223 ****************************************************************************
 224 ****************************************************************************
 225 */
 226
 227 static void arcmsr_free_mu(struct AdapterControlBlock *acb)
 228 {
 229         switch (acb->adapter_type) {
 230         case ACB_ADAPTER_TYPE_B:
 231         case ACB_ADAPTER_TYPE_D:
 232         case ACB_ADAPTER_TYPE_E: {
 233                 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize,
 234                         acb->dma_coherent2, acb->dma_coherent_handle2);
 235                 break;
 236         }
 237         }
 238 }
 239
 240 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
 241 {
 242         struct pci_dev *pdev = acb->pdev;
 243         switch (acb->adapter_type){
 244         case ACB_ADAPTER_TYPE_A:{
 245                 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
 246                 if (!acb->pmuA) {
 247                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 248                         return false;
 249                 }
 250                 break;
 251         }
 252         case ACB_ADAPTER_TYPE_B:{
 253                 void __iomem *mem_base0, *mem_base1;
 254                 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 255                 if (!mem_base0) {
 256                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 257                         return false;
 258                 }
 259                 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
 260                 if (!mem_base1) {
 261                         iounmap(mem_base0);
 262                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 263                         return false;
 264                 }
 265                 acb->mem_base0 = mem_base0;
 266                 acb->mem_base1 = mem_base1;
 267                 break;
 268         }
 269         case ACB_ADAPTER_TYPE_C:{
 270                 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
 271                 if (!acb->pmuC) {
 272                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 273                         return false;
 274                 }
 275                 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 276                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
 277                         return true;
 278                 }
 279                 break;
 280         }
 281         case ACB_ADAPTER_TYPE_D: {
 282                 void __iomem *mem_base0;
 283                 unsigned long addr, range, flags;
 284
 285                 addr = (unsigned long)pci_resource_start(pdev, 0);
 286                 range = pci_resource_len(pdev, 0);
 287                 flags = pci_resource_flags(pdev, 0);
 288                 mem_base0 = ioremap(addr, range);
 289                 if (!mem_base0) {
 290                         pr_notice("arcmsr%d: memory mapping region fail\n",
 291                                 acb->host->host_no);
 292                         return false;
 293                 }
 294                 acb->mem_base0 = mem_base0;
 295                 break;
 296                 }
 297         case ACB_ADAPTER_TYPE_E: {
 298                 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
 299                         pci_resource_len(pdev, 1));
 300                 if (!acb->pmuE) {
 301                         pr_notice("arcmsr%d: memory mapping region fail \n",
 302                                 acb->host->host_no);
 303                         return false;
 304                 }
 305                 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
 306                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);       /* synchronize doorbell to 0 */
 307                 acb->in_doorbell = 0;
 308                 acb->out_doorbell = 0;
 309                 break;
 310                 }
 311         }
 312         return true;
 313 }
 314
 315 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
 316 {
 317         switch (acb->adapter_type) {
 318         case ACB_ADAPTER_TYPE_A:{
 319                 iounmap(acb->pmuA);
 320         }
 321         break;
 322         case ACB_ADAPTER_TYPE_B:{
 323                 iounmap(acb->mem_base0);
 324                 iounmap(acb->mem_base1);
 325         }
 326
 327         break;
 328         case ACB_ADAPTER_TYPE_C:{
 329                 iounmap(acb->pmuC);
 330         }
 331         break;
 332         case ACB_ADAPTER_TYPE_D:
 333                 iounmap(acb->mem_base0);
 334                 break;
 335         case ACB_ADAPTER_TYPE_E:
 336                 iounmap(acb->pmuE);
 337                 break;
 338         }
 339 }
 340
 341 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
 342 {
 343         irqreturn_t handle_state;
 344         struct AdapterControlBlock *acb = dev_id;
 345
 346         handle_state = arcmsr_interrupt(acb);
 347         return handle_state;
 348 }
 349
 350 static int arcmsr_bios_param(struct scsi_device *sdev,
 351                 struct block_device *bdev, sector_t capacity, int *geom)
 352 {
 353         int ret, heads, sectors, cylinders, total_capacity;
 354         unsigned char *buffer;/* return copy of block device's partition table */
 355
 356         buffer = scsi_bios_ptable(bdev);
 357         if (buffer) {
 358                 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
 359                 kfree(buffer);
 360                 if (ret != -1)
 361                         return ret;
 362         }
 363         total_capacity = capacity;
 364         heads = 64;
 365         sectors = 32;
 366         cylinders = total_capacity / (heads * sectors);
 367         if (cylinders > 1024) {
 368                 heads = 255;
 369                 sectors = 63;
 370                 cylinders = total_capacity / (heads * sectors);
 371         }
 372         geom[0] = heads;
 373         geom[1] = sectors;
 374         geom[2] = cylinders;
 375         return 0;
 376 }
 377
 378 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
 379 {
 380         struct MessageUnit_A __iomem *reg = acb->pmuA;
 381         int i;
 382
 383         for (i = 0; i < 2000; i++) {
 384                 if (readl(&reg->outbound_intstatus) &
 385                                 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
 386                         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
 387                                 &reg->outbound_intstatus);
 388                         return true;
 389                 }
 390                 msleep(10);
 391         } /* max 20 seconds */
 392
 393         return false;
 394 }
 395
 396 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
 397 {
 398         struct MessageUnit_B *reg = acb->pmuB;
 399         int i;
 400
 401         for (i = 0; i < 2000; i++) {
 402                 if (readl(reg->iop2drv_doorbell)
 403                         & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
 404                         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
 405                                         reg->iop2drv_doorbell);
 406                         writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
 407                                         reg->drv2iop_doorbell);
 408                         return true;
 409                 }
 410                 msleep(10);
 411         } /* max 20 seconds */
 412
 413         return false;
 414 }
 415
 416 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
 417 {
 418         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
 419         int i;
 420
 421         for (i = 0; i < 2000; i++) {
 422                 if (readl(&phbcmu->outbound_doorbell)
 423                                 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 424                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
 425                                 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
 426                         return true;
 427                 }
 428                 msleep(10);
 429         } /* max 20 seconds */
 430
 431         return false;
 432 }
 433
 434 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
 435 {
 436         struct MessageUnit_D *reg = pACB->pmuD;
 437         int i;
 438
 439         for (i = 0; i < 2000; i++) {
 440                 if (readl(reg->outbound_doorbell)
 441                         & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
 442                         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
 443                                 reg->outbound_doorbell);
 444                         return true;
 445                 }
 446                 msleep(10);
 447         } /* max 20 seconds */
 448         return false;
 449 }
 450
 451 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
 452 {
 453         int i;
 454         uint32_t read_doorbell;
 455         struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
 456
 457         for (i = 0; i < 2000; i++) {
 458                 read_doorbell = readl(&phbcmu->iobound_doorbell);
 459                 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
 460                         writel(0, &phbcmu->host_int_status); /*clear interrupt*/
 461                         pACB->in_doorbell = read_doorbell;
 462                         return true;
 463                 }
 464                 msleep(10);
 465         } /* max 20 seconds */
 466         return false;
 467 }
 468
 469 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
 470 {
 471         struct MessageUnit_A __iomem *reg = acb->pmuA;
 472         int retry_count = 30;
 473         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 474         do {
 475                 if (arcmsr_hbaA_wait_msgint_ready(acb))
 476                         break;
 477                 else {
 478                         retry_count--;
 479                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 480                         timeout, retry count down = %d \n", acb->host->host_no, retry_count);
 481                 }
 482         } while (retry_count != 0);
 483 }
 484
 485 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
 486 {
 487         struct MessageUnit_B *reg = acb->pmuB;
 488         int retry_count = 30;
 489         writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
 490         do {
 491                 if (arcmsr_hbaB_wait_msgint_ready(acb))
 492                         break;
 493                 else {
 494                         retry_count--;
 495                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 496                         timeout,retry count down = %d \n", acb->host->host_no, retry_count);
 497                 }
 498         } while (retry_count != 0);
 499 }
 500
 501 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
 502 {
 503         struct MessageUnit_C __iomem *reg = pACB->pmuC;
 504         int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
 505         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 506         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
 507         do {
 508                 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
 509                         break;
 510                 } else {
 511                         retry_count--;
 512                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 513                         timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
 514                 }
 515         } while (retry_count != 0);
 516         return;
 517 }
 518
 519 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
 520 {
 521         int retry_count = 15;
 522         struct MessageUnit_D *reg = pACB->pmuD;
 523
 524         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
 525         do {
 526                 if (arcmsr_hbaD_wait_msgint_ready(pACB))
 527                         break;
 528
 529                 retry_count--;
 530                 pr_notice("arcmsr%d: wait 'flush adapter "
 531                         "cache' timeout, retry count down = %d\n",
 532                         pACB->host->host_no, retry_count);
 533         } while (retry_count != 0);
 534 }
 535
 536 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
 537 {
 538         int retry_count = 30;
 539         struct MessageUnit_E __iomem *reg = pACB->pmuE;
 540
 541         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 542         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
 543         writel(pACB->out_doorbell, &reg->iobound_doorbell);
 544         do {
 545                 if (arcmsr_hbaE_wait_msgint_ready(pACB))
 546                         break;
 547                 retry_count--;
 548                 pr_notice("arcmsr%d: wait 'flush adapter "
 549                         "cache' timeout, retry count down = %d\n",
 550                         pACB->host->host_no, retry_count);
 551         } while (retry_count != 0);
 552 }
 553
 554 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
 555 {
 556         switch (acb->adapter_type) {
 557
 558         case ACB_ADAPTER_TYPE_A: {
 559                 arcmsr_hbaA_flush_cache(acb);
 560                 }
 561                 break;
 562
 563         case ACB_ADAPTER_TYPE_B: {
 564                 arcmsr_hbaB_flush_cache(acb);
 565                 }
 566                 break;
 567         case ACB_ADAPTER_TYPE_C: {
 568                 arcmsr_hbaC_flush_cache(acb);
 569                 }
 570                 break;
 571         case ACB_ADAPTER_TYPE_D:
 572                 arcmsr_hbaD_flush_cache(acb);
 573                 break;
 574         case ACB_ADAPTER_TYPE_E:
 575                 arcmsr_hbaE_flush_cache(acb);
 576                 break;
 577         }
 578 }
 579
 580 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
 581 {
 582         bool rtn = true;
 583         void *dma_coherent;
 584         dma_addr_t dma_coherent_handle;
 585         struct pci_dev *pdev = acb->pdev;
 586
 587         switch (acb->adapter_type) {
 588         case ACB_ADAPTER_TYPE_B: {
 589                 struct MessageUnit_B *reg;
 590                 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32);
 591                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
 592                         &dma_coherent_handle, GFP_KERNEL);
 593                 if (!dma_coherent) {
 594                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 595                         return false;
 596                 }
 597                 acb->dma_coherent_handle2 = dma_coherent_handle;
 598                 acb->dma_coherent2 = dma_coherent;
 599                 reg = (struct MessageUnit_B *)dma_coherent;
 600                 acb->pmuB = reg;
 601                 if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
 602                         reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
 603                         reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
 604                         reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
 605                         reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
 606                 } else {
 607                         reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
 608                         reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
 609                         reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
 610                         reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
 611                 }
 612                 reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
 613                 reg->message_rbuffer = MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
 614                 reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
 615                 }
 616                 break;
 617         case ACB_ADAPTER_TYPE_D: {
 618                 struct MessageUnit_D *reg;
 619
 620                 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32);
 621                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
 622                         &dma_coherent_handle, GFP_KERNEL);
 623                 if (!dma_coherent) {
 624                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 625                         return false;
 626                 }
 627                 acb->dma_coherent_handle2 = dma_coherent_handle;
 628                 acb->dma_coherent2 = dma_coherent;
 629                 reg = (struct MessageUnit_D *)dma_coherent;
 630                 acb->pmuD = reg;
 631                 reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
 632                 reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
 633                 reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
 634                 reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
 635                 reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
 636                 reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
 637                 reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
 638                 reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
 639                 reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
 640                 reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
 641                 reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
 642                 reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
 643                 reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
 644                 reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
 645                 reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
 646                 reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
 647                 reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
 648                 reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
 649                 reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
 650                 reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
 651                 reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
 652                 reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
 653                 reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
 654                 reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
 655                 reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
 656                 reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
 657                 }
 658                 break;
 659         case ACB_ADAPTER_TYPE_E: {
 660                 uint32_t completeQ_size;
 661                 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
 662                 acb->roundup_ccbsize = roundup(completeQ_size, 32);
 663                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
 664                         &dma_coherent_handle, GFP_KERNEL);
 665                 if (!dma_coherent){
 666                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 667                         return false;
 668                 }
 669                 acb->dma_coherent_handle2 = dma_coherent_handle;
 670                 acb->dma_coherent2 = dma_coherent;
 671                 acb->pCompletionQ = dma_coherent;
 672                 acb->completionQ_entry = acb->roundup_ccbsize / sizeof(struct deliver_completeQ);
 673                 acb->doneq_index = 0;
 674                 }
 675                 break;
 676         default:
 677                 break;
 678         }
 679         return rtn;
 680 }
 681
 682 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
 683 {
 684         struct pci_dev *pdev = acb->pdev;
 685         void *dma_coherent;
 686         dma_addr_t dma_coherent_handle;
 687         struct CommandControlBlock *ccb_tmp;
 688         int i = 0, j = 0;
 689         dma_addr_t cdb_phyaddr;
 690         unsigned long roundup_ccbsize;
 691         unsigned long max_xfer_len;
 692         unsigned long max_sg_entrys;
 693         uint32_t  firm_config_version;
 694
 695         for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
 696                 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
 697                         acb->devstate[i][j] = ARECA_RAID_GONE;
 698
 699         max_xfer_len = ARCMSR_MAX_XFER_LEN;
 700         max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
 701         firm_config_version = acb->firm_cfg_version;
 702         if((firm_config_version & 0xFF) >= 3){
 703                 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
 704                 max_sg_entrys = (max_xfer_len/4096);
 705         }
 706         acb->host->max_sectors = max_xfer_len/512;
 707         acb->host->sg_tablesize = max_sg_entrys;
 708         roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
 709         acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
 710         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
 711         if(!dma_coherent){
 712                 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
 713                 return -ENOMEM;
 714         }
 715         acb->dma_coherent = dma_coherent;
 716         acb->dma_coherent_handle = dma_coherent_handle;
 717         memset(dma_coherent, 0, acb->uncache_size);
 718         acb->ccbsize = roundup_ccbsize;
 719         ccb_tmp = dma_coherent;
 720         acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
 721         for(i = 0; i < acb->maxFreeCCB; i++){
 722                 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
 723                 switch (acb->adapter_type) {
 724                 case ACB_ADAPTER_TYPE_A:
 725                 case ACB_ADAPTER_TYPE_B:
 726                         ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
 727                         break;
 728                 case ACB_ADAPTER_TYPE_C:
 729                 case ACB_ADAPTER_TYPE_D:
 730                 case ACB_ADAPTER_TYPE_E:
 731                         ccb_tmp->cdb_phyaddr = cdb_phyaddr;
 732                         break;
 733                 }
 734                 acb->pccb_pool[i] = ccb_tmp;
 735                 ccb_tmp->acb = acb;
 736                 ccb_tmp->smid = (u32)i << 16;
 737                 INIT_LIST_HEAD(&ccb_tmp->list);
 738                 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
 739                 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
 740                 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
 741         }
 742         return 0;
 743 }
 744
 745 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
 746 {
 747         struct AdapterControlBlock *acb = container_of(work,
 748                 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
 749         char *acb_dev_map = (char *)acb->device_map;
 750         uint32_t __iomem *signature = NULL;
 751         char __iomem *devicemap = NULL;
 752         int target, lun;
 753         struct scsi_device *psdev;
 754         char diff, temp;
 755
 756         acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
 757         switch (acb->adapter_type) {
 758         case ACB_ADAPTER_TYPE_A: {
 759                 struct MessageUnit_A __iomem *reg  = acb->pmuA;
 760
 761                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 762                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 763                 break;
 764         }
 765         case ACB_ADAPTER_TYPE_B: {
 766                 struct MessageUnit_B *reg  = acb->pmuB;
 767
 768                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 769                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 770                 break;
 771         }
 772         case ACB_ADAPTER_TYPE_C: {
 773                 struct MessageUnit_C __iomem *reg  = acb->pmuC;
 774
 775                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 776                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 777                 break;
 778         }
 779         case ACB_ADAPTER_TYPE_D: {
 780                 struct MessageUnit_D *reg  = acb->pmuD;
 781
 782                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 783                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 784                 break;
 785         }
 786         case ACB_ADAPTER_TYPE_E: {
 787                 struct MessageUnit_E __iomem *reg  = acb->pmuE;
 788
 789                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 790                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 791                 break;
 792                 }
 793         }
 794         atomic_inc(&acb->rq_map_token);
 795         if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
 796                 return;
 797         for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
 798                 target++) {
 799                 temp = readb(devicemap);
 800                 diff = (*acb_dev_map) ^ temp;
 801                 if (diff != 0) {
 802                         *acb_dev_map = temp;
 803                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
 804                                 lun++) {
 805                                 if ((diff & 0x01) == 1 &&
 806                                         (temp & 0x01) == 1) {
 807                                         scsi_add_device(acb->host,
 808                                                 0, target, lun);
 809                                 } else if ((diff & 0x01) == 1
 810                                         && (temp & 0x01) == 0) {
 811                                         psdev = scsi_device_lookup(acb->host,
 812                                                 0, target, lun);
 813                                         if (psdev != NULL) {
 814                                                 scsi_remove_device(psdev);
 815                                                 scsi_device_put(psdev);
 816                                         }
 817                                 }
 818                                 temp >>= 1;
 819                                 diff >>= 1;
 820                         }
 821                 }
 822                 devicemap++;
 823                 acb_dev_map++;
 824         }
 825 }
 826
 827 static int
 828 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
 829 {
 830         unsigned long flags;
 831         int nvec, i;
 832
 833         if (msix_enable == 0)
 834                 goto msi_int0;
 835         nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
 836                         PCI_IRQ_MSIX);
 837         if (nvec > 0) {
 838                 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
 839                 flags = 0;
 840         } else {
 841 msi_int0:
 842                 if (msi_enable == 1) {
 843                         nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
 844                         if (nvec == 1) {
 845                                 dev_info(&pdev->dev, "msi enabled\n");
 846                                 goto msi_int1;
 847                         }
 848                 }
 849                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
 850                 if (nvec < 1)
 851                         return FAILED;
 852 msi_int1:
 853                 flags = IRQF_SHARED;
 854         }
 855
 856         acb->vector_count = nvec;
 857         for (i = 0; i < nvec; i++) {
 858                 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
 859                                 flags, "arcmsr", acb)) {
 860                         pr_warn("arcmsr%d: request_irq =%d failed!\n",
 861                                 acb->host->host_no, pci_irq_vector(pdev, i));
 862                         goto out_free_irq;
 863                 }
 864         }
 865
 866         return SUCCESS;
 867 out_free_irq:
 868         while (--i >= 0)
 869                 free_irq(pci_irq_vector(pdev, i), acb);
 870         pci_free_irq_vectors(pdev);
 871         return FAILED;
 872 }
 873
 874 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
 875 {
 876         INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
 877         atomic_set(&pacb->rq_map_token, 16);
 878         atomic_set(&pacb->ante_token_value, 16);
 879         pacb->fw_flag = FW_NORMAL;
 880         timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
 881         pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
 882         add_timer(&pacb->eternal_timer);
 883 }
 884
 885 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
 886 {
 887         timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
 888         pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
 889         add_timer(&pacb->refresh_timer);
 890 }
 891
 892 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 893 {
 894         struct Scsi_Host *host;
 895         struct AdapterControlBlock *acb;
 896         uint8_t bus,dev_fun;
 897         int error;
 898         error = pci_enable_device(pdev);
 899         if(error){
 900                 return -ENODEV;
 901         }
 902         host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
 903         if(!host){
 904                 goto pci_disable_dev;
 905         }
 906         error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
 907         if(error){
 908                 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 909                 if(error){
 910                         printk(KERN_WARNING
 911                                "scsi%d: No suitable DMA mask available\n",
 912                                host->host_no);
 913                         goto scsi_host_release;
 914                 }
 915         }
 916         init_waitqueue_head(&wait_q);
 917         bus = pdev->bus->number;
 918         dev_fun = pdev->devfn;
 919         acb = (struct AdapterControlBlock *) host->hostdata;
 920         memset(acb,0,sizeof(struct AdapterControlBlock));
 921         acb->pdev = pdev;
 922         acb->host = host;
 923         host->max_lun = ARCMSR_MAX_TARGETLUN;
 924         host->max_id = ARCMSR_MAX_TARGETID;             /*16:8*/
 925         host->max_cmd_len = 16;                         /*this is issue of 64bit LBA ,over 2T byte*/
 926         if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
 927                 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
 928         host->can_queue = host_can_queue;       /* max simultaneous cmds */
 929         if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
 930                 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
 931         host->cmd_per_lun = cmd_per_lun;
 932         host->this_id = ARCMSR_SCSI_INITIATOR_ID;
 933         host->unique_id = (bus << 8) | dev_fun;
 934         pci_set_drvdata(pdev, host);
 935         pci_set_master(pdev);
 936         error = pci_request_regions(pdev, "arcmsr");
 937         if(error){
 938                 goto scsi_host_release;
 939         }
 940         spin_lock_init(&acb->eh_lock);
 941         spin_lock_init(&acb->ccblist_lock);
 942         spin_lock_init(&acb->postq_lock);
 943         spin_lock_init(&acb->doneq_lock);
 944         spin_lock_init(&acb->rqbuffer_lock);
 945         spin_lock_init(&acb->wqbuffer_lock);
 946         acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
 947                         ACB_F_MESSAGE_RQBUFFER_CLEARED |
 948                         ACB_F_MESSAGE_WQBUFFER_READED);
 949         acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
 950         INIT_LIST_HEAD(&acb->ccb_free_list);
 951         acb->adapter_type = id->driver_data;
 952         error = arcmsr_remap_pciregion(acb);
 953         if(!error){
 954                 goto pci_release_regs;
 955         }
 956         error = arcmsr_alloc_io_queue(acb);
 957         if (!error)
 958                 goto unmap_pci_region;
 959         error = arcmsr_get_firmware_spec(acb);
 960         if(!error){
 961                 goto free_hbb_mu;
 962         }
 963         error = arcmsr_alloc_ccb_pool(acb);
 964         if(error){
 965                 goto free_hbb_mu;
 966         }
 967         error = scsi_add_host(host, &pdev->dev);
 968         if(error){
 969                 goto free_ccb_pool;
 970         }
 971         if (arcmsr_request_irq(pdev, acb) == FAILED)
 972                 goto scsi_host_remove;
 973         arcmsr_iop_init(acb);
 974         arcmsr_init_get_devmap_timer(acb);
 975         if (set_date_time)
 976                 arcmsr_init_set_datetime_timer(acb);
 977         if(arcmsr_alloc_sysfs_attr(acb))
 978                 goto out_free_sysfs;
 979         scsi_scan_host(host);
 980         return 0;
 981 out_free_sysfs:
 982         if (set_date_time)
 983                 del_timer_sync(&acb->refresh_timer);
 984         del_timer_sync(&acb->eternal_timer);
 985         flush_work(&acb->arcmsr_do_message_isr_bh);
 986         arcmsr_stop_adapter_bgrb(acb);
 987         arcmsr_flush_adapter_cache(acb);
 988         arcmsr_free_irq(pdev, acb);
 989 scsi_host_remove:
 990         scsi_remove_host(host);
 991 free_ccb_pool:
 992         arcmsr_free_ccb_pool(acb);
 993 free_hbb_mu:
 994         arcmsr_free_mu(acb);
 995 unmap_pci_region:
 996         arcmsr_unmap_pciregion(acb);
 997 pci_release_regs:
 998         pci_release_regions(pdev);
 999 scsi_host_release:
1000         scsi_host_put(host);
1001 pci_disable_dev:
1002         pci_disable_device(pdev);
1003         return -ENODEV;
1004 }
1005
1006 static void arcmsr_free_irq(struct pci_dev *pdev,
1007                 struct AdapterControlBlock *acb)
1008 {
1009         int i;
1010
1011         for (i = 0; i < acb->vector_count; i++)
1012                 free_irq(pci_irq_vector(pdev, i), acb);
1013         pci_free_irq_vectors(pdev);
1014 }
1015
1016 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
1017 {
1018         uint32_t intmask_org;
1019         struct Scsi_Host *host = pci_get_drvdata(pdev);
1020         struct AdapterControlBlock *acb =
1021                 (struct AdapterControlBlock *)host->hostdata;
1022
1023         intmask_org = arcmsr_disable_outbound_ints(acb);
1024         arcmsr_free_irq(pdev, acb);
1025         del_timer_sync(&acb->eternal_timer);
1026         if (set_date_time)
1027                 del_timer_sync(&acb->refresh_timer);
1028         flush_work(&acb->arcmsr_do_message_isr_bh);
1029         arcmsr_stop_adapter_bgrb(acb);
1030         arcmsr_flush_adapter_cache(acb);
1031         pci_set_drvdata(pdev, host);
1032         pci_save_state(pdev);
1033         pci_disable_device(pdev);
1034         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1035         return 0;
1036 }
1037
1038 static int arcmsr_resume(struct pci_dev *pdev)
1039 {
1040         int error;
1041         struct Scsi_Host *host = pci_get_drvdata(pdev);
1042         struct AdapterControlBlock *acb =
1043                 (struct AdapterControlBlock *)host->hostdata;
1044
1045         pci_set_power_state(pdev, PCI_D0);
1046         pci_enable_wake(pdev, PCI_D0, 0);
1047         pci_restore_state(pdev);
1048         if (pci_enable_device(pdev)) {
1049                 pr_warn("%s: pci_enable_device error\n", __func__);
1050                 return -ENODEV;
1051         }
1052         error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1053         if (error) {
1054                 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1055                 if (error) {
1056                         pr_warn("scsi%d: No suitable DMA mask available\n",
1057                                host->host_no);
1058                         goto controller_unregister;
1059                 }
1060         }
1061         pci_set_master(pdev);
1062         if (arcmsr_request_irq(pdev, acb) == FAILED)
1063                 goto controller_stop;
1064         arcmsr_iop_init(acb);
1065         arcmsr_init_get_devmap_timer(acb);
1066         if (set_date_time)
1067                 arcmsr_init_set_datetime_timer(acb);
1068         return 0;
1069 controller_stop:
1070         arcmsr_stop_adapter_bgrb(acb);
1071         arcmsr_flush_adapter_cache(acb);
1072 controller_unregister:
1073         scsi_remove_host(host);
1074         arcmsr_free_ccb_pool(acb);
1075         arcmsr_unmap_pciregion(acb);
1076         pci_release_regions(pdev);
1077         scsi_host_put(host);
1078         pci_disable_device(pdev);
1079         return -ENODEV;
1080 }
1081
1082 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1083 {
1084         struct MessageUnit_A __iomem *reg = acb->pmuA;
1085         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1086         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1087                 printk(KERN_NOTICE
1088                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1089                         , acb->host->host_no);
1090                 return false;
1091         }
1092         return true;
1093 }
1094
1095 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1096 {
1097         struct MessageUnit_B *reg = acb->pmuB;
1098
1099         writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1100         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1101                 printk(KERN_NOTICE
1102                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1103                         , acb->host->host_no);
1104                 return false;
1105         }
1106         return true;
1107 }
1108 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1109 {
1110         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1111         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1112         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1113         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1114                 printk(KERN_NOTICE
1115                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1116                         , pACB->host->host_no);
1117                 return false;
1118         }
1119         return true;
1120 }
1121
1122 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1123 {
1124         struct MessageUnit_D *reg = pACB->pmuD;
1125
1126         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1127         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1128                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1129                         "command' timeout\n", pACB->host->host_no);
1130                 return false;
1131         }
1132         return true;
1133 }
1134
1135 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1136 {
1137         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1138
1139         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1140         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1141         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1142         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1143                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1144                         "command' timeout\n", pACB->host->host_no);
1145                 return false;
1146         }
1147         return true;
1148 }
1149
1150 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1151 {
1152         uint8_t rtnval = 0;
1153         switch (acb->adapter_type) {
1154         case ACB_ADAPTER_TYPE_A: {
1155                 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1156                 }
1157                 break;
1158
1159         case ACB_ADAPTER_TYPE_B: {
1160                 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1161                 }
1162                 break;
1163
1164         case ACB_ADAPTER_TYPE_C: {
1165                 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1166                 }
1167                 break;
1168
1169         case ACB_ADAPTER_TYPE_D:
1170                 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1171                 break;
1172         case ACB_ADAPTER_TYPE_E:
1173                 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1174                 break;
1175         }
1176         return rtnval;
1177 }
1178
1179 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
1180 {
1181         struct scsi_cmnd *pcmd = ccb->pcmd;
1182
1183         scsi_dma_unmap(pcmd);
1184 }
1185
1186 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1187 {
1188         struct AdapterControlBlock *acb = ccb->acb;
1189         struct scsi_cmnd *pcmd = ccb->pcmd;
1190         unsigned long flags;
1191         atomic_dec(&acb->ccboutstandingcount);
1192         arcmsr_pci_unmap_dma(ccb);
1193         ccb->startdone = ARCMSR_CCB_DONE;
1194         spin_lock_irqsave(&acb->ccblist_lock, flags);
1195         list_add_tail(&ccb->list, &acb->ccb_free_list);
1196         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1197         pcmd->scsi_done(pcmd);
1198 }
1199
1200 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1201 {
1202
1203         struct scsi_cmnd *pcmd = ccb->pcmd;
1204         struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1205         pcmd->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
1206         if (sensebuffer) {
1207                 int sense_data_length =
1208                         sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
1209                         ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
1210                 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
1211                 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
1212                 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1213                 sensebuffer->Valid = 1;
1214                 pcmd->result |= (DRIVER_SENSE << 24);
1215         }
1216 }
1217
1218 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1219 {
1220         u32 orig_mask = 0;
1221         switch (acb->adapter_type) {
1222         case ACB_ADAPTER_TYPE_A : {
1223                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1224                 orig_mask = readl(&reg->outbound_intmask);
1225                 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1226                                                 &reg->outbound_intmask);
1227                 }
1228                 break;
1229         case ACB_ADAPTER_TYPE_B : {
1230                 struct MessageUnit_B *reg = acb->pmuB;
1231                 orig_mask = readl(reg->iop2drv_doorbell_mask);
1232                 writel(0, reg->iop2drv_doorbell_mask);
1233                 }
1234                 break;
1235         case ACB_ADAPTER_TYPE_C:{
1236                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1237                 /* disable all outbound interrupt */
1238                 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1239                 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1240                 }
1241                 break;
1242         case ACB_ADAPTER_TYPE_D: {
1243                 struct MessageUnit_D *reg = acb->pmuD;
1244                 /* disable all outbound interrupt */
1245                 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1246                 }
1247                 break;
1248         case ACB_ADAPTER_TYPE_E: {
1249                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1250                 orig_mask = readl(&reg->host_int_mask);
1251                 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
1252                 readl(&reg->host_int_mask); /* Dummy readl to force pci flush */
1253                 }
1254                 break;
1255         }
1256         return orig_mask;
1257 }
1258
1259 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1260                         struct CommandControlBlock *ccb, bool error)
1261 {
1262         uint8_t id, lun;
1263         id = ccb->pcmd->device->id;
1264         lun = ccb->pcmd->device->lun;
1265         if (!error) {
1266                 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1267                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1268                 ccb->pcmd->result = DID_OK << 16;
1269                 arcmsr_ccb_complete(ccb);
1270         }else{
1271                 switch (ccb->arcmsr_cdb.DeviceStatus) {
1272                 case ARCMSR_DEV_SELECT_TIMEOUT: {
1273                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1274                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1275                         arcmsr_ccb_complete(ccb);
1276                         }
1277                         break;
1278
1279                 case ARCMSR_DEV_ABORTED:
1280
1281                 case ARCMSR_DEV_INIT_FAIL: {
1282                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1283                         ccb->pcmd->result = DID_BAD_TARGET << 16;
1284                         arcmsr_ccb_complete(ccb);
1285                         }
1286                         break;
1287
1288                 case ARCMSR_DEV_CHECK_CONDITION: {
1289                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1290                         arcmsr_report_sense_info(ccb);
1291                         arcmsr_ccb_complete(ccb);
1292                         }
1293                         break;
1294
1295                 default:
1296                         printk(KERN_NOTICE
1297                                 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1298                                 but got unknown DeviceStatus = 0x%x \n"
1299                                 , acb->host->host_no
1300                                 , id
1301                                 , lun
1302                                 , ccb->arcmsr_cdb.DeviceStatus);
1303                                 acb->devstate[id][lun] = ARECA_RAID_GONE;
1304                                 ccb->pcmd->result = DID_NO_CONNECT << 16;
1305                                 arcmsr_ccb_complete(ccb);
1306                         break;
1307                 }
1308         }
1309 }
1310
1311 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1312 {
1313         int id, lun;
1314         if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1315                 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1316                         struct scsi_cmnd *abortcmd = pCCB->pcmd;
1317                         if (abortcmd) {
1318                                 id = abortcmd->device->id;
1319                                 lun = abortcmd->device->lun;
1320                                 abortcmd->result |= DID_ABORT << 16;
1321                                 arcmsr_ccb_complete(pCCB);
1322                                 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1323                                 acb->host->host_no, pCCB);
1324                         }
1325                         return;
1326                 }
1327                 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1328                                 done acb = '0x%p'"
1329                                 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1330                                 " ccboutstandingcount = %d \n"
1331                                 , acb->host->host_no
1332                                 , acb
1333                                 , pCCB
1334                                 , pCCB->acb
1335                                 , pCCB->startdone
1336                                 , atomic_read(&acb->ccboutstandingcount));
1337                   return;
1338         }
1339         arcmsr_report_ccb_state(acb, pCCB, error);
1340 }
1341
1342 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1343 {
1344         int i = 0;
1345         uint32_t flag_ccb, ccb_cdb_phy;
1346         struct ARCMSR_CDB *pARCMSR_CDB;
1347         bool error;
1348         struct CommandControlBlock *pCCB;
1349         switch (acb->adapter_type) {
1350
1351         case ACB_ADAPTER_TYPE_A: {
1352                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1353                 uint32_t outbound_intstatus;
1354                 outbound_intstatus = readl(&reg->outbound_intstatus) &
1355                                         acb->outbound_int_enable;
1356                 /*clear and abort all outbound posted Q*/
1357                 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1358                 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
1359                                 && (i++ < acb->maxOutstanding)) {
1360                         pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1361                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1362                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1363                         arcmsr_drain_donequeue(acb, pCCB, error);
1364                 }
1365                 }
1366                 break;
1367
1368         case ACB_ADAPTER_TYPE_B: {
1369                 struct MessageUnit_B *reg = acb->pmuB;
1370                 /*clear all outbound posted Q*/
1371                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1372                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1373                         flag_ccb = reg->done_qbuffer[i];
1374                         if (flag_ccb != 0) {
1375                                 reg->done_qbuffer[i] = 0;
1376                                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1377                                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1378                                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1379                                 arcmsr_drain_donequeue(acb, pCCB, error);
1380                         }
1381                         reg->post_qbuffer[i] = 0;
1382                 }
1383                 reg->doneq_index = 0;
1384                 reg->postq_index = 0;
1385                 }
1386                 break;
1387         case ACB_ADAPTER_TYPE_C: {
1388                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1389                 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1390                         /*need to do*/
1391                         flag_ccb = readl(&reg->outbound_queueport_low);
1392                         ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1393                         pARCMSR_CDB = (struct  ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
1394                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1395                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1396                         arcmsr_drain_donequeue(acb, pCCB, error);
1397                 }
1398                 }
1399                 break;
1400         case ACB_ADAPTER_TYPE_D: {
1401                 struct MessageUnit_D  *pmu = acb->pmuD;
1402                 uint32_t outbound_write_pointer;
1403                 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1404                 unsigned long flags;
1405
1406                 residual = atomic_read(&acb->ccboutstandingcount);
1407                 for (i = 0; i < residual; i++) {
1408                         spin_lock_irqsave(&acb->doneq_lock, flags);
1409                         outbound_write_pointer =
1410                                 pmu->done_qbuffer[0].addressLow + 1;
1411                         doneq_index = pmu->doneq_index;
1412                         if ((doneq_index & 0xFFF) !=
1413                                 (outbound_write_pointer & 0xFFF)) {
1414                                 toggle = doneq_index & 0x4000;
1415                                 index_stripped = (doneq_index & 0xFFF) + 1;
1416                                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1417                                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1418                                         ((toggle ^ 0x4000) + 1);
1419                                 doneq_index = pmu->doneq_index;
1420                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1421                                 addressLow = pmu->done_qbuffer[doneq_index &
1422                                         0xFFF].addressLow;
1423                                 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1424                                 pARCMSR_CDB = (struct  ARCMSR_CDB *)
1425                                         (acb->vir2phy_offset + ccb_cdb_phy);
1426                                 pCCB = container_of(pARCMSR_CDB,
1427                                         struct CommandControlBlock, arcmsr_cdb);
1428                                 error = (addressLow &
1429                                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1430                                         true : false;
1431                                 arcmsr_drain_donequeue(acb, pCCB, error);
1432                                 writel(doneq_index,
1433                                         pmu->outboundlist_read_pointer);
1434                         } else {
1435                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1436                                 mdelay(10);
1437                         }
1438                 }
1439                 pmu->postq_index = 0;
1440                 pmu->doneq_index = 0x40FF;
1441                 }
1442                 break;
1443         case ACB_ADAPTER_TYPE_E:
1444                 arcmsr_hbaE_postqueue_isr(acb);
1445                 break;
1446         }
1447 }
1448
1449 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1450 {
1451         char *acb_dev_map = (char *)acb->device_map;
1452         int target, lun, i;
1453         struct scsi_device *psdev;
1454         struct CommandControlBlock *ccb;
1455         char temp;
1456
1457         for (i = 0; i < acb->maxFreeCCB; i++) {
1458                 ccb = acb->pccb_pool[i];
1459                 if (ccb->startdone == ARCMSR_CCB_START) {
1460                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1461                         arcmsr_pci_unmap_dma(ccb);
1462                         ccb->pcmd->scsi_done(ccb->pcmd);
1463                 }
1464         }
1465         for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1466                 temp = *acb_dev_map;
1467                 if (temp) {
1468                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1469                                 if (temp & 1) {
1470                                         psdev = scsi_device_lookup(acb->host,
1471                                                 0, target, lun);
1472                                         if (psdev != NULL) {
1473                                                 scsi_remove_device(psdev);
1474                                                 scsi_device_put(psdev);
1475                                         }
1476                                 }
1477                                 temp >>= 1;
1478                         }
1479                         *acb_dev_map = 0;
1480                 }
1481                 acb_dev_map++;
1482         }
1483 }
1484
1485 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1486 {
1487         struct pci_dev *pdev;
1488         struct Scsi_Host *host;
1489
1490         host = acb->host;
1491         arcmsr_free_sysfs_attr(acb);
1492         scsi_remove_host(host);
1493         flush_work(&acb->arcmsr_do_message_isr_bh);
1494         del_timer_sync(&acb->eternal_timer);
1495         if (set_date_time)
1496                 del_timer_sync(&acb->refresh_timer);
1497         pdev = acb->pdev;
1498         arcmsr_free_irq(pdev, acb);
1499         arcmsr_free_ccb_pool(acb);
1500         arcmsr_free_mu(acb);
1501         arcmsr_unmap_pciregion(acb);
1502         pci_release_regions(pdev);
1503         scsi_host_put(host);
1504         pci_disable_device(pdev);
1505 }
1506
1507 static void arcmsr_remove(struct pci_dev *pdev)
1508 {
1509         struct Scsi_Host *host = pci_get_drvdata(pdev);
1510         struct AdapterControlBlock *acb =
1511                 (struct AdapterControlBlock *) host->hostdata;
1512         int poll_count = 0;
1513         uint16_t dev_id;
1514
1515         pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1516         if (dev_id == 0xffff) {
1517                 acb->acb_flags &= ~ACB_F_IOP_INITED;
1518                 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1519                 arcmsr_remove_scsi_devices(acb);
1520                 arcmsr_free_pcidev(acb);
1521                 return;
1522         }
1523         arcmsr_free_sysfs_attr(acb);
1524         scsi_remove_host(host);
1525         flush_work(&acb->arcmsr_do_message_isr_bh);
1526         del_timer_sync(&acb->eternal_timer);
1527         if (set_date_time)
1528                 del_timer_sync(&acb->refresh_timer);
1529         arcmsr_disable_outbound_ints(acb);
1530         arcmsr_stop_adapter_bgrb(acb);
1531         arcmsr_flush_adapter_cache(acb);
1532         acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1533         acb->acb_flags &= ~ACB_F_IOP_INITED;
1534
1535         for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1536                 if (!atomic_read(&acb->ccboutstandingcount))
1537                         break;
1538                 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1539                 msleep(25);
1540         }
1541
1542         if (atomic_read(&acb->ccboutstandingcount)) {
1543                 int i;
1544
1545                 arcmsr_abort_allcmd(acb);
1546                 arcmsr_done4abort_postqueue(acb);
1547                 for (i = 0; i < acb->maxFreeCCB; i++) {
1548                         struct CommandControlBlock *ccb = acb->pccb_pool[i];
1549                         if (ccb->startdone == ARCMSR_CCB_START) {
1550                                 ccb->startdone = ARCMSR_CCB_ABORTED;
1551                                 ccb->pcmd->result = DID_ABORT << 16;
1552                                 arcmsr_ccb_complete(ccb);
1553                         }
1554                 }
1555         }
1556         arcmsr_free_irq(pdev, acb);
1557         arcmsr_free_ccb_pool(acb);
1558         arcmsr_free_mu(acb);
1559         arcmsr_unmap_pciregion(acb);
1560         pci_release_regions(pdev);
1561         scsi_host_put(host);
1562         pci_disable_device(pdev);
1563 }
1564
1565 static void arcmsr_shutdown(struct pci_dev *pdev)
1566 {
1567         struct Scsi_Host *host = pci_get_drvdata(pdev);
1568         struct AdapterControlBlock *acb =
1569                 (struct AdapterControlBlock *)host->hostdata;
1570         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1571                 return;
1572         del_timer_sync(&acb->eternal_timer);
1573         if (set_date_time)
1574                 del_timer_sync(&acb->refresh_timer);
1575         arcmsr_disable_outbound_ints(acb);
1576         arcmsr_free_irq(pdev, acb);
1577         flush_work(&acb->arcmsr_do_message_isr_bh);
1578         arcmsr_stop_adapter_bgrb(acb);
1579         arcmsr_flush_adapter_cache(acb);
1580 }
1581
1582 static int arcmsr_module_init(void)
1583 {
1584         int error = 0;
1585         error = pci_register_driver(&arcmsr_pci_driver);
1586         return error;
1587 }
1588
1589 static void arcmsr_module_exit(void)
1590 {
1591         pci_unregister_driver(&arcmsr_pci_driver);
1592 }
1593 module_init(arcmsr_module_init);
1594 module_exit(arcmsr_module_exit);
1595
1596 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1597                                                 u32 intmask_org)
1598 {
1599         u32 mask;
1600         switch (acb->adapter_type) {
1601
1602         case ACB_ADAPTER_TYPE_A: {
1603                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1604                 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1605                              ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1606                              ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1607                 writel(mask, &reg->outbound_intmask);
1608                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1609                 }
1610                 break;
1611
1612         case ACB_ADAPTER_TYPE_B: {
1613                 struct MessageUnit_B *reg = acb->pmuB;
1614                 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1615                         ARCMSR_IOP2DRV_DATA_READ_OK |
1616                         ARCMSR_IOP2DRV_CDB_DONE |
1617                         ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1618                 writel(mask, reg->iop2drv_doorbell_mask);
1619                 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1620                 }
1621                 break;
1622         case ACB_ADAPTER_TYPE_C: {
1623                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1624                 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1625                 writel(intmask_org & mask, &reg->host_int_mask);
1626                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1627                 }
1628                 break;
1629         case ACB_ADAPTER_TYPE_D: {
1630                 struct MessageUnit_D *reg = acb->pmuD;
1631
1632                 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1633                 writel(intmask_org | mask, reg->pcief0_int_enable);
1634                 break;
1635                 }
1636         case ACB_ADAPTER_TYPE_E: {
1637                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1638
1639                 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1640                 writel(intmask_org & mask, &reg->host_int_mask);
1641                 break;
1642                 }
1643         }
1644 }
1645
1646 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1647         struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1648 {
1649         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1650         int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1651         __le32 address_lo, address_hi;
1652         int arccdbsize = 0x30;
1653         __le32 length = 0;
1654         int i;
1655         struct scatterlist *sg;
1656         int nseg;
1657         ccb->pcmd = pcmd;
1658         memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1659         arcmsr_cdb->TargetID = pcmd->device->id;
1660         arcmsr_cdb->LUN = pcmd->device->lun;
1661         arcmsr_cdb->Function = 1;
1662         arcmsr_cdb->msgContext = 0;
1663         memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1664
1665         nseg = scsi_dma_map(pcmd);
1666         if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1667                 return FAILED;
1668         scsi_for_each_sg(pcmd, sg, nseg, i) {
1669                 /* Get the physical address of the current data pointer */
1670                 length = cpu_to_le32(sg_dma_len(sg));
1671                 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1672                 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1673                 if (address_hi == 0) {
1674                         struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1675
1676                         pdma_sg->address = address_lo;
1677                         pdma_sg->length = length;
1678                         psge += sizeof (struct SG32ENTRY);
1679                         arccdbsize += sizeof (struct SG32ENTRY);
1680                 } else {
1681                         struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1682
1683                         pdma_sg->addresshigh = address_hi;
1684                         pdma_sg->address = address_lo;
1685                         pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1686                         psge += sizeof (struct SG64ENTRY);
1687                         arccdbsize += sizeof (struct SG64ENTRY);
1688                 }
1689         }
1690         arcmsr_cdb->sgcount = (uint8_t)nseg;
1691         arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1692         arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1693         if ( arccdbsize > 256)
1694                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1695         if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1696                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1697         ccb->arc_cdb_size = arccdbsize;
1698         return SUCCESS;
1699 }
1700
1701 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1702 {
1703         uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1704         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1705         atomic_inc(&acb->ccboutstandingcount);
1706         ccb->startdone = ARCMSR_CCB_START;
1707         switch (acb->adapter_type) {
1708         case ACB_ADAPTER_TYPE_A: {
1709                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1710
1711                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1712                         writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1713                         &reg->inbound_queueport);
1714                 else
1715                         writel(cdb_phyaddr, &reg->inbound_queueport);
1716                 break;
1717         }
1718
1719         case ACB_ADAPTER_TYPE_B: {
1720                 struct MessageUnit_B *reg = acb->pmuB;
1721                 uint32_t ending_index, index = reg->postq_index;
1722
1723                 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1724                 reg->post_qbuffer[ending_index] = 0;
1725                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1726                         reg->post_qbuffer[index] =
1727                                 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1728                 } else {
1729                         reg->post_qbuffer[index] = cdb_phyaddr;
1730                 }
1731                 index++;
1732                 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1733                 reg->postq_index = index;
1734                 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1735                 }
1736                 break;
1737         case ACB_ADAPTER_TYPE_C: {
1738                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1739                 uint32_t ccb_post_stamp, arc_cdb_size;
1740
1741                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1742                 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1743                 if (acb->cdb_phyaddr_hi32) {
1744                         writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1745                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1746                 } else {
1747                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1748                 }
1749                 }
1750                 break;
1751         case ACB_ADAPTER_TYPE_D: {
1752                 struct MessageUnit_D  *pmu = acb->pmuD;
1753                 u16 index_stripped;
1754                 u16 postq_index, toggle;
1755                 unsigned long flags;
1756                 struct InBound_SRB *pinbound_srb;
1757
1758                 spin_lock_irqsave(&acb->postq_lock, flags);
1759                 postq_index = pmu->postq_index;
1760                 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1761                 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr);
1762                 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr);
1763                 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1764                 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1765                 toggle = postq_index & 0x4000;
1766                 index_stripped = postq_index + 1;
1767                 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1768                 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1769                         (toggle ^ 0x4000);
1770                 writel(postq_index, pmu->inboundlist_write_pointer);
1771                 spin_unlock_irqrestore(&acb->postq_lock, flags);
1772                 break;
1773                 }
1774         case ACB_ADAPTER_TYPE_E: {
1775                 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1776                 u32 ccb_post_stamp, arc_cdb_size;
1777
1778                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1779                 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1780                 writel(0, &pmu->inbound_queueport_high);
1781                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1782                 break;
1783                 }
1784         }
1785 }
1786
1787 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1788 {
1789         struct MessageUnit_A __iomem *reg = acb->pmuA;
1790         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1791         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1792         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1793                 printk(KERN_NOTICE
1794                         "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
1795                         , acb->host->host_no);
1796         }
1797 }
1798
1799 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1800 {
1801         struct MessageUnit_B *reg = acb->pmuB;
1802         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1803         writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1804
1805         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1806                 printk(KERN_NOTICE
1807                         "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
1808                         , acb->host->host_no);
1809         }
1810 }
1811
1812 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1813 {
1814         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1815         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1816         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1817         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1818         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1819                 printk(KERN_NOTICE
1820                         "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
1821                         , pACB->host->host_no);
1822         }
1823         return;
1824 }
1825
1826 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1827 {
1828         struct MessageUnit_D *reg = pACB->pmuD;
1829
1830         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1831         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1832         if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1833                 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' "
1834                         "timeout\n", pACB->host->host_no);
1835 }
1836
1837 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
1838 {
1839         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1840
1841         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1842         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1843         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1844         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1845         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1846                 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' "
1847                         "timeout\n", pACB->host->host_no);
1848         }
1849 }
1850
1851 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1852 {
1853         switch (acb->adapter_type) {
1854         case ACB_ADAPTER_TYPE_A: {
1855                 arcmsr_hbaA_stop_bgrb(acb);
1856                 }
1857                 break;
1858
1859         case ACB_ADAPTER_TYPE_B: {
1860                 arcmsr_hbaB_stop_bgrb(acb);
1861                 }
1862                 break;
1863         case ACB_ADAPTER_TYPE_C: {
1864                 arcmsr_hbaC_stop_bgrb(acb);
1865                 }
1866                 break;
1867         case ACB_ADAPTER_TYPE_D:
1868                 arcmsr_hbaD_stop_bgrb(acb);
1869                 break;
1870         case ACB_ADAPTER_TYPE_E:
1871                 arcmsr_hbaE_stop_bgrb(acb);
1872                 break;
1873         }
1874 }
1875
1876 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1877 {
1878         dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1879 }
1880
1881 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1882 {
1883         switch (acb->adapter_type) {
1884         case ACB_ADAPTER_TYPE_A: {
1885                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1886                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1887                 }
1888                 break;
1889
1890         case ACB_ADAPTER_TYPE_B: {
1891                 struct MessageUnit_B *reg = acb->pmuB;
1892                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
1893                 }
1894                 break;
1895         case ACB_ADAPTER_TYPE_C: {
1896                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1897
1898                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1899                 }
1900                 break;
1901         case ACB_ADAPTER_TYPE_D: {
1902                 struct MessageUnit_D *reg = acb->pmuD;
1903                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
1904                         reg->inbound_doorbell);
1905                 }
1906                 break;
1907         case ACB_ADAPTER_TYPE_E: {
1908                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1909                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
1910                 writel(acb->out_doorbell, &reg->iobound_doorbell);
1911                 }
1912                 break;
1913         }
1914 }
1915
1916 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1917 {
1918         switch (acb->adapter_type) {
1919         case ACB_ADAPTER_TYPE_A: {
1920                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1921                 /*
1922                 ** push inbound doorbell tell iop, driver data write ok
1923                 ** and wait reply on next hwinterrupt for next Qbuffer post
1924                 */
1925                 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1926                 }
1927                 break;
1928
1929         case ACB_ADAPTER_TYPE_B: {
1930                 struct MessageUnit_B *reg = acb->pmuB;
1931                 /*
1932                 ** push inbound doorbell tell iop, driver data write ok
1933                 ** and wait reply on next hwinterrupt for next Qbuffer post
1934                 */
1935                 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
1936                 }
1937                 break;
1938         case ACB_ADAPTER_TYPE_C: {
1939                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1940                 /*
1941                 ** push inbound doorbell tell iop, driver data write ok
1942                 ** and wait reply on next hwinterrupt for next Qbuffer post
1943                 */
1944                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1945                 }
1946                 break;
1947         case ACB_ADAPTER_TYPE_D: {
1948                 struct MessageUnit_D *reg = acb->pmuD;
1949                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
1950                         reg->inbound_doorbell);
1951                 }
1952                 break;
1953         case ACB_ADAPTER_TYPE_E: {
1954                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1955                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
1956                 writel(acb->out_doorbell, &reg->iobound_doorbell);
1957                 }
1958                 break;
1959         }
1960 }
1961
1962 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1963 {
1964         struct QBUFFER __iomem *qbuffer = NULL;
1965         switch (acb->adapter_type) {
1966
1967         case ACB_ADAPTER_TYPE_A: {
1968                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1969                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1970                 }
1971                 break;
1972
1973         case ACB_ADAPTER_TYPE_B: {
1974                 struct MessageUnit_B *reg = acb->pmuB;
1975                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1976                 }
1977                 break;
1978         case ACB_ADAPTER_TYPE_C: {
1979                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1980                 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1981                 }
1982                 break;
1983         case ACB_ADAPTER_TYPE_D: {
1984                 struct MessageUnit_D *reg = acb->pmuD;
1985                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1986                 }
1987                 break;
1988         case ACB_ADAPTER_TYPE_E: {
1989                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1990                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1991                 }
1992                 break;
1993         }
1994         return qbuffer;
1995 }
1996
1997 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
1998 {
1999         struct QBUFFER __iomem *pqbuffer = NULL;
2000         switch (acb->adapter_type) {
2001
2002         case ACB_ADAPTER_TYPE_A: {
2003                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2004                 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
2005                 }
2006                 break;
2007
2008         case ACB_ADAPTER_TYPE_B: {
2009                 struct MessageUnit_B  *reg = acb->pmuB;
2010                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2011                 }
2012                 break;
2013         case ACB_ADAPTER_TYPE_C: {
2014                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2015                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2016                 }
2017                 break;
2018         case ACB_ADAPTER_TYPE_D: {
2019                 struct MessageUnit_D *reg = acb->pmuD;
2020                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2021                 }
2022                 break;
2023         case ACB_ADAPTER_TYPE_E: {
2024                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2025                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2026                 }
2027                 break;
2028         }
2029         return pqbuffer;
2030 }
2031
2032 static uint32_t
2033 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2034                 struct QBUFFER __iomem *prbuffer)
2035 {
2036         uint8_t *pQbuffer;
2037         uint8_t *buf1 = NULL;
2038         uint32_t __iomem *iop_data;
2039         uint32_t iop_len, data_len, *buf2 = NULL;
2040
2041         iop_data = (uint32_t __iomem *)prbuffer->data;
2042         iop_len = readl(&prbuffer->data_len);
2043         if (iop_len > 0) {
2044                 buf1 = kmalloc(128, GFP_ATOMIC);
2045                 buf2 = (uint32_t *)buf1;
2046                 if (buf1 == NULL)
2047                         return 0;
2048                 data_len = iop_len;
2049                 while (data_len >= 4) {
2050                         *buf2++ = readl(iop_data);
2051                         iop_data++;
2052                         data_len -= 4;
2053                 }
2054                 if (data_len)
2055                         *buf2 = readl(iop_data);
2056                 buf2 = (uint32_t *)buf1;
2057         }
2058         while (iop_len > 0) {
2059                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2060                 *pQbuffer = *buf1;
2061                 acb->rqbuf_putIndex++;
2062                 /* if last, index number set it to 0 */
2063                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2064                 buf1++;
2065                 iop_len--;
2066         }
2067         kfree(buf2);
2068         /* let IOP know data has been read */
2069         arcmsr_iop_message_read(acb);
2070         return 1;
2071 }
2072
2073 uint32_t
2074 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2075         struct QBUFFER __iomem *prbuffer) {
2076
2077         uint8_t *pQbuffer;
2078         uint8_t __iomem *iop_data;
2079         uint32_t iop_len;
2080
2081         if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2082                 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2083         iop_data = (uint8_t __iomem *)prbuffer->data;
2084         iop_len = readl(&prbuffer->data_len);
2085         while (iop_len > 0) {
2086                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2087                 *pQbuffer = readb(iop_data);
2088                 acb->rqbuf_putIndex++;
2089                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2090                 iop_data++;
2091                 iop_len--;
2092         }
2093         arcmsr_iop_message_read(acb);
2094         return 1;
2095 }
2096
2097 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2098 {
2099         unsigned long flags;
2100         struct QBUFFER __iomem  *prbuffer;
2101         int32_t buf_empty_len;
2102
2103         spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2104         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2105         buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
2106                 (ARCMSR_MAX_QBUFFER - 1);
2107         if (buf_empty_len >= readl(&prbuffer->data_len)) {
2108                 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2109                         acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2110         } else
2111                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2112         spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2113 }
2114
2115 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2116 {
2117         uint8_t *pQbuffer;
2118         struct QBUFFER __iomem *pwbuffer;
2119         uint8_t *buf1 = NULL;
2120         uint32_t __iomem *iop_data;
2121         uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2122
2123         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2124                 buf1 = kmalloc(128, GFP_ATOMIC);
2125                 buf2 = (uint32_t *)buf1;
2126                 if (buf1 == NULL)
2127                         return;
2128
2129                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2130                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2131                 iop_data = (uint32_t __iomem *)pwbuffer->data;
2132                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2133                         && (allxfer_len < 124)) {
2134                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2135                         *buf1 = *pQbuffer;
2136                         acb->wqbuf_getIndex++;
2137                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2138                         buf1++;
2139                         allxfer_len++;
2140                 }
2141                 data_len = allxfer_len;
2142                 buf1 = (uint8_t *)buf2;
2143                 while (data_len >= 4) {
2144                         data = *buf2++;
2145                         writel(data, iop_data);
2146                         iop_data++;
2147                         data_len -= 4;
2148                 }
2149                 if (data_len) {
2150                         data = *buf2;
2151                         writel(data, iop_data);
2152                 }
2153                 writel(allxfer_len, &pwbuffer->data_len);
2154                 kfree(buf1);
2155                 arcmsr_iop_message_wrote(acb);
2156         }
2157 }
2158
2159 void
2160 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2161 {
2162         uint8_t *pQbuffer;
2163         struct QBUFFER __iomem *pwbuffer;
2164         uint8_t __iomem *iop_data;
2165         int32_t allxfer_len = 0;
2166
2167         if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2168                 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2169                 return;
2170         }
2171         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2172                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2173                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2174                 iop_data = (uint8_t __iomem *)pwbuffer->data;
2175                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2176                         && (allxfer_len < 124)) {
2177                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2178                         writeb(*pQbuffer, iop_data);
2179                         acb->wqbuf_getIndex++;
2180                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2181                         iop_data++;
2182                         allxfer_len++;
2183                 }
2184                 writel(allxfer_len, &pwbuffer->data_len);
2185                 arcmsr_iop_message_wrote(acb);
2186         }
2187 }
2188
2189 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2190 {
2191         unsigned long flags;
2192
2193         spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2194         acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2195         if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2196                 arcmsr_write_ioctldata2iop(acb);
2197         if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2198                 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2199         spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2200 }
2201
2202 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2203 {
2204         uint32_t outbound_doorbell;
2205         struct MessageUnit_A __iomem *reg = acb->pmuA;
2206         outbound_doorbell = readl(&reg->outbound_doorbell);
2207         do {
2208                 writel(outbound_doorbell, &reg->outbound_doorbell);
2209                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2210                         arcmsr_iop2drv_data_wrote_handle(acb);
2211                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2212                         arcmsr_iop2drv_data_read_handle(acb);
2213                 outbound_doorbell = readl(&reg->outbound_doorbell);
2214         } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2215                 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2216 }
2217 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2218 {
2219         uint32_t outbound_doorbell;
2220         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2221         /*
2222         *******************************************************************
2223         **  Maybe here we need to check wrqbuffer_lock is lock or not
2224         **  DOORBELL: din! don!
2225         **  check if there are any mail need to pack from firmware
2226         *******************************************************************
2227         */
2228         outbound_doorbell = readl(&reg->outbound_doorbell);
2229         do {
2230                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2231                 readl(&reg->outbound_doorbell_clear);
2232                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2233                         arcmsr_iop2drv_data_wrote_handle(pACB);
2234                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2235                         arcmsr_iop2drv_data_read_handle(pACB);
2236                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2237                         arcmsr_hbaC_message_isr(pACB);
2238                 outbound_doorbell = readl(&reg->outbound_doorbell);
2239         } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2240                 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2241                 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2242 }
2243
2244 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2245 {
2246         uint32_t outbound_doorbell;
2247         struct MessageUnit_D  *pmu = pACB->pmuD;
2248
2249         outbound_doorbell = readl(pmu->outbound_doorbell);
2250         do {
2251                 writel(outbound_doorbell, pmu->outbound_doorbell);
2252                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2253                         arcmsr_hbaD_message_isr(pACB);
2254                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2255                         arcmsr_iop2drv_data_wrote_handle(pACB);
2256                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2257                         arcmsr_iop2drv_data_read_handle(pACB);
2258                 outbound_doorbell = readl(pmu->outbound_doorbell);
2259         } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2260                 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2261                 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2262 }
2263
2264 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2265 {
2266         uint32_t outbound_doorbell, in_doorbell, tmp;
2267         struct MessageUnit_E __iomem *reg = pACB->pmuE;
2268
2269         in_doorbell = readl(&reg->iobound_doorbell);
2270         outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2271         do {
2272                 writel(0, &reg->host_int_status); /* clear interrupt */
2273                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2274                         arcmsr_iop2drv_data_wrote_handle(pACB);
2275                 }
2276                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2277                         arcmsr_iop2drv_data_read_handle(pACB);
2278                 }
2279                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2280                         arcmsr_hbaE_message_isr(pACB);
2281                 }
2282                 tmp = in_doorbell;
2283                 in_doorbell = readl(&reg->iobound_doorbell);
2284                 outbound_doorbell = tmp ^ in_doorbell;
2285         } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2286                 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2287                 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2288         pACB->in_doorbell = in_doorbell;
2289 }
2290
2291 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2292 {
2293         uint32_t flag_ccb;
2294         struct MessageUnit_A __iomem *reg = acb->pmuA;
2295         struct ARCMSR_CDB *pARCMSR_CDB;
2296         struct CommandControlBlock *pCCB;
2297         bool error;
2298         while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
2299                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
2300                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2301                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2302                 arcmsr_drain_donequeue(acb, pCCB, error);
2303         }
2304 }
2305 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2306 {
2307         uint32_t index;
2308         uint32_t flag_ccb;
2309         struct MessageUnit_B *reg = acb->pmuB;
2310         struct ARCMSR_CDB *pARCMSR_CDB;
2311         struct CommandControlBlock *pCCB;
2312         bool error;
2313         index = reg->doneq_index;
2314         while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2315                 reg->done_qbuffer[index] = 0;
2316                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
2317                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2318                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2319                 arcmsr_drain_donequeue(acb, pCCB, error);
2320                 index++;
2321                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2322                 reg->doneq_index = index;
2323         }
2324 }
2325
2326 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2327 {
2328         struct MessageUnit_C __iomem *phbcmu;
2329         struct ARCMSR_CDB *arcmsr_cdb;
2330         struct CommandControlBlock *ccb;
2331         uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
2332         int error;
2333
2334         phbcmu = acb->pmuC;
2335         /* areca cdb command done */
2336         /* Use correct offset and size for syncing */
2337
2338         while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2339                         0xFFFFFFFF) {
2340                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2341                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2342                         + ccb_cdb_phy);
2343                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2344                         arcmsr_cdb);
2345                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2346                         ? true : false;
2347                 /* check if command done with no error */
2348                 arcmsr_drain_donequeue(acb, ccb, error);
2349                 throttling++;
2350                 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2351                         writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2352                                 &phbcmu->inbound_doorbell);
2353                         throttling = 0;
2354                 }
2355         }
2356 }
2357
2358 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2359 {
2360         u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2361         uint32_t addressLow, ccb_cdb_phy;
2362         int error;
2363         struct MessageUnit_D  *pmu;
2364         struct ARCMSR_CDB *arcmsr_cdb;
2365         struct CommandControlBlock *ccb;
2366         unsigned long flags;
2367
2368         spin_lock_irqsave(&acb->doneq_lock, flags);
2369         pmu = acb->pmuD;
2370         outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2371         doneq_index = pmu->doneq_index;
2372         if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2373                 do {
2374                         toggle = doneq_index & 0x4000;
2375                         index_stripped = (doneq_index & 0xFFF) + 1;
2376                         index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2377                         pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2378                                 ((toggle ^ 0x4000) + 1);
2379                         doneq_index = pmu->doneq_index;
2380                         addressLow = pmu->done_qbuffer[doneq_index &
2381                                 0xFFF].addressLow;
2382                         ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2383                         arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2384                                 + ccb_cdb_phy);
2385                         ccb = container_of(arcmsr_cdb,
2386                                 struct CommandControlBlock, arcmsr_cdb);
2387                         error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2388                                 ? true : false;
2389                         arcmsr_drain_donequeue(acb, ccb, error);
2390                         writel(doneq_index, pmu->outboundlist_read_pointer);
2391                 } while ((doneq_index & 0xFFF) !=
2392                         (outbound_write_pointer & 0xFFF));
2393         }
2394         writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2395                 pmu->outboundlist_interrupt_cause);
2396         readl(pmu->outboundlist_interrupt_cause);
2397         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2398 }
2399
2400 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2401 {
2402         uint32_t doneq_index;
2403         uint16_t cmdSMID;
2404         int error;
2405         struct MessageUnit_E __iomem *pmu;
2406         struct CommandControlBlock *ccb;
2407         unsigned long flags;
2408
2409         spin_lock_irqsave(&acb->doneq_lock, flags);
2410         doneq_index = acb->doneq_index;
2411         pmu = acb->pmuE;
2412         while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2413                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2414                 ccb = acb->pccb_pool[cmdSMID];
2415                 error = (acb->pCompletionQ[doneq_index].cmdFlag
2416                         & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2417                 arcmsr_drain_donequeue(acb, ccb, error);
2418                 doneq_index++;
2419                 if (doneq_index >= acb->completionQ_entry)
2420                         doneq_index = 0;
2421         }
2422         acb->doneq_index = doneq_index;
2423         writel(doneq_index, &pmu->reply_post_consumer_index);
2424         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2425 }
2426
2427 /*
2428 **********************************************************************************
2429 ** Handle a message interrupt
2430 **
2431 ** The only message interrupt we expect is in response to a query for the current adapter config.
2432 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2433 **********************************************************************************
2434 */
2435 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2436 {
2437         struct MessageUnit_A __iomem *reg  = acb->pmuA;
2438         /*clear interrupt and message state*/
2439         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2440         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2441                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2442 }
2443 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2444 {
2445         struct MessageUnit_B *reg  = acb->pmuB;
2446
2447         /*clear interrupt and message state*/
2448         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2449         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2450                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2451 }
2452 /*
2453 **********************************************************************************
2454 ** Handle a message interrupt
2455 **
2456 ** The only message interrupt we expect is in response to a query for the
2457 ** current adapter config.
2458 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2459 **********************************************************************************
2460 */
2461 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2462 {
2463         struct MessageUnit_C __iomem *reg  = acb->pmuC;
2464         /*clear interrupt and message state*/
2465         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2466         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2467                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2468 }
2469
2470 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2471 {
2472         struct MessageUnit_D *reg  = acb->pmuD;
2473
2474         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2475         readl(reg->outbound_doorbell);
2476         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2477                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2478 }
2479
2480 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2481 {
2482         struct MessageUnit_E __iomem *reg  = acb->pmuE;
2483
2484         writel(0, &reg->host_int_status);
2485         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2486                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2487 }
2488
2489 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2490 {
2491         uint32_t outbound_intstatus;
2492         struct MessageUnit_A __iomem *reg = acb->pmuA;
2493         outbound_intstatus = readl(&reg->outbound_intstatus) &
2494                 acb->outbound_int_enable;
2495         if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2496                 return IRQ_NONE;
2497         do {
2498                 writel(outbound_intstatus, &reg->outbound_intstatus);
2499                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2500                         arcmsr_hbaA_doorbell_isr(acb);
2501                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2502                         arcmsr_hbaA_postqueue_isr(acb);
2503                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2504                         arcmsr_hbaA_message_isr(acb);
2505                 outbound_intstatus = readl(&reg->outbound_intstatus) &
2506                         acb->outbound_int_enable;
2507         } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2508                 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2509                 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2510         return IRQ_HANDLED;
2511 }
2512
2513 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2514 {
2515         uint32_t outbound_doorbell;
2516         struct MessageUnit_B *reg = acb->pmuB;
2517         outbound_doorbell = readl(reg->iop2drv_doorbell) &
2518                                 acb->outbound_int_enable;
2519         if (!outbound_doorbell)
2520                 return IRQ_NONE;
2521         do {
2522                 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2523                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2524                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2525                         arcmsr_iop2drv_data_wrote_handle(acb);
2526                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2527                         arcmsr_iop2drv_data_read_handle(acb);
2528                 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2529                         arcmsr_hbaB_postqueue_isr(acb);
2530                 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2531                         arcmsr_hbaB_message_isr(acb);
2532                 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2533                         acb->outbound_int_enable;
2534         } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2535                 | ARCMSR_IOP2DRV_DATA_READ_OK
2536                 | ARCMSR_IOP2DRV_CDB_DONE
2537                 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2538         return IRQ_HANDLED;
2539 }
2540
2541 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2542 {
2543         uint32_t host_interrupt_status;
2544         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2545         /*
2546         *********************************************
2547         **   check outbound intstatus
2548         *********************************************
2549         */
2550         host_interrupt_status = readl(&phbcmu->host_int_status) &
2551                 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2552                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2553         if (!host_interrupt_status)
2554                 return IRQ_NONE;
2555         do {
2556                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2557                         arcmsr_hbaC_doorbell_isr(pACB);
2558                 /* MU post queue interrupts*/
2559                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2560                         arcmsr_hbaC_postqueue_isr(pACB);
2561                 host_interrupt_status = readl(&phbcmu->host_int_status);
2562         } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2563                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2564         return IRQ_HANDLED;
2565 }
2566
2567 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2568 {
2569         u32 host_interrupt_status;
2570         struct MessageUnit_D  *pmu = pACB->pmuD;
2571
2572         host_interrupt_status = readl(pmu->host_int_status) &
2573                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2574                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2575         if (!host_interrupt_status)
2576                 return IRQ_NONE;
2577         do {
2578                 /* MU post queue interrupts*/
2579                 if (host_interrupt_status &
2580                         ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2581                         arcmsr_hbaD_postqueue_isr(pACB);
2582                 if (host_interrupt_status &
2583                         ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2584                         arcmsr_hbaD_doorbell_isr(pACB);
2585                 host_interrupt_status = readl(pmu->host_int_status);
2586         } while (host_interrupt_status &
2587                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2588                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2589         return IRQ_HANDLED;
2590 }
2591
2592 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2593 {
2594         uint32_t host_interrupt_status;
2595         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2596
2597         host_interrupt_status = readl(&pmu->host_int_status) &
2598                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2599                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2600         if (!host_interrupt_status)
2601                 return IRQ_NONE;
2602         do {
2603                 /* MU ioctl transfer doorbell interrupts*/
2604                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2605                         arcmsr_hbaE_doorbell_isr(pACB);
2606                 }
2607                 /* MU post queue interrupts*/
2608                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2609                         arcmsr_hbaE_postqueue_isr(pACB);
2610                 }
2611                 host_interrupt_status = readl(&pmu->host_int_status);
2612         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2613                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2614         return IRQ_HANDLED;
2615 }
2616
2617 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2618 {
2619         switch (acb->adapter_type) {
2620         case ACB_ADAPTER_TYPE_A:
2621                 return arcmsr_hbaA_handle_isr(acb);
2622                 break;
2623         case ACB_ADAPTER_TYPE_B:
2624                 return arcmsr_hbaB_handle_isr(acb);
2625                 break;
2626         case ACB_ADAPTER_TYPE_C:
2627                 return arcmsr_hbaC_handle_isr(acb);
2628         case ACB_ADAPTER_TYPE_D:
2629                 return arcmsr_hbaD_handle_isr(acb);
2630         case ACB_ADAPTER_TYPE_E:
2631                 return arcmsr_hbaE_handle_isr(acb);
2632         default:
2633                 return IRQ_NONE;
2634         }
2635 }
2636
2637 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2638 {
2639         if (acb) {
2640                 /* stop adapter background rebuild */
2641                 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2642                         uint32_t intmask_org;
2643                         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2644                         intmask_org = arcmsr_disable_outbound_ints(acb);
2645                         arcmsr_stop_adapter_bgrb(acb);
2646                         arcmsr_flush_adapter_cache(acb);
2647                         arcmsr_enable_outbound_ints(acb, intmask_org);
2648                 }
2649         }
2650 }
2651
2652
2653 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2654 {
2655         uint32_t        i;
2656
2657         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2658                 for (i = 0; i < 15; i++) {
2659                         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2660                                 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2661                                 acb->rqbuf_getIndex = 0;
2662                                 acb->rqbuf_putIndex = 0;
2663                                 arcmsr_iop_message_read(acb);
2664                                 mdelay(30);
2665                         } else if (acb->rqbuf_getIndex !=
2666                                    acb->rqbuf_putIndex) {
2667                                 acb->rqbuf_getIndex = 0;
2668                                 acb->rqbuf_putIndex = 0;
2669                                 mdelay(30);
2670                         } else
2671                                 break;
2672                 }
2673         }
2674 }
2675
2676 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2677                 struct scsi_cmnd *cmd)
2678 {
2679         char *buffer;
2680         unsigned short use_sg;
2681         int retvalue = 0, transfer_len = 0;
2682         unsigned long flags;
2683         struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2684         uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2685                 (uint32_t)cmd->cmnd[6] << 16 |
2686                 (uint32_t)cmd->cmnd[7] << 8 |
2687                 (uint32_t)cmd->cmnd[8];
2688         struct scatterlist *sg;
2689
2690         use_sg = scsi_sg_count(cmd);
2691         sg = scsi_sglist(cmd);
2692         buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2693         if (use_sg > 1) {
2694                 retvalue = ARCMSR_MESSAGE_FAIL;
2695                 goto message_out;
2696         }
2697         transfer_len += sg->length;
2698         if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2699                 retvalue = ARCMSR_MESSAGE_FAIL;
2700                 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2701                 goto message_out;
2702         }
2703         pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2704         switch (controlcode) {
2705         case ARCMSR_MESSAGE_READ_RQBUFFER: {
2706                 unsigned char *ver_addr;
2707                 uint8_t *ptmpQbuffer;
2708                 uint32_t allxfer_len = 0;
2709                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2710                 if (!ver_addr) {
2711                         retvalue = ARCMSR_MESSAGE_FAIL;
2712                         pr_info("%s: memory not enough!\n", __func__);
2713                         goto message_out;
2714                 }
2715                 ptmpQbuffer = ver_addr;
2716                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2717                 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2718                         unsigned int tail = acb->rqbuf_getIndex;
2719                         unsigned int head = acb->rqbuf_putIndex;
2720                         unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2721
2722                         allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2723                         if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2724                                 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2725
2726                         if (allxfer_len <= cnt_to_end)
2727                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2728                         else {
2729                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2730                                 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2731                         }
2732                         acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2733                 }
2734                 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2735                         allxfer_len);
2736                 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2737                         struct QBUFFER __iomem *prbuffer;
2738                         acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2739                         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2740                         if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2741                                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2742                 }
2743                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2744                 kfree(ver_addr);
2745                 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2746                 if (acb->fw_flag == FW_DEADLOCK)
2747                         pcmdmessagefld->cmdmessage.ReturnCode =
2748                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2749                 else
2750                         pcmdmessagefld->cmdmessage.ReturnCode =
2751                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2752                 break;
2753         }
2754         case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2755                 unsigned char *ver_addr;
2756                 uint32_t user_len;
2757                 int32_t cnt2end;
2758                 uint8_t *pQbuffer, *ptmpuserbuffer;
2759
2760                 user_len = pcmdmessagefld->cmdmessage.Length;
2761                 if (user_len > ARCMSR_API_DATA_BUFLEN) {
2762                         retvalue = ARCMSR_MESSAGE_FAIL;
2763                         goto message_out;
2764                 }
2765
2766                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2767                 if (!ver_addr) {
2768                         retvalue = ARCMSR_MESSAGE_FAIL;
2769                         goto message_out;
2770                 }
2771                 ptmpuserbuffer = ver_addr;
2772
2773                 memcpy(ptmpuserbuffer,
2774                         pcmdmessagefld->messagedatabuffer, user_len);
2775                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2776                 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
2777                         struct SENSE_DATA *sensebuffer =
2778                                 (struct SENSE_DATA *)cmd->sense_buffer;
2779                         arcmsr_write_ioctldata2iop(acb);
2780                         /* has error report sensedata */
2781                         sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
2782                         sensebuffer->SenseKey = ILLEGAL_REQUEST;
2783                         sensebuffer->AdditionalSenseLength = 0x0A;
2784                         sensebuffer->AdditionalSenseCode = 0x20;
2785                         sensebuffer->Valid = 1;
2786                         retvalue = ARCMSR_MESSAGE_FAIL;
2787                 } else {
2788                         pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
2789                         cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
2790                         if (user_len > cnt2end) {
2791                                 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
2792                                 ptmpuserbuffer += cnt2end;
2793                                 user_len -= cnt2end;
2794                                 acb->wqbuf_putIndex = 0;
2795                                 pQbuffer = acb->wqbuffer;
2796                         }
2797                         memcpy(pQbuffer, ptmpuserbuffer, user_len);
2798                         acb->wqbuf_putIndex += user_len;
2799                         acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2800                         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2801                                 acb->acb_flags &=
2802                                                 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
2803                                 arcmsr_write_ioctldata2iop(acb);
2804                         }
2805                 }
2806                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2807                 kfree(ver_addr);
2808                 if (acb->fw_flag == FW_DEADLOCK)
2809                         pcmdmessagefld->cmdmessage.ReturnCode =
2810                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2811                 else
2812                         pcmdmessagefld->cmdmessage.ReturnCode =
2813                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2814                 break;
2815         }
2816         case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
2817                 uint8_t *pQbuffer = acb->rqbuffer;
2818
2819                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2820                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2821                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2822                 acb->rqbuf_getIndex = 0;
2823                 acb->rqbuf_putIndex = 0;
2824                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2825                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2826                 if (acb->fw_flag == FW_DEADLOCK)
2827                         pcmdmessagefld->cmdmessage.ReturnCode =
2828                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2829                 else
2830                         pcmdmessagefld->cmdmessage.ReturnCode =
2831                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2832                 break;
2833         }
2834         case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
2835                 uint8_t *pQbuffer = acb->wqbuffer;
2836                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2837                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2838                         ACB_F_MESSAGE_WQBUFFER_READED);
2839                 acb->wqbuf_getIndex = 0;
2840                 acb->wqbuf_putIndex = 0;
2841                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2842                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2843                 if (acb->fw_flag == FW_DEADLOCK)
2844                         pcmdmessagefld->cmdmessage.ReturnCode =
2845                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2846                 else
2847                         pcmdmessagefld->cmdmessage.ReturnCode =
2848                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2849                 break;
2850         }
2851         case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
2852                 uint8_t *pQbuffer;
2853                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2854                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2855                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2856                 acb->rqbuf_getIndex = 0;
2857                 acb->rqbuf_putIndex = 0;
2858                 pQbuffer = acb->rqbuffer;
2859                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2860                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2861                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2862                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2863                         ACB_F_MESSAGE_WQBUFFER_READED);
2864                 acb->wqbuf_getIndex = 0;
2865                 acb->wqbuf_putIndex = 0;
2866                 pQbuffer = acb->wqbuffer;
2867                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2868                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2869                 if (acb->fw_flag == FW_DEADLOCK)
2870                         pcmdmessagefld->cmdmessage.ReturnCode =
2871                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2872                 else
2873                         pcmdmessagefld->cmdmessage.ReturnCode =
2874                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2875                 break;
2876         }
2877         case ARCMSR_MESSAGE_RETURN_CODE_3F: {
2878                 if (acb->fw_flag == FW_DEADLOCK)
2879                         pcmdmessagefld->cmdmessage.ReturnCode =
2880                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2881                 else
2882                         pcmdmessagefld->cmdmessage.ReturnCode =
2883                                 ARCMSR_MESSAGE_RETURNCODE_3F;
2884                 break;
2885         }
2886         case ARCMSR_MESSAGE_SAY_HELLO: {
2887                 int8_t *hello_string = "Hello! I am ARCMSR";
2888                 if (acb->fw_flag == FW_DEADLOCK)
2889                         pcmdmessagefld->cmdmessage.ReturnCode =
2890                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2891                 else
2892                         pcmdmessagefld->cmdmessage.ReturnCode =
2893                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2894                 memcpy(pcmdmessagefld->messagedatabuffer,
2895                         hello_string, (int16_t)strlen(hello_string));
2896                 break;
2897         }
2898         case ARCMSR_MESSAGE_SAY_GOODBYE: {
2899                 if (acb->fw_flag == FW_DEADLOCK)
2900                         pcmdmessagefld->cmdmessage.ReturnCode =
2901                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2902                 else
2903                         pcmdmessagefld->cmdmessage.ReturnCode =
2904                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2905                 arcmsr_iop_parking(acb);
2906                 break;
2907         }
2908         case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
2909                 if (acb->fw_flag == FW_DEADLOCK)
2910                         pcmdmessagefld->cmdmessage.ReturnCode =
2911                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2912                 else
2913                         pcmdmessagefld->cmdmessage.ReturnCode =
2914                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2915                 arcmsr_flush_adapter_cache(acb);
2916                 break;
2917         }
2918         default:
2919                 retvalue = ARCMSR_MESSAGE_FAIL;
2920                 pr_info("%s: unknown controlcode!\n", __func__);
2921         }
2922 message_out:
2923         if (use_sg) {
2924                 struct scatterlist *sg = scsi_sglist(cmd);
2925                 kunmap_atomic(buffer - sg->offset);
2926         }
2927         return retvalue;
2928 }
2929
2930 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
2931 {
2932         struct list_head *head = &acb->ccb_free_list;
2933         struct CommandControlBlock *ccb = NULL;
2934         unsigned long flags;
2935         spin_lock_irqsave(&acb->ccblist_lock, flags);
2936         if (!list_empty(head)) {
2937                 ccb = list_entry(head->next, struct CommandControlBlock, list);
2938                 list_del_init(&ccb->list);
2939         }else{
2940                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2941                 return NULL;
2942         }
2943         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2944         return ccb;
2945 }
2946
2947 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2948                 struct scsi_cmnd *cmd)
2949 {
2950         switch (cmd->cmnd[0]) {
2951         case INQUIRY: {
2952                 unsigned char inqdata[36];
2953                 char *buffer;
2954                 struct scatterlist *sg;
2955
2956                 if (cmd->device->lun) {
2957                         cmd->result = (DID_TIME_OUT << 16);
2958                         cmd->scsi_done(cmd);
2959                         return;
2960                 }
2961                 inqdata[0] = TYPE_PROCESSOR;
2962                 /* Periph Qualifier & Periph Dev Type */
2963                 inqdata[1] = 0;
2964                 /* rem media bit & Dev Type Modifier */
2965                 inqdata[2] = 0;
2966                 /* ISO, ECMA, & ANSI versions */
2967                 inqdata[4] = 31;
2968                 /* length of additional data */
2969                 strncpy(&inqdata[8], "Areca   ", 8);
2970                 /* Vendor Identification */
2971                 strncpy(&inqdata[16], "RAID controller ", 16);
2972                 /* Product Identification */
2973                 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
2974
2975                 sg = scsi_sglist(cmd);
2976                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2977
2978                 memcpy(buffer, inqdata, sizeof(inqdata));
2979                 sg = scsi_sglist(cmd);
2980                 kunmap_atomic(buffer - sg->offset);
2981
2982                 cmd->scsi_done(cmd);
2983         }
2984         break;
2985         case WRITE_BUFFER:
2986         case READ_BUFFER: {
2987                 if (arcmsr_iop_message_xfer(acb, cmd))
2988                         cmd->result = (DID_ERROR << 16);
2989                 cmd->scsi_done(cmd);
2990         }
2991         break;
2992         default:
2993                 cmd->scsi_done(cmd);
2994         }
2995 }
2996
2997 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
2998         void (* done)(struct scsi_cmnd *))
2999 {
3000         struct Scsi_Host *host = cmd->device->host;
3001         struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3002         struct CommandControlBlock *ccb;
3003         int target = cmd->device->id;
3004
3005         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3006                 cmd->result = (DID_NO_CONNECT << 16);
3007                 cmd->scsi_done(cmd);
3008                 return 0;
3009         }
3010         cmd->scsi_done = done;
3011         cmd->host_scribble = NULL;
3012         cmd->result = 0;
3013         if (target == 16) {
3014                 /* virtual device for iop message transfer */
3015                 arcmsr_handle_virtual_command(acb, cmd);
3016                 return 0;
3017         }
3018         ccb = arcmsr_get_freeccb(acb);
3019         if (!ccb)
3020                 return SCSI_MLQUEUE_HOST_BUSY;
3021         if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3022                 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
3023                 cmd->scsi_done(cmd);
3024                 return 0;
3025         }
3026         arcmsr_post_ccb(acb, ccb);
3027         return 0;
3028 }
3029
3030 static DEF_SCSI_QCMD(arcmsr_queue_command)
3031
3032 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3033 {
3034         int count;
3035         uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3036         uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3037         uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3038         uint32_t *firm_model = &rwbuffer[15];
3039         uint32_t *firm_version = &rwbuffer[17];
3040         uint32_t *device_map = &rwbuffer[21];
3041
3042         count = 2;
3043         while (count) {
3044                 *acb_firm_model = readl(firm_model);
3045                 acb_firm_model++;
3046                 firm_model++;
3047                 count--;
3048         }
3049         count = 4;
3050         while (count) {
3051                 *acb_firm_version = readl(firm_version);
3052                 acb_firm_version++;
3053                 firm_version++;
3054                 count--;
3055         }
3056         count = 4;
3057         while (count) {
3058                 *acb_device_map = readl(device_map);
3059                 acb_device_map++;
3060                 device_map++;
3061                 count--;
3062         }
3063         pACB->signature = readl(&rwbuffer[0]);
3064         pACB->firm_request_len = readl(&rwbuffer[1]);
3065         pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3066         pACB->firm_sdram_size = readl(&rwbuffer[3]);
3067         pACB->firm_hd_channels = readl(&rwbuffer[4]);
3068         pACB->firm_cfg_version = readl(&rwbuffer[25]);
3069         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3070                 pACB->host->host_no,
3071                 pACB->firm_model,
3072                 pACB->firm_version);
3073 }
3074
3075 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3076 {
3077         struct MessageUnit_A __iomem *reg = acb->pmuA;
3078
3079         arcmsr_wait_firmware_ready(acb);
3080         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3081         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3082                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3083                         miscellaneous data' timeout \n", acb->host->host_no);
3084                 return false;
3085         }
3086         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3087         return true;
3088 }
3089 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3090 {
3091         struct MessageUnit_B *reg = acb->pmuB;
3092
3093         arcmsr_wait_firmware_ready(acb);
3094         writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3095         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3096                 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3097                 return false;
3098         }
3099         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3100         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3101                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3102                         miscellaneous data' timeout \n", acb->host->host_no);
3103                 return false;
3104         }
3105         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3106         return true;
3107 }
3108
3109 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3110 {
3111         uint32_t intmask_org;
3112         struct MessageUnit_C __iomem *reg = pACB->pmuC;
3113
3114         /* disable all outbound interrupt */
3115         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3116         writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3117         /* wait firmware ready */
3118         arcmsr_wait_firmware_ready(pACB);
3119         /* post "get config" instruction */
3120         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3121         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3122         /* wait message ready */
3123         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3124                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3125                         miscellaneous data' timeout \n", pACB->host->host_no);
3126                 return false;
3127         }
3128         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3129         return true;
3130 }
3131
3132 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3133 {
3134         struct MessageUnit_D *reg = acb->pmuD;
3135
3136         if (readl(acb->pmuD->outbound_doorbell) &
3137                 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3138                 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3139                         acb->pmuD->outbound_doorbell);/*clear interrupt*/
3140         }
3141         arcmsr_wait_firmware_ready(acb);
3142         /* post "get config" instruction */
3143         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3144         /* wait message ready */
3145         if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3146                 pr_notice("arcmsr%d: wait get adapter firmware "
3147                         "miscellaneous data timeout\n", acb->host->host_no);
3148                 return false;
3149         }
3150         arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3151         return true;
3152 }
3153
3154 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3155 {
3156         struct MessageUnit_E __iomem *reg = pACB->pmuE;
3157         uint32_t intmask_org;
3158
3159         /* disable all outbound interrupt */
3160         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3161         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3162         /* wait firmware ready */
3163         arcmsr_wait_firmware_ready(pACB);
3164         mdelay(20);
3165         /* post "get config" instruction */
3166         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3167
3168         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3169         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3170         /* wait message ready */
3171         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3172                 pr_notice("arcmsr%d: wait get adapter firmware "
3173                         "miscellaneous data timeout\n", pACB->host->host_no);
3174                 return false;
3175         }
3176         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3177         return true;
3178 }
3179
3180 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3181 {
3182         bool rtn = false;
3183
3184         switch (acb->adapter_type) {
3185         case ACB_ADAPTER_TYPE_A:
3186                 rtn = arcmsr_hbaA_get_config(acb);
3187                 break;
3188         case ACB_ADAPTER_TYPE_B:
3189                 rtn = arcmsr_hbaB_get_config(acb);
3190                 break;
3191         case ACB_ADAPTER_TYPE_C:
3192                 rtn = arcmsr_hbaC_get_config(acb);
3193                 break;
3194         case ACB_ADAPTER_TYPE_D:
3195                 rtn = arcmsr_hbaD_get_config(acb);
3196                 break;
3197         case ACB_ADAPTER_TYPE_E:
3198                 rtn = arcmsr_hbaE_get_config(acb);
3199                 break;
3200         default:
3201                 break;
3202         }
3203         acb->maxOutstanding = acb->firm_numbers_queue - 1;
3204         if (acb->host->can_queue >= acb->firm_numbers_queue)
3205                 acb->host->can_queue = acb->maxOutstanding;
3206         else
3207                 acb->maxOutstanding = acb->host->can_queue;
3208         acb->maxFreeCCB = acb->host->can_queue;
3209         if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3210                 acb->maxFreeCCB += 64;
3211         return rtn;
3212 }
3213
3214 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3215         struct CommandControlBlock *poll_ccb)
3216 {
3217         struct MessageUnit_A __iomem *reg = acb->pmuA;
3218         struct CommandControlBlock *ccb;
3219         struct ARCMSR_CDB *arcmsr_cdb;
3220         uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3221         int rtn;
3222         bool error;
3223         polling_hba_ccb_retry:
3224         poll_count++;
3225         outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
3226         writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
3227         while (1) {
3228                 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
3229                         if (poll_ccb_done){
3230                                 rtn = SUCCESS;
3231                                 break;
3232                         }else {
3233                                 msleep(25);
3234                                 if (poll_count > 100){
3235                                         rtn = FAILED;
3236                                         break;
3237                                 }
3238                                 goto polling_hba_ccb_retry;
3239                         }
3240                 }
3241                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3242                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3243                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3244                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3245                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3246                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3247                                         " poll command abort successfully \n"
3248                                         , acb->host->host_no
3249                                         , ccb->pcmd->device->id
3250                                         , (u32)ccb->pcmd->device->lun
3251                                         , ccb);
3252                                 ccb->pcmd->result = DID_ABORT << 16;
3253                                 arcmsr_ccb_complete(ccb);
3254                                 continue;
3255                         }
3256                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3257                                 " command done ccb = '0x%p'"
3258                                 "ccboutstandingcount = %d \n"
3259                                 , acb->host->host_no
3260                                 , ccb
3261                                 , atomic_read(&acb->ccboutstandingcount));
3262                         continue;
3263                 }
3264                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3265                 arcmsr_report_ccb_state(acb, ccb, error);
3266         }
3267         return rtn;
3268 }
3269
3270 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3271                                         struct CommandControlBlock *poll_ccb)
3272 {
3273         struct MessageUnit_B *reg = acb->pmuB;
3274         struct ARCMSR_CDB *arcmsr_cdb;
3275         struct CommandControlBlock *ccb;
3276         uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3277         int index, rtn;
3278         bool error;
3279         polling_hbb_ccb_retry:
3280
3281         poll_count++;
3282         /* clear doorbell interrupt */
3283         writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3284         while(1){
3285                 index = reg->doneq_index;
3286                 flag_ccb = reg->done_qbuffer[index];
3287                 if (flag_ccb == 0) {
3288                         if (poll_ccb_done){
3289                                 rtn = SUCCESS;
3290                                 break;
3291                         }else {
3292                                 msleep(25);
3293                                 if (poll_count > 100){
3294                                         rtn = FAILED;
3295                                         break;
3296                                 }
3297                                 goto polling_hbb_ccb_retry;
3298                         }
3299                 }
3300                 reg->done_qbuffer[index] = 0;
3301                 index++;
3302                 /*if last index number set it to 0 */
3303                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3304                 reg->doneq_index = index;
3305                 /* check if command done with no error*/
3306                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3307                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3308                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3309                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3310                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3311                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3312                                         " poll command abort successfully \n"
3313                                         ,acb->host->host_no
3314                                         ,ccb->pcmd->device->id
3315                                         ,(u32)ccb->pcmd->device->lun
3316                                         ,ccb);
3317                                 ccb->pcmd->result = DID_ABORT << 16;
3318                                 arcmsr_ccb_complete(ccb);
3319                                 continue;
3320                         }
3321                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3322                                 " command done ccb = '0x%p'"
3323                                 "ccboutstandingcount = %d \n"
3324                                 , acb->host->host_no
3325                                 , ccb
3326                                 , atomic_read(&acb->ccboutstandingcount));
3327                         continue;
3328                 }
3329                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3330                 arcmsr_report_ccb_state(acb, ccb, error);
3331         }
3332         return rtn;
3333 }
3334
3335 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3336                 struct CommandControlBlock *poll_ccb)
3337 {
3338         struct MessageUnit_C __iomem *reg = acb->pmuC;
3339         uint32_t flag_ccb, ccb_cdb_phy;
3340         struct ARCMSR_CDB *arcmsr_cdb;
3341         bool error;
3342         struct CommandControlBlock *pCCB;
3343         uint32_t poll_ccb_done = 0, poll_count = 0;
3344         int rtn;
3345 polling_hbc_ccb_retry:
3346         poll_count++;
3347         while (1) {
3348                 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3349                         if (poll_ccb_done) {
3350                                 rtn = SUCCESS;
3351                                 break;
3352                         } else {
3353                                 msleep(25);
3354                                 if (poll_count > 100) {
3355                                         rtn = FAILED;
3356                                         break;
3357                                 }
3358                                 goto polling_hbc_ccb_retry;
3359                         }
3360                 }
3361                 flag_ccb = readl(&reg->outbound_queueport_low);
3362                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3363                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
3364                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3365                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3366                 /* check ifcommand done with no error*/
3367                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3368                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3369                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3370                                         " poll command abort successfully \n"
3371                                         , acb->host->host_no
3372                                         , pCCB->pcmd->device->id
3373                                         , (u32)pCCB->pcmd->device->lun
3374                                         , pCCB);
3375                                         pCCB->pcmd->result = DID_ABORT << 16;
3376                                         arcmsr_ccb_complete(pCCB);
3377                                 continue;
3378                         }
3379                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3380                                 " command done ccb = '0x%p'"
3381                                 "ccboutstandingcount = %d \n"
3382                                 , acb->host->host_no
3383                                 , pCCB
3384                                 , atomic_read(&acb->ccboutstandingcount));
3385                         continue;
3386                 }
3387                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3388                 arcmsr_report_ccb_state(acb, pCCB, error);
3389         }
3390         return rtn;
3391 }
3392
3393 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3394                                 struct CommandControlBlock *poll_ccb)
3395 {
3396         bool error;
3397         uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy;
3398         int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3399         unsigned long flags;
3400         struct ARCMSR_CDB *arcmsr_cdb;
3401         struct CommandControlBlock *pCCB;
3402         struct MessageUnit_D *pmu = acb->pmuD;
3403
3404 polling_hbaD_ccb_retry:
3405         poll_count++;
3406         while (1) {
3407                 spin_lock_irqsave(&acb->doneq_lock, flags);
3408                 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3409                 doneq_index = pmu->doneq_index;
3410                 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3411                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3412                         if (poll_ccb_done) {
3413                                 rtn = SUCCESS;
3414                                 break;
3415                         } else {
3416                                 msleep(25);
3417                                 if (poll_count > 40) {
3418                                         rtn = FAILED;
3419                                         break;
3420                                 }
3421                                 goto polling_hbaD_ccb_retry;
3422                         }
3423                 }
3424                 toggle = doneq_index & 0x4000;
3425                 index_stripped = (doneq_index & 0xFFF) + 1;
3426                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3427                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3428                                 ((toggle ^ 0x4000) + 1);
3429                 doneq_index = pmu->doneq_index;
3430                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3431                 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3432                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3433                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3434                         ccb_cdb_phy);
3435                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3436                         arcmsr_cdb);
3437                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3438                 if ((pCCB->acb != acb) ||
3439                         (pCCB->startdone != ARCMSR_CCB_START)) {
3440                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3441                                 pr_notice("arcmsr%d: scsi id = %d "
3442                                         "lun = %d ccb = '0x%p' poll command "
3443                                         "abort successfully\n"
3444                                         , acb->host->host_no
3445                                         , pCCB->pcmd->device->id
3446                                         , (u32)pCCB->pcmd->device->lun
3447                                         , pCCB);
3448                                 pCCB->pcmd->result = DID_ABORT << 16;
3449                                 arcmsr_ccb_complete(pCCB);
3450                                 continue;
3451                         }
3452                         pr_notice("arcmsr%d: polling an illegal "
3453                                 "ccb command done ccb = '0x%p' "
3454                                 "ccboutstandingcount = %d\n"
3455                                 , acb->host->host_no
3456                                 , pCCB
3457                                 , atomic_read(&acb->ccboutstandingcount));
3458                         continue;
3459                 }
3460                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3461                         ? true : false;
3462                 arcmsr_report_ccb_state(acb, pCCB, error);
3463         }
3464         return rtn;
3465 }
3466
3467 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3468                                 struct CommandControlBlock *poll_ccb)
3469 {
3470         bool error;
3471         uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3472         uint16_t cmdSMID;
3473         unsigned long flags;
3474         int rtn;
3475         struct CommandControlBlock *pCCB;
3476         struct MessageUnit_E __iomem *reg = acb->pmuE;
3477
3478         polling_hbaC_ccb_retry:
3479         poll_count++;
3480         while (1) {
3481                 spin_lock_irqsave(&acb->doneq_lock, flags);
3482                 doneq_index = acb->doneq_index;
3483                 if ((readl(&reg->reply_post_producer_index) & 0xFFFF) ==
3484                                 doneq_index) {
3485                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3486                         if (poll_ccb_done) {
3487                                 rtn = SUCCESS;
3488                                 break;
3489                         } else {
3490                                 msleep(25);
3491                                 if (poll_count > 40) {
3492                                         rtn = FAILED;
3493                                         break;
3494                                 }
3495                                 goto polling_hbaC_ccb_retry;
3496                         }
3497                 }
3498                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3499                 doneq_index++;
3500                 if (doneq_index >= acb->completionQ_entry)
3501                         doneq_index = 0;
3502                 acb->doneq_index = doneq_index;
3503                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3504                 pCCB = acb->pccb_pool[cmdSMID];
3505                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3506                 /* check if command done with no error*/
3507                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3508                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3509                                 pr_notice("arcmsr%d: scsi id = %d "
3510                                         "lun = %d ccb = '0x%p' poll command "
3511                                         "abort successfully\n"
3512                                         , acb->host->host_no
3513                                         , pCCB->pcmd->device->id
3514                                         , (u32)pCCB->pcmd->device->lun
3515                                         , pCCB);
3516                                 pCCB->pcmd->result = DID_ABORT << 16;
3517                                 arcmsr_ccb_complete(pCCB);
3518                                 continue;
3519                         }
3520                         pr_notice("arcmsr%d: polling an illegal "
3521                                 "ccb command done ccb = '0x%p' "
3522                                 "ccboutstandingcount = %d\n"
3523                                 , acb->host->host_no
3524                                 , pCCB
3525                                 , atomic_read(&acb->ccboutstandingcount));
3526                         continue;
3527                 }
3528                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3529                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3530                 arcmsr_report_ccb_state(acb, pCCB, error);
3531         }
3532         writel(doneq_index, &reg->reply_post_consumer_index);
3533         return rtn;
3534 }
3535
3536 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3537                                         struct CommandControlBlock *poll_ccb)
3538 {
3539         int rtn = 0;
3540         switch (acb->adapter_type) {
3541
3542         case ACB_ADAPTER_TYPE_A: {
3543                 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3544                 }
3545                 break;
3546
3547         case ACB_ADAPTER_TYPE_B: {
3548                 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3549                 }
3550                 break;
3551         case ACB_ADAPTER_TYPE_C: {
3552                 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3553                 }
3554                 break;
3555         case ACB_ADAPTER_TYPE_D:
3556                 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3557                 break;
3558         case ACB_ADAPTER_TYPE_E:
3559                 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3560                 break;
3561         }
3562         return rtn;
3563 }
3564
3565 static void arcmsr_set_iop_datetime(struct timer_list *t)
3566 {
3567         struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3568         unsigned int next_time;
3569         struct tm tm;
3570
3571         union {
3572                 struct  {
3573                 uint16_t        signature;
3574                 uint8_t         year;
3575                 uint8_t         month;
3576                 uint8_t         date;
3577                 uint8_t         hour;
3578                 uint8_t         minute;
3579                 uint8_t         second;
3580                 } a;
3581                 struct  {
3582                 uint32_t        msg_time[2];
3583                 } b;
3584         } datetime;
3585
3586         time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3587
3588         datetime.a.signature = 0x55AA;
3589         datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3590         datetime.a.month = tm.tm_mon;
3591         datetime.a.date = tm.tm_mday;
3592         datetime.a.hour = tm.tm_hour;
3593         datetime.a.minute = tm.tm_min;
3594         datetime.a.second = tm.tm_sec;
3595
3596         switch (pacb->adapter_type) {
3597                 case ACB_ADAPTER_TYPE_A: {
3598                         struct MessageUnit_A __iomem *reg = pacb->pmuA;
3599                         writel(datetime.b.msg_time[0], &reg->message_rwbuffer[0]);
3600                         writel(datetime.b.msg_time[1], &reg->message_rwbuffer[1]);
3601                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3602                         break;
3603                 }
3604                 case ACB_ADAPTER_TYPE_B: {
3605                         uint32_t __iomem *rwbuffer;
3606                         struct MessageUnit_B *reg = pacb->pmuB;
3607                         rwbuffer = reg->message_rwbuffer;
3608                         writel(datetime.b.msg_time[0], rwbuffer++);
3609                         writel(datetime.b.msg_time[1], rwbuffer++);
3610                         writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3611                         break;
3612                 }
3613                 case ACB_ADAPTER_TYPE_C: {
3614                         struct MessageUnit_C __iomem *reg = pacb->pmuC;
3615                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3616                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3617                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3618                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3619                         break;
3620                 }
3621                 case ACB_ADAPTER_TYPE_D: {
3622                         uint32_t __iomem *rwbuffer;
3623                         struct MessageUnit_D *reg = pacb->pmuD;
3624                         rwbuffer = reg->msgcode_rwbuffer;
3625                         writel(datetime.b.msg_time[0], rwbuffer++);
3626                         writel(datetime.b.msg_time[1], rwbuffer++);
3627                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3628                         break;
3629                 }
3630                 case ACB_ADAPTER_TYPE_E: {
3631                         struct MessageUnit_E __iomem *reg = pacb->pmuE;
3632                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3633                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3634                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3635                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3636                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3637                         break;
3638                 }
3639         }
3640         if (sys_tz.tz_minuteswest)
3641                 next_time = ARCMSR_HOURS;
3642         else
3643                 next_time = ARCMSR_MINUTES;
3644         mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
3645 }
3646
3647 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3648 {
3649         uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3650         dma_addr_t dma_coherent_handle;
3651
3652         /*
3653         ********************************************************************
3654         ** here we need to tell iop 331 our freeccb.HighPart
3655         ** if freeccb.HighPart is not zero
3656         ********************************************************************
3657         */
3658         switch (acb->adapter_type) {
3659         case ACB_ADAPTER_TYPE_B:
3660         case ACB_ADAPTER_TYPE_D:
3661                 dma_coherent_handle = acb->dma_coherent_handle2;
3662                 break;
3663         case ACB_ADAPTER_TYPE_E:
3664                 dma_coherent_handle = acb->dma_coherent_handle +
3665                         offsetof(struct CommandControlBlock, arcmsr_cdb);
3666                 break;
3667         default:
3668                 dma_coherent_handle = acb->dma_coherent_handle;
3669                 break;
3670         }
3671         cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3672         cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3673         acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3674         /*
3675         ***********************************************************************
3676         **    if adapter type B, set window of "post command Q"
3677         ***********************************************************************
3678         */
3679         switch (acb->adapter_type) {
3680
3681         case ACB_ADAPTER_TYPE_A: {
3682                 if (cdb_phyaddr_hi32 != 0) {
3683                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3684                         writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3685                                                 &reg->message_rwbuffer[0]);
3686                         writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
3687                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3688                                                         &reg->inbound_msgaddr0);
3689                         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3690                                 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3691                                 part physical address timeout\n",
3692                                 acb->host->host_no);
3693                                 return 1;
3694                         }
3695                 }
3696                 }
3697                 break;
3698
3699         case ACB_ADAPTER_TYPE_B: {
3700                 uint32_t __iomem *rwbuffer;
3701
3702                 struct MessageUnit_B *reg = acb->pmuB;
3703                 reg->postq_index = 0;
3704                 reg->doneq_index = 0;
3705                 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
3706                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3707                         printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
3708                                 acb->host->host_no);
3709                         return 1;
3710                 }
3711                 rwbuffer = reg->message_rwbuffer;
3712                 /* driver "set config" signature */
3713                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3714                 /* normal should be zero */
3715                 writel(cdb_phyaddr_hi32, rwbuffer++);
3716                 /* postQ size (256 + 8)*4        */
3717                 writel(cdb_phyaddr, rwbuffer++);
3718                 /* doneQ size (256 + 8)*4        */
3719                 writel(cdb_phyaddr + 1056, rwbuffer++);
3720                 /* ccb maxQ size must be --> [(256 + 8)*4]*/
3721                 writel(1056, rwbuffer);
3722
3723                 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
3724                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3725                         printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3726                         timeout \n",acb->host->host_no);
3727                         return 1;
3728                 }
3729                 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3730                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3731                         pr_err("arcmsr%d: can't set driver mode.\n",
3732                                 acb->host->host_no);
3733                         return 1;
3734                 }
3735                 }
3736                 break;
3737         case ACB_ADAPTER_TYPE_C: {
3738                 if (cdb_phyaddr_hi32 != 0) {
3739                         struct MessageUnit_C __iomem *reg = acb->pmuC;
3740
3741                         printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
3742                                         acb->adapter_index, cdb_phyaddr_hi32);
3743                         writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3744                         writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
3745                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3746                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3747                         if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
3748                                 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3749                                 timeout \n", acb->host->host_no);
3750                                 return 1;
3751                         }
3752                 }
3753                 }
3754                 break;
3755         case ACB_ADAPTER_TYPE_D: {
3756                 uint32_t __iomem *rwbuffer;
3757                 struct MessageUnit_D *reg = acb->pmuD;
3758                 reg->postq_index = 0;
3759                 reg->doneq_index = 0;
3760                 rwbuffer = reg->msgcode_rwbuffer;
3761                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3762                 writel(cdb_phyaddr_hi32, rwbuffer++);
3763                 writel(cdb_phyaddr, rwbuffer++);
3764                 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
3765                         sizeof(struct InBound_SRB)), rwbuffer++);
3766                 writel(0x100, rwbuffer);
3767                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
3768                 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3769                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
3770                                 acb->host->host_no);
3771                         return 1;
3772                 }
3773                 }
3774                 break;
3775         case ACB_ADAPTER_TYPE_E: {
3776                 struct MessageUnit_E __iomem *reg = acb->pmuE;
3777                 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3778                 writel(ARCMSR_SIGNATURE_1884, &reg->msgcode_rwbuffer[1]);
3779                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
3780                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
3781                 writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
3782                 dma_coherent_handle = acb->dma_coherent_handle2;
3783                 cdb_phyaddr = (uint32_t)(dma_coherent_handle & 0xffffffff);
3784                 cdb_phyaddr_hi32 = (uint32_t)((dma_coherent_handle >> 16) >> 16);
3785                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[5]);
3786                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[6]);
3787                 writel(acb->roundup_ccbsize, &reg->msgcode_rwbuffer[7]);
3788                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3789                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3790                 writel(acb->out_doorbell, &reg->iobound_doorbell);
3791                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
3792                         pr_notice("arcmsr%d: 'set command Q window' timeout \n",
3793                                 acb->host->host_no);
3794                         return 1;
3795                 }
3796                 }
3797                 break;
3798         }
3799         return 0;
3800 }
3801
3802 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
3803 {
3804         uint32_t firmware_state = 0;
3805         switch (acb->adapter_type) {
3806
3807         case ACB_ADAPTER_TYPE_A: {
3808                 struct MessageUnit_A __iomem *reg = acb->pmuA;
3809                 do {
3810                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3811                                 msleep(20);
3812                         firmware_state = readl(&reg->outbound_msgaddr1);
3813                 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
3814                 }
3815                 break;
3816
3817         case ACB_ADAPTER_TYPE_B: {
3818                 struct MessageUnit_B *reg = acb->pmuB;
3819                 do {
3820                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3821                                 msleep(20);
3822                         firmware_state = readl(reg->iop2drv_doorbell);
3823                 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
3824                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
3825                 }
3826                 break;
3827         case ACB_ADAPTER_TYPE_C: {
3828                 struct MessageUnit_C __iomem *reg = acb->pmuC;
3829                 do {
3830                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3831                                 msleep(20);
3832                         firmware_state = readl(&reg->outbound_msgaddr1);
3833                 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
3834                 }
3835                 break;
3836         case ACB_ADAPTER_TYPE_D: {
3837                 struct MessageUnit_D *reg = acb->pmuD;
3838                 do {
3839                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3840                                 msleep(20);
3841                         firmware_state = readl(reg->outbound_msgaddr1);
3842                 } while ((firmware_state &
3843                         ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
3844                 }
3845                 break;
3846         case ACB_ADAPTER_TYPE_E: {
3847                 struct MessageUnit_E __iomem *reg = acb->pmuE;
3848                 do {
3849                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3850                                 msleep(20);
3851                         firmware_state = readl(&reg->outbound_msgaddr1);
3852                 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
3853                 }
3854                 break;
3855         }
3856 }
3857
3858 static void arcmsr_request_device_map(struct timer_list *t)
3859 {
3860         struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
3861         if (unlikely(atomic_read(&acb->rq_map_token) == 0) ||
3862                 (acb->acb_flags & ACB_F_BUS_RESET) ||
3863                 (acb->acb_flags & ACB_F_ABORT)) {
3864                 mod_timer(&acb->eternal_timer,
3865                         jiffies + msecs_to_jiffies(6 * HZ));
3866         } else {
3867                 acb->fw_flag = FW_NORMAL;
3868                 if (atomic_read(&acb->ante_token_value) ==
3869                         atomic_read(&acb->rq_map_token)) {
3870                         atomic_set(&acb->rq_map_token, 16);
3871                 }
3872                 atomic_set(&acb->ante_token_value,
3873                         atomic_read(&acb->rq_map_token));
3874                 if (atomic_dec_and_test(&acb->rq_map_token)) {
3875                         mod_timer(&acb->eternal_timer, jiffies +
3876                                 msecs_to_jiffies(6 * HZ));
3877                         return;
3878                 }
3879                 switch (acb->adapter_type) {
3880                 case ACB_ADAPTER_TYPE_A: {
3881                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3882                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3883                         break;
3884                         }
3885                 case ACB_ADAPTER_TYPE_B: {
3886                         struct MessageUnit_B *reg = acb->pmuB;
3887                         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3888                         break;
3889                         }
3890                 case ACB_ADAPTER_TYPE_C: {
3891                         struct MessageUnit_C __iomem *reg = acb->pmuC;
3892                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3893                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3894                         break;
3895                         }
3896                 case ACB_ADAPTER_TYPE_D: {
3897                         struct MessageUnit_D *reg = acb->pmuD;
3898                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3899                         break;
3900                         }
3901                 case ACB_ADAPTER_TYPE_E: {
3902                         struct MessageUnit_E __iomem *reg = acb->pmuE;
3903                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3904                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3905                         writel(acb->out_doorbell, &reg->iobound_doorbell);
3906                         break;
3907                         }
3908                 default:
3909                         return;
3910                 }
3911                 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
3912                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3913         }
3914 }
3915
3916 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
3917 {
3918         struct MessageUnit_A __iomem *reg = acb->pmuA;
3919         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3920         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
3921         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3922                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3923                                 rebulid' timeout \n", acb->host->host_no);
3924         }
3925 }
3926
3927 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
3928 {
3929         struct MessageUnit_B *reg = acb->pmuB;
3930         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3931         writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
3932         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3933                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3934                                 rebulid' timeout \n",acb->host->host_no);
3935         }
3936 }
3937
3938 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
3939 {
3940         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
3941         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3942         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
3943         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
3944         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3945                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3946                                 rebulid' timeout \n", pACB->host->host_no);
3947         }
3948         return;
3949 }
3950
3951 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
3952 {
3953         struct MessageUnit_D *pmu = pACB->pmuD;
3954
3955         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3956         writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
3957         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
3958                 pr_notice("arcmsr%d: wait 'start adapter "
3959                         "background rebulid' timeout\n", pACB->host->host_no);
3960         }
3961 }
3962
3963 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
3964 {
3965         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
3966
3967         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3968         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
3969         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3970         writel(pACB->out_doorbell, &pmu->iobound_doorbell);
3971         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3972                 pr_notice("arcmsr%d: wait 'start adapter "
3973                         "background rebulid' timeout \n", pACB->host->host_no);
3974         }
3975 }
3976
3977 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
3978 {
3979         switch (acb->adapter_type) {
3980         case ACB_ADAPTER_TYPE_A:
3981                 arcmsr_hbaA_start_bgrb(acb);
3982                 break;
3983         case ACB_ADAPTER_TYPE_B:
3984                 arcmsr_hbaB_start_bgrb(acb);
3985                 break;
3986         case ACB_ADAPTER_TYPE_C:
3987                 arcmsr_hbaC_start_bgrb(acb);
3988                 break;
3989         case ACB_ADAPTER_TYPE_D:
3990                 arcmsr_hbaD_start_bgrb(acb);
3991                 break;
3992         case ACB_ADAPTER_TYPE_E:
3993                 arcmsr_hbaE_start_bgrb(acb);
3994                 break;
3995         }
3996 }
3997
3998 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
3999 {
4000         switch (acb->adapter_type) {
4001         case ACB_ADAPTER_TYPE_A: {
4002                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4003                 uint32_t outbound_doorbell;
4004                 /* empty doorbell Qbuffer if door bell ringed */
4005                 outbound_doorbell = readl(&reg->outbound_doorbell);
4006                 /*clear doorbell interrupt */
4007                 writel(outbound_doorbell, &reg->outbound_doorbell);
4008                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
4009                 }
4010                 break;
4011
4012         case ACB_ADAPTER_TYPE_B: {
4013                 struct MessageUnit_B *reg = acb->pmuB;
4014                 uint32_t outbound_doorbell, i;
4015                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4016                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4017                 /* let IOP know data has been read */
4018                 for(i=0; i < 200; i++) {
4019                         msleep(20);
4020                         outbound_doorbell = readl(reg->iop2drv_doorbell);
4021                         if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4022                                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4023                                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4024                         } else
4025                                 break;
4026                 }
4027                 }
4028                 break;
4029         case ACB_ADAPTER_TYPE_C: {
4030                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4031                 uint32_t outbound_doorbell, i;
4032                 /* empty doorbell Qbuffer if door bell ringed */
4033                 outbound_doorbell = readl(&reg->outbound_doorbell);
4034                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
4035                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
4036                 for (i = 0; i < 200; i++) {
4037                         msleep(20);
4038                         outbound_doorbell = readl(&reg->outbound_doorbell);
4039                         if (outbound_doorbell &
4040                                 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4041                                 writel(outbound_doorbell,
4042                                         &reg->outbound_doorbell_clear);
4043                                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4044                                         &reg->inbound_doorbell);
4045                         } else
4046                                 break;
4047                 }
4048                 }
4049                 break;
4050         case ACB_ADAPTER_TYPE_D: {
4051                 struct MessageUnit_D *reg = acb->pmuD;
4052                 uint32_t outbound_doorbell, i;
4053                 /* empty doorbell Qbuffer if door bell ringed */
4054                 outbound_doorbell = readl(reg->outbound_doorbell);
4055                 writel(outbound_doorbell, reg->outbound_doorbell);
4056                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4057                         reg->inbound_doorbell);
4058                 for (i = 0; i < 200; i++) {
4059                         msleep(20);
4060                         outbound_doorbell = readl(reg->outbound_doorbell);
4061                         if (outbound_doorbell &
4062                                 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4063                                 writel(outbound_doorbell,
4064                                         reg->outbound_doorbell);
4065                                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4066                                         reg->inbound_doorbell);
4067                         } else
4068                                 break;
4069                 }
4070                 }
4071                 break;
4072         case ACB_ADAPTER_TYPE_E: {
4073                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4074                 uint32_t i, tmp;
4075
4076                 acb->in_doorbell = readl(&reg->iobound_doorbell);
4077                 writel(0, &reg->host_int_status); /*clear interrupt*/
4078                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4079                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4080                 for(i=0; i < 200; i++) {
4081                         msleep(20);
4082                         tmp = acb->in_doorbell;
4083                         acb->in_doorbell = readl(&reg->iobound_doorbell);
4084                         if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4085                                 writel(0, &reg->host_int_status); /*clear interrupt*/
4086                                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4087                                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4088                         } else
4089                                 break;
4090                 }
4091                 }
4092                 break;
4093         }
4094 }
4095
4096 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4097 {
4098         switch (acb->adapter_type) {
4099         case ACB_ADAPTER_TYPE_A:
4100                 return;
4101         case ACB_ADAPTER_TYPE_B:
4102                 {
4103                         struct MessageUnit_B *reg = acb->pmuB;
4104                         writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4105                         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4106                                 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4107                                 return;
4108                         }
4109                 }
4110                 break;
4111         case ACB_ADAPTER_TYPE_C:
4112                 return;
4113         }
4114         return;
4115 }
4116
4117 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4118 {
4119         uint8_t value[64];
4120         int i, count = 0;
4121         struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4122         struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4123         struct MessageUnit_D *pmuD = acb->pmuD;
4124
4125         /* backup pci config data */
4126         printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4127         for (i = 0; i < 64; i++) {
4128                 pci_read_config_byte(acb->pdev, i, &value[i]);
4129         }
4130         /* hardware reset signal */
4131         if ((acb->dev_id == 0x1680)) {
4132                 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4133         } else if ((acb->dev_id == 0x1880)) {
4134                 do {
4135                         count++;
4136                         writel(0xF, &pmuC->write_sequence);
4137                         writel(0x4, &pmuC->write_sequence);
4138                         writel(0xB, &pmuC->write_sequence);
4139                         writel(0x2, &pmuC->write_sequence);
4140                         writel(0x7, &pmuC->write_sequence);
4141                         writel(0xD, &pmuC->write_sequence);
4142                 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4143                 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4144         } else if (acb->dev_id == 0x1884) {
4145                 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4146                 do {
4147                         count++;
4148                         writel(0x4, &pmuE->write_sequence_3xxx);
4149                         writel(0xB, &pmuE->write_sequence_3xxx);
4150                         writel(0x2, &pmuE->write_sequence_3xxx);
4151                         writel(0x7, &pmuE->write_sequence_3xxx);
4152                         writel(0xD, &pmuE->write_sequence_3xxx);
4153                         mdelay(10);
4154                 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4155                         ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4156                 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4157         } else if ((acb->dev_id == 0x1214)) {
4158                 writel(0x20, pmuD->reset_request);
4159         } else {
4160                 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4161         }
4162         msleep(2000);
4163         /* write back pci config data */
4164         for (i = 0; i < 64; i++) {
4165                 pci_write_config_byte(acb->pdev, i, value[i]);
4166         }
4167         msleep(1000);
4168         return;
4169 }
4170
4171 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4172 {
4173         bool rtn = true;
4174
4175         switch(acb->adapter_type) {
4176         case ACB_ADAPTER_TYPE_A:{
4177                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4178                 rtn = ((readl(&reg->outbound_msgaddr1) &
4179                         ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4180                 }
4181                 break;
4182         case ACB_ADAPTER_TYPE_B:{
4183                 struct MessageUnit_B *reg = acb->pmuB;
4184                 rtn = ((readl(reg->iop2drv_doorbell) &
4185                         ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4186                 }
4187                 break;
4188         case ACB_ADAPTER_TYPE_C:{
4189                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4190                 rtn = (readl(&reg->host_diagnostic) & 0x04) ? true : false;
4191                 }
4192                 break;
4193         case ACB_ADAPTER_TYPE_D:{
4194                 struct MessageUnit_D *reg = acb->pmuD;
4195                 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4196                         true : false;
4197                 }
4198                 break;
4199         case ACB_ADAPTER_TYPE_E:{
4200                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4201                 rtn = (readl(&reg->host_diagnostic_3xxx) &
4202                         ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4203                 }
4204                 break;
4205         }
4206         return rtn;
4207 }
4208
4209 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4210 {
4211         uint32_t intmask_org;
4212         /* disable all outbound interrupt */
4213         intmask_org = arcmsr_disable_outbound_ints(acb);
4214         arcmsr_wait_firmware_ready(acb);
4215         arcmsr_iop_confirm(acb);
4216         /*start background rebuild*/
4217         arcmsr_start_adapter_bgrb(acb);
4218         /* empty doorbell Qbuffer if door bell ringed */
4219         arcmsr_clear_doorbell_queue_buffer(acb);
4220         arcmsr_enable_eoi_mode(acb);
4221         /* enable outbound Post Queue,outbound doorbell Interrupt */
4222         arcmsr_enable_outbound_ints(acb, intmask_org);
4223         acb->acb_flags |= ACB_F_IOP_INITED;
4224 }
4225
4226 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4227 {
4228         struct CommandControlBlock *ccb;
4229         uint32_t intmask_org;
4230         uint8_t rtnval = 0x00;
4231         int i = 0;
4232         unsigned long flags;
4233
4234         if (atomic_read(&acb->ccboutstandingcount) != 0) {
4235                 /* disable all outbound interrupt */
4236                 intmask_org = arcmsr_disable_outbound_ints(acb);
4237                 /* talk to iop 331 outstanding command aborted */
4238                 rtnval = arcmsr_abort_allcmd(acb);
4239                 /* clear all outbound posted Q */
4240                 arcmsr_done4abort_postqueue(acb);
4241                 for (i = 0; i < acb->maxFreeCCB; i++) {
4242                         ccb = acb->pccb_pool[i];
4243                         if (ccb->startdone == ARCMSR_CCB_START) {
4244                                 scsi_dma_unmap(ccb->pcmd);
4245                                 ccb->startdone = ARCMSR_CCB_DONE;
4246                                 ccb->ccb_flags = 0;
4247                                 spin_lock_irqsave(&acb->ccblist_lock, flags);
4248                                 list_add_tail(&ccb->list, &acb->ccb_free_list);
4249                                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4250                         }
4251                 }
4252                 atomic_set(&acb->ccboutstandingcount, 0);
4253                 /* enable all outbound interrupt */
4254                 arcmsr_enable_outbound_ints(acb, intmask_org);
4255                 return rtnval;
4256         }
4257         return rtnval;
4258 }
4259
4260 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4261 {
4262         struct AdapterControlBlock *acb;
4263         int retry_count = 0;
4264         int rtn = FAILED;
4265         acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4266         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4267                 return SUCCESS;
4268         pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4269                 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4270         acb->num_resets++;
4271
4272         if (acb->acb_flags & ACB_F_BUS_RESET) {
4273                 long timeout;
4274                 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4275                 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4276                         & ACB_F_BUS_RESET) == 0, 220 * HZ);
4277                 if (timeout)
4278                         return SUCCESS;
4279         }
4280         acb->acb_flags |= ACB_F_BUS_RESET;
4281         if (!arcmsr_iop_reset(acb)) {
4282                 arcmsr_hardware_reset(acb);
4283                 acb->acb_flags &= ~ACB_F_IOP_INITED;
4284 wait_reset_done:
4285                 ssleep(ARCMSR_SLEEPTIME);
4286                 if (arcmsr_reset_in_progress(acb)) {
4287                         if (retry_count > ARCMSR_RETRYCOUNT) {
4288                                 acb->fw_flag = FW_DEADLOCK;
4289                                 pr_notice("arcmsr%d: waiting for hw bus reset"
4290                                         " return, RETRY TERMINATED!!\n",
4291                                         acb->host->host_no);
4292                                 return FAILED;
4293                         }
4294                         retry_count++;
4295                         goto wait_reset_done;
4296                 }
4297                 arcmsr_iop_init(acb);
4298                 atomic_set(&acb->rq_map_token, 16);
4299                 atomic_set(&acb->ante_token_value, 16);
4300                 acb->fw_flag = FW_NORMAL;
4301                 mod_timer(&acb->eternal_timer, jiffies +
4302                         msecs_to_jiffies(6 * HZ));
4303                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4304                 rtn = SUCCESS;
4305                 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4306         } else {
4307                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4308                 atomic_set(&acb->rq_map_token, 16);
4309                 atomic_set(&acb->ante_token_value, 16);
4310                 acb->fw_flag = FW_NORMAL;
4311                 mod_timer(&acb->eternal_timer, jiffies +
4312                         msecs_to_jiffies(6 * HZ));
4313                 rtn = SUCCESS;
4314         }
4315         return rtn;
4316 }
4317
4318 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4319                 struct CommandControlBlock *ccb)
4320 {
4321         int rtn;
4322         rtn = arcmsr_polling_ccbdone(acb, ccb);
4323         return rtn;
4324 }
4325
4326 static int arcmsr_abort(struct scsi_cmnd *cmd)
4327 {
4328         struct AdapterControlBlock *acb =
4329                 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4330         int i = 0;
4331         int rtn = FAILED;
4332         uint32_t intmask_org;
4333
4334         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4335                 return SUCCESS;
4336         printk(KERN_NOTICE
4337                 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4338                 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4339         acb->acb_flags |= ACB_F_ABORT;
4340         acb->num_aborts++;
4341         /*
4342         ************************************************
4343         ** the all interrupt service routine is locked
4344         ** we need to handle it as soon as possible and exit
4345         ************************************************
4346         */
4347         if (!atomic_read(&acb->ccboutstandingcount)) {
4348                 acb->acb_flags &= ~ACB_F_ABORT;
4349                 return rtn;
4350         }
4351
4352         intmask_org = arcmsr_disable_outbound_ints(acb);
4353         for (i = 0; i < acb->maxFreeCCB; i++) {
4354                 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4355                 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4356                         ccb->startdone = ARCMSR_CCB_ABORTED;
4357                         rtn = arcmsr_abort_one_cmd(acb, ccb);
4358                         break;
4359                 }
4360         }
4361         acb->acb_flags &= ~ACB_F_ABORT;
4362         arcmsr_enable_outbound_ints(acb, intmask_org);
4363         return rtn;
4364 }
4365
4366 static const char *arcmsr_info(struct Scsi_Host *host)
4367 {
4368         struct AdapterControlBlock *acb =
4369                 (struct AdapterControlBlock *) host->hostdata;
4370         static char buf[256];
4371         char *type;
4372         int raid6 = 1;
4373         switch (acb->pdev->device) {
4374         case PCI_DEVICE_ID_ARECA_1110:
4375         case PCI_DEVICE_ID_ARECA_1200:
4376         case PCI_DEVICE_ID_ARECA_1202:
4377         case PCI_DEVICE_ID_ARECA_1210:
4378                 raid6 = 0;
4379                 /*FALLTHRU*/
4380         case PCI_DEVICE_ID_ARECA_1120:
4381         case PCI_DEVICE_ID_ARECA_1130:
4382         case PCI_DEVICE_ID_ARECA_1160:
4383         case PCI_DEVICE_ID_ARECA_1170:
4384         case PCI_DEVICE_ID_ARECA_1201:
4385         case PCI_DEVICE_ID_ARECA_1203:
4386         case PCI_DEVICE_ID_ARECA_1220:
4387         case PCI_DEVICE_ID_ARECA_1230:
4388         case PCI_DEVICE_ID_ARECA_1260:
4389         case PCI_DEVICE_ID_ARECA_1270:
4390         case PCI_DEVICE_ID_ARECA_1280:
4391                 type = "SATA";
4392                 break;
4393         case PCI_DEVICE_ID_ARECA_1214:
4394         case PCI_DEVICE_ID_ARECA_1380:
4395         case PCI_DEVICE_ID_ARECA_1381:
4396         case PCI_DEVICE_ID_ARECA_1680:
4397         case PCI_DEVICE_ID_ARECA_1681:
4398         case PCI_DEVICE_ID_ARECA_1880:
4399         case PCI_DEVICE_ID_ARECA_1884:
4400                 type = "SAS/SATA";
4401                 break;
4402         default:
4403                 type = "unknown";
4404                 raid6 = 0;
4405                 break;
4406         }
4407         sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4408                 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4409         return buf;
4410 }