drivers/scsi/arcmsr/arcmsr_hba.c

   1 /*
   2 *******************************************************************************
   3 **        O.S   : Linux
   4 **   FILE NAME  : arcmsr_hba.c
   5 **        BY    : Nick Cheng, C.L. Huang
   6 **   Description: SCSI RAID Device Driver for Areca RAID Controller
   7 *******************************************************************************
   8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
   9 **
  10 **     Web site: www.areca.com.tw
  11 **       E-mail: support@areca.com.tw
  12 **
  13 ** This program is free software; you can redistribute it and/or modify
  14 ** it under the terms of the GNU General Public License version 2 as
  15 ** published by the Free Software Foundation.
  16 ** This program is distributed in the hope that it will be useful,
  17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 ** GNU General Public License for more details.
  20 *******************************************************************************
  21 ** Redistribution and use in source and binary forms, with or without
  22 ** modification, are permitted provided that the following conditions
  23 ** are met:
  24 ** 1. Redistributions of source code must retain the above copyright
  25 **    notice, this list of conditions and the following disclaimer.
  26 ** 2. Redistributions in binary form must reproduce the above copyright
  27 **    notice, this list of conditions and the following disclaimer in the
  28 **    documentation and/or other materials provided with the distribution.
  29 ** 3. The name of the author may not be used to endorse or promote products
  30 **    derived from this software without specific prior written permission.
  31 **
  32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 *******************************************************************************
  43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  44 **     Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
  45 *******************************************************************************
  46 */
  47 #include <linux/module.h>
  48 #include <linux/reboot.h>
  49 #include <linux/spinlock.h>
  50 #include <linux/pci_ids.h>
  51 #include <linux/interrupt.h>
  52 #include <linux/moduleparam.h>
  53 #include <linux/errno.h>
  54 #include <linux/types.h>
  55 #include <linux/delay.h>
  56 #include <linux/dma-mapping.h>
  57 #include <linux/timer.h>
  58 #include <linux/slab.h>
  59 #include <linux/pci.h>
  60 #include <linux/aer.h>
  61 #include <linux/circ_buf.h>
  62 #include <asm/dma.h>
  63 #include <asm/io.h>
  64 #include <linux/uaccess.h>
  65 #include <scsi/scsi_host.h>
  66 #include <scsi/scsi.h>
  67 #include <scsi/scsi_cmnd.h>
  68 #include <scsi/scsi_tcq.h>
  69 #include <scsi/scsi_device.h>
  70 #include <scsi/scsi_transport.h>
  71 #include <scsi/scsicam.h>
  72 #include "arcmsr.h"
  73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
  74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
  75 MODULE_LICENSE("Dual BSD/GPL");
  76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  77
  78 static int msix_enable = 1;
  79 module_param(msix_enable, int, S_IRUGO);
  80 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
  81
  82 static int msi_enable = 1;
  83 module_param(msi_enable, int, S_IRUGO);
  84 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
  85
  86 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
  87 module_param(host_can_queue, int, S_IRUGO);
  88 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
  89
  90 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
  91 module_param(cmd_per_lun, int, S_IRUGO);
  92 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
  93
  94 static int set_date_time = 0;
  95 module_param(set_date_time, int, S_IRUGO);
  96 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
  97
  98 #define ARCMSR_SLEEPTIME        10
  99 #define ARCMSR_RETRYCOUNT       12
 100
 101 static wait_queue_head_t wait_q;
 102 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
 103                                         struct scsi_cmnd *cmd);
 104 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
 105 static int arcmsr_abort(struct scsi_cmnd *);
 106 static int arcmsr_bus_reset(struct scsi_cmnd *);
 107 static int arcmsr_bios_param(struct scsi_device *sdev,
 108                 struct block_device *bdev, sector_t capacity, int *info);
 109 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 110 static int arcmsr_probe(struct pci_dev *pdev,
 111                                 const struct pci_device_id *id);
 112 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
 113 static int arcmsr_resume(struct pci_dev *pdev);
 114 static void arcmsr_remove(struct pci_dev *pdev);
 115 static void arcmsr_shutdown(struct pci_dev *pdev);
 116 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
 117 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
 118 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
 119 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
 120         u32 intmask_org);
 121 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
 122 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
 123 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
 124 static void arcmsr_request_device_map(struct timer_list *t);
 125 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
 126 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
 127 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
 128 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
 129 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
 130 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
 131 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
 132 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
 133 static const char *arcmsr_info(struct Scsi_Host *);
 134 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
 135 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
 136 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
 137 static void arcmsr_set_iop_datetime(struct timer_list *);
 138 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
 139 {
 140         if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
 141                 queue_depth = ARCMSR_MAX_CMD_PERLUN;
 142         return scsi_change_queue_depth(sdev, queue_depth);
 143 }
 144
 145 static struct scsi_host_template arcmsr_scsi_host_template = {
 146         .module                 = THIS_MODULE,
 147         .name                   = "Areca SAS/SATA RAID driver",
 148         .info                   = arcmsr_info,
 149         .queuecommand           = arcmsr_queue_command,
 150         .eh_abort_handler       = arcmsr_abort,
 151         .eh_bus_reset_handler   = arcmsr_bus_reset,
 152         .bios_param             = arcmsr_bios_param,
 153         .change_queue_depth     = arcmsr_adjust_disk_queue_depth,
 154         .can_queue              = ARCMSR_DEFAULT_OUTSTANDING_CMD,
 155         .this_id                = ARCMSR_SCSI_INITIATOR_ID,
 156         .sg_tablesize           = ARCMSR_DEFAULT_SG_ENTRIES,
 157         .max_sectors            = ARCMSR_MAX_XFER_SECTORS_C,
 158         .cmd_per_lun            = ARCMSR_DEFAULT_CMD_PERLUN,
 159         .shost_attrs            = arcmsr_host_attrs,
 160         .no_write_same          = 1,
 161 };
 162
 163 static struct pci_device_id arcmsr_device_id_table[] = {
 164         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
 165                 .driver_data = ACB_ADAPTER_TYPE_A},
 166         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
 167                 .driver_data = ACB_ADAPTER_TYPE_A},
 168         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
 169                 .driver_data = ACB_ADAPTER_TYPE_A},
 170         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
 171                 .driver_data = ACB_ADAPTER_TYPE_A},
 172         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
 173                 .driver_data = ACB_ADAPTER_TYPE_A},
 174         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
 175                 .driver_data = ACB_ADAPTER_TYPE_B},
 176         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
 177                 .driver_data = ACB_ADAPTER_TYPE_B},
 178         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
 179                 .driver_data = ACB_ADAPTER_TYPE_B},
 180         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
 181                 .driver_data = ACB_ADAPTER_TYPE_B},
 182         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
 183                 .driver_data = ACB_ADAPTER_TYPE_A},
 184         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
 185                 .driver_data = ACB_ADAPTER_TYPE_D},
 186         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
 187                 .driver_data = ACB_ADAPTER_TYPE_A},
 188         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
 189                 .driver_data = ACB_ADAPTER_TYPE_A},
 190         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
 191                 .driver_data = ACB_ADAPTER_TYPE_A},
 192         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
 193                 .driver_data = ACB_ADAPTER_TYPE_A},
 194         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
 195                 .driver_data = ACB_ADAPTER_TYPE_A},
 196         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
 197                 .driver_data = ACB_ADAPTER_TYPE_A},
 198         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
 199                 .driver_data = ACB_ADAPTER_TYPE_A},
 200         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
 201                 .driver_data = ACB_ADAPTER_TYPE_A},
 202         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
 203                 .driver_data = ACB_ADAPTER_TYPE_A},
 204         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
 205                 .driver_data = ACB_ADAPTER_TYPE_C},
 206         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
 207                 .driver_data = ACB_ADAPTER_TYPE_E},
 208         {0, 0}, /* Terminating entry */
 209 };
 210 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
 211
 212 static struct pci_driver arcmsr_pci_driver = {
 213         .name                   = "arcmsr",
 214         .id_table               = arcmsr_device_id_table,
 215         .probe                  = arcmsr_probe,
 216         .remove                 = arcmsr_remove,
 217         .suspend                = arcmsr_suspend,
 218         .resume                 = arcmsr_resume,
 219         .shutdown               = arcmsr_shutdown,
 220 };
 221 /*
 222 ****************************************************************************
 223 ****************************************************************************
 224 */
 225
 226 static void arcmsr_free_io_queue(struct AdapterControlBlock *acb)
 227 {
 228         switch (acb->adapter_type) {
 229         case ACB_ADAPTER_TYPE_B:
 230         case ACB_ADAPTER_TYPE_D:
 231         case ACB_ADAPTER_TYPE_E: {
 232                 dma_free_coherent(&acb->pdev->dev, acb->ioqueue_size,
 233                         acb->dma_coherent2, acb->dma_coherent_handle2);
 234                 break;
 235         }
 236         }
 237 }
 238
 239 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
 240 {
 241         struct pci_dev *pdev = acb->pdev;
 242         switch (acb->adapter_type){
 243         case ACB_ADAPTER_TYPE_A:{
 244                 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
 245                 if (!acb->pmuA) {
 246                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 247                         return false;
 248                 }
 249                 break;
 250         }
 251         case ACB_ADAPTER_TYPE_B:{
 252                 void __iomem *mem_base0, *mem_base1;
 253                 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 254                 if (!mem_base0) {
 255                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 256                         return false;
 257                 }
 258                 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
 259                 if (!mem_base1) {
 260                         iounmap(mem_base0);
 261                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 262                         return false;
 263                 }
 264                 acb->mem_base0 = mem_base0;
 265                 acb->mem_base1 = mem_base1;
 266                 break;
 267         }
 268         case ACB_ADAPTER_TYPE_C:{
 269                 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
 270                 if (!acb->pmuC) {
 271                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 272                         return false;
 273                 }
 274                 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 275                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
 276                         return true;
 277                 }
 278                 break;
 279         }
 280         case ACB_ADAPTER_TYPE_D: {
 281                 void __iomem *mem_base0;
 282                 unsigned long addr, range, flags;
 283
 284                 addr = (unsigned long)pci_resource_start(pdev, 0);
 285                 range = pci_resource_len(pdev, 0);
 286                 flags = pci_resource_flags(pdev, 0);
 287                 mem_base0 = ioremap(addr, range);
 288                 if (!mem_base0) {
 289                         pr_notice("arcmsr%d: memory mapping region fail\n",
 290                                 acb->host->host_no);
 291                         return false;
 292                 }
 293                 acb->mem_base0 = mem_base0;
 294                 break;
 295                 }
 296         case ACB_ADAPTER_TYPE_E: {
 297                 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
 298                         pci_resource_len(pdev, 1));
 299                 if (!acb->pmuE) {
 300                         pr_notice("arcmsr%d: memory mapping region fail \n",
 301                                 acb->host->host_no);
 302                         return false;
 303                 }
 304                 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
 305                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);       /* synchronize doorbell to 0 */
 306                 acb->in_doorbell = 0;
 307                 acb->out_doorbell = 0;
 308                 break;
 309                 }
 310         }
 311         return true;
 312 }
 313
 314 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
 315 {
 316         switch (acb->adapter_type) {
 317         case ACB_ADAPTER_TYPE_A:{
 318                 iounmap(acb->pmuA);
 319         }
 320         break;
 321         case ACB_ADAPTER_TYPE_B:{
 322                 iounmap(acb->mem_base0);
 323                 iounmap(acb->mem_base1);
 324         }
 325
 326         break;
 327         case ACB_ADAPTER_TYPE_C:{
 328                 iounmap(acb->pmuC);
 329         }
 330         break;
 331         case ACB_ADAPTER_TYPE_D:
 332                 iounmap(acb->mem_base0);
 333                 break;
 334         case ACB_ADAPTER_TYPE_E:
 335                 iounmap(acb->pmuE);
 336                 break;
 337         }
 338 }
 339
 340 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
 341 {
 342         irqreturn_t handle_state;
 343         struct AdapterControlBlock *acb = dev_id;
 344
 345         handle_state = arcmsr_interrupt(acb);
 346         return handle_state;
 347 }
 348
 349 static int arcmsr_bios_param(struct scsi_device *sdev,
 350                 struct block_device *bdev, sector_t capacity, int *geom)
 351 {
 352         int ret, heads, sectors, cylinders, total_capacity;
 353         unsigned char *buffer;/* return copy of block device's partition table */
 354
 355         buffer = scsi_bios_ptable(bdev);
 356         if (buffer) {
 357                 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
 358                 kfree(buffer);
 359                 if (ret != -1)
 360                         return ret;
 361         }
 362         total_capacity = capacity;
 363         heads = 64;
 364         sectors = 32;
 365         cylinders = total_capacity / (heads * sectors);
 366         if (cylinders > 1024) {
 367                 heads = 255;
 368                 sectors = 63;
 369                 cylinders = total_capacity / (heads * sectors);
 370         }
 371         geom[0] = heads;
 372         geom[1] = sectors;
 373         geom[2] = cylinders;
 374         return 0;
 375 }
 376
 377 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
 378 {
 379         struct MessageUnit_A __iomem *reg = acb->pmuA;
 380         int i;
 381
 382         for (i = 0; i < 2000; i++) {
 383                 if (readl(&reg->outbound_intstatus) &
 384                                 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
 385                         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
 386                                 &reg->outbound_intstatus);
 387                         return true;
 388                 }
 389                 msleep(10);
 390         } /* max 20 seconds */
 391
 392         return false;
 393 }
 394
 395 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
 396 {
 397         struct MessageUnit_B *reg = acb->pmuB;
 398         int i;
 399
 400         for (i = 0; i < 2000; i++) {
 401                 if (readl(reg->iop2drv_doorbell)
 402                         & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
 403                         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
 404                                         reg->iop2drv_doorbell);
 405                         writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
 406                                         reg->drv2iop_doorbell);
 407                         return true;
 408                 }
 409                 msleep(10);
 410         } /* max 20 seconds */
 411
 412         return false;
 413 }
 414
 415 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
 416 {
 417         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
 418         int i;
 419
 420         for (i = 0; i < 2000; i++) {
 421                 if (readl(&phbcmu->outbound_doorbell)
 422                                 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 423                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
 424                                 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
 425                         return true;
 426                 }
 427                 msleep(10);
 428         } /* max 20 seconds */
 429
 430         return false;
 431 }
 432
 433 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
 434 {
 435         struct MessageUnit_D *reg = pACB->pmuD;
 436         int i;
 437
 438         for (i = 0; i < 2000; i++) {
 439                 if (readl(reg->outbound_doorbell)
 440                         & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
 441                         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
 442                                 reg->outbound_doorbell);
 443                         return true;
 444                 }
 445                 msleep(10);
 446         } /* max 20 seconds */
 447         return false;
 448 }
 449
 450 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
 451 {
 452         int i;
 453         uint32_t read_doorbell;
 454         struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
 455
 456         for (i = 0; i < 2000; i++) {
 457                 read_doorbell = readl(&phbcmu->iobound_doorbell);
 458                 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
 459                         writel(0, &phbcmu->host_int_status); /*clear interrupt*/
 460                         pACB->in_doorbell = read_doorbell;
 461                         return true;
 462                 }
 463                 msleep(10);
 464         } /* max 20 seconds */
 465         return false;
 466 }
 467
 468 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
 469 {
 470         struct MessageUnit_A __iomem *reg = acb->pmuA;
 471         int retry_count = 30;
 472         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 473         do {
 474                 if (arcmsr_hbaA_wait_msgint_ready(acb))
 475                         break;
 476                 else {
 477                         retry_count--;
 478                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 479                         timeout, retry count down = %d \n", acb->host->host_no, retry_count);
 480                 }
 481         } while (retry_count != 0);
 482 }
 483
 484 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
 485 {
 486         struct MessageUnit_B *reg = acb->pmuB;
 487         int retry_count = 30;
 488         writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
 489         do {
 490                 if (arcmsr_hbaB_wait_msgint_ready(acb))
 491                         break;
 492                 else {
 493                         retry_count--;
 494                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 495                         timeout,retry count down = %d \n", acb->host->host_no, retry_count);
 496                 }
 497         } while (retry_count != 0);
 498 }
 499
 500 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
 501 {
 502         struct MessageUnit_C __iomem *reg = pACB->pmuC;
 503         int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
 504         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 505         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
 506         do {
 507                 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
 508                         break;
 509                 } else {
 510                         retry_count--;
 511                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 512                         timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
 513                 }
 514         } while (retry_count != 0);
 515         return;
 516 }
 517
 518 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
 519 {
 520         int retry_count = 15;
 521         struct MessageUnit_D *reg = pACB->pmuD;
 522
 523         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
 524         do {
 525                 if (arcmsr_hbaD_wait_msgint_ready(pACB))
 526                         break;
 527
 528                 retry_count--;
 529                 pr_notice("arcmsr%d: wait 'flush adapter "
 530                         "cache' timeout, retry count down = %d\n",
 531                         pACB->host->host_no, retry_count);
 532         } while (retry_count != 0);
 533 }
 534
 535 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
 536 {
 537         int retry_count = 30;
 538         struct MessageUnit_E __iomem *reg = pACB->pmuE;
 539
 540         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 541         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
 542         writel(pACB->out_doorbell, &reg->iobound_doorbell);
 543         do {
 544                 if (arcmsr_hbaE_wait_msgint_ready(pACB))
 545                         break;
 546                 retry_count--;
 547                 pr_notice("arcmsr%d: wait 'flush adapter "
 548                         "cache' timeout, retry count down = %d\n",
 549                         pACB->host->host_no, retry_count);
 550         } while (retry_count != 0);
 551 }
 552
 553 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
 554 {
 555         switch (acb->adapter_type) {
 556
 557         case ACB_ADAPTER_TYPE_A: {
 558                 arcmsr_hbaA_flush_cache(acb);
 559                 }
 560                 break;
 561
 562         case ACB_ADAPTER_TYPE_B: {
 563                 arcmsr_hbaB_flush_cache(acb);
 564                 }
 565                 break;
 566         case ACB_ADAPTER_TYPE_C: {
 567                 arcmsr_hbaC_flush_cache(acb);
 568                 }
 569                 break;
 570         case ACB_ADAPTER_TYPE_D:
 571                 arcmsr_hbaD_flush_cache(acb);
 572                 break;
 573         case ACB_ADAPTER_TYPE_E:
 574                 arcmsr_hbaE_flush_cache(acb);
 575                 break;
 576         }
 577 }
 578
 579 static void arcmsr_hbaB_assign_regAddr(struct AdapterControlBlock *acb)
 580 {
 581         struct MessageUnit_B *reg = acb->pmuB;
 582
 583         if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
 584                 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
 585                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
 586                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
 587                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
 588         } else {
 589                 reg->drv2iop_doorbell= MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
 590                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
 591                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
 592                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
 593         }
 594         reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
 595         reg->message_rbuffer =  MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
 596         reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
 597 }
 598
 599 static void arcmsr_hbaD_assign_regAddr(struct AdapterControlBlock *acb)
 600 {
 601         struct MessageUnit_D *reg = acb->pmuD;
 602
 603         reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
 604         reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
 605         reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
 606         reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
 607         reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
 608         reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
 609         reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
 610         reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
 611         reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
 612         reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
 613         reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
 614         reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
 615         reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
 616         reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
 617         reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
 618         reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
 619         reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
 620         reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
 621         reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
 622         reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
 623         reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
 624         reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
 625         reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
 626         reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
 627         reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
 628         reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
 629 }
 630
 631 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
 632 {
 633         bool rtn = true;
 634         void *dma_coherent;
 635         dma_addr_t dma_coherent_handle;
 636         struct pci_dev *pdev = acb->pdev;
 637
 638         switch (acb->adapter_type) {
 639         case ACB_ADAPTER_TYPE_B: {
 640                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_B), 32);
 641                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->ioqueue_size,
 642                         &dma_coherent_handle, GFP_KERNEL);
 643                 if (!dma_coherent) {
 644                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 645                         return false;
 646                 }
 647                 acb->dma_coherent_handle2 = dma_coherent_handle;
 648                 acb->dma_coherent2 = dma_coherent;
 649                 acb->pmuB = (struct MessageUnit_B *)dma_coherent;
 650                 arcmsr_hbaB_assign_regAddr(acb);
 651                 }
 652                 break;
 653         case ACB_ADAPTER_TYPE_D: {
 654                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_D), 32);
 655                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->ioqueue_size,
 656                         &dma_coherent_handle, GFP_KERNEL);
 657                 if (!dma_coherent) {
 658                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 659                         return false;
 660                 }
 661                 acb->dma_coherent_handle2 = dma_coherent_handle;
 662                 acb->dma_coherent2 = dma_coherent;
 663                 acb->pmuD = (struct MessageUnit_D *)dma_coherent;
 664                 arcmsr_hbaD_assign_regAddr(acb);
 665                 }
 666                 break;
 667         case ACB_ADAPTER_TYPE_E: {
 668                 uint32_t completeQ_size;
 669                 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
 670                 acb->ioqueue_size = roundup(completeQ_size, 32);
 671                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->ioqueue_size,
 672                         &dma_coherent_handle, GFP_KERNEL);
 673                 if (!dma_coherent){
 674                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 675                         return false;
 676                 }
 677                 acb->dma_coherent_handle2 = dma_coherent_handle;
 678                 acb->dma_coherent2 = dma_coherent;
 679                 acb->pCompletionQ = dma_coherent;
 680                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 681                 acb->doneq_index = 0;
 682                 }
 683                 break;
 684         default:
 685                 break;
 686         }
 687         return rtn;
 688 }
 689
 690 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
 691 {
 692         struct pci_dev *pdev = acb->pdev;
 693         void *dma_coherent;
 694         dma_addr_t dma_coherent_handle;
 695         struct CommandControlBlock *ccb_tmp;
 696         int i = 0, j = 0;
 697         unsigned long cdb_phyaddr, next_ccb_phy;
 698         unsigned long roundup_ccbsize;
 699         unsigned long max_xfer_len;
 700         unsigned long max_sg_entrys;
 701         uint32_t  firm_config_version, curr_phy_upper32;
 702
 703         for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
 704                 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
 705                         acb->devstate[i][j] = ARECA_RAID_GONE;
 706
 707         max_xfer_len = ARCMSR_MAX_XFER_LEN;
 708         max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
 709         firm_config_version = acb->firm_cfg_version;
 710         if((firm_config_version & 0xFF) >= 3){
 711                 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
 712                 max_sg_entrys = (max_xfer_len/4096);
 713         }
 714         acb->host->max_sectors = max_xfer_len/512;
 715         acb->host->sg_tablesize = max_sg_entrys;
 716         roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
 717         acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
 718         acb->uncache_size += acb->ioqueue_size;
 719         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
 720         if(!dma_coherent){
 721                 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
 722                 return -ENOMEM;
 723         }
 724         acb->dma_coherent = dma_coherent;
 725         acb->dma_coherent_handle = dma_coherent_handle;
 726         memset(dma_coherent, 0, acb->uncache_size);
 727         acb->ccbsize = roundup_ccbsize;
 728         ccb_tmp = dma_coherent;
 729         curr_phy_upper32 = upper_32_bits(dma_coherent_handle);
 730         acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
 731         for(i = 0; i < acb->maxFreeCCB; i++){
 732                 cdb_phyaddr = (unsigned long)dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
 733                 switch (acb->adapter_type) {
 734                 case ACB_ADAPTER_TYPE_A:
 735                 case ACB_ADAPTER_TYPE_B:
 736                         ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
 737                         break;
 738                 case ACB_ADAPTER_TYPE_C:
 739                 case ACB_ADAPTER_TYPE_D:
 740                 case ACB_ADAPTER_TYPE_E:
 741                         ccb_tmp->cdb_phyaddr = cdb_phyaddr;
 742                         break;
 743                 }
 744                 acb->pccb_pool[i] = ccb_tmp;
 745                 ccb_tmp->acb = acb;
 746                 ccb_tmp->smid = (u32)i << 16;
 747                 INIT_LIST_HEAD(&ccb_tmp->list);
 748                 next_ccb_phy = dma_coherent_handle + roundup_ccbsize;
 749                 if (upper_32_bits(next_ccb_phy) != curr_phy_upper32) {
 750                         acb->maxFreeCCB = i;
 751                         acb->host->can_queue = i;
 752                         break;
 753                 }
 754                 else
 755                         list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
 756                 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
 757                 dma_coherent_handle = next_ccb_phy;
 758         }
 759         acb->dma_coherent_handle2 = dma_coherent_handle;
 760         acb->dma_coherent2 = ccb_tmp;
 761         switch (acb->adapter_type) {
 762         case ACB_ADAPTER_TYPE_B:
 763                 acb->pmuB = (struct MessageUnit_B *)acb->dma_coherent2;
 764                 arcmsr_hbaB_assign_regAddr(acb);
 765                 break;
 766         case ACB_ADAPTER_TYPE_D:
 767                 acb->pmuD = (struct MessageUnit_D *)acb->dma_coherent2;
 768                 arcmsr_hbaD_assign_regAddr(acb);
 769                 break;
 770         case ACB_ADAPTER_TYPE_E:
 771                 acb->pCompletionQ = acb->dma_coherent2;
 772                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 773                 acb->doneq_index = 0;
 774                 break;
 775         }
 776         return 0;
 777 }
 778
 779 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
 780 {
 781         struct AdapterControlBlock *acb = container_of(work,
 782                 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
 783         char *acb_dev_map = (char *)acb->device_map;
 784         uint32_t __iomem *signature = NULL;
 785         char __iomem *devicemap = NULL;
 786         int target, lun;
 787         struct scsi_device *psdev;
 788         char diff, temp;
 789
 790         acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
 791         switch (acb->adapter_type) {
 792         case ACB_ADAPTER_TYPE_A: {
 793                 struct MessageUnit_A __iomem *reg  = acb->pmuA;
 794
 795                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 796                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 797                 break;
 798         }
 799         case ACB_ADAPTER_TYPE_B: {
 800                 struct MessageUnit_B *reg  = acb->pmuB;
 801
 802                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 803                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 804                 break;
 805         }
 806         case ACB_ADAPTER_TYPE_C: {
 807                 struct MessageUnit_C __iomem *reg  = acb->pmuC;
 808
 809                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 810                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 811                 break;
 812         }
 813         case ACB_ADAPTER_TYPE_D: {
 814                 struct MessageUnit_D *reg  = acb->pmuD;
 815
 816                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 817                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 818                 break;
 819         }
 820         case ACB_ADAPTER_TYPE_E: {
 821                 struct MessageUnit_E __iomem *reg  = acb->pmuE;
 822
 823                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 824                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 825                 break;
 826                 }
 827         }
 828         atomic_inc(&acb->rq_map_token);
 829         if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
 830                 return;
 831         for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
 832                 target++) {
 833                 temp = readb(devicemap);
 834                 diff = (*acb_dev_map) ^ temp;
 835                 if (diff != 0) {
 836                         *acb_dev_map = temp;
 837                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
 838                                 lun++) {
 839                                 if ((diff & 0x01) == 1 &&
 840                                         (temp & 0x01) == 1) {
 841                                         scsi_add_device(acb->host,
 842                                                 0, target, lun);
 843                                 } else if ((diff & 0x01) == 1
 844                                         && (temp & 0x01) == 0) {
 845                                         psdev = scsi_device_lookup(acb->host,
 846                                                 0, target, lun);
 847                                         if (psdev != NULL) {
 848                                                 scsi_remove_device(psdev);
 849                                                 scsi_device_put(psdev);
 850                                         }
 851                                 }
 852                                 temp >>= 1;
 853                                 diff >>= 1;
 854                         }
 855                 }
 856                 devicemap++;
 857                 acb_dev_map++;
 858         }
 859 }
 860
 861 static int
 862 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
 863 {
 864         unsigned long flags;
 865         int nvec, i;
 866
 867         if (msix_enable == 0)
 868                 goto msi_int0;
 869         nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
 870                         PCI_IRQ_MSIX);
 871         if (nvec > 0) {
 872                 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
 873                 flags = 0;
 874         } else {
 875 msi_int0:
 876                 if (msi_enable == 1) {
 877                         nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
 878                         if (nvec == 1) {
 879                                 dev_info(&pdev->dev, "msi enabled\n");
 880                                 goto msi_int1;
 881                         }
 882                 }
 883                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
 884                 if (nvec < 1)
 885                         return FAILED;
 886 msi_int1:
 887                 flags = IRQF_SHARED;
 888         }
 889
 890         acb->vector_count = nvec;
 891         for (i = 0; i < nvec; i++) {
 892                 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
 893                                 flags, "arcmsr", acb)) {
 894                         pr_warn("arcmsr%d: request_irq =%d failed!\n",
 895                                 acb->host->host_no, pci_irq_vector(pdev, i));
 896                         goto out_free_irq;
 897                 }
 898         }
 899
 900         return SUCCESS;
 901 out_free_irq:
 902         while (--i >= 0)
 903                 free_irq(pci_irq_vector(pdev, i), acb);
 904         pci_free_irq_vectors(pdev);
 905         return FAILED;
 906 }
 907
 908 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
 909 {
 910         INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
 911         atomic_set(&pacb->rq_map_token, 16);
 912         atomic_set(&pacb->ante_token_value, 16);
 913         pacb->fw_flag = FW_NORMAL;
 914         timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
 915         pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
 916         add_timer(&pacb->eternal_timer);
 917 }
 918
 919 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
 920 {
 921         timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
 922         pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
 923         add_timer(&pacb->refresh_timer);
 924 }
 925
 926 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 927 {
 928         struct Scsi_Host *host;
 929         struct AdapterControlBlock *acb;
 930         uint8_t bus,dev_fun;
 931         int error;
 932         error = pci_enable_device(pdev);
 933         if(error){
 934                 return -ENODEV;
 935         }
 936         host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
 937         if(!host){
 938                 goto pci_disable_dev;
 939         }
 940         error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
 941         if(error){
 942                 error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
 943                 if(error){
 944                         printk(KERN_WARNING
 945                                "scsi%d: No suitable DMA mask available\n",
 946                                host->host_no);
 947                         goto scsi_host_release;
 948                 }
 949         }
 950         init_waitqueue_head(&wait_q);
 951         bus = pdev->bus->number;
 952         dev_fun = pdev->devfn;
 953         acb = (struct AdapterControlBlock *) host->hostdata;
 954         memset(acb,0,sizeof(struct AdapterControlBlock));
 955         acb->pdev = pdev;
 956         acb->host = host;
 957         host->max_lun = ARCMSR_MAX_TARGETLUN;
 958         host->max_id = ARCMSR_MAX_TARGETID;             /*16:8*/
 959         host->max_cmd_len = 16;                         /*this is issue of 64bit LBA ,over 2T byte*/
 960         if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
 961                 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
 962         host->can_queue = host_can_queue;       /* max simultaneous cmds */
 963         if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
 964                 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
 965         host->cmd_per_lun = cmd_per_lun;
 966         host->this_id = ARCMSR_SCSI_INITIATOR_ID;
 967         host->unique_id = (bus << 8) | dev_fun;
 968         pci_set_drvdata(pdev, host);
 969         pci_set_master(pdev);
 970         error = pci_request_regions(pdev, "arcmsr");
 971         if(error){
 972                 goto scsi_host_release;
 973         }
 974         spin_lock_init(&acb->eh_lock);
 975         spin_lock_init(&acb->ccblist_lock);
 976         spin_lock_init(&acb->postq_lock);
 977         spin_lock_init(&acb->doneq_lock);
 978         spin_lock_init(&acb->rqbuffer_lock);
 979         spin_lock_init(&acb->wqbuffer_lock);
 980         acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
 981                         ACB_F_MESSAGE_RQBUFFER_CLEARED |
 982                         ACB_F_MESSAGE_WQBUFFER_READED);
 983         acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
 984         INIT_LIST_HEAD(&acb->ccb_free_list);
 985         acb->adapter_type = id->driver_data;
 986         error = arcmsr_remap_pciregion(acb);
 987         if(!error){
 988                 goto pci_release_regs;
 989         }
 990         error = arcmsr_alloc_io_queue(acb);
 991         if (!error)
 992                 goto unmap_pci_region;
 993         error = arcmsr_get_firmware_spec(acb);
 994         if(!error){
 995                 goto free_hbb_mu;
 996         }
 997         arcmsr_free_io_queue(acb);
 998         error = arcmsr_alloc_ccb_pool(acb);
 999         if(error){
1000                 goto unmap_pci_region;
1001         }
1002         error = scsi_add_host(host, &pdev->dev);
1003         if(error){
1004                 goto free_ccb_pool;
1005         }
1006         if (arcmsr_request_irq(pdev, acb) == FAILED)
1007                 goto scsi_host_remove;
1008         arcmsr_iop_init(acb);
1009         arcmsr_init_get_devmap_timer(acb);
1010         if (set_date_time)
1011                 arcmsr_init_set_datetime_timer(acb);
1012         if(arcmsr_alloc_sysfs_attr(acb))
1013                 goto out_free_sysfs;
1014         scsi_scan_host(host);
1015         return 0;
1016 out_free_sysfs:
1017         if (set_date_time)
1018                 del_timer_sync(&acb->refresh_timer);
1019         del_timer_sync(&acb->eternal_timer);
1020         flush_work(&acb->arcmsr_do_message_isr_bh);
1021         arcmsr_stop_adapter_bgrb(acb);
1022         arcmsr_flush_adapter_cache(acb);
1023         arcmsr_free_irq(pdev, acb);
1024 scsi_host_remove:
1025         scsi_remove_host(host);
1026 free_ccb_pool:
1027         arcmsr_free_ccb_pool(acb);
1028         goto unmap_pci_region;
1029 free_hbb_mu:
1030         arcmsr_free_io_queue(acb);
1031 unmap_pci_region:
1032         arcmsr_unmap_pciregion(acb);
1033 pci_release_regs:
1034         pci_release_regions(pdev);
1035 scsi_host_release:
1036         scsi_host_put(host);
1037 pci_disable_dev:
1038         pci_disable_device(pdev);
1039         return -ENODEV;
1040 }
1041
1042 static void arcmsr_free_irq(struct pci_dev *pdev,
1043                 struct AdapterControlBlock *acb)
1044 {
1045         int i;
1046
1047         for (i = 0; i < acb->vector_count; i++)
1048                 free_irq(pci_irq_vector(pdev, i), acb);
1049         pci_free_irq_vectors(pdev);
1050 }
1051
1052 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
1053 {
1054         uint32_t intmask_org;
1055         struct Scsi_Host *host = pci_get_drvdata(pdev);
1056         struct AdapterControlBlock *acb =
1057                 (struct AdapterControlBlock *)host->hostdata;
1058
1059         intmask_org = arcmsr_disable_outbound_ints(acb);
1060         arcmsr_free_irq(pdev, acb);
1061         del_timer_sync(&acb->eternal_timer);
1062         if (set_date_time)
1063                 del_timer_sync(&acb->refresh_timer);
1064         flush_work(&acb->arcmsr_do_message_isr_bh);
1065         arcmsr_stop_adapter_bgrb(acb);
1066         arcmsr_flush_adapter_cache(acb);
1067         pci_set_drvdata(pdev, host);
1068         pci_save_state(pdev);
1069         pci_disable_device(pdev);
1070         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1071         return 0;
1072 }
1073
1074 static int arcmsr_resume(struct pci_dev *pdev)
1075 {
1076         int error;
1077         struct Scsi_Host *host = pci_get_drvdata(pdev);
1078         struct AdapterControlBlock *acb =
1079                 (struct AdapterControlBlock *)host->hostdata;
1080
1081         pci_set_power_state(pdev, PCI_D0);
1082         pci_enable_wake(pdev, PCI_D0, 0);
1083         pci_restore_state(pdev);
1084         if (pci_enable_device(pdev)) {
1085                 pr_warn("%s: pci_enable_device error\n", __func__);
1086                 return -ENODEV;
1087         }
1088         error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
1089         if (error) {
1090                 error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1091                 if (error) {
1092                         pr_warn("scsi%d: No suitable DMA mask available\n",
1093                                host->host_no);
1094                         goto controller_unregister;
1095                 }
1096         }
1097         pci_set_master(pdev);
1098         if (arcmsr_request_irq(pdev, acb) == FAILED)
1099                 goto controller_stop;
1100         if (acb->adapter_type == ACB_ADAPTER_TYPE_E) {
1101                 writel(0, &acb->pmuE->host_int_status);
1102                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
1103                 acb->in_doorbell = 0;
1104                 acb->out_doorbell = 0;
1105                 acb->doneq_index = 0;
1106         }
1107         arcmsr_iop_init(acb);
1108         arcmsr_init_get_devmap_timer(acb);
1109         if (set_date_time)
1110                 arcmsr_init_set_datetime_timer(acb);
1111         return 0;
1112 controller_stop:
1113         arcmsr_stop_adapter_bgrb(acb);
1114         arcmsr_flush_adapter_cache(acb);
1115 controller_unregister:
1116         scsi_remove_host(host);
1117         arcmsr_free_ccb_pool(acb);
1118         arcmsr_unmap_pciregion(acb);
1119         pci_release_regions(pdev);
1120         scsi_host_put(host);
1121         pci_disable_device(pdev);
1122         return -ENODEV;
1123 }
1124
1125 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1126 {
1127         struct MessageUnit_A __iomem *reg = acb->pmuA;
1128         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1129         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1130                 printk(KERN_NOTICE
1131                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1132                         , acb->host->host_no);
1133                 return false;
1134         }
1135         return true;
1136 }
1137
1138 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1139 {
1140         struct MessageUnit_B *reg = acb->pmuB;
1141
1142         writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1143         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1144                 printk(KERN_NOTICE
1145                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1146                         , acb->host->host_no);
1147                 return false;
1148         }
1149         return true;
1150 }
1151 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1152 {
1153         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1154         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1155         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1156         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1157                 printk(KERN_NOTICE
1158                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1159                         , pACB->host->host_no);
1160                 return false;
1161         }
1162         return true;
1163 }
1164
1165 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1166 {
1167         struct MessageUnit_D *reg = pACB->pmuD;
1168
1169         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1170         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1171                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1172                         "command' timeout\n", pACB->host->host_no);
1173                 return false;
1174         }
1175         return true;
1176 }
1177
1178 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1179 {
1180         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1181
1182         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1183         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1184         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1185         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1186                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1187                         "command' timeout\n", pACB->host->host_no);
1188                 return false;
1189         }
1190         return true;
1191 }
1192
1193 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1194 {
1195         uint8_t rtnval = 0;
1196         switch (acb->adapter_type) {
1197         case ACB_ADAPTER_TYPE_A: {
1198                 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1199                 }
1200                 break;
1201
1202         case ACB_ADAPTER_TYPE_B: {
1203                 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1204                 }
1205                 break;
1206
1207         case ACB_ADAPTER_TYPE_C: {
1208                 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1209                 }
1210                 break;
1211
1212         case ACB_ADAPTER_TYPE_D:
1213                 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1214                 break;
1215         case ACB_ADAPTER_TYPE_E:
1216                 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1217                 break;
1218         }
1219         return rtnval;
1220 }
1221
1222 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
1223 {
1224         struct scsi_cmnd *pcmd = ccb->pcmd;
1225
1226         scsi_dma_unmap(pcmd);
1227 }
1228
1229 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1230 {
1231         struct AdapterControlBlock *acb = ccb->acb;
1232         struct scsi_cmnd *pcmd = ccb->pcmd;
1233         unsigned long flags;
1234         atomic_dec(&acb->ccboutstandingcount);
1235         arcmsr_pci_unmap_dma(ccb);
1236         ccb->startdone = ARCMSR_CCB_DONE;
1237         spin_lock_irqsave(&acb->ccblist_lock, flags);
1238         list_add_tail(&ccb->list, &acb->ccb_free_list);
1239         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1240         pcmd->scsi_done(pcmd);
1241 }
1242
1243 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1244 {
1245
1246         struct scsi_cmnd *pcmd = ccb->pcmd;
1247         struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1248         pcmd->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
1249         if (sensebuffer) {
1250                 int sense_data_length =
1251                         sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
1252                         ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
1253                 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
1254                 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
1255                 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1256                 sensebuffer->Valid = 1;
1257                 pcmd->result |= (DRIVER_SENSE << 24);
1258         }
1259 }
1260
1261 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1262 {
1263         u32 orig_mask = 0;
1264         switch (acb->adapter_type) {
1265         case ACB_ADAPTER_TYPE_A : {
1266                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1267                 orig_mask = readl(&reg->outbound_intmask);
1268                 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1269                                                 &reg->outbound_intmask);
1270                 }
1271                 break;
1272         case ACB_ADAPTER_TYPE_B : {
1273                 struct MessageUnit_B *reg = acb->pmuB;
1274                 orig_mask = readl(reg->iop2drv_doorbell_mask);
1275                 writel(0, reg->iop2drv_doorbell_mask);
1276                 }
1277                 break;
1278         case ACB_ADAPTER_TYPE_C:{
1279                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1280                 /* disable all outbound interrupt */
1281                 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1282                 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1283                 }
1284                 break;
1285         case ACB_ADAPTER_TYPE_D: {
1286                 struct MessageUnit_D *reg = acb->pmuD;
1287                 /* disable all outbound interrupt */
1288                 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1289                 }
1290                 break;
1291         case ACB_ADAPTER_TYPE_E: {
1292                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1293                 orig_mask = readl(&reg->host_int_mask);
1294                 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
1295                 readl(&reg->host_int_mask); /* Dummy readl to force pci flush */
1296                 }
1297                 break;
1298         }
1299         return orig_mask;
1300 }
1301
1302 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1303                         struct CommandControlBlock *ccb, bool error)
1304 {
1305         uint8_t id, lun;
1306         id = ccb->pcmd->device->id;
1307         lun = ccb->pcmd->device->lun;
1308         if (!error) {
1309                 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1310                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1311                 ccb->pcmd->result = DID_OK << 16;
1312                 arcmsr_ccb_complete(ccb);
1313         }else{
1314                 switch (ccb->arcmsr_cdb.DeviceStatus) {
1315                 case ARCMSR_DEV_SELECT_TIMEOUT: {
1316                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1317                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1318                         arcmsr_ccb_complete(ccb);
1319                         }
1320                         break;
1321
1322                 case ARCMSR_DEV_ABORTED:
1323
1324                 case ARCMSR_DEV_INIT_FAIL: {
1325                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1326                         ccb->pcmd->result = DID_BAD_TARGET << 16;
1327                         arcmsr_ccb_complete(ccb);
1328                         }
1329                         break;
1330
1331                 case ARCMSR_DEV_CHECK_CONDITION: {
1332                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1333                         arcmsr_report_sense_info(ccb);
1334                         arcmsr_ccb_complete(ccb);
1335                         }
1336                         break;
1337
1338                 default:
1339                         printk(KERN_NOTICE
1340                                 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1341                                 but got unknown DeviceStatus = 0x%x \n"
1342                                 , acb->host->host_no
1343                                 , id
1344                                 , lun
1345                                 , ccb->arcmsr_cdb.DeviceStatus);
1346                                 acb->devstate[id][lun] = ARECA_RAID_GONE;
1347                                 ccb->pcmd->result = DID_NO_CONNECT << 16;
1348                                 arcmsr_ccb_complete(ccb);
1349                         break;
1350                 }
1351         }
1352 }
1353
1354 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1355 {
1356         if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1357                 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1358                         struct scsi_cmnd *abortcmd = pCCB->pcmd;
1359                         if (abortcmd) {
1360                                 abortcmd->result |= DID_ABORT << 16;
1361                                 arcmsr_ccb_complete(pCCB);
1362                                 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1363                                 acb->host->host_no, pCCB);
1364                         }
1365                         return;
1366                 }
1367                 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1368                                 done acb = '0x%p'"
1369                                 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1370                                 " ccboutstandingcount = %d \n"
1371                                 , acb->host->host_no
1372                                 , acb
1373                                 , pCCB
1374                                 , pCCB->acb
1375                                 , pCCB->startdone
1376                                 , atomic_read(&acb->ccboutstandingcount));
1377                   return;
1378         }
1379         arcmsr_report_ccb_state(acb, pCCB, error);
1380 }
1381
1382 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1383 {
1384         int i = 0;
1385         uint32_t flag_ccb, ccb_cdb_phy;
1386         struct ARCMSR_CDB *pARCMSR_CDB;
1387         bool error;
1388         struct CommandControlBlock *pCCB;
1389         switch (acb->adapter_type) {
1390
1391         case ACB_ADAPTER_TYPE_A: {
1392                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1393                 uint32_t outbound_intstatus;
1394                 outbound_intstatus = readl(&reg->outbound_intstatus) &
1395                                         acb->outbound_int_enable;
1396                 /*clear and abort all outbound posted Q*/
1397                 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1398                 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
1399                                 && (i++ < acb->maxOutstanding)) {
1400                         pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1401                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1402                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1403                         arcmsr_drain_donequeue(acb, pCCB, error);
1404                 }
1405                 }
1406                 break;
1407
1408         case ACB_ADAPTER_TYPE_B: {
1409                 struct MessageUnit_B *reg = acb->pmuB;
1410                 /*clear all outbound posted Q*/
1411                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1412                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1413                         flag_ccb = reg->done_qbuffer[i];
1414                         if (flag_ccb != 0) {
1415                                 reg->done_qbuffer[i] = 0;
1416                                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1417                                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1418                                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1419                                 arcmsr_drain_donequeue(acb, pCCB, error);
1420                         }
1421                         reg->post_qbuffer[i] = 0;
1422                 }
1423                 reg->doneq_index = 0;
1424                 reg->postq_index = 0;
1425                 }
1426                 break;
1427         case ACB_ADAPTER_TYPE_C: {
1428                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1429                 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1430                         /*need to do*/
1431                         flag_ccb = readl(&reg->outbound_queueport_low);
1432                         ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1433                         pARCMSR_CDB = (struct  ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
1434                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1435                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1436                         arcmsr_drain_donequeue(acb, pCCB, error);
1437                 }
1438                 }
1439                 break;
1440         case ACB_ADAPTER_TYPE_D: {
1441                 struct MessageUnit_D  *pmu = acb->pmuD;
1442                 uint32_t outbound_write_pointer;
1443                 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1444                 unsigned long flags;
1445
1446                 residual = atomic_read(&acb->ccboutstandingcount);
1447                 for (i = 0; i < residual; i++) {
1448                         spin_lock_irqsave(&acb->doneq_lock, flags);
1449                         outbound_write_pointer =
1450                                 pmu->done_qbuffer[0].addressLow + 1;
1451                         doneq_index = pmu->doneq_index;
1452                         if ((doneq_index & 0xFFF) !=
1453                                 (outbound_write_pointer & 0xFFF)) {
1454                                 toggle = doneq_index & 0x4000;
1455                                 index_stripped = (doneq_index & 0xFFF) + 1;
1456                                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1457                                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1458                                         ((toggle ^ 0x4000) + 1);
1459                                 doneq_index = pmu->doneq_index;
1460                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1461                                 addressLow = pmu->done_qbuffer[doneq_index &
1462                                         0xFFF].addressLow;
1463                                 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1464                                 pARCMSR_CDB = (struct  ARCMSR_CDB *)
1465                                         (acb->vir2phy_offset + ccb_cdb_phy);
1466                                 pCCB = container_of(pARCMSR_CDB,
1467                                         struct CommandControlBlock, arcmsr_cdb);
1468                                 error = (addressLow &
1469                                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1470                                         true : false;
1471                                 arcmsr_drain_donequeue(acb, pCCB, error);
1472                                 writel(doneq_index,
1473                                         pmu->outboundlist_read_pointer);
1474                         } else {
1475                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1476                                 mdelay(10);
1477                         }
1478                 }
1479                 pmu->postq_index = 0;
1480                 pmu->doneq_index = 0x40FF;
1481                 }
1482                 break;
1483         case ACB_ADAPTER_TYPE_E:
1484                 arcmsr_hbaE_postqueue_isr(acb);
1485                 break;
1486         }
1487 }
1488
1489 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1490 {
1491         char *acb_dev_map = (char *)acb->device_map;
1492         int target, lun, i;
1493         struct scsi_device *psdev;
1494         struct CommandControlBlock *ccb;
1495         char temp;
1496
1497         for (i = 0; i < acb->maxFreeCCB; i++) {
1498                 ccb = acb->pccb_pool[i];
1499                 if (ccb->startdone == ARCMSR_CCB_START) {
1500                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1501                         arcmsr_pci_unmap_dma(ccb);
1502                         ccb->pcmd->scsi_done(ccb->pcmd);
1503                 }
1504         }
1505         for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1506                 temp = *acb_dev_map;
1507                 if (temp) {
1508                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1509                                 if (temp & 1) {
1510                                         psdev = scsi_device_lookup(acb->host,
1511                                                 0, target, lun);
1512                                         if (psdev != NULL) {
1513                                                 scsi_remove_device(psdev);
1514                                                 scsi_device_put(psdev);
1515                                         }
1516                                 }
1517                                 temp >>= 1;
1518                         }
1519                         *acb_dev_map = 0;
1520                 }
1521                 acb_dev_map++;
1522         }
1523 }
1524
1525 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1526 {
1527         struct pci_dev *pdev;
1528         struct Scsi_Host *host;
1529
1530         host = acb->host;
1531         arcmsr_free_sysfs_attr(acb);
1532         scsi_remove_host(host);
1533         flush_work(&acb->arcmsr_do_message_isr_bh);
1534         del_timer_sync(&acb->eternal_timer);
1535         if (set_date_time)
1536                 del_timer_sync(&acb->refresh_timer);
1537         pdev = acb->pdev;
1538         arcmsr_free_irq(pdev, acb);
1539         arcmsr_free_ccb_pool(acb);
1540         arcmsr_unmap_pciregion(acb);
1541         pci_release_regions(pdev);
1542         scsi_host_put(host);
1543         pci_disable_device(pdev);
1544 }
1545
1546 static void arcmsr_remove(struct pci_dev *pdev)
1547 {
1548         struct Scsi_Host *host = pci_get_drvdata(pdev);
1549         struct AdapterControlBlock *acb =
1550                 (struct AdapterControlBlock *) host->hostdata;
1551         int poll_count = 0;
1552         uint16_t dev_id;
1553
1554         pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1555         if (dev_id == 0xffff) {
1556                 acb->acb_flags &= ~ACB_F_IOP_INITED;
1557                 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1558                 arcmsr_remove_scsi_devices(acb);
1559                 arcmsr_free_pcidev(acb);
1560                 return;
1561         }
1562         arcmsr_free_sysfs_attr(acb);
1563         scsi_remove_host(host);
1564         flush_work(&acb->arcmsr_do_message_isr_bh);
1565         del_timer_sync(&acb->eternal_timer);
1566         if (set_date_time)
1567                 del_timer_sync(&acb->refresh_timer);
1568         arcmsr_disable_outbound_ints(acb);
1569         arcmsr_stop_adapter_bgrb(acb);
1570         arcmsr_flush_adapter_cache(acb);
1571         acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1572         acb->acb_flags &= ~ACB_F_IOP_INITED;
1573
1574         for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1575                 if (!atomic_read(&acb->ccboutstandingcount))
1576                         break;
1577                 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1578                 msleep(25);
1579         }
1580
1581         if (atomic_read(&acb->ccboutstandingcount)) {
1582                 int i;
1583
1584                 arcmsr_abort_allcmd(acb);
1585                 arcmsr_done4abort_postqueue(acb);
1586                 for (i = 0; i < acb->maxFreeCCB; i++) {
1587                         struct CommandControlBlock *ccb = acb->pccb_pool[i];
1588                         if (ccb->startdone == ARCMSR_CCB_START) {
1589                                 ccb->startdone = ARCMSR_CCB_ABORTED;
1590                                 ccb->pcmd->result = DID_ABORT << 16;
1591                                 arcmsr_ccb_complete(ccb);
1592                         }
1593                 }
1594         }
1595         arcmsr_free_irq(pdev, acb);
1596         arcmsr_free_ccb_pool(acb);
1597         arcmsr_unmap_pciregion(acb);
1598         pci_release_regions(pdev);
1599         scsi_host_put(host);
1600         pci_disable_device(pdev);
1601 }
1602
1603 static void arcmsr_shutdown(struct pci_dev *pdev)
1604 {
1605         struct Scsi_Host *host = pci_get_drvdata(pdev);
1606         struct AdapterControlBlock *acb =
1607                 (struct AdapterControlBlock *)host->hostdata;
1608         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1609                 return;
1610         del_timer_sync(&acb->eternal_timer);
1611         if (set_date_time)
1612                 del_timer_sync(&acb->refresh_timer);
1613         arcmsr_disable_outbound_ints(acb);
1614         arcmsr_free_irq(pdev, acb);
1615         flush_work(&acb->arcmsr_do_message_isr_bh);
1616         arcmsr_stop_adapter_bgrb(acb);
1617         arcmsr_flush_adapter_cache(acb);
1618 }
1619
1620 static int arcmsr_module_init(void)
1621 {
1622         int error = 0;
1623         error = pci_register_driver(&arcmsr_pci_driver);
1624         return error;
1625 }
1626
1627 static void arcmsr_module_exit(void)
1628 {
1629         pci_unregister_driver(&arcmsr_pci_driver);
1630 }
1631 module_init(arcmsr_module_init);
1632 module_exit(arcmsr_module_exit);
1633
1634 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1635                                                 u32 intmask_org)
1636 {
1637         u32 mask;
1638         switch (acb->adapter_type) {
1639
1640         case ACB_ADAPTER_TYPE_A: {
1641                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1642                 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1643                              ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1644                              ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1645                 writel(mask, &reg->outbound_intmask);
1646                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1647                 }
1648                 break;
1649
1650         case ACB_ADAPTER_TYPE_B: {
1651                 struct MessageUnit_B *reg = acb->pmuB;
1652                 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1653                         ARCMSR_IOP2DRV_DATA_READ_OK |
1654                         ARCMSR_IOP2DRV_CDB_DONE |
1655                         ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1656                 writel(mask, reg->iop2drv_doorbell_mask);
1657                 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1658                 }
1659                 break;
1660         case ACB_ADAPTER_TYPE_C: {
1661                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1662                 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1663                 writel(intmask_org & mask, &reg->host_int_mask);
1664                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1665                 }
1666                 break;
1667         case ACB_ADAPTER_TYPE_D: {
1668                 struct MessageUnit_D *reg = acb->pmuD;
1669
1670                 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1671                 writel(intmask_org | mask, reg->pcief0_int_enable);
1672                 break;
1673                 }
1674         case ACB_ADAPTER_TYPE_E: {
1675                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1676
1677                 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1678                 writel(intmask_org & mask, &reg->host_int_mask);
1679                 break;
1680                 }
1681         }
1682 }
1683
1684 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1685         struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1686 {
1687         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1688         int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1689         __le32 address_lo, address_hi;
1690         int arccdbsize = 0x30;
1691         __le32 length = 0;
1692         int i;
1693         struct scatterlist *sg;
1694         int nseg;
1695         ccb->pcmd = pcmd;
1696         memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1697         arcmsr_cdb->TargetID = pcmd->device->id;
1698         arcmsr_cdb->LUN = pcmd->device->lun;
1699         arcmsr_cdb->Function = 1;
1700         arcmsr_cdb->msgContext = 0;
1701         memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1702
1703         nseg = scsi_dma_map(pcmd);
1704         if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1705                 return FAILED;
1706         scsi_for_each_sg(pcmd, sg, nseg, i) {
1707                 /* Get the physical address of the current data pointer */
1708                 length = cpu_to_le32(sg_dma_len(sg));
1709                 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1710                 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1711                 if (address_hi == 0) {
1712                         struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1713
1714                         pdma_sg->address = address_lo;
1715                         pdma_sg->length = length;
1716                         psge += sizeof (struct SG32ENTRY);
1717                         arccdbsize += sizeof (struct SG32ENTRY);
1718                 } else {
1719                         struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1720
1721                         pdma_sg->addresshigh = address_hi;
1722                         pdma_sg->address = address_lo;
1723                         pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1724                         psge += sizeof (struct SG64ENTRY);
1725                         arccdbsize += sizeof (struct SG64ENTRY);
1726                 }
1727         }
1728         arcmsr_cdb->sgcount = (uint8_t)nseg;
1729         arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1730         arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1731         if ( arccdbsize > 256)
1732                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1733         if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1734                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1735         ccb->arc_cdb_size = arccdbsize;
1736         return SUCCESS;
1737 }
1738
1739 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1740 {
1741         uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1742         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1743         atomic_inc(&acb->ccboutstandingcount);
1744         ccb->startdone = ARCMSR_CCB_START;
1745         switch (acb->adapter_type) {
1746         case ACB_ADAPTER_TYPE_A: {
1747                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1748
1749                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1750                         writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1751                         &reg->inbound_queueport);
1752                 else
1753                         writel(cdb_phyaddr, &reg->inbound_queueport);
1754                 break;
1755         }
1756
1757         case ACB_ADAPTER_TYPE_B: {
1758                 struct MessageUnit_B *reg = acb->pmuB;
1759                 uint32_t ending_index, index = reg->postq_index;
1760
1761                 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1762                 reg->post_qbuffer[ending_index] = 0;
1763                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1764                         reg->post_qbuffer[index] =
1765                                 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1766                 } else {
1767                         reg->post_qbuffer[index] = cdb_phyaddr;
1768                 }
1769                 index++;
1770                 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1771                 reg->postq_index = index;
1772                 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1773                 }
1774                 break;
1775         case ACB_ADAPTER_TYPE_C: {
1776                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1777                 uint32_t ccb_post_stamp, arc_cdb_size;
1778
1779                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1780                 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1781                 if (acb->cdb_phyaddr_hi32) {
1782                         writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1783                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1784                 } else {
1785                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1786                 }
1787                 }
1788                 break;
1789         case ACB_ADAPTER_TYPE_D: {
1790                 struct MessageUnit_D  *pmu = acb->pmuD;
1791                 u16 index_stripped;
1792                 u16 postq_index, toggle;
1793                 unsigned long flags;
1794                 struct InBound_SRB *pinbound_srb;
1795
1796                 spin_lock_irqsave(&acb->postq_lock, flags);
1797                 postq_index = pmu->postq_index;
1798                 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1799                 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr);
1800                 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr);
1801                 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1802                 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1803                 toggle = postq_index & 0x4000;
1804                 index_stripped = postq_index + 1;
1805                 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1806                 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1807                         (toggle ^ 0x4000);
1808                 writel(postq_index, pmu->inboundlist_write_pointer);
1809                 spin_unlock_irqrestore(&acb->postq_lock, flags);
1810                 break;
1811                 }
1812         case ACB_ADAPTER_TYPE_E: {
1813                 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1814                 u32 ccb_post_stamp, arc_cdb_size;
1815
1816                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1817                 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1818                 writel(0, &pmu->inbound_queueport_high);
1819                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1820                 break;
1821                 }
1822         }
1823 }
1824
1825 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1826 {
1827         struct MessageUnit_A __iomem *reg = acb->pmuA;
1828         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1829         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1830         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1831                 printk(KERN_NOTICE
1832                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1833                         , acb->host->host_no);
1834         }
1835 }
1836
1837 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1838 {
1839         struct MessageUnit_B *reg = acb->pmuB;
1840         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1841         writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1842
1843         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1844                 printk(KERN_NOTICE
1845                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1846                         , acb->host->host_no);
1847         }
1848 }
1849
1850 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1851 {
1852         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1853         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1854         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1855         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1856         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1857                 printk(KERN_NOTICE
1858                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1859                         , pACB->host->host_no);
1860         }
1861         return;
1862 }
1863
1864 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1865 {
1866         struct MessageUnit_D *reg = pACB->pmuD;
1867
1868         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1869         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1870         if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1871                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
1872                         "timeout\n", pACB->host->host_no);
1873 }
1874
1875 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
1876 {
1877         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1878
1879         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1880         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1881         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1882         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1883         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1884                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
1885                         "timeout\n", pACB->host->host_no);
1886         }
1887 }
1888
1889 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1890 {
1891         switch (acb->adapter_type) {
1892         case ACB_ADAPTER_TYPE_A: {
1893                 arcmsr_hbaA_stop_bgrb(acb);
1894                 }
1895                 break;
1896
1897         case ACB_ADAPTER_TYPE_B: {
1898                 arcmsr_hbaB_stop_bgrb(acb);
1899                 }
1900                 break;
1901         case ACB_ADAPTER_TYPE_C: {
1902                 arcmsr_hbaC_stop_bgrb(acb);
1903                 }
1904                 break;
1905         case ACB_ADAPTER_TYPE_D:
1906                 arcmsr_hbaD_stop_bgrb(acb);
1907                 break;
1908         case ACB_ADAPTER_TYPE_E:
1909                 arcmsr_hbaE_stop_bgrb(acb);
1910                 break;
1911         }
1912 }
1913
1914 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1915 {
1916         dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1917 }
1918
1919 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1920 {
1921         switch (acb->adapter_type) {
1922         case ACB_ADAPTER_TYPE_A: {
1923                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1924                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1925                 }
1926                 break;
1927
1928         case ACB_ADAPTER_TYPE_B: {
1929                 struct MessageUnit_B *reg = acb->pmuB;
1930                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
1931                 }
1932                 break;
1933         case ACB_ADAPTER_TYPE_C: {
1934                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1935
1936                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1937                 }
1938                 break;
1939         case ACB_ADAPTER_TYPE_D: {
1940                 struct MessageUnit_D *reg = acb->pmuD;
1941                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
1942                         reg->inbound_doorbell);
1943                 }
1944                 break;
1945         case ACB_ADAPTER_TYPE_E: {
1946                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1947                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
1948                 writel(acb->out_doorbell, &reg->iobound_doorbell);
1949                 }
1950                 break;
1951         }
1952 }
1953
1954 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1955 {
1956         switch (acb->adapter_type) {
1957         case ACB_ADAPTER_TYPE_A: {
1958                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1959                 /*
1960                 ** push inbound doorbell tell iop, driver data write ok
1961                 ** and wait reply on next hwinterrupt for next Qbuffer post
1962                 */
1963                 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1964                 }
1965                 break;
1966
1967         case ACB_ADAPTER_TYPE_B: {
1968                 struct MessageUnit_B *reg = acb->pmuB;
1969                 /*
1970                 ** push inbound doorbell tell iop, driver data write ok
1971                 ** and wait reply on next hwinterrupt for next Qbuffer post
1972                 */
1973                 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
1974                 }
1975                 break;
1976         case ACB_ADAPTER_TYPE_C: {
1977                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1978                 /*
1979                 ** push inbound doorbell tell iop, driver data write ok
1980                 ** and wait reply on next hwinterrupt for next Qbuffer post
1981                 */
1982                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1983                 }
1984                 break;
1985         case ACB_ADAPTER_TYPE_D: {
1986                 struct MessageUnit_D *reg = acb->pmuD;
1987                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
1988                         reg->inbound_doorbell);
1989                 }
1990                 break;
1991         case ACB_ADAPTER_TYPE_E: {
1992                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1993                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
1994                 writel(acb->out_doorbell, &reg->iobound_doorbell);
1995                 }
1996                 break;
1997         }
1998 }
1999
2000 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
2001 {
2002         struct QBUFFER __iomem *qbuffer = NULL;
2003         switch (acb->adapter_type) {
2004
2005         case ACB_ADAPTER_TYPE_A: {
2006                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2007                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2008                 }
2009                 break;
2010
2011         case ACB_ADAPTER_TYPE_B: {
2012                 struct MessageUnit_B *reg = acb->pmuB;
2013                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2014                 }
2015                 break;
2016         case ACB_ADAPTER_TYPE_C: {
2017                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
2018                 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
2019                 }
2020                 break;
2021         case ACB_ADAPTER_TYPE_D: {
2022                 struct MessageUnit_D *reg = acb->pmuD;
2023                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2024                 }
2025                 break;
2026         case ACB_ADAPTER_TYPE_E: {
2027                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2028                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2029                 }
2030                 break;
2031         }
2032         return qbuffer;
2033 }
2034
2035 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
2036 {
2037         struct QBUFFER __iomem *pqbuffer = NULL;
2038         switch (acb->adapter_type) {
2039
2040         case ACB_ADAPTER_TYPE_A: {
2041                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2042                 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
2043                 }
2044                 break;
2045
2046         case ACB_ADAPTER_TYPE_B: {
2047                 struct MessageUnit_B  *reg = acb->pmuB;
2048                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2049                 }
2050                 break;
2051         case ACB_ADAPTER_TYPE_C: {
2052                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2053                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2054                 }
2055                 break;
2056         case ACB_ADAPTER_TYPE_D: {
2057                 struct MessageUnit_D *reg = acb->pmuD;
2058                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2059                 }
2060                 break;
2061         case ACB_ADAPTER_TYPE_E: {
2062                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2063                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2064                 }
2065                 break;
2066         }
2067         return pqbuffer;
2068 }
2069
2070 static uint32_t
2071 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2072                 struct QBUFFER __iomem *prbuffer)
2073 {
2074         uint8_t *pQbuffer;
2075         uint8_t *buf1 = NULL;
2076         uint32_t __iomem *iop_data;
2077         uint32_t iop_len, data_len, *buf2 = NULL;
2078
2079         iop_data = (uint32_t __iomem *)prbuffer->data;
2080         iop_len = readl(&prbuffer->data_len);
2081         if (iop_len > 0) {
2082                 buf1 = kmalloc(128, GFP_ATOMIC);
2083                 buf2 = (uint32_t *)buf1;
2084                 if (buf1 == NULL)
2085                         return 0;
2086                 data_len = iop_len;
2087                 while (data_len >= 4) {
2088                         *buf2++ = readl(iop_data);
2089                         iop_data++;
2090                         data_len -= 4;
2091                 }
2092                 if (data_len)
2093                         *buf2 = readl(iop_data);
2094                 buf2 = (uint32_t *)buf1;
2095         }
2096         while (iop_len > 0) {
2097                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2098                 *pQbuffer = *buf1;
2099                 acb->rqbuf_putIndex++;
2100                 /* if last, index number set it to 0 */
2101                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2102                 buf1++;
2103                 iop_len--;
2104         }
2105         kfree(buf2);
2106         /* let IOP know data has been read */
2107         arcmsr_iop_message_read(acb);
2108         return 1;
2109 }
2110
2111 uint32_t
2112 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2113         struct QBUFFER __iomem *prbuffer) {
2114
2115         uint8_t *pQbuffer;
2116         uint8_t __iomem *iop_data;
2117         uint32_t iop_len;
2118
2119         if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2120                 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2121         iop_data = (uint8_t __iomem *)prbuffer->data;
2122         iop_len = readl(&prbuffer->data_len);
2123         while (iop_len > 0) {
2124                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2125                 *pQbuffer = readb(iop_data);
2126                 acb->rqbuf_putIndex++;
2127                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2128                 iop_data++;
2129                 iop_len--;
2130         }
2131         arcmsr_iop_message_read(acb);
2132         return 1;
2133 }
2134
2135 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2136 {
2137         unsigned long flags;
2138         struct QBUFFER __iomem  *prbuffer;
2139         int32_t buf_empty_len;
2140
2141         spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2142         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2143         buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
2144                 (ARCMSR_MAX_QBUFFER - 1);
2145         if (buf_empty_len >= readl(&prbuffer->data_len)) {
2146                 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2147                         acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2148         } else
2149                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2150         spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2151 }
2152
2153 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2154 {
2155         uint8_t *pQbuffer;
2156         struct QBUFFER __iomem *pwbuffer;
2157         uint8_t *buf1 = NULL;
2158         uint32_t __iomem *iop_data;
2159         uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2160
2161         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2162                 buf1 = kmalloc(128, GFP_ATOMIC);
2163                 buf2 = (uint32_t *)buf1;
2164                 if (buf1 == NULL)
2165                         return;
2166
2167                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2168                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2169                 iop_data = (uint32_t __iomem *)pwbuffer->data;
2170                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2171                         && (allxfer_len < 124)) {
2172                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2173                         *buf1 = *pQbuffer;
2174                         acb->wqbuf_getIndex++;
2175                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2176                         buf1++;
2177                         allxfer_len++;
2178                 }
2179                 data_len = allxfer_len;
2180                 buf1 = (uint8_t *)buf2;
2181                 while (data_len >= 4) {
2182                         data = *buf2++;
2183                         writel(data, iop_data);
2184                         iop_data++;
2185                         data_len -= 4;
2186                 }
2187                 if (data_len) {
2188                         data = *buf2;
2189                         writel(data, iop_data);
2190                 }
2191                 writel(allxfer_len, &pwbuffer->data_len);
2192                 kfree(buf1);
2193                 arcmsr_iop_message_wrote(acb);
2194         }
2195 }
2196
2197 void
2198 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2199 {
2200         uint8_t *pQbuffer;
2201         struct QBUFFER __iomem *pwbuffer;
2202         uint8_t __iomem *iop_data;
2203         int32_t allxfer_len = 0;
2204
2205         if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2206                 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2207                 return;
2208         }
2209         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2210                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2211                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2212                 iop_data = (uint8_t __iomem *)pwbuffer->data;
2213                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2214                         && (allxfer_len < 124)) {
2215                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2216                         writeb(*pQbuffer, iop_data);
2217                         acb->wqbuf_getIndex++;
2218                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2219                         iop_data++;
2220                         allxfer_len++;
2221                 }
2222                 writel(allxfer_len, &pwbuffer->data_len);
2223                 arcmsr_iop_message_wrote(acb);
2224         }
2225 }
2226
2227 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2228 {
2229         unsigned long flags;
2230
2231         spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2232         acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2233         if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2234                 arcmsr_write_ioctldata2iop(acb);
2235         if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2236                 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2237         spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2238 }
2239
2240 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2241 {
2242         uint32_t outbound_doorbell;
2243         struct MessageUnit_A __iomem *reg = acb->pmuA;
2244         outbound_doorbell = readl(&reg->outbound_doorbell);
2245         do {
2246                 writel(outbound_doorbell, &reg->outbound_doorbell);
2247                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2248                         arcmsr_iop2drv_data_wrote_handle(acb);
2249                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2250                         arcmsr_iop2drv_data_read_handle(acb);
2251                 outbound_doorbell = readl(&reg->outbound_doorbell);
2252         } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2253                 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2254 }
2255 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2256 {
2257         uint32_t outbound_doorbell;
2258         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2259         /*
2260         *******************************************************************
2261         **  Maybe here we need to check wrqbuffer_lock is lock or not
2262         **  DOORBELL: din! don!
2263         **  check if there are any mail need to pack from firmware
2264         *******************************************************************
2265         */
2266         outbound_doorbell = readl(&reg->outbound_doorbell);
2267         do {
2268                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2269                 readl(&reg->outbound_doorbell_clear);
2270                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2271                         arcmsr_iop2drv_data_wrote_handle(pACB);
2272                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2273                         arcmsr_iop2drv_data_read_handle(pACB);
2274                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2275                         arcmsr_hbaC_message_isr(pACB);
2276                 outbound_doorbell = readl(&reg->outbound_doorbell);
2277         } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2278                 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2279                 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2280 }
2281
2282 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2283 {
2284         uint32_t outbound_doorbell;
2285         struct MessageUnit_D  *pmu = pACB->pmuD;
2286
2287         outbound_doorbell = readl(pmu->outbound_doorbell);
2288         do {
2289                 writel(outbound_doorbell, pmu->outbound_doorbell);
2290                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2291                         arcmsr_hbaD_message_isr(pACB);
2292                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2293                         arcmsr_iop2drv_data_wrote_handle(pACB);
2294                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2295                         arcmsr_iop2drv_data_read_handle(pACB);
2296                 outbound_doorbell = readl(pmu->outbound_doorbell);
2297         } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2298                 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2299                 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2300 }
2301
2302 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2303 {
2304         uint32_t outbound_doorbell, in_doorbell, tmp;
2305         struct MessageUnit_E __iomem *reg = pACB->pmuE;
2306
2307         in_doorbell = readl(&reg->iobound_doorbell);
2308         outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2309         do {
2310                 writel(0, &reg->host_int_status); /* clear interrupt */
2311                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2312                         arcmsr_iop2drv_data_wrote_handle(pACB);
2313                 }
2314                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2315                         arcmsr_iop2drv_data_read_handle(pACB);
2316                 }
2317                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2318                         arcmsr_hbaE_message_isr(pACB);
2319                 }
2320                 tmp = in_doorbell;
2321                 in_doorbell = readl(&reg->iobound_doorbell);
2322                 outbound_doorbell = tmp ^ in_doorbell;
2323         } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2324                 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2325                 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2326         pACB->in_doorbell = in_doorbell;
2327 }
2328
2329 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2330 {
2331         uint32_t flag_ccb;
2332         struct MessageUnit_A __iomem *reg = acb->pmuA;
2333         struct ARCMSR_CDB *pARCMSR_CDB;
2334         struct CommandControlBlock *pCCB;
2335         bool error;
2336         while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
2337                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
2338                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2339                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2340                 arcmsr_drain_donequeue(acb, pCCB, error);
2341         }
2342 }
2343 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2344 {
2345         uint32_t index;
2346         uint32_t flag_ccb;
2347         struct MessageUnit_B *reg = acb->pmuB;
2348         struct ARCMSR_CDB *pARCMSR_CDB;
2349         struct CommandControlBlock *pCCB;
2350         bool error;
2351         index = reg->doneq_index;
2352         while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2353                 reg->done_qbuffer[index] = 0;
2354                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
2355                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2356                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2357                 arcmsr_drain_donequeue(acb, pCCB, error);
2358                 index++;
2359                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2360                 reg->doneq_index = index;
2361         }
2362 }
2363
2364 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2365 {
2366         struct MessageUnit_C __iomem *phbcmu;
2367         struct ARCMSR_CDB *arcmsr_cdb;
2368         struct CommandControlBlock *ccb;
2369         uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
2370         int error;
2371
2372         phbcmu = acb->pmuC;
2373         /* areca cdb command done */
2374         /* Use correct offset and size for syncing */
2375
2376         while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2377                         0xFFFFFFFF) {
2378                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2379                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2380                         + ccb_cdb_phy);
2381                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2382                         arcmsr_cdb);
2383                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2384                         ? true : false;
2385                 /* check if command done with no error */
2386                 arcmsr_drain_donequeue(acb, ccb, error);
2387                 throttling++;
2388                 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2389                         writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2390                                 &phbcmu->inbound_doorbell);
2391                         throttling = 0;
2392                 }
2393         }
2394 }
2395
2396 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2397 {
2398         u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2399         uint32_t addressLow, ccb_cdb_phy;
2400         int error;
2401         struct MessageUnit_D  *pmu;
2402         struct ARCMSR_CDB *arcmsr_cdb;
2403         struct CommandControlBlock *ccb;
2404         unsigned long flags;
2405
2406         spin_lock_irqsave(&acb->doneq_lock, flags);
2407         pmu = acb->pmuD;
2408         outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2409         doneq_index = pmu->doneq_index;
2410         if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2411                 do {
2412                         toggle = doneq_index & 0x4000;
2413                         index_stripped = (doneq_index & 0xFFF) + 1;
2414                         index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2415                         pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2416                                 ((toggle ^ 0x4000) + 1);
2417                         doneq_index = pmu->doneq_index;
2418                         addressLow = pmu->done_qbuffer[doneq_index &
2419                                 0xFFF].addressLow;
2420                         ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2421                         arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2422                                 + ccb_cdb_phy);
2423                         ccb = container_of(arcmsr_cdb,
2424                                 struct CommandControlBlock, arcmsr_cdb);
2425                         error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2426                                 ? true : false;
2427                         arcmsr_drain_donequeue(acb, ccb, error);
2428                         writel(doneq_index, pmu->outboundlist_read_pointer);
2429                 } while ((doneq_index & 0xFFF) !=
2430                         (outbound_write_pointer & 0xFFF));
2431         }
2432         writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2433                 pmu->outboundlist_interrupt_cause);
2434         readl(pmu->outboundlist_interrupt_cause);
2435         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2436 }
2437
2438 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2439 {
2440         uint32_t doneq_index;
2441         uint16_t cmdSMID;
2442         int error;
2443         struct MessageUnit_E __iomem *pmu;
2444         struct CommandControlBlock *ccb;
2445         unsigned long flags;
2446
2447         spin_lock_irqsave(&acb->doneq_lock, flags);
2448         doneq_index = acb->doneq_index;
2449         pmu = acb->pmuE;
2450         while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2451                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2452                 ccb = acb->pccb_pool[cmdSMID];
2453                 error = (acb->pCompletionQ[doneq_index].cmdFlag
2454                         & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2455                 arcmsr_drain_donequeue(acb, ccb, error);
2456                 doneq_index++;
2457                 if (doneq_index >= acb->completionQ_entry)
2458                         doneq_index = 0;
2459         }
2460         acb->doneq_index = doneq_index;
2461         writel(doneq_index, &pmu->reply_post_consumer_index);
2462         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2463 }
2464
2465 /*
2466 **********************************************************************************
2467 ** Handle a message interrupt
2468 **
2469 ** The only message interrupt we expect is in response to a query for the current adapter config.
2470 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2471 **********************************************************************************
2472 */
2473 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2474 {
2475         struct MessageUnit_A __iomem *reg  = acb->pmuA;
2476         /*clear interrupt and message state*/
2477         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2478         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2479                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2480 }
2481 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2482 {
2483         struct MessageUnit_B *reg  = acb->pmuB;
2484
2485         /*clear interrupt and message state*/
2486         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2487         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2488                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2489 }
2490 /*
2491 **********************************************************************************
2492 ** Handle a message interrupt
2493 **
2494 ** The only message interrupt we expect is in response to a query for the
2495 ** current adapter config.
2496 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2497 **********************************************************************************
2498 */
2499 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2500 {
2501         struct MessageUnit_C __iomem *reg  = acb->pmuC;
2502         /*clear interrupt and message state*/
2503         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2504         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2505                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2506 }
2507
2508 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2509 {
2510         struct MessageUnit_D *reg  = acb->pmuD;
2511
2512         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2513         readl(reg->outbound_doorbell);
2514         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2515                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2516 }
2517
2518 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2519 {
2520         struct MessageUnit_E __iomem *reg  = acb->pmuE;
2521
2522         writel(0, &reg->host_int_status);
2523         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2524                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2525 }
2526
2527 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2528 {
2529         uint32_t outbound_intstatus;
2530         struct MessageUnit_A __iomem *reg = acb->pmuA;
2531         outbound_intstatus = readl(&reg->outbound_intstatus) &
2532                 acb->outbound_int_enable;
2533         if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2534                 return IRQ_NONE;
2535         do {
2536                 writel(outbound_intstatus, &reg->outbound_intstatus);
2537                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2538                         arcmsr_hbaA_doorbell_isr(acb);
2539                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2540                         arcmsr_hbaA_postqueue_isr(acb);
2541                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2542                         arcmsr_hbaA_message_isr(acb);
2543                 outbound_intstatus = readl(&reg->outbound_intstatus) &
2544                         acb->outbound_int_enable;
2545         } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2546                 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2547                 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2548         return IRQ_HANDLED;
2549 }
2550
2551 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2552 {
2553         uint32_t outbound_doorbell;
2554         struct MessageUnit_B *reg = acb->pmuB;
2555         outbound_doorbell = readl(reg->iop2drv_doorbell) &
2556                                 acb->outbound_int_enable;
2557         if (!outbound_doorbell)
2558                 return IRQ_NONE;
2559         do {
2560                 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2561                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2562                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2563                         arcmsr_iop2drv_data_wrote_handle(acb);
2564                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2565                         arcmsr_iop2drv_data_read_handle(acb);
2566                 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2567                         arcmsr_hbaB_postqueue_isr(acb);
2568                 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2569                         arcmsr_hbaB_message_isr(acb);
2570                 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2571                         acb->outbound_int_enable;
2572         } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2573                 | ARCMSR_IOP2DRV_DATA_READ_OK
2574                 | ARCMSR_IOP2DRV_CDB_DONE
2575                 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2576         return IRQ_HANDLED;
2577 }
2578
2579 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2580 {
2581         uint32_t host_interrupt_status;
2582         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2583         /*
2584         *********************************************
2585         **   check outbound intstatus
2586         *********************************************
2587         */
2588         host_interrupt_status = readl(&phbcmu->host_int_status) &
2589                 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2590                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2591         if (!host_interrupt_status)
2592                 return IRQ_NONE;
2593         do {
2594                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2595                         arcmsr_hbaC_doorbell_isr(pACB);
2596                 /* MU post queue interrupts*/
2597                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2598                         arcmsr_hbaC_postqueue_isr(pACB);
2599                 host_interrupt_status = readl(&phbcmu->host_int_status);
2600         } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2601                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2602         return IRQ_HANDLED;
2603 }
2604
2605 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2606 {
2607         u32 host_interrupt_status;
2608         struct MessageUnit_D  *pmu = pACB->pmuD;
2609
2610         host_interrupt_status = readl(pmu->host_int_status) &
2611                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2612                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2613         if (!host_interrupt_status)
2614                 return IRQ_NONE;
2615         do {
2616                 /* MU post queue interrupts*/
2617                 if (host_interrupt_status &
2618                         ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2619                         arcmsr_hbaD_postqueue_isr(pACB);
2620                 if (host_interrupt_status &
2621                         ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2622                         arcmsr_hbaD_doorbell_isr(pACB);
2623                 host_interrupt_status = readl(pmu->host_int_status);
2624         } while (host_interrupt_status &
2625                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2626                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2627         return IRQ_HANDLED;
2628 }
2629
2630 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2631 {
2632         uint32_t host_interrupt_status;
2633         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2634
2635         host_interrupt_status = readl(&pmu->host_int_status) &
2636                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2637                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2638         if (!host_interrupt_status)
2639                 return IRQ_NONE;
2640         do {
2641                 /* MU ioctl transfer doorbell interrupts*/
2642                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2643                         arcmsr_hbaE_doorbell_isr(pACB);
2644                 }
2645                 /* MU post queue interrupts*/
2646                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2647                         arcmsr_hbaE_postqueue_isr(pACB);
2648                 }
2649                 host_interrupt_status = readl(&pmu->host_int_status);
2650         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2651                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2652         return IRQ_HANDLED;
2653 }
2654
2655 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2656 {
2657         switch (acb->adapter_type) {
2658         case ACB_ADAPTER_TYPE_A:
2659                 return arcmsr_hbaA_handle_isr(acb);
2660                 break;
2661         case ACB_ADAPTER_TYPE_B:
2662                 return arcmsr_hbaB_handle_isr(acb);
2663                 break;
2664         case ACB_ADAPTER_TYPE_C:
2665                 return arcmsr_hbaC_handle_isr(acb);
2666         case ACB_ADAPTER_TYPE_D:
2667                 return arcmsr_hbaD_handle_isr(acb);
2668         case ACB_ADAPTER_TYPE_E:
2669                 return arcmsr_hbaE_handle_isr(acb);
2670         default:
2671                 return IRQ_NONE;
2672         }
2673 }
2674
2675 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2676 {
2677         if (acb) {
2678                 /* stop adapter background rebuild */
2679                 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2680                         uint32_t intmask_org;
2681                         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2682                         intmask_org = arcmsr_disable_outbound_ints(acb);
2683                         arcmsr_stop_adapter_bgrb(acb);
2684                         arcmsr_flush_adapter_cache(acb);
2685                         arcmsr_enable_outbound_ints(acb, intmask_org);
2686                 }
2687         }
2688 }
2689
2690
2691 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2692 {
2693         uint32_t        i;
2694
2695         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2696                 for (i = 0; i < 15; i++) {
2697                         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2698                                 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2699                                 acb->rqbuf_getIndex = 0;
2700                                 acb->rqbuf_putIndex = 0;
2701                                 arcmsr_iop_message_read(acb);
2702                                 mdelay(30);
2703                         } else if (acb->rqbuf_getIndex !=
2704                                    acb->rqbuf_putIndex) {
2705                                 acb->rqbuf_getIndex = 0;
2706                                 acb->rqbuf_putIndex = 0;
2707                                 mdelay(30);
2708                         } else
2709                                 break;
2710                 }
2711         }
2712 }
2713
2714 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2715                 struct scsi_cmnd *cmd)
2716 {
2717         char *buffer;
2718         unsigned short use_sg;
2719         int retvalue = 0, transfer_len = 0;
2720         unsigned long flags;
2721         struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2722         uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2723                 (uint32_t)cmd->cmnd[6] << 16 |
2724                 (uint32_t)cmd->cmnd[7] << 8 |
2725                 (uint32_t)cmd->cmnd[8];
2726         struct scatterlist *sg;
2727
2728         use_sg = scsi_sg_count(cmd);
2729         sg = scsi_sglist(cmd);
2730         buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2731         if (use_sg > 1) {
2732                 retvalue = ARCMSR_MESSAGE_FAIL;
2733                 goto message_out;
2734         }
2735         transfer_len += sg->length;
2736         if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2737                 retvalue = ARCMSR_MESSAGE_FAIL;
2738                 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2739                 goto message_out;
2740         }
2741         pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2742         switch (controlcode) {
2743         case ARCMSR_MESSAGE_READ_RQBUFFER: {
2744                 unsigned char *ver_addr;
2745                 uint8_t *ptmpQbuffer;
2746                 uint32_t allxfer_len = 0;
2747                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2748                 if (!ver_addr) {
2749                         retvalue = ARCMSR_MESSAGE_FAIL;
2750                         pr_info("%s: memory not enough!\n", __func__);
2751                         goto message_out;
2752                 }
2753                 ptmpQbuffer = ver_addr;
2754                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2755                 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2756                         unsigned int tail = acb->rqbuf_getIndex;
2757                         unsigned int head = acb->rqbuf_putIndex;
2758                         unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2759
2760                         allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2761                         if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2762                                 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2763
2764                         if (allxfer_len <= cnt_to_end)
2765                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2766                         else {
2767                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2768                                 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2769                         }
2770                         acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2771                 }
2772                 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2773                         allxfer_len);
2774                 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2775                         struct QBUFFER __iomem *prbuffer;
2776                         acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2777                         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2778                         if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2779                                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2780                 }
2781                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2782                 kfree(ver_addr);
2783                 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2784                 if (acb->fw_flag == FW_DEADLOCK)
2785                         pcmdmessagefld->cmdmessage.ReturnCode =
2786                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2787                 else
2788                         pcmdmessagefld->cmdmessage.ReturnCode =
2789                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2790                 break;
2791         }
2792         case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2793                 unsigned char *ver_addr;
2794                 uint32_t user_len;
2795                 int32_t cnt2end;
2796                 uint8_t *pQbuffer, *ptmpuserbuffer;
2797
2798                 user_len = pcmdmessagefld->cmdmessage.Length;
2799                 if (user_len > ARCMSR_API_DATA_BUFLEN) {
2800                         retvalue = ARCMSR_MESSAGE_FAIL;
2801                         goto message_out;
2802                 }
2803
2804                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2805                 if (!ver_addr) {
2806                         retvalue = ARCMSR_MESSAGE_FAIL;
2807                         goto message_out;
2808                 }
2809                 ptmpuserbuffer = ver_addr;
2810
2811                 memcpy(ptmpuserbuffer,
2812                         pcmdmessagefld->messagedatabuffer, user_len);
2813                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2814                 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
2815                         struct SENSE_DATA *sensebuffer =
2816                                 (struct SENSE_DATA *)cmd->sense_buffer;
2817                         arcmsr_write_ioctldata2iop(acb);
2818                         /* has error report sensedata */
2819                         sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
2820                         sensebuffer->SenseKey = ILLEGAL_REQUEST;
2821                         sensebuffer->AdditionalSenseLength = 0x0A;
2822                         sensebuffer->AdditionalSenseCode = 0x20;
2823                         sensebuffer->Valid = 1;
2824                         retvalue = ARCMSR_MESSAGE_FAIL;
2825                 } else {
2826                         pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
2827                         cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
2828                         if (user_len > cnt2end) {
2829                                 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
2830                                 ptmpuserbuffer += cnt2end;
2831                                 user_len -= cnt2end;
2832                                 acb->wqbuf_putIndex = 0;
2833                                 pQbuffer = acb->wqbuffer;
2834                         }
2835                         memcpy(pQbuffer, ptmpuserbuffer, user_len);
2836                         acb->wqbuf_putIndex += user_len;
2837                         acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2838                         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2839                                 acb->acb_flags &=
2840                                                 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
2841                                 arcmsr_write_ioctldata2iop(acb);
2842                         }
2843                 }
2844                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2845                 kfree(ver_addr);
2846                 if (acb->fw_flag == FW_DEADLOCK)
2847                         pcmdmessagefld->cmdmessage.ReturnCode =
2848                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2849                 else
2850                         pcmdmessagefld->cmdmessage.ReturnCode =
2851                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2852                 break;
2853         }
2854         case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
2855                 uint8_t *pQbuffer = acb->rqbuffer;
2856
2857                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2858                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2859                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2860                 acb->rqbuf_getIndex = 0;
2861                 acb->rqbuf_putIndex = 0;
2862                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2863                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2864                 if (acb->fw_flag == FW_DEADLOCK)
2865                         pcmdmessagefld->cmdmessage.ReturnCode =
2866                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2867                 else
2868                         pcmdmessagefld->cmdmessage.ReturnCode =
2869                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2870                 break;
2871         }
2872         case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
2873                 uint8_t *pQbuffer = acb->wqbuffer;
2874                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2875                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2876                         ACB_F_MESSAGE_WQBUFFER_READED);
2877                 acb->wqbuf_getIndex = 0;
2878                 acb->wqbuf_putIndex = 0;
2879                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2880                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2881                 if (acb->fw_flag == FW_DEADLOCK)
2882                         pcmdmessagefld->cmdmessage.ReturnCode =
2883                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2884                 else
2885                         pcmdmessagefld->cmdmessage.ReturnCode =
2886                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2887                 break;
2888         }
2889         case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
2890                 uint8_t *pQbuffer;
2891                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2892                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2893                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2894                 acb->rqbuf_getIndex = 0;
2895                 acb->rqbuf_putIndex = 0;
2896                 pQbuffer = acb->rqbuffer;
2897                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2898                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2899                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2900                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2901                         ACB_F_MESSAGE_WQBUFFER_READED);
2902                 acb->wqbuf_getIndex = 0;
2903                 acb->wqbuf_putIndex = 0;
2904                 pQbuffer = acb->wqbuffer;
2905                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2906                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2907                 if (acb->fw_flag == FW_DEADLOCK)
2908                         pcmdmessagefld->cmdmessage.ReturnCode =
2909                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2910                 else
2911                         pcmdmessagefld->cmdmessage.ReturnCode =
2912                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2913                 break;
2914         }
2915         case ARCMSR_MESSAGE_RETURN_CODE_3F: {
2916                 if (acb->fw_flag == FW_DEADLOCK)
2917                         pcmdmessagefld->cmdmessage.ReturnCode =
2918                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2919                 else
2920                         pcmdmessagefld->cmdmessage.ReturnCode =
2921                                 ARCMSR_MESSAGE_RETURNCODE_3F;
2922                 break;
2923         }
2924         case ARCMSR_MESSAGE_SAY_HELLO: {
2925                 int8_t *hello_string = "Hello! I am ARCMSR";
2926                 if (acb->fw_flag == FW_DEADLOCK)
2927                         pcmdmessagefld->cmdmessage.ReturnCode =
2928                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2929                 else
2930                         pcmdmessagefld->cmdmessage.ReturnCode =
2931                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2932                 memcpy(pcmdmessagefld->messagedatabuffer,
2933                         hello_string, (int16_t)strlen(hello_string));
2934                 break;
2935         }
2936         case ARCMSR_MESSAGE_SAY_GOODBYE: {
2937                 if (acb->fw_flag == FW_DEADLOCK)
2938                         pcmdmessagefld->cmdmessage.ReturnCode =
2939                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2940                 else
2941                         pcmdmessagefld->cmdmessage.ReturnCode =
2942                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2943                 arcmsr_iop_parking(acb);
2944                 break;
2945         }
2946         case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
2947                 if (acb->fw_flag == FW_DEADLOCK)
2948                         pcmdmessagefld->cmdmessage.ReturnCode =
2949                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2950                 else
2951                         pcmdmessagefld->cmdmessage.ReturnCode =
2952                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2953                 arcmsr_flush_adapter_cache(acb);
2954                 break;
2955         }
2956         default:
2957                 retvalue = ARCMSR_MESSAGE_FAIL;
2958                 pr_info("%s: unknown controlcode!\n", __func__);
2959         }
2960 message_out:
2961         if (use_sg) {
2962                 struct scatterlist *sg = scsi_sglist(cmd);
2963                 kunmap_atomic(buffer - sg->offset);
2964         }
2965         return retvalue;
2966 }
2967
2968 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
2969 {
2970         struct list_head *head = &acb->ccb_free_list;
2971         struct CommandControlBlock *ccb = NULL;
2972         unsigned long flags;
2973         spin_lock_irqsave(&acb->ccblist_lock, flags);
2974         if (!list_empty(head)) {
2975                 ccb = list_entry(head->next, struct CommandControlBlock, list);
2976                 list_del_init(&ccb->list);
2977         }else{
2978                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2979                 return NULL;
2980         }
2981         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2982         return ccb;
2983 }
2984
2985 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2986                 struct scsi_cmnd *cmd)
2987 {
2988         switch (cmd->cmnd[0]) {
2989         case INQUIRY: {
2990                 unsigned char inqdata[36];
2991                 char *buffer;
2992                 struct scatterlist *sg;
2993
2994                 if (cmd->device->lun) {
2995                         cmd->result = (DID_TIME_OUT << 16);
2996                         cmd->scsi_done(cmd);
2997                         return;
2998                 }
2999                 inqdata[0] = TYPE_PROCESSOR;
3000                 /* Periph Qualifier & Periph Dev Type */
3001                 inqdata[1] = 0;
3002                 /* rem media bit & Dev Type Modifier */
3003                 inqdata[2] = 0;
3004                 /* ISO, ECMA, & ANSI versions */
3005                 inqdata[4] = 31;
3006                 /* length of additional data */
3007                 strncpy(&inqdata[8], "Areca   ", 8);
3008                 /* Vendor Identification */
3009                 strncpy(&inqdata[16], "RAID controller ", 16);
3010                 /* Product Identification */
3011                 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
3012
3013                 sg = scsi_sglist(cmd);
3014                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
3015
3016                 memcpy(buffer, inqdata, sizeof(inqdata));
3017                 sg = scsi_sglist(cmd);
3018                 kunmap_atomic(buffer - sg->offset);
3019
3020                 cmd->scsi_done(cmd);
3021         }
3022         break;
3023         case WRITE_BUFFER:
3024         case READ_BUFFER: {
3025                 if (arcmsr_iop_message_xfer(acb, cmd))
3026                         cmd->result = (DID_ERROR << 16);
3027                 cmd->scsi_done(cmd);
3028         }
3029         break;
3030         default:
3031                 cmd->scsi_done(cmd);
3032         }
3033 }
3034
3035 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
3036         void (* done)(struct scsi_cmnd *))
3037 {
3038         struct Scsi_Host *host = cmd->device->host;
3039         struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3040         struct CommandControlBlock *ccb;
3041         int target = cmd->device->id;
3042
3043         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3044                 cmd->result = (DID_NO_CONNECT << 16);
3045                 cmd->scsi_done(cmd);
3046                 return 0;
3047         }
3048         cmd->scsi_done = done;
3049         cmd->host_scribble = NULL;
3050         cmd->result = 0;
3051         if (target == 16) {
3052                 /* virtual device for iop message transfer */
3053                 arcmsr_handle_virtual_command(acb, cmd);
3054                 return 0;
3055         }
3056         ccb = arcmsr_get_freeccb(acb);
3057         if (!ccb)
3058                 return SCSI_MLQUEUE_HOST_BUSY;
3059         if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3060                 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
3061                 cmd->scsi_done(cmd);
3062                 return 0;
3063         }
3064         arcmsr_post_ccb(acb, ccb);
3065         return 0;
3066 }
3067
3068 static DEF_SCSI_QCMD(arcmsr_queue_command)
3069
3070 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3071 {
3072         int count;
3073         uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3074         uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3075         uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3076         uint32_t *firm_model = &rwbuffer[15];
3077         uint32_t *firm_version = &rwbuffer[17];
3078         uint32_t *device_map = &rwbuffer[21];
3079
3080         count = 2;
3081         while (count) {
3082                 *acb_firm_model = readl(firm_model);
3083                 acb_firm_model++;
3084                 firm_model++;
3085                 count--;
3086         }
3087         count = 4;
3088         while (count) {
3089                 *acb_firm_version = readl(firm_version);
3090                 acb_firm_version++;
3091                 firm_version++;
3092                 count--;
3093         }
3094         count = 4;
3095         while (count) {
3096                 *acb_device_map = readl(device_map);
3097                 acb_device_map++;
3098                 device_map++;
3099                 count--;
3100         }
3101         pACB->signature = readl(&rwbuffer[0]);
3102         pACB->firm_request_len = readl(&rwbuffer[1]);
3103         pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3104         pACB->firm_sdram_size = readl(&rwbuffer[3]);
3105         pACB->firm_hd_channels = readl(&rwbuffer[4]);
3106         pACB->firm_cfg_version = readl(&rwbuffer[25]);
3107         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3108                 pACB->host->host_no,
3109                 pACB->firm_model,
3110                 pACB->firm_version);
3111 }
3112
3113 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3114 {
3115         struct MessageUnit_A __iomem *reg = acb->pmuA;
3116
3117         arcmsr_wait_firmware_ready(acb);
3118         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3119         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3120                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3121                         miscellaneous data' timeout \n", acb->host->host_no);
3122                 return false;
3123         }
3124         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3125         return true;
3126 }
3127 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3128 {
3129         struct MessageUnit_B *reg = acb->pmuB;
3130
3131         arcmsr_wait_firmware_ready(acb);
3132         writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3133         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3134                 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3135                 return false;
3136         }
3137         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3138         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3139                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3140                         miscellaneous data' timeout \n", acb->host->host_no);
3141                 return false;
3142         }
3143         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3144         return true;
3145 }
3146
3147 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3148 {
3149         uint32_t intmask_org;
3150         struct MessageUnit_C __iomem *reg = pACB->pmuC;
3151
3152         /* disable all outbound interrupt */
3153         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3154         writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3155         /* wait firmware ready */
3156         arcmsr_wait_firmware_ready(pACB);
3157         /* post "get config" instruction */
3158         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3159         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3160         /* wait message ready */
3161         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3162                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3163                         miscellaneous data' timeout \n", pACB->host->host_no);
3164                 return false;
3165         }
3166         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3167         return true;
3168 }
3169
3170 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3171 {
3172         struct MessageUnit_D *reg = acb->pmuD;
3173
3174         if (readl(acb->pmuD->outbound_doorbell) &
3175                 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3176                 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3177                         acb->pmuD->outbound_doorbell);/*clear interrupt*/
3178         }
3179         arcmsr_wait_firmware_ready(acb);
3180         /* post "get config" instruction */
3181         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3182         /* wait message ready */
3183         if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3184                 pr_notice("arcmsr%d: wait get adapter firmware "
3185                         "miscellaneous data timeout\n", acb->host->host_no);
3186                 return false;
3187         }
3188         arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3189         return true;
3190 }
3191
3192 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3193 {
3194         struct MessageUnit_E __iomem *reg = pACB->pmuE;
3195         uint32_t intmask_org;
3196
3197         /* disable all outbound interrupt */
3198         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3199         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3200         /* wait firmware ready */
3201         arcmsr_wait_firmware_ready(pACB);
3202         mdelay(20);
3203         /* post "get config" instruction */
3204         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3205
3206         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3207         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3208         /* wait message ready */
3209         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3210                 pr_notice("arcmsr%d: wait get adapter firmware "
3211                         "miscellaneous data timeout\n", pACB->host->host_no);
3212                 return false;
3213         }
3214         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3215         return true;
3216 }
3217
3218 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3219 {
3220         bool rtn = false;
3221
3222         switch (acb->adapter_type) {
3223         case ACB_ADAPTER_TYPE_A:
3224                 rtn = arcmsr_hbaA_get_config(acb);
3225                 break;
3226         case ACB_ADAPTER_TYPE_B:
3227                 rtn = arcmsr_hbaB_get_config(acb);
3228                 break;
3229         case ACB_ADAPTER_TYPE_C:
3230                 rtn = arcmsr_hbaC_get_config(acb);
3231                 break;
3232         case ACB_ADAPTER_TYPE_D:
3233                 rtn = arcmsr_hbaD_get_config(acb);
3234                 break;
3235         case ACB_ADAPTER_TYPE_E:
3236                 rtn = arcmsr_hbaE_get_config(acb);
3237                 break;
3238         default:
3239                 break;
3240         }
3241         acb->maxOutstanding = acb->firm_numbers_queue - 1;
3242         if (acb->host->can_queue >= acb->firm_numbers_queue)
3243                 acb->host->can_queue = acb->maxOutstanding;
3244         else
3245                 acb->maxOutstanding = acb->host->can_queue;
3246         acb->maxFreeCCB = acb->host->can_queue;
3247         if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3248                 acb->maxFreeCCB += 64;
3249         return rtn;
3250 }
3251
3252 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3253         struct CommandControlBlock *poll_ccb)
3254 {
3255         struct MessageUnit_A __iomem *reg = acb->pmuA;
3256         struct CommandControlBlock *ccb;
3257         struct ARCMSR_CDB *arcmsr_cdb;
3258         uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3259         int rtn;
3260         bool error;
3261         polling_hba_ccb_retry:
3262         poll_count++;
3263         outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
3264         writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
3265         while (1) {
3266                 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
3267                         if (poll_ccb_done){
3268                                 rtn = SUCCESS;
3269                                 break;
3270                         }else {
3271                                 msleep(25);
3272                                 if (poll_count > 100){
3273                                         rtn = FAILED;
3274                                         break;
3275                                 }
3276                                 goto polling_hba_ccb_retry;
3277                         }
3278                 }
3279                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3280                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3281                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3282                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3283                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3284                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3285                                         " poll command abort successfully \n"
3286                                         , acb->host->host_no
3287                                         , ccb->pcmd->device->id
3288                                         , (u32)ccb->pcmd->device->lun
3289                                         , ccb);
3290                                 ccb->pcmd->result = DID_ABORT << 16;
3291                                 arcmsr_ccb_complete(ccb);
3292                                 continue;
3293                         }
3294                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3295                                 " command done ccb = '0x%p'"
3296                                 "ccboutstandingcount = %d \n"
3297                                 , acb->host->host_no
3298                                 , ccb
3299                                 , atomic_read(&acb->ccboutstandingcount));
3300                         continue;
3301                 }
3302                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3303                 arcmsr_report_ccb_state(acb, ccb, error);
3304         }
3305         return rtn;
3306 }
3307
3308 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3309                                         struct CommandControlBlock *poll_ccb)
3310 {
3311         struct MessageUnit_B *reg = acb->pmuB;
3312         struct ARCMSR_CDB *arcmsr_cdb;
3313         struct CommandControlBlock *ccb;
3314         uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3315         int index, rtn;
3316         bool error;
3317         polling_hbb_ccb_retry:
3318
3319         poll_count++;
3320         /* clear doorbell interrupt */
3321         writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3322         while(1){
3323                 index = reg->doneq_index;
3324                 flag_ccb = reg->done_qbuffer[index];
3325                 if (flag_ccb == 0) {
3326                         if (poll_ccb_done){
3327                                 rtn = SUCCESS;
3328                                 break;
3329                         }else {
3330                                 msleep(25);
3331                                 if (poll_count > 100){
3332                                         rtn = FAILED;
3333                                         break;
3334                                 }
3335                                 goto polling_hbb_ccb_retry;
3336                         }
3337                 }
3338                 reg->done_qbuffer[index] = 0;
3339                 index++;
3340                 /*if last index number set it to 0 */
3341                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3342                 reg->doneq_index = index;
3343                 /* check if command done with no error*/
3344                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3345                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3346                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3347                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3348                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3349                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3350                                         " poll command abort successfully \n"
3351                                         ,acb->host->host_no
3352                                         ,ccb->pcmd->device->id
3353                                         ,(u32)ccb->pcmd->device->lun
3354                                         ,ccb);
3355                                 ccb->pcmd->result = DID_ABORT << 16;
3356                                 arcmsr_ccb_complete(ccb);
3357                                 continue;
3358                         }
3359                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3360                                 " command done ccb = '0x%p'"
3361                                 "ccboutstandingcount = %d \n"
3362                                 , acb->host->host_no
3363                                 , ccb
3364                                 , atomic_read(&acb->ccboutstandingcount));
3365                         continue;
3366                 }
3367                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3368                 arcmsr_report_ccb_state(acb, ccb, error);
3369         }
3370         return rtn;
3371 }
3372
3373 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3374                 struct CommandControlBlock *poll_ccb)
3375 {
3376         struct MessageUnit_C __iomem *reg = acb->pmuC;
3377         uint32_t flag_ccb, ccb_cdb_phy;
3378         struct ARCMSR_CDB *arcmsr_cdb;
3379         bool error;
3380         struct CommandControlBlock *pCCB;
3381         uint32_t poll_ccb_done = 0, poll_count = 0;
3382         int rtn;
3383 polling_hbc_ccb_retry:
3384         poll_count++;
3385         while (1) {
3386                 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3387                         if (poll_ccb_done) {
3388                                 rtn = SUCCESS;
3389                                 break;
3390                         } else {
3391                                 msleep(25);
3392                                 if (poll_count > 100) {
3393                                         rtn = FAILED;
3394                                         break;
3395                                 }
3396                                 goto polling_hbc_ccb_retry;
3397                         }
3398                 }
3399                 flag_ccb = readl(&reg->outbound_queueport_low);
3400                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3401                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
3402                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3403                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3404                 /* check ifcommand done with no error*/
3405                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3406                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3407                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3408                                         " poll command abort successfully \n"
3409                                         , acb->host->host_no
3410                                         , pCCB->pcmd->device->id
3411                                         , (u32)pCCB->pcmd->device->lun
3412                                         , pCCB);
3413                                         pCCB->pcmd->result = DID_ABORT << 16;
3414                                         arcmsr_ccb_complete(pCCB);
3415                                 continue;
3416                         }
3417                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3418                                 " command done ccb = '0x%p'"
3419                                 "ccboutstandingcount = %d \n"
3420                                 , acb->host->host_no
3421                                 , pCCB
3422                                 , atomic_read(&acb->ccboutstandingcount));
3423                         continue;
3424                 }
3425                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3426                 arcmsr_report_ccb_state(acb, pCCB, error);
3427         }
3428         return rtn;
3429 }
3430
3431 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3432                                 struct CommandControlBlock *poll_ccb)
3433 {
3434         bool error;
3435         uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy;
3436         int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3437         unsigned long flags;
3438         struct ARCMSR_CDB *arcmsr_cdb;
3439         struct CommandControlBlock *pCCB;
3440         struct MessageUnit_D *pmu = acb->pmuD;
3441
3442 polling_hbaD_ccb_retry:
3443         poll_count++;
3444         while (1) {
3445                 spin_lock_irqsave(&acb->doneq_lock, flags);
3446                 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3447                 doneq_index = pmu->doneq_index;
3448                 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3449                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3450                         if (poll_ccb_done) {
3451                                 rtn = SUCCESS;
3452                                 break;
3453                         } else {
3454                                 msleep(25);
3455                                 if (poll_count > 40) {
3456                                         rtn = FAILED;
3457                                         break;
3458                                 }
3459                                 goto polling_hbaD_ccb_retry;
3460                         }
3461                 }
3462                 toggle = doneq_index & 0x4000;
3463                 index_stripped = (doneq_index & 0xFFF) + 1;
3464                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3465                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3466                                 ((toggle ^ 0x4000) + 1);
3467                 doneq_index = pmu->doneq_index;
3468                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3469                 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3470                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3471                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3472                         ccb_cdb_phy);
3473                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3474                         arcmsr_cdb);
3475                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3476                 if ((pCCB->acb != acb) ||
3477                         (pCCB->startdone != ARCMSR_CCB_START)) {
3478                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3479                                 pr_notice("arcmsr%d: scsi id = %d "
3480                                         "lun = %d ccb = '0x%p' poll command "
3481                                         "abort successfully\n"
3482                                         , acb->host->host_no
3483                                         , pCCB->pcmd->device->id
3484                                         , (u32)pCCB->pcmd->device->lun
3485                                         , pCCB);
3486                                 pCCB->pcmd->result = DID_ABORT << 16;
3487                                 arcmsr_ccb_complete(pCCB);
3488                                 continue;
3489                         }
3490                         pr_notice("arcmsr%d: polling an illegal "
3491                                 "ccb command done ccb = '0x%p' "
3492                                 "ccboutstandingcount = %d\n"
3493                                 , acb->host->host_no
3494                                 , pCCB
3495                                 , atomic_read(&acb->ccboutstandingcount));
3496                         continue;
3497                 }
3498                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3499                         ? true : false;
3500                 arcmsr_report_ccb_state(acb, pCCB, error);
3501         }
3502         return rtn;
3503 }
3504
3505 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3506                                 struct CommandControlBlock *poll_ccb)
3507 {
3508         bool error;
3509         uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3510         uint16_t cmdSMID;
3511         unsigned long flags;
3512         int rtn;
3513         struct CommandControlBlock *pCCB;
3514         struct MessageUnit_E __iomem *reg = acb->pmuE;
3515
3516         polling_hbaC_ccb_retry:
3517         poll_count++;
3518         while (1) {
3519                 spin_lock_irqsave(&acb->doneq_lock, flags);
3520                 doneq_index = acb->doneq_index;
3521                 if ((readl(&reg->reply_post_producer_index) & 0xFFFF) ==
3522                                 doneq_index) {
3523                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3524                         if (poll_ccb_done) {
3525                                 rtn = SUCCESS;
3526                                 break;
3527                         } else {
3528                                 msleep(25);
3529                                 if (poll_count > 40) {
3530                                         rtn = FAILED;
3531                                         break;
3532                                 }
3533                                 goto polling_hbaC_ccb_retry;
3534                         }
3535                 }
3536                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3537                 doneq_index++;
3538                 if (doneq_index >= acb->completionQ_entry)
3539                         doneq_index = 0;
3540                 acb->doneq_index = doneq_index;
3541                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3542                 pCCB = acb->pccb_pool[cmdSMID];
3543                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3544                 /* check if command done with no error*/
3545                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3546                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3547                                 pr_notice("arcmsr%d: scsi id = %d "
3548                                         "lun = %d ccb = '0x%p' poll command "
3549                                         "abort successfully\n"
3550                                         , acb->host->host_no
3551                                         , pCCB->pcmd->device->id
3552                                         , (u32)pCCB->pcmd->device->lun
3553                                         , pCCB);
3554                                 pCCB->pcmd->result = DID_ABORT << 16;
3555                                 arcmsr_ccb_complete(pCCB);
3556                                 continue;
3557                         }
3558                         pr_notice("arcmsr%d: polling an illegal "
3559                                 "ccb command done ccb = '0x%p' "
3560                                 "ccboutstandingcount = %d\n"
3561                                 , acb->host->host_no
3562                                 , pCCB
3563                                 , atomic_read(&acb->ccboutstandingcount));
3564                         continue;
3565                 }
3566                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3567                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3568                 arcmsr_report_ccb_state(acb, pCCB, error);
3569         }
3570         writel(doneq_index, &reg->reply_post_consumer_index);
3571         return rtn;
3572 }
3573
3574 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3575                                         struct CommandControlBlock *poll_ccb)
3576 {
3577         int rtn = 0;
3578         switch (acb->adapter_type) {
3579
3580         case ACB_ADAPTER_TYPE_A: {
3581                 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3582                 }
3583                 break;
3584
3585         case ACB_ADAPTER_TYPE_B: {
3586                 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3587                 }
3588                 break;
3589         case ACB_ADAPTER_TYPE_C: {
3590                 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3591                 }
3592                 break;
3593         case ACB_ADAPTER_TYPE_D:
3594                 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3595                 break;
3596         case ACB_ADAPTER_TYPE_E:
3597                 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3598                 break;
3599         }
3600         return rtn;
3601 }
3602
3603 static void arcmsr_set_iop_datetime(struct timer_list *t)
3604 {
3605         struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3606         unsigned int next_time;
3607         struct tm tm;
3608
3609         union {
3610                 struct  {
3611                 uint16_t        signature;
3612                 uint8_t         year;
3613                 uint8_t         month;
3614                 uint8_t         date;
3615                 uint8_t         hour;
3616                 uint8_t         minute;
3617                 uint8_t         second;
3618                 } a;
3619                 struct  {
3620                 uint32_t        msg_time[2];
3621                 } b;
3622         } datetime;
3623
3624         time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3625
3626         datetime.a.signature = 0x55AA;
3627         datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3628         datetime.a.month = tm.tm_mon;
3629         datetime.a.date = tm.tm_mday;
3630         datetime.a.hour = tm.tm_hour;
3631         datetime.a.minute = tm.tm_min;
3632         datetime.a.second = tm.tm_sec;
3633
3634         switch (pacb->adapter_type) {
3635                 case ACB_ADAPTER_TYPE_A: {
3636                         struct MessageUnit_A __iomem *reg = pacb->pmuA;
3637                         writel(datetime.b.msg_time[0], &reg->message_rwbuffer[0]);
3638                         writel(datetime.b.msg_time[1], &reg->message_rwbuffer[1]);
3639                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3640                         break;
3641                 }
3642                 case ACB_ADAPTER_TYPE_B: {
3643                         uint32_t __iomem *rwbuffer;
3644                         struct MessageUnit_B *reg = pacb->pmuB;
3645                         rwbuffer = reg->message_rwbuffer;
3646                         writel(datetime.b.msg_time[0], rwbuffer++);
3647                         writel(datetime.b.msg_time[1], rwbuffer++);
3648                         writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3649                         break;
3650                 }
3651                 case ACB_ADAPTER_TYPE_C: {
3652                         struct MessageUnit_C __iomem *reg = pacb->pmuC;
3653                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3654                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3655                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3656                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3657                         break;
3658                 }
3659                 case ACB_ADAPTER_TYPE_D: {
3660                         uint32_t __iomem *rwbuffer;
3661                         struct MessageUnit_D *reg = pacb->pmuD;
3662                         rwbuffer = reg->msgcode_rwbuffer;
3663                         writel(datetime.b.msg_time[0], rwbuffer++);
3664                         writel(datetime.b.msg_time[1], rwbuffer++);
3665                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3666                         break;
3667                 }
3668                 case ACB_ADAPTER_TYPE_E: {
3669                         struct MessageUnit_E __iomem *reg = pacb->pmuE;
3670                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3671                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3672                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3673                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3674                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3675                         break;
3676                 }
3677         }
3678         if (sys_tz.tz_minuteswest)
3679                 next_time = ARCMSR_HOURS;
3680         else
3681                 next_time = ARCMSR_MINUTES;
3682         mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
3683 }
3684
3685 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3686 {
3687         uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3688         dma_addr_t dma_coherent_handle;
3689
3690         /*
3691         ********************************************************************
3692         ** here we need to tell iop 331 our freeccb.HighPart
3693         ** if freeccb.HighPart is not zero
3694         ********************************************************************
3695         */
3696         switch (acb->adapter_type) {
3697         case ACB_ADAPTER_TYPE_B:
3698         case ACB_ADAPTER_TYPE_D:
3699                 dma_coherent_handle = acb->dma_coherent_handle2;
3700                 break;
3701         case ACB_ADAPTER_TYPE_E:
3702                 dma_coherent_handle = acb->dma_coherent_handle +
3703                         offsetof(struct CommandControlBlock, arcmsr_cdb);
3704                 break;
3705         default:
3706                 dma_coherent_handle = acb->dma_coherent_handle;
3707                 break;
3708         }
3709         cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3710         cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3711         acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3712         acb->cdb_phyadd_hipart = ((uint64_t)cdb_phyaddr_hi32) << 32;
3713         /*
3714         ***********************************************************************
3715         **    if adapter type B, set window of "post command Q"
3716         ***********************************************************************
3717         */
3718         switch (acb->adapter_type) {
3719
3720         case ACB_ADAPTER_TYPE_A: {
3721                 if (cdb_phyaddr_hi32 != 0) {
3722                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3723                         writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3724                                                 &reg->message_rwbuffer[0]);
3725                         writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
3726                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3727                                                         &reg->inbound_msgaddr0);
3728                         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3729                                 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3730                                 part physical address timeout\n",
3731                                 acb->host->host_no);
3732                                 return 1;
3733                         }
3734                 }
3735                 }
3736                 break;
3737
3738         case ACB_ADAPTER_TYPE_B: {
3739                 uint32_t __iomem *rwbuffer;
3740
3741                 struct MessageUnit_B *reg = acb->pmuB;
3742                 reg->postq_index = 0;
3743                 reg->doneq_index = 0;
3744                 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
3745                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3746                         printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
3747                                 acb->host->host_no);
3748                         return 1;
3749                 }
3750                 rwbuffer = reg->message_rwbuffer;
3751                 /* driver "set config" signature */
3752                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3753                 /* normal should be zero */
3754                 writel(cdb_phyaddr_hi32, rwbuffer++);
3755                 /* postQ size (256 + 8)*4        */
3756                 writel(cdb_phyaddr, rwbuffer++);
3757                 /* doneQ size (256 + 8)*4        */
3758                 writel(cdb_phyaddr + 1056, rwbuffer++);
3759                 /* ccb maxQ size must be --> [(256 + 8)*4]*/
3760                 writel(1056, rwbuffer);
3761
3762                 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
3763                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3764                         printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3765                         timeout \n",acb->host->host_no);
3766                         return 1;
3767                 }
3768                 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3769                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3770                         pr_err("arcmsr%d: can't set driver mode.\n",
3771                                 acb->host->host_no);
3772                         return 1;
3773                 }
3774                 }
3775                 break;
3776         case ACB_ADAPTER_TYPE_C: {
3777                 if (cdb_phyaddr_hi32 != 0) {
3778                         struct MessageUnit_C __iomem *reg = acb->pmuC;
3779
3780                         printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
3781                                         acb->adapter_index, cdb_phyaddr_hi32);
3782                         writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3783                         writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
3784                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3785                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3786                         if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
3787                                 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3788                                 timeout \n", acb->host->host_no);
3789                                 return 1;
3790                         }
3791                 }
3792                 }
3793                 break;
3794         case ACB_ADAPTER_TYPE_D: {
3795                 uint32_t __iomem *rwbuffer;
3796                 struct MessageUnit_D *reg = acb->pmuD;
3797                 reg->postq_index = 0;
3798                 reg->doneq_index = 0;
3799                 rwbuffer = reg->msgcode_rwbuffer;
3800                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3801                 writel(cdb_phyaddr_hi32, rwbuffer++);
3802                 writel(cdb_phyaddr, rwbuffer++);
3803                 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
3804                         sizeof(struct InBound_SRB)), rwbuffer++);
3805                 writel(0x100, rwbuffer);
3806                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
3807                 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3808                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
3809                                 acb->host->host_no);
3810                         return 1;
3811                 }
3812                 }
3813                 break;
3814         case ACB_ADAPTER_TYPE_E: {
3815                 struct MessageUnit_E __iomem *reg = acb->pmuE;
3816                 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3817                 writel(ARCMSR_SIGNATURE_1884, &reg->msgcode_rwbuffer[1]);
3818                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
3819                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
3820                 writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
3821                 dma_coherent_handle = acb->dma_coherent_handle2;
3822                 cdb_phyaddr = (uint32_t)(dma_coherent_handle & 0xffffffff);
3823                 cdb_phyaddr_hi32 = (uint32_t)((dma_coherent_handle >> 16) >> 16);
3824                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[5]);
3825                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[6]);
3826                 writel(acb->ioqueue_size, &reg->msgcode_rwbuffer[7]);
3827                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3828                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3829                 writel(acb->out_doorbell, &reg->iobound_doorbell);
3830                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
3831                         pr_notice("arcmsr%d: 'set command Q window' timeout \n",
3832                                 acb->host->host_no);
3833                         return 1;
3834                 }
3835                 }
3836                 break;
3837         }
3838         return 0;
3839 }
3840
3841 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
3842 {
3843         uint32_t firmware_state = 0;
3844         switch (acb->adapter_type) {
3845
3846         case ACB_ADAPTER_TYPE_A: {
3847                 struct MessageUnit_A __iomem *reg = acb->pmuA;
3848                 do {
3849                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3850                                 msleep(20);
3851                         firmware_state = readl(&reg->outbound_msgaddr1);
3852                 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
3853                 }
3854                 break;
3855
3856         case ACB_ADAPTER_TYPE_B: {
3857                 struct MessageUnit_B *reg = acb->pmuB;
3858                 do {
3859                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3860                                 msleep(20);
3861                         firmware_state = readl(reg->iop2drv_doorbell);
3862                 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
3863                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
3864                 }
3865                 break;
3866         case ACB_ADAPTER_TYPE_C: {
3867                 struct MessageUnit_C __iomem *reg = acb->pmuC;
3868                 do {
3869                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3870                                 msleep(20);
3871                         firmware_state = readl(&reg->outbound_msgaddr1);
3872                 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
3873                 }
3874                 break;
3875         case ACB_ADAPTER_TYPE_D: {
3876                 struct MessageUnit_D *reg = acb->pmuD;
3877                 do {
3878                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3879                                 msleep(20);
3880                         firmware_state = readl(reg->outbound_msgaddr1);
3881                 } while ((firmware_state &
3882                         ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
3883                 }
3884                 break;
3885         case ACB_ADAPTER_TYPE_E: {
3886                 struct MessageUnit_E __iomem *reg = acb->pmuE;
3887                 do {
3888                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3889                                 msleep(20);
3890                         firmware_state = readl(&reg->outbound_msgaddr1);
3891                 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
3892                 }
3893                 break;
3894         }
3895 }
3896
3897 static void arcmsr_request_device_map(struct timer_list *t)
3898 {
3899         struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
3900         if (unlikely(atomic_read(&acb->rq_map_token) == 0) ||
3901                 (acb->acb_flags & ACB_F_BUS_RESET) ||
3902                 (acb->acb_flags & ACB_F_ABORT)) {
3903                 mod_timer(&acb->eternal_timer,
3904                         jiffies + msecs_to_jiffies(6 * HZ));
3905         } else {
3906                 acb->fw_flag = FW_NORMAL;
3907                 if (atomic_read(&acb->ante_token_value) ==
3908                         atomic_read(&acb->rq_map_token)) {
3909                         atomic_set(&acb->rq_map_token, 16);
3910                 }
3911                 atomic_set(&acb->ante_token_value,
3912                         atomic_read(&acb->rq_map_token));
3913                 if (atomic_dec_and_test(&acb->rq_map_token)) {
3914                         mod_timer(&acb->eternal_timer, jiffies +
3915                                 msecs_to_jiffies(6 * HZ));
3916                         return;
3917                 }
3918                 switch (acb->adapter_type) {
3919                 case ACB_ADAPTER_TYPE_A: {
3920                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3921                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3922                         break;
3923                         }
3924                 case ACB_ADAPTER_TYPE_B: {
3925                         struct MessageUnit_B *reg = acb->pmuB;
3926                         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3927                         break;
3928                         }
3929                 case ACB_ADAPTER_TYPE_C: {
3930                         struct MessageUnit_C __iomem *reg = acb->pmuC;
3931                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3932                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3933                         break;
3934                         }
3935                 case ACB_ADAPTER_TYPE_D: {
3936                         struct MessageUnit_D *reg = acb->pmuD;
3937                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3938                         break;
3939                         }
3940                 case ACB_ADAPTER_TYPE_E: {
3941                         struct MessageUnit_E __iomem *reg = acb->pmuE;
3942                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3943                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3944                         writel(acb->out_doorbell, &reg->iobound_doorbell);
3945                         break;
3946                         }
3947                 default:
3948                         return;
3949                 }
3950                 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
3951                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3952         }
3953 }
3954
3955 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
3956 {
3957         struct MessageUnit_A __iomem *reg = acb->pmuA;
3958         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3959         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
3960         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3961                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3962                                 rebuild' timeout \n", acb->host->host_no);
3963         }
3964 }
3965
3966 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
3967 {
3968         struct MessageUnit_B *reg = acb->pmuB;
3969         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3970         writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
3971         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3972                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3973                                 rebuild' timeout \n",acb->host->host_no);
3974         }
3975 }
3976
3977 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
3978 {
3979         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
3980         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3981         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
3982         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
3983         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3984                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3985                                 rebuild' timeout \n", pACB->host->host_no);
3986         }
3987         return;
3988 }
3989
3990 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
3991 {
3992         struct MessageUnit_D *pmu = pACB->pmuD;
3993
3994         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3995         writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
3996         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
3997                 pr_notice("arcmsr%d: wait 'start adapter "
3998                         "background rebuild' timeout\n", pACB->host->host_no);
3999         }
4000 }
4001
4002 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
4003 {
4004         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
4005
4006         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4007         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
4008         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4009         writel(pACB->out_doorbell, &pmu->iobound_doorbell);
4010         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
4011                 pr_notice("arcmsr%d: wait 'start adapter "
4012                         "background rebuild' timeout \n", pACB->host->host_no);
4013         }
4014 }
4015
4016 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
4017 {
4018         switch (acb->adapter_type) {
4019         case ACB_ADAPTER_TYPE_A:
4020                 arcmsr_hbaA_start_bgrb(acb);
4021                 break;
4022         case ACB_ADAPTER_TYPE_B:
4023                 arcmsr_hbaB_start_bgrb(acb);
4024                 break;
4025         case ACB_ADAPTER_TYPE_C:
4026                 arcmsr_hbaC_start_bgrb(acb);
4027                 break;
4028         case ACB_ADAPTER_TYPE_D:
4029                 arcmsr_hbaD_start_bgrb(acb);
4030                 break;
4031         case ACB_ADAPTER_TYPE_E:
4032                 arcmsr_hbaE_start_bgrb(acb);
4033                 break;
4034         }
4035 }
4036
4037 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
4038 {
4039         switch (acb->adapter_type) {
4040         case ACB_ADAPTER_TYPE_A: {
4041                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4042                 uint32_t outbound_doorbell;
4043                 /* empty doorbell Qbuffer if door bell ringed */
4044                 outbound_doorbell = readl(&reg->outbound_doorbell);
4045                 /*clear doorbell interrupt */
4046                 writel(outbound_doorbell, &reg->outbound_doorbell);
4047                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
4048                 }
4049                 break;
4050
4051         case ACB_ADAPTER_TYPE_B: {
4052                 struct MessageUnit_B *reg = acb->pmuB;
4053                 uint32_t outbound_doorbell, i;
4054                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4055                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4056                 /* let IOP know data has been read */
4057                 for(i=0; i < 200; i++) {
4058                         msleep(20);
4059                         outbound_doorbell = readl(reg->iop2drv_doorbell);
4060                         if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4061                                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4062                                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4063                         } else
4064                                 break;
4065                 }
4066                 }
4067                 break;
4068         case ACB_ADAPTER_TYPE_C: {
4069                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4070                 uint32_t outbound_doorbell, i;
4071                 /* empty doorbell Qbuffer if door bell ringed */
4072                 outbound_doorbell = readl(&reg->outbound_doorbell);
4073                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
4074                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
4075                 for (i = 0; i < 200; i++) {
4076                         msleep(20);
4077                         outbound_doorbell = readl(&reg->outbound_doorbell);
4078                         if (outbound_doorbell &
4079                                 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4080                                 writel(outbound_doorbell,
4081                                         &reg->outbound_doorbell_clear);
4082                                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4083                                         &reg->inbound_doorbell);
4084                         } else
4085                                 break;
4086                 }
4087                 }
4088                 break;
4089         case ACB_ADAPTER_TYPE_D: {
4090                 struct MessageUnit_D *reg = acb->pmuD;
4091                 uint32_t outbound_doorbell, i;
4092                 /* empty doorbell Qbuffer if door bell ringed */
4093                 outbound_doorbell = readl(reg->outbound_doorbell);
4094                 writel(outbound_doorbell, reg->outbound_doorbell);
4095                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4096                         reg->inbound_doorbell);
4097                 for (i = 0; i < 200; i++) {
4098                         msleep(20);
4099                         outbound_doorbell = readl(reg->outbound_doorbell);
4100                         if (outbound_doorbell &
4101                                 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4102                                 writel(outbound_doorbell,
4103                                         reg->outbound_doorbell);
4104                                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4105                                         reg->inbound_doorbell);
4106                         } else
4107                                 break;
4108                 }
4109                 }
4110                 break;
4111         case ACB_ADAPTER_TYPE_E: {
4112                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4113                 uint32_t i, tmp;
4114
4115                 acb->in_doorbell = readl(&reg->iobound_doorbell);
4116                 writel(0, &reg->host_int_status); /*clear interrupt*/
4117                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4118                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4119                 for(i=0; i < 200; i++) {
4120                         msleep(20);
4121                         tmp = acb->in_doorbell;
4122                         acb->in_doorbell = readl(&reg->iobound_doorbell);
4123                         if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4124                                 writel(0, &reg->host_int_status); /*clear interrupt*/
4125                                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4126                                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4127                         } else
4128                                 break;
4129                 }
4130                 }
4131                 break;
4132         }
4133 }
4134
4135 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4136 {
4137         switch (acb->adapter_type) {
4138         case ACB_ADAPTER_TYPE_A:
4139                 return;
4140         case ACB_ADAPTER_TYPE_B:
4141                 {
4142                         struct MessageUnit_B *reg = acb->pmuB;
4143                         writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4144                         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4145                                 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4146                                 return;
4147                         }
4148                 }
4149                 break;
4150         case ACB_ADAPTER_TYPE_C:
4151                 return;
4152         }
4153         return;
4154 }
4155
4156 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4157 {
4158         uint8_t value[64];
4159         int i, count = 0;
4160         struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4161         struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4162         struct MessageUnit_D *pmuD = acb->pmuD;
4163
4164         /* backup pci config data */
4165         printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4166         for (i = 0; i < 64; i++) {
4167                 pci_read_config_byte(acb->pdev, i, &value[i]);
4168         }
4169         /* hardware reset signal */
4170         if (acb->dev_id == 0x1680) {
4171                 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4172         } else if (acb->dev_id == 0x1880) {
4173                 do {
4174                         count++;
4175                         writel(0xF, &pmuC->write_sequence);
4176                         writel(0x4, &pmuC->write_sequence);
4177                         writel(0xB, &pmuC->write_sequence);
4178                         writel(0x2, &pmuC->write_sequence);
4179                         writel(0x7, &pmuC->write_sequence);
4180                         writel(0xD, &pmuC->write_sequence);
4181                 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4182                 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4183         } else if (acb->dev_id == 0x1884) {
4184                 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4185                 do {
4186                         count++;
4187                         writel(0x4, &pmuE->write_sequence_3xxx);
4188                         writel(0xB, &pmuE->write_sequence_3xxx);
4189                         writel(0x2, &pmuE->write_sequence_3xxx);
4190                         writel(0x7, &pmuE->write_sequence_3xxx);
4191                         writel(0xD, &pmuE->write_sequence_3xxx);
4192                         mdelay(10);
4193                 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4194                         ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4195                 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4196         } else if (acb->dev_id == 0x1214) {
4197                 writel(0x20, pmuD->reset_request);
4198         } else {
4199                 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4200         }
4201         msleep(2000);
4202         /* write back pci config data */
4203         for (i = 0; i < 64; i++) {
4204                 pci_write_config_byte(acb->pdev, i, value[i]);
4205         }
4206         msleep(1000);
4207         return;
4208 }
4209
4210 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4211 {
4212         bool rtn = true;
4213
4214         switch(acb->adapter_type) {
4215         case ACB_ADAPTER_TYPE_A:{
4216                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4217                 rtn = ((readl(&reg->outbound_msgaddr1) &
4218                         ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4219                 }
4220                 break;
4221         case ACB_ADAPTER_TYPE_B:{
4222                 struct MessageUnit_B *reg = acb->pmuB;
4223                 rtn = ((readl(reg->iop2drv_doorbell) &
4224                         ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4225                 }
4226                 break;
4227         case ACB_ADAPTER_TYPE_C:{
4228                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4229                 rtn = (readl(&reg->host_diagnostic) & 0x04) ? true : false;
4230                 }
4231                 break;
4232         case ACB_ADAPTER_TYPE_D:{
4233                 struct MessageUnit_D *reg = acb->pmuD;
4234                 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4235                         true : false;
4236                 }
4237                 break;
4238         case ACB_ADAPTER_TYPE_E:{
4239                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4240                 rtn = (readl(&reg->host_diagnostic_3xxx) &
4241                         ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4242                 }
4243                 break;
4244         }
4245         return rtn;
4246 }
4247
4248 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4249 {
4250         uint32_t intmask_org;
4251         /* disable all outbound interrupt */
4252         intmask_org = arcmsr_disable_outbound_ints(acb);
4253         arcmsr_wait_firmware_ready(acb);
4254         arcmsr_iop_confirm(acb);
4255         /*start background rebuild*/
4256         arcmsr_start_adapter_bgrb(acb);
4257         /* empty doorbell Qbuffer if door bell ringed */
4258         arcmsr_clear_doorbell_queue_buffer(acb);
4259         arcmsr_enable_eoi_mode(acb);
4260         /* enable outbound Post Queue,outbound doorbell Interrupt */
4261         arcmsr_enable_outbound_ints(acb, intmask_org);
4262         acb->acb_flags |= ACB_F_IOP_INITED;
4263 }
4264
4265 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4266 {
4267         struct CommandControlBlock *ccb;
4268         uint32_t intmask_org;
4269         uint8_t rtnval = 0x00;
4270         int i = 0;
4271         unsigned long flags;
4272
4273         if (atomic_read(&acb->ccboutstandingcount) != 0) {
4274                 /* disable all outbound interrupt */
4275                 intmask_org = arcmsr_disable_outbound_ints(acb);
4276                 /* talk to iop 331 outstanding command aborted */
4277                 rtnval = arcmsr_abort_allcmd(acb);
4278                 /* clear all outbound posted Q */
4279                 arcmsr_done4abort_postqueue(acb);
4280                 for (i = 0; i < acb->maxFreeCCB; i++) {
4281                         ccb = acb->pccb_pool[i];
4282                         if (ccb->startdone == ARCMSR_CCB_START) {
4283                                 scsi_dma_unmap(ccb->pcmd);
4284                                 ccb->startdone = ARCMSR_CCB_DONE;
4285                                 ccb->ccb_flags = 0;
4286                                 spin_lock_irqsave(&acb->ccblist_lock, flags);
4287                                 list_add_tail(&ccb->list, &acb->ccb_free_list);
4288                                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4289                         }
4290                 }
4291                 atomic_set(&acb->ccboutstandingcount, 0);
4292                 /* enable all outbound interrupt */
4293                 arcmsr_enable_outbound_ints(acb, intmask_org);
4294                 return rtnval;
4295         }
4296         return rtnval;
4297 }
4298
4299 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4300 {
4301         struct AdapterControlBlock *acb;
4302         int retry_count = 0;
4303         int rtn = FAILED;
4304         acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4305         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4306                 return SUCCESS;
4307         pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4308                 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4309         acb->num_resets++;
4310
4311         if (acb->acb_flags & ACB_F_BUS_RESET) {
4312                 long timeout;
4313                 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4314                 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4315                         & ACB_F_BUS_RESET) == 0, 220 * HZ);
4316                 if (timeout)
4317                         return SUCCESS;
4318         }
4319         acb->acb_flags |= ACB_F_BUS_RESET;
4320         if (!arcmsr_iop_reset(acb)) {
4321                 arcmsr_hardware_reset(acb);
4322                 acb->acb_flags &= ~ACB_F_IOP_INITED;
4323 wait_reset_done:
4324                 ssleep(ARCMSR_SLEEPTIME);
4325                 if (arcmsr_reset_in_progress(acb)) {
4326                         if (retry_count > ARCMSR_RETRYCOUNT) {
4327                                 acb->fw_flag = FW_DEADLOCK;
4328                                 pr_notice("arcmsr%d: waiting for hw bus reset"
4329                                         " return, RETRY TERMINATED!!\n",
4330                                         acb->host->host_no);
4331                                 return FAILED;
4332                         }
4333                         retry_count++;
4334                         goto wait_reset_done;
4335                 }
4336                 arcmsr_iop_init(acb);
4337                 atomic_set(&acb->rq_map_token, 16);
4338                 atomic_set(&acb->ante_token_value, 16);
4339                 acb->fw_flag = FW_NORMAL;
4340                 mod_timer(&acb->eternal_timer, jiffies +
4341                         msecs_to_jiffies(6 * HZ));
4342                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4343                 rtn = SUCCESS;
4344                 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4345         } else {
4346                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4347                 atomic_set(&acb->rq_map_token, 16);
4348                 atomic_set(&acb->ante_token_value, 16);
4349                 acb->fw_flag = FW_NORMAL;
4350                 mod_timer(&acb->eternal_timer, jiffies +
4351                         msecs_to_jiffies(6 * HZ));
4352                 rtn = SUCCESS;
4353         }
4354         return rtn;
4355 }
4356
4357 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4358                 struct CommandControlBlock *ccb)
4359 {
4360         int rtn;
4361         rtn = arcmsr_polling_ccbdone(acb, ccb);
4362         return rtn;
4363 }
4364
4365 static int arcmsr_abort(struct scsi_cmnd *cmd)
4366 {
4367         struct AdapterControlBlock *acb =
4368                 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4369         int i = 0;
4370         int rtn = FAILED;
4371         uint32_t intmask_org;
4372
4373         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4374                 return SUCCESS;
4375         printk(KERN_NOTICE
4376                 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4377                 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4378         acb->acb_flags |= ACB_F_ABORT;
4379         acb->num_aborts++;
4380         /*
4381         ************************************************
4382         ** the all interrupt service routine is locked
4383         ** we need to handle it as soon as possible and exit
4384         ************************************************
4385         */
4386         if (!atomic_read(&acb->ccboutstandingcount)) {
4387                 acb->acb_flags &= ~ACB_F_ABORT;
4388                 return rtn;
4389         }
4390
4391         intmask_org = arcmsr_disable_outbound_ints(acb);
4392         for (i = 0; i < acb->maxFreeCCB; i++) {
4393                 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4394                 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4395                         ccb->startdone = ARCMSR_CCB_ABORTED;
4396                         rtn = arcmsr_abort_one_cmd(acb, ccb);
4397                         break;
4398                 }
4399         }
4400         acb->acb_flags &= ~ACB_F_ABORT;
4401         arcmsr_enable_outbound_ints(acb, intmask_org);
4402         return rtn;
4403 }
4404
4405 static const char *arcmsr_info(struct Scsi_Host *host)
4406 {
4407         struct AdapterControlBlock *acb =
4408                 (struct AdapterControlBlock *) host->hostdata;
4409         static char buf[256];
4410         char *type;
4411         int raid6 = 1;
4412         switch (acb->pdev->device) {
4413         case PCI_DEVICE_ID_ARECA_1110:
4414         case PCI_DEVICE_ID_ARECA_1200:
4415         case PCI_DEVICE_ID_ARECA_1202:
4416         case PCI_DEVICE_ID_ARECA_1210:
4417                 raid6 = 0;
4418                 /*FALLTHRU*/
4419         case PCI_DEVICE_ID_ARECA_1120:
4420         case PCI_DEVICE_ID_ARECA_1130:
4421         case PCI_DEVICE_ID_ARECA_1160:
4422         case PCI_DEVICE_ID_ARECA_1170:
4423         case PCI_DEVICE_ID_ARECA_1201:
4424         case PCI_DEVICE_ID_ARECA_1203:
4425         case PCI_DEVICE_ID_ARECA_1220:
4426         case PCI_DEVICE_ID_ARECA_1230:
4427         case PCI_DEVICE_ID_ARECA_1260:
4428         case PCI_DEVICE_ID_ARECA_1270:
4429         case PCI_DEVICE_ID_ARECA_1280:
4430                 type = "SATA";
4431                 break;
4432         case PCI_DEVICE_ID_ARECA_1214:
4433         case PCI_DEVICE_ID_ARECA_1380:
4434         case PCI_DEVICE_ID_ARECA_1381:
4435         case PCI_DEVICE_ID_ARECA_1680:
4436         case PCI_DEVICE_ID_ARECA_1681:
4437         case PCI_DEVICE_ID_ARECA_1880:
4438         case PCI_DEVICE_ID_ARECA_1884:
4439                 type = "SAS/SATA";
4440                 break;
4441         default:
4442                 type = "unknown";
4443                 raid6 = 0;
4444                 break;
4445         }
4446         sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4447                 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4448         return buf;
4449 }