2 * drivers/s390/net/qeth_core_main.c
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/string.h>
14 #include <linux/errno.h>
15 #include <linux/kernel.h>
17 #include <linux/ipv6.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
22 #include <asm-s390/ebcdic.h>
23 #include <asm-s390/io.h>
24 #include <asm/s390_rdev.h>
26 #include "qeth_core.h"
27 #include "qeth_core_offl.h"
29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
47 EXPORT_SYMBOL_GPL(qeth_dbf);
49 struct qeth_card_list_struct qeth_core_card_list;
50 EXPORT_SYMBOL_GPL(qeth_core_card_list);
52 static struct device *qeth_core_root_dev;
53 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
54 static struct lock_class_key qdio_out_skb_queue_key;
56 static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
58 static int qeth_issue_next_read(struct qeth_card *);
59 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
60 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
61 static void qeth_free_buffer_pool(struct qeth_card *);
62 static int qeth_qdio_establish(struct qeth_card *);
65 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
66 struct qdio_buffer *buffer, int is_tso,
67 int *next_element_to_fill)
69 struct skb_frag_struct *frag;
72 int element, cnt, dlen;
74 fragno = skb_shinfo(skb)->nr_frags;
75 element = *next_element_to_fill;
79 buffer->element[element].flags =
80 SBAL_FLAGS_MIDDLE_FRAG;
82 buffer->element[element].flags =
83 SBAL_FLAGS_FIRST_FRAG;
84 dlen = skb->len - skb->data_len;
86 buffer->element[element].addr = skb->data;
87 buffer->element[element].length = dlen;
90 for (cnt = 0; cnt < fragno; cnt++) {
91 frag = &skb_shinfo(skb)->frags[cnt];
92 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
94 buffer->element[element].addr = (char *)addr;
95 buffer->element[element].length = frag->size;
96 if (cnt < (fragno - 1))
97 buffer->element[element].flags =
98 SBAL_FLAGS_MIDDLE_FRAG;
100 buffer->element[element].flags =
101 SBAL_FLAGS_LAST_FRAG;
104 *next_element_to_fill = element;
107 static inline const char *qeth_get_cardname(struct qeth_card *card)
109 if (card->info.guestlan) {
110 switch (card->info.type) {
111 case QETH_CARD_TYPE_OSAE:
112 return " Guest LAN QDIO";
113 case QETH_CARD_TYPE_IQD:
114 return " Guest LAN Hiper";
119 switch (card->info.type) {
120 case QETH_CARD_TYPE_OSAE:
121 return " OSD Express";
122 case QETH_CARD_TYPE_IQD:
123 return " HiperSockets";
124 case QETH_CARD_TYPE_OSN:
133 /* max length to be returned: 14 */
134 const char *qeth_get_cardname_short(struct qeth_card *card)
136 if (card->info.guestlan) {
137 switch (card->info.type) {
138 case QETH_CARD_TYPE_OSAE:
139 return "GuestLAN QDIO";
140 case QETH_CARD_TYPE_IQD:
141 return "GuestLAN Hiper";
146 switch (card->info.type) {
147 case QETH_CARD_TYPE_OSAE:
148 switch (card->info.link_type) {
149 case QETH_LINK_TYPE_FAST_ETH:
151 case QETH_LINK_TYPE_HSTR:
153 case QETH_LINK_TYPE_GBIT_ETH:
155 case QETH_LINK_TYPE_10GBIT_ETH:
157 case QETH_LINK_TYPE_LANE_ETH100:
158 return "OSD_FE_LANE";
159 case QETH_LINK_TYPE_LANE_TR:
160 return "OSD_TR_LANE";
161 case QETH_LINK_TYPE_LANE_ETH1000:
162 return "OSD_GbE_LANE";
163 case QETH_LINK_TYPE_LANE:
164 return "OSD_ATM_LANE";
166 return "OSD_Express";
168 case QETH_CARD_TYPE_IQD:
169 return "HiperSockets";
170 case QETH_CARD_TYPE_OSN:
179 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
180 int clear_start_mask)
184 spin_lock_irqsave(&card->thread_mask_lock, flags);
185 card->thread_allowed_mask = threads;
186 if (clear_start_mask)
187 card->thread_start_mask &= threads;
188 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
189 wake_up(&card->wait_q);
191 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
193 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
198 spin_lock_irqsave(&card->thread_mask_lock, flags);
199 rc = (card->thread_running_mask & threads);
200 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
203 EXPORT_SYMBOL_GPL(qeth_threads_running);
205 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
207 return wait_event_interruptible(card->wait_q,
208 qeth_threads_running(card, threads) == 0);
210 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
212 void qeth_clear_working_pool_list(struct qeth_card *card)
214 struct qeth_buffer_pool_entry *pool_entry, *tmp;
216 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
217 list_for_each_entry_safe(pool_entry, tmp,
218 &card->qdio.in_buf_pool.entry_list, list){
219 list_del(&pool_entry->list);
222 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
224 static int qeth_alloc_buffer_pool(struct qeth_card *card)
226 struct qeth_buffer_pool_entry *pool_entry;
230 QETH_DBF_TEXT(TRACE, 5, "alocpool");
231 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
232 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
234 qeth_free_buffer_pool(card);
237 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
238 ptr = (void *) __get_free_page(GFP_KERNEL);
241 free_page((unsigned long)
242 pool_entry->elements[--j]);
244 qeth_free_buffer_pool(card);
247 pool_entry->elements[j] = ptr;
249 list_add(&pool_entry->init_list,
250 &card->qdio.init_pool.entry_list);
255 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
257 QETH_DBF_TEXT(TRACE, 2, "realcbp");
259 if ((card->state != CARD_STATE_DOWN) &&
260 (card->state != CARD_STATE_RECOVER))
263 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
264 qeth_clear_working_pool_list(card);
265 qeth_free_buffer_pool(card);
266 card->qdio.in_buf_pool.buf_count = bufcnt;
267 card->qdio.init_pool.buf_count = bufcnt;
268 return qeth_alloc_buffer_pool(card);
271 int qeth_set_large_send(struct qeth_card *card,
272 enum qeth_large_send_types type)
276 if (card->dev == NULL) {
277 card->options.large_send = type;
280 if (card->state == CARD_STATE_UP)
281 netif_tx_disable(card->dev);
282 card->options.large_send = type;
283 switch (card->options.large_send) {
284 case QETH_LARGE_SEND_EDDP:
285 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
288 case QETH_LARGE_SEND_TSO:
289 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
290 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
293 PRINT_WARN("TSO not supported on %s. "
294 "large_send set to 'no'.\n",
296 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
298 card->options.large_send = QETH_LARGE_SEND_NO;
302 default: /* includes QETH_LARGE_SEND_NO */
303 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
307 if (card->state == CARD_STATE_UP)
308 netif_wake_queue(card->dev);
311 EXPORT_SYMBOL_GPL(qeth_set_large_send);
313 static int qeth_issue_next_read(struct qeth_card *card)
316 struct qeth_cmd_buffer *iob;
318 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
319 if (card->read.state != CH_STATE_UP)
321 iob = qeth_get_buffer(&card->read);
323 PRINT_WARN("issue_next_read failed: no iob available!\n");
326 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
327 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
328 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
331 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
332 atomic_set(&card->read.irq_pending, 0);
333 qeth_schedule_recovery(card);
334 wake_up(&card->wait_q);
339 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
341 struct qeth_reply *reply;
343 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
345 atomic_set(&reply->refcnt, 1);
346 atomic_set(&reply->received, 0);
352 static void qeth_get_reply(struct qeth_reply *reply)
354 WARN_ON(atomic_read(&reply->refcnt) <= 0);
355 atomic_inc(&reply->refcnt);
358 static void qeth_put_reply(struct qeth_reply *reply)
360 WARN_ON(atomic_read(&reply->refcnt) <= 0);
361 if (atomic_dec_and_test(&reply->refcnt))
365 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
366 struct qeth_card *card)
369 int com = cmd->hdr.command;
370 ipa_name = qeth_get_ipa_cmd_name(com);
372 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
373 ipa_name, com, QETH_CARD_IFNAME(card),
374 rc, qeth_get_ipa_msg(rc));
376 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
377 ipa_name, com, QETH_CARD_IFNAME(card));
380 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
381 struct qeth_cmd_buffer *iob)
383 struct qeth_ipa_cmd *cmd = NULL;
385 QETH_DBF_TEXT(TRACE, 5, "chkipad");
386 if (IS_IPA(iob->data)) {
387 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
388 if (IS_IPA_REPLY(cmd)) {
389 if (cmd->hdr.command < IPA_CMD_SETCCID ||
390 cmd->hdr.command > IPA_CMD_MODCCID)
391 qeth_issue_ipa_msg(cmd,
392 cmd->hdr.return_code, card);
395 switch (cmd->hdr.command) {
396 case IPA_CMD_STOPLAN:
397 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
398 "there is a network problem or "
399 "someone pulled the cable or "
400 "disabled the port.\n",
401 QETH_CARD_IFNAME(card),
403 card->lan_online = 0;
404 if (card->dev && netif_carrier_ok(card->dev))
405 netif_carrier_off(card->dev);
407 case IPA_CMD_STARTLAN:
408 PRINT_INFO("Link reestablished on %s "
409 "(CHPID 0x%X). Scheduling "
410 "IP address reset.\n",
411 QETH_CARD_IFNAME(card),
413 netif_carrier_on(card->dev);
414 card->lan_online = 1;
415 qeth_schedule_recovery(card);
417 case IPA_CMD_MODCCID:
419 case IPA_CMD_REGISTER_LOCAL_ADDR:
420 QETH_DBF_TEXT(TRACE, 3, "irla");
422 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
423 QETH_DBF_TEXT(TRACE, 3, "urla");
426 PRINT_WARN("Received data is IPA "
427 "but not a reply!\n");
435 void qeth_clear_ipacmd_list(struct qeth_card *card)
437 struct qeth_reply *reply, *r;
440 QETH_DBF_TEXT(TRACE, 4, "clipalst");
442 spin_lock_irqsave(&card->lock, flags);
443 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
444 qeth_get_reply(reply);
446 atomic_inc(&reply->received);
447 list_del_init(&reply->list);
448 wake_up(&reply->wait_q);
449 qeth_put_reply(reply);
451 spin_unlock_irqrestore(&card->lock, flags);
453 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
455 static int qeth_check_idx_response(unsigned char *buffer)
460 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
461 if ((buffer[2] & 0xc0) == 0xc0) {
462 PRINT_WARN("received an IDX TERMINATE "
463 "with cause code 0x%02x%s\n",
465 ((buffer[4] == 0x22) ?
466 " -- try another portname" : ""));
467 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
468 QETH_DBF_TEXT(TRACE, 2, " idxterm");
469 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
475 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
478 struct qeth_card *card;
480 QETH_DBF_TEXT(TRACE, 4, "setupccw");
481 card = CARD_FROM_CDEV(channel->ccwdev);
482 if (channel == &card->read)
483 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
485 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
486 channel->ccw.count = len;
487 channel->ccw.cda = (__u32) __pa(iob);
490 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
494 QETH_DBF_TEXT(TRACE, 6, "getbuff");
495 index = channel->io_buf_no;
497 if (channel->iob[index].state == BUF_STATE_FREE) {
498 channel->iob[index].state = BUF_STATE_LOCKED;
499 channel->io_buf_no = (channel->io_buf_no + 1) %
501 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
502 return channel->iob + index;
504 index = (index + 1) % QETH_CMD_BUFFER_NO;
505 } while (index != channel->io_buf_no);
510 void qeth_release_buffer(struct qeth_channel *channel,
511 struct qeth_cmd_buffer *iob)
515 QETH_DBF_TEXT(TRACE, 6, "relbuff");
516 spin_lock_irqsave(&channel->iob_lock, flags);
517 memset(iob->data, 0, QETH_BUFSIZE);
518 iob->state = BUF_STATE_FREE;
519 iob->callback = qeth_send_control_data_cb;
521 spin_unlock_irqrestore(&channel->iob_lock, flags);
523 EXPORT_SYMBOL_GPL(qeth_release_buffer);
525 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
527 struct qeth_cmd_buffer *buffer = NULL;
530 spin_lock_irqsave(&channel->iob_lock, flags);
531 buffer = __qeth_get_buffer(channel);
532 spin_unlock_irqrestore(&channel->iob_lock, flags);
536 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
538 struct qeth_cmd_buffer *buffer;
539 wait_event(channel->wait_q,
540 ((buffer = qeth_get_buffer(channel)) != NULL));
543 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
545 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
549 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
550 qeth_release_buffer(channel, &channel->iob[cnt]);
552 channel->io_buf_no = 0;
554 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
556 static void qeth_send_control_data_cb(struct qeth_channel *channel,
557 struct qeth_cmd_buffer *iob)
559 struct qeth_card *card;
560 struct qeth_reply *reply, *r;
561 struct qeth_ipa_cmd *cmd;
565 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
567 card = CARD_FROM_CDEV(channel->ccwdev);
568 if (qeth_check_idx_response(iob->data)) {
569 qeth_clear_ipacmd_list(card);
570 qeth_schedule_recovery(card);
574 cmd = qeth_check_ipa_data(card, iob);
575 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
577 /*in case of OSN : check if cmd is set */
578 if (card->info.type == QETH_CARD_TYPE_OSN &&
580 cmd->hdr.command != IPA_CMD_STARTLAN &&
581 card->osn_info.assist_cb != NULL) {
582 card->osn_info.assist_cb(card->dev, cmd);
586 spin_lock_irqsave(&card->lock, flags);
587 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
588 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
589 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
590 qeth_get_reply(reply);
591 list_del_init(&reply->list);
592 spin_unlock_irqrestore(&card->lock, flags);
594 if (reply->callback != NULL) {
596 reply->offset = (__u16)((char *)cmd -
598 keep_reply = reply->callback(card,
602 keep_reply = reply->callback(card,
607 reply->rc = (u16) cmd->hdr.return_code;
611 spin_lock_irqsave(&card->lock, flags);
612 list_add_tail(&reply->list,
613 &card->cmd_waiter_list);
614 spin_unlock_irqrestore(&card->lock, flags);
616 atomic_inc(&reply->received);
617 wake_up(&reply->wait_q);
619 qeth_put_reply(reply);
623 spin_unlock_irqrestore(&card->lock, flags);
625 memcpy(&card->seqno.pdu_hdr_ack,
626 QETH_PDU_HEADER_SEQ_NO(iob->data),
628 qeth_release_buffer(channel, iob);
631 static int qeth_setup_channel(struct qeth_channel *channel)
635 QETH_DBF_TEXT(SETUP, 2, "setupch");
636 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
637 channel->iob[cnt].data = (char *)
638 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
639 if (channel->iob[cnt].data == NULL)
641 channel->iob[cnt].state = BUF_STATE_FREE;
642 channel->iob[cnt].channel = channel;
643 channel->iob[cnt].callback = qeth_send_control_data_cb;
644 channel->iob[cnt].rc = 0;
646 if (cnt < QETH_CMD_BUFFER_NO) {
648 kfree(channel->iob[cnt].data);
652 channel->io_buf_no = 0;
653 atomic_set(&channel->irq_pending, 0);
654 spin_lock_init(&channel->iob_lock);
656 init_waitqueue_head(&channel->wait_q);
660 static int qeth_set_thread_start_bit(struct qeth_card *card,
661 unsigned long thread)
665 spin_lock_irqsave(&card->thread_mask_lock, flags);
666 if (!(card->thread_allowed_mask & thread) ||
667 (card->thread_start_mask & thread)) {
668 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
671 card->thread_start_mask |= thread;
672 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
676 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
680 spin_lock_irqsave(&card->thread_mask_lock, flags);
681 card->thread_start_mask &= ~thread;
682 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
683 wake_up(&card->wait_q);
685 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
687 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
691 spin_lock_irqsave(&card->thread_mask_lock, flags);
692 card->thread_running_mask &= ~thread;
693 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
694 wake_up(&card->wait_q);
696 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
698 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
703 spin_lock_irqsave(&card->thread_mask_lock, flags);
704 if (card->thread_start_mask & thread) {
705 if ((card->thread_allowed_mask & thread) &&
706 !(card->thread_running_mask & thread)) {
708 card->thread_start_mask &= ~thread;
709 card->thread_running_mask |= thread;
713 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
717 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
721 wait_event(card->wait_q,
722 (rc = __qeth_do_run_thread(card, thread)) >= 0);
725 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
727 void qeth_schedule_recovery(struct qeth_card *card)
729 QETH_DBF_TEXT(TRACE, 2, "startrec");
730 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
731 schedule_work(&card->kernel_thread_starter);
733 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
735 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
740 sense = (char *) irb->ecw;
741 cstat = irb->scsw.cstat;
742 dstat = irb->scsw.dstat;
744 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
745 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
746 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
747 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
748 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
749 cdev->dev.bus_id, dstat, cstat);
750 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
755 if (dstat & DEV_STAT_UNIT_CHECK) {
756 if (sense[SENSE_RESETTING_EVENT_BYTE] &
757 SENSE_RESETTING_EVENT_FLAG) {
758 QETH_DBF_TEXT(TRACE, 2, "REVIND");
761 if (sense[SENSE_COMMAND_REJECT_BYTE] &
762 SENSE_COMMAND_REJECT_FLAG) {
763 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
766 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
767 QETH_DBF_TEXT(TRACE, 2, "AFFE");
770 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
771 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
774 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
780 static long __qeth_check_irb_error(struct ccw_device *cdev,
781 unsigned long intparm, struct irb *irb)
786 switch (PTR_ERR(irb)) {
788 PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
789 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
790 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
793 PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
794 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
795 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
796 if (intparm == QETH_RCD_PARM) {
797 struct qeth_card *card = CARD_FROM_CDEV(cdev);
799 if (card && (card->data.ccwdev == cdev)) {
800 card->data.state = CH_STATE_DOWN;
801 wake_up(&card->wait_q);
806 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
808 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
809 QETH_DBF_TEXT(TRACE, 2, " rc???");
814 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
819 struct qeth_cmd_buffer *buffer;
820 struct qeth_channel *channel;
821 struct qeth_card *card;
822 struct qeth_cmd_buffer *iob;
825 QETH_DBF_TEXT(TRACE, 5, "irq");
827 if (__qeth_check_irb_error(cdev, intparm, irb))
829 cstat = irb->scsw.cstat;
830 dstat = irb->scsw.dstat;
832 card = CARD_FROM_CDEV(cdev);
836 if (card->read.ccwdev == cdev) {
837 channel = &card->read;
838 QETH_DBF_TEXT(TRACE, 5, "read");
839 } else if (card->write.ccwdev == cdev) {
840 channel = &card->write;
841 QETH_DBF_TEXT(TRACE, 5, "write");
843 channel = &card->data;
844 QETH_DBF_TEXT(TRACE, 5, "data");
846 atomic_set(&channel->irq_pending, 0);
848 if (irb->scsw.fctl & (SCSW_FCTL_CLEAR_FUNC))
849 channel->state = CH_STATE_STOPPED;
851 if (irb->scsw.fctl & (SCSW_FCTL_HALT_FUNC))
852 channel->state = CH_STATE_HALTED;
854 /*let's wake up immediately on data channel*/
855 if ((channel == &card->data) && (intparm != 0) &&
856 (intparm != QETH_RCD_PARM))
859 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
860 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
861 /* we don't have to handle this further */
864 if (intparm == QETH_HALT_CHANNEL_PARM) {
865 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
866 /* we don't have to handle this further */
869 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
870 (dstat & DEV_STAT_UNIT_CHECK) ||
872 if (irb->esw.esw0.erw.cons) {
873 /* TODO: we should make this s390dbf */
874 PRINT_WARN("sense data available on channel %s.\n",
875 CHANNEL_ID(channel));
876 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
877 print_hex_dump(KERN_WARNING, "qeth: irb ",
878 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
879 print_hex_dump(KERN_WARNING, "qeth: sense data ",
880 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
882 if (intparm == QETH_RCD_PARM) {
883 channel->state = CH_STATE_DOWN;
886 rc = qeth_get_problem(cdev, irb);
888 qeth_schedule_recovery(card);
893 if (intparm == QETH_RCD_PARM) {
894 channel->state = CH_STATE_RCD_DONE;
898 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
899 buffer->state = BUF_STATE_PROCESSED;
901 if (channel == &card->data)
903 if (channel == &card->read &&
904 channel->state == CH_STATE_UP)
905 qeth_issue_next_read(card);
908 index = channel->buf_no;
909 while (iob[index].state == BUF_STATE_PROCESSED) {
910 if (iob[index].callback != NULL)
911 iob[index].callback(channel, iob + index);
913 index = (index + 1) % QETH_CMD_BUFFER_NO;
915 channel->buf_no = index;
917 wake_up(&card->wait_q);
921 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
922 struct qeth_qdio_out_buffer *buf)
927 /* is PCI flag set on buffer? */
928 if (buf->buffer->element[0].flags & 0x40)
929 atomic_dec(&queue->set_pci_flags_count);
931 skb = skb_dequeue(&buf->skb_list);
933 atomic_dec(&skb->users);
934 dev_kfree_skb_any(skb);
935 skb = skb_dequeue(&buf->skb_list);
937 qeth_eddp_buf_release_contexts(buf);
938 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
939 buf->buffer->element[i].length = 0;
940 buf->buffer->element[i].addr = NULL;
941 buf->buffer->element[i].flags = 0;
943 buf->next_element_to_fill = 0;
944 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
947 void qeth_clear_qdio_buffers(struct qeth_card *card)
951 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
952 /* clear outbound buffers to free skbs */
953 for (i = 0; i < card->qdio.no_out_queues; ++i)
954 if (card->qdio.out_qs[i]) {
955 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
956 qeth_clear_output_buffer(card->qdio.out_qs[i],
957 &card->qdio.out_qs[i]->bufs[j]);
960 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
962 static void qeth_free_buffer_pool(struct qeth_card *card)
964 struct qeth_buffer_pool_entry *pool_entry, *tmp;
966 QETH_DBF_TEXT(TRACE, 5, "freepool");
967 list_for_each_entry_safe(pool_entry, tmp,
968 &card->qdio.init_pool.entry_list, init_list){
969 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
970 free_page((unsigned long)pool_entry->elements[i]);
971 list_del(&pool_entry->init_list);
976 static void qeth_free_qdio_buffers(struct qeth_card *card)
980 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
981 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
982 QETH_QDIO_UNINITIALIZED)
984 kfree(card->qdio.in_q);
985 card->qdio.in_q = NULL;
986 /* inbound buffer pool */
987 qeth_free_buffer_pool(card);
988 /* free outbound qdio_qs */
989 if (card->qdio.out_qs) {
990 for (i = 0; i < card->qdio.no_out_queues; ++i) {
991 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
992 qeth_clear_output_buffer(card->qdio.out_qs[i],
993 &card->qdio.out_qs[i]->bufs[j]);
994 kfree(card->qdio.out_qs[i]);
996 kfree(card->qdio.out_qs);
997 card->qdio.out_qs = NULL;
1001 static void qeth_clean_channel(struct qeth_channel *channel)
1005 QETH_DBF_TEXT(SETUP, 2, "freech");
1006 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1007 kfree(channel->iob[cnt].data);
1010 static int qeth_is_1920_device(struct qeth_card *card)
1012 int single_queue = 0;
1013 struct ccw_device *ccwdev;
1014 struct channelPath_dsc {
1025 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1027 ccwdev = card->data.ccwdev;
1028 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1029 if (chp_dsc != NULL) {
1030 /* CHPP field bit 6 == 1 -> single queue */
1031 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1034 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1035 return single_queue;
1038 static void qeth_init_qdio_info(struct qeth_card *card)
1040 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1041 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1043 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1044 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1045 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1046 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1047 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1050 static void qeth_set_intial_options(struct qeth_card *card)
1052 card->options.route4.type = NO_ROUTER;
1053 card->options.route6.type = NO_ROUTER;
1054 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1055 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1056 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1057 card->options.fake_broadcast = 0;
1058 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1059 card->options.fake_ll = 0;
1060 card->options.performance_stats = 0;
1061 card->options.rx_sg_cb = QETH_RX_SG_CB;
1064 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1066 unsigned long flags;
1069 spin_lock_irqsave(&card->thread_mask_lock, flags);
1070 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1071 (u8) card->thread_start_mask,
1072 (u8) card->thread_allowed_mask,
1073 (u8) card->thread_running_mask);
1074 rc = (card->thread_start_mask & thread);
1075 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1079 static void qeth_start_kernel_thread(struct work_struct *work)
1081 struct qeth_card *card = container_of(work, struct qeth_card,
1082 kernel_thread_starter);
1083 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1085 if (card->read.state != CH_STATE_UP &&
1086 card->write.state != CH_STATE_UP)
1088 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1089 kthread_run(card->discipline.recover, (void *) card,
1093 static int qeth_setup_card(struct qeth_card *card)
1096 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1097 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1099 card->read.state = CH_STATE_DOWN;
1100 card->write.state = CH_STATE_DOWN;
1101 card->data.state = CH_STATE_DOWN;
1102 card->state = CARD_STATE_DOWN;
1103 card->lan_online = 0;
1104 card->use_hard_stop = 0;
1106 spin_lock_init(&card->vlanlock);
1107 spin_lock_init(&card->mclock);
1108 card->vlangrp = NULL;
1109 spin_lock_init(&card->lock);
1110 spin_lock_init(&card->ip_lock);
1111 spin_lock_init(&card->thread_mask_lock);
1112 card->thread_start_mask = 0;
1113 card->thread_allowed_mask = 0;
1114 card->thread_running_mask = 0;
1115 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1116 INIT_LIST_HEAD(&card->ip_list);
1117 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1118 if (!card->ip_tbd_list) {
1119 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1122 INIT_LIST_HEAD(card->ip_tbd_list);
1123 INIT_LIST_HEAD(&card->cmd_waiter_list);
1124 init_waitqueue_head(&card->wait_q);
1125 /* intial options */
1126 qeth_set_intial_options(card);
1127 /* IP address takeover */
1128 INIT_LIST_HEAD(&card->ipato.entries);
1129 card->ipato.enabled = 0;
1130 card->ipato.invert4 = 0;
1131 card->ipato.invert6 = 0;
1132 /* init QDIO stuff */
1133 qeth_init_qdio_info(card);
1137 static struct qeth_card *qeth_alloc_card(void)
1139 struct qeth_card *card;
1141 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1142 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1145 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1146 if (qeth_setup_channel(&card->read)) {
1150 if (qeth_setup_channel(&card->write)) {
1151 qeth_clean_channel(&card->read);
1155 card->options.layer2 = -1;
1159 static int qeth_determine_card_type(struct qeth_card *card)
1163 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1165 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1166 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1167 while (known_devices[i][4]) {
1168 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1169 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1170 card->info.type = known_devices[i][4];
1171 card->qdio.no_out_queues = known_devices[i][8];
1172 card->info.is_multicast_different = known_devices[i][9];
1173 if (qeth_is_1920_device(card)) {
1174 PRINT_INFO("Priority Queueing not able "
1175 "due to hardware limitations!\n");
1176 card->qdio.no_out_queues = 1;
1177 card->qdio.default_out_queue = 0;
1183 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1184 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1188 static int qeth_clear_channel(struct qeth_channel *channel)
1190 unsigned long flags;
1191 struct qeth_card *card;
1194 QETH_DBF_TEXT(TRACE, 3, "clearch");
1195 card = CARD_FROM_CDEV(channel->ccwdev);
1196 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1197 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1198 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1202 rc = wait_event_interruptible_timeout(card->wait_q,
1203 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1204 if (rc == -ERESTARTSYS)
1206 if (channel->state != CH_STATE_STOPPED)
1208 channel->state = CH_STATE_DOWN;
1212 static int qeth_halt_channel(struct qeth_channel *channel)
1214 unsigned long flags;
1215 struct qeth_card *card;
1218 QETH_DBF_TEXT(TRACE, 3, "haltch");
1219 card = CARD_FROM_CDEV(channel->ccwdev);
1220 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1221 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1222 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1226 rc = wait_event_interruptible_timeout(card->wait_q,
1227 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1228 if (rc == -ERESTARTSYS)
1230 if (channel->state != CH_STATE_HALTED)
1235 static int qeth_halt_channels(struct qeth_card *card)
1237 int rc1 = 0, rc2 = 0, rc3 = 0;
1239 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1240 rc1 = qeth_halt_channel(&card->read);
1241 rc2 = qeth_halt_channel(&card->write);
1242 rc3 = qeth_halt_channel(&card->data);
1250 static int qeth_clear_channels(struct qeth_card *card)
1252 int rc1 = 0, rc2 = 0, rc3 = 0;
1254 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1255 rc1 = qeth_clear_channel(&card->read);
1256 rc2 = qeth_clear_channel(&card->write);
1257 rc3 = qeth_clear_channel(&card->data);
1265 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1269 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1270 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1273 rc = qeth_halt_channels(card);
1276 return qeth_clear_channels(card);
1279 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1283 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1284 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1285 QETH_QDIO_CLEANING)) {
1286 case QETH_QDIO_ESTABLISHED:
1287 if (card->info.type == QETH_CARD_TYPE_IQD)
1288 rc = qdio_cleanup(CARD_DDEV(card),
1289 QDIO_FLAG_CLEANUP_USING_HALT);
1291 rc = qdio_cleanup(CARD_DDEV(card),
1292 QDIO_FLAG_CLEANUP_USING_CLEAR);
1294 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1295 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1297 case QETH_QDIO_CLEANING:
1302 rc = qeth_clear_halt_card(card, use_halt);
1304 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1305 card->state = CARD_STATE_DOWN;
1308 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1310 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1316 struct qeth_channel *channel = &card->data;
1317 unsigned long flags;
1320 * scan for RCD command in extended SenseID data
1322 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1323 if (!ciw || ciw->cmd == 0)
1325 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1329 channel->ccw.cmd_code = ciw->cmd;
1330 channel->ccw.cda = (__u32) __pa(rcd_buf);
1331 channel->ccw.count = ciw->count;
1332 channel->ccw.flags = CCW_FLAG_SLI;
1333 channel->state = CH_STATE_RCD;
1334 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1335 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1336 QETH_RCD_PARM, LPM_ANYPATH, 0,
1338 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1340 wait_event(card->wait_q,
1341 (channel->state == CH_STATE_RCD_DONE ||
1342 channel->state == CH_STATE_DOWN));
1343 if (channel->state == CH_STATE_DOWN)
1346 channel->state = CH_STATE_DOWN;
1352 *length = ciw->count;
1358 static int qeth_get_unitaddr(struct qeth_card *card)
1364 QETH_DBF_TEXT(SETUP, 2, "getunit");
1365 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1367 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1368 CARD_DDEV_ID(card), rc);
1371 card->info.chpid = prcd[30];
1372 card->info.unit_addr2 = prcd[31];
1373 card->info.cula = prcd[63];
1374 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1375 (prcd[0x11] == _ascebc['M']));
1380 static void qeth_init_tokens(struct qeth_card *card)
1382 card->token.issuer_rm_w = 0x00010103UL;
1383 card->token.cm_filter_w = 0x00010108UL;
1384 card->token.cm_connection_w = 0x0001010aUL;
1385 card->token.ulp_filter_w = 0x0001010bUL;
1386 card->token.ulp_connection_w = 0x0001010dUL;
1389 static void qeth_init_func_level(struct qeth_card *card)
1391 if (card->ipato.enabled) {
1392 if (card->info.type == QETH_CARD_TYPE_IQD)
1393 card->info.func_level =
1394 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1396 card->info.func_level =
1397 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1399 if (card->info.type == QETH_CARD_TYPE_IQD)
1400 /*FIXME:why do we have same values for dis and ena for
1402 card->info.func_level =
1403 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1405 card->info.func_level =
1406 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1410 static inline __u16 qeth_raw_devno_from_bus_id(char *id)
1412 id += (strlen(id) - 4);
1413 return (__u16) simple_strtoul(id, &id, 16);
1416 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1417 void (*idx_reply_cb)(struct qeth_channel *,
1418 struct qeth_cmd_buffer *))
1420 struct qeth_cmd_buffer *iob;
1421 unsigned long flags;
1423 struct qeth_card *card;
1425 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1426 card = CARD_FROM_CDEV(channel->ccwdev);
1427 iob = qeth_get_buffer(channel);
1428 iob->callback = idx_reply_cb;
1429 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1430 channel->ccw.count = QETH_BUFSIZE;
1431 channel->ccw.cda = (__u32) __pa(iob->data);
1433 wait_event(card->wait_q,
1434 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1435 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1436 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1437 rc = ccw_device_start(channel->ccwdev,
1438 &channel->ccw, (addr_t) iob, 0, 0);
1439 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1442 PRINT_ERR("Error2 in activating channel rc=%d\n", rc);
1443 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1444 atomic_set(&channel->irq_pending, 0);
1445 wake_up(&card->wait_q);
1448 rc = wait_event_interruptible_timeout(card->wait_q,
1449 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1450 if (rc == -ERESTARTSYS)
1452 if (channel->state != CH_STATE_UP) {
1454 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1455 qeth_clear_cmd_buffers(channel);
1461 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1462 void (*idx_reply_cb)(struct qeth_channel *,
1463 struct qeth_cmd_buffer *))
1465 struct qeth_card *card;
1466 struct qeth_cmd_buffer *iob;
1467 unsigned long flags;
1472 card = CARD_FROM_CDEV(channel->ccwdev);
1474 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1476 iob = qeth_get_buffer(channel);
1477 iob->callback = idx_reply_cb;
1478 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1479 channel->ccw.count = IDX_ACTIVATE_SIZE;
1480 channel->ccw.cda = (__u32) __pa(iob->data);
1481 if (channel == &card->write) {
1482 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1483 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1484 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1485 card->seqno.trans_hdr++;
1487 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1488 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1489 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1491 tmp = ((__u8)card->info.portno) | 0x80;
1492 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1493 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1494 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1495 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1496 &card->info.func_level, sizeof(__u16));
1497 temp = qeth_raw_devno_from_bus_id(CARD_DDEV_ID(card));
1498 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp, 2);
1499 temp = (card->info.cula << 8) + card->info.unit_addr2;
1500 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1502 wait_event(card->wait_q,
1503 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1504 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1505 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1506 rc = ccw_device_start(channel->ccwdev,
1507 &channel->ccw, (addr_t) iob, 0, 0);
1508 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1511 PRINT_ERR("Error1 in activating channel. rc=%d\n", rc);
1512 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1513 atomic_set(&channel->irq_pending, 0);
1514 wake_up(&card->wait_q);
1517 rc = wait_event_interruptible_timeout(card->wait_q,
1518 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1519 if (rc == -ERESTARTSYS)
1521 if (channel->state != CH_STATE_ACTIVATING) {
1522 PRINT_WARN("IDX activate timed out!\n");
1523 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1524 qeth_clear_cmd_buffers(channel);
1527 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1530 static int qeth_peer_func_level(int level)
1532 if ((level & 0xff) == 8)
1533 return (level & 0xff) + 0x400;
1534 if (((level >> 8) & 3) == 1)
1535 return (level & 0xff) + 0x200;
1539 static void qeth_idx_write_cb(struct qeth_channel *channel,
1540 struct qeth_cmd_buffer *iob)
1542 struct qeth_card *card;
1545 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1547 if (channel->state == CH_STATE_DOWN) {
1548 channel->state = CH_STATE_ACTIVATING;
1551 card = CARD_FROM_CDEV(channel->ccwdev);
1553 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1554 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1555 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1556 "adapter exclusively used by another host\n",
1557 CARD_WDEV_ID(card));
1559 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1560 "negative reply\n", CARD_WDEV_ID(card));
1563 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1564 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1565 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1566 "function level mismatch "
1567 "(sent: 0x%x, received: 0x%x)\n",
1568 CARD_WDEV_ID(card), card->info.func_level, temp);
1571 channel->state = CH_STATE_UP;
1573 qeth_release_buffer(channel, iob);
1576 static void qeth_idx_read_cb(struct qeth_channel *channel,
1577 struct qeth_cmd_buffer *iob)
1579 struct qeth_card *card;
1582 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1583 if (channel->state == CH_STATE_DOWN) {
1584 channel->state = CH_STATE_ACTIVATING;
1588 card = CARD_FROM_CDEV(channel->ccwdev);
1589 if (qeth_check_idx_response(iob->data))
1592 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1593 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1594 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1595 "adapter exclusively used by another host\n",
1596 CARD_RDEV_ID(card));
1598 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1599 "negative reply\n", CARD_RDEV_ID(card));
1604 * temporary fix for microcode bug
1605 * to revert it,replace OR by AND
1607 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1608 (card->info.type == QETH_CARD_TYPE_OSAE))
1609 card->info.portname_required = 1;
1611 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1612 if (temp != qeth_peer_func_level(card->info.func_level)) {
1613 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1614 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1615 CARD_RDEV_ID(card), card->info.func_level, temp);
1618 memcpy(&card->token.issuer_rm_r,
1619 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1620 QETH_MPC_TOKEN_LENGTH);
1621 memcpy(&card->info.mcl_level[0],
1622 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1623 channel->state = CH_STATE_UP;
1625 qeth_release_buffer(channel, iob);
1628 void qeth_prepare_control_data(struct qeth_card *card, int len,
1629 struct qeth_cmd_buffer *iob)
1631 qeth_setup_ccw(&card->write, iob->data, len);
1632 iob->callback = qeth_release_buffer;
1634 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1635 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1636 card->seqno.trans_hdr++;
1637 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1638 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1639 card->seqno.pdu_hdr++;
1640 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1641 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1642 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1644 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1646 int qeth_send_control_data(struct qeth_card *card, int len,
1647 struct qeth_cmd_buffer *iob,
1648 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1653 unsigned long flags;
1654 struct qeth_reply *reply = NULL;
1655 unsigned long timeout;
1657 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1659 reply = qeth_alloc_reply(card);
1661 PRINT_WARN("Could not alloc qeth_reply!\n");
1664 reply->callback = reply_cb;
1665 reply->param = reply_param;
1666 if (card->state == CARD_STATE_DOWN)
1667 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1669 reply->seqno = card->seqno.ipa++;
1670 init_waitqueue_head(&reply->wait_q);
1671 spin_lock_irqsave(&card->lock, flags);
1672 list_add_tail(&reply->list, &card->cmd_waiter_list);
1673 spin_unlock_irqrestore(&card->lock, flags);
1674 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1676 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1677 qeth_prepare_control_data(card, len, iob);
1679 if (IS_IPA(iob->data))
1680 timeout = jiffies + QETH_IPA_TIMEOUT;
1682 timeout = jiffies + QETH_TIMEOUT;
1684 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1685 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1686 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1687 (addr_t) iob, 0, 0);
1688 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1690 PRINT_WARN("qeth_send_control_data: "
1691 "ccw_device_start rc = %i\n", rc);
1692 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1693 spin_lock_irqsave(&card->lock, flags);
1694 list_del_init(&reply->list);
1695 qeth_put_reply(reply);
1696 spin_unlock_irqrestore(&card->lock, flags);
1697 qeth_release_buffer(iob->channel, iob);
1698 atomic_set(&card->write.irq_pending, 0);
1699 wake_up(&card->wait_q);
1702 while (!atomic_read(&reply->received)) {
1703 if (time_after(jiffies, timeout)) {
1704 spin_lock_irqsave(&reply->card->lock, flags);
1705 list_del_init(&reply->list);
1706 spin_unlock_irqrestore(&reply->card->lock, flags);
1708 atomic_inc(&reply->received);
1709 wake_up(&reply->wait_q);
1714 qeth_put_reply(reply);
1717 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1719 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1722 struct qeth_cmd_buffer *iob;
1724 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1726 iob = (struct qeth_cmd_buffer *) data;
1727 memcpy(&card->token.cm_filter_r,
1728 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1729 QETH_MPC_TOKEN_LENGTH);
1730 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1734 static int qeth_cm_enable(struct qeth_card *card)
1737 struct qeth_cmd_buffer *iob;
1739 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1741 iob = qeth_wait_for_buffer(&card->write);
1742 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1743 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1744 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1745 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1746 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1748 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1749 qeth_cm_enable_cb, NULL);
1753 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1757 struct qeth_cmd_buffer *iob;
1759 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1761 iob = (struct qeth_cmd_buffer *) data;
1762 memcpy(&card->token.cm_connection_r,
1763 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1764 QETH_MPC_TOKEN_LENGTH);
1765 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1769 static int qeth_cm_setup(struct qeth_card *card)
1772 struct qeth_cmd_buffer *iob;
1774 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1776 iob = qeth_wait_for_buffer(&card->write);
1777 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1778 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1779 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1780 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1781 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1782 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1783 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1784 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1785 qeth_cm_setup_cb, NULL);
1790 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1792 switch (card->info.type) {
1793 case QETH_CARD_TYPE_UNKNOWN:
1795 case QETH_CARD_TYPE_IQD:
1796 return card->info.max_mtu;
1797 case QETH_CARD_TYPE_OSAE:
1798 switch (card->info.link_type) {
1799 case QETH_LINK_TYPE_HSTR:
1800 case QETH_LINK_TYPE_LANE_TR:
1810 static inline int qeth_get_max_mtu_for_card(int cardtype)
1814 case QETH_CARD_TYPE_UNKNOWN:
1815 case QETH_CARD_TYPE_OSAE:
1816 case QETH_CARD_TYPE_OSN:
1818 case QETH_CARD_TYPE_IQD:
1825 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1828 case QETH_CARD_TYPE_IQD:
1835 static inline int qeth_get_mtu_outof_framesize(int framesize)
1837 switch (framesize) {
1851 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1853 switch (card->info.type) {
1854 case QETH_CARD_TYPE_OSAE:
1855 return ((mtu >= 576) && (mtu <= 61440));
1856 case QETH_CARD_TYPE_IQD:
1857 return ((mtu >= 576) &&
1858 (mtu <= card->info.max_mtu + 4096 - 32));
1859 case QETH_CARD_TYPE_OSN:
1860 case QETH_CARD_TYPE_UNKNOWN:
1866 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1870 __u16 mtu, framesize;
1873 struct qeth_cmd_buffer *iob;
1875 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1877 iob = (struct qeth_cmd_buffer *) data;
1878 memcpy(&card->token.ulp_filter_r,
1879 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1880 QETH_MPC_TOKEN_LENGTH);
1881 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1882 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1883 mtu = qeth_get_mtu_outof_framesize(framesize);
1886 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1889 card->info.max_mtu = mtu;
1890 card->info.initial_mtu = mtu;
1891 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1893 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1894 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1895 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1898 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1899 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1901 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1902 card->info.link_type = link_type;
1904 card->info.link_type = 0;
1905 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1909 static int qeth_ulp_enable(struct qeth_card *card)
1913 struct qeth_cmd_buffer *iob;
1915 /*FIXME: trace view callbacks*/
1916 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1918 iob = qeth_wait_for_buffer(&card->write);
1919 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1921 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1922 (__u8) card->info.portno;
1923 if (card->options.layer2)
1924 if (card->info.type == QETH_CARD_TYPE_OSN)
1925 prot_type = QETH_PROT_OSN2;
1927 prot_type = QETH_PROT_LAYER2;
1929 prot_type = QETH_PROT_TCPIP;
1931 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1932 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1933 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1934 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1935 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1936 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1937 card->info.portname, 9);
1938 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1939 qeth_ulp_enable_cb, NULL);
1944 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1947 struct qeth_cmd_buffer *iob;
1949 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1951 iob = (struct qeth_cmd_buffer *) data;
1952 memcpy(&card->token.ulp_connection_r,
1953 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1954 QETH_MPC_TOKEN_LENGTH);
1955 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1959 static int qeth_ulp_setup(struct qeth_card *card)
1963 struct qeth_cmd_buffer *iob;
1964 struct ccw_dev_id dev_id;
1966 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
1968 iob = qeth_wait_for_buffer(&card->write);
1969 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1971 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1972 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1973 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1974 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1975 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1976 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1978 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1979 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1980 temp = (card->info.cula << 8) + card->info.unit_addr2;
1981 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
1982 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
1983 qeth_ulp_setup_cb, NULL);
1987 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
1991 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
1993 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
1994 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
1997 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
1999 if (!card->qdio.in_q)
2001 QETH_DBF_TEXT(SETUP, 2, "inq");
2002 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2003 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2004 /* give inbound qeth_qdio_buffers their qdio_buffers */
2005 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2006 card->qdio.in_q->bufs[i].buffer =
2007 &card->qdio.in_q->qdio_bufs[i];
2008 /* inbound buffer pool */
2009 if (qeth_alloc_buffer_pool(card))
2013 kmalloc(card->qdio.no_out_queues *
2014 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2015 if (!card->qdio.out_qs)
2017 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2018 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2020 if (!card->qdio.out_qs[i])
2022 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2023 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2024 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2025 card->qdio.out_qs[i]->queue_no = i;
2026 /* give outbound qeth_qdio_buffers their qdio_buffers */
2027 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2028 card->qdio.out_qs[i]->bufs[j].buffer =
2029 &card->qdio.out_qs[i]->qdio_bufs[j];
2030 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2033 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2034 &qdio_out_skb_queue_key);
2035 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2042 kfree(card->qdio.out_qs[--i]);
2043 kfree(card->qdio.out_qs);
2044 card->qdio.out_qs = NULL;
2046 qeth_free_buffer_pool(card);
2048 kfree(card->qdio.in_q);
2049 card->qdio.in_q = NULL;
2051 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2055 static void qeth_create_qib_param_field(struct qeth_card *card,
2059 param_field[0] = _ascebc['P'];
2060 param_field[1] = _ascebc['C'];
2061 param_field[2] = _ascebc['I'];
2062 param_field[3] = _ascebc['T'];
2063 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2064 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2065 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2068 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2071 param_field[16] = _ascebc['B'];
2072 param_field[17] = _ascebc['L'];
2073 param_field[18] = _ascebc['K'];
2074 param_field[19] = _ascebc['T'];
2075 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2076 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2077 *((unsigned int *) (¶m_field[28])) =
2078 card->info.blkt.inter_packet_jumbo;
2081 static int qeth_qdio_activate(struct qeth_card *card)
2083 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2084 return qdio_activate(CARD_DDEV(card), 0);
2087 static int qeth_dm_act(struct qeth_card *card)
2090 struct qeth_cmd_buffer *iob;
2092 QETH_DBF_TEXT(SETUP, 2, "dmact");
2094 iob = qeth_wait_for_buffer(&card->write);
2095 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2097 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2098 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2099 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2100 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2101 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2105 static int qeth_mpc_initialize(struct qeth_card *card)
2109 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2111 rc = qeth_issue_next_read(card);
2113 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2116 rc = qeth_cm_enable(card);
2118 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2121 rc = qeth_cm_setup(card);
2123 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2126 rc = qeth_ulp_enable(card);
2128 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2131 rc = qeth_ulp_setup(card);
2133 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2136 rc = qeth_alloc_qdio_buffers(card);
2138 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2141 rc = qeth_qdio_establish(card);
2143 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2144 qeth_free_qdio_buffers(card);
2147 rc = qeth_qdio_activate(card);
2149 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2152 rc = qeth_dm_act(card);
2154 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2160 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2164 static void qeth_print_status_with_portname(struct qeth_card *card)
2169 sprintf(dbf_text, "%s", card->info.portname + 1);
2170 for (i = 0; i < 8; i++)
2172 (char) _ebcasc[(__u8) dbf_text[i]];
2174 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n"
2175 "with link type %s (portname: %s)\n",
2179 qeth_get_cardname(card),
2180 (card->info.mcl_level[0]) ? " (level: " : "",
2181 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2182 (card->info.mcl_level[0]) ? ")" : "",
2183 qeth_get_cardname_short(card),
2188 static void qeth_print_status_no_portname(struct qeth_card *card)
2190 if (card->info.portname[0])
2191 PRINT_INFO("Device %s/%s/%s is a%s "
2192 "card%s%s%s\nwith link type %s "
2193 "(no portname needed by interface).\n",
2197 qeth_get_cardname(card),
2198 (card->info.mcl_level[0]) ? " (level: " : "",
2199 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2200 (card->info.mcl_level[0]) ? ")" : "",
2201 qeth_get_cardname_short(card));
2203 PRINT_INFO("Device %s/%s/%s is a%s "
2204 "card%s%s%s\nwith link type %s.\n",
2208 qeth_get_cardname(card),
2209 (card->info.mcl_level[0]) ? " (level: " : "",
2210 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2211 (card->info.mcl_level[0]) ? ")" : "",
2212 qeth_get_cardname_short(card));
2215 void qeth_print_status_message(struct qeth_card *card)
2217 switch (card->info.type) {
2218 case QETH_CARD_TYPE_OSAE:
2219 /* VM will use a non-zero first character
2220 * to indicate a HiperSockets like reporting
2221 * of the level OSA sets the first character to zero
2223 if (!card->info.mcl_level[0]) {
2224 sprintf(card->info.mcl_level, "%02x%02x",
2225 card->info.mcl_level[2],
2226 card->info.mcl_level[3]);
2228 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2232 case QETH_CARD_TYPE_IQD:
2233 if (card->info.guestlan) {
2234 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2235 card->info.mcl_level[0]];
2236 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2237 card->info.mcl_level[1]];
2238 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2239 card->info.mcl_level[2]];
2240 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2241 card->info.mcl_level[3]];
2242 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2246 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2248 if (card->info.portname_required)
2249 qeth_print_status_with_portname(card);
2251 qeth_print_status_no_portname(card);
2253 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2255 void qeth_put_buffer_pool_entry(struct qeth_card *card,
2256 struct qeth_buffer_pool_entry *entry)
2258 QETH_DBF_TEXT(TRACE, 6, "ptbfplen");
2259 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
2261 EXPORT_SYMBOL_GPL(qeth_put_buffer_pool_entry);
2263 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2265 struct qeth_buffer_pool_entry *entry;
2267 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2269 list_for_each_entry(entry,
2270 &card->qdio.init_pool.entry_list, init_list) {
2271 qeth_put_buffer_pool_entry(card, entry);
2275 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2276 struct qeth_card *card)
2278 struct list_head *plh;
2279 struct qeth_buffer_pool_entry *entry;
2283 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2286 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2287 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2289 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2290 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2296 list_del_init(&entry->list);
2301 /* no free buffer in pool so take first one and swap pages */
2302 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2303 struct qeth_buffer_pool_entry, list);
2304 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2305 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2306 page = alloc_page(GFP_ATOMIC);
2310 free_page((unsigned long)entry->elements[i]);
2311 entry->elements[i] = page_address(page);
2312 if (card->options.performance_stats)
2313 card->perf_stats.sg_alloc_page_rx++;
2317 list_del_init(&entry->list);
2321 static int qeth_init_input_buffer(struct qeth_card *card,
2322 struct qeth_qdio_buffer *buf)
2324 struct qeth_buffer_pool_entry *pool_entry;
2327 pool_entry = qeth_find_free_buffer_pool_entry(card);
2332 * since the buffer is accessed only from the input_tasklet
2333 * there shouldn't be a need to synchronize; also, since we use
2334 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2337 BUG_ON(!pool_entry);
2339 buf->pool_entry = pool_entry;
2340 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2341 buf->buffer->element[i].length = PAGE_SIZE;
2342 buf->buffer->element[i].addr = pool_entry->elements[i];
2343 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2344 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2346 buf->buffer->element[i].flags = 0;
2351 int qeth_init_qdio_queues(struct qeth_card *card)
2356 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2359 memset(card->qdio.in_q->qdio_bufs, 0,
2360 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2361 qeth_initialize_working_pool_list(card);
2362 /*give only as many buffers to hardware as we have buffer pool entries*/
2363 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2364 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2365 card->qdio.in_q->next_buf_to_init =
2366 card->qdio.in_buf_pool.buf_count - 1;
2367 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2368 card->qdio.in_buf_pool.buf_count - 1, NULL);
2370 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2373 rc = qdio_synchronize(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0);
2375 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2378 /* outbound queue */
2379 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2380 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2381 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2382 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2383 qeth_clear_output_buffer(card->qdio.out_qs[i],
2384 &card->qdio.out_qs[i]->bufs[j]);
2386 card->qdio.out_qs[i]->card = card;
2387 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2388 card->qdio.out_qs[i]->do_pack = 0;
2389 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2390 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2391 atomic_set(&card->qdio.out_qs[i]->state,
2392 QETH_OUT_Q_UNLOCKED);
2396 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2398 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2400 switch (link_type) {
2401 case QETH_LINK_TYPE_HSTR:
2408 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2409 struct qeth_ipa_cmd *cmd, __u8 command,
2410 enum qeth_prot_versions prot)
2412 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2413 cmd->hdr.command = command;
2414 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2415 cmd->hdr.seqno = card->seqno.ipa;
2416 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2417 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2418 if (card->options.layer2)
2419 cmd->hdr.prim_version_no = 2;
2421 cmd->hdr.prim_version_no = 1;
2422 cmd->hdr.param_count = 1;
2423 cmd->hdr.prot_version = prot;
2424 cmd->hdr.ipa_supported = 0;
2425 cmd->hdr.ipa_enabled = 0;
2428 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2429 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2431 struct qeth_cmd_buffer *iob;
2432 struct qeth_ipa_cmd *cmd;
2434 iob = qeth_wait_for_buffer(&card->write);
2435 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2436 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2440 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2442 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2445 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2446 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2447 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2448 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2450 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2452 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2453 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2460 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2462 if (card->options.layer2)
2463 if (card->info.type == QETH_CARD_TYPE_OSN)
2464 prot_type = QETH_PROT_OSN2;
2466 prot_type = QETH_PROT_LAYER2;
2468 prot_type = QETH_PROT_TCPIP;
2469 qeth_prepare_ipa_cmd(card, iob, prot_type);
2470 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2471 iob, reply_cb, reply_param);
2474 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2476 static int qeth_send_startstoplan(struct qeth_card *card,
2477 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2480 struct qeth_cmd_buffer *iob;
2482 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2483 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2488 int qeth_send_startlan(struct qeth_card *card)
2492 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2494 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2497 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2499 int qeth_send_stoplan(struct qeth_card *card)
2504 * TODO: according to the IPA format document page 14,
2505 * TCP/IP (we!) never issue a STOPLAN
2508 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2510 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2513 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2515 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2516 struct qeth_reply *reply, unsigned long data)
2518 struct qeth_ipa_cmd *cmd;
2520 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2522 cmd = (struct qeth_ipa_cmd *) data;
2523 if (cmd->hdr.return_code == 0)
2524 cmd->hdr.return_code =
2525 cmd->data.setadapterparms.hdr.return_code;
2528 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2530 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2531 struct qeth_reply *reply, unsigned long data)
2533 struct qeth_ipa_cmd *cmd;
2535 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2537 cmd = (struct qeth_ipa_cmd *) data;
2538 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2539 card->info.link_type =
2540 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2541 card->options.adp.supported_funcs =
2542 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2543 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2546 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2547 __u32 command, __u32 cmdlen)
2549 struct qeth_cmd_buffer *iob;
2550 struct qeth_ipa_cmd *cmd;
2552 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2554 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2555 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2556 cmd->data.setadapterparms.hdr.command_code = command;
2557 cmd->data.setadapterparms.hdr.used_total = 1;
2558 cmd->data.setadapterparms.hdr.seq_no = 1;
2562 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2564 int qeth_query_setadapterparms(struct qeth_card *card)
2567 struct qeth_cmd_buffer *iob;
2569 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2570 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2571 sizeof(struct qeth_ipacmd_setadpparms));
2572 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2575 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2577 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2578 unsigned int siga_error, const char *dbftext)
2580 if (qdio_error || siga_error) {
2581 QETH_DBF_TEXT(TRACE, 2, dbftext);
2582 QETH_DBF_TEXT(QERR, 2, dbftext);
2583 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2584 buf->element[15].flags & 0xff);
2585 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2586 buf->element[14].flags & 0xff);
2587 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2588 QETH_DBF_TEXT_(QERR, 2, " serr=%X", siga_error);
2593 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2595 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2597 struct qeth_qdio_q *queue = card->qdio.in_q;
2603 QETH_DBF_TEXT(TRACE, 6, "queinbuf");
2604 count = (index < queue->next_buf_to_init)?
2605 card->qdio.in_buf_pool.buf_count -
2606 (queue->next_buf_to_init - index) :
2607 card->qdio.in_buf_pool.buf_count -
2608 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2609 /* only requeue at a certain threshold to avoid SIGAs */
2610 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2611 for (i = queue->next_buf_to_init;
2612 i < queue->next_buf_to_init + count; ++i) {
2613 if (qeth_init_input_buffer(card,
2614 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2621 if (newcount < count) {
2622 /* we are in memory shortage so we switch back to
2623 traditional skb allocation and drop packages */
2624 if (!atomic_read(&card->force_alloc_skb) &&
2626 PRINT_WARN("Switch to alloc skb\n");
2627 atomic_set(&card->force_alloc_skb, 3);
2630 if ((atomic_read(&card->force_alloc_skb) == 1) &&
2632 PRINT_WARN("Switch to sg\n");
2633 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2637 * according to old code it should be avoided to requeue all
2638 * 128 buffers in order to benefit from PCI avoidance.
2639 * this function keeps at least one buffer (the buffer at
2640 * 'index') un-requeued -> this buffer is the first buffer that
2641 * will be requeued the next time
2643 if (card->options.performance_stats) {
2644 card->perf_stats.inbound_do_qdio_cnt++;
2645 card->perf_stats.inbound_do_qdio_start_time =
2648 rc = do_QDIO(CARD_DDEV(card),
2649 QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
2650 0, queue->next_buf_to_init, count, NULL);
2651 if (card->options.performance_stats)
2652 card->perf_stats.inbound_do_qdio_time +=
2654 card->perf_stats.inbound_do_qdio_start_time;
2656 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2657 "return %i (device %s).\n",
2658 rc, CARD_DDEV_ID(card));
2659 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2660 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2662 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2663 QDIO_MAX_BUFFERS_PER_Q;
2666 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2668 static int qeth_handle_send_error(struct qeth_card *card,
2669 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err,
2670 unsigned int siga_err)
2672 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2673 int cc = siga_err & 3;
2675 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2676 qeth_check_qdio_errors(buffer->buffer, qdio_err, siga_err, "qouterr");
2680 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2681 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2682 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2683 (u16)qdio_err, (u8)sbalf15);
2684 return QETH_SEND_ERROR_LINK_FAILURE;
2686 return QETH_SEND_ERROR_NONE;
2688 if (siga_err & QDIO_SIGA_ERROR_B_BIT_SET) {
2689 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2690 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2691 return QETH_SEND_ERROR_KICK_IT;
2693 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2694 return QETH_SEND_ERROR_RETRY;
2695 return QETH_SEND_ERROR_LINK_FAILURE;
2696 /* look at qdio_error and sbalf 15 */
2698 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2699 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2700 return QETH_SEND_ERROR_LINK_FAILURE;
2703 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2704 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2705 return QETH_SEND_ERROR_KICK_IT;
2710 * Switched to packing state if the number of used buffers on a queue
2711 * reaches a certain limit.
2713 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2715 if (!queue->do_pack) {
2716 if (atomic_read(&queue->used_buffers)
2717 >= QETH_HIGH_WATERMARK_PACK){
2718 /* switch non-PACKING -> PACKING */
2719 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2720 if (queue->card->options.performance_stats)
2721 queue->card->perf_stats.sc_dp_p++;
2728 * Switches from packing to non-packing mode. If there is a packing
2729 * buffer on the queue this buffer will be prepared to be flushed.
2730 * In that case 1 is returned to inform the caller. If no buffer
2731 * has to be flushed, zero is returned.
2733 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2735 struct qeth_qdio_out_buffer *buffer;
2736 int flush_count = 0;
2738 if (queue->do_pack) {
2739 if (atomic_read(&queue->used_buffers)
2740 <= QETH_LOW_WATERMARK_PACK) {
2741 /* switch PACKING -> non-PACKING */
2742 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2743 if (queue->card->options.performance_stats)
2744 queue->card->perf_stats.sc_p_dp++;
2746 /* flush packing buffers */
2747 buffer = &queue->bufs[queue->next_buf_to_fill];
2748 if ((atomic_read(&buffer->state) ==
2749 QETH_QDIO_BUF_EMPTY) &&
2750 (buffer->next_element_to_fill > 0)) {
2751 atomic_set(&buffer->state,
2752 QETH_QDIO_BUF_PRIMED);
2754 queue->next_buf_to_fill =
2755 (queue->next_buf_to_fill + 1) %
2756 QDIO_MAX_BUFFERS_PER_Q;
2764 * Called to flush a packing buffer if no more pci flags are on the queue.
2765 * Checks if there is a packing buffer and prepares it to be flushed.
2766 * In that case returns 1, otherwise zero.
2768 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2770 struct qeth_qdio_out_buffer *buffer;
2772 buffer = &queue->bufs[queue->next_buf_to_fill];
2773 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2774 (buffer->next_element_to_fill > 0)) {
2775 /* it's a packing buffer */
2776 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2777 queue->next_buf_to_fill =
2778 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2784 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int under_int,
2785 int index, int count)
2787 struct qeth_qdio_out_buffer *buf;
2790 unsigned int qdio_flags;
2792 QETH_DBF_TEXT(TRACE, 6, "flushbuf");
2794 for (i = index; i < index + count; ++i) {
2795 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2796 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2797 SBAL_FLAGS_LAST_ENTRY;
2799 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2802 if (!queue->do_pack) {
2803 if ((atomic_read(&queue->used_buffers) >=
2804 (QETH_HIGH_WATERMARK_PACK -
2805 QETH_WATERMARK_PACK_FUZZ)) &&
2806 !atomic_read(&queue->set_pci_flags_count)) {
2807 /* it's likely that we'll go to packing
2809 atomic_inc(&queue->set_pci_flags_count);
2810 buf->buffer->element[0].flags |= 0x40;
2813 if (!atomic_read(&queue->set_pci_flags_count)) {
2815 * there's no outstanding PCI any more, so we
2816 * have to request a PCI to be sure the the PCI
2817 * will wake at some time in the future then we
2818 * can flush packed buffers that might still be
2819 * hanging around, which can happen if no
2820 * further send was requested by the stack
2822 atomic_inc(&queue->set_pci_flags_count);
2823 buf->buffer->element[0].flags |= 0x40;
2828 queue->card->dev->trans_start = jiffies;
2829 if (queue->card->options.performance_stats) {
2830 queue->card->perf_stats.outbound_do_qdio_cnt++;
2831 queue->card->perf_stats.outbound_do_qdio_start_time =
2834 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2836 qdio_flags |= QDIO_FLAG_UNDER_INTERRUPT;
2837 if (atomic_read(&queue->set_pci_flags_count))
2838 qdio_flags |= QDIO_FLAG_PCI_OUT;
2839 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2840 queue->queue_no, index, count, NULL);
2841 if (queue->card->options.performance_stats)
2842 queue->card->perf_stats.outbound_do_qdio_time +=
2844 queue->card->perf_stats.outbound_do_qdio_start_time;
2846 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2847 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2848 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2849 queue->card->stats.tx_errors += count;
2850 /* this must not happen under normal circumstances. if it
2851 * happens something is really wrong -> recover */
2852 qeth_schedule_recovery(queue->card);
2855 atomic_add(count, &queue->used_buffers);
2856 if (queue->card->options.performance_stats)
2857 queue->card->perf_stats.bufs_sent += count;
2860 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2864 int q_was_packing = 0;
2867 * check if weed have to switch to non-packing mode or if
2868 * we have to get a pci flag out on the queue
2870 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2871 !atomic_read(&queue->set_pci_flags_count)) {
2872 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2873 QETH_OUT_Q_UNLOCKED) {
2875 * If we get in here, there was no action in
2876 * do_send_packet. So, we check if there is a
2877 * packing buffer to be flushed here.
2879 netif_stop_queue(queue->card->dev);
2880 index = queue->next_buf_to_fill;
2881 q_was_packing = queue->do_pack;
2882 /* queue->do_pack may change */
2884 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2886 !atomic_read(&queue->set_pci_flags_count))
2888 qeth_flush_buffers_on_no_pci(queue);
2889 if (queue->card->options.performance_stats &&
2891 queue->card->perf_stats.bufs_sent_pack +=
2894 qeth_flush_buffers(queue, 1, index, flush_cnt);
2895 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2900 void qeth_qdio_output_handler(struct ccw_device *ccwdev, unsigned int status,
2901 unsigned int qdio_error, unsigned int siga_error,
2902 unsigned int __queue, int first_element, int count,
2903 unsigned long card_ptr)
2905 struct qeth_card *card = (struct qeth_card *) card_ptr;
2906 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2907 struct qeth_qdio_out_buffer *buffer;
2910 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2911 if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
2912 if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION) {
2913 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2914 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2915 QETH_DBF_TEXT_(TRACE, 2, "%08x", status);
2916 netif_stop_queue(card->dev);
2917 qeth_schedule_recovery(card);
2921 if (card->options.performance_stats) {
2922 card->perf_stats.outbound_handler_cnt++;
2923 card->perf_stats.outbound_handler_start_time =
2926 for (i = first_element; i < (first_element + count); ++i) {
2927 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2928 /*we only handle the KICK_IT error by doing a recovery */
2929 if (qeth_handle_send_error(card, buffer,
2930 qdio_error, siga_error)
2931 == QETH_SEND_ERROR_KICK_IT){
2932 netif_stop_queue(card->dev);
2933 qeth_schedule_recovery(card);
2936 qeth_clear_output_buffer(queue, buffer);
2938 atomic_sub(count, &queue->used_buffers);
2939 /* check if we need to do something on this outbound queue */
2940 if (card->info.type != QETH_CARD_TYPE_IQD)
2941 qeth_check_outbound_queue(queue);
2943 netif_wake_queue(queue->card->dev);
2944 if (card->options.performance_stats)
2945 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2946 card->perf_stats.outbound_handler_start_time;
2948 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2950 int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2952 int cast_type = RTN_UNSPEC;
2954 if (card->info.type == QETH_CARD_TYPE_OSN)
2957 if (skb->dst && skb->dst->neighbour) {
2958 cast_type = skb->dst->neighbour->type;
2959 if ((cast_type == RTN_BROADCAST) ||
2960 (cast_type == RTN_MULTICAST) ||
2961 (cast_type == RTN_ANYCAST))
2966 /* try something else */
2967 if (skb->protocol == ETH_P_IPV6)
2968 return (skb_network_header(skb)[24] == 0xff) ?
2970 else if (skb->protocol == ETH_P_IP)
2971 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2974 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2975 return RTN_BROADCAST;
2979 hdr_mac = *((u16 *)skb->data);
2981 switch (card->info.link_type) {
2982 case QETH_LINK_TYPE_HSTR:
2983 case QETH_LINK_TYPE_LANE_TR:
2984 if ((hdr_mac == QETH_TR_MAC_NC) ||
2985 (hdr_mac == QETH_TR_MAC_C))
2986 return RTN_MULTICAST;
2988 /* eth or so multicast? */
2990 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2991 (hdr_mac == QETH_ETH_MAC_V6))
2992 return RTN_MULTICAST;
2997 EXPORT_SYMBOL_GPL(qeth_get_cast_type);
2999 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3000 int ipv, int cast_type)
3002 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
3003 return card->qdio.default_out_queue;
3004 switch (card->qdio.no_out_queues) {
3006 if (cast_type && card->info.is_multicast_different)
3007 return card->info.is_multicast_different &
3008 (card->qdio.no_out_queues - 1);
3009 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3010 const u8 tos = ip_hdr(skb)->tos;
3012 if (card->qdio.do_prio_queueing ==
3013 QETH_PRIO_Q_ING_TOS) {
3014 if (tos & IP_TOS_NOTIMPORTANT)
3016 if (tos & IP_TOS_HIGHRELIABILITY)
3018 if (tos & IP_TOS_HIGHTHROUGHPUT)
3020 if (tos & IP_TOS_LOWDELAY)
3023 if (card->qdio.do_prio_queueing ==
3024 QETH_PRIO_Q_ING_PREC)
3025 return 3 - (tos >> 6);
3026 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3029 return card->qdio.default_out_queue;
3030 case 1: /* fallthrough for single-out-queue 1920-device */
3032 return card->qdio.default_out_queue;
3035 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3037 static void __qeth_free_new_skb(struct sk_buff *orig_skb,
3038 struct sk_buff *new_skb)
3040 if (orig_skb != new_skb)
3041 dev_kfree_skb_any(new_skb);
3044 static inline struct sk_buff *qeth_realloc_headroom(struct qeth_card *card,
3045 struct sk_buff *skb, int size)
3047 struct sk_buff *new_skb = skb;
3049 if (skb_headroom(skb) >= size)
3051 new_skb = skb_realloc_headroom(skb, size);
3053 PRINT_ERR("Could not realloc headroom for qeth_hdr "
3054 "on interface %s", QETH_CARD_IFNAME(card));
3058 struct sk_buff *qeth_prepare_skb(struct qeth_card *card, struct sk_buff *skb,
3059 struct qeth_hdr **hdr)
3061 struct sk_buff *new_skb;
3063 QETH_DBF_TEXT(TRACE, 6, "prepskb");
3065 new_skb = qeth_realloc_headroom(card, skb,
3066 sizeof(struct qeth_hdr));
3070 *hdr = ((struct qeth_hdr *)qeth_push_skb(card, new_skb,
3071 sizeof(struct qeth_hdr)));
3073 __qeth_free_new_skb(skb, new_skb);
3078 EXPORT_SYMBOL_GPL(qeth_prepare_skb);
3080 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3081 struct sk_buff *skb, int elems)
3083 int elements_needed = 0;
3085 if (skb_shinfo(skb)->nr_frags > 0)
3086 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3087 if (elements_needed == 0)
3088 elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
3089 + skb->len) >> PAGE_SHIFT);
3090 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3091 PRINT_ERR("Invalid size of IP packet "
3092 "(Number=%d / Length=%d). Discarded.\n",
3093 (elements_needed+elems), skb->len);
3096 return elements_needed;
3098 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3100 static void __qeth_fill_buffer(struct sk_buff *skb, struct qdio_buffer *buffer,
3101 int is_tso, int *next_element_to_fill)
3103 int length = skb->len;
3109 element = *next_element_to_fill;
3111 first_lap = (is_tso == 0 ? 1 : 0);
3113 while (length > 0) {
3114 /* length_here is the remaining amount of data in this page */
3115 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3116 if (length < length_here)
3117 length_here = length;
3119 buffer->element[element].addr = data;
3120 buffer->element[element].length = length_here;
3121 length -= length_here;
3124 buffer->element[element].flags = 0;
3126 buffer->element[element].flags =
3127 SBAL_FLAGS_LAST_FRAG;
3130 buffer->element[element].flags =
3131 SBAL_FLAGS_FIRST_FRAG;
3133 buffer->element[element].flags =
3134 SBAL_FLAGS_MIDDLE_FRAG;
3136 data += length_here;
3140 *next_element_to_fill = element;
3143 static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3144 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb)
3146 struct qdio_buffer *buffer;
3147 struct qeth_hdr_tso *hdr;
3148 int flush_cnt = 0, hdr_len, large_send = 0;
3150 QETH_DBF_TEXT(TRACE, 6, "qdfillbf");
3152 buffer = buf->buffer;
3153 atomic_inc(&skb->users);
3154 skb_queue_tail(&buf->skb_list, skb);
3156 hdr = (struct qeth_hdr_tso *) skb->data;
3157 /*check first on TSO ....*/
3158 if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3159 int element = buf->next_element_to_fill;
3161 hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
3162 /*fill first buffer entry only with header information */
3163 buffer->element[element].addr = skb->data;
3164 buffer->element[element].length = hdr_len;
3165 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3166 buf->next_element_to_fill++;
3167 skb->data += hdr_len;
3168 skb->len -= hdr_len;
3171 if (skb_shinfo(skb)->nr_frags == 0)
3172 __qeth_fill_buffer(skb, buffer, large_send,
3173 (int *)&buf->next_element_to_fill);
3175 __qeth_fill_buffer_frag(skb, buffer, large_send,
3176 (int *)&buf->next_element_to_fill);
3178 if (!queue->do_pack) {
3179 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3180 /* set state to PRIMED -> will be flushed */
3181 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3184 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3185 if (queue->card->options.performance_stats)
3186 queue->card->perf_stats.skbs_sent_pack++;
3187 if (buf->next_element_to_fill >=
3188 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3190 * packed buffer if full -> set state PRIMED
3191 * -> will be flushed
3193 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3200 int qeth_do_send_packet_fast(struct qeth_card *card,
3201 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3202 struct qeth_hdr *hdr, int elements_needed,
3203 struct qeth_eddp_context *ctx)
3205 struct qeth_qdio_out_buffer *buffer;
3206 int buffers_needed = 0;
3210 QETH_DBF_TEXT(TRACE, 6, "dosndpfa");
3212 /* spin until we get the queue ... */
3213 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3214 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3215 /* ... now we've got the queue */
3216 index = queue->next_buf_to_fill;
3217 buffer = &queue->bufs[queue->next_buf_to_fill];
3219 * check if buffer is empty to make sure that we do not 'overtake'
3220 * ourselves and try to fill a buffer that is already primed
3222 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3225 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3226 QDIO_MAX_BUFFERS_PER_Q;
3228 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3230 if (buffers_needed < 0)
3232 queue->next_buf_to_fill =
3233 (queue->next_buf_to_fill + buffers_needed) %
3234 QDIO_MAX_BUFFERS_PER_Q;
3236 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3238 qeth_fill_buffer(queue, buffer, skb);
3239 qeth_flush_buffers(queue, 0, index, 1);
3241 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3242 WARN_ON(buffers_needed != flush_cnt);
3243 qeth_flush_buffers(queue, 0, index, flush_cnt);
3247 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3250 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3252 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3253 struct sk_buff *skb, struct qeth_hdr *hdr,
3254 int elements_needed, struct qeth_eddp_context *ctx)
3256 struct qeth_qdio_out_buffer *buffer;
3258 int flush_count = 0;
3263 QETH_DBF_TEXT(TRACE, 6, "dosndpkt");
3265 /* spin until we get the queue ... */
3266 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3267 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3268 start_index = queue->next_buf_to_fill;
3269 buffer = &queue->bufs[queue->next_buf_to_fill];
3271 * check if buffer is empty to make sure that we do not 'overtake'
3272 * ourselves and try to fill a buffer that is already primed
3274 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3275 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3278 /* check if we need to switch packing state of this queue */
3279 qeth_switch_to_packing_if_needed(queue);
3280 if (queue->do_pack) {
3283 /* does packet fit in current buffer? */
3284 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3285 buffer->next_element_to_fill) < elements_needed) {
3286 /* ... no -> set state PRIMED */
3287 atomic_set(&buffer->state,
3288 QETH_QDIO_BUF_PRIMED);
3290 queue->next_buf_to_fill =
3291 (queue->next_buf_to_fill + 1) %
3292 QDIO_MAX_BUFFERS_PER_Q;
3293 buffer = &queue->bufs[queue->next_buf_to_fill];
3294 /* we did a step forward, so check buffer state
3296 if (atomic_read(&buffer->state) !=
3297 QETH_QDIO_BUF_EMPTY){
3298 qeth_flush_buffers(queue, 0,
3299 start_index, flush_count);
3300 atomic_set(&queue->state,
3301 QETH_OUT_Q_UNLOCKED);
3306 /* check if we have enough elements (including following
3307 * free buffers) to handle eddp context */
3308 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3310 if (net_ratelimit())
3311 PRINT_WARN("eddp tx_dropped 1\n");
3318 tmp = qeth_fill_buffer(queue, buffer, skb);
3320 tmp = qeth_eddp_fill_buffer(queue, ctx,
3321 queue->next_buf_to_fill);
3323 PRINT_ERR("eddp tx_dropped 2\n");
3328 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3329 QDIO_MAX_BUFFERS_PER_Q;
3333 qeth_flush_buffers(queue, 0, start_index, flush_count);
3334 else if (!atomic_read(&queue->set_pci_flags_count))
3335 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3337 * queue->state will go from LOCKED -> UNLOCKED or from
3338 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3339 * (switch packing state or flush buffer to get another pci flag out).
3340 * In that case we will enter this loop
3342 while (atomic_dec_return(&queue->state)) {
3344 start_index = queue->next_buf_to_fill;
3345 /* check if we can go back to non-packing state */
3346 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3348 * check if we need to flush a packing buffer to get a pci
3349 * flag out on the queue
3351 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3352 flush_count += qeth_flush_buffers_on_no_pci(queue);
3354 qeth_flush_buffers(queue, 0, start_index, flush_count);
3356 /* at this point the queue is UNLOCKED again */
3357 if (queue->card->options.performance_stats && do_pack)
3358 queue->card->perf_stats.bufs_sent_pack += flush_count;
3362 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3364 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3365 struct qeth_reply *reply, unsigned long data)
3367 struct qeth_ipa_cmd *cmd;
3368 struct qeth_ipacmd_setadpparms *setparms;
3370 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3372 cmd = (struct qeth_ipa_cmd *) data;
3373 setparms = &(cmd->data.setadapterparms);
3375 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3376 if (cmd->hdr.return_code) {
3377 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3378 setparms->data.mode = SET_PROMISC_MODE_OFF;
3380 card->info.promisc_mode = setparms->data.mode;
3384 void qeth_setadp_promisc_mode(struct qeth_card *card)
3386 enum qeth_ipa_promisc_modes mode;
3387 struct net_device *dev = card->dev;
3388 struct qeth_cmd_buffer *iob;
3389 struct qeth_ipa_cmd *cmd;
3391 QETH_DBF_TEXT(TRACE, 4, "setprom");
3393 if (((dev->flags & IFF_PROMISC) &&
3394 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3395 (!(dev->flags & IFF_PROMISC) &&
3396 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3398 mode = SET_PROMISC_MODE_OFF;
3399 if (dev->flags & IFF_PROMISC)
3400 mode = SET_PROMISC_MODE_ON;
3401 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3403 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3404 sizeof(struct qeth_ipacmd_setadpparms));
3405 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3406 cmd->data.setadapterparms.data.mode = mode;
3407 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3409 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3411 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3413 struct qeth_card *card;
3416 card = netdev_priv(dev);
3418 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3419 sprintf(dbf_text, "%8x", new_mtu);
3420 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3424 if (new_mtu > 65535)
3426 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3427 (!qeth_mtu_is_valid(card, new_mtu)))
3432 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3434 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3436 struct qeth_card *card;
3438 card = netdev_priv(dev);
3440 QETH_DBF_TEXT(TRACE, 5, "getstat");
3442 return &card->stats;
3444 EXPORT_SYMBOL_GPL(qeth_get_stats);
3446 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3447 struct qeth_reply *reply, unsigned long data)
3449 struct qeth_ipa_cmd *cmd;
3451 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3453 cmd = (struct qeth_ipa_cmd *) data;
3454 if (!card->options.layer2 ||
3455 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3456 memcpy(card->dev->dev_addr,
3457 &cmd->data.setadapterparms.data.change_addr.addr,
3459 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3461 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3465 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3468 struct qeth_cmd_buffer *iob;
3469 struct qeth_ipa_cmd *cmd;
3471 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3473 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3474 sizeof(struct qeth_ipacmd_setadpparms));
3475 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3476 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3477 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3478 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3479 card->dev->dev_addr, OSA_ADDR_LEN);
3480 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3484 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3486 void qeth_tx_timeout(struct net_device *dev)
3488 struct qeth_card *card;
3490 card = netdev_priv(dev);
3491 card->stats.tx_errors++;
3492 qeth_schedule_recovery(card);
3494 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3496 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3498 struct qeth_card *card = netdev_priv(dev);
3502 case MII_BMCR: /* Basic mode control register */
3504 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3505 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3506 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3507 rc |= BMCR_SPEED100;
3509 case MII_BMSR: /* Basic mode status register */
3510 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3511 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3514 case MII_PHYSID1: /* PHYS ID 1 */
3515 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3517 rc = (rc >> 5) & 0xFFFF;
3519 case MII_PHYSID2: /* PHYS ID 2 */
3520 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3522 case MII_ADVERTISE: /* Advertisement control reg */
3525 case MII_LPA: /* Link partner ability reg */
3526 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3527 LPA_100BASE4 | LPA_LPACK;
3529 case MII_EXPANSION: /* Expansion register */
3531 case MII_DCOUNTER: /* disconnect counter */
3533 case MII_FCSCOUNTER: /* false carrier counter */
3535 case MII_NWAYTEST: /* N-way auto-neg test register */
3537 case MII_RERRCOUNTER: /* rx error counter */
3538 rc = card->stats.rx_errors;
3540 case MII_SREVISION: /* silicon revision */
3542 case MII_RESV1: /* reserved 1 */
3544 case MII_LBRERROR: /* loopback, rx, bypass error */
3546 case MII_PHYADDR: /* physical address */
3548 case MII_RESV2: /* reserved 2 */
3550 case MII_TPISTATUS: /* TPI status for 10mbps */
3552 case MII_NCONFIG: /* network interface config */
3559 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3561 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3562 struct qeth_cmd_buffer *iob, int len,
3563 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3569 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3571 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3572 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3573 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3574 /* adjust PDU length fields in IPA_PDU_HEADER */
3575 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3577 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3578 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3579 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3580 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3581 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3582 reply_cb, reply_param);
3585 static int qeth_snmp_command_cb(struct qeth_card *card,
3586 struct qeth_reply *reply, unsigned long sdata)
3588 struct qeth_ipa_cmd *cmd;
3589 struct qeth_arp_query_info *qinfo;
3590 struct qeth_snmp_cmd *snmp;
3591 unsigned char *data;
3594 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3596 cmd = (struct qeth_ipa_cmd *) sdata;
3597 data = (unsigned char *)((char *)cmd - reply->offset);
3598 qinfo = (struct qeth_arp_query_info *) reply->param;
3599 snmp = &cmd->data.setadapterparms.data.snmp;
3601 if (cmd->hdr.return_code) {
3602 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3605 if (cmd->data.setadapterparms.hdr.return_code) {
3606 cmd->hdr.return_code =
3607 cmd->data.setadapterparms.hdr.return_code;
3608 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3611 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3612 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3613 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3615 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3617 /* check if there is enough room in userspace */
3618 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3619 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3620 cmd->hdr.return_code = -ENOMEM;
3623 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3624 cmd->data.setadapterparms.hdr.used_total);
3625 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3626 cmd->data.setadapterparms.hdr.seq_no);
3627 /*copy entries to user buffer*/
3628 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3629 memcpy(qinfo->udata + qinfo->udata_offset,
3631 data_len + offsetof(struct qeth_snmp_cmd, data));
3632 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3634 memcpy(qinfo->udata + qinfo->udata_offset,
3635 (char *)&snmp->request, data_len);
3637 qinfo->udata_offset += data_len;
3638 /* check if all replies received ... */
3639 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3640 cmd->data.setadapterparms.hdr.used_total);
3641 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3642 cmd->data.setadapterparms.hdr.seq_no);
3643 if (cmd->data.setadapterparms.hdr.seq_no <
3644 cmd->data.setadapterparms.hdr.used_total)
3649 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3651 struct qeth_cmd_buffer *iob;
3652 struct qeth_ipa_cmd *cmd;
3653 struct qeth_snmp_ureq *ureq;
3655 struct qeth_arp_query_info qinfo = {0, };
3658 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3660 if (card->info.guestlan)
3663 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3664 (!card->options.layer2)) {
3665 PRINT_WARN("SNMP Query MIBS not supported "
3666 "on %s!\n", QETH_CARD_IFNAME(card));
3669 /* skip 4 bytes (data_len struct member) to get req_len */
3670 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3672 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3674 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3677 if (copy_from_user(ureq, udata,
3678 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3682 qinfo.udata_len = ureq->hdr.data_len;
3683 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3688 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3690 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3691 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3692 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3693 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3694 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3695 qeth_snmp_command_cb, (void *)&qinfo);
3697 PRINT_WARN("SNMP command failed on %s: (0x%x)\n",
3698 QETH_CARD_IFNAME(card), rc);
3700 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3708 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3710 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3712 switch (card->info.type) {
3713 case QETH_CARD_TYPE_IQD:
3720 static int qeth_qdio_establish(struct qeth_card *card)
3722 struct qdio_initialize init_data;
3723 char *qib_param_field;
3724 struct qdio_buffer **in_sbal_ptrs;
3725 struct qdio_buffer **out_sbal_ptrs;
3729 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3731 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3733 if (!qib_param_field)
3736 qeth_create_qib_param_field(card, qib_param_field);
3737 qeth_create_qib_param_field_blkt(card, qib_param_field);
3739 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3741 if (!in_sbal_ptrs) {
3742 kfree(qib_param_field);
3745 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3746 in_sbal_ptrs[i] = (struct qdio_buffer *)
3747 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3750 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3751 sizeof(void *), GFP_KERNEL);
3752 if (!out_sbal_ptrs) {
3753 kfree(in_sbal_ptrs);
3754 kfree(qib_param_field);
3757 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3758 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3759 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3760 card->qdio.out_qs[i]->bufs[j].buffer);
3763 memset(&init_data, 0, sizeof(struct qdio_initialize));
3764 init_data.cdev = CARD_DDEV(card);
3765 init_data.q_format = qeth_get_qdio_q_format(card);
3766 init_data.qib_param_field_format = 0;
3767 init_data.qib_param_field = qib_param_field;
3768 init_data.min_input_threshold = QETH_MIN_INPUT_THRESHOLD;
3769 init_data.max_input_threshold = QETH_MAX_INPUT_THRESHOLD;
3770 init_data.min_output_threshold = QETH_MIN_OUTPUT_THRESHOLD;
3771 init_data.max_output_threshold = QETH_MAX_OUTPUT_THRESHOLD;
3772 init_data.no_input_qs = 1;
3773 init_data.no_output_qs = card->qdio.no_out_queues;
3774 init_data.input_handler = card->discipline.input_handler;
3775 init_data.output_handler = card->discipline.output_handler;
3776 init_data.int_parm = (unsigned long) card;
3777 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3778 QDIO_OUTBOUND_0COPY_SBALS |
3779 QDIO_USE_OUTBOUND_PCIS;
3780 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3781 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3783 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3784 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3785 rc = qdio_initialize(&init_data);
3787 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3789 kfree(out_sbal_ptrs);
3790 kfree(in_sbal_ptrs);
3791 kfree(qib_param_field);
3795 static void qeth_core_free_card(struct qeth_card *card)
3798 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3799 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3800 qeth_clean_channel(&card->read);
3801 qeth_clean_channel(&card->write);
3803 free_netdev(card->dev);
3804 kfree(card->ip_tbd_list);
3805 qeth_free_qdio_buffers(card);
3809 static struct ccw_device_id qeth_ids[] = {
3810 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3811 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3812 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3815 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3817 static struct ccw_driver qeth_ccw_driver = {
3820 .probe = ccwgroup_probe_ccwdev,
3821 .remove = ccwgroup_remove_ccwdev,
3824 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3825 unsigned long driver_id)
3827 return ccwgroup_create_from_string(root_dev, driver_id,
3828 &qeth_ccw_driver, 3, buf);
3831 int qeth_core_hardsetup_card(struct qeth_card *card)
3837 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3838 atomic_set(&card->force_alloc_skb, 0);
3841 PRINT_WARN("Retrying to do IDX activates.\n");
3842 ccw_device_set_offline(CARD_DDEV(card));
3843 ccw_device_set_offline(CARD_WDEV(card));
3844 ccw_device_set_offline(CARD_RDEV(card));
3845 ccw_device_set_online(CARD_RDEV(card));
3846 ccw_device_set_online(CARD_WDEV(card));
3847 ccw_device_set_online(CARD_DDEV(card));
3849 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3850 if (rc == -ERESTARTSYS) {
3851 QETH_DBF_TEXT(SETUP, 2, "break1");
3854 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3861 rc = qeth_get_unitaddr(card);
3863 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
3867 mpno = QETH_MAX_PORTNO;
3868 if (card->info.portno > mpno) {
3869 PRINT_ERR("Device %s does not offer port number %d \n.",
3870 CARD_BUS_ID(card), card->info.portno);
3874 qeth_init_tokens(card);
3875 qeth_init_func_level(card);
3876 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3877 if (rc == -ERESTARTSYS) {
3878 QETH_DBF_TEXT(SETUP, 2, "break2");
3881 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3887 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3888 if (rc == -ERESTARTSYS) {
3889 QETH_DBF_TEXT(SETUP, 2, "break3");
3892 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3898 rc = qeth_mpc_initialize(card);
3900 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3905 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
3908 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3910 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3911 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3913 struct page *page = virt_to_page(element->addr);
3914 if (*pskb == NULL) {
3915 /* the upper protocol layers assume that there is data in the
3916 * skb itself. Copy a small amount (64 bytes) to make them
3918 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3921 skb_reserve(*pskb, ETH_HLEN);
3922 if (data_len <= 64) {
3923 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3927 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3928 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3930 (*pskb)->data_len += data_len - 64;
3931 (*pskb)->len += data_len - 64;
3932 (*pskb)->truesize += data_len - 64;
3937 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3938 (*pskb)->data_len += data_len;
3939 (*pskb)->len += data_len;
3940 (*pskb)->truesize += data_len;
3946 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3947 struct qdio_buffer *buffer,
3948 struct qdio_buffer_element **__element, int *__offset,
3949 struct qeth_hdr **hdr)
3951 struct qdio_buffer_element *element = *__element;
3952 int offset = *__offset;
3953 struct sk_buff *skb = NULL;
3961 QETH_DBF_TEXT(TRACE, 6, "nextskb");
3962 /* qeth_hdr must not cross element boundaries */
3963 if (element->length < offset + sizeof(struct qeth_hdr)) {
3964 if (qeth_is_last_sbale(element))
3968 if (element->length < sizeof(struct qeth_hdr))
3971 *hdr = element->addr + offset;
3973 offset += sizeof(struct qeth_hdr);
3974 if (card->options.layer2) {
3975 if (card->info.type == QETH_CARD_TYPE_OSN) {
3976 skb_len = (*hdr)->hdr.osn.pdu_length;
3977 headroom = sizeof(struct qeth_hdr);
3979 skb_len = (*hdr)->hdr.l2.pkt_length;
3982 skb_len = (*hdr)->hdr.l3.length;
3983 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3984 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3987 headroom = ETH_HLEN;
3993 if ((skb_len >= card->options.rx_sg_cb) &&
3994 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3995 (!atomic_read(&card->force_alloc_skb))) {
3998 skb = dev_alloc_skb(skb_len + headroom);
4002 skb_reserve(skb, headroom);
4005 data_ptr = element->addr + offset;
4007 data_len = min(skb_len, (int)(element->length - offset));
4010 if (qeth_create_skb_frag(element, &skb, offset,
4014 memcpy(skb_put(skb, data_len), data_ptr,
4018 skb_len -= data_len;
4020 if (qeth_is_last_sbale(element)) {
4021 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4022 QETH_DBF_TEXT_(TRACE, 4, "%s",
4024 QETH_DBF_TEXT(QERR, 2, "unexeob");
4025 QETH_DBF_TEXT_(QERR, 2, "%s",
4027 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4028 dev_kfree_skb_any(skb);
4029 card->stats.rx_errors++;
4034 data_ptr = element->addr;
4039 *__element = element;
4041 if (use_rx_sg && card->options.performance_stats) {
4042 card->perf_stats.sg_skbs_rx++;
4043 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4047 if (net_ratelimit()) {
4048 PRINT_WARN("No memory for packet received on %s.\n",
4049 QETH_CARD_IFNAME(card));
4050 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4051 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4053 card->stats.rx_dropped++;
4056 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4058 static void qeth_unregister_dbf_views(void)
4061 for (x = 0; x < QETH_DBF_INFOS; x++) {
4062 debug_unregister(qeth_dbf[x].id);
4063 qeth_dbf[x].id = NULL;
4067 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *text, ...)
4069 char dbf_txt_buf[32];
4071 if (level > (qeth_dbf[dbf_nix].id)->level)
4073 snprintf(dbf_txt_buf, sizeof(dbf_txt_buf), text);
4074 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4077 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4079 static int qeth_register_dbf_views(void)
4084 for (x = 0; x < QETH_DBF_INFOS; x++) {
4085 /* register the areas */
4086 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4090 if (qeth_dbf[x].id == NULL) {
4091 qeth_unregister_dbf_views();
4095 /* register a view */
4096 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4098 qeth_unregister_dbf_views();
4102 /* set a passing level */
4103 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4109 int qeth_core_load_discipline(struct qeth_card *card,
4110 enum qeth_discipline_id discipline)
4113 switch (discipline) {
4114 case QETH_DISCIPLINE_LAYER3:
4115 card->discipline.ccwgdriver = try_then_request_module(
4116 symbol_get(qeth_l3_ccwgroup_driver),
4119 case QETH_DISCIPLINE_LAYER2:
4120 card->discipline.ccwgdriver = try_then_request_module(
4121 symbol_get(qeth_l2_ccwgroup_driver),
4125 if (!card->discipline.ccwgdriver) {
4126 PRINT_ERR("Support for discipline %d not present\n",
4133 void qeth_core_free_discipline(struct qeth_card *card)
4135 if (card->options.layer2)
4136 symbol_put(qeth_l2_ccwgroup_driver);
4138 symbol_put(qeth_l3_ccwgroup_driver);
4139 card->discipline.ccwgdriver = NULL;
4142 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4144 struct qeth_card *card;
4147 unsigned long flags;
4149 QETH_DBF_TEXT(SETUP, 2, "probedev");
4152 if (!get_device(dev))
4155 QETH_DBF_TEXT_(SETUP, 2, "%s", gdev->dev.bus_id);
4157 card = qeth_alloc_card();
4159 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4163 card->read.ccwdev = gdev->cdev[0];
4164 card->write.ccwdev = gdev->cdev[1];
4165 card->data.ccwdev = gdev->cdev[2];
4166 dev_set_drvdata(&gdev->dev, card);
4168 gdev->cdev[0]->handler = qeth_irq;
4169 gdev->cdev[1]->handler = qeth_irq;
4170 gdev->cdev[2]->handler = qeth_irq;
4172 rc = qeth_determine_card_type(card);
4174 PRINT_WARN("%s: not a valid card type\n", __func__);
4175 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4178 rc = qeth_setup_card(card);
4180 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4184 if (card->info.type == QETH_CARD_TYPE_OSN) {
4185 rc = qeth_core_create_osn_attributes(dev);
4188 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4190 qeth_core_remove_osn_attributes(dev);
4193 rc = card->discipline.ccwgdriver->probe(card->gdev);
4195 qeth_core_free_discipline(card);
4196 qeth_core_remove_osn_attributes(dev);
4200 rc = qeth_core_create_device_attributes(dev);
4205 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4206 list_add_tail(&card->list, &qeth_core_card_list.list);
4207 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4211 qeth_core_free_card(card);
4217 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4219 unsigned long flags;
4220 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4222 if (card->discipline.ccwgdriver) {
4223 card->discipline.ccwgdriver->remove(gdev);
4224 qeth_core_free_discipline(card);
4227 if (card->info.type == QETH_CARD_TYPE_OSN) {
4228 qeth_core_remove_osn_attributes(&gdev->dev);
4230 qeth_core_remove_device_attributes(&gdev->dev);
4232 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4233 list_del(&card->list);
4234 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4235 qeth_core_free_card(card);
4236 dev_set_drvdata(&gdev->dev, NULL);
4237 put_device(&gdev->dev);
4241 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4243 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4247 if (!card->discipline.ccwgdriver) {
4248 if (card->info.type == QETH_CARD_TYPE_IQD)
4249 def_discipline = QETH_DISCIPLINE_LAYER3;
4251 def_discipline = QETH_DISCIPLINE_LAYER2;
4252 rc = qeth_core_load_discipline(card, def_discipline);
4255 rc = card->discipline.ccwgdriver->probe(card->gdev);
4259 rc = card->discipline.ccwgdriver->set_online(gdev);
4264 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4266 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4267 return card->discipline.ccwgdriver->set_offline(gdev);
4270 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4272 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4273 if (card->discipline.ccwgdriver &&
4274 card->discipline.ccwgdriver->shutdown)
4275 card->discipline.ccwgdriver->shutdown(gdev);
4278 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4279 .owner = THIS_MODULE,
4281 .driver_id = 0xD8C5E3C8,
4282 .probe = qeth_core_probe_device,
4283 .remove = qeth_core_remove_device,
4284 .set_online = qeth_core_set_online,
4285 .set_offline = qeth_core_set_offline,
4286 .shutdown = qeth_core_shutdown,
4290 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4294 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4295 qeth_core_ccwgroup_driver.driver_id);
4302 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4305 const char str[ETH_GSTRING_LEN];
4306 } qeth_ethtool_stats_keys[] = {
4311 {"tx skbs no packing"},
4312 {"tx buffers no packing"},
4313 {"tx skbs packing"},
4314 {"tx buffers packing"},
4317 /* 10 */{"rx sg skbs"},
4319 {"rx sg page allocs"},
4320 {"tx large kbytes"},
4322 {"tx pk state ch n->p"},
4323 {"tx pk state ch p->n"},
4324 {"tx pk watermark low"},
4325 {"tx pk watermark high"},
4326 {"queue 0 buffer usage"},
4327 /* 20 */{"queue 1 buffer usage"},
4328 {"queue 2 buffer usage"},
4329 {"queue 3 buffer usage"},
4330 {"rx handler time"},
4331 {"rx handler count"},
4332 {"rx do_QDIO time"},
4333 {"rx do_QDIO count"},
4334 {"tx handler time"},
4335 {"tx handler count"},
4337 /* 30 */{"tx count"},
4338 {"tx do_QDIO time"},
4339 {"tx do_QDIO count"},
4342 int qeth_core_get_stats_count(struct net_device *dev)
4344 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4346 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4348 void qeth_core_get_ethtool_stats(struct net_device *dev,
4349 struct ethtool_stats *stats, u64 *data)
4351 struct qeth_card *card = netdev_priv(dev);
4352 data[0] = card->stats.rx_packets -
4353 card->perf_stats.initial_rx_packets;
4354 data[1] = card->perf_stats.bufs_rec;
4355 data[2] = card->stats.tx_packets -
4356 card->perf_stats.initial_tx_packets;
4357 data[3] = card->perf_stats.bufs_sent;
4358 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4359 - card->perf_stats.skbs_sent_pack;
4360 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4361 data[6] = card->perf_stats.skbs_sent_pack;
4362 data[7] = card->perf_stats.bufs_sent_pack;
4363 data[8] = card->perf_stats.sg_skbs_sent;
4364 data[9] = card->perf_stats.sg_frags_sent;
4365 data[10] = card->perf_stats.sg_skbs_rx;
4366 data[11] = card->perf_stats.sg_frags_rx;
4367 data[12] = card->perf_stats.sg_alloc_page_rx;
4368 data[13] = (card->perf_stats.large_send_bytes >> 10);
4369 data[14] = card->perf_stats.large_send_cnt;
4370 data[15] = card->perf_stats.sc_dp_p;
4371 data[16] = card->perf_stats.sc_p_dp;
4372 data[17] = QETH_LOW_WATERMARK_PACK;
4373 data[18] = QETH_HIGH_WATERMARK_PACK;
4374 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4375 data[20] = (card->qdio.no_out_queues > 1) ?
4376 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4377 data[21] = (card->qdio.no_out_queues > 2) ?
4378 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4379 data[22] = (card->qdio.no_out_queues > 3) ?
4380 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4381 data[23] = card->perf_stats.inbound_time;
4382 data[24] = card->perf_stats.inbound_cnt;
4383 data[25] = card->perf_stats.inbound_do_qdio_time;
4384 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4385 data[27] = card->perf_stats.outbound_handler_time;
4386 data[28] = card->perf_stats.outbound_handler_cnt;
4387 data[29] = card->perf_stats.outbound_time;
4388 data[30] = card->perf_stats.outbound_cnt;
4389 data[31] = card->perf_stats.outbound_do_qdio_time;
4390 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4392 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4394 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4396 switch (stringset) {
4398 memcpy(data, &qeth_ethtool_stats_keys,
4399 sizeof(qeth_ethtool_stats_keys));
4406 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4408 void qeth_core_get_drvinfo(struct net_device *dev,
4409 struct ethtool_drvinfo *info)
4411 struct qeth_card *card = netdev_priv(dev);
4412 if (card->options.layer2)
4413 strcpy(info->driver, "qeth_l2");
4415 strcpy(info->driver, "qeth_l3");
4417 strcpy(info->version, "1.0");
4418 strcpy(info->fw_version, card->info.mcl_level);
4419 sprintf(info->bus_info, "%s/%s/%s",
4422 CARD_DDEV_ID(card));
4424 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4426 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4427 struct ethtool_cmd *ecmd)
4429 struct qeth_card *card = netdev_priv(netdev);
4430 enum qeth_link_types link_type;
4432 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4433 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4435 link_type = card->info.link_type;
4437 ecmd->transceiver = XCVR_INTERNAL;
4438 ecmd->supported = SUPPORTED_Autoneg;
4439 ecmd->advertising = ADVERTISED_Autoneg;
4440 ecmd->duplex = DUPLEX_FULL;
4441 ecmd->autoneg = AUTONEG_ENABLE;
4443 switch (link_type) {
4444 case QETH_LINK_TYPE_FAST_ETH:
4445 case QETH_LINK_TYPE_LANE_ETH100:
4446 ecmd->supported |= SUPPORTED_10baseT_Half |
4447 SUPPORTED_10baseT_Full |
4448 SUPPORTED_100baseT_Half |
4449 SUPPORTED_100baseT_Full |
4451 ecmd->advertising |= ADVERTISED_10baseT_Half |
4452 ADVERTISED_10baseT_Full |
4453 ADVERTISED_100baseT_Half |
4454 ADVERTISED_100baseT_Full |
4456 ecmd->speed = SPEED_100;
4457 ecmd->port = PORT_TP;
4460 case QETH_LINK_TYPE_GBIT_ETH:
4461 case QETH_LINK_TYPE_LANE_ETH1000:
4462 ecmd->supported |= SUPPORTED_10baseT_Half |
4463 SUPPORTED_10baseT_Full |
4464 SUPPORTED_100baseT_Half |
4465 SUPPORTED_100baseT_Full |
4466 SUPPORTED_1000baseT_Half |
4467 SUPPORTED_1000baseT_Full |
4469 ecmd->advertising |= ADVERTISED_10baseT_Half |
4470 ADVERTISED_10baseT_Full |
4471 ADVERTISED_100baseT_Half |
4472 ADVERTISED_100baseT_Full |
4473 ADVERTISED_1000baseT_Half |
4474 ADVERTISED_1000baseT_Full |
4476 ecmd->speed = SPEED_1000;
4477 ecmd->port = PORT_FIBRE;
4480 case QETH_LINK_TYPE_10GBIT_ETH:
4481 ecmd->supported |= SUPPORTED_10baseT_Half |
4482 SUPPORTED_10baseT_Full |
4483 SUPPORTED_100baseT_Half |
4484 SUPPORTED_100baseT_Full |
4485 SUPPORTED_1000baseT_Half |
4486 SUPPORTED_1000baseT_Full |
4487 SUPPORTED_10000baseT_Full |
4489 ecmd->advertising |= ADVERTISED_10baseT_Half |
4490 ADVERTISED_10baseT_Full |
4491 ADVERTISED_100baseT_Half |
4492 ADVERTISED_100baseT_Full |
4493 ADVERTISED_1000baseT_Half |
4494 ADVERTISED_1000baseT_Full |
4495 ADVERTISED_10000baseT_Full |
4497 ecmd->speed = SPEED_10000;
4498 ecmd->port = PORT_FIBRE;
4502 ecmd->supported |= SUPPORTED_10baseT_Half |
4503 SUPPORTED_10baseT_Full |
4505 ecmd->advertising |= ADVERTISED_10baseT_Half |
4506 ADVERTISED_10baseT_Full |
4508 ecmd->speed = SPEED_10;
4509 ecmd->port = PORT_TP;
4514 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4516 static int __init qeth_core_init(void)
4520 PRINT_INFO("loading core functions\n");
4521 INIT_LIST_HEAD(&qeth_core_card_list.list);
4522 rwlock_init(&qeth_core_card_list.rwlock);
4524 rc = qeth_register_dbf_views();
4527 rc = ccw_driver_register(&qeth_ccw_driver);
4530 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4533 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4534 &driver_attr_group);
4537 qeth_core_root_dev = s390_root_dev_register("qeth");
4538 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4544 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4545 &driver_attr_group);
4547 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4549 ccw_driver_unregister(&qeth_ccw_driver);
4551 qeth_unregister_dbf_views();
4553 PRINT_ERR("Initialization failed with code %d\n", rc);
4557 static void __exit qeth_core_exit(void)
4559 s390_root_dev_unregister(qeth_core_root_dev);
4560 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4561 &driver_attr_group);
4562 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4563 ccw_driver_unregister(&qeth_ccw_driver);
4564 qeth_unregister_dbf_views();
4565 PRINT_INFO("core functions removed\n");
4568 module_init(qeth_core_init);
4569 module_exit(qeth_core_exit);
4570 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4571 MODULE_DESCRIPTION("qeth core functions");
4572 MODULE_LICENSE("GPL");