1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
4 // http://www.samsung.com
6 // Copyright (C) 2013 Google, Inc
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10 #include <linux/module.h>
11 #include <linux/i2c.h>
12 #include <linux/bcd.h>
13 #include <linux/regmap.h>
14 #include <linux/rtc.h>
15 #include <linux/platform_device.h>
16 #include <linux/mfd/samsung/core.h>
17 #include <linux/mfd/samsung/irq.h>
18 #include <linux/mfd/samsung/rtc.h>
19 #include <linux/mfd/samsung/s2mps14.h>
22 * Maximum number of retries for checking changes in UDR field
23 * of S5M_RTC_UDR_CON register (to limit possible endless loop).
25 * After writing to RTC registers (setting time or alarm) read the UDR field
26 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
29 #define UDR_READ_RETRY_CNT 5
40 /* Make sure this is always the last enum name. */
45 * Registers used by the driver which are different between chipsets.
47 * Operations like read time and write alarm/time require updating
48 * specific fields in UDR register. These fields usually are auto-cleared
49 * (with some exceptions).
51 * Table of operations per device:
53 * Device | Write time | Read time | Write alarm
54 * =================================================
55 * S5M8767 | UDR + TIME | | UDR
56 * S2MPS11/14 | WUDR | RUDR | WUDR + RUDR
57 * S2MPS13 | WUDR | RUDR | WUDR + AUDR
58 * S2MPS15 | WUDR | RUDR | AUDR
60 struct s5m_rtc_reg_config {
61 /* Number of registers used for setting time/alarm0/alarm1 */
62 unsigned int regs_count;
63 /* First register for time, seconds */
65 /* RTC control register */
67 /* First register for alarm 0, seconds */
69 /* First register for alarm 1, seconds */
72 * Register for update flag (UDR). Typically setting UDR field to 1
73 * will enable update of time or alarm register. Then it will be
74 * auto-cleared after successful update.
76 unsigned int udr_update;
77 /* Auto-cleared mask in UDR field for writing time and alarm */
78 unsigned int autoclear_udr_mask;
80 * Masks in UDR field for time and alarm operations.
81 * The read time mask can be 0. Rest should not.
83 unsigned int read_time_udr_mask;
84 unsigned int write_time_udr_mask;
85 unsigned int write_alarm_udr_mask;
88 /* Register map for S5M8763 and S5M8767 */
89 static const struct s5m_rtc_reg_config s5m_rtc_regs = {
92 .ctrl = S5M_ALARM1_CONF,
93 .alarm0 = S5M_ALARM0_SEC,
94 .alarm1 = S5M_ALARM1_SEC,
95 .udr_update = S5M_RTC_UDR_CON,
96 .autoclear_udr_mask = S5M_RTC_UDR_MASK,
97 .read_time_udr_mask = 0, /* Not needed */
98 .write_time_udr_mask = S5M_RTC_UDR_MASK | S5M_RTC_TIME_EN_MASK,
99 .write_alarm_udr_mask = S5M_RTC_UDR_MASK,
102 /* Register map for S2MPS13 */
103 static const struct s5m_rtc_reg_config s2mps13_rtc_regs = {
105 .time = S2MPS_RTC_SEC,
106 .ctrl = S2MPS_RTC_CTRL,
107 .alarm0 = S2MPS_ALARM0_SEC,
108 .alarm1 = S2MPS_ALARM1_SEC,
109 .udr_update = S2MPS_RTC_UDR_CON,
110 .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK,
111 .read_time_udr_mask = S2MPS_RTC_RUDR_MASK,
112 .write_time_udr_mask = S2MPS_RTC_WUDR_MASK,
113 .write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS13_RTC_AUDR_MASK,
116 /* Register map for S2MPS11/14 */
117 static const struct s5m_rtc_reg_config s2mps14_rtc_regs = {
119 .time = S2MPS_RTC_SEC,
120 .ctrl = S2MPS_RTC_CTRL,
121 .alarm0 = S2MPS_ALARM0_SEC,
122 .alarm1 = S2MPS_ALARM1_SEC,
123 .udr_update = S2MPS_RTC_UDR_CON,
124 .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK,
125 .read_time_udr_mask = S2MPS_RTC_RUDR_MASK,
126 .write_time_udr_mask = S2MPS_RTC_WUDR_MASK,
127 .write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS_RTC_RUDR_MASK,
131 * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits
134 static const struct s5m_rtc_reg_config s2mps15_rtc_regs = {
136 .time = S2MPS_RTC_SEC,
137 .ctrl = S2MPS_RTC_CTRL,
138 .alarm0 = S2MPS_ALARM0_SEC,
139 .alarm1 = S2MPS_ALARM1_SEC,
140 .udr_update = S2MPS_RTC_UDR_CON,
141 .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK,
142 .read_time_udr_mask = S2MPS_RTC_RUDR_MASK,
143 .write_time_udr_mask = S2MPS15_RTC_WUDR_MASK,
144 .write_alarm_udr_mask = S2MPS15_RTC_AUDR_MASK,
147 struct s5m_rtc_info {
149 struct i2c_client *i2c;
150 struct sec_pmic_dev *s5m87xx;
151 struct regmap *regmap;
152 struct rtc_device *rtc_dev;
154 enum sec_device_type device_type;
156 const struct s5m_rtc_reg_config *regs;
159 static const struct regmap_config s5m_rtc_regmap_config = {
163 .max_register = S5M_RTC_REG_MAX,
166 static const struct regmap_config s2mps14_rtc_regmap_config = {
170 .max_register = S2MPS_RTC_REG_MAX,
173 static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
176 tm->tm_sec = data[RTC_SEC] & 0x7f;
177 tm->tm_min = data[RTC_MIN] & 0x7f;
179 tm->tm_hour = data[RTC_HOUR] & 0x1f;
181 tm->tm_hour = data[RTC_HOUR] & 0x0f;
182 if (data[RTC_HOUR] & HOUR_PM_MASK)
186 tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
187 tm->tm_mday = data[RTC_DATE] & 0x1f;
188 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
189 tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
194 static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
196 data[RTC_SEC] = tm->tm_sec;
197 data[RTC_MIN] = tm->tm_min;
199 if (tm->tm_hour >= 12)
200 data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
202 data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
204 data[RTC_WEEKDAY] = 1 << tm->tm_wday;
205 data[RTC_DATE] = tm->tm_mday;
206 data[RTC_MONTH] = tm->tm_mon + 1;
207 data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
209 if (tm->tm_year < 100) {
210 pr_err("RTC cannot handle the year %d\n",
219 * Read RTC_UDR_CON register and wait till UDR field is cleared.
220 * This indicates that time/alarm update ended.
222 static int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
224 int ret, retry = UDR_READ_RETRY_CNT;
228 ret = regmap_read(info->regmap, info->regs->udr_update, &data);
229 } while (--retry && (data & info->regs->autoclear_udr_mask) && !ret);
232 dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
237 static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
238 struct rtc_wkalrm *alarm)
243 switch (info->device_type) {
246 ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
247 val &= S5M_ALARM0_STATUS;
252 ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
254 val &= S2MPS_ALARM0_STATUS;
270 static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
275 ret = regmap_read(info->regmap, info->regs->udr_update, &data);
277 dev_err(info->dev, "failed to read update reg(%d)\n", ret);
281 data |= info->regs->write_time_udr_mask;
283 ret = regmap_write(info->regmap, info->regs->udr_update, data);
285 dev_err(info->dev, "failed to write update reg(%d)\n", ret);
289 ret = s5m8767_wait_for_udr_update(info);
294 static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
299 ret = regmap_read(info->regmap, info->regs->udr_update, &data);
301 dev_err(info->dev, "%s: fail to read update reg(%d)\n",
306 data |= info->regs->write_alarm_udr_mask;
307 switch (info->device_type) {
310 data &= ~S5M_RTC_TIME_EN_MASK;
315 /* No exceptions needed */
321 ret = regmap_write(info->regmap, info->regs->udr_update, data);
323 dev_err(info->dev, "%s: fail to write update reg(%d)\n",
328 ret = s5m8767_wait_for_udr_update(info);
330 /* On S2MPS13 the AUDR is not auto-cleared */
331 if (info->device_type == S2MPS13X)
332 regmap_update_bits(info->regmap, info->regs->udr_update,
333 S2MPS13_RTC_AUDR_MASK, 0);
338 static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
340 tm->tm_sec = bcd2bin(data[RTC_SEC]);
341 tm->tm_min = bcd2bin(data[RTC_MIN]);
343 if (data[RTC_HOUR] & HOUR_12) {
344 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
345 if (data[RTC_HOUR] & HOUR_PM)
348 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
351 tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
352 tm->tm_mday = bcd2bin(data[RTC_DATE]);
353 tm->tm_mon = bcd2bin(data[RTC_MONTH]);
354 tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
358 static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
360 data[RTC_SEC] = bin2bcd(tm->tm_sec);
361 data[RTC_MIN] = bin2bcd(tm->tm_min);
362 data[RTC_HOUR] = bin2bcd(tm->tm_hour);
363 data[RTC_WEEKDAY] = tm->tm_wday;
364 data[RTC_DATE] = bin2bcd(tm->tm_mday);
365 data[RTC_MONTH] = bin2bcd(tm->tm_mon);
366 data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
367 data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
370 static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
372 struct s5m_rtc_info *info = dev_get_drvdata(dev);
373 u8 data[RTC_MAX_NUM_TIME_REGS];
376 if (info->regs->read_time_udr_mask) {
377 ret = regmap_update_bits(info->regmap,
378 info->regs->udr_update,
379 info->regs->read_time_udr_mask,
380 info->regs->read_time_udr_mask);
383 "Failed to prepare registers for time reading: %d\n",
388 ret = regmap_bulk_read(info->regmap, info->regs->time, data,
389 info->regs->regs_count);
393 switch (info->device_type) {
395 s5m8763_data_to_tm(data, tm);
402 s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
409 dev_dbg(dev, "%s: %ptR(%d)\n", __func__, tm, tm->tm_wday);
414 static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
416 struct s5m_rtc_info *info = dev_get_drvdata(dev);
417 u8 data[RTC_MAX_NUM_TIME_REGS];
420 switch (info->device_type) {
422 s5m8763_tm_to_data(tm, data);
428 ret = s5m8767_tm_to_data(tm, data);
437 dev_dbg(dev, "%s: %ptR(%d)\n", __func__, tm, tm->tm_wday);
439 ret = regmap_raw_write(info->regmap, info->regs->time, data,
440 info->regs->regs_count);
444 ret = s5m8767_rtc_set_time_reg(info);
449 static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
451 struct s5m_rtc_info *info = dev_get_drvdata(dev);
452 u8 data[RTC_MAX_NUM_TIME_REGS];
456 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
457 info->regs->regs_count);
461 switch (info->device_type) {
463 s5m8763_data_to_tm(data, &alrm->time);
464 ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
468 alrm->enabled = !!val;
475 s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
477 for (i = 0; i < info->regs->regs_count; i++) {
478 if (data[i] & ALARM_ENABLE_MASK) {
489 dev_dbg(dev, "%s: %ptR(%d)\n", __func__, &alrm->time, alrm->time.tm_wday);
491 ret = s5m_check_peding_alarm_interrupt(info, alrm);
496 static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
498 u8 data[RTC_MAX_NUM_TIME_REGS];
502 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
503 info->regs->regs_count);
507 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
508 dev_dbg(info->dev, "%s: %ptR(%d)\n", __func__, &tm, tm.tm_wday);
510 switch (info->device_type) {
512 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
519 for (i = 0; i < info->regs->regs_count; i++)
520 data[i] &= ~ALARM_ENABLE_MASK;
522 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
523 info->regs->regs_count);
527 ret = s5m8767_rtc_set_alarm_reg(info);
538 static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
541 u8 data[RTC_MAX_NUM_TIME_REGS];
545 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
546 info->regs->regs_count);
550 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
551 dev_dbg(info->dev, "%s: %ptR(%d)\n", __func__, &tm, tm.tm_wday);
553 switch (info->device_type) {
556 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
563 data[RTC_SEC] |= ALARM_ENABLE_MASK;
564 data[RTC_MIN] |= ALARM_ENABLE_MASK;
565 data[RTC_HOUR] |= ALARM_ENABLE_MASK;
566 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
567 if (data[RTC_DATE] & 0x1f)
568 data[RTC_DATE] |= ALARM_ENABLE_MASK;
569 if (data[RTC_MONTH] & 0xf)
570 data[RTC_MONTH] |= ALARM_ENABLE_MASK;
571 if (data[RTC_YEAR1] & 0x7f)
572 data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
574 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
575 info->regs->regs_count);
578 ret = s5m8767_rtc_set_alarm_reg(info);
589 static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
591 struct s5m_rtc_info *info = dev_get_drvdata(dev);
592 u8 data[RTC_MAX_NUM_TIME_REGS];
595 switch (info->device_type) {
597 s5m8763_tm_to_data(&alrm->time, data);
604 s5m8767_tm_to_data(&alrm->time, data);
611 dev_dbg(dev, "%s: %ptR(%d)\n", __func__, &alrm->time, alrm->time.tm_wday);
613 ret = s5m_rtc_stop_alarm(info);
617 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
618 info->regs->regs_count);
622 ret = s5m8767_rtc_set_alarm_reg(info);
627 ret = s5m_rtc_start_alarm(info);
632 static int s5m_rtc_alarm_irq_enable(struct device *dev,
633 unsigned int enabled)
635 struct s5m_rtc_info *info = dev_get_drvdata(dev);
638 return s5m_rtc_start_alarm(info);
640 return s5m_rtc_stop_alarm(info);
643 static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
645 struct s5m_rtc_info *info = data;
647 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
652 static const struct rtc_class_ops s5m_rtc_ops = {
653 .read_time = s5m_rtc_read_time,
654 .set_time = s5m_rtc_set_time,
655 .read_alarm = s5m_rtc_read_alarm,
656 .set_alarm = s5m_rtc_set_alarm,
657 .alarm_irq_enable = s5m_rtc_alarm_irq_enable,
660 static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
665 switch (info->device_type) {
668 /* UDR update time. Default of 7.32 ms is too long. */
669 ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
670 S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US);
672 dev_err(info->dev, "%s: fail to change UDR time: %d\n",
675 /* Set RTC control register : Binary mode, 24hour mode */
676 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
677 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
679 ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
685 data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
686 ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
691 * Should set WUDR & (RUDR or AUDR) bits to high after writing
692 * RTC_CTRL register like writing Alarm registers. We can't find
693 * the description from datasheet but vendor code does that
696 ret = s5m8767_rtc_set_alarm_reg(info);
703 info->rtc_24hr_mode = 1;
705 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
713 static int s5m_rtc_probe(struct platform_device *pdev)
715 struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
716 struct sec_platform_data *pdata = s5m87xx->pdata;
717 struct s5m_rtc_info *info;
718 const struct regmap_config *regmap_cfg;
722 dev_err(pdev->dev.parent, "Platform data not supplied\n");
726 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
730 switch (platform_get_device_id(pdev)->driver_data) {
732 regmap_cfg = &s2mps14_rtc_regmap_config;
733 info->regs = &s2mps15_rtc_regs;
734 alarm_irq = S2MPS14_IRQ_RTCA0;
737 regmap_cfg = &s2mps14_rtc_regmap_config;
738 info->regs = &s2mps14_rtc_regs;
739 alarm_irq = S2MPS14_IRQ_RTCA0;
742 regmap_cfg = &s2mps14_rtc_regmap_config;
743 info->regs = &s2mps13_rtc_regs;
744 alarm_irq = S2MPS14_IRQ_RTCA0;
747 regmap_cfg = &s5m_rtc_regmap_config;
748 info->regs = &s5m_rtc_regs;
749 alarm_irq = S5M8763_IRQ_ALARM0;
752 regmap_cfg = &s5m_rtc_regmap_config;
753 info->regs = &s5m_rtc_regs;
754 alarm_irq = S5M8767_IRQ_RTCA1;
758 "Device type %lu is not supported by RTC driver\n",
759 platform_get_device_id(pdev)->driver_data);
763 info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
765 dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n");
769 info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
770 if (IS_ERR(info->regmap)) {
771 ret = PTR_ERR(info->regmap);
772 dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n",
777 info->dev = &pdev->dev;
778 info->s5m87xx = s5m87xx;
779 info->device_type = platform_get_device_id(pdev)->driver_data;
781 if (s5m87xx->irq_data) {
782 info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
783 if (info->irq <= 0) {
785 dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
791 platform_set_drvdata(pdev, info);
793 ret = s5m8767_rtc_init_reg(info);
795 device_init_wakeup(&pdev->dev, 1);
797 info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
798 &s5m_rtc_ops, THIS_MODULE);
800 if (IS_ERR(info->rtc_dev)) {
801 ret = PTR_ERR(info->rtc_dev);
806 dev_info(&pdev->dev, "Alarm IRQ not available\n");
810 ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
811 s5m_rtc_alarm_irq, 0, "rtc-alarm0",
814 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
822 i2c_unregister_device(info->i2c);
827 static int s5m_rtc_remove(struct platform_device *pdev)
829 struct s5m_rtc_info *info = platform_get_drvdata(pdev);
831 i2c_unregister_device(info->i2c);
836 #ifdef CONFIG_PM_SLEEP
837 static int s5m_rtc_resume(struct device *dev)
839 struct s5m_rtc_info *info = dev_get_drvdata(dev);
842 if (info->irq && device_may_wakeup(dev))
843 ret = disable_irq_wake(info->irq);
848 static int s5m_rtc_suspend(struct device *dev)
850 struct s5m_rtc_info *info = dev_get_drvdata(dev);
853 if (info->irq && device_may_wakeup(dev))
854 ret = enable_irq_wake(info->irq);
858 #endif /* CONFIG_PM_SLEEP */
860 static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
862 static const struct platform_device_id s5m_rtc_id[] = {
863 { "s5m-rtc", S5M8767X },
864 { "s2mps13-rtc", S2MPS13X },
865 { "s2mps14-rtc", S2MPS14X },
866 { "s2mps15-rtc", S2MPS15X },
869 MODULE_DEVICE_TABLE(platform, s5m_rtc_id);
871 static struct platform_driver s5m_rtc_driver = {
874 .pm = &s5m_rtc_pm_ops,
876 .probe = s5m_rtc_probe,
877 .remove = s5m_rtc_remove,
878 .id_table = s5m_rtc_id,
881 module_platform_driver(s5m_rtc_driver);
883 /* Module information */
884 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
885 MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
886 MODULE_LICENSE("GPL");
887 MODULE_ALIAS("platform:s5m-rtc");