Merge tag 'afs-fixes-b-20190516' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-microblaze.git] / drivers / rtc / rtc-pm8xxx.c
1 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  */
12 #include <linux/of.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/rtc.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20 #include <linux/spinlock.h>
21
22 /* RTC Register offsets from RTC CTRL REG */
23 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
24 #define PM8XXX_RTC_WRITE_OFFSET         0x02
25 #define PM8XXX_RTC_READ_OFFSET          0x06
26 #define PM8XXX_ALARM_RW_OFFSET          0x0A
27
28 /* RTC_CTRL register bit fields */
29 #define PM8xxx_RTC_ENABLE               BIT(7)
30 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
31
32 #define NUM_8_BIT_RTC_REGS              0x4
33
34 /**
35  * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
36  * @ctrl: base address of control register
37  * @write: base address of write register
38  * @read: base address of read register
39  * @alarm_ctrl: base address of alarm control register
40  * @alarm_ctrl2: base address of alarm control2 register
41  * @alarm_rw: base address of alarm read-write register
42  * @alarm_en: alarm enable mask
43  */
44 struct pm8xxx_rtc_regs {
45         unsigned int ctrl;
46         unsigned int write;
47         unsigned int read;
48         unsigned int alarm_ctrl;
49         unsigned int alarm_ctrl2;
50         unsigned int alarm_rw;
51         unsigned int alarm_en;
52 };
53
54 /**
55  * struct pm8xxx_rtc -  rtc driver internal structure
56  * @rtc:                rtc device for this driver.
57  * @regmap:             regmap used to access RTC registers
58  * @allow_set_time:     indicates whether writing to the RTC is allowed
59  * @rtc_alarm_irq:      rtc alarm irq number.
60  * @ctrl_reg:           rtc control register.
61  * @rtc_dev:            device structure.
62  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
63  */
64 struct pm8xxx_rtc {
65         struct rtc_device *rtc;
66         struct regmap *regmap;
67         bool allow_set_time;
68         int rtc_alarm_irq;
69         const struct pm8xxx_rtc_regs *regs;
70         struct device *rtc_dev;
71         spinlock_t ctrl_reg_lock;
72 };
73
74 /*
75  * Steps to write the RTC registers.
76  * 1. Disable alarm if enabled.
77  * 2. Disable rtc if enabled.
78  * 3. Write 0x00 to LSB.
79  * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
80  * 5. Enable rtc if disabled in step 2.
81  * 6. Enable alarm if disabled in step 1.
82  */
83 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
84 {
85         int rc, i;
86         unsigned long secs, irq_flags;
87         u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, rtc_disabled = 0;
88         unsigned int ctrl_reg, rtc_ctrl_reg;
89         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
90         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
91
92         if (!rtc_dd->allow_set_time)
93                 return -EACCES;
94
95         rtc_tm_to_time(tm, &secs);
96
97         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
98
99         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
100                 value[i] = secs & 0xFF;
101                 secs >>= 8;
102         }
103
104         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
105
106         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
107         if (rc)
108                 goto rtc_rw_fail;
109
110         if (ctrl_reg & regs->alarm_en) {
111                 alarm_enabled = 1;
112                 ctrl_reg &= ~regs->alarm_en;
113                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
114                 if (rc) {
115                         dev_err(dev, "Write to RTC Alarm control register failed\n");
116                         goto rtc_rw_fail;
117                 }
118         }
119
120         /* Disable RTC H/w before writing on RTC register */
121         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &rtc_ctrl_reg);
122         if (rc)
123                 goto rtc_rw_fail;
124
125         if (rtc_ctrl_reg & PM8xxx_RTC_ENABLE) {
126                 rtc_disabled = 1;
127                 rtc_ctrl_reg &= ~PM8xxx_RTC_ENABLE;
128                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
129                 if (rc) {
130                         dev_err(dev, "Write to RTC control register failed\n");
131                         goto rtc_rw_fail;
132                 }
133         }
134
135         /* Write 0 to Byte[0] */
136         rc = regmap_write(rtc_dd->regmap, regs->write, 0);
137         if (rc) {
138                 dev_err(dev, "Write to RTC write data register failed\n");
139                 goto rtc_rw_fail;
140         }
141
142         /* Write Byte[1], Byte[2], Byte[3] */
143         rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
144                                &value[1], sizeof(value) - 1);
145         if (rc) {
146                 dev_err(dev, "Write to RTC write data register failed\n");
147                 goto rtc_rw_fail;
148         }
149
150         /* Write Byte[0] */
151         rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
152         if (rc) {
153                 dev_err(dev, "Write to RTC write data register failed\n");
154                 goto rtc_rw_fail;
155         }
156
157         /* Enable RTC H/w after writing on RTC register */
158         if (rtc_disabled) {
159                 rtc_ctrl_reg |= PM8xxx_RTC_ENABLE;
160                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
161                 if (rc) {
162                         dev_err(dev, "Write to RTC control register failed\n");
163                         goto rtc_rw_fail;
164                 }
165         }
166
167         if (alarm_enabled) {
168                 ctrl_reg |= regs->alarm_en;
169                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
170                 if (rc) {
171                         dev_err(dev, "Write to RTC Alarm control register failed\n");
172                         goto rtc_rw_fail;
173                 }
174         }
175
176 rtc_rw_fail:
177         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
178
179         return rc;
180 }
181
182 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
183 {
184         int rc;
185         u8 value[NUM_8_BIT_RTC_REGS];
186         unsigned long secs;
187         unsigned int reg;
188         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
189         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
190
191         rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
192         if (rc) {
193                 dev_err(dev, "RTC read data register failed\n");
194                 return rc;
195         }
196
197         /*
198          * Read the LSB again and check if there has been a carry over.
199          * If there is, redo the read operation.
200          */
201         rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
202         if (rc < 0) {
203                 dev_err(dev, "RTC read data register failed\n");
204                 return rc;
205         }
206
207         if (unlikely(reg < value[0])) {
208                 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
209                                       value, sizeof(value));
210                 if (rc) {
211                         dev_err(dev, "RTC read data register failed\n");
212                         return rc;
213                 }
214         }
215
216         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
217                ((unsigned long)value[3] << 24);
218
219         rtc_time_to_tm(secs, tm);
220
221         dev_dbg(dev, "secs = %lu, h:m:s == %ptRt, y-m-d = %ptRdr\n", secs, tm, tm);
222
223         return 0;
224 }
225
226 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
227 {
228         int rc, i;
229         u8 value[NUM_8_BIT_RTC_REGS];
230         unsigned int ctrl_reg;
231         unsigned long secs, irq_flags;
232         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
233         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
234
235         rtc_tm_to_time(&alarm->time, &secs);
236
237         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
238                 value[i] = secs & 0xFF;
239                 secs >>= 8;
240         }
241
242         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
243
244         rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
245                                sizeof(value));
246         if (rc) {
247                 dev_err(dev, "Write to RTC ALARM register failed\n");
248                 goto rtc_rw_fail;
249         }
250
251         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
252         if (rc)
253                 goto rtc_rw_fail;
254
255         if (alarm->enabled)
256                 ctrl_reg |= regs->alarm_en;
257         else
258                 ctrl_reg &= ~regs->alarm_en;
259
260         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
261         if (rc) {
262                 dev_err(dev, "Write to RTC alarm control register failed\n");
263                 goto rtc_rw_fail;
264         }
265
266         dev_dbg(dev, "Alarm Set for h:m:s=%ptRt, y-m-d=%ptRdr\n",
267                 &alarm->time, &alarm->time);
268 rtc_rw_fail:
269         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
270         return rc;
271 }
272
273 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
274 {
275         int rc;
276         u8 value[NUM_8_BIT_RTC_REGS];
277         unsigned long secs;
278         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
279         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
280
281         rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
282                               sizeof(value));
283         if (rc) {
284                 dev_err(dev, "RTC alarm time read failed\n");
285                 return rc;
286         }
287
288         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
289                ((unsigned long)value[3] << 24);
290
291         rtc_time_to_tm(secs, &alarm->time);
292
293         rc = rtc_valid_tm(&alarm->time);
294         if (rc < 0) {
295                 dev_err(dev, "Invalid alarm time read from RTC\n");
296                 return rc;
297         }
298
299         dev_dbg(dev, "Alarm set for - h:m:s=%ptRt, y-m-d=%ptRdr\n",
300                 &alarm->time, &alarm->time);
301
302         return 0;
303 }
304
305 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
306 {
307         int rc;
308         unsigned long irq_flags;
309         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
310         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
311         unsigned int ctrl_reg;
312
313         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
314
315         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
316         if (rc)
317                 goto rtc_rw_fail;
318
319         if (enable)
320                 ctrl_reg |= regs->alarm_en;
321         else
322                 ctrl_reg &= ~regs->alarm_en;
323
324         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
325         if (rc) {
326                 dev_err(dev, "Write to RTC control register failed\n");
327                 goto rtc_rw_fail;
328         }
329
330 rtc_rw_fail:
331         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
332         return rc;
333 }
334
335 static const struct rtc_class_ops pm8xxx_rtc_ops = {
336         .read_time      = pm8xxx_rtc_read_time,
337         .set_time       = pm8xxx_rtc_set_time,
338         .set_alarm      = pm8xxx_rtc_set_alarm,
339         .read_alarm     = pm8xxx_rtc_read_alarm,
340         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
341 };
342
343 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
344 {
345         struct pm8xxx_rtc *rtc_dd = dev_id;
346         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
347         unsigned int ctrl_reg;
348         int rc;
349         unsigned long irq_flags;
350
351         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
352
353         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
354
355         /* Clear the alarm enable bit */
356         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
357         if (rc) {
358                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
359                 goto rtc_alarm_handled;
360         }
361
362         ctrl_reg &= ~regs->alarm_en;
363
364         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
365         if (rc) {
366                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
367                 dev_err(rtc_dd->rtc_dev,
368                         "Write to alarm control register failed\n");
369                 goto rtc_alarm_handled;
370         }
371
372         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
373
374         /* Clear RTC alarm register */
375         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
376         if (rc) {
377                 dev_err(rtc_dd->rtc_dev,
378                         "RTC Alarm control2 register read failed\n");
379                 goto rtc_alarm_handled;
380         }
381
382         ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
383         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
384         if (rc)
385                 dev_err(rtc_dd->rtc_dev,
386                         "Write to RTC Alarm control2 register failed\n");
387
388 rtc_alarm_handled:
389         return IRQ_HANDLED;
390 }
391
392 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
393 {
394         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
395         unsigned int ctrl_reg;
396         int rc;
397
398         /* Check if the RTC is on, else turn it on */
399         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
400         if (rc)
401                 return rc;
402
403         if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
404                 ctrl_reg |= PM8xxx_RTC_ENABLE;
405                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
406                 if (rc)
407                         return rc;
408         }
409
410         return 0;
411 }
412
413 static const struct pm8xxx_rtc_regs pm8921_regs = {
414         .ctrl           = 0x11d,
415         .write          = 0x11f,
416         .read           = 0x123,
417         .alarm_rw       = 0x127,
418         .alarm_ctrl     = 0x11d,
419         .alarm_ctrl2    = 0x11e,
420         .alarm_en       = BIT(1),
421 };
422
423 static const struct pm8xxx_rtc_regs pm8058_regs = {
424         .ctrl           = 0x1e8,
425         .write          = 0x1ea,
426         .read           = 0x1ee,
427         .alarm_rw       = 0x1f2,
428         .alarm_ctrl     = 0x1e8,
429         .alarm_ctrl2    = 0x1e9,
430         .alarm_en       = BIT(1),
431 };
432
433 static const struct pm8xxx_rtc_regs pm8941_regs = {
434         .ctrl           = 0x6046,
435         .write          = 0x6040,
436         .read           = 0x6048,
437         .alarm_rw       = 0x6140,
438         .alarm_ctrl     = 0x6146,
439         .alarm_ctrl2    = 0x6148,
440         .alarm_en       = BIT(7),
441 };
442
443 /*
444  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
445  */
446 static const struct of_device_id pm8xxx_id_table[] = {
447         { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
448         { .compatible = "qcom,pm8018-rtc", .data = &pm8921_regs },
449         { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
450         { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
451         { },
452 };
453 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
454
455 static int pm8xxx_rtc_probe(struct platform_device *pdev)
456 {
457         int rc;
458         struct pm8xxx_rtc *rtc_dd;
459         const struct of_device_id *match;
460
461         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
462         if (!match)
463                 return -ENXIO;
464
465         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
466         if (rtc_dd == NULL)
467                 return -ENOMEM;
468
469         /* Initialise spinlock to protect RTC control register */
470         spin_lock_init(&rtc_dd->ctrl_reg_lock);
471
472         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
473         if (!rtc_dd->regmap) {
474                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
475                 return -ENXIO;
476         }
477
478         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
479         if (rtc_dd->rtc_alarm_irq < 0) {
480                 dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
481                 return -ENXIO;
482         }
483
484         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
485                                                       "allow-set-time");
486
487         rtc_dd->regs = match->data;
488         rtc_dd->rtc_dev = &pdev->dev;
489
490         rc = pm8xxx_rtc_enable(rtc_dd);
491         if (rc)
492                 return rc;
493
494         platform_set_drvdata(pdev, rtc_dd);
495
496         device_init_wakeup(&pdev->dev, 1);
497
498         /* Register the RTC device */
499         rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
500                                                &pm8xxx_rtc_ops, THIS_MODULE);
501         if (IS_ERR(rtc_dd->rtc)) {
502                 dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
503                         __func__, PTR_ERR(rtc_dd->rtc));
504                 return PTR_ERR(rtc_dd->rtc);
505         }
506
507         /* Request the alarm IRQ */
508         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
509                                           pm8xxx_alarm_trigger,
510                                           IRQF_TRIGGER_RISING,
511                                           "pm8xxx_rtc_alarm", rtc_dd);
512         if (rc < 0) {
513                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
514                 return rc;
515         }
516
517         dev_dbg(&pdev->dev, "Probe success !!\n");
518
519         return 0;
520 }
521
522 #ifdef CONFIG_PM_SLEEP
523 static int pm8xxx_rtc_resume(struct device *dev)
524 {
525         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
526
527         if (device_may_wakeup(dev))
528                 disable_irq_wake(rtc_dd->rtc_alarm_irq);
529
530         return 0;
531 }
532
533 static int pm8xxx_rtc_suspend(struct device *dev)
534 {
535         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
536
537         if (device_may_wakeup(dev))
538                 enable_irq_wake(rtc_dd->rtc_alarm_irq);
539
540         return 0;
541 }
542 #endif
543
544 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
545                          pm8xxx_rtc_suspend,
546                          pm8xxx_rtc_resume);
547
548 static struct platform_driver pm8xxx_rtc_driver = {
549         .probe          = pm8xxx_rtc_probe,
550         .driver = {
551                 .name           = "rtc-pm8xxx",
552                 .pm             = &pm8xxx_rtc_pm_ops,
553                 .of_match_table = pm8xxx_id_table,
554         },
555 };
556
557 module_platform_driver(pm8xxx_rtc_driver);
558
559 MODULE_ALIAS("platform:rtc-pm8xxx");
560 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
561 MODULE_LICENSE("GPL v2");
562 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");