clk: bcm: dvp: Add MODULE_DEVICE_TABLE()
[linux-2.6-microblaze.git] / drivers / rtc / rtc-pm8xxx.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
3  */
4 #include <linux/of.h>
5 #include <linux/module.h>
6 #include <linux/init.h>
7 #include <linux/rtc.h>
8 #include <linux/platform_device.h>
9 #include <linux/pm.h>
10 #include <linux/regmap.h>
11 #include <linux/slab.h>
12 #include <linux/spinlock.h>
13
14 /* RTC Register offsets from RTC CTRL REG */
15 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
16 #define PM8XXX_RTC_WRITE_OFFSET         0x02
17 #define PM8XXX_RTC_READ_OFFSET          0x06
18 #define PM8XXX_ALARM_RW_OFFSET          0x0A
19
20 /* RTC_CTRL register bit fields */
21 #define PM8xxx_RTC_ENABLE               BIT(7)
22 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
23
24 #define NUM_8_BIT_RTC_REGS              0x4
25
26 /**
27  * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
28  * @ctrl: base address of control register
29  * @write: base address of write register
30  * @read: base address of read register
31  * @alarm_ctrl: base address of alarm control register
32  * @alarm_ctrl2: base address of alarm control2 register
33  * @alarm_rw: base address of alarm read-write register
34  * @alarm_en: alarm enable mask
35  */
36 struct pm8xxx_rtc_regs {
37         unsigned int ctrl;
38         unsigned int write;
39         unsigned int read;
40         unsigned int alarm_ctrl;
41         unsigned int alarm_ctrl2;
42         unsigned int alarm_rw;
43         unsigned int alarm_en;
44 };
45
46 /**
47  * struct pm8xxx_rtc -  rtc driver internal structure
48  * @rtc:                rtc device for this driver.
49  * @regmap:             regmap used to access RTC registers
50  * @allow_set_time:     indicates whether writing to the RTC is allowed
51  * @rtc_alarm_irq:      rtc alarm irq number.
52  * @regs:               rtc registers description.
53  * @rtc_dev:            device structure.
54  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
55  */
56 struct pm8xxx_rtc {
57         struct rtc_device *rtc;
58         struct regmap *regmap;
59         bool allow_set_time;
60         int rtc_alarm_irq;
61         const struct pm8xxx_rtc_regs *regs;
62         struct device *rtc_dev;
63         spinlock_t ctrl_reg_lock;
64 };
65
66 /*
67  * Steps to write the RTC registers.
68  * 1. Disable alarm if enabled.
69  * 2. Disable rtc if enabled.
70  * 3. Write 0x00 to LSB.
71  * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
72  * 5. Enable rtc if disabled in step 2.
73  * 6. Enable alarm if disabled in step 1.
74  */
75 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
76 {
77         int rc, i;
78         unsigned long secs, irq_flags;
79         u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, rtc_disabled = 0;
80         unsigned int ctrl_reg, rtc_ctrl_reg;
81         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
82         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
83
84         if (!rtc_dd->allow_set_time)
85                 return -EACCES;
86
87         secs = rtc_tm_to_time64(tm);
88
89         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
90
91         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
92                 value[i] = secs & 0xFF;
93                 secs >>= 8;
94         }
95
96         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
97
98         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
99         if (rc)
100                 goto rtc_rw_fail;
101
102         if (ctrl_reg & regs->alarm_en) {
103                 alarm_enabled = 1;
104                 ctrl_reg &= ~regs->alarm_en;
105                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
106                 if (rc) {
107                         dev_err(dev, "Write to RTC Alarm control register failed\n");
108                         goto rtc_rw_fail;
109                 }
110         }
111
112         /* Disable RTC H/w before writing on RTC register */
113         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &rtc_ctrl_reg);
114         if (rc)
115                 goto rtc_rw_fail;
116
117         if (rtc_ctrl_reg & PM8xxx_RTC_ENABLE) {
118                 rtc_disabled = 1;
119                 rtc_ctrl_reg &= ~PM8xxx_RTC_ENABLE;
120                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
121                 if (rc) {
122                         dev_err(dev, "Write to RTC control register failed\n");
123                         goto rtc_rw_fail;
124                 }
125         }
126
127         /* Write 0 to Byte[0] */
128         rc = regmap_write(rtc_dd->regmap, regs->write, 0);
129         if (rc) {
130                 dev_err(dev, "Write to RTC write data register failed\n");
131                 goto rtc_rw_fail;
132         }
133
134         /* Write Byte[1], Byte[2], Byte[3] */
135         rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
136                                &value[1], sizeof(value) - 1);
137         if (rc) {
138                 dev_err(dev, "Write to RTC write data register failed\n");
139                 goto rtc_rw_fail;
140         }
141
142         /* Write Byte[0] */
143         rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
144         if (rc) {
145                 dev_err(dev, "Write to RTC write data register failed\n");
146                 goto rtc_rw_fail;
147         }
148
149         /* Enable RTC H/w after writing on RTC register */
150         if (rtc_disabled) {
151                 rtc_ctrl_reg |= PM8xxx_RTC_ENABLE;
152                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
153                 if (rc) {
154                         dev_err(dev, "Write to RTC control register failed\n");
155                         goto rtc_rw_fail;
156                 }
157         }
158
159         if (alarm_enabled) {
160                 ctrl_reg |= regs->alarm_en;
161                 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
162                 if (rc) {
163                         dev_err(dev, "Write to RTC Alarm control register failed\n");
164                         goto rtc_rw_fail;
165                 }
166         }
167
168 rtc_rw_fail:
169         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
170
171         return rc;
172 }
173
174 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
175 {
176         int rc;
177         u8 value[NUM_8_BIT_RTC_REGS];
178         unsigned long secs;
179         unsigned int reg;
180         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
181         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
182
183         rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
184         if (rc) {
185                 dev_err(dev, "RTC read data register failed\n");
186                 return rc;
187         }
188
189         /*
190          * Read the LSB again and check if there has been a carry over.
191          * If there is, redo the read operation.
192          */
193         rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
194         if (rc < 0) {
195                 dev_err(dev, "RTC read data register failed\n");
196                 return rc;
197         }
198
199         if (unlikely(reg < value[0])) {
200                 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
201                                       value, sizeof(value));
202                 if (rc) {
203                         dev_err(dev, "RTC read data register failed\n");
204                         return rc;
205                 }
206         }
207
208         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
209                ((unsigned long)value[3] << 24);
210
211         rtc_time64_to_tm(secs, tm);
212
213         dev_dbg(dev, "secs = %lu, h:m:s == %ptRt, y-m-d = %ptRdr\n", secs, tm, tm);
214
215         return 0;
216 }
217
218 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
219 {
220         int rc, i;
221         u8 value[NUM_8_BIT_RTC_REGS];
222         unsigned int ctrl_reg;
223         unsigned long secs, irq_flags;
224         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
225         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
226
227         secs = rtc_tm_to_time64(&alarm->time);
228
229         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
230                 value[i] = secs & 0xFF;
231                 secs >>= 8;
232         }
233
234         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
235
236         rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
237                                sizeof(value));
238         if (rc) {
239                 dev_err(dev, "Write to RTC ALARM register failed\n");
240                 goto rtc_rw_fail;
241         }
242
243         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
244         if (rc)
245                 goto rtc_rw_fail;
246
247         if (alarm->enabled)
248                 ctrl_reg |= regs->alarm_en;
249         else
250                 ctrl_reg &= ~regs->alarm_en;
251
252         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
253         if (rc) {
254                 dev_err(dev, "Write to RTC alarm control register failed\n");
255                 goto rtc_rw_fail;
256         }
257
258         dev_dbg(dev, "Alarm Set for h:m:s=%ptRt, y-m-d=%ptRdr\n",
259                 &alarm->time, &alarm->time);
260 rtc_rw_fail:
261         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
262         return rc;
263 }
264
265 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
266 {
267         int rc;
268         u8 value[NUM_8_BIT_RTC_REGS];
269         unsigned long secs;
270         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
271         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
272
273         rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
274                               sizeof(value));
275         if (rc) {
276                 dev_err(dev, "RTC alarm time read failed\n");
277                 return rc;
278         }
279
280         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
281                ((unsigned long)value[3] << 24);
282
283         rtc_time64_to_tm(secs, &alarm->time);
284
285         dev_dbg(dev, "Alarm set for - h:m:s=%ptRt, y-m-d=%ptRdr\n",
286                 &alarm->time, &alarm->time);
287
288         return 0;
289 }
290
291 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
292 {
293         int rc;
294         unsigned long irq_flags;
295         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
296         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
297         unsigned int ctrl_reg;
298         u8 value[NUM_8_BIT_RTC_REGS] = {0};
299
300         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
301
302         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
303         if (rc)
304                 goto rtc_rw_fail;
305
306         if (enable)
307                 ctrl_reg |= regs->alarm_en;
308         else
309                 ctrl_reg &= ~regs->alarm_en;
310
311         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
312         if (rc) {
313                 dev_err(dev, "Write to RTC control register failed\n");
314                 goto rtc_rw_fail;
315         }
316
317         /* Clear Alarm register */
318         if (!enable) {
319                 rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
320                                        sizeof(value));
321                 if (rc) {
322                         dev_err(dev, "Clear RTC ALARM register failed\n");
323                         goto rtc_rw_fail;
324                 }
325         }
326
327 rtc_rw_fail:
328         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
329         return rc;
330 }
331
332 static const struct rtc_class_ops pm8xxx_rtc_ops = {
333         .read_time      = pm8xxx_rtc_read_time,
334         .set_time       = pm8xxx_rtc_set_time,
335         .set_alarm      = pm8xxx_rtc_set_alarm,
336         .read_alarm     = pm8xxx_rtc_read_alarm,
337         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
338 };
339
340 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
341 {
342         struct pm8xxx_rtc *rtc_dd = dev_id;
343         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
344         unsigned int ctrl_reg;
345         int rc;
346         unsigned long irq_flags;
347
348         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
349
350         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
351
352         /* Clear the alarm enable bit */
353         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
354         if (rc) {
355                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
356                 goto rtc_alarm_handled;
357         }
358
359         ctrl_reg &= ~regs->alarm_en;
360
361         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
362         if (rc) {
363                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
364                 dev_err(rtc_dd->rtc_dev,
365                         "Write to alarm control register failed\n");
366                 goto rtc_alarm_handled;
367         }
368
369         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
370
371         /* Clear RTC alarm register */
372         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
373         if (rc) {
374                 dev_err(rtc_dd->rtc_dev,
375                         "RTC Alarm control2 register read failed\n");
376                 goto rtc_alarm_handled;
377         }
378
379         ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
380         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
381         if (rc)
382                 dev_err(rtc_dd->rtc_dev,
383                         "Write to RTC Alarm control2 register failed\n");
384
385 rtc_alarm_handled:
386         return IRQ_HANDLED;
387 }
388
389 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
390 {
391         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
392         unsigned int ctrl_reg;
393         int rc;
394
395         /* Check if the RTC is on, else turn it on */
396         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
397         if (rc)
398                 return rc;
399
400         if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
401                 ctrl_reg |= PM8xxx_RTC_ENABLE;
402                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
403                 if (rc)
404                         return rc;
405         }
406
407         return 0;
408 }
409
410 static const struct pm8xxx_rtc_regs pm8921_regs = {
411         .ctrl           = 0x11d,
412         .write          = 0x11f,
413         .read           = 0x123,
414         .alarm_rw       = 0x127,
415         .alarm_ctrl     = 0x11d,
416         .alarm_ctrl2    = 0x11e,
417         .alarm_en       = BIT(1),
418 };
419
420 static const struct pm8xxx_rtc_regs pm8058_regs = {
421         .ctrl           = 0x1e8,
422         .write          = 0x1ea,
423         .read           = 0x1ee,
424         .alarm_rw       = 0x1f2,
425         .alarm_ctrl     = 0x1e8,
426         .alarm_ctrl2    = 0x1e9,
427         .alarm_en       = BIT(1),
428 };
429
430 static const struct pm8xxx_rtc_regs pm8941_regs = {
431         .ctrl           = 0x6046,
432         .write          = 0x6040,
433         .read           = 0x6048,
434         .alarm_rw       = 0x6140,
435         .alarm_ctrl     = 0x6146,
436         .alarm_ctrl2    = 0x6148,
437         .alarm_en       = BIT(7),
438 };
439
440 /*
441  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
442  */
443 static const struct of_device_id pm8xxx_id_table[] = {
444         { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
445         { .compatible = "qcom,pm8018-rtc", .data = &pm8921_regs },
446         { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
447         { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
448         { },
449 };
450 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
451
452 static int pm8xxx_rtc_probe(struct platform_device *pdev)
453 {
454         int rc;
455         struct pm8xxx_rtc *rtc_dd;
456         const struct of_device_id *match;
457
458         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
459         if (!match)
460                 return -ENXIO;
461
462         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
463         if (rtc_dd == NULL)
464                 return -ENOMEM;
465
466         /* Initialise spinlock to protect RTC control register */
467         spin_lock_init(&rtc_dd->ctrl_reg_lock);
468
469         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
470         if (!rtc_dd->regmap) {
471                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
472                 return -ENXIO;
473         }
474
475         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
476         if (rtc_dd->rtc_alarm_irq < 0)
477                 return -ENXIO;
478
479         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
480                                                       "allow-set-time");
481
482         rtc_dd->regs = match->data;
483         rtc_dd->rtc_dev = &pdev->dev;
484
485         rc = pm8xxx_rtc_enable(rtc_dd);
486         if (rc)
487                 return rc;
488
489         platform_set_drvdata(pdev, rtc_dd);
490
491         device_init_wakeup(&pdev->dev, 1);
492
493         /* Register the RTC device */
494         rtc_dd->rtc = devm_rtc_allocate_device(&pdev->dev);
495         if (IS_ERR(rtc_dd->rtc))
496                 return PTR_ERR(rtc_dd->rtc);
497
498         rtc_dd->rtc->ops = &pm8xxx_rtc_ops;
499         rtc_dd->rtc->range_max = U32_MAX;
500
501         /* Request the alarm IRQ */
502         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
503                                           pm8xxx_alarm_trigger,
504                                           IRQF_TRIGGER_RISING,
505                                           "pm8xxx_rtc_alarm", rtc_dd);
506         if (rc < 0) {
507                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
508                 return rc;
509         }
510
511         return rtc_register_device(rtc_dd->rtc);
512 }
513
514 #ifdef CONFIG_PM_SLEEP
515 static int pm8xxx_rtc_resume(struct device *dev)
516 {
517         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
518
519         if (device_may_wakeup(dev))
520                 disable_irq_wake(rtc_dd->rtc_alarm_irq);
521
522         return 0;
523 }
524
525 static int pm8xxx_rtc_suspend(struct device *dev)
526 {
527         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
528
529         if (device_may_wakeup(dev))
530                 enable_irq_wake(rtc_dd->rtc_alarm_irq);
531
532         return 0;
533 }
534 #endif
535
536 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
537                          pm8xxx_rtc_suspend,
538                          pm8xxx_rtc_resume);
539
540 static struct platform_driver pm8xxx_rtc_driver = {
541         .probe          = pm8xxx_rtc_probe,
542         .driver = {
543                 .name           = "rtc-pm8xxx",
544                 .pm             = &pm8xxx_rtc_pm_ops,
545                 .of_match_table = pm8xxx_id_table,
546         },
547 };
548
549 module_platform_driver(pm8xxx_rtc_driver);
550
551 MODULE_ALIAS("platform:rtc-pm8xxx");
552 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
553 MODULE_LICENSE("GPL v2");
554 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");