1 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/rtc.h>
16 #include <linux/platform_device.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20 #include <linux/spinlock.h>
22 /* RTC Register offsets from RTC CTRL REG */
23 #define PM8XXX_ALARM_CTRL_OFFSET 0x01
24 #define PM8XXX_RTC_WRITE_OFFSET 0x02
25 #define PM8XXX_RTC_READ_OFFSET 0x06
26 #define PM8XXX_ALARM_RW_OFFSET 0x0A
28 /* RTC_CTRL register bit fields */
29 #define PM8xxx_RTC_ENABLE BIT(7)
30 #define PM8xxx_RTC_ALARM_CLEAR BIT(0)
32 #define NUM_8_BIT_RTC_REGS 0x4
35 * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
36 * @ctrl: base address of control register
37 * @write: base address of write register
38 * @read: base address of read register
39 * @alarm_ctrl: base address of alarm control register
40 * @alarm_ctrl2: base address of alarm control2 register
41 * @alarm_rw: base address of alarm read-write register
42 * @alarm_en: alarm enable mask
44 struct pm8xxx_rtc_regs {
48 unsigned int alarm_ctrl;
49 unsigned int alarm_ctrl2;
50 unsigned int alarm_rw;
51 unsigned int alarm_en;
55 * struct pm8xxx_rtc - rtc driver internal structure
56 * @rtc: rtc device for this driver.
57 * @regmap: regmap used to access RTC registers
58 * @allow_set_time: indicates whether writing to the RTC is allowed
59 * @rtc_alarm_irq: rtc alarm irq number.
60 * @ctrl_reg: rtc control register.
61 * @rtc_dev: device structure.
62 * @ctrl_reg_lock: spinlock protecting access to ctrl_reg.
65 struct rtc_device *rtc;
66 struct regmap *regmap;
69 const struct pm8xxx_rtc_regs *regs;
70 struct device *rtc_dev;
71 spinlock_t ctrl_reg_lock;
75 * Steps to write the RTC registers.
76 * 1. Disable alarm if enabled.
77 * 2. Disable rtc if enabled.
78 * 3. Write 0x00 to LSB.
79 * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
80 * 5. Enable rtc if disabled in step 2.
81 * 6. Enable alarm if disabled in step 1.
83 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
86 unsigned long secs, irq_flags;
87 u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, rtc_disabled = 0;
88 unsigned int ctrl_reg, rtc_ctrl_reg;
89 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
90 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
92 if (!rtc_dd->allow_set_time)
95 rtc_tm_to_time(tm, &secs);
97 dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
99 for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
100 value[i] = secs & 0xFF;
104 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
106 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
110 if (ctrl_reg & regs->alarm_en) {
112 ctrl_reg &= ~regs->alarm_en;
113 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
115 dev_err(dev, "Write to RTC Alarm control register failed\n");
120 /* Disable RTC H/w before writing on RTC register */
121 rc = regmap_read(rtc_dd->regmap, regs->ctrl, &rtc_ctrl_reg);
125 if (rtc_ctrl_reg & PM8xxx_RTC_ENABLE) {
127 rtc_ctrl_reg &= ~PM8xxx_RTC_ENABLE;
128 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
130 dev_err(dev, "Write to RTC control register failed\n");
135 /* Write 0 to Byte[0] */
136 rc = regmap_write(rtc_dd->regmap, regs->write, 0);
138 dev_err(dev, "Write to RTC write data register failed\n");
142 /* Write Byte[1], Byte[2], Byte[3] */
143 rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
144 &value[1], sizeof(value) - 1);
146 dev_err(dev, "Write to RTC write data register failed\n");
151 rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
153 dev_err(dev, "Write to RTC write data register failed\n");
157 /* Enable RTC H/w after writing on RTC register */
159 rtc_ctrl_reg |= PM8xxx_RTC_ENABLE;
160 rc = regmap_write(rtc_dd->regmap, regs->ctrl, rtc_ctrl_reg);
162 dev_err(dev, "Write to RTC control register failed\n");
168 ctrl_reg |= regs->alarm_en;
169 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
171 dev_err(dev, "Write to RTC Alarm control register failed\n");
177 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
182 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
185 u8 value[NUM_8_BIT_RTC_REGS];
188 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
189 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
191 rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
193 dev_err(dev, "RTC read data register failed\n");
198 * Read the LSB again and check if there has been a carry over.
199 * If there is, redo the read operation.
201 rc = regmap_read(rtc_dd->regmap, regs->read, ®);
203 dev_err(dev, "RTC read data register failed\n");
207 if (unlikely(reg < value[0])) {
208 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
209 value, sizeof(value));
211 dev_err(dev, "RTC read data register failed\n");
216 secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24);
218 rtc_time_to_tm(secs, tm);
220 dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
221 secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
222 tm->tm_mday, tm->tm_mon, tm->tm_year);
227 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
230 u8 value[NUM_8_BIT_RTC_REGS];
231 unsigned int ctrl_reg;
232 unsigned long secs, irq_flags;
233 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
234 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
236 rtc_tm_to_time(&alarm->time, &secs);
238 for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
239 value[i] = secs & 0xFF;
243 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
245 rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
248 dev_err(dev, "Write to RTC ALARM register failed\n");
252 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
257 ctrl_reg |= regs->alarm_en;
259 ctrl_reg &= ~regs->alarm_en;
261 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
263 dev_err(dev, "Write to RTC alarm control register failed\n");
267 dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
268 alarm->time.tm_hour, alarm->time.tm_min,
269 alarm->time.tm_sec, alarm->time.tm_mday,
270 alarm->time.tm_mon, alarm->time.tm_year);
272 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
276 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
279 u8 value[NUM_8_BIT_RTC_REGS];
281 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
282 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
284 rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
287 dev_err(dev, "RTC alarm time read failed\n");
291 secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24);
293 rtc_time_to_tm(secs, &alarm->time);
295 rc = rtc_valid_tm(&alarm->time);
297 dev_err(dev, "Invalid alarm time read from RTC\n");
301 dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
302 alarm->time.tm_hour, alarm->time.tm_min,
303 alarm->time.tm_sec, alarm->time.tm_mday,
304 alarm->time.tm_mon, alarm->time.tm_year);
309 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
312 unsigned long irq_flags;
313 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
314 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
315 unsigned int ctrl_reg;
317 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
319 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
324 ctrl_reg |= regs->alarm_en;
326 ctrl_reg &= ~regs->alarm_en;
328 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
330 dev_err(dev, "Write to RTC control register failed\n");
335 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
339 static const struct rtc_class_ops pm8xxx_rtc_ops = {
340 .read_time = pm8xxx_rtc_read_time,
341 .set_time = pm8xxx_rtc_set_time,
342 .set_alarm = pm8xxx_rtc_set_alarm,
343 .read_alarm = pm8xxx_rtc_read_alarm,
344 .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
347 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
349 struct pm8xxx_rtc *rtc_dd = dev_id;
350 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
351 unsigned int ctrl_reg;
353 unsigned long irq_flags;
355 rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
357 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
359 /* Clear the alarm enable bit */
360 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
362 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
363 goto rtc_alarm_handled;
366 ctrl_reg &= ~regs->alarm_en;
368 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
370 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
371 dev_err(rtc_dd->rtc_dev,
372 "Write to alarm control register failed\n");
373 goto rtc_alarm_handled;
376 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
378 /* Clear RTC alarm register */
379 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
381 dev_err(rtc_dd->rtc_dev,
382 "RTC Alarm control2 register read failed\n");
383 goto rtc_alarm_handled;
386 ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
387 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
389 dev_err(rtc_dd->rtc_dev,
390 "Write to RTC Alarm control2 register failed\n");
396 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
398 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
399 unsigned int ctrl_reg;
402 /* Check if the RTC is on, else turn it on */
403 rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
407 if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
408 ctrl_reg |= PM8xxx_RTC_ENABLE;
409 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
417 static const struct pm8xxx_rtc_regs pm8921_regs = {
423 .alarm_ctrl2 = 0x11e,
427 static const struct pm8xxx_rtc_regs pm8058_regs = {
433 .alarm_ctrl2 = 0x1e9,
437 static const struct pm8xxx_rtc_regs pm8941_regs = {
442 .alarm_ctrl = 0x6146,
443 .alarm_ctrl2 = 0x6148,
448 * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
450 static const struct of_device_id pm8xxx_id_table[] = {
451 { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
452 { .compatible = "qcom,pm8018-rtc", .data = &pm8921_regs },
453 { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
454 { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
457 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
459 static int pm8xxx_rtc_probe(struct platform_device *pdev)
462 struct pm8xxx_rtc *rtc_dd;
463 const struct of_device_id *match;
465 match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
469 rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
473 /* Initialise spinlock to protect RTC control register */
474 spin_lock_init(&rtc_dd->ctrl_reg_lock);
476 rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
477 if (!rtc_dd->regmap) {
478 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
482 rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
483 if (rtc_dd->rtc_alarm_irq < 0) {
484 dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
488 rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
491 rtc_dd->regs = match->data;
492 rtc_dd->rtc_dev = &pdev->dev;
494 rc = pm8xxx_rtc_enable(rtc_dd);
498 platform_set_drvdata(pdev, rtc_dd);
500 device_init_wakeup(&pdev->dev, 1);
502 /* Register the RTC device */
503 rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
504 &pm8xxx_rtc_ops, THIS_MODULE);
505 if (IS_ERR(rtc_dd->rtc)) {
506 dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
507 __func__, PTR_ERR(rtc_dd->rtc));
508 return PTR_ERR(rtc_dd->rtc);
511 /* Request the alarm IRQ */
512 rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
513 pm8xxx_alarm_trigger,
515 "pm8xxx_rtc_alarm", rtc_dd);
517 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
521 dev_dbg(&pdev->dev, "Probe success !!\n");
526 #ifdef CONFIG_PM_SLEEP
527 static int pm8xxx_rtc_resume(struct device *dev)
529 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
531 if (device_may_wakeup(dev))
532 disable_irq_wake(rtc_dd->rtc_alarm_irq);
537 static int pm8xxx_rtc_suspend(struct device *dev)
539 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
541 if (device_may_wakeup(dev))
542 enable_irq_wake(rtc_dd->rtc_alarm_irq);
548 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
552 static struct platform_driver pm8xxx_rtc_driver = {
553 .probe = pm8xxx_rtc_probe,
555 .name = "rtc-pm8xxx",
556 .pm = &pm8xxx_rtc_pm_ops,
557 .of_match_table = pm8xxx_id_table,
561 module_platform_driver(pm8xxx_rtc_driver);
563 MODULE_ALIAS("platform:rtc-pm8xxx");
564 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
565 MODULE_LICENSE("GPL v2");
566 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");