drivers/rtc/rtc-pcf2127.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * An I2C and SPI driver for the NXP PCF2127/29 RTC
   4  * Copyright 2013 Til-Technologies
   5  *
   6  * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
   7  *
   8  * Watchdog and tamper functions
   9  * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
  10  *
  11  * based on the other drivers in this same directory.
  12  *
  13  * Datasheet: https://www.nxp.com/docs/en/data-sheet/PCF2127.pdf
  14  */
  15
  16 #include <linux/i2c.h>
  17 #include <linux/spi/spi.h>
  18 #include <linux/bcd.h>
  19 #include <linux/rtc.h>
  20 #include <linux/slab.h>
  21 #include <linux/module.h>
  22 #include <linux/of.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/regmap.h>
  25 #include <linux/watchdog.h>
  26
  27 /* Control register 1 */
  28 #define PCF2127_REG_CTRL1               0x00
  29 #define PCF2127_BIT_CTRL1_POR_OVRD              BIT(3)
  30 #define PCF2127_BIT_CTRL1_TSF1                  BIT(4)
  31 /* Control register 2 */
  32 #define PCF2127_REG_CTRL2               0x01
  33 #define PCF2127_BIT_CTRL2_AIE                   BIT(1)
  34 #define PCF2127_BIT_CTRL2_TSIE                  BIT(2)
  35 #define PCF2127_BIT_CTRL2_AF                    BIT(4)
  36 #define PCF2127_BIT_CTRL2_TSF2                  BIT(5)
  37 #define PCF2127_BIT_CTRL2_WDTF                  BIT(6)
  38 /* Control register 3 */
  39 #define PCF2127_REG_CTRL3               0x02
  40 #define PCF2127_BIT_CTRL3_BLIE                  BIT(0)
  41 #define PCF2127_BIT_CTRL3_BIE                   BIT(1)
  42 #define PCF2127_BIT_CTRL3_BLF                   BIT(2)
  43 #define PCF2127_BIT_CTRL3_BF                    BIT(3)
  44 #define PCF2127_BIT_CTRL3_BTSE                  BIT(4)
  45 /* Time and date registers */
  46 #define PCF2127_REG_SC                  0x03
  47 #define PCF2127_BIT_SC_OSF                      BIT(7)
  48 #define PCF2127_REG_MN                  0x04
  49 #define PCF2127_REG_HR                  0x05
  50 #define PCF2127_REG_DM                  0x06
  51 #define PCF2127_REG_DW                  0x07
  52 #define PCF2127_REG_MO                  0x08
  53 #define PCF2127_REG_YR                  0x09
  54 /* Alarm registers */
  55 #define PCF2127_REG_ALARM_SC            0x0A
  56 #define PCF2127_REG_ALARM_MN            0x0B
  57 #define PCF2127_REG_ALARM_HR            0x0C
  58 #define PCF2127_REG_ALARM_DM            0x0D
  59 #define PCF2127_REG_ALARM_DW            0x0E
  60 #define PCF2127_BIT_ALARM_AE                    BIT(7)
  61 /* CLKOUT control register */
  62 #define PCF2127_REG_CLKOUT              0x0f
  63 #define PCF2127_BIT_CLKOUT_OTPR                 BIT(5)
  64 /* Watchdog registers */
  65 #define PCF2127_REG_WD_CTL              0x10
  66 #define PCF2127_BIT_WD_CTL_TF0                  BIT(0)
  67 #define PCF2127_BIT_WD_CTL_TF1                  BIT(1)
  68 #define PCF2127_BIT_WD_CTL_CD0                  BIT(6)
  69 #define PCF2127_BIT_WD_CTL_CD1                  BIT(7)
  70 #define PCF2127_REG_WD_VAL              0x11
  71 /* Tamper timestamp registers */
  72 #define PCF2127_REG_TS_CTRL             0x12
  73 #define PCF2127_BIT_TS_CTRL_TSOFF               BIT(6)
  74 #define PCF2127_BIT_TS_CTRL_TSM                 BIT(7)
  75 #define PCF2127_REG_TS_SC               0x13
  76 #define PCF2127_REG_TS_MN               0x14
  77 #define PCF2127_REG_TS_HR               0x15
  78 #define PCF2127_REG_TS_DM               0x16
  79 #define PCF2127_REG_TS_MO               0x17
  80 #define PCF2127_REG_TS_YR               0x18
  81 /*
  82  * RAM registers
  83  * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is
  84  * battery backed and can survive a power outage.
  85  * PCF2129 doesn't have this feature.
  86  */
  87 #define PCF2127_REG_RAM_ADDR_MSB        0x1A
  88 #define PCF2127_REG_RAM_WRT_CMD         0x1C
  89 #define PCF2127_REG_RAM_RD_CMD          0x1D
  90
  91 /* Watchdog timer value constants */
  92 #define PCF2127_WD_VAL_STOP             0
  93 #define PCF2127_WD_VAL_MIN              2
  94 #define PCF2127_WD_VAL_MAX              255
  95 #define PCF2127_WD_VAL_DEFAULT          60
  96
  97 /* Mask for currently enabled interrupts */
  98 #define PCF2127_CTRL1_IRQ_MASK (PCF2127_BIT_CTRL1_TSF1)
  99 #define PCF2127_CTRL2_IRQ_MASK ( \
 100                 PCF2127_BIT_CTRL2_AF | \
 101                 PCF2127_BIT_CTRL2_WDTF | \
 102                 PCF2127_BIT_CTRL2_TSF2)
 103
 104 struct pcf2127 {
 105         struct rtc_device *rtc;
 106         struct watchdog_device wdd;
 107         struct regmap *regmap;
 108         time64_t ts;
 109         bool ts_valid;
 110         bool irq_enabled;
 111 };
 112
 113 /*
 114  * In the routines that deal directly with the pcf2127 hardware, we use
 115  * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
 116  */
 117 static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
 118 {
 119         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 120         unsigned char buf[10];
 121         int ret;
 122
 123         /*
 124          * Avoid reading CTRL2 register as it causes WD_VAL register
 125          * value to reset to 0 which means watchdog is stopped.
 126          */
 127         ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3,
 128                                (buf + PCF2127_REG_CTRL3),
 129                                ARRAY_SIZE(buf) - PCF2127_REG_CTRL3);
 130         if (ret) {
 131                 dev_err(dev, "%s: read error\n", __func__);
 132                 return ret;
 133         }
 134
 135         if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF)
 136                 dev_info(dev,
 137                         "low voltage detected, check/replace RTC battery.\n");
 138
 139         /* Clock integrity is not guaranteed when OSF flag is set. */
 140         if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) {
 141                 /*
 142                  * no need clear the flag here,
 143                  * it will be cleared once the new date is saved
 144                  */
 145                 dev_warn(dev,
 146                          "oscillator stop detected, date/time is not reliable\n");
 147                 return -EINVAL;
 148         }
 149
 150         dev_dbg(dev,
 151                 "%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, "
 152                 "mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
 153                 __func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC],
 154                 buf[PCF2127_REG_MN], buf[PCF2127_REG_HR],
 155                 buf[PCF2127_REG_DM], buf[PCF2127_REG_DW],
 156                 buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]);
 157
 158         tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F);
 159         tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F);
 160         tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F); /* rtc hr 0-23 */
 161         tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F);
 162         tm->tm_wday = buf[PCF2127_REG_DW] & 0x07;
 163         tm->tm_mon = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
 164         tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]);
 165         tm->tm_year += 100;
 166
 167         dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
 168                 "mday=%d, mon=%d, year=%d, wday=%d\n",
 169                 __func__,
 170                 tm->tm_sec, tm->tm_min, tm->tm_hour,
 171                 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 172
 173         return 0;
 174 }
 175
 176 static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
 177 {
 178         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 179         unsigned char buf[7];
 180         int i = 0, err;
 181
 182         dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
 183                 "mday=%d, mon=%d, year=%d, wday=%d\n",
 184                 __func__,
 185                 tm->tm_sec, tm->tm_min, tm->tm_hour,
 186                 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 187
 188         /* hours, minutes and seconds */
 189         buf[i++] = bin2bcd(tm->tm_sec); /* this will also clear OSF flag */
 190         buf[i++] = bin2bcd(tm->tm_min);
 191         buf[i++] = bin2bcd(tm->tm_hour);
 192         buf[i++] = bin2bcd(tm->tm_mday);
 193         buf[i++] = tm->tm_wday & 0x07;
 194
 195         /* month, 1 - 12 */
 196         buf[i++] = bin2bcd(tm->tm_mon + 1);
 197
 198         /* year */
 199         buf[i++] = bin2bcd(tm->tm_year - 100);
 200
 201         /* write register's data */
 202         err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i);
 203         if (err) {
 204                 dev_err(dev,
 205                         "%s: err=%d", __func__, err);
 206                 return err;
 207         }
 208
 209         return 0;
 210 }
 211
 212 static int pcf2127_rtc_ioctl(struct device *dev,
 213                                 unsigned int cmd, unsigned long arg)
 214 {
 215         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 216         int val, touser = 0;
 217         int ret;
 218
 219         switch (cmd) {
 220         case RTC_VL_READ:
 221                 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &val);
 222                 if (ret)
 223                         return ret;
 224
 225                 if (val & PCF2127_BIT_CTRL3_BLF)
 226                         touser |= RTC_VL_BACKUP_LOW;
 227
 228                 if (val & PCF2127_BIT_CTRL3_BF)
 229                         touser |= RTC_VL_BACKUP_SWITCH;
 230
 231                 return put_user(touser, (unsigned int __user *)arg);
 232
 233         case RTC_VL_CLR:
 234                 return regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
 235                                           PCF2127_BIT_CTRL3_BF, 0);
 236
 237         default:
 238                 return -ENOIOCTLCMD;
 239         }
 240 }
 241
 242 static int pcf2127_nvmem_read(void *priv, unsigned int offset,
 243                               void *val, size_t bytes)
 244 {
 245         struct pcf2127 *pcf2127 = priv;
 246         int ret;
 247         unsigned char offsetbuf[] = { offset >> 8, offset };
 248
 249         ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
 250                                 offsetbuf, 2);
 251         if (ret)
 252                 return ret;
 253
 254         return regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD,
 255                                 val, bytes);
 256 }
 257
 258 static int pcf2127_nvmem_write(void *priv, unsigned int offset,
 259                                void *val, size_t bytes)
 260 {
 261         struct pcf2127 *pcf2127 = priv;
 262         int ret;
 263         unsigned char offsetbuf[] = { offset >> 8, offset };
 264
 265         ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
 266                                 offsetbuf, 2);
 267         if (ret)
 268                 return ret;
 269
 270         return regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD,
 271                                  val, bytes);
 272 }
 273
 274 /* watchdog driver */
 275
 276 static int pcf2127_wdt_ping(struct watchdog_device *wdd)
 277 {
 278         struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
 279
 280         return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout);
 281 }
 282
 283 /*
 284  * Restart watchdog timer if feature is active.
 285  *
 286  * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate,
 287  * since register also contain control/status flags for other features.
 288  * Always call this function after reading CTRL2 register.
 289  */
 290 static int pcf2127_wdt_active_ping(struct watchdog_device *wdd)
 291 {
 292         int ret = 0;
 293
 294         if (watchdog_active(wdd)) {
 295                 ret = pcf2127_wdt_ping(wdd);
 296                 if (ret)
 297                         dev_err(wdd->parent,
 298                                 "%s: watchdog restart failed, ret=%d\n",
 299                                 __func__, ret);
 300         }
 301
 302         return ret;
 303 }
 304
 305 static int pcf2127_wdt_start(struct watchdog_device *wdd)
 306 {
 307         return pcf2127_wdt_ping(wdd);
 308 }
 309
 310 static int pcf2127_wdt_stop(struct watchdog_device *wdd)
 311 {
 312         struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
 313
 314         return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL,
 315                             PCF2127_WD_VAL_STOP);
 316 }
 317
 318 static int pcf2127_wdt_set_timeout(struct watchdog_device *wdd,
 319                                    unsigned int new_timeout)
 320 {
 321         dev_dbg(wdd->parent, "new watchdog timeout: %is (old: %is)\n",
 322                 new_timeout, wdd->timeout);
 323
 324         wdd->timeout = new_timeout;
 325
 326         return pcf2127_wdt_active_ping(wdd);
 327 }
 328
 329 static const struct watchdog_info pcf2127_wdt_info = {
 330         .identity = "NXP PCF2127/PCF2129 Watchdog",
 331         .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
 332 };
 333
 334 static const struct watchdog_ops pcf2127_watchdog_ops = {
 335         .owner = THIS_MODULE,
 336         .start = pcf2127_wdt_start,
 337         .stop = pcf2127_wdt_stop,
 338         .ping = pcf2127_wdt_ping,
 339         .set_timeout = pcf2127_wdt_set_timeout,
 340 };
 341
 342 static int pcf2127_watchdog_init(struct device *dev, struct pcf2127 *pcf2127)
 343 {
 344         u32 wdd_timeout;
 345         int ret;
 346
 347         if (!IS_ENABLED(CONFIG_WATCHDOG) ||
 348             !device_property_read_bool(dev, "reset-source"))
 349                 return 0;
 350
 351         pcf2127->wdd.parent = dev;
 352         pcf2127->wdd.info = &pcf2127_wdt_info;
 353         pcf2127->wdd.ops = &pcf2127_watchdog_ops;
 354         pcf2127->wdd.min_timeout = PCF2127_WD_VAL_MIN;
 355         pcf2127->wdd.max_timeout = PCF2127_WD_VAL_MAX;
 356         pcf2127->wdd.timeout = PCF2127_WD_VAL_DEFAULT;
 357         pcf2127->wdd.min_hw_heartbeat_ms = 500;
 358         pcf2127->wdd.status = WATCHDOG_NOWAYOUT_INIT_STATUS;
 359
 360         watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
 361
 362         /* Test if watchdog timer is started by bootloader */
 363         ret = regmap_read(pcf2127->regmap, PCF2127_REG_WD_VAL, &wdd_timeout);
 364         if (ret)
 365                 return ret;
 366
 367         if (wdd_timeout)
 368                 set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status);
 369
 370         return devm_watchdog_register_device(dev, &pcf2127->wdd);
 371 }
 372
 373 /* Alarm */
 374 static int pcf2127_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 375 {
 376         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 377         unsigned int buf[5], ctrl2;
 378         int ret;
 379
 380         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 381         if (ret)
 382                 return ret;
 383
 384         ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 385         if (ret)
 386                 return ret;
 387
 388         ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
 389                                sizeof(buf));
 390         if (ret)
 391                 return ret;
 392
 393         alrm->enabled = ctrl2 & PCF2127_BIT_CTRL2_AIE;
 394         alrm->pending = ctrl2 & PCF2127_BIT_CTRL2_AF;
 395
 396         alrm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
 397         alrm->time.tm_min = bcd2bin(buf[1] & 0x7F);
 398         alrm->time.tm_hour = bcd2bin(buf[2] & 0x3F);
 399         alrm->time.tm_mday = bcd2bin(buf[3] & 0x3F);
 400
 401         return 0;
 402 }
 403
 404 static int pcf2127_rtc_alarm_irq_enable(struct device *dev, u32 enable)
 405 {
 406         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 407         int ret;
 408
 409         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 410                                  PCF2127_BIT_CTRL2_AIE,
 411                                  enable ? PCF2127_BIT_CTRL2_AIE : 0);
 412         if (ret)
 413                 return ret;
 414
 415         return pcf2127_wdt_active_ping(&pcf2127->wdd);
 416 }
 417
 418 static int pcf2127_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 419 {
 420         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 421         uint8_t buf[5];
 422         int ret;
 423
 424         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 425                                  PCF2127_BIT_CTRL2_AF, 0);
 426         if (ret)
 427                 return ret;
 428
 429         ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 430         if (ret)
 431                 return ret;
 432
 433         buf[0] = bin2bcd(alrm->time.tm_sec);
 434         buf[1] = bin2bcd(alrm->time.tm_min);
 435         buf[2] = bin2bcd(alrm->time.tm_hour);
 436         buf[3] = bin2bcd(alrm->time.tm_mday);
 437         buf[4] = PCF2127_BIT_ALARM_AE; /* Do not match on week day */
 438
 439         ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
 440                                 sizeof(buf));
 441         if (ret)
 442                 return ret;
 443
 444         return pcf2127_rtc_alarm_irq_enable(dev, alrm->enabled);
 445 }
 446
 447 /*
 448  * This function reads ctrl2 register, caller is responsible for calling
 449  * pcf2127_wdt_active_ping()
 450  */
 451 static int pcf2127_rtc_ts_read(struct device *dev, time64_t *ts)
 452 {
 453         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 454         struct rtc_time tm;
 455         int ret;
 456         unsigned char data[25];
 457
 458         ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data,
 459                                sizeof(data));
 460         if (ret) {
 461                 dev_err(dev, "%s: read error ret=%d\n", __func__, ret);
 462                 return ret;
 463         }
 464
 465         dev_dbg(dev,
 466                 "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n",
 467                 __func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2],
 468                 data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC],
 469                 data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR],
 470                 data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO],
 471                 data[PCF2127_REG_TS_YR]);
 472
 473         tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F);
 474         tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F);
 475         tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F);
 476         tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F);
 477         /* TS_MO register (month) value range: 1-12 */
 478         tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1;
 479         tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]);
 480         if (tm.tm_year < 70)
 481                 tm.tm_year += 100; /* assume we are in 1970...2069 */
 482
 483         ret = rtc_valid_tm(&tm);
 484         if (ret) {
 485                 dev_err(dev, "Invalid timestamp. ret=%d\n", ret);
 486                 return ret;
 487         }
 488
 489         *ts = rtc_tm_to_time64(&tm);
 490         return 0;
 491 };
 492
 493 static void pcf2127_rtc_ts_snapshot(struct device *dev)
 494 {
 495         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 496         int ret;
 497
 498         /* Let userspace read the first timestamp */
 499         if (pcf2127->ts_valid)
 500                 return;
 501
 502         ret = pcf2127_rtc_ts_read(dev, &pcf2127->ts);
 503         if (!ret)
 504                 pcf2127->ts_valid = true;
 505 }
 506
 507 static irqreturn_t pcf2127_rtc_irq(int irq, void *dev)
 508 {
 509         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 510         unsigned int ctrl1, ctrl2;
 511         int ret = 0;
 512
 513         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL1, &ctrl1);
 514         if (ret)
 515                 return IRQ_NONE;
 516
 517         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 518         if (ret)
 519                 return IRQ_NONE;
 520
 521         if (!(ctrl1 & PCF2127_CTRL1_IRQ_MASK || ctrl2 & PCF2127_CTRL2_IRQ_MASK))
 522                 return IRQ_NONE;
 523
 524         if (ctrl1 & PCF2127_BIT_CTRL1_TSF1 || ctrl2 & PCF2127_BIT_CTRL2_TSF2)
 525                 pcf2127_rtc_ts_snapshot(dev);
 526
 527         if (ctrl1 & PCF2127_CTRL1_IRQ_MASK)
 528                 regmap_write(pcf2127->regmap, PCF2127_REG_CTRL1,
 529                         ctrl1 & ~PCF2127_CTRL1_IRQ_MASK);
 530
 531         if (ctrl2 & PCF2127_CTRL2_IRQ_MASK)
 532                 regmap_write(pcf2127->regmap, PCF2127_REG_CTRL2,
 533                         ctrl2 & ~PCF2127_CTRL2_IRQ_MASK);
 534
 535         if (ctrl2 & PCF2127_BIT_CTRL2_AF)
 536                 rtc_update_irq(pcf2127->rtc, 1, RTC_IRQF | RTC_AF);
 537
 538         pcf2127_wdt_active_ping(&pcf2127->wdd);
 539
 540         return IRQ_HANDLED;
 541 }
 542
 543 static const struct rtc_class_ops pcf2127_rtc_ops = {
 544         .ioctl            = pcf2127_rtc_ioctl,
 545         .read_time        = pcf2127_rtc_read_time,
 546         .set_time         = pcf2127_rtc_set_time,
 547         .read_alarm       = pcf2127_rtc_read_alarm,
 548         .set_alarm        = pcf2127_rtc_set_alarm,
 549         .alarm_irq_enable = pcf2127_rtc_alarm_irq_enable,
 550 };
 551
 552 /* sysfs interface */
 553
 554 static ssize_t timestamp0_store(struct device *dev,
 555                                 struct device_attribute *attr,
 556                                 const char *buf, size_t count)
 557 {
 558         struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
 559         int ret;
 560
 561         if (pcf2127->irq_enabled) {
 562                 pcf2127->ts_valid = false;
 563         } else {
 564                 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
 565                         PCF2127_BIT_CTRL1_TSF1, 0);
 566                 if (ret) {
 567                         dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret);
 568                         return ret;
 569                 }
 570
 571                 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 572                         PCF2127_BIT_CTRL2_TSF2, 0);
 573                 if (ret) {
 574                         dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret);
 575                         return ret;
 576                 }
 577
 578                 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 579                 if (ret)
 580                         return ret;
 581         }
 582
 583         return count;
 584 };
 585
 586 static ssize_t timestamp0_show(struct device *dev,
 587                                struct device_attribute *attr, char *buf)
 588 {
 589         struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
 590         unsigned int ctrl1, ctrl2;
 591         int ret;
 592         time64_t ts;
 593
 594         if (pcf2127->irq_enabled) {
 595                 if (!pcf2127->ts_valid)
 596                         return 0;
 597                 ts = pcf2127->ts;
 598         } else {
 599                 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL1, &ctrl1);
 600                 if (ret)
 601                         return 0;
 602
 603                 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 604                 if (ret)
 605                         return 0;
 606
 607                 if (!(ctrl1 & PCF2127_BIT_CTRL1_TSF1) &&
 608                     !(ctrl2 & PCF2127_BIT_CTRL2_TSF2))
 609                         return 0;
 610
 611                 ret = pcf2127_rtc_ts_read(dev->parent, &ts);
 612                 if (ret)
 613                         return 0;
 614
 615                 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 616                 if (ret)
 617                         return ret;
 618         }
 619         return sprintf(buf, "%llu\n", (unsigned long long)ts);
 620 };
 621
 622 static DEVICE_ATTR_RW(timestamp0);
 623
 624 static struct attribute *pcf2127_attrs[] = {
 625         &dev_attr_timestamp0.attr,
 626         NULL
 627 };
 628
 629 static const struct attribute_group pcf2127_attr_group = {
 630         .attrs  = pcf2127_attrs,
 631 };
 632
 633 static int pcf2127_probe(struct device *dev, struct regmap *regmap,
 634                          int alarm_irq, const char *name, bool is_pcf2127)
 635 {
 636         struct pcf2127 *pcf2127;
 637         int ret = 0;
 638         unsigned int val;
 639
 640         dev_dbg(dev, "%s\n", __func__);
 641
 642         pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
 643         if (!pcf2127)
 644                 return -ENOMEM;
 645
 646         pcf2127->regmap = regmap;
 647
 648         dev_set_drvdata(dev, pcf2127);
 649
 650         pcf2127->rtc = devm_rtc_allocate_device(dev);
 651         if (IS_ERR(pcf2127->rtc))
 652                 return PTR_ERR(pcf2127->rtc);
 653
 654         pcf2127->rtc->ops = &pcf2127_rtc_ops;
 655         pcf2127->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
 656         pcf2127->rtc->range_max = RTC_TIMESTAMP_END_2099;
 657         pcf2127->rtc->set_start_time = true; /* Sets actual start to 1970 */
 658         pcf2127->rtc->uie_unsupported = 1;
 659         clear_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features);
 660
 661         if (alarm_irq > 0) {
 662                 ret = devm_request_threaded_irq(dev, alarm_irq, NULL,
 663                                                 pcf2127_rtc_irq,
 664                                                 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
 665                                                 dev_name(dev), dev);
 666                 if (ret) {
 667                         dev_err(dev, "failed to request alarm irq\n");
 668                         return ret;
 669                 }
 670                 pcf2127->irq_enabled = true;
 671         }
 672
 673         if (alarm_irq > 0 || device_property_read_bool(dev, "wakeup-source")) {
 674                 device_init_wakeup(dev, true);
 675                 set_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features);
 676         }
 677
 678         if (is_pcf2127) {
 679                 struct nvmem_config nvmem_cfg = {
 680                         .priv = pcf2127,
 681                         .reg_read = pcf2127_nvmem_read,
 682                         .reg_write = pcf2127_nvmem_write,
 683                         .size = 512,
 684                 };
 685
 686                 ret = devm_rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg);
 687         }
 688
 689         /*
 690          * The "Power-On Reset Override" facility prevents the RTC to do a reset
 691          * after power on. For normal operation the PORO must be disabled.
 692          */
 693         regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
 694                                 PCF2127_BIT_CTRL1_POR_OVRD);
 695
 696         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CLKOUT, &val);
 697         if (ret < 0)
 698                 return ret;
 699
 700         if (!(val & PCF2127_BIT_CLKOUT_OTPR)) {
 701                 ret = regmap_set_bits(pcf2127->regmap, PCF2127_REG_CLKOUT,
 702                                       PCF2127_BIT_CLKOUT_OTPR);
 703                 if (ret < 0)
 704                         return ret;
 705
 706                 msleep(100);
 707         }
 708
 709         /*
 710          * Watchdog timer enabled and reset pin /RST activated when timed out.
 711          * Select 1Hz clock source for watchdog timer.
 712          * Note: Countdown timer disabled and not available.
 713          * For pca2129, pcf2129, only bit[7] is for Symbol WD_CD
 714          * of register watchdg_tim_ctl. The bit[6] is labeled
 715          * as T. Bits labeled as T must always be written with
 716          * logic 0.
 717          */
 718         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL,
 719                                  PCF2127_BIT_WD_CTL_CD1 |
 720                                  PCF2127_BIT_WD_CTL_CD0 |
 721                                  PCF2127_BIT_WD_CTL_TF1 |
 722                                  PCF2127_BIT_WD_CTL_TF0,
 723                                  PCF2127_BIT_WD_CTL_CD1 |
 724                                  (is_pcf2127 ? PCF2127_BIT_WD_CTL_CD0 : 0) |
 725                                  PCF2127_BIT_WD_CTL_TF1);
 726         if (ret) {
 727                 dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__);
 728                 return ret;
 729         }
 730
 731         pcf2127_watchdog_init(dev, pcf2127);
 732
 733         /*
 734          * Disable battery low/switch-over timestamp and interrupts.
 735          * Clear battery interrupt flags which can block new trigger events.
 736          * Note: This is the default chip behaviour but added to ensure
 737          * correct tamper timestamp and interrupt function.
 738          */
 739         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
 740                                  PCF2127_BIT_CTRL3_BTSE |
 741                                  PCF2127_BIT_CTRL3_BIE |
 742                                  PCF2127_BIT_CTRL3_BLIE, 0);
 743         if (ret) {
 744                 dev_err(dev, "%s: interrupt config (ctrl3) failed\n",
 745                         __func__);
 746                 return ret;
 747         }
 748
 749         /*
 750          * Enable timestamp function and store timestamp of first trigger
 751          * event until TSF1 and TFS2 interrupt flags are cleared.
 752          */
 753         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL,
 754                                  PCF2127_BIT_TS_CTRL_TSOFF |
 755                                  PCF2127_BIT_TS_CTRL_TSM,
 756                                  PCF2127_BIT_TS_CTRL_TSM);
 757         if (ret) {
 758                 dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n",
 759                         __func__);
 760                 return ret;
 761         }
 762
 763         /*
 764          * Enable interrupt generation when TSF1 or TSF2 timestamp flags
 765          * are set. Interrupt signal is an open-drain output and can be
 766          * left floating if unused.
 767          */
 768         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 769                                  PCF2127_BIT_CTRL2_TSIE,
 770                                  PCF2127_BIT_CTRL2_TSIE);
 771         if (ret) {
 772                 dev_err(dev, "%s: tamper detection config (ctrl2) failed\n",
 773                         __func__);
 774                 return ret;
 775         }
 776
 777         ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group);
 778         if (ret) {
 779                 dev_err(dev, "%s: tamper sysfs registering failed\n",
 780                         __func__);
 781                 return ret;
 782         }
 783
 784         return devm_rtc_register_device(pcf2127->rtc);
 785 }
 786
 787 #ifdef CONFIG_OF
 788 static const struct of_device_id pcf2127_of_match[] = {
 789         { .compatible = "nxp,pcf2127" },
 790         { .compatible = "nxp,pcf2129" },
 791         { .compatible = "nxp,pca2129" },
 792         {}
 793 };
 794 MODULE_DEVICE_TABLE(of, pcf2127_of_match);
 795 #endif
 796
 797 #if IS_ENABLED(CONFIG_I2C)
 798
 799 static int pcf2127_i2c_write(void *context, const void *data, size_t count)
 800 {
 801         struct device *dev = context;
 802         struct i2c_client *client = to_i2c_client(dev);
 803         int ret;
 804
 805         ret = i2c_master_send(client, data, count);
 806         if (ret != count)
 807                 return ret < 0 ? ret : -EIO;
 808
 809         return 0;
 810 }
 811
 812 static int pcf2127_i2c_gather_write(void *context,
 813                                 const void *reg, size_t reg_size,
 814                                 const void *val, size_t val_size)
 815 {
 816         struct device *dev = context;
 817         struct i2c_client *client = to_i2c_client(dev);
 818         int ret;
 819         void *buf;
 820
 821         if (WARN_ON(reg_size != 1))
 822                 return -EINVAL;
 823
 824         buf = kmalloc(val_size + 1, GFP_KERNEL);
 825         if (!buf)
 826                 return -ENOMEM;
 827
 828         memcpy(buf, reg, 1);
 829         memcpy(buf + 1, val, val_size);
 830
 831         ret = i2c_master_send(client, buf, val_size + 1);
 832
 833         kfree(buf);
 834
 835         if (ret != val_size + 1)
 836                 return ret < 0 ? ret : -EIO;
 837
 838         return 0;
 839 }
 840
 841 static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size,
 842                                 void *val, size_t val_size)
 843 {
 844         struct device *dev = context;
 845         struct i2c_client *client = to_i2c_client(dev);
 846         int ret;
 847
 848         if (WARN_ON(reg_size != 1))
 849                 return -EINVAL;
 850
 851         ret = i2c_master_send(client, reg, 1);
 852         if (ret != 1)
 853                 return ret < 0 ? ret : -EIO;
 854
 855         ret = i2c_master_recv(client, val, val_size);
 856         if (ret != val_size)
 857                 return ret < 0 ? ret : -EIO;
 858
 859         return 0;
 860 }
 861
 862 /*
 863  * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
 864  * is that the STOP condition is required between set register address and
 865  * read register data when reading from registers.
 866  */
 867 static const struct regmap_bus pcf2127_i2c_regmap = {
 868         .write = pcf2127_i2c_write,
 869         .gather_write = pcf2127_i2c_gather_write,
 870         .read = pcf2127_i2c_read,
 871 };
 872
 873 static struct i2c_driver pcf2127_i2c_driver;
 874
 875 static int pcf2127_i2c_probe(struct i2c_client *client,
 876                                 const struct i2c_device_id *id)
 877 {
 878         struct regmap *regmap;
 879         static const struct regmap_config config = {
 880                 .reg_bits = 8,
 881                 .val_bits = 8,
 882                 .max_register = 0x1d,
 883         };
 884
 885         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 886                 return -ENODEV;
 887
 888         regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap,
 889                                         &client->dev, &config);
 890         if (IS_ERR(regmap)) {
 891                 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
 892                         __func__, PTR_ERR(regmap));
 893                 return PTR_ERR(regmap);
 894         }
 895
 896         return pcf2127_probe(&client->dev, regmap, client->irq,
 897                              pcf2127_i2c_driver.driver.name, id->driver_data);
 898 }
 899
 900 static const struct i2c_device_id pcf2127_i2c_id[] = {
 901         { "pcf2127", 1 },
 902         { "pcf2129", 0 },
 903         { "pca2129", 0 },
 904         { }
 905 };
 906 MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id);
 907
 908 static struct i2c_driver pcf2127_i2c_driver = {
 909         .driver         = {
 910                 .name   = "rtc-pcf2127-i2c",
 911                 .of_match_table = of_match_ptr(pcf2127_of_match),
 912         },
 913         .probe          = pcf2127_i2c_probe,
 914         .id_table       = pcf2127_i2c_id,
 915 };
 916
 917 static int pcf2127_i2c_register_driver(void)
 918 {
 919         return i2c_add_driver(&pcf2127_i2c_driver);
 920 }
 921
 922 static void pcf2127_i2c_unregister_driver(void)
 923 {
 924         i2c_del_driver(&pcf2127_i2c_driver);
 925 }
 926
 927 #else
 928
 929 static int pcf2127_i2c_register_driver(void)
 930 {
 931         return 0;
 932 }
 933
 934 static void pcf2127_i2c_unregister_driver(void)
 935 {
 936 }
 937
 938 #endif
 939
 940 #if IS_ENABLED(CONFIG_SPI_MASTER)
 941
 942 static struct spi_driver pcf2127_spi_driver;
 943
 944 static int pcf2127_spi_probe(struct spi_device *spi)
 945 {
 946         static const struct regmap_config config = {
 947                 .reg_bits = 8,
 948                 .val_bits = 8,
 949                 .read_flag_mask = 0xa0,
 950                 .write_flag_mask = 0x20,
 951                 .max_register = 0x1d,
 952         };
 953         struct regmap *regmap;
 954
 955         regmap = devm_regmap_init_spi(spi, &config);
 956         if (IS_ERR(regmap)) {
 957                 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
 958                         __func__, PTR_ERR(regmap));
 959                 return PTR_ERR(regmap);
 960         }
 961
 962         return pcf2127_probe(&spi->dev, regmap, spi->irq,
 963                              pcf2127_spi_driver.driver.name,
 964                              spi_get_device_id(spi)->driver_data);
 965 }
 966
 967 static const struct spi_device_id pcf2127_spi_id[] = {
 968         { "pcf2127", 1 },
 969         { "pcf2129", 0 },
 970         { "pca2129", 0 },
 971         { }
 972 };
 973 MODULE_DEVICE_TABLE(spi, pcf2127_spi_id);
 974
 975 static struct spi_driver pcf2127_spi_driver = {
 976         .driver         = {
 977                 .name   = "rtc-pcf2127-spi",
 978                 .of_match_table = of_match_ptr(pcf2127_of_match),
 979         },
 980         .probe          = pcf2127_spi_probe,
 981         .id_table       = pcf2127_spi_id,
 982 };
 983
 984 static int pcf2127_spi_register_driver(void)
 985 {
 986         return spi_register_driver(&pcf2127_spi_driver);
 987 }
 988
 989 static void pcf2127_spi_unregister_driver(void)
 990 {
 991         spi_unregister_driver(&pcf2127_spi_driver);
 992 }
 993
 994 #else
 995
 996 static int pcf2127_spi_register_driver(void)
 997 {
 998         return 0;
 999 }
1000
1001 static void pcf2127_spi_unregister_driver(void)
1002 {
1003 }
1004
1005 #endif
1006
1007 static int __init pcf2127_init(void)
1008 {
1009         int ret;
1010
1011         ret = pcf2127_i2c_register_driver();
1012         if (ret) {
1013                 pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
1014                 return ret;
1015         }
1016
1017         ret = pcf2127_spi_register_driver();
1018         if (ret) {
1019                 pr_err("Failed to register pcf2127 spi driver: %d\n", ret);
1020                 pcf2127_i2c_unregister_driver();
1021         }
1022
1023         return ret;
1024 }
1025 module_init(pcf2127_init)
1026
1027 static void __exit pcf2127_exit(void)
1028 {
1029         pcf2127_spi_unregister_driver();
1030         pcf2127_i2c_unregister_driver();
1031 }
1032 module_exit(pcf2127_exit)
1033
1034 MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
1035 MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
1036 MODULE_LICENSE("GPL v2");