1 // SPDX-License-Identifier: GPL-2.0-only
3 * An I2C and SPI driver for the NXP PCF2127/29 RTC
4 * Copyright 2013 Til-Technologies
6 * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
8 * Watchdog and tamper functions
9 * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
11 * based on the other drivers in this same directory.
13 * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf
16 #include <linux/i2c.h>
17 #include <linux/spi/spi.h>
18 #include <linux/bcd.h>
19 #include <linux/rtc.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
23 #include <linux/regmap.h>
24 #include <linux/watchdog.h>
26 /* Control register 1 */
27 #define PCF2127_REG_CTRL1 0x00
28 #define PCF2127_BIT_CTRL1_TSF1 BIT(4)
29 /* Control register 2 */
30 #define PCF2127_REG_CTRL2 0x01
31 #define PCF2127_BIT_CTRL2_TSIE BIT(2)
32 #define PCF2127_BIT_CTRL2_TSF2 BIT(5)
33 /* Control register 3 */
34 #define PCF2127_REG_CTRL3 0x02
35 #define PCF2127_BIT_CTRL3_BLIE BIT(0)
36 #define PCF2127_BIT_CTRL3_BIE BIT(1)
37 #define PCF2127_BIT_CTRL3_BLF BIT(2)
38 #define PCF2127_BIT_CTRL3_BF BIT(3)
39 #define PCF2127_BIT_CTRL3_BTSE BIT(4)
40 /* Time and date registers */
41 #define PCF2127_REG_SC 0x03
42 #define PCF2127_BIT_SC_OSF BIT(7)
43 #define PCF2127_REG_MN 0x04
44 #define PCF2127_REG_HR 0x05
45 #define PCF2127_REG_DM 0x06
46 #define PCF2127_REG_DW 0x07
47 #define PCF2127_REG_MO 0x08
48 #define PCF2127_REG_YR 0x09
49 /* Watchdog registers */
50 #define PCF2127_REG_WD_CTL 0x10
51 #define PCF2127_BIT_WD_CTL_TF0 BIT(0)
52 #define PCF2127_BIT_WD_CTL_TF1 BIT(1)
53 #define PCF2127_BIT_WD_CTL_CD0 BIT(6)
54 #define PCF2127_BIT_WD_CTL_CD1 BIT(7)
55 #define PCF2127_REG_WD_VAL 0x11
56 /* Tamper timestamp registers */
57 #define PCF2127_REG_TS_CTRL 0x12
58 #define PCF2127_BIT_TS_CTRL_TSOFF BIT(6)
59 #define PCF2127_BIT_TS_CTRL_TSM BIT(7)
60 #define PCF2127_REG_TS_SC 0x13
61 #define PCF2127_REG_TS_MN 0x14
62 #define PCF2127_REG_TS_HR 0x15
63 #define PCF2127_REG_TS_DM 0x16
64 #define PCF2127_REG_TS_MO 0x17
65 #define PCF2127_REG_TS_YR 0x18
68 * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is
69 * battery backed and can survive a power outage.
70 * PCF2129 doesn't have this feature.
72 #define PCF2127_REG_RAM_ADDR_MSB 0x1A
73 #define PCF2127_REG_RAM_WRT_CMD 0x1C
74 #define PCF2127_REG_RAM_RD_CMD 0x1D
76 /* Watchdog timer value constants */
77 #define PCF2127_WD_VAL_STOP 0
78 #define PCF2127_WD_VAL_MIN 2
79 #define PCF2127_WD_VAL_MAX 255
80 #define PCF2127_WD_VAL_DEFAULT 60
83 struct rtc_device *rtc;
84 struct watchdog_device wdd;
85 struct regmap *regmap;
89 * In the routines that deal directly with the pcf2127 hardware, we use
90 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
92 static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
94 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
95 unsigned char buf[10];
99 * Avoid reading CTRL2 register as it causes WD_VAL register
100 * value to reset to 0 which means watchdog is stopped.
102 ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3,
103 (buf + PCF2127_REG_CTRL3),
104 ARRAY_SIZE(buf) - PCF2127_REG_CTRL3);
106 dev_err(dev, "%s: read error\n", __func__);
110 if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF)
112 "low voltage detected, check/replace RTC battery.\n");
114 /* Clock integrity is not guaranteed when OSF flag is set. */
115 if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) {
117 * no need clear the flag here,
118 * it will be cleared once the new date is saved
121 "oscillator stop detected, date/time is not reliable\n");
126 "%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, "
127 "mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
128 __func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC],
129 buf[PCF2127_REG_MN], buf[PCF2127_REG_HR],
130 buf[PCF2127_REG_DM], buf[PCF2127_REG_DW],
131 buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]);
133 tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F);
134 tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F);
135 tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F); /* rtc hr 0-23 */
136 tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F);
137 tm->tm_wday = buf[PCF2127_REG_DW] & 0x07;
138 tm->tm_mon = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
139 tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]);
142 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
143 "mday=%d, mon=%d, year=%d, wday=%d\n",
145 tm->tm_sec, tm->tm_min, tm->tm_hour,
146 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
151 static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
153 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
154 unsigned char buf[7];
157 dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
158 "mday=%d, mon=%d, year=%d, wday=%d\n",
160 tm->tm_sec, tm->tm_min, tm->tm_hour,
161 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
163 /* hours, minutes and seconds */
164 buf[i++] = bin2bcd(tm->tm_sec); /* this will also clear OSF flag */
165 buf[i++] = bin2bcd(tm->tm_min);
166 buf[i++] = bin2bcd(tm->tm_hour);
167 buf[i++] = bin2bcd(tm->tm_mday);
168 buf[i++] = tm->tm_wday & 0x07;
171 buf[i++] = bin2bcd(tm->tm_mon + 1);
174 buf[i++] = bin2bcd(tm->tm_year - 100);
176 /* write register's data */
177 err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i);
180 "%s: err=%d", __func__, err);
187 static int pcf2127_rtc_ioctl(struct device *dev,
188 unsigned int cmd, unsigned long arg)
190 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
196 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &val);
200 if (val & PCF2127_BIT_CTRL3_BLF)
201 touser |= RTC_VL_BACKUP_LOW;
203 if (val & PCF2127_BIT_CTRL3_BF)
204 touser |= RTC_VL_BACKUP_SWITCH;
206 return put_user(touser, (unsigned int __user *)arg);
209 return regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
210 PCF2127_BIT_CTRL3_BF, 0);
217 static const struct rtc_class_ops pcf2127_rtc_ops = {
218 .ioctl = pcf2127_rtc_ioctl,
219 .read_time = pcf2127_rtc_read_time,
220 .set_time = pcf2127_rtc_set_time,
223 static int pcf2127_nvmem_read(void *priv, unsigned int offset,
224 void *val, size_t bytes)
226 struct pcf2127 *pcf2127 = priv;
228 unsigned char offsetbuf[] = { offset >> 8, offset };
230 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
235 ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD,
241 static int pcf2127_nvmem_write(void *priv, unsigned int offset,
242 void *val, size_t bytes)
244 struct pcf2127 *pcf2127 = priv;
246 unsigned char offsetbuf[] = { offset >> 8, offset };
248 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
253 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD,
259 /* watchdog driver */
261 static int pcf2127_wdt_ping(struct watchdog_device *wdd)
263 struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
265 return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout);
269 * Restart watchdog timer if feature is active.
271 * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate,
272 * since register also contain control/status flags for other features.
273 * Always call this function after reading CTRL2 register.
275 static int pcf2127_wdt_active_ping(struct watchdog_device *wdd)
279 if (watchdog_active(wdd)) {
280 ret = pcf2127_wdt_ping(wdd);
283 "%s: watchdog restart failed, ret=%d\n",
290 static int pcf2127_wdt_start(struct watchdog_device *wdd)
292 return pcf2127_wdt_ping(wdd);
295 static int pcf2127_wdt_stop(struct watchdog_device *wdd)
297 struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
299 return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL,
300 PCF2127_WD_VAL_STOP);
303 static int pcf2127_wdt_set_timeout(struct watchdog_device *wdd,
304 unsigned int new_timeout)
306 dev_dbg(wdd->parent, "new watchdog timeout: %is (old: %is)\n",
307 new_timeout, wdd->timeout);
309 wdd->timeout = new_timeout;
311 return pcf2127_wdt_active_ping(wdd);
314 static const struct watchdog_info pcf2127_wdt_info = {
315 .identity = "NXP PCF2127/PCF2129 Watchdog",
316 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
319 static const struct watchdog_ops pcf2127_watchdog_ops = {
320 .owner = THIS_MODULE,
321 .start = pcf2127_wdt_start,
322 .stop = pcf2127_wdt_stop,
323 .ping = pcf2127_wdt_ping,
324 .set_timeout = pcf2127_wdt_set_timeout,
327 /* sysfs interface */
329 static ssize_t timestamp0_store(struct device *dev,
330 struct device_attribute *attr,
331 const char *buf, size_t count)
333 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
336 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
337 PCF2127_BIT_CTRL1_TSF1, 0);
339 dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret);
343 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
344 PCF2127_BIT_CTRL2_TSF2, 0);
346 dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret);
350 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
357 static ssize_t timestamp0_show(struct device *dev,
358 struct device_attribute *attr, char *buf)
360 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
363 unsigned char data[25];
365 ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data,
368 dev_err(dev, "%s: read error ret=%d\n", __func__, ret);
373 "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, "
374 "ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n",
375 __func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2],
376 data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC],
377 data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR],
378 data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO],
379 data[PCF2127_REG_TS_YR]);
381 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
385 if (!(data[PCF2127_REG_CTRL1] & PCF2127_BIT_CTRL1_TSF1) &&
386 !(data[PCF2127_REG_CTRL2] & PCF2127_BIT_CTRL2_TSF2))
389 tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F);
390 tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F);
391 tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F);
392 tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F);
393 /* TS_MO register (month) value range: 1-12 */
394 tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1;
395 tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]);
397 tm.tm_year += 100; /* assume we are in 1970...2069 */
399 ret = rtc_valid_tm(&tm);
403 return sprintf(buf, "%llu\n",
404 (unsigned long long)rtc_tm_to_time64(&tm));
407 static DEVICE_ATTR_RW(timestamp0);
409 static struct attribute *pcf2127_attrs[] = {
410 &dev_attr_timestamp0.attr,
414 static const struct attribute_group pcf2127_attr_group = {
415 .attrs = pcf2127_attrs,
418 static int pcf2127_probe(struct device *dev, struct regmap *regmap,
419 const char *name, bool has_nvmem)
421 struct pcf2127 *pcf2127;
425 dev_dbg(dev, "%s\n", __func__);
427 pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
431 pcf2127->regmap = regmap;
433 dev_set_drvdata(dev, pcf2127);
435 pcf2127->rtc = devm_rtc_allocate_device(dev);
436 if (IS_ERR(pcf2127->rtc))
437 return PTR_ERR(pcf2127->rtc);
439 pcf2127->rtc->ops = &pcf2127_rtc_ops;
440 pcf2127->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
441 pcf2127->rtc->range_max = RTC_TIMESTAMP_END_2099;
442 pcf2127->rtc->set_start_time = true; /* Sets actual start to 1970 */
444 pcf2127->wdd.parent = dev;
445 pcf2127->wdd.info = &pcf2127_wdt_info;
446 pcf2127->wdd.ops = &pcf2127_watchdog_ops;
447 pcf2127->wdd.min_timeout = PCF2127_WD_VAL_MIN;
448 pcf2127->wdd.max_timeout = PCF2127_WD_VAL_MAX;
449 pcf2127->wdd.timeout = PCF2127_WD_VAL_DEFAULT;
450 pcf2127->wdd.min_hw_heartbeat_ms = 500;
451 pcf2127->wdd.status = WATCHDOG_NOWAYOUT_INIT_STATUS;
453 watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
456 struct nvmem_config nvmem_cfg = {
458 .reg_read = pcf2127_nvmem_read,
459 .reg_write = pcf2127_nvmem_write,
463 ret = rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg);
467 * Watchdog timer enabled and reset pin /RST activated when timed out.
468 * Select 1Hz clock source for watchdog timer.
469 * Note: Countdown timer disabled and not available.
471 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL,
472 PCF2127_BIT_WD_CTL_CD1 |
473 PCF2127_BIT_WD_CTL_CD0 |
474 PCF2127_BIT_WD_CTL_TF1 |
475 PCF2127_BIT_WD_CTL_TF0,
476 PCF2127_BIT_WD_CTL_CD1 |
477 PCF2127_BIT_WD_CTL_CD0 |
478 PCF2127_BIT_WD_CTL_TF1);
480 dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__);
484 /* Test if watchdog timer is started by bootloader */
485 ret = regmap_read(pcf2127->regmap, PCF2127_REG_WD_VAL, &wdd_timeout);
490 set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status);
492 #ifdef CONFIG_WATCHDOG
493 ret = devm_watchdog_register_device(dev, &pcf2127->wdd);
496 #endif /* CONFIG_WATCHDOG */
499 * Disable battery low/switch-over timestamp and interrupts.
500 * Clear battery interrupt flags which can block new trigger events.
501 * Note: This is the default chip behaviour but added to ensure
502 * correct tamper timestamp and interrupt function.
504 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
505 PCF2127_BIT_CTRL3_BTSE |
506 PCF2127_BIT_CTRL3_BIE |
507 PCF2127_BIT_CTRL3_BLIE, 0);
509 dev_err(dev, "%s: interrupt config (ctrl3) failed\n",
515 * Enable timestamp function and store timestamp of first trigger
516 * event until TSF1 and TFS2 interrupt flags are cleared.
518 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL,
519 PCF2127_BIT_TS_CTRL_TSOFF |
520 PCF2127_BIT_TS_CTRL_TSM,
521 PCF2127_BIT_TS_CTRL_TSM);
523 dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n",
529 * Enable interrupt generation when TSF1 or TSF2 timestamp flags
530 * are set. Interrupt signal is an open-drain output and can be
531 * left floating if unused.
533 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
534 PCF2127_BIT_CTRL2_TSIE,
535 PCF2127_BIT_CTRL2_TSIE);
537 dev_err(dev, "%s: tamper detection config (ctrl2) failed\n",
542 ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group);
544 dev_err(dev, "%s: tamper sysfs registering failed\n",
549 return rtc_register_device(pcf2127->rtc);
553 static const struct of_device_id pcf2127_of_match[] = {
554 { .compatible = "nxp,pcf2127" },
555 { .compatible = "nxp,pcf2129" },
558 MODULE_DEVICE_TABLE(of, pcf2127_of_match);
561 #if IS_ENABLED(CONFIG_I2C)
563 static int pcf2127_i2c_write(void *context, const void *data, size_t count)
565 struct device *dev = context;
566 struct i2c_client *client = to_i2c_client(dev);
569 ret = i2c_master_send(client, data, count);
571 return ret < 0 ? ret : -EIO;
576 static int pcf2127_i2c_gather_write(void *context,
577 const void *reg, size_t reg_size,
578 const void *val, size_t val_size)
580 struct device *dev = context;
581 struct i2c_client *client = to_i2c_client(dev);
585 if (WARN_ON(reg_size != 1))
588 buf = kmalloc(val_size + 1, GFP_KERNEL);
593 memcpy(buf + 1, val, val_size);
595 ret = i2c_master_send(client, buf, val_size + 1);
599 if (ret != val_size + 1)
600 return ret < 0 ? ret : -EIO;
605 static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size,
606 void *val, size_t val_size)
608 struct device *dev = context;
609 struct i2c_client *client = to_i2c_client(dev);
612 if (WARN_ON(reg_size != 1))
615 ret = i2c_master_send(client, reg, 1);
617 return ret < 0 ? ret : -EIO;
619 ret = i2c_master_recv(client, val, val_size);
621 return ret < 0 ? ret : -EIO;
627 * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
628 * is that the STOP condition is required between set register address and
629 * read register data when reading from registers.
631 static const struct regmap_bus pcf2127_i2c_regmap = {
632 .write = pcf2127_i2c_write,
633 .gather_write = pcf2127_i2c_gather_write,
634 .read = pcf2127_i2c_read,
637 static struct i2c_driver pcf2127_i2c_driver;
639 static int pcf2127_i2c_probe(struct i2c_client *client,
640 const struct i2c_device_id *id)
642 struct regmap *regmap;
643 static const struct regmap_config config = {
646 .max_register = 0x1d,
649 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
652 regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap,
653 &client->dev, &config);
654 if (IS_ERR(regmap)) {
655 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
656 __func__, PTR_ERR(regmap));
657 return PTR_ERR(regmap);
660 return pcf2127_probe(&client->dev, regmap,
661 pcf2127_i2c_driver.driver.name, id->driver_data);
664 static const struct i2c_device_id pcf2127_i2c_id[] = {
669 MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id);
671 static struct i2c_driver pcf2127_i2c_driver = {
673 .name = "rtc-pcf2127-i2c",
674 .of_match_table = of_match_ptr(pcf2127_of_match),
676 .probe = pcf2127_i2c_probe,
677 .id_table = pcf2127_i2c_id,
680 static int pcf2127_i2c_register_driver(void)
682 return i2c_add_driver(&pcf2127_i2c_driver);
685 static void pcf2127_i2c_unregister_driver(void)
687 i2c_del_driver(&pcf2127_i2c_driver);
692 static int pcf2127_i2c_register_driver(void)
697 static void pcf2127_i2c_unregister_driver(void)
703 #if IS_ENABLED(CONFIG_SPI_MASTER)
705 static struct spi_driver pcf2127_spi_driver;
707 static int pcf2127_spi_probe(struct spi_device *spi)
709 static const struct regmap_config config = {
712 .read_flag_mask = 0xa0,
713 .write_flag_mask = 0x20,
714 .max_register = 0x1d,
716 struct regmap *regmap;
718 regmap = devm_regmap_init_spi(spi, &config);
719 if (IS_ERR(regmap)) {
720 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
721 __func__, PTR_ERR(regmap));
722 return PTR_ERR(regmap);
725 return pcf2127_probe(&spi->dev, regmap, pcf2127_spi_driver.driver.name,
726 spi_get_device_id(spi)->driver_data);
729 static const struct spi_device_id pcf2127_spi_id[] = {
734 MODULE_DEVICE_TABLE(spi, pcf2127_spi_id);
736 static struct spi_driver pcf2127_spi_driver = {
738 .name = "rtc-pcf2127-spi",
739 .of_match_table = of_match_ptr(pcf2127_of_match),
741 .probe = pcf2127_spi_probe,
742 .id_table = pcf2127_spi_id,
745 static int pcf2127_spi_register_driver(void)
747 return spi_register_driver(&pcf2127_spi_driver);
750 static void pcf2127_spi_unregister_driver(void)
752 spi_unregister_driver(&pcf2127_spi_driver);
757 static int pcf2127_spi_register_driver(void)
762 static void pcf2127_spi_unregister_driver(void)
768 static int __init pcf2127_init(void)
772 ret = pcf2127_i2c_register_driver();
774 pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
778 ret = pcf2127_spi_register_driver();
780 pr_err("Failed to register pcf2127 spi driver: %d\n", ret);
781 pcf2127_i2c_unregister_driver();
786 module_init(pcf2127_init)
788 static void __exit pcf2127_exit(void)
790 pcf2127_spi_unregister_driver();
791 pcf2127_i2c_unregister_driver();
793 module_exit(pcf2127_exit)
795 MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
796 MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
797 MODULE_LICENSE("GPL v2");