1 // SPDX-License-Identifier: GPL-2.0+
3 * Freescale FlexTimer Module (FTM) alarm device driver.
5 * Copyright 2014 Freescale Semiconductor, Inc.
6 * Copyright 2019-2020 NXP
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/interrupt.h>
14 #include <linux/of_address.h>
15 #include <linux/of_irq.h>
16 #include <linux/platform_device.h>
18 #include <linux/of_device.h>
19 #include <linux/module.h>
20 #include <linux/fsl/ftm.h>
21 #include <linux/rtc.h>
22 #include <linux/time.h>
23 #include <linux/acpi.h>
24 #include <linux/pm_wakeirq.h>
26 #define FTM_SC_CLK(c) ((c) << FTM_SC_CLK_MASK_SHIFT)
29 * Select Fixed frequency clock (32KHz) as clock source
32 #define FTM_SC_CLKS_FIXED_FREQ 0x02
33 #define FIXED_FREQ_CLK 32000
35 /* Select 128 (2^7) as divider factor */
36 #define MAX_FREQ_DIV (1 << FTM_SC_PS_MASK)
38 /* Maximum counter value in FlexTimer's CNT registers */
39 #define MAX_COUNT_VAL 0xffff
42 struct rtc_device *rtc_dev;
48 static inline u32 rtc_readl(struct ftm_rtc *dev, u32 reg)
51 return ioread32be(dev->base + reg);
53 return ioread32(dev->base + reg);
56 static inline void rtc_writel(struct ftm_rtc *dev, u32 reg, u32 val)
59 iowrite32be(val, dev->base + reg);
61 iowrite32(val, dev->base + reg);
64 static inline void ftm_counter_enable(struct ftm_rtc *rtc)
68 /* select and enable counter clock source */
69 val = rtc_readl(rtc, FTM_SC);
70 val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
71 val |= (FTM_SC_PS_MASK | FTM_SC_CLK(FTM_SC_CLKS_FIXED_FREQ));
72 rtc_writel(rtc, FTM_SC, val);
75 static inline void ftm_counter_disable(struct ftm_rtc *rtc)
79 /* disable counter clock source */
80 val = rtc_readl(rtc, FTM_SC);
81 val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
82 rtc_writel(rtc, FTM_SC, val);
85 static inline void ftm_irq_acknowledge(struct ftm_rtc *rtc)
87 unsigned int timeout = 100;
90 *Fix errata A-007728 for flextimer
91 * If the FTM counter reaches the FTM_MOD value between
92 * the reading of the TOF bit and the writing of 0 to
93 * the TOF bit, the process of clearing the TOF bit
94 * does not work as expected when FTMx_CONF[NUMTOF] != 0
95 * and the current TOF count is less than FTMx_CONF[NUMTOF].
96 * If the above condition is met, the TOF bit remains set.
97 * If the TOF interrupt is enabled (FTMx_SC[TOIE] = 1),the
98 * TOF interrupt also remains asserted.
100 * Above is the errata discription
102 * In one word: software clearing TOF bit not works when
103 * FTMx_CONF[NUMTOF] was seted as nonzero and FTM counter
104 * reaches the FTM_MOD value.
106 * The workaround is clearing TOF bit until it works
107 * (FTM counter doesn't always reache the FTM_MOD anyway),
108 * which may cost some cycles.
110 while ((FTM_SC_TOF & rtc_readl(rtc, FTM_SC)) && timeout--)
111 rtc_writel(rtc, FTM_SC, rtc_readl(rtc, FTM_SC) & (~FTM_SC_TOF));
114 static inline void ftm_irq_enable(struct ftm_rtc *rtc)
118 val = rtc_readl(rtc, FTM_SC);
120 rtc_writel(rtc, FTM_SC, val);
123 static inline void ftm_irq_disable(struct ftm_rtc *rtc)
127 val = rtc_readl(rtc, FTM_SC);
129 rtc_writel(rtc, FTM_SC, val);
132 static inline void ftm_reset_counter(struct ftm_rtc *rtc)
135 * The CNT register contains the FTM counter value.
136 * Reset clears the CNT register. Writing any value to COUNT
137 * updates the counter with its initial value, CNTIN.
139 rtc_writel(rtc, FTM_CNT, 0x00);
142 static void ftm_clean_alarm(struct ftm_rtc *rtc)
144 ftm_counter_disable(rtc);
146 rtc_writel(rtc, FTM_CNTIN, 0x00);
147 rtc_writel(rtc, FTM_MOD, ~0U);
149 ftm_reset_counter(rtc);
152 static irqreturn_t ftm_rtc_alarm_interrupt(int irq, void *dev)
154 struct ftm_rtc *rtc = dev;
156 rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
158 ftm_irq_acknowledge(rtc);
159 ftm_irq_disable(rtc);
160 ftm_clean_alarm(rtc);
165 static int ftm_rtc_alarm_irq_enable(struct device *dev,
166 unsigned int enabled)
168 struct ftm_rtc *rtc = dev_get_drvdata(dev);
173 ftm_irq_disable(rtc);
180 * The function is not really getting time from the RTC
181 * since FlexTimer is not a RTC device, but we need to
182 * get time to setup alarm, so we are using system time
185 static int ftm_rtc_read_time(struct device *dev, struct rtc_time *tm)
187 rtc_time64_to_tm(ktime_get_real_seconds(), tm);
192 static int ftm_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
198 * 1. Select fixed frequency clock (32KHz) as clock source;
199 * 2. Select 128 (2^7) as divider factor;
200 * So clock is 250 Hz (32KHz/128).
202 * 3. FlexTimer's CNT register is a 32bit register,
203 * but the register's 16 bit as counter value,it's other 16 bit
204 * is reserved.So minimum counter value is 0x0,maximum counter
206 * So max alarm value is 262 (65536 / 250) seconds
208 static int ftm_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
211 unsigned long long cycle;
212 struct ftm_rtc *rtc = dev_get_drvdata(dev);
214 alm_time = rtc_tm_to_time64(&alm->time);
216 ftm_clean_alarm(rtc);
217 cycle = (alm_time - ktime_get_real_seconds()) * rtc->alarm_freq;
218 if (cycle > MAX_COUNT_VAL) {
219 pr_err("Out of alarm range {0~262} seconds.\n");
223 ftm_irq_disable(rtc);
226 * The counter increments until the value of MOD is reached,
227 * at which point the counter is reloaded with the value of CNTIN.
228 * The TOF (the overflow flag) bit is set when the FTM counter
229 * changes from MOD to CNTIN. So we should using the cycle - 1.
231 rtc_writel(rtc, FTM_MOD, cycle - 1);
233 ftm_counter_enable(rtc);
240 static const struct rtc_class_ops ftm_rtc_ops = {
241 .read_time = ftm_rtc_read_time,
242 .read_alarm = ftm_rtc_read_alarm,
243 .set_alarm = ftm_rtc_set_alarm,
244 .alarm_irq_enable = ftm_rtc_alarm_irq_enable,
247 static int ftm_rtc_probe(struct platform_device *pdev)
253 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
254 if (unlikely(!rtc)) {
255 dev_err(&pdev->dev, "cannot alloc memory for rtc\n");
259 platform_set_drvdata(pdev, rtc);
261 rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
262 if (IS_ERR(rtc->rtc_dev))
263 return PTR_ERR(rtc->rtc_dev);
265 rtc->base = devm_platform_ioremap_resource(pdev, 0);
266 if (IS_ERR(rtc->base)) {
267 dev_err(&pdev->dev, "cannot ioremap resource for rtc\n");
268 return PTR_ERR(rtc->base);
271 irq = platform_get_irq(pdev, 0);
275 ret = devm_request_irq(&pdev->dev, irq, ftm_rtc_alarm_interrupt,
276 0, dev_name(&pdev->dev), rtc);
278 dev_err(&pdev->dev, "failed to request irq\n");
283 device_property_read_bool(&pdev->dev, "big-endian");
285 rtc->alarm_freq = (u32)FIXED_FREQ_CLK / (u32)MAX_FREQ_DIV;
286 rtc->rtc_dev->ops = &ftm_rtc_ops;
288 device_init_wakeup(&pdev->dev, true);
289 ret = dev_pm_set_wake_irq(&pdev->dev, irq);
291 dev_err(&pdev->dev, "failed to enable irq wake\n");
293 ret = rtc_register_device(rtc->rtc_dev);
295 dev_err(&pdev->dev, "can't register rtc device\n");
302 static const struct of_device_id ftm_rtc_match[] = {
303 { .compatible = "fsl,ls1012a-ftm-alarm", },
304 { .compatible = "fsl,ls1021a-ftm-alarm", },
305 { .compatible = "fsl,ls1028a-ftm-alarm", },
306 { .compatible = "fsl,ls1043a-ftm-alarm", },
307 { .compatible = "fsl,ls1046a-ftm-alarm", },
308 { .compatible = "fsl,ls1088a-ftm-alarm", },
309 { .compatible = "fsl,ls208xa-ftm-alarm", },
310 { .compatible = "fsl,lx2160a-ftm-alarm", },
314 static const struct acpi_device_id ftm_imx_acpi_ids[] = {
318 MODULE_DEVICE_TABLE(acpi, ftm_imx_acpi_ids);
320 static struct platform_driver ftm_rtc_driver = {
321 .probe = ftm_rtc_probe,
324 .of_match_table = ftm_rtc_match,
325 .acpi_match_table = ACPI_PTR(ftm_imx_acpi_ids),
329 static int __init ftm_alarm_init(void)
331 return platform_driver_register(&ftm_rtc_driver);
334 device_initcall(ftm_alarm_init);
336 MODULE_DESCRIPTION("NXP/Freescale FlexTimer alarm driver");
337 MODULE_AUTHOR("Biwen Li <biwen.li@nxp.com>");
338 MODULE_LICENSE("GPL");