Linux 6.9-rc1
[linux-2.6-microblaze.git] / drivers / rtc / rtc-cmos.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * RTC class driver for "CMOS RTC":  PCs, ACPI, etc
4  *
5  * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
6  * Copyright (C) 2006 David Brownell (convert to new framework)
7  */
8
9 /*
10  * The original "cmos clock" chip was an MC146818 chip, now obsolete.
11  * That defined the register interface now provided by all PCs, some
12  * non-PC systems, and incorporated into ACPI.  Modern PC chipsets
13  * integrate an MC146818 clone in their southbridge, and boards use
14  * that instead of discrete clones like the DS12887 or M48T86.  There
15  * are also clones that connect using the LPC bus.
16  *
17  * That register API is also used directly by various other drivers
18  * (notably for integrated NVRAM), infrastructure (x86 has code to
19  * bypass the RTC framework, directly reading the RTC during boot
20  * and updating minutes/seconds for systems using NTP synch) and
21  * utilities (like userspace 'hwclock', if no /dev node exists).
22  *
23  * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
24  * interrupts disabled, holding the global rtc_lock, to exclude those
25  * other drivers and utilities on correctly configured systems.
26  */
27
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/interrupt.h>
34 #include <linux/spinlock.h>
35 #include <linux/platform_device.h>
36 #include <linux/log2.h>
37 #include <linux/pm.h>
38 #include <linux/of.h>
39 #include <linux/of_platform.h>
40 #ifdef CONFIG_X86
41 #include <asm/i8259.h>
42 #include <asm/processor.h>
43 #include <linux/dmi.h>
44 #endif
45
46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47 #include <linux/mc146818rtc.h>
48
49 #ifdef CONFIG_ACPI
50 /*
51  * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
52  *
53  * If cleared, ACPI SCI is only used to wake up the system from suspend
54  *
55  * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
56  */
57
58 static bool use_acpi_alarm;
59 module_param(use_acpi_alarm, bool, 0444);
60
61 static inline int cmos_use_acpi_alarm(void)
62 {
63         return use_acpi_alarm;
64 }
65 #else /* !CONFIG_ACPI */
66
67 static inline int cmos_use_acpi_alarm(void)
68 {
69         return 0;
70 }
71 #endif
72
73 struct cmos_rtc {
74         struct rtc_device       *rtc;
75         struct device           *dev;
76         int                     irq;
77         struct resource         *iomem;
78         time64_t                alarm_expires;
79
80         void                    (*wake_on)(struct device *);
81         void                    (*wake_off)(struct device *);
82
83         u8                      enabled_wake;
84         u8                      suspend_ctrl;
85
86         /* newer hardware extends the original register set */
87         u8                      day_alrm;
88         u8                      mon_alrm;
89         u8                      century;
90
91         struct rtc_wkalrm       saved_wkalrm;
92 };
93
94 /* both platform and pnp busses use negative numbers for invalid irqs */
95 #define is_valid_irq(n)         ((n) > 0)
96
97 static const char driver_name[] = "rtc_cmos";
98
99 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
100  * always mask it against the irq enable bits in RTC_CONTROL.  Bit values
101  * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
102  */
103 #define RTC_IRQMASK     (RTC_PF | RTC_AF | RTC_UF)
104
105 static inline int is_intr(u8 rtc_intr)
106 {
107         if (!(rtc_intr & RTC_IRQF))
108                 return 0;
109         return rtc_intr & RTC_IRQMASK;
110 }
111
112 /*----------------------------------------------------------------*/
113
114 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
115  * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
116  * used in a broken "legacy replacement" mode.  The breakage includes
117  * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
118  * other (better) use.
119  *
120  * When that broken mode is in use, platform glue provides a partial
121  * emulation of hardware RTC IRQ facilities using HPET #1.  We don't
122  * want to use HPET for anything except those IRQs though...
123  */
124 #ifdef CONFIG_HPET_EMULATE_RTC
125 #include <asm/hpet.h>
126 #else
127
128 static inline int is_hpet_enabled(void)
129 {
130         return 0;
131 }
132
133 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
134 {
135         return 0;
136 }
137
138 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
139 {
140         return 0;
141 }
142
143 static inline int
144 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
145 {
146         return 0;
147 }
148
149 static inline int hpet_set_periodic_freq(unsigned long freq)
150 {
151         return 0;
152 }
153
154 static inline int hpet_rtc_dropped_irq(void)
155 {
156         return 0;
157 }
158
159 static inline int hpet_rtc_timer_init(void)
160 {
161         return 0;
162 }
163
164 extern irq_handler_t hpet_rtc_interrupt;
165
166 static inline int hpet_register_irq_handler(irq_handler_t handler)
167 {
168         return 0;
169 }
170
171 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
172 {
173         return 0;
174 }
175
176 #endif
177
178 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
179 static inline int use_hpet_alarm(void)
180 {
181         return is_hpet_enabled() && !cmos_use_acpi_alarm();
182 }
183
184 /*----------------------------------------------------------------*/
185
186 #ifdef RTC_PORT
187
188 /* Most newer x86 systems have two register banks, the first used
189  * for RTC and NVRAM and the second only for NVRAM.  Caller must
190  * own rtc_lock ... and we won't worry about access during NMI.
191  */
192 #define can_bank2       true
193
194 static inline unsigned char cmos_read_bank2(unsigned char addr)
195 {
196         outb(addr, RTC_PORT(2));
197         return inb(RTC_PORT(3));
198 }
199
200 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
201 {
202         outb(addr, RTC_PORT(2));
203         outb(val, RTC_PORT(3));
204 }
205
206 #else
207
208 #define can_bank2       false
209
210 static inline unsigned char cmos_read_bank2(unsigned char addr)
211 {
212         return 0;
213 }
214
215 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
216 {
217 }
218
219 #endif
220
221 /*----------------------------------------------------------------*/
222
223 static int cmos_read_time(struct device *dev, struct rtc_time *t)
224 {
225         int ret;
226
227         /*
228          * If pm_trace abused the RTC for storage, set the timespec to 0,
229          * which tells the caller that this RTC value is unusable.
230          */
231         if (!pm_trace_rtc_valid())
232                 return -EIO;
233
234         ret = mc146818_get_time(t, 1000);
235         if (ret < 0) {
236                 dev_err_ratelimited(dev, "unable to read current time\n");
237                 return ret;
238         }
239
240         return 0;
241 }
242
243 static int cmos_set_time(struct device *dev, struct rtc_time *t)
244 {
245         /* NOTE: this ignores the issue whereby updating the seconds
246          * takes effect exactly 500ms after we write the register.
247          * (Also queueing and other delays before we get this far.)
248          */
249         return mc146818_set_time(t);
250 }
251
252 struct cmos_read_alarm_callback_param {
253         struct cmos_rtc *cmos;
254         struct rtc_time *time;
255         unsigned char   rtc_control;
256 };
257
258 static void cmos_read_alarm_callback(unsigned char __always_unused seconds,
259                                      void *param_in)
260 {
261         struct cmos_read_alarm_callback_param *p =
262                 (struct cmos_read_alarm_callback_param *)param_in;
263         struct rtc_time *time = p->time;
264
265         time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
266         time->tm_min = CMOS_READ(RTC_MINUTES_ALARM);
267         time->tm_hour = CMOS_READ(RTC_HOURS_ALARM);
268
269         if (p->cmos->day_alrm) {
270                 /* ignore upper bits on readback per ACPI spec */
271                 time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f;
272                 if (!time->tm_mday)
273                         time->tm_mday = -1;
274
275                 if (p->cmos->mon_alrm) {
276                         time->tm_mon = CMOS_READ(p->cmos->mon_alrm);
277                         if (!time->tm_mon)
278                                 time->tm_mon = -1;
279                 }
280         }
281
282         p->rtc_control = CMOS_READ(RTC_CONTROL);
283 }
284
285 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
286 {
287         struct cmos_rtc *cmos = dev_get_drvdata(dev);
288         struct cmos_read_alarm_callback_param p = {
289                 .cmos = cmos,
290                 .time = &t->time,
291         };
292
293         /* This not only a rtc_op, but also called directly */
294         if (!is_valid_irq(cmos->irq))
295                 return -ETIMEDOUT;
296
297         /* Basic alarms only support hour, minute, and seconds fields.
298          * Some also support day and month, for alarms up to a year in
299          * the future.
300          */
301
302         /* Some Intel chipsets disconnect the alarm registers when the clock
303          * update is in progress - during this time reads return bogus values
304          * and writes may fail silently. See for example "7th Generation Intel®
305          * Processor Family I/O for U/Y Platforms [...] Datasheet", section
306          * 27.7.1
307          *
308          * Use the mc146818_avoid_UIP() function to avoid this.
309          */
310         if (!mc146818_avoid_UIP(cmos_read_alarm_callback, 10, &p))
311                 return -EIO;
312
313         if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
314                 if (((unsigned)t->time.tm_sec) < 0x60)
315                         t->time.tm_sec = bcd2bin(t->time.tm_sec);
316                 else
317                         t->time.tm_sec = -1;
318                 if (((unsigned)t->time.tm_min) < 0x60)
319                         t->time.tm_min = bcd2bin(t->time.tm_min);
320                 else
321                         t->time.tm_min = -1;
322                 if (((unsigned)t->time.tm_hour) < 0x24)
323                         t->time.tm_hour = bcd2bin(t->time.tm_hour);
324                 else
325                         t->time.tm_hour = -1;
326
327                 if (cmos->day_alrm) {
328                         if (((unsigned)t->time.tm_mday) <= 0x31)
329                                 t->time.tm_mday = bcd2bin(t->time.tm_mday);
330                         else
331                                 t->time.tm_mday = -1;
332
333                         if (cmos->mon_alrm) {
334                                 if (((unsigned)t->time.tm_mon) <= 0x12)
335                                         t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
336                                 else
337                                         t->time.tm_mon = -1;
338                         }
339                 }
340         }
341
342         t->enabled = !!(p.rtc_control & RTC_AIE);
343         t->pending = 0;
344
345         return 0;
346 }
347
348 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
349 {
350         unsigned char   rtc_intr;
351
352         /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
353          * allegedly some older rtcs need that to handle irqs properly
354          */
355         rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
356
357         if (use_hpet_alarm())
358                 return;
359
360         rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
361         if (is_intr(rtc_intr))
362                 rtc_update_irq(cmos->rtc, 1, rtc_intr);
363 }
364
365 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
366 {
367         unsigned char   rtc_control;
368
369         /* flush any pending IRQ status, notably for update irqs,
370          * before we enable new IRQs
371          */
372         rtc_control = CMOS_READ(RTC_CONTROL);
373         cmos_checkintr(cmos, rtc_control);
374
375         rtc_control |= mask;
376         CMOS_WRITE(rtc_control, RTC_CONTROL);
377         if (use_hpet_alarm())
378                 hpet_set_rtc_irq_bit(mask);
379
380         if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
381                 if (cmos->wake_on)
382                         cmos->wake_on(cmos->dev);
383         }
384
385         cmos_checkintr(cmos, rtc_control);
386 }
387
388 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
389 {
390         unsigned char   rtc_control;
391
392         rtc_control = CMOS_READ(RTC_CONTROL);
393         rtc_control &= ~mask;
394         CMOS_WRITE(rtc_control, RTC_CONTROL);
395         if (use_hpet_alarm())
396                 hpet_mask_rtc_irq_bit(mask);
397
398         if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
399                 if (cmos->wake_off)
400                         cmos->wake_off(cmos->dev);
401         }
402
403         cmos_checkintr(cmos, rtc_control);
404 }
405
406 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
407 {
408         struct cmos_rtc *cmos = dev_get_drvdata(dev);
409         struct rtc_time now;
410
411         cmos_read_time(dev, &now);
412
413         if (!cmos->day_alrm) {
414                 time64_t t_max_date;
415                 time64_t t_alrm;
416
417                 t_max_date = rtc_tm_to_time64(&now);
418                 t_max_date += 24 * 60 * 60 - 1;
419                 t_alrm = rtc_tm_to_time64(&t->time);
420                 if (t_alrm > t_max_date) {
421                         dev_err(dev,
422                                 "Alarms can be up to one day in the future\n");
423                         return -EINVAL;
424                 }
425         } else if (!cmos->mon_alrm) {
426                 struct rtc_time max_date = now;
427                 time64_t t_max_date;
428                 time64_t t_alrm;
429                 int max_mday;
430
431                 if (max_date.tm_mon == 11) {
432                         max_date.tm_mon = 0;
433                         max_date.tm_year += 1;
434                 } else {
435                         max_date.tm_mon += 1;
436                 }
437                 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
438                 if (max_date.tm_mday > max_mday)
439                         max_date.tm_mday = max_mday;
440
441                 t_max_date = rtc_tm_to_time64(&max_date);
442                 t_max_date -= 1;
443                 t_alrm = rtc_tm_to_time64(&t->time);
444                 if (t_alrm > t_max_date) {
445                         dev_err(dev,
446                                 "Alarms can be up to one month in the future\n");
447                         return -EINVAL;
448                 }
449         } else {
450                 struct rtc_time max_date = now;
451                 time64_t t_max_date;
452                 time64_t t_alrm;
453                 int max_mday;
454
455                 max_date.tm_year += 1;
456                 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
457                 if (max_date.tm_mday > max_mday)
458                         max_date.tm_mday = max_mday;
459
460                 t_max_date = rtc_tm_to_time64(&max_date);
461                 t_max_date -= 1;
462                 t_alrm = rtc_tm_to_time64(&t->time);
463                 if (t_alrm > t_max_date) {
464                         dev_err(dev,
465                                 "Alarms can be up to one year in the future\n");
466                         return -EINVAL;
467                 }
468         }
469
470         return 0;
471 }
472
473 struct cmos_set_alarm_callback_param {
474         struct cmos_rtc *cmos;
475         unsigned char mon, mday, hrs, min, sec;
476         struct rtc_wkalrm *t;
477 };
478
479 /* Note: this function may be executed by mc146818_avoid_UIP() more then
480  *       once
481  */
482 static void cmos_set_alarm_callback(unsigned char __always_unused seconds,
483                                     void *param_in)
484 {
485         struct cmos_set_alarm_callback_param *p =
486                 (struct cmos_set_alarm_callback_param *)param_in;
487
488         /* next rtc irq must not be from previous alarm setting */
489         cmos_irq_disable(p->cmos, RTC_AIE);
490
491         /* update alarm */
492         CMOS_WRITE(p->hrs, RTC_HOURS_ALARM);
493         CMOS_WRITE(p->min, RTC_MINUTES_ALARM);
494         CMOS_WRITE(p->sec, RTC_SECONDS_ALARM);
495
496         /* the system may support an "enhanced" alarm */
497         if (p->cmos->day_alrm) {
498                 CMOS_WRITE(p->mday, p->cmos->day_alrm);
499                 if (p->cmos->mon_alrm)
500                         CMOS_WRITE(p->mon, p->cmos->mon_alrm);
501         }
502
503         if (use_hpet_alarm()) {
504                 /*
505                  * FIXME the HPET alarm glue currently ignores day_alrm
506                  * and mon_alrm ...
507                  */
508                 hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min,
509                                     p->t->time.tm_sec);
510         }
511
512         if (p->t->enabled)
513                 cmos_irq_enable(p->cmos, RTC_AIE);
514 }
515
516 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
517 {
518         struct cmos_rtc *cmos = dev_get_drvdata(dev);
519         struct cmos_set_alarm_callback_param p = {
520                 .cmos = cmos,
521                 .t = t
522         };
523         unsigned char rtc_control;
524         int ret;
525
526         /* This not only a rtc_op, but also called directly */
527         if (!is_valid_irq(cmos->irq))
528                 return -EIO;
529
530         ret = cmos_validate_alarm(dev, t);
531         if (ret < 0)
532                 return ret;
533
534         p.mon = t->time.tm_mon + 1;
535         p.mday = t->time.tm_mday;
536         p.hrs = t->time.tm_hour;
537         p.min = t->time.tm_min;
538         p.sec = t->time.tm_sec;
539
540         spin_lock_irq(&rtc_lock);
541         rtc_control = CMOS_READ(RTC_CONTROL);
542         spin_unlock_irq(&rtc_lock);
543
544         if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
545                 /* Writing 0xff means "don't care" or "match all".  */
546                 p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff;
547                 p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff;
548                 p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff;
549                 p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff;
550                 p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff;
551         }
552
553         /*
554          * Some Intel chipsets disconnect the alarm registers when the clock
555          * update is in progress - during this time writes fail silently.
556          *
557          * Use mc146818_avoid_UIP() to avoid this.
558          */
559         if (!mc146818_avoid_UIP(cmos_set_alarm_callback, 10, &p))
560                 return -ETIMEDOUT;
561
562         cmos->alarm_expires = rtc_tm_to_time64(&t->time);
563
564         return 0;
565 }
566
567 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
568 {
569         struct cmos_rtc *cmos = dev_get_drvdata(dev);
570         unsigned long   flags;
571
572         spin_lock_irqsave(&rtc_lock, flags);
573
574         if (enabled)
575                 cmos_irq_enable(cmos, RTC_AIE);
576         else
577                 cmos_irq_disable(cmos, RTC_AIE);
578
579         spin_unlock_irqrestore(&rtc_lock, flags);
580         return 0;
581 }
582
583 #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
584
585 static int cmos_procfs(struct device *dev, struct seq_file *seq)
586 {
587         struct cmos_rtc *cmos = dev_get_drvdata(dev);
588         unsigned char   rtc_control, valid;
589
590         spin_lock_irq(&rtc_lock);
591         rtc_control = CMOS_READ(RTC_CONTROL);
592         valid = CMOS_READ(RTC_VALID);
593         spin_unlock_irq(&rtc_lock);
594
595         /* NOTE:  at least ICH6 reports battery status using a different
596          * (non-RTC) bit; and SQWE is ignored on many current systems.
597          */
598         seq_printf(seq,
599                    "periodic_IRQ\t: %s\n"
600                    "update_IRQ\t: %s\n"
601                    "HPET_emulated\t: %s\n"
602                    // "square_wave\t: %s\n"
603                    "BCD\t\t: %s\n"
604                    "DST_enable\t: %s\n"
605                    "periodic_freq\t: %d\n"
606                    "batt_status\t: %s\n",
607                    (rtc_control & RTC_PIE) ? "yes" : "no",
608                    (rtc_control & RTC_UIE) ? "yes" : "no",
609                    use_hpet_alarm() ? "yes" : "no",
610                    // (rtc_control & RTC_SQWE) ? "yes" : "no",
611                    (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
612                    (rtc_control & RTC_DST_EN) ? "yes" : "no",
613                    cmos->rtc->irq_freq,
614                    (valid & RTC_VRT) ? "okay" : "dead");
615
616         return 0;
617 }
618
619 #else
620 #define cmos_procfs     NULL
621 #endif
622
623 static const struct rtc_class_ops cmos_rtc_ops = {
624         .read_time              = cmos_read_time,
625         .set_time               = cmos_set_time,
626         .read_alarm             = cmos_read_alarm,
627         .set_alarm              = cmos_set_alarm,
628         .proc                   = cmos_procfs,
629         .alarm_irq_enable       = cmos_alarm_irq_enable,
630 };
631
632 /*----------------------------------------------------------------*/
633
634 /*
635  * All these chips have at least 64 bytes of address space, shared by
636  * RTC registers and NVRAM.  Most of those bytes of NVRAM are used
637  * by boot firmware.  Modern chips have 128 or 256 bytes.
638  */
639
640 #define NVRAM_OFFSET    (RTC_REG_D + 1)
641
642 static int cmos_nvram_read(void *priv, unsigned int off, void *val,
643                            size_t count)
644 {
645         unsigned char *buf = val;
646         int     retval;
647
648         off += NVRAM_OFFSET;
649         spin_lock_irq(&rtc_lock);
650         for (retval = 0; count; count--, off++, retval++) {
651                 if (off < 128)
652                         *buf++ = CMOS_READ(off);
653                 else if (can_bank2)
654                         *buf++ = cmos_read_bank2(off);
655                 else
656                         break;
657         }
658         spin_unlock_irq(&rtc_lock);
659
660         return retval;
661 }
662
663 static int cmos_nvram_write(void *priv, unsigned int off, void *val,
664                             size_t count)
665 {
666         struct cmos_rtc *cmos = priv;
667         unsigned char   *buf = val;
668         int             retval;
669
670         /* NOTE:  on at least PCs and Ataris, the boot firmware uses a
671          * checksum on part of the NVRAM data.  That's currently ignored
672          * here.  If userspace is smart enough to know what fields of
673          * NVRAM to update, updating checksums is also part of its job.
674          */
675         off += NVRAM_OFFSET;
676         spin_lock_irq(&rtc_lock);
677         for (retval = 0; count; count--, off++, retval++) {
678                 /* don't trash RTC registers */
679                 if (off == cmos->day_alrm
680                                 || off == cmos->mon_alrm
681                                 || off == cmos->century)
682                         buf++;
683                 else if (off < 128)
684                         CMOS_WRITE(*buf++, off);
685                 else if (can_bank2)
686                         cmos_write_bank2(*buf++, off);
687                 else
688                         break;
689         }
690         spin_unlock_irq(&rtc_lock);
691
692         return retval;
693 }
694
695 /*----------------------------------------------------------------*/
696
697 static struct cmos_rtc  cmos_rtc;
698
699 static irqreturn_t cmos_interrupt(int irq, void *p)
700 {
701         u8              irqstat;
702         u8              rtc_control;
703
704         spin_lock(&rtc_lock);
705
706         /* When the HPET interrupt handler calls us, the interrupt
707          * status is passed as arg1 instead of the irq number.  But
708          * always clear irq status, even when HPET is in the way.
709          *
710          * Note that HPET and RTC are almost certainly out of phase,
711          * giving different IRQ status ...
712          */
713         irqstat = CMOS_READ(RTC_INTR_FLAGS);
714         rtc_control = CMOS_READ(RTC_CONTROL);
715         if (use_hpet_alarm())
716                 irqstat = (unsigned long)irq & 0xF0;
717
718         /* If we were suspended, RTC_CONTROL may not be accurate since the
719          * bios may have cleared it.
720          */
721         if (!cmos_rtc.suspend_ctrl)
722                 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
723         else
724                 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
725
726         /* All Linux RTC alarms should be treated as if they were oneshot.
727          * Similar code may be needed in system wakeup paths, in case the
728          * alarm woke the system.
729          */
730         if (irqstat & RTC_AIE) {
731                 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
732                 rtc_control &= ~RTC_AIE;
733                 CMOS_WRITE(rtc_control, RTC_CONTROL);
734                 if (use_hpet_alarm())
735                         hpet_mask_rtc_irq_bit(RTC_AIE);
736                 CMOS_READ(RTC_INTR_FLAGS);
737         }
738         spin_unlock(&rtc_lock);
739
740         if (is_intr(irqstat)) {
741                 rtc_update_irq(p, 1, irqstat);
742                 return IRQ_HANDLED;
743         } else
744                 return IRQ_NONE;
745 }
746
747 #ifdef  CONFIG_ACPI
748
749 #include <linux/acpi.h>
750
751 static u32 rtc_handler(void *context)
752 {
753         struct device *dev = context;
754         struct cmos_rtc *cmos = dev_get_drvdata(dev);
755         unsigned char rtc_control = 0;
756         unsigned char rtc_intr;
757         unsigned long flags;
758
759
760         /*
761          * Always update rtc irq when ACPI is used as RTC Alarm.
762          * Or else, ACPI SCI is enabled during suspend/resume only,
763          * update rtc irq in that case.
764          */
765         if (cmos_use_acpi_alarm())
766                 cmos_interrupt(0, (void *)cmos->rtc);
767         else {
768                 /* Fix me: can we use cmos_interrupt() here as well? */
769                 spin_lock_irqsave(&rtc_lock, flags);
770                 if (cmos_rtc.suspend_ctrl)
771                         rtc_control = CMOS_READ(RTC_CONTROL);
772                 if (rtc_control & RTC_AIE) {
773                         cmos_rtc.suspend_ctrl &= ~RTC_AIE;
774                         CMOS_WRITE(rtc_control, RTC_CONTROL);
775                         rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
776                         rtc_update_irq(cmos->rtc, 1, rtc_intr);
777                 }
778                 spin_unlock_irqrestore(&rtc_lock, flags);
779         }
780
781         pm_wakeup_hard_event(dev);
782         acpi_clear_event(ACPI_EVENT_RTC);
783         acpi_disable_event(ACPI_EVENT_RTC, 0);
784         return ACPI_INTERRUPT_HANDLED;
785 }
786
787 static void acpi_rtc_event_setup(struct device *dev)
788 {
789         if (acpi_disabled)
790                 return;
791
792         acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
793         /*
794          * After the RTC handler is installed, the Fixed_RTC event should
795          * be disabled. Only when the RTC alarm is set will it be enabled.
796          */
797         acpi_clear_event(ACPI_EVENT_RTC);
798         acpi_disable_event(ACPI_EVENT_RTC, 0);
799 }
800
801 static void acpi_rtc_event_cleanup(void)
802 {
803         if (acpi_disabled)
804                 return;
805
806         acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler);
807 }
808
809 static void rtc_wake_on(struct device *dev)
810 {
811         acpi_clear_event(ACPI_EVENT_RTC);
812         acpi_enable_event(ACPI_EVENT_RTC, 0);
813 }
814
815 static void rtc_wake_off(struct device *dev)
816 {
817         acpi_disable_event(ACPI_EVENT_RTC, 0);
818 }
819
820 #ifdef CONFIG_X86
821 static void use_acpi_alarm_quirks(void)
822 {
823         switch (boot_cpu_data.x86_vendor) {
824         case X86_VENDOR_INTEL:
825                 if (dmi_get_bios_year() < 2015)
826                         return;
827                 break;
828         case X86_VENDOR_AMD:
829         case X86_VENDOR_HYGON:
830                 if (dmi_get_bios_year() < 2021)
831                         return;
832                 break;
833         default:
834                 return;
835         }
836         if (!is_hpet_enabled())
837                 return;
838
839         use_acpi_alarm = true;
840 }
841 #else
842 static inline void use_acpi_alarm_quirks(void) { }
843 #endif
844
845 static void acpi_cmos_wake_setup(struct device *dev)
846 {
847         if (acpi_disabled)
848                 return;
849
850         use_acpi_alarm_quirks();
851
852         cmos_rtc.wake_on = rtc_wake_on;
853         cmos_rtc.wake_off = rtc_wake_off;
854
855         /* ACPI tables bug workaround. */
856         if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
857                 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
858                         acpi_gbl_FADT.month_alarm);
859                 acpi_gbl_FADT.month_alarm = 0;
860         }
861
862         cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm;
863         cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm;
864         cmos_rtc.century = acpi_gbl_FADT.century;
865
866         if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
867                 dev_info(dev, "RTC can wake from S4\n");
868
869         /* RTC always wakes from S1/S2/S3, and often S4/STD */
870         device_init_wakeup(dev, 1);
871 }
872
873 static void cmos_check_acpi_rtc_status(struct device *dev,
874                                               unsigned char *rtc_control)
875 {
876         struct cmos_rtc *cmos = dev_get_drvdata(dev);
877         acpi_event_status rtc_status;
878         acpi_status status;
879
880         if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
881                 return;
882
883         status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
884         if (ACPI_FAILURE(status)) {
885                 dev_err(dev, "Could not get RTC status\n");
886         } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
887                 unsigned char mask;
888                 *rtc_control &= ~RTC_AIE;
889                 CMOS_WRITE(*rtc_control, RTC_CONTROL);
890                 mask = CMOS_READ(RTC_INTR_FLAGS);
891                 rtc_update_irq(cmos->rtc, 1, mask);
892         }
893 }
894
895 #else /* !CONFIG_ACPI */
896
897 static inline void acpi_rtc_event_setup(struct device *dev)
898 {
899 }
900
901 static inline void acpi_rtc_event_cleanup(void)
902 {
903 }
904
905 static inline void acpi_cmos_wake_setup(struct device *dev)
906 {
907 }
908
909 static inline void cmos_check_acpi_rtc_status(struct device *dev,
910                                               unsigned char *rtc_control)
911 {
912 }
913 #endif /* CONFIG_ACPI */
914
915 #ifdef  CONFIG_PNP
916 #define INITSECTION
917
918 #else
919 #define INITSECTION     __init
920 #endif
921
922 #define SECS_PER_DAY    (24 * 60 * 60)
923 #define SECS_PER_MONTH  (28 * SECS_PER_DAY)
924 #define SECS_PER_YEAR   (365 * SECS_PER_DAY)
925
926 static int INITSECTION
927 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
928 {
929         struct cmos_rtc_board_info      *info = dev_get_platdata(dev);
930         int                             retval = 0;
931         unsigned char                   rtc_control;
932         unsigned                        address_space;
933         u32                             flags = 0;
934         struct nvmem_config nvmem_cfg = {
935                 .name = "cmos_nvram",
936                 .word_size = 1,
937                 .stride = 1,
938                 .reg_read = cmos_nvram_read,
939                 .reg_write = cmos_nvram_write,
940                 .priv = &cmos_rtc,
941         };
942
943         /* there can be only one ... */
944         if (cmos_rtc.dev)
945                 return -EBUSY;
946
947         if (!ports)
948                 return -ENODEV;
949
950         /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
951          *
952          * REVISIT non-x86 systems may instead use memory space resources
953          * (needing ioremap etc), not i/o space resources like this ...
954          */
955         if (RTC_IOMAPPED)
956                 ports = request_region(ports->start, resource_size(ports),
957                                        driver_name);
958         else
959                 ports = request_mem_region(ports->start, resource_size(ports),
960                                            driver_name);
961         if (!ports) {
962                 dev_dbg(dev, "i/o registers already in use\n");
963                 return -EBUSY;
964         }
965
966         cmos_rtc.irq = rtc_irq;
967         cmos_rtc.iomem = ports;
968
969         /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
970          * driver did, but don't reject unknown configs.   Old hardware
971          * won't address 128 bytes.  Newer chips have multiple banks,
972          * though they may not be listed in one I/O resource.
973          */
974 #if     defined(CONFIG_ATARI)
975         address_space = 64;
976 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
977                         || defined(__sparc__) || defined(__mips__) \
978                         || defined(__powerpc__)
979         address_space = 128;
980 #else
981 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
982         address_space = 128;
983 #endif
984         if (can_bank2 && ports->end > (ports->start + 1))
985                 address_space = 256;
986
987         /* For ACPI systems extension info comes from the FADT.  On others,
988          * board specific setup provides it as appropriate.  Systems where
989          * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
990          * some almost-clones) can provide hooks to make that behave.
991          *
992          * Note that ACPI doesn't preclude putting these registers into
993          * "extended" areas of the chip, including some that we won't yet
994          * expect CMOS_READ and friends to handle.
995          */
996         if (info) {
997                 if (info->flags)
998                         flags = info->flags;
999                 if (info->address_space)
1000                         address_space = info->address_space;
1001
1002                 cmos_rtc.day_alrm = info->rtc_day_alarm;
1003                 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
1004                 cmos_rtc.century = info->rtc_century;
1005
1006                 if (info->wake_on && info->wake_off) {
1007                         cmos_rtc.wake_on = info->wake_on;
1008                         cmos_rtc.wake_off = info->wake_off;
1009                 }
1010         } else {
1011                 acpi_cmos_wake_setup(dev);
1012         }
1013
1014         if (cmos_rtc.day_alrm >= 128)
1015                 cmos_rtc.day_alrm = 0;
1016
1017         if (cmos_rtc.mon_alrm >= 128)
1018                 cmos_rtc.mon_alrm = 0;
1019
1020         if (cmos_rtc.century >= 128)
1021                 cmos_rtc.century = 0;
1022
1023         cmos_rtc.dev = dev;
1024         dev_set_drvdata(dev, &cmos_rtc);
1025
1026         cmos_rtc.rtc = devm_rtc_allocate_device(dev);
1027         if (IS_ERR(cmos_rtc.rtc)) {
1028                 retval = PTR_ERR(cmos_rtc.rtc);
1029                 goto cleanup0;
1030         }
1031
1032         if (cmos_rtc.mon_alrm)
1033                 cmos_rtc.rtc->alarm_offset_max = SECS_PER_YEAR - 1;
1034         else if (cmos_rtc.day_alrm)
1035                 cmos_rtc.rtc->alarm_offset_max = SECS_PER_MONTH - 1;
1036         else
1037                 cmos_rtc.rtc->alarm_offset_max = SECS_PER_DAY - 1;
1038
1039         rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
1040
1041         if (!mc146818_does_rtc_work()) {
1042                 dev_warn(dev, "broken or not accessible\n");
1043                 retval = -ENXIO;
1044                 goto cleanup1;
1045         }
1046
1047         spin_lock_irq(&rtc_lock);
1048
1049         if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
1050                 /* force periodic irq to CMOS reset default of 1024Hz;
1051                  *
1052                  * REVISIT it's been reported that at least one x86_64 ALI
1053                  * mobo doesn't use 32KHz here ... for portability we might
1054                  * need to do something about other clock frequencies.
1055                  */
1056                 cmos_rtc.rtc->irq_freq = 1024;
1057                 if (use_hpet_alarm())
1058                         hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
1059                 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
1060         }
1061
1062         /* disable irqs */
1063         if (is_valid_irq(rtc_irq))
1064                 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
1065
1066         rtc_control = CMOS_READ(RTC_CONTROL);
1067
1068         spin_unlock_irq(&rtc_lock);
1069
1070         if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
1071                 dev_warn(dev, "only 24-hr supported\n");
1072                 retval = -ENXIO;
1073                 goto cleanup1;
1074         }
1075
1076         if (use_hpet_alarm())
1077                 hpet_rtc_timer_init();
1078
1079         if (is_valid_irq(rtc_irq)) {
1080                 irq_handler_t rtc_cmos_int_handler;
1081
1082                 if (use_hpet_alarm()) {
1083                         rtc_cmos_int_handler = hpet_rtc_interrupt;
1084                         retval = hpet_register_irq_handler(cmos_interrupt);
1085                         if (retval) {
1086                                 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
1087                                 dev_warn(dev, "hpet_register_irq_handler "
1088                                                 " failed in rtc_init().");
1089                                 goto cleanup1;
1090                         }
1091                 } else
1092                         rtc_cmos_int_handler = cmos_interrupt;
1093
1094                 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
1095                                 0, dev_name(&cmos_rtc.rtc->dev),
1096                                 cmos_rtc.rtc);
1097                 if (retval < 0) {
1098                         dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
1099                         goto cleanup1;
1100                 }
1101         } else {
1102                 clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
1103         }
1104
1105         cmos_rtc.rtc->ops = &cmos_rtc_ops;
1106
1107         retval = devm_rtc_register_device(cmos_rtc.rtc);
1108         if (retval)
1109                 goto cleanup2;
1110
1111         /* Set the sync offset for the periodic 11min update correct */
1112         cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
1113
1114         /* export at least the first block of NVRAM */
1115         nvmem_cfg.size = address_space - NVRAM_OFFSET;
1116         devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
1117
1118         /*
1119          * Everything has gone well so far, so by default register a handler for
1120          * the ACPI RTC fixed event.
1121          */
1122         if (!info)
1123                 acpi_rtc_event_setup(dev);
1124
1125         dev_info(dev, "%s%s, %d bytes nvram%s\n",
1126                  !is_valid_irq(rtc_irq) ? "no alarms" :
1127                  cmos_rtc.mon_alrm ? "alarms up to one year" :
1128                  cmos_rtc.day_alrm ? "alarms up to one month" :
1129                  "alarms up to one day",
1130                  cmos_rtc.century ? ", y3k" : "",
1131                  nvmem_cfg.size,
1132                  use_hpet_alarm() ? ", hpet irqs" : "");
1133
1134         return 0;
1135
1136 cleanup2:
1137         if (is_valid_irq(rtc_irq))
1138                 free_irq(rtc_irq, cmos_rtc.rtc);
1139 cleanup1:
1140         cmos_rtc.dev = NULL;
1141 cleanup0:
1142         if (RTC_IOMAPPED)
1143                 release_region(ports->start, resource_size(ports));
1144         else
1145                 release_mem_region(ports->start, resource_size(ports));
1146         return retval;
1147 }
1148
1149 static void cmos_do_shutdown(int rtc_irq)
1150 {
1151         spin_lock_irq(&rtc_lock);
1152         if (is_valid_irq(rtc_irq))
1153                 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
1154         spin_unlock_irq(&rtc_lock);
1155 }
1156
1157 static void cmos_do_remove(struct device *dev)
1158 {
1159         struct cmos_rtc *cmos = dev_get_drvdata(dev);
1160         struct resource *ports;
1161
1162         cmos_do_shutdown(cmos->irq);
1163
1164         if (is_valid_irq(cmos->irq)) {
1165                 free_irq(cmos->irq, cmos->rtc);
1166                 if (use_hpet_alarm())
1167                         hpet_unregister_irq_handler(cmos_interrupt);
1168         }
1169
1170         if (!dev_get_platdata(dev))
1171                 acpi_rtc_event_cleanup();
1172
1173         cmos->rtc = NULL;
1174
1175         ports = cmos->iomem;
1176         if (RTC_IOMAPPED)
1177                 release_region(ports->start, resource_size(ports));
1178         else
1179                 release_mem_region(ports->start, resource_size(ports));
1180         cmos->iomem = NULL;
1181
1182         cmos->dev = NULL;
1183 }
1184
1185 static int cmos_aie_poweroff(struct device *dev)
1186 {
1187         struct cmos_rtc *cmos = dev_get_drvdata(dev);
1188         struct rtc_time now;
1189         time64_t t_now;
1190         int retval = 0;
1191         unsigned char rtc_control;
1192
1193         if (!cmos->alarm_expires)
1194                 return -EINVAL;
1195
1196         spin_lock_irq(&rtc_lock);
1197         rtc_control = CMOS_READ(RTC_CONTROL);
1198         spin_unlock_irq(&rtc_lock);
1199
1200         /* We only care about the situation where AIE is disabled. */
1201         if (rtc_control & RTC_AIE)
1202                 return -EBUSY;
1203
1204         cmos_read_time(dev, &now);
1205         t_now = rtc_tm_to_time64(&now);
1206
1207         /*
1208          * When enabling "RTC wake-up" in BIOS setup, the machine reboots
1209          * automatically right after shutdown on some buggy boxes.
1210          * This automatic rebooting issue won't happen when the alarm
1211          * time is larger than now+1 seconds.
1212          *
1213          * If the alarm time is equal to now+1 seconds, the issue can be
1214          * prevented by cancelling the alarm.
1215          */
1216         if (cmos->alarm_expires == t_now + 1) {
1217                 struct rtc_wkalrm alarm;
1218
1219                 /* Cancel the AIE timer by configuring the past time. */
1220                 rtc_time64_to_tm(t_now - 1, &alarm.time);
1221                 alarm.enabled = 0;
1222                 retval = cmos_set_alarm(dev, &alarm);
1223         } else if (cmos->alarm_expires > t_now + 1) {
1224                 retval = -EBUSY;
1225         }
1226
1227         return retval;
1228 }
1229
1230 static int cmos_suspend(struct device *dev)
1231 {
1232         struct cmos_rtc *cmos = dev_get_drvdata(dev);
1233         unsigned char   tmp;
1234
1235         /* only the alarm might be a wakeup event source */
1236         spin_lock_irq(&rtc_lock);
1237         cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
1238         if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
1239                 unsigned char   mask;
1240
1241                 if (device_may_wakeup(dev))
1242                         mask = RTC_IRQMASK & ~RTC_AIE;
1243                 else
1244                         mask = RTC_IRQMASK;
1245                 tmp &= ~mask;
1246                 CMOS_WRITE(tmp, RTC_CONTROL);
1247                 if (use_hpet_alarm())
1248                         hpet_mask_rtc_irq_bit(mask);
1249                 cmos_checkintr(cmos, tmp);
1250         }
1251         spin_unlock_irq(&rtc_lock);
1252
1253         if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1254                 cmos->enabled_wake = 1;
1255                 if (cmos->wake_on)
1256                         cmos->wake_on(dev);
1257                 else
1258                         enable_irq_wake(cmos->irq);
1259         }
1260
1261         memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
1262         cmos_read_alarm(dev, &cmos->saved_wkalrm);
1263
1264         dev_dbg(dev, "suspend%s, ctrl %02x\n",
1265                         (tmp & RTC_AIE) ? ", alarm may wake" : "",
1266                         tmp);
1267
1268         return 0;
1269 }
1270
1271 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1272  * after a detour through G3 "mechanical off", although the ACPI spec
1273  * says wakeup should only work from G1/S4 "hibernate".  To most users,
1274  * distinctions between S4 and S5 are pointless.  So when the hardware
1275  * allows, don't draw that distinction.
1276  */
1277 static inline int cmos_poweroff(struct device *dev)
1278 {
1279         if (!IS_ENABLED(CONFIG_PM))
1280                 return -ENOSYS;
1281
1282         return cmos_suspend(dev);
1283 }
1284
1285 static void cmos_check_wkalrm(struct device *dev)
1286 {
1287         struct cmos_rtc *cmos = dev_get_drvdata(dev);
1288         struct rtc_wkalrm current_alarm;
1289         time64_t t_now;
1290         time64_t t_current_expires;
1291         time64_t t_saved_expires;
1292         struct rtc_time now;
1293
1294         /* Check if we have RTC Alarm armed */
1295         if (!(cmos->suspend_ctrl & RTC_AIE))
1296                 return;
1297
1298         cmos_read_time(dev, &now);
1299         t_now = rtc_tm_to_time64(&now);
1300
1301         /*
1302          * ACPI RTC wake event is cleared after resume from STR,
1303          * ACK the rtc irq here
1304          */
1305         if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1306                 local_irq_disable();
1307                 cmos_interrupt(0, (void *)cmos->rtc);
1308                 local_irq_enable();
1309                 return;
1310         }
1311
1312         memset(&current_alarm, 0, sizeof(struct rtc_wkalrm));
1313         cmos_read_alarm(dev, &current_alarm);
1314         t_current_expires = rtc_tm_to_time64(&current_alarm.time);
1315         t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1316         if (t_current_expires != t_saved_expires ||
1317             cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1318                 cmos_set_alarm(dev, &cmos->saved_wkalrm);
1319         }
1320 }
1321
1322 static int __maybe_unused cmos_resume(struct device *dev)
1323 {
1324         struct cmos_rtc *cmos = dev_get_drvdata(dev);
1325         unsigned char tmp;
1326
1327         if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1328                 if (cmos->wake_off)
1329                         cmos->wake_off(dev);
1330                 else
1331                         disable_irq_wake(cmos->irq);
1332                 cmos->enabled_wake = 0;
1333         }
1334
1335         /* The BIOS might have changed the alarm, restore it */
1336         cmos_check_wkalrm(dev);
1337
1338         spin_lock_irq(&rtc_lock);
1339         tmp = cmos->suspend_ctrl;
1340         cmos->suspend_ctrl = 0;
1341         /* re-enable any irqs previously active */
1342         if (tmp & RTC_IRQMASK) {
1343                 unsigned char   mask;
1344
1345                 if (device_may_wakeup(dev) && use_hpet_alarm())
1346                         hpet_rtc_timer_init();
1347
1348                 do {
1349                         CMOS_WRITE(tmp, RTC_CONTROL);
1350                         if (use_hpet_alarm())
1351                                 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1352
1353                         mask = CMOS_READ(RTC_INTR_FLAGS);
1354                         mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1355                         if (!use_hpet_alarm() || !is_intr(mask))
1356                                 break;
1357
1358                         /* force one-shot behavior if HPET blocked
1359                          * the wake alarm's irq
1360                          */
1361                         rtc_update_irq(cmos->rtc, 1, mask);
1362                         tmp &= ~RTC_AIE;
1363                         hpet_mask_rtc_irq_bit(RTC_AIE);
1364                 } while (mask & RTC_AIE);
1365
1366                 if (tmp & RTC_AIE)
1367                         cmos_check_acpi_rtc_status(dev, &tmp);
1368         }
1369         spin_unlock_irq(&rtc_lock);
1370
1371         dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1372
1373         return 0;
1374 }
1375
1376 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1377
1378 /*----------------------------------------------------------------*/
1379
1380 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1381  * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1382  * probably list them in similar PNPBIOS tables; so PNP is more common.
1383  *
1384  * We don't use legacy "poke at the hardware" probing.  Ancient PCs that
1385  * predate even PNPBIOS should set up platform_bus devices.
1386  */
1387
1388 #ifdef  CONFIG_PNP
1389
1390 #include <linux/pnp.h>
1391
1392 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1393 {
1394         int irq;
1395
1396         if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1397                 irq = 0;
1398 #ifdef CONFIG_X86
1399                 /* Some machines contain a PNP entry for the RTC, but
1400                  * don't define the IRQ. It should always be safe to
1401                  * hardcode it on systems with a legacy PIC.
1402                  */
1403                 if (nr_legacy_irqs())
1404                         irq = RTC_IRQ;
1405 #endif
1406         } else {
1407                 irq = pnp_irq(pnp, 0);
1408         }
1409
1410         return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1411 }
1412
1413 static void cmos_pnp_remove(struct pnp_dev *pnp)
1414 {
1415         cmos_do_remove(&pnp->dev);
1416 }
1417
1418 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1419 {
1420         struct device *dev = &pnp->dev;
1421         struct cmos_rtc *cmos = dev_get_drvdata(dev);
1422
1423         if (system_state == SYSTEM_POWER_OFF) {
1424                 int retval = cmos_poweroff(dev);
1425
1426                 if (cmos_aie_poweroff(dev) < 0 && !retval)
1427                         return;
1428         }
1429
1430         cmos_do_shutdown(cmos->irq);
1431 }
1432
1433 static const struct pnp_device_id rtc_ids[] = {
1434         { .id = "PNP0b00", },
1435         { .id = "PNP0b01", },
1436         { .id = "PNP0b02", },
1437         { },
1438 };
1439 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1440
1441 static struct pnp_driver cmos_pnp_driver = {
1442         .name           = driver_name,
1443         .id_table       = rtc_ids,
1444         .probe          = cmos_pnp_probe,
1445         .remove         = cmos_pnp_remove,
1446         .shutdown       = cmos_pnp_shutdown,
1447
1448         /* flag ensures resume() gets called, and stops syslog spam */
1449         .flags          = PNP_DRIVER_RES_DO_NOT_CHANGE,
1450         .driver         = {
1451                         .pm = &cmos_pm_ops,
1452         },
1453 };
1454
1455 #endif  /* CONFIG_PNP */
1456
1457 #ifdef CONFIG_OF
1458 static const struct of_device_id of_cmos_match[] = {
1459         {
1460                 .compatible = "motorola,mc146818",
1461         },
1462         { },
1463 };
1464 MODULE_DEVICE_TABLE(of, of_cmos_match);
1465
1466 static __init void cmos_of_init(struct platform_device *pdev)
1467 {
1468         struct device_node *node = pdev->dev.of_node;
1469         const __be32 *val;
1470
1471         if (!node)
1472                 return;
1473
1474         val = of_get_property(node, "ctrl-reg", NULL);
1475         if (val)
1476                 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1477
1478         val = of_get_property(node, "freq-reg", NULL);
1479         if (val)
1480                 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1481 }
1482 #else
1483 static inline void cmos_of_init(struct platform_device *pdev) {}
1484 #endif
1485 /*----------------------------------------------------------------*/
1486
1487 /* Platform setup should have set up an RTC device, when PNP is
1488  * unavailable ... this could happen even on (older) PCs.
1489  */
1490
1491 static int __init cmos_platform_probe(struct platform_device *pdev)
1492 {
1493         struct resource *resource;
1494         int irq;
1495
1496         cmos_of_init(pdev);
1497
1498         if (RTC_IOMAPPED)
1499                 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1500         else
1501                 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1502         irq = platform_get_irq(pdev, 0);
1503         if (irq < 0)
1504                 irq = -1;
1505
1506         return cmos_do_probe(&pdev->dev, resource, irq);
1507 }
1508
1509 static void cmos_platform_remove(struct platform_device *pdev)
1510 {
1511         cmos_do_remove(&pdev->dev);
1512 }
1513
1514 static void cmos_platform_shutdown(struct platform_device *pdev)
1515 {
1516         struct device *dev = &pdev->dev;
1517         struct cmos_rtc *cmos = dev_get_drvdata(dev);
1518
1519         if (system_state == SYSTEM_POWER_OFF) {
1520                 int retval = cmos_poweroff(dev);
1521
1522                 if (cmos_aie_poweroff(dev) < 0 && !retval)
1523                         return;
1524         }
1525
1526         cmos_do_shutdown(cmos->irq);
1527 }
1528
1529 /* work with hotplug and coldplug */
1530 MODULE_ALIAS("platform:rtc_cmos");
1531
1532 static struct platform_driver cmos_platform_driver = {
1533         .remove_new     = cmos_platform_remove,
1534         .shutdown       = cmos_platform_shutdown,
1535         .driver = {
1536                 .name           = driver_name,
1537                 .pm             = &cmos_pm_ops,
1538                 .of_match_table = of_match_ptr(of_cmos_match),
1539         }
1540 };
1541
1542 #ifdef CONFIG_PNP
1543 static bool pnp_driver_registered;
1544 #endif
1545 static bool platform_driver_registered;
1546
1547 static int __init cmos_init(void)
1548 {
1549         int retval = 0;
1550
1551 #ifdef  CONFIG_PNP
1552         retval = pnp_register_driver(&cmos_pnp_driver);
1553         if (retval == 0)
1554                 pnp_driver_registered = true;
1555 #endif
1556
1557         if (!cmos_rtc.dev) {
1558                 retval = platform_driver_probe(&cmos_platform_driver,
1559                                                cmos_platform_probe);
1560                 if (retval == 0)
1561                         platform_driver_registered = true;
1562         }
1563
1564         if (retval == 0)
1565                 return 0;
1566
1567 #ifdef  CONFIG_PNP
1568         if (pnp_driver_registered)
1569                 pnp_unregister_driver(&cmos_pnp_driver);
1570 #endif
1571         return retval;
1572 }
1573 module_init(cmos_init);
1574
1575 static void __exit cmos_exit(void)
1576 {
1577 #ifdef  CONFIG_PNP
1578         if (pnp_driver_registered)
1579                 pnp_unregister_driver(&cmos_pnp_driver);
1580 #endif
1581         if (platform_driver_registered)
1582                 platform_driver_unregister(&cmos_platform_driver);
1583 }
1584 module_exit(cmos_exit);
1585
1586
1587 MODULE_AUTHOR("David Brownell");
1588 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1589 MODULE_LICENSE("GPL");