1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2013 STMicroelectronics Limited
4 * Author: Stephen Gallimore <stephen.gallimore@st.com>
6 * Inspired by mach-imx/src.c
8 #include <linux/kernel.h>
9 #include <linux/platform_device.h>
10 #include <linux/property.h>
11 #include <linux/module.h>
12 #include <linux/err.h>
13 #include <linux/types.h>
15 #include <linux/regmap.h>
16 #include <linux/mfd/syscon.h>
18 #include "reset-syscfg.h"
21 * struct syscfg_reset_channel - Reset channel regmap configuration
23 * @reset: regmap field for the channel's reset bit.
24 * @ack: regmap field for the channel's ack bit (optional).
26 struct syscfg_reset_channel {
27 struct regmap_field *reset;
28 struct regmap_field *ack;
32 * struct syscfg_reset_controller - A reset controller which groups together
33 * a set of related reset bits, which may be located in different system
34 * configuration registers.
36 * @rst: base reset controller structure.
37 * @active_low: are the resets in this controller active low, i.e. clearing
38 * the reset bit puts the hardware into reset.
39 * @channels: An array of reset channels for this controller.
41 struct syscfg_reset_controller {
42 struct reset_controller_dev rst;
44 struct syscfg_reset_channel *channels;
47 #define to_syscfg_reset_controller(_rst) \
48 container_of(_rst, struct syscfg_reset_controller, rst)
50 static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev,
51 unsigned long idx, int assert)
53 struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
54 const struct syscfg_reset_channel *ch;
55 u32 ctrl_val = rst->active_low ? !assert : !!assert;
58 if (idx >= rcdev->nr_resets)
61 ch = &rst->channels[idx];
63 err = regmap_field_write(ch->reset, ctrl_val);
70 err = regmap_field_read_poll_timeout(ch->ack, ack_val, (ack_val == ctrl_val),
79 static int syscfg_reset_assert(struct reset_controller_dev *rcdev,
82 return syscfg_reset_program_hw(rcdev, idx, true);
85 static int syscfg_reset_deassert(struct reset_controller_dev *rcdev,
88 return syscfg_reset_program_hw(rcdev, idx, false);
91 static int syscfg_reset_dev(struct reset_controller_dev *rcdev,
96 err = syscfg_reset_assert(rcdev, idx);
100 return syscfg_reset_deassert(rcdev, idx);
103 static int syscfg_reset_status(struct reset_controller_dev *rcdev,
106 struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
107 const struct syscfg_reset_channel *ch;
111 if (idx >= rcdev->nr_resets)
114 ch = &rst->channels[idx];
116 err = regmap_field_read(ch->ack, &ret_val);
118 err = regmap_field_read(ch->reset, &ret_val);
122 return rst->active_low ? !ret_val : !!ret_val;
125 static const struct reset_control_ops syscfg_reset_ops = {
126 .reset = syscfg_reset_dev,
127 .assert = syscfg_reset_assert,
128 .deassert = syscfg_reset_deassert,
129 .status = syscfg_reset_status,
132 static int syscfg_reset_controller_register(struct device *dev,
133 const struct syscfg_reset_controller_data *data)
135 struct syscfg_reset_controller *rc;
138 rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
142 rc->channels = devm_kcalloc(dev, data->nr_channels,
143 sizeof(*rc->channels), GFP_KERNEL);
147 rc->rst.ops = &syscfg_reset_ops;
148 rc->rst.of_node = dev->of_node;
149 rc->rst.nr_resets = data->nr_channels;
150 rc->active_low = data->active_low;
152 for (i = 0; i < data->nr_channels; i++) {
154 struct regmap_field *f;
155 const char *compatible = data->channels[i].compatible;
157 map = syscon_regmap_lookup_by_compatible(compatible);
161 f = devm_regmap_field_alloc(dev, map, data->channels[i].reset);
165 rc->channels[i].reset = f;
167 if (!data->wait_for_ack)
170 f = devm_regmap_field_alloc(dev, map, data->channels[i].ack);
174 rc->channels[i].ack = f;
177 err = reset_controller_register(&rc->rst);
179 dev_info(dev, "registered\n");
184 int syscfg_reset_probe(struct platform_device *pdev)
186 struct device *dev = pdev ? &pdev->dev : NULL;
189 if (!dev || !dev->driver)
192 data = device_get_match_data(&pdev->dev);
196 return syscfg_reset_controller_register(dev, data);