1 # SPDX-License-Identifier: GPL-2.0-only
2 config ARCH_HAS_RESET_CONTROLLER
5 menuconfig RESET_CONTROLLER
6 bool "Reset Controller Support"
7 default y if ARCH_HAS_RESET_CONTROLLER
9 Generic Reset Controller support.
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
19 tristate "Altera Arria10 System Resource Reset"
20 depends on MFD_ALTERA_A10SR
22 This option enables support for the external reset functions for
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
26 bool "AR71xx Reset Driver" if COMPILE_TEST
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
33 bool "AXS10x Reset Driver" if COMPILE_TEST
34 default ARC_PLAT_AXS10X
36 This enables the reset controller driver for AXS10x.
39 bool "Berlin Reset Driver" if COMPILE_TEST
42 This enables the reset controller driver for Marvell Berlin SoCs.
45 tristate "Broadcom STB reset controller"
46 depends on ARCH_BRCMSTB || COMPILE_TEST
49 This enables the reset controller driver for Broadcom STB SoCs using
50 a SUN_TOP_CTRL_SW_INIT style controller.
52 config RESET_BRCMSTB_RESCAL
53 bool "Broadcom STB RESCAL reset controller"
55 default ARCH_BRCMSTB || COMPILE_TEST
57 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
61 bool "Synopsys HSDK Reset Driver"
63 depends on ARC_SOC_HSDK || COMPILE_TEST
65 This enables the reset controller driver for HSDK board.
68 bool "i.MX7/8 Reset Driver" if COMPILE_TEST
70 default SOC_IMX7D || (ARM64 && ARCH_MXC)
73 This enables the reset controller driver for i.MX7 SoCs.
76 bool "Intel Reset Controller Driver"
77 depends on OF && HAS_IOMEM
80 This enables the reset controller driver for Intel Gateway SoCs.
81 Say Y to control the reset signals provided by reset controller.
85 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
88 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
91 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
94 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
97 bool "Meson Reset Driver" if COMPILE_TEST
100 This enables the reset driver for Amlogic Meson SoCs.
102 config RESET_MESON_AUDIO_ARB
103 tristate "Meson Audio Memory Arbiter Reset Driver"
104 depends on ARCH_MESON || COMPILE_TEST
106 This enables the reset driver for Audio Memory Arbiter of
107 Amlogic's A113 based SoCs
110 bool "NPCM BMC Reset Driver" if COMPILE_TEST
113 This enables the reset controller driver for Nuvoton NPCM
119 config RESET_PISTACHIO
120 bool "Pistachio Reset Driver" if COMPILE_TEST
121 default MACH_PISTACHIO
123 This enables the reset driver for ImgTec Pistachio SoCs.
125 config RESET_QCOM_AOSS
126 tristate "Qcom AOSS Reset Driver"
127 depends on ARCH_QCOM || COMPILE_TEST
129 This enables the AOSS (always on subsystem) reset driver
130 for Qualcomm SDM845 SoCs. Say Y if you want to control
131 reset signals provided by AOSS for Modem, Venus, ADSP,
132 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
134 config RESET_QCOM_PDC
135 tristate "Qualcomm PDC Reset Driver"
136 depends on ARCH_QCOM || COMPILE_TEST
138 This enables the PDC (Power Domain Controller) reset driver
139 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
140 to control reset signals provided by PDC for Modem, Compute,
141 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
143 config RESET_RASPBERRYPI
144 tristate "Raspberry Pi 4 Firmware Reset Driver"
145 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
148 Raspberry Pi 4's co-processor controls some of the board's HW
149 initialization process, but it's up to Linux to trigger it when
150 relevant. This driver provides a reset controller capable of
151 interfacing with RPi4's co-processor and model these firmware
152 initialization routines as reset lines.
155 tristate "Reset driver controlled via ARM SCMI interface"
156 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
157 default ARM_SCMI_PROTOCOL
159 This driver provides support for reset signal/domains that are
160 controlled by firmware that implements the SCMI interface.
162 This driver uses SCMI Message Protocol to interact with the
163 firmware controlling all the reset signals.
166 bool "Simple Reset Controller Driver" if COMPILE_TEST
167 default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
169 This enables a simple reset controller driver for reset lines that
170 that can be asserted and deasserted by toggling bits in a contiguous,
171 exclusive register space.
173 Currently this driver supports:
178 - RCC reset controller in STM32 MCUs
180 - ZTE's zx2967 family
182 config RESET_STM32MP157
183 bool "STM32MP157 Reset Driver" if COMPILE_TEST
184 default MACH_STM32MP157
186 This enables the RCC reset controller driver for STM32 MPUs.
189 bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
193 This enables the reset driver for the SoCFPGA ARMv7 platforms. This
194 driver gets initialized early during platform init calls.
197 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
201 This enables the reset driver for Allwinner SoCs.
204 tristate "TI System Control Interface (TI-SCI) reset driver"
205 depends on TI_SCI_PROTOCOL
207 This enables the reset driver support over TI System Control Interface
208 available on some new TI's SoCs. If you wish to use reset resources
209 managed by the TI System Controller, say Y here. Otherwise, say N.
211 config RESET_TI_SYSCON
212 tristate "TI SYSCON Reset Driver"
216 This enables the reset driver support for TI devices with
217 memory-mapped reset registers as part of a syscon device node. If
218 you wish to use the reset framework for such memory-mapped devices,
219 say Y here. Otherwise, say N.
221 config RESET_UNIPHIER
222 tristate "Reset controller driver for UniPhier SoCs"
223 depends on ARCH_UNIPHIER || COMPILE_TEST
224 depends on OF && MFD_SYSCON
225 default ARCH_UNIPHIER
227 Support for reset controllers on UniPhier SoCs.
228 Say Y if you want to control reset signals provided by System Control
229 block, Media I/O block, Peripheral Block.
231 config RESET_UNIPHIER_GLUE
232 tristate "Reset driver in glue layer for UniPhier SoCs"
233 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
234 default ARCH_UNIPHIER
237 Support for peripheral core reset included in its own glue layer
238 on UniPhier SoCs. Say Y if you want to control reset signals
239 provided by the glue layer.
242 bool "ZYNQ Reset Driver" if COMPILE_TEST
245 This enables the reset controller driver for Xilinx Zynq SoCs.
247 source "drivers/reset/sti/Kconfig"
248 source "drivers/reset/hisilicon/Kconfig"
249 source "drivers/reset/tegra/Kconfig"