1 # SPDX-License-Identifier: GPL-2.0-only
2 config ARCH_HAS_RESET_CONTROLLER
5 menuconfig RESET_CONTROLLER
6 bool "Reset Controller Support"
7 default y if ARCH_HAS_RESET_CONTROLLER
9 Generic Reset Controller support.
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
19 tristate "Altera Arria10 System Resource Reset"
20 depends on MFD_ALTERA_A10SR
22 This option enables support for the external reset functions for
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
26 bool "AR71xx Reset Driver" if COMPILE_TEST
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
33 bool "AXS10x Reset Driver" if COMPILE_TEST
34 default ARC_PLAT_AXS10X
36 This enables the reset controller driver for AXS10x.
39 bool "BCM6345 Reset Controller"
40 depends on BMIPS_GENERIC || COMPILE_TEST
43 This enables the reset controller driver for BCM6345 SoCs.
46 bool "Berlin Reset Driver" if COMPILE_TEST
49 This enables the reset controller driver for Marvell Berlin SoCs.
52 tristate "Broadcom STB reset controller"
53 depends on ARCH_BRCMSTB || COMPILE_TEST
56 This enables the reset controller driver for Broadcom STB SoCs using
57 a SUN_TOP_CTRL_SW_INIT style controller.
59 config RESET_BRCMSTB_RESCAL
60 bool "Broadcom STB RESCAL reset controller"
62 default ARCH_BRCMSTB || COMPILE_TEST
64 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
68 bool "Synopsys HSDK Reset Driver"
70 depends on ARC_SOC_HSDK || COMPILE_TEST
72 This enables the reset controller driver for HSDK board.
75 tristate "i.MX7/8 Reset Driver"
77 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
78 default y if SOC_IMX7D
81 This enables the reset controller driver for i.MX7 SoCs.
84 bool "Intel Reset Controller Driver"
85 depends on OF && HAS_IOMEM
88 This enables the reset controller driver for Intel Gateway SoCs.
89 Say Y to control the reset signals provided by reset controller.
93 bool "Reset controller driver for Canaan Kendryte K210 SoC"
94 depends on (SOC_CANAAN || COMPILE_TEST) && OF
98 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
99 Say Y if you want to control reset signals provided by this
103 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
104 default SOC_TYPE_XWAY
106 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
109 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
112 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
115 tristate "Meson Reset Driver"
116 depends on ARCH_MESON || COMPILE_TEST
119 This enables the reset driver for Amlogic Meson SoCs.
121 config RESET_MESON_AUDIO_ARB
122 tristate "Meson Audio Memory Arbiter Reset Driver"
123 depends on ARCH_MESON || COMPILE_TEST
125 This enables the reset driver for Audio Memory Arbiter of
126 Amlogic's A113 based SoCs
129 bool "NPCM BMC Reset Driver" if COMPILE_TEST
132 This enables the reset controller driver for Nuvoton NPCM
138 config RESET_PISTACHIO
139 bool "Pistachio Reset Driver" if COMPILE_TEST
140 default MACH_PISTACHIO
142 This enables the reset driver for ImgTec Pistachio SoCs.
144 config RESET_QCOM_AOSS
145 tristate "Qcom AOSS Reset Driver"
146 depends on ARCH_QCOM || COMPILE_TEST
148 This enables the AOSS (always on subsystem) reset driver
149 for Qualcomm SDM845 SoCs. Say Y if you want to control
150 reset signals provided by AOSS for Modem, Venus, ADSP,
151 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
153 config RESET_QCOM_PDC
154 tristate "Qualcomm PDC Reset Driver"
155 depends on ARCH_QCOM || COMPILE_TEST
157 This enables the PDC (Power Domain Controller) reset driver
158 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
159 to control reset signals provided by PDC for Modem, Compute,
160 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
162 config RESET_RASPBERRYPI
163 tristate "Raspberry Pi 4 Firmware Reset Driver"
164 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
167 Raspberry Pi 4's co-processor controls some of the board's HW
168 initialization process, but it's up to Linux to trigger it when
169 relevant. This driver provides a reset controller capable of
170 interfacing with RPi4's co-processor and model these firmware
171 initialization routines as reset lines.
174 tristate "Reset driver controlled via ARM SCMI interface"
175 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
176 default ARM_SCMI_PROTOCOL
178 This driver provides support for reset signal/domains that are
179 controlled by firmware that implements the SCMI interface.
181 This driver uses SCMI Message Protocol to interact with the
182 firmware controlling all the reset signals.
185 bool "Simple Reset Controller Driver" if COMPILE_TEST
186 default ARCH_AGILEX || ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARC
188 This enables a simple reset controller driver for reset lines that
189 that can be asserted and deasserted by toggling bits in a contiguous,
190 exclusive register space.
192 Currently this driver supports:
197 - RCC reset controller in STM32 MCUs
199 - ZTE's zx2967 family
201 config RESET_STM32MP157
202 bool "STM32MP157 Reset Driver" if COMPILE_TEST
203 default MACH_STM32MP157
205 This enables the RCC reset controller driver for STM32 MPUs.
208 bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
212 This enables the reset driver for the SoCFPGA ARMv7 platforms. This
213 driver gets initialized early during platform init calls.
216 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
220 This enables the reset driver for Allwinner SoCs.
223 tristate "TI System Control Interface (TI-SCI) reset driver"
224 depends on TI_SCI_PROTOCOL
226 This enables the reset driver support over TI System Control Interface
227 available on some new TI's SoCs. If you wish to use reset resources
228 managed by the TI System Controller, say Y here. Otherwise, say N.
230 config RESET_TI_SYSCON
231 tristate "TI SYSCON Reset Driver"
235 This enables the reset driver support for TI devices with
236 memory-mapped reset registers as part of a syscon device node. If
237 you wish to use the reset framework for such memory-mapped devices,
238 say Y here. Otherwise, say N.
240 config RESET_UNIPHIER
241 tristate "Reset controller driver for UniPhier SoCs"
242 depends on ARCH_UNIPHIER || COMPILE_TEST
243 depends on OF && MFD_SYSCON
244 default ARCH_UNIPHIER
246 Support for reset controllers on UniPhier SoCs.
247 Say Y if you want to control reset signals provided by System Control
248 block, Media I/O block, Peripheral Block.
250 config RESET_UNIPHIER_GLUE
251 tristate "Reset driver in glue layer for UniPhier SoCs"
252 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
253 default ARCH_UNIPHIER
256 Support for peripheral core reset included in its own glue layer
257 on UniPhier SoCs. Say Y if you want to control reset signals
258 provided by the glue layer.
261 bool "ZYNQ Reset Driver" if COMPILE_TEST
264 This enables the reset controller driver for Xilinx Zynq SoCs.
266 source "drivers/reset/sti/Kconfig"
267 source "drivers/reset/hisilicon/Kconfig"
268 source "drivers/reset/tegra/Kconfig"